1 /******************************************************************************
2
3 Game Driver for Video System Mahjong series.
4
5 Taisen Idol-Mahjong Final Romance 2 (Japan)
6 (c)1995 Video System Co.,Ltd.
7
8 Taisen Mahjong FinalRomance R (Japan)
9 (c)1995 Video System Co.,Ltd.
10
11 Taisen Mahjong FinalRomance 4 (Japan)
12 (c)1998 Video System Co.,Ltd.
13
14 Driver by Takahiro Nogi <nogi@kt.rim.or.jp> 2001/02/28 -
15 Special thanks to Uki.
16
17 ******************************************************************************/
18 /******************************************************************************
19
20 Memo:
21
22 ******************************************************************************/
23
24 #include "driver.h"
25 #include "cpu/m68000/m68000.h"
26 #include "cpu/z80/z80.h"
27 #include "vidhrdw/generic.h"
28 #include "machine/eeprom.h"
29
30
31 VIDEO_UPDATE( fromanc2 );
32 VIDEO_START( fromanc2 );
33 VIDEO_START( fromancr );
34 VIDEO_START( fromanc4 );
35
36 READ16_HANDLER( fromanc2_paletteram_0_r );
37 READ16_HANDLER( fromanc2_paletteram_1_r );
38 WRITE16_HANDLER( fromanc2_paletteram_0_w );
39 WRITE16_HANDLER( fromanc2_paletteram_1_w );
40 READ16_HANDLER( fromancr_paletteram_0_r );
41 READ16_HANDLER( fromancr_paletteram_1_r );
42 WRITE16_HANDLER( fromancr_paletteram_0_w );
43 WRITE16_HANDLER( fromancr_paletteram_1_w );
44 READ16_HANDLER( fromanc4_paletteram_0_r );
45 READ16_HANDLER( fromanc4_paletteram_1_r );
46 WRITE16_HANDLER( fromanc4_paletteram_0_w );
47 WRITE16_HANDLER( fromanc4_paletteram_1_w );
48 WRITE16_HANDLER( fromanc2_videoram_0_w );
49 WRITE16_HANDLER( fromanc2_videoram_1_w );
50 WRITE16_HANDLER( fromanc2_videoram_2_w );
51 WRITE16_HANDLER( fromanc2_videoram_3_w );
52 WRITE16_HANDLER( fromancr_videoram_0_w );
53 WRITE16_HANDLER( fromancr_videoram_1_w );
54 WRITE16_HANDLER( fromancr_videoram_2_w );
55 WRITE16_HANDLER( fromanc4_videoram_0_w );
56 WRITE16_HANDLER( fromanc4_videoram_1_w );
57 WRITE16_HANDLER( fromanc4_videoram_2_w );
58 WRITE16_HANDLER( fromanc2_gfxreg_0_w );
59 WRITE16_HANDLER( fromanc2_gfxreg_1_w );
60 WRITE16_HANDLER( fromanc2_gfxreg_2_w );
61 WRITE16_HANDLER( fromanc2_gfxreg_3_w );
62 WRITE16_HANDLER( fromancr_gfxreg_0_w );
63 WRITE16_HANDLER( fromancr_gfxreg_1_w );
64 WRITE16_HANDLER( fromanc2_gfxbank_0_w );
65 WRITE16_HANDLER( fromanc2_gfxbank_1_w );
66 void fromancr_gfxbank_w(int data);
67 WRITE16_HANDLER( fromanc4_gfxreg_0_w );
68 WRITE16_HANDLER( fromanc4_gfxreg_1_w );
69 WRITE16_HANDLER( fromanc4_gfxreg_2_w );
70
71 void fromanc2_set_dispvram_w(int vram);
72
73
74 static int fromanc2_playerside;
75 static int fromanc2_portselect;
76 static UINT16 fromanc2_datalatch1;
77 static UINT8 fromanc2_datalatch_2h, fromanc2_datalatch_2l;
78 static UINT8 fromanc2_subcpu_int_flag;
79 static UINT8 fromanc2_subcpu_nmi_flag;
80 static UINT8 fromanc2_sndcpu_nmi_flag;
81
82
83 /* ----------------------------------------------------------------------------*/
84 /* MACHINE INITIALYZE*/
85 /* ----------------------------------------------------------------------------*/
86
MACHINE_INIT(fromanc2)87 static MACHINE_INIT( fromanc2 )
88 {
89 /**/
90 }
91
MACHINE_INIT(fromancr)92 static MACHINE_INIT( fromancr )
93 {
94 /**/
95 }
96
MACHINE_INIT(fromanc4)97 static MACHINE_INIT( fromanc4 )
98 {
99 /**/
100 }
101
102
DRIVER_INIT(fromanc2)103 static DRIVER_INIT( fromanc2 )
104 {
105 fromanc2_subcpu_nmi_flag = 1;
106 fromanc2_subcpu_int_flag = 1;
107 fromanc2_sndcpu_nmi_flag = 1;
108
109 fromanc2_playerside = 0;
110 }
111
DRIVER_INIT(fromancr)112 static DRIVER_INIT( fromancr )
113 {
114 fromanc2_subcpu_nmi_flag = 1;
115 fromanc2_subcpu_int_flag = 1;
116 fromanc2_sndcpu_nmi_flag = 1;
117
118 fromanc2_playerside = 0;
119 }
120
DRIVER_INIT(fromanc4)121 static DRIVER_INIT( fromanc4 )
122 {
123 fromanc2_sndcpu_nmi_flag = 1;
124
125 fromanc2_playerside = 0;
126 }
127
128
129 /* ----------------------------------------------------------------------------*/
130 /* MAIN CPU Interrupt (fromanc2, fromancr, fromanc4) TEST ROUTINE*/
131 /* ----------------------------------------------------------------------------*/
132
INTERRUPT_GEN(fromanc2_interrupt)133 static INTERRUPT_GEN( fromanc2_interrupt )
134 {
135 static int fromanc2_playerside_old = -1;
136 static int key_F1_old = 0;
137
138 if (keyboard_pressed(KEYCODE_F1)) {
139 if (key_F1_old != 1) {
140 key_F1_old = 1;
141 fromanc2_playerside ^= 1;
142 }
143 } else key_F1_old = 0;
144
145 if (fromanc2_playerside_old != fromanc2_playerside) {
146 fromanc2_playerside_old = fromanc2_playerside;
147
148 usrintf_showmessage("PLAYER-%01X SIDE", fromanc2_playerside + 1);
149
150 if (!fromanc2_playerside) {
151 mixer_set_stereo_volume(3, 75, 75); /* 1P (LEFT)*/
152 mixer_set_stereo_volume(4, 0, 0); /* 2P (RIGHT)*/
153 }
154 else {
155 mixer_set_stereo_volume(3, 0, 0); /* 1P (LEFT)*/
156 mixer_set_stereo_volume(4, 75, 75); /* 2P (RIGHT)*/
157 }
158
159 fromanc2_set_dispvram_w(fromanc2_playerside);
160 }
161
162 cpu_set_irq_line(0, 1, HOLD_LINE);
163 }
164
165
166 /* ----------------------------------------------------------------------------*/
167 /* Sound Command Interface (fromanc2, fromancr, fromanc4)*/
168 /* ----------------------------------------------------------------------------*/
169
WRITE16_HANDLER(fromanc2_sndcmd_w)170 static WRITE16_HANDLER( fromanc2_sndcmd_w )
171 {
172 soundlatch_w(offset, (data >> 8) & 0xff); /* 1P (LEFT)*/
173 soundlatch2_w(offset, data & 0xff); /* 2P (RIGHT)*/
174
175 cpu_set_irq_line(1, IRQ_LINE_NMI, PULSE_LINE);
176 fromanc2_sndcpu_nmi_flag = 0;
177 }
178
179 /* ----------------------------------------------------------------------------*/
180 /* Input Port Interface (COIN, TEST, KEY MATRIX, EEPROM)*/
181 /* ----------------------------------------------------------------------------*/
182
WRITE16_HANDLER(fromanc2_portselect_w)183 static WRITE16_HANDLER( fromanc2_portselect_w )
184 {
185 fromanc2_portselect = data;
186 }
187
READ16_HANDLER(fromanc2_keymatrix_r)188 static READ16_HANDLER( fromanc2_keymatrix_r )
189 {
190 UINT16 ret;
191
192 switch (fromanc2_portselect) {
193 case 0x01: ret = readinputport(1); break;
194 case 0x02: ret = readinputport(2); break;
195 case 0x04: ret = readinputport(3); break;
196 case 0x08: ret = readinputport(4); break;
197 default: ret = 0xffff;
198 log_cb(RETRO_LOG_DEBUG, LOGPRE "PC:%08X unknown %02X\n", activecpu_get_pc(), fromanc2_portselect);
199 break;
200 }
201
202 if (fromanc2_playerside) ret = ((ret & 0xff00) >> 8) | ((ret & 0x00ff) << 8);
203
204 return ret;
205 }
206
READ16_HANDLER(fromanc2_input_r)207 static READ16_HANDLER( fromanc2_input_r )
208 {
209 UINT16 cflag, coinsw, eeprom;
210
211 cflag = (((fromanc2_subcpu_int_flag & 1) << 4) |
212 ((fromanc2_subcpu_nmi_flag & 1) << 6) |
213 ((fromanc2_sndcpu_nmi_flag & 1) << 5));
214 eeprom = (EEPROM_read_bit() & 1) << 7; /* EEPROM DATA*/
215 coinsw = readinputport(0) & 0x030f; /* COIN, TEST*/
216
217 return (cflag | eeprom | coinsw);
218 }
219
READ16_HANDLER(fromanc4_input_r)220 static READ16_HANDLER( fromanc4_input_r )
221 {
222 UINT16 cflag, coinsw, eeprom;
223
224 cflag = (fromanc2_sndcpu_nmi_flag & 1) << 5;
225 eeprom = (EEPROM_read_bit() & 1) << 7; /* EEPROM DATA*/
226 coinsw = readinputport(0) & 0x001f; /* COIN, TEST*/
227
228 return (cflag | eeprom | coinsw);
229 }
230
WRITE16_HANDLER(fromanc2_eeprom_w)231 static WRITE16_HANDLER( fromanc2_eeprom_w )
232 {
233 if (ACCESSING_MSB) {
234 /* latch the bit*/
235 EEPROM_write_bit(data & 0x0100);
236
237 /* reset line asserted: reset.*/
238 EEPROM_set_cs_line((data & 0x0400) ? CLEAR_LINE : ASSERT_LINE);
239
240 /* clock line asserted: write latch or select next bit to read*/
241 EEPROM_set_clock_line((data & 0x0200) ? ASSERT_LINE : CLEAR_LINE);
242 }
243 }
244
WRITE16_HANDLER(fromancr_eeprom_w)245 static WRITE16_HANDLER( fromancr_eeprom_w )
246 {
247 if (ACCESSING_LSB) {
248 fromancr_gfxbank_w(data & 0xfff8);
249
250 /* latch the bit*/
251 EEPROM_write_bit(data & 0x0001);
252
253 /* reset line asserted: reset.*/
254 EEPROM_set_cs_line((data & 0x0004) ? CLEAR_LINE : ASSERT_LINE);
255
256 /* clock line asserted: write latch or select next bit to read*/
257 EEPROM_set_clock_line((data & 0x0002) ? ASSERT_LINE : CLEAR_LINE);
258 }
259 }
260
WRITE16_HANDLER(fromanc4_eeprom_w)261 static WRITE16_HANDLER( fromanc4_eeprom_w )
262 {
263 if (ACCESSING_LSB) {
264 /* latch the bit*/
265 EEPROM_write_bit(data & 0x0004);
266
267 /* reset line asserted: reset.*/
268 EEPROM_set_cs_line((data & 0x0001) ? CLEAR_LINE : ASSERT_LINE);
269
270 /* clock line asserted: write latch or select next bit to read*/
271 EEPROM_set_clock_line((data & 0x0002) ? ASSERT_LINE : CLEAR_LINE);
272 }
273 }
274
275 /* ----------------------------------------------------------------------------*/
276 /* MAIN CPU, SUB CPU Communication Interface (fromanc2, fromancr)*/
277 /* ----------------------------------------------------------------------------*/
278
WRITE16_HANDLER(fromanc2_subcpu_w)279 static WRITE16_HANDLER( fromanc2_subcpu_w )
280 {
281 fromanc2_datalatch1 = data;
282
283 cpu_set_irq_line(2, 0, HOLD_LINE);
284 fromanc2_subcpu_int_flag = 0;
285 }
286
READ16_HANDLER(fromanc2_subcpu_r)287 static READ16_HANDLER( fromanc2_subcpu_r )
288 {
289 cpu_set_irq_line(2, IRQ_LINE_NMI, PULSE_LINE);
290 fromanc2_subcpu_nmi_flag = 0;
291
292 return (fromanc2_datalatch_2h << 8) | fromanc2_datalatch_2l;
293 }
294
READ_HANDLER(fromanc2_maincpu_r_l)295 static READ_HANDLER( fromanc2_maincpu_r_l )
296 {
297 return fromanc2_datalatch1 & 0x00ff;
298 }
299
READ_HANDLER(fromanc2_maincpu_r_h)300 static READ_HANDLER( fromanc2_maincpu_r_h )
301 {
302 fromanc2_subcpu_int_flag = 1;
303
304 return (fromanc2_datalatch1 & 0xff00) >> 8;
305 }
306
WRITE_HANDLER(fromanc2_maincpu_w_l)307 static WRITE_HANDLER( fromanc2_maincpu_w_l )
308 {
309 fromanc2_datalatch_2l = data;
310 }
311
WRITE_HANDLER(fromanc2_maincpu_w_h)312 static WRITE_HANDLER( fromanc2_maincpu_w_h )
313 {
314 fromanc2_datalatch_2h = data;
315 }
316
WRITE_HANDLER(fromanc2_subcpu_nmi_clr)317 static WRITE_HANDLER( fromanc2_subcpu_nmi_clr )
318 {
319 fromanc2_subcpu_nmi_flag = 1;
320 }
321
READ_HANDLER(fromanc2_sndcpu_nmi_clr)322 static READ_HANDLER( fromanc2_sndcpu_nmi_clr )
323 {
324 fromanc2_sndcpu_nmi_flag = 1;
325
326 return 0xff;
327 }
328
WRITE_HANDLER(fromanc2_subcpu_rombank_w)329 static WRITE_HANDLER( fromanc2_subcpu_rombank_w )
330 {
331 UINT8 *RAM = memory_region(REGION_CPU3);
332 int rombank = data & 0x03;
333 int rambank = (data & 0x0c) >> 2;
334
335 /* Change ROM BANK*/
336 cpu_setbank(1, &RAM[rombank * 0x4000]);
337
338 /* Change RAM BANK*/
339 if (rambank != 0) cpu_setbank(2, &RAM[0x10000 + (rambank * 0x4000)]);
340 else cpu_setbank(2, &RAM[0x8000]);
341 }
342
343
344 /* ----------------------------------------------------------------------------*/
345 /* MAIN Program (fromanc2, fromancr, fromanc4)*/
346 /* ----------------------------------------------------------------------------*/
347
MEMORY_READ16_START(fromanc2_readmem_main)348 static MEMORY_READ16_START( fromanc2_readmem_main )
349 { 0x000000, 0x07ffff, MRA16_ROM }, /* MAIN ROM*/
350
351 { 0x802000, 0x802fff, MRA16_NOP }, /* ???*/
352
353 { 0xa00000, 0xa00fff, fromanc2_paletteram_0_r },/* PALETTE (1P)*/
354 { 0xa80000, 0xa80fff, fromanc2_paletteram_1_r },/* PALETTE (2P)*/
355
356 { 0xd01100, 0xd01101, fromanc2_input_r }, /* INPUT COMMON, EEPROM*/
357 { 0xd01300, 0xd01301, fromanc2_subcpu_r }, /* SUB CPU READ*/
358 { 0xd01800, 0xd01801, fromanc2_keymatrix_r }, /* INPUT KEY MATRIX*/
359
360 { 0xd80000, 0xd8ffff, MRA16_RAM }, /* WORK RAM*/
361 MEMORY_END
362
363 static MEMORY_WRITE16_START( fromanc2_writemem_main )
364 { 0x000000, 0x07ffff, MWA16_ROM }, /* MAIN ROM*/
365
366 { 0x800000, 0x803fff, fromanc2_videoram_0_w }, /* VRAM 0, 1 (1P)*/
367 { 0x880000, 0x883fff, fromanc2_videoram_1_w }, /* VRAM 2, 3 (1P)*/
368 { 0x900000, 0x903fff, fromanc2_videoram_2_w }, /* VRAM 0, 1 (2P)*/
369 { 0x980000, 0x983fff, fromanc2_videoram_3_w }, /* VRAM 2, 3 (2P)*/
370
371 { 0xa00000, 0xa00fff, fromanc2_paletteram_0_w },/* PALETTE (1P)*/
372 { 0xa80000, 0xa80fff, fromanc2_paletteram_1_w },/* PALETTE (2P)*/
373
374 { 0xd00000, 0xd00023, fromanc2_gfxreg_0_w }, /* SCROLL REG (1P/2P)*/
375 { 0xd00100, 0xd00123, fromanc2_gfxreg_2_w }, /* SCROLL REG (1P/2P)*/
376 { 0xd00200, 0xd00223, fromanc2_gfxreg_1_w }, /* SCROLL REG (1P/2P)*/
377 { 0xd00300, 0xd00323, fromanc2_gfxreg_3_w }, /* SCROLL REG (1P/2P)*/
378
379 { 0xd00400, 0xd00413, MWA16_NOP }, /* ???*/
380 { 0xd00500, 0xd00513, MWA16_NOP }, /* ???*/
381
382 { 0xd01000, 0xd01001, fromanc2_sndcmd_w }, /* SOUND REQ (1P/2P)*/
383 { 0xd01200, 0xd01201, fromanc2_subcpu_w }, /* SUB CPU WRITE*/
384 { 0xd01400, 0xd01401, fromanc2_gfxbank_0_w }, /* GFXBANK (1P)*/
385 { 0xd01500, 0xd01501, fromanc2_gfxbank_1_w }, /* GFXBANK (2P)*/
386 { 0xd01600, 0xd01601, fromanc2_eeprom_w }, /* EEPROM DATA*/
387 { 0xd01a00, 0xd01a01, fromanc2_portselect_w }, /* PORT SELECT (1P/2P)*/
388
389 { 0xd80000, 0xd8ffff, MWA16_RAM }, /* WORK RAM*/
390 MEMORY_END
391
392 static MEMORY_READ16_START( fromancr_readmem_main )
393 { 0x000000, 0x07ffff, MRA16_ROM }, /* MAIN ROM*/
394
395 { 0xa00000, 0xa00fff, fromancr_paletteram_0_r },/* PALETTE (1P)*/
396 { 0xa80000, 0xa80fff, fromancr_paletteram_1_r },/* PALETTE (2P)*/
397
398 { 0xd01100, 0xd01101, fromanc2_input_r }, /* INPUT COMMON, EEPROM*/
399 { 0xd01300, 0xd01301, fromanc2_subcpu_r }, /* SUB CPU READ*/
400 { 0xd01800, 0xd01801, fromanc2_keymatrix_r }, /* INPUT KEY MATRIX*/
401
402 { 0xd80000, 0xd8ffff, MRA16_RAM }, /* WORK RAM*/
403 MEMORY_END
404
405 static MEMORY_WRITE16_START( fromancr_writemem_main )
406 { 0x000000, 0x07ffff, MWA16_ROM }, /* MAIN ROM*/
407
408 { 0x800000, 0x803fff, fromancr_videoram_0_w }, /* VRAM BG (1P/2P)*/
409 { 0x880000, 0x883fff, fromancr_videoram_1_w }, /* VRAM FG (1P/2P)*/
410 { 0x900000, 0x903fff, fromancr_videoram_2_w }, /* VRAM TEXT (1P/2P)*/
411 { 0x980000, 0x983fff, MWA16_NOP }, /* VRAM Unused ?*/
412
413 { 0xa00000, 0xa00fff, fromancr_paletteram_0_w },/* PALETTE (1P)*/
414 { 0xa80000, 0xa80fff, fromancr_paletteram_1_w },/* PALETTE (2P)*/
415
416 { 0xd00000, 0xd00023, fromancr_gfxreg_1_w }, /* SCROLL REG (1P/2P)*/
417 { 0xd00100, 0xd00123, fromancr_gfxreg_0_w }, /* SCROLL REG (1P/2P)*/
418
419 { 0xd00200, 0xd002ff, MWA16_NOP }, /* ?*/
420
421 { 0xd00400, 0xd00413, MWA16_NOP }, /* ???*/
422 { 0xd00500, 0xd00513, MWA16_NOP }, /* ???*/
423
424 { 0xd01000, 0xd01001, fromanc2_sndcmd_w }, /* SOUND REQ (1P/2P)*/
425 { 0xd01200, 0xd01201, fromanc2_subcpu_w }, /* SUB CPU WRITE*/
426 { 0xd01400, 0xd01401, MWA16_NOP }, /* COIN COUNTER ?*/
427 { 0xd01600, 0xd01601, fromancr_eeprom_w }, /* EEPROM DATA, GFXBANK (1P/2P)*/
428 { 0xd01a00, 0xd01a01, fromanc2_portselect_w }, /* PORT SELECT (1P/2P)*/
429
430 { 0xd80000, 0xd8ffff, MWA16_RAM }, /* WORK RAM*/
431 MEMORY_END
432
433 static MEMORY_READ16_START( fromanc4_readmem_main )
434 { 0x000000, 0x07ffff, MRA16_ROM }, /* MAIN ROM*/
435 { 0x400000, 0x7fffff, MRA16_ROM }, /* DATA ROM*/
436
437 { 0x800000, 0x81ffff, MRA16_RAM }, /* WORK RAM*/
438
439 { 0xdb0000, 0xdb0fff, fromanc4_paletteram_0_r },/* PALETTE (1P)*/
440 { 0xdc0000, 0xdc0fff, fromanc4_paletteram_1_r },/* PALETTE (2P)*/
441
442 { 0xd10000, 0xd10001, fromanc2_keymatrix_r }, /* INPUT KEY MATRIX*/
443 { 0xd20000, 0xd20001, fromanc4_input_r }, /* INPUT COMMON, EEPROM DATA*/
444
445 { 0xe5000c, 0xe5000d, MRA16_NOP }, /* EXT-COMM PORT ?*/
446 MEMORY_END
447
448 static MEMORY_WRITE16_START( fromanc4_writemem_main )
449 { 0x000000, 0x07ffff, MWA16_ROM }, /* MAIN ROM*/
450 { 0x400000, 0x7fffff, MWA16_ROM }, /* DATA ROM*/
451
452 { 0x800000, 0x81ffff, MWA16_RAM }, /* WORK RAM*/
453
454 { 0xd00000, 0xd00001, fromanc2_portselect_w }, /* PORT SELECT (1P/2P)*/
455
456 { 0xd10000, 0xd10001, MWA16_NOP }, /* ?*/
457 { 0xd30000, 0xd30001, MWA16_NOP }, /* ?*/
458 { 0xd50000, 0xd50001, fromanc4_eeprom_w }, /* EEPROM DATA*/
459
460 { 0xd70000, 0xd70001, fromanc2_sndcmd_w }, /* SOUND REQ (1P/2P)*/
461
462 { 0xd80000, 0xd8ffff, fromanc4_videoram_0_w }, /* VRAM FG (1P/2P)*/
463 { 0xd90000, 0xd9ffff, fromanc4_videoram_1_w }, /* VRAM BG (1P/2P)*/
464 { 0xda0000, 0xdaffff, fromanc4_videoram_2_w }, /* VRAM TEXT (1P/2P)*/
465
466 { 0xdb0000, 0xdb0fff, fromanc4_paletteram_0_w },/* PALETTE (1P)*/
467 { 0xdc0000, 0xdc0fff, fromanc4_paletteram_1_w },/* PALETTE (2P)*/
468
469 { 0xe00000, 0xe0001d, fromanc4_gfxreg_0_w }, /* SCROLL, GFXBANK (1P/2P)*/
470 { 0xe10000, 0xe1001d, fromanc4_gfxreg_1_w }, /* SCROLL, GFXBANK (1P/2P)*/
471 { 0xe20000, 0xe2001d, fromanc4_gfxreg_2_w }, /* SCROLL, GFXBANK (1P/2P)*/
472
473 { 0xe30000, 0xe30013, MWA16_NOP }, /* ???*/
474 { 0xe40000, 0xe40013, MWA16_NOP }, /* ???*/
475
476 { 0xe50000, 0xe50009, MWA16_NOP }, /* EXT-COMM PORT ?*/
477 MEMORY_END
478
479
480 /* ----------------------------------------------------------------------------*/
481 /* Z80 SUB Program (fromanc2, fromancr)*/
482 /* ----------------------------------------------------------------------------*/
483
484 static MEMORY_READ_START( fromanc2_readmem_sub )
485 { 0x0000, 0x3fff, MRA_ROM }, /* ROM*/
486 { 0x4000, 0x7fff, MRA_BANK1 }, /* ROM(BANK)*/
487 { 0x8000, 0xbfff, MRA_RAM }, /* RAM(WORK)*/
488 { 0xc000, 0xffff, MRA_BANK2 }, /* RAM(BANK)*/
489 MEMORY_END
490
491 static MEMORY_WRITE_START( fromanc2_writemem_sub )
492 { 0x0000, 0x3fff, MWA_ROM }, /* ROM*/
493 { 0x4000, 0x7fff, MWA_BANK1 }, /* ROM(BANK)*/
494 { 0x8000, 0xbfff, MWA_RAM }, /* RAM(WORK)*/
495 { 0xc000, 0xffff, MWA_BANK2 }, /* RAM(BANK)*/
496 MEMORY_END
497
498 static PORT_READ_START( fromanc2_readport_sub )
499 { 0x02, 0x02, fromanc2_maincpu_r_l }, /* to MAIN CPU*/
500 { 0x04, 0x04, fromanc2_maincpu_r_h }, /* to MAIN CPU*/
501 PORT_END
502
503 static PORT_WRITE_START( fromanc2_writeport_sub )
504 { 0x00, 0x00, fromanc2_subcpu_rombank_w },
505 { 0x02, 0x02, fromanc2_maincpu_w_l }, /* from MAIN CPU*/
506 { 0x04, 0x04, fromanc2_maincpu_w_h }, /* from MAIN CPU*/
507 { 0x06, 0x06, fromanc2_subcpu_nmi_clr },
508 PORT_END
509
510
511 /* ----------------------------------------------------------------------------*/
512 /* Z80 Sound Program (fromanc2, fromancr, fromanc4)*/
513 /* ----------------------------------------------------------------------------*/
514
515 static MEMORY_READ_START( fromanc2_readmem_sound )
516 { 0x0000, 0xdfff, MRA_ROM },
517 { 0xe000, 0xffff, MRA_RAM },
518 MEMORY_END
519
520 static MEMORY_WRITE_START( fromanc2_writemem_sound )
521 { 0x0000, 0xdfff, MWA_ROM },
522 { 0xe000, 0xffff, MWA_RAM },
523 MEMORY_END
524
525 static PORT_READ_START( fromanc2_readport_sound )
526 { 0x00, 0x00, soundlatch_r }, /* snd cmd (1P)*/
527 { 0x04, 0x04, soundlatch2_r }, /* snd cmd (2P)*/
528 { 0x09, 0x09, IORP_NOP }, /* ?*/
529 { 0x08, 0x08, YM2610_status_port_0_A_r },
530 { 0x0a, 0x0a, YM2610_status_port_0_B_r },
531 { 0x0c, 0x0c, fromanc2_sndcpu_nmi_clr },
532 PORT_END
533
534 static PORT_WRITE_START( fromanc2_writeport_sound )
535 { 0x00, 0x00, IOWP_NOP }, /* ?*/
536 { 0x08, 0x08, YM2610_control_port_0_A_w },
537 { 0x09, 0x09, YM2610_data_port_0_A_w },
538 { 0x0a, 0x0a, YM2610_control_port_0_B_w },
539 { 0x0b, 0x0b, YM2610_data_port_0_B_w },
540 PORT_END
541
542
543 /* ----------------------------------------------------------------------------*/
544 /**/
545 /* ----------------------------------------------------------------------------*/
546
547 #define VSYSMJCTRL_PORT1 \
548 PORT_START /* (1) PORT 0 */ \
549 PORT_BITX( 0x0001, IP_ACTIVE_LOW, 0, "P1 A", KEYCODE_A, IP_JOY_NONE ) \
550 PORT_BITX( 0x0002, IP_ACTIVE_LOW, 0, "P1 E", KEYCODE_E, IP_JOY_NONE ) \
551 PORT_BITX( 0x0004, IP_ACTIVE_LOW, 0, "P1 I", KEYCODE_I, IP_JOY_NONE ) \
552 PORT_BITX( 0x0008, IP_ACTIVE_LOW, 0, "P1 M", KEYCODE_M, IP_JOY_NONE ) \
553 PORT_BITX( 0x0010, IP_ACTIVE_LOW, 0, "P1 Kan", KEYCODE_LCONTROL, IP_JOY_NONE ) \
554 PORT_BIT ( 0x0020, IP_ACTIVE_LOW, IPT_START1 ) \
555 PORT_BIT ( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
556 PORT_BIT ( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
557 PORT_BITX( 0x0100, IP_ACTIVE_LOW, 0, "P2 A", IP_KEY_DEFAULT, IP_JOY_NONE ) \
558 PORT_BITX( 0x0200, IP_ACTIVE_LOW, 0, "P2 E", IP_KEY_DEFAULT, IP_JOY_NONE ) \
559 PORT_BITX( 0x0400, IP_ACTIVE_LOW, 0, "P2 I", IP_KEY_DEFAULT, IP_JOY_NONE ) \
560 PORT_BITX( 0x0800, IP_ACTIVE_LOW, 0, "P2 M", IP_KEY_DEFAULT, IP_JOY_NONE ) \
561 PORT_BITX( 0x1000, IP_ACTIVE_LOW, 0, "P2 Kan", IP_KEY_DEFAULT, IP_JOY_NONE ) \
562 PORT_BIT ( 0x2000, IP_ACTIVE_LOW, IPT_START2 ) \
563 PORT_BIT ( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
564 PORT_BIT ( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
565
566 #define VSYSMJCTRL_PORT2 \
567 PORT_START /* (2) PORT 1 */ \
568 PORT_BITX( 0x0001, IP_ACTIVE_LOW, 0, "P1 B", KEYCODE_B, IP_JOY_NONE ) \
569 PORT_BITX( 0x0002, IP_ACTIVE_LOW, 0, "P1 F", KEYCODE_F, IP_JOY_NONE ) \
570 PORT_BITX( 0x0004, IP_ACTIVE_LOW, 0, "P1 J", KEYCODE_J, IP_JOY_NONE ) \
571 PORT_BITX( 0x0008, IP_ACTIVE_LOW, 0, "P1 N", KEYCODE_N, IP_JOY_NONE ) \
572 PORT_BITX( 0x0010, IP_ACTIVE_LOW, 0, "P1 Reach", KEYCODE_LSHIFT, IP_JOY_NONE ) \
573 PORT_BIT ( 0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
574 PORT_BIT ( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
575 PORT_BIT ( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
576 PORT_BITX( 0x0100, IP_ACTIVE_LOW, 0, "P2 B", IP_KEY_DEFAULT, IP_JOY_NONE ) \
577 PORT_BITX( 0x0200, IP_ACTIVE_LOW, 0, "P2 F", IP_KEY_DEFAULT, IP_JOY_NONE ) \
578 PORT_BITX( 0x0400, IP_ACTIVE_LOW, 0, "P2 J", IP_KEY_DEFAULT, IP_JOY_NONE ) \
579 PORT_BITX( 0x0800, IP_ACTIVE_LOW, 0, "P2 N", IP_KEY_DEFAULT, IP_JOY_NONE ) \
580 PORT_BITX( 0x1000, IP_ACTIVE_LOW, 0, "P2 Reach", IP_KEY_DEFAULT, IP_JOY_NONE ) \
581 PORT_BIT ( 0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
582 PORT_BIT ( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
583 PORT_BIT ( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
584
585 #define VSYSMJCTRL_PORT3 \
586 PORT_START /* (3) PORT 2 */ \
587 PORT_BITX( 0x0001, IP_ACTIVE_LOW, 0, "P1 C", KEYCODE_C, IP_JOY_NONE ) \
588 PORT_BITX( 0x0002, IP_ACTIVE_LOW, 0, "P1 G", KEYCODE_G, IP_JOY_NONE ) \
589 PORT_BITX( 0x0004, IP_ACTIVE_LOW, 0, "P1 K", KEYCODE_K, IP_JOY_NONE ) \
590 PORT_BITX( 0x0008, IP_ACTIVE_LOW, 0, "P1 Chi", KEYCODE_SPACE, IP_JOY_NONE ) \
591 PORT_BITX( 0x0010, IP_ACTIVE_LOW, 0, "P1 Ron", KEYCODE_Z, IP_JOY_NONE ) \
592 PORT_BIT ( 0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
593 PORT_BIT ( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
594 PORT_BIT ( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
595 PORT_BITX( 0x0100, IP_ACTIVE_LOW, 0, "P2 C", IP_KEY_DEFAULT, IP_JOY_NONE ) \
596 PORT_BITX( 0x0200, IP_ACTIVE_LOW, 0, "P2 G", IP_KEY_DEFAULT, IP_JOY_NONE ) \
597 PORT_BITX( 0x0400, IP_ACTIVE_LOW, 0, "P2 K", IP_KEY_DEFAULT, IP_JOY_NONE ) \
598 PORT_BITX( 0x0800, IP_ACTIVE_LOW, 0, "P2 Chi", IP_KEY_DEFAULT, IP_JOY_NONE ) \
599 PORT_BITX( 0x1000, IP_ACTIVE_LOW, 0, "P2 Ron", IP_KEY_DEFAULT, IP_JOY_NONE ) \
600 PORT_BIT ( 0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
601 PORT_BIT ( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
602 PORT_BIT ( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
603
604 #define VSYSMJCTRL_PORT4 \
605 PORT_START /* (4) PORT 3 */ \
606 PORT_BITX( 0x0001, IP_ACTIVE_LOW, 0, "P1 D", KEYCODE_D, IP_JOY_NONE ) \
607 PORT_BITX( 0x0002, IP_ACTIVE_LOW, 0, "P1 H", KEYCODE_H, IP_JOY_NONE ) \
608 PORT_BITX( 0x0004, IP_ACTIVE_LOW, 0, "P1 L", KEYCODE_L, IP_JOY_NONE ) \
609 PORT_BITX( 0x0008, IP_ACTIVE_LOW, 0, "P1 Pon", KEYCODE_LALT, IP_JOY_NONE ) \
610 PORT_BIT ( 0x0010, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
611 PORT_BIT ( 0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
612 PORT_BIT ( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
613 PORT_BIT ( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
614 PORT_BITX( 0x0100, IP_ACTIVE_LOW, 0, "P2 D", IP_KEY_DEFAULT, IP_JOY_NONE ) \
615 PORT_BITX( 0x0200, IP_ACTIVE_LOW, 0, "P2 H", IP_KEY_DEFAULT, IP_JOY_NONE ) \
616 PORT_BITX( 0x0400, IP_ACTIVE_LOW, 0, "P2 L", IP_KEY_DEFAULT, IP_JOY_NONE ) \
617 PORT_BITX( 0x0800, IP_ACTIVE_LOW, 0, "P2 Pon", IP_KEY_DEFAULT, IP_JOY_NONE ) \
618 PORT_BIT ( 0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
619 PORT_BIT ( 0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
620 PORT_BIT ( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
621 PORT_BIT ( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
622
623 INPUT_PORTS_START( fromanc2 )
624 PORT_START /* (0) COIN SW, TEST SW, EEPROM DATA, etc */
625 PORT_BIT ( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 ) /* COIN1 (1P)*/
626 PORT_BIT ( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 ) /* COIN2 (1P)*/
627 PORT_BIT ( 0x0004, IP_ACTIVE_LOW, IPT_COIN3 ) /* COIN1 (2P)*/
628 PORT_BIT ( 0x0008, IP_ACTIVE_LOW, IPT_COIN4 ) /* COIN2 (2P)*/
629 PORT_BIT ( 0x0010, IP_ACTIVE_LOW, IPT_UNUSED ) /* SUBCPU INT FLAG*/
630 PORT_BIT ( 0x0020, IP_ACTIVE_LOW, IPT_UNUSED ) /* SNDCPU NMI FLAG*/
631 PORT_BIT ( 0x0040, IP_ACTIVE_LOW, IPT_UNUSED ) /* SUBCPU NMI FLAG*/
632 PORT_BIT ( 0x0080, IP_ACTIVE_LOW, IPT_UNUSED ) /* EEPROM READ*/
633 PORT_BITX( 0x0100, IP_ACTIVE_LOW, IPT_SERVICE, DEF_STR( Service_Mode ), KEYCODE_F2, IP_JOY_NONE ) /* TEST (1P)*/
634 PORT_BITX( 0x0200, IP_ACTIVE_LOW, IPT_SERVICE, DEF_STR( Service_Mode ), KEYCODE_F2, IP_JOY_NONE ) /* TEST (2P)*/
635 PORT_BIT ( 0x0400, IP_ACTIVE_LOW, IPT_UNUSED )
636 PORT_BIT ( 0x0800, IP_ACTIVE_LOW, IPT_UNUSED )
637 PORT_BIT ( 0x1000, IP_ACTIVE_LOW, IPT_UNUSED )
638 PORT_BIT ( 0x2000, IP_ACTIVE_LOW, IPT_UNUSED )
639 PORT_BIT ( 0x4000, IP_ACTIVE_LOW, IPT_UNUSED )
640 PORT_BIT ( 0x8000, IP_ACTIVE_LOW, IPT_UNUSED )
641
642 VSYSMJCTRL_PORT1 /* (1) PORT 1-0 */
643 VSYSMJCTRL_PORT2 /* (2) PORT 1-1 */
644 VSYSMJCTRL_PORT3 /* (3) PORT 1-2 */
645 VSYSMJCTRL_PORT4 /* (4) PORT 1-3 */
646 INPUT_PORTS_END
647
648 INPUT_PORTS_START( fromanc4 )
649 PORT_START /* (0) COIN SW, TEST SW, EEPROM DATA, etc */
650 PORT_BITX( 0x0001, IP_ACTIVE_LOW, IPT_SERVICE, DEF_STR( Service_Mode ), KEYCODE_F2, IP_JOY_NONE ) /* TEST (1P)*/
651 PORT_BIT ( 0x0002, IP_ACTIVE_LOW, IPT_COIN1 ) /* COIN1 (1P)*/
652 PORT_BIT ( 0x0004, IP_ACTIVE_LOW, IPT_COIN2 ) /* COIN2 (1P)*/
653 PORT_BIT ( 0x0008, IP_ACTIVE_LOW, IPT_COIN3 ) /* COIN3 (2P)*/
654 PORT_BIT ( 0x0010, IP_ACTIVE_LOW, IPT_COIN4 ) /* COIN4 (2P)*/
655 PORT_BIT ( 0x0020, IP_ACTIVE_LOW, IPT_UNUSED ) /* SNDCPU NMI FLAG*/
656 PORT_BIT ( 0x0040, IP_ACTIVE_LOW, IPT_UNUSED )
657 PORT_BIT ( 0x0080, IP_ACTIVE_LOW, IPT_UNUSED ) /* EEPROM READ*/
658 PORT_BIT ( 0x0100, IP_ACTIVE_LOW, IPT_UNUSED )
659 PORT_BIT ( 0x0200, IP_ACTIVE_LOW, IPT_UNUSED )
660 PORT_BIT ( 0x0400, IP_ACTIVE_LOW, IPT_UNUSED )
661 PORT_BIT ( 0x0800, IP_ACTIVE_LOW, IPT_UNUSED )
662 PORT_BIT ( 0x1000, IP_ACTIVE_LOW, IPT_UNUSED )
663 PORT_BIT ( 0x2000, IP_ACTIVE_LOW, IPT_UNUSED )
664 PORT_BIT ( 0x4000, IP_ACTIVE_LOW, IPT_UNUSED )
665 PORT_BIT ( 0x8000, IP_ACTIVE_LOW, IPT_UNUSED )
666
667 VSYSMJCTRL_PORT1 /* (1) PORT 1-0 */
668 VSYSMJCTRL_PORT2 /* (2) PORT 1-1 */
669 VSYSMJCTRL_PORT3 /* (3) PORT 1-2 */
670 VSYSMJCTRL_PORT4 /* (4) PORT 1-3 */
671 INPUT_PORTS_END
672
673
674 /* ----------------------------------------------------------------------------*/
675 /**/
676 /* ----------------------------------------------------------------------------*/
677
678 static struct GfxLayout fromanc2_tilelayout =
679 {
680 8, 8,
681 RGN_FRAC(1, 1),
682 4,
683 { 0, 1, 2, 3 },
684 { 4, 0, 12, 8, 20, 16, 28, 24 },
685 { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 },
686 32*8
687 };
688
689 static struct GfxDecodeInfo fromanc2_gfxdecodeinfo[] =
690 {
691 { REGION_GFX1, 0, &fromanc2_tilelayout, ( 0 * 2), (256 * 2) },
692 { REGION_GFX2, 0, &fromanc2_tilelayout, (256 * 2), (256 * 2) },
693 { REGION_GFX3, 0, &fromanc2_tilelayout, (512 * 2), (256 * 2) },
694 { REGION_GFX4, 0, &fromanc2_tilelayout, (768 * 2), (256 * 2) },
695 { -1 } /* end of array */
696 };
697
698 static struct GfxLayout fromancr_tilelayout =
699 {
700 8, 8,
701 RGN_FRAC(1, 1),
702 8,
703 { 0, 1, 2, 3, 4, 5, 6, 7 },
704 { 1*8, 0*8, 3*8, 2*8, 5*8, 4*8, 7*8, 6*8 },
705 { 0*64, 1*64, 2*64, 3*64, 4*64, 5*64, 6*64, 7*64 },
706 64*8
707 };
708
709 static struct GfxDecodeInfo fromancr_gfxdecodeinfo[] =
710 {
711 { REGION_GFX1, 0, &fromancr_tilelayout, (512 * 2), 2 },
712 { REGION_GFX2, 0, &fromancr_tilelayout, (256 * 2), 2 },
713 { REGION_GFX3, 0, &fromancr_tilelayout, ( 0 * 2), 2 },
714 { -1 } /* end of array */
715 };
716
717
718 /* ----------------------------------------------------------------------------*/
719 /**/
720 /* ----------------------------------------------------------------------------*/
721
irqhandler(int irq)722 static void irqhandler(int irq)
723 {
724 cpu_set_irq_line(1, 0, irq ? ASSERT_LINE : CLEAR_LINE);
725 }
726
727 static struct YM2610interface ym2610_interface =
728 {
729 1,
730 8000000,
731 { 50 },
732 { 0 },
733 { 0 },
734 { 0 },
735 { 0 },
736 { irqhandler },
737 { 0 },
738 { REGION_SOUND1 },
739 { YM3012_VOL(75, MIXER_PAN_CENTER, 75, MIXER_PAN_CENTER) }
740 };
741
742
743 /* ----------------------------------------------------------------------------*/
744 /**/
745 /* ----------------------------------------------------------------------------*/
746
747 static MACHINE_DRIVER_START( fromanc2 )
748
749 /* basic machine hardware */
750 MDRV_CPU_ADD(M68000,32000000/2) /* 16.00 MHz */
751 MDRV_CPU_MEMORY(fromanc2_readmem_main,fromanc2_writemem_main)
752 MDRV_CPU_VBLANK_INT(fromanc2_interrupt,1)
753
754 MDRV_CPU_ADD(Z80,32000000/4)
755 MDRV_CPU_FLAGS(CPU_AUDIO_CPU) /* 8.00 MHz */
756 MDRV_CPU_MEMORY(fromanc2_readmem_sound,fromanc2_writemem_sound)
757 MDRV_CPU_PORTS(fromanc2_readport_sound,fromanc2_writeport_sound)
758
759 MDRV_CPU_ADD(Z80,32000000/4) /* 8.00 MHz */
760 MDRV_CPU_MEMORY(fromanc2_readmem_sub,fromanc2_writemem_sub)
761 MDRV_CPU_PORTS(fromanc2_readport_sub,fromanc2_writeport_sub)
762
763 MDRV_FRAMES_PER_SECOND(60)
764 MDRV_VBLANK_DURATION(DEFAULT_60HZ_VBLANK_DURATION)
765
766 MDRV_MACHINE_INIT(fromanc2)
767 MDRV_NVRAM_HANDLER(93C46)
768
769 /* video hardware */
770 MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
771 MDRV_SCREEN_SIZE(512, 512)
772 MDRV_VISIBLE_AREA(0, 352-1, 0, 240-1)
773 MDRV_GFXDECODE(fromanc2_gfxdecodeinfo)
774 MDRV_PALETTE_LENGTH(4096)
775
776 MDRV_VIDEO_START(fromanc2)
777 MDRV_VIDEO_UPDATE(fromanc2)
778
779 /* sound hardware */
780 MDRV_SOUND_ADD(YM2610, ym2610_interface)
781 MACHINE_DRIVER_END
782
783 static MACHINE_DRIVER_START( fromancr )
784
785 /* basic machine hardware */
786 MDRV_CPU_ADD(M68000,32000000/2) /* 16.00 MHz */
787 MDRV_CPU_MEMORY(fromancr_readmem_main,fromancr_writemem_main)
788 MDRV_CPU_VBLANK_INT(fromanc2_interrupt,1)
789
790 MDRV_CPU_ADD(Z80,32000000/4)
791 MDRV_CPU_FLAGS(CPU_AUDIO_CPU) /* 8.00 MHz */
792 MDRV_CPU_MEMORY(fromanc2_readmem_sound,fromanc2_writemem_sound)
793 MDRV_CPU_PORTS(fromanc2_readport_sound,fromanc2_writeport_sound)
794
795 MDRV_CPU_ADD(Z80,32000000/4) /* 8.00 MHz */
796 MDRV_CPU_MEMORY(fromanc2_readmem_sub,fromanc2_writemem_sub)
797 MDRV_CPU_PORTS(fromanc2_readport_sub,fromanc2_writeport_sub)
798
799 MDRV_FRAMES_PER_SECOND(60)
800 MDRV_VBLANK_DURATION(DEFAULT_60HZ_VBLANK_DURATION)
801
802 MDRV_MACHINE_INIT(fromancr)
803 MDRV_NVRAM_HANDLER(93C46)
804
805 /* video hardware */
806 MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
807 MDRV_SCREEN_SIZE(512, 512)
808 MDRV_VISIBLE_AREA(0, 352-1, 0, 240-1)
809 MDRV_GFXDECODE(fromancr_gfxdecodeinfo)
810 MDRV_PALETTE_LENGTH(4096)
811
812 MDRV_VIDEO_START(fromancr)
813 MDRV_VIDEO_UPDATE(fromanc2)
814
815 /* sound hardware */
816 MDRV_SOUND_ADD(YM2610, ym2610_interface)
817 MACHINE_DRIVER_END
818
819 static MACHINE_DRIVER_START( fromanc4 )
820
821 /* basic machine hardware */
822 MDRV_CPU_ADD(M68000,32000000/2) /* 16.00 MHz */
823 MDRV_CPU_MEMORY(fromanc4_readmem_main,fromanc4_writemem_main)
824 MDRV_CPU_VBLANK_INT(fromanc2_interrupt,1)
825
826 MDRV_CPU_ADD(Z80,32000000/4)
827 MDRV_CPU_FLAGS(CPU_AUDIO_CPU) /* 8.00 MHz */
828 MDRV_CPU_MEMORY(fromanc2_readmem_sound,fromanc2_writemem_sound)
829 MDRV_CPU_PORTS(fromanc2_readport_sound,fromanc2_writeport_sound)
830
831 MDRV_FRAMES_PER_SECOND(60)
832 MDRV_VBLANK_DURATION(DEFAULT_60HZ_VBLANK_DURATION)
833
834 MDRV_MACHINE_INIT(fromanc4)
835 MDRV_NVRAM_HANDLER(93C46)
836
837 /* video hardware */
838 MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
839 MDRV_SCREEN_SIZE(2048, 256)
840 MDRV_VISIBLE_AREA(0, 352-1, 0, 240-1)
841 MDRV_GFXDECODE(fromancr_gfxdecodeinfo)
842 MDRV_PALETTE_LENGTH(4096)
843
844 MDRV_VIDEO_START(fromanc4)
845 MDRV_VIDEO_UPDATE(fromanc2)
846
847 /* sound hardware */
848 MDRV_SOUND_ADD(YM2610, ym2610_interface)
849 MACHINE_DRIVER_END
850
851
852 /* ----------------------------------------------------------------------------*/
853 /**/
854 /* ----------------------------------------------------------------------------*/
855
856 ROM_START( fromanc2 )
857 ROM_REGION( 0x0080000, REGION_CPU1, 0 ) /* MAIN CPU*/
858 ROM_LOAD16_WORD_SWAP( "4-ic23.bin", 0x000000, 0x080000, CRC(96c90f9e) SHA1(c233e91d6967ef05cf14923273be84b17fce200f) )
859
860 ROM_REGION( 0x0010000, REGION_CPU2, 0 ) /* SOUND CPU*/
861 ROM_LOAD( "5-ic85.bin", 0x00000, 0x10000, CRC(d8f19aa3) SHA1(f980c2a021fa1995bc18b6427b361506ca8d9bf2) )
862
863 ROM_REGION( 0x0020000, REGION_CPU3, 0 ) /* SUB CPU + BANK RAM*/
864 ROM_LOAD( "3-ic1.bin", 0x00000, 0x10000, CRC(6d02090e) SHA1(08a538f3a578adbf83718e5e592c457b2ad841a6) )
865
866 ROM_REGION( 0x0480000, REGION_GFX1, ROMREGION_DISPOSE ) /* LAYER4 DATA*/
867 ROM_LOAD( "124-121.bin", 0x000000, 0x200000, CRC(0b62c9c5) SHA1(1e82398a34fb69bf2a82ef1af79dcc6a50ee53e9) )
868 ROM_LOAD( "125-122.bin", 0x200000, 0x200000, CRC(1d6dc86e) SHA1(31804465fd9a7c8a20a4bc2217a70bda7963e0ae) )
869 ROM_LOAD( "126-123.bin", 0x400000, 0x080000, CRC(9c0f7abc) SHA1(0b69d72e50e64bf02fed4a11cdf10db547953074) )
870
871 ROM_REGION( 0x0480000, REGION_GFX2, ROMREGION_DISPOSE ) /* LAYER3 DATA*/
872 ROM_LOAD( "35-47.bin", 0x000000, 0x200000, CRC(97ff0ad6) SHA1(eefa13ef07d6f665a641464089345f1e0ffa7b56) )
873 ROM_LOAD( "161-164.bin", 0x200000, 0x200000, CRC(eedbc4d1) SHA1(2f882c5a2a0311bc1fca7b8569621ffee8cdbc82) )
874 ROM_LOAD( "162-165.bin", 0x400000, 0x080000, CRC(9b546e59) SHA1(69a2fad9aa87fd07e59fed2fb19c5533a9176bb5) )
875
876 ROM_REGION( 0x0200000, REGION_GFX3, ROMREGION_DISPOSE ) /* LAYER2 DATA*/
877 ROM_LOAD( "36-48.bin", 0x000000, 0x200000, CRC(c8ee7f40) SHA1(3f043e4d93dd20f0bfb56b6345d8d60c884547db) )
878
879 ROM_REGION( 0x0100000, REGION_GFX4, ROMREGION_DISPOSE ) /* LAYER1 DATA*/
880 ROM_LOAD( "40-52.bin", 0x000000, 0x100000, CRC(dbb5062d) SHA1(d1be4d675b36ea6ebd602d5c990adcf3c029485e) )
881
882 ROM_REGION( 0x0400000, REGION_SOUND1, 0 ) /* SOUND DATA*/
883 ROM_LOAD( "ic96.bin", 0x000000, 0x200000, CRC(2f1b394c) SHA1(d95dd8231d7873328f2253eaa27374c79d87e21b) )
884 ROM_LOAD( "ic97.bin", 0x200000, 0x200000, CRC(1d1377fc) SHA1(0dae5dfcbcf4ed6662522e9404fcac0236dce04d) )
885 ROM_END
886
887 ROM_START( fromancr )
888 ROM_REGION( 0x0080000, REGION_CPU1, 0 ) /* MAIN CPU*/
889 ROM_LOAD16_WORD_SWAP( "2-ic20.bin", 0x000000, 0x080000, CRC(378eeb9c) SHA1(c1cfc7440590a229b3cdc1114428a473fea15b63) )
890
891 ROM_REGION( 0x0010000, REGION_CPU2, 0 ) /* SOUND CPU*/
892 ROM_LOAD( "5-ic73.bin", 0x0000000, 0x010000, CRC(3e4727fe) SHA1(816c0c2cd2e349900fb9cd63cbced4c621017f37) )
893
894 ROM_REGION( 0x0020000, REGION_CPU3, 0 ) /* SUB CPU + BANK RAM*/
895 ROM_LOAD( "4-ic1.bin", 0x0000000, 0x010000, CRC(6d02090e) SHA1(08a538f3a578adbf83718e5e592c457b2ad841a6) )
896
897 ROM_REGION( 0x0800000, REGION_GFX1, ROMREGION_DISPOSE ) /* BG DATA*/
898 ROM_LOAD( "ic1-3.bin", 0x0000000, 0x400000, CRC(70ad9094) SHA1(534f10478a929e9e0cc4e01573a68474fe696099) )
899 ROM_LOAD( "ic2-4.bin", 0x0400000, 0x400000, CRC(c6c6e8f7) SHA1(315e4e8ae9d1e3d68f4b2cff723d78652dc74e57) )
900
901 ROM_REGION( 0x2400000, REGION_GFX2, ROMREGION_DISPOSE ) /* FG DATA*/
902 ROM_LOAD( "ic28-13.bin", 0x0000000, 0x400000, CRC(7d7f9f63) SHA1(fe7b7a6bd9610d953f109b5ff8e38aab1c4ffac1) )
903 ROM_LOAD( "ic29-14.bin", 0x0400000, 0x400000, CRC(8ec65f31) SHA1(9b63b18d5ad8f7ec37fa950b21d547fec559d5fa) )
904 ROM_LOAD( "ic31-16.bin", 0x0800000, 0x400000, CRC(e4859534) SHA1(91fbbe0ab8119a954d76d33134290a7f7640e4ba) )
905 ROM_LOAD( "ic32-17.bin", 0x0c00000, 0x400000, CRC(20d767da) SHA1(477d86538e95583238c50e11acee3ed9ed17b75a) )
906 ROM_LOAD( "ic34-19.bin", 0x1000000, 0x400000, CRC(d62a383f) SHA1(0b11a97fa11a0b9657219d70a2ba26843b37d285) )
907 ROM_LOAD( "ic35-20.bin", 0x1400000, 0x400000, CRC(4e697f38) SHA1(66b2e9ecedfcf878defb31528611574c1711e831) )
908 ROM_LOAD( "ic37-22.bin", 0x1800000, 0x400000, CRC(6302bf5f) SHA1(bac8bead71e25e060bc75abd428dce97e5d51ef2) )
909 ROM_LOAD( "ic38-23.bin", 0x1c00000, 0x400000, CRC(c6cffa53) SHA1(41a1c31d921fa92aa285e0a874565e929dba80dc) )
910 ROM_LOAD( "ic40-25.bin", 0x2000000, 0x400000, CRC(af60bd0e) SHA1(0dc3a2e9b06626b3891b60368c3ef4d7ce1bdc6a) )
911
912 ROM_REGION( 0x0200000, REGION_GFX3, ROMREGION_DISPOSE ) /* TEXT DATA*/
913 ROM_LOAD( "ic28-29.bin", 0x0000000, 0x200000, CRC(f5e262aa) SHA1(35464d059f4814832bf5cb3bede4b8a600bc8a84) )
914
915 ROM_REGION( 0x0400000, REGION_SOUND1, 0 ) /* SOUND DATA*/
916 ROM_LOAD( "ic81.bin", 0x0000000, 0x200000, CRC(8ab6e343) SHA1(5ae28e6944edb0a4b8d0071ce48e348b6e927ca9) )
917 ROM_LOAD( "ic82.bin", 0x0200000, 0x200000, CRC(f57daaf8) SHA1(720eadf771c89d8749317b632bbc5e8ff1f6f520) )
918 ROM_END
919
920 ROM_START( fromanc4 )
921 ROM_REGION( 0x0800000, REGION_CPU1, 0 ) /* MAIN CPU + DATA*/
922 ROM_LOAD16_WORD_SWAP( "ic18.bin", 0x0000000, 0x080000, CRC(46a47839) SHA1(f1ba47b193e7e4b1c0fe8d67a76a9c452989885c) )
923 ROM_LOAD16_WORD_SWAP( "em33-m00.19", 0x0400000, 0x400000, CRC(6442534b) SHA1(a504d5cdd569ad4301f9917247531d4fdb807c76) )
924
925 ROM_REGION( 0x0020000, REGION_CPU2, 0 ) /* SOUND CPU*/
926 ROM_LOAD( "ic79.bin", 0x0000000, 0x020000, CRC(c9587c09) SHA1(e04ee8c3f8519c2b2d3c2bdade1e142974b7fcb1) )
927
928 ROM_REGION( 0x1000000, REGION_GFX1, ROMREGION_DISPOSE ) /* BG DATA*/
929 ROM_LOAD16_WORD_SWAP( "em33-c00.59", 0x0000000, 0x400000, CRC(7192bbad) SHA1(d9212860a516106c64e348c78e03091ee766ab23) )
930 ROM_LOAD16_WORD_SWAP( "em33-c01.60", 0x0400000, 0x400000, CRC(d75af19a) SHA1(3a9c4ccf1f832d0302fe115d336e33e006910a8a) )
931 ROM_LOAD16_WORD_SWAP( "em33-c02.61", 0x0800000, 0x400000, CRC(4f4d2735) SHA1(d0b59c8ed285ec9120a89b0198e414e33567729a) )
932 ROM_LOAD16_WORD_SWAP( "em33-c03.62", 0x0c00000, 0x400000, CRC(7ece6ad5) SHA1(c506fc4ea68abf57009d524a17ca487f9c568abd) )
933
934 ROM_REGION( 0x3000000, REGION_GFX2, ROMREGION_DISPOSE ) /* FG DATA*/
935 ROM_LOAD16_WORD_SWAP( "em33-b00.38", 0x0000000, 0x400000, CRC(10b8f90d) SHA1(68b8f197c7be70082f61016824098c1ae3a76b38) )
936 ROM_LOAD16_WORD_SWAP( "em33-b01.39", 0x0400000, 0x400000, CRC(3b3ea291) SHA1(bb80070a19bb1a1febda612ef260f895a8b65ce2) )
937 ROM_LOAD16_WORD_SWAP( "em33-b02.40", 0x0800000, 0x400000, CRC(de88f95b) SHA1(d84a1896a1ef3d9b7fa7de23771168e17c7a450a) )
938 ROM_LOAD16_WORD_SWAP( "em33-b03.41", 0x0c00000, 0x400000, CRC(35c1b398) SHA1(b2141cdd3b7f9e2cbfb0a048c440979b59149be5) )
939 ROM_LOAD16_WORD_SWAP( "em33-b04.42", 0x1000000, 0x400000, CRC(84b8d5db) SHA1(5999a12c24c01ee8673c2c0a9193c8800a490e6f) )
940 ROM_LOAD16_WORD_SWAP( "em33-b05.43", 0x1400000, 0x400000, CRC(b822b57c) SHA1(b50f3b73239a688101027f1c4247fed5ae59b064) )
941 ROM_LOAD16_WORD_SWAP( "em33-b06.44", 0x1800000, 0x400000, CRC(8f1b2b19) SHA1(1e08908758fed104d114fecc9977a4a0eb93fe9b) )
942 ROM_LOAD16_WORD_SWAP( "em33-b07.45", 0x1c00000, 0x400000, CRC(dd4ddcb7) SHA1(0145afa70c1a6f59eec65cf4d8572f2c00cd04a5) )
943 ROM_LOAD16_WORD_SWAP( "em33-b08.46", 0x2000000, 0x400000, CRC(3d8ce018) SHA1(43c3cb4d6c26a8209fc290fcac56297fe66209e3) )
944 ROM_LOAD16_WORD_SWAP( "em33-b09.47", 0x2400000, 0x400000, CRC(4ad79143) SHA1(9240ee46fff8f4a400a2bddaedb9acd258f37e1d) )
945 ROM_LOAD16_WORD_SWAP( "em33-b10.48", 0x2800000, 0x400000, CRC(d6ab74b2) SHA1(1dbff7e997869a00922f6471afbd76d383ec0e2c) )
946 ROM_LOAD16_WORD_SWAP( "em33-b11.49", 0x2c00000, 0x400000, CRC(4aa206b1) SHA1(afee0d8fc02e4f673ecccb9786c6d502dea5cb70) )
947
948 ROM_REGION( 0x0400000, REGION_GFX3, ROMREGION_DISPOSE ) /* TEXT DATA*/
949 ROM_LOAD16_WORD_SWAP( "em33-a00.37", 0x0000000, 0x400000, CRC(a3bd4a34) SHA1(78bd5298e83f89c738c18105c8bc809fa6a35206) )
950
951 ROM_REGION( 0x0800000, REGION_SOUND1, 0 ) /* SOUND DATA*/
952 ROM_LOAD16_WORD_SWAP( "em33-p00.88", 0x0000000, 0x400000, CRC(1c6418d2) SHA1(c66d6b35f342fcbeca5414dbb2ac038d8a2ec2c4) )
953 ROM_LOAD16_WORD_SWAP( "em33-p01.89", 0x0400000, 0x400000, CRC(615b4e6e) SHA1(a031773ed27de2263e32422a3d11118bdcb2c197) )
954 ROM_END
955
956
957 GAME( 1995, fromanc2, 0, fromanc2, fromanc2, fromanc2, ROT0, "Video System Co.", "Taisen Idol-Mahjong Final Romance 2 (Japan)" )
958 GAME( 1995, fromancr, 0, fromancr, fromanc2, fromancr, ROT0, "Video System Co.", "Taisen Mahjong FinalRomance R (Japan)" )
959 GAME( 1998, fromanc4, 0, fromanc4, fromanc4, fromanc4, ROT0, "Video System Co.", "Taisen Mahjong FinalRomance 4 (Japan)" )
960