1 /***************************************************************************
2 
3 	Goal! '92
4 
5 	driver by Pierpaolo Prazzoli
6 	and some bits by David Haywood
7 
8 ***************************************************************************/
9 
10 #include "driver.h"
11 #include "vidhrdw/generic.h"
12 
13 extern WRITE16_HANDLER( goal92_background_w );
14 extern WRITE16_HANDLER( goal92_foreground_w );
15 extern WRITE16_HANDLER( goal92_text_w );
16 extern WRITE16_HANDLER( goal92_fg_bank_w );
17 extern READ16_HANDLER( goal92_fg_bank_r );
18 
19 extern VIDEO_START( goal92 );
20 extern VIDEO_UPDATE( goal92 );
21 extern VIDEO_EOF( goal92 );
22 
23 extern data16_t *goal92_back_data,*goal92_fore_data,*goal92_textram,*goal92_scrollram16;
24 
25 static int msm5205next;
26 
WRITE16_HANDLER(goal92_sound_command_w)27 static WRITE16_HANDLER( goal92_sound_command_w )
28 {
29 	if (ACCESSING_MSB)
30 	{
31 		soundlatch_w(0, (data >> 8) & 0xff);
32 		cpu_set_irq_line(1,0,HOLD_LINE);
33 	}
34 }
35 
READ16_HANDLER(goal92_inputs_r)36 static READ16_HANDLER( goal92_inputs_r )
37 {
38 	switch(offset)
39 	{
40 		case 0:
41 			return readinputport(0);
42 		case 1:
43 			return readinputport(1);
44 		case 2:
45 			return readinputport(2);
46 		case 3:
47 			return readinputport(3);
48 		case 7:
49 			return readinputport(4);
50 
51 		default:
52 			log_cb(RETRO_LOG_DEBUG, LOGPRE "reading unhandled goal92 inputs %04x %04x\n",offset, mem_mask);
53 	}
54 
55 	return 0;
56 }
57 
MEMORY_READ16_START(goal92_readmem)58 static MEMORY_READ16_START( goal92_readmem )
59 	{ 0x000000, 0x0fffff, MRA16_ROM },
60 	{ 0x100000, 0x13ffff, MRA16_RAM },
61 	{ 0x180000, 0x18000f, goal92_inputs_r },
62 	{ 0x18001c, 0x18001d, goal92_fg_bank_r },
63 MEMORY_END
64 
65 static MEMORY_WRITE16_START( goal92_writemem )
66 	{ 0x000000, 0x0fffff, MWA16_ROM },
67 	{ 0x100000, 0x1007ff, MWA16_RAM },
68 	{ 0x100800, 0x100fff, goal92_background_w, &goal92_back_data },
69 	{ 0x101000, 0x1017ff, goal92_foreground_w, &goal92_fore_data },
70 	{ 0x101800, 0x101fff, MWA16_RAM }, /* it contains middle layer tiles for clouds, not sure if they should be displayed or not*/
71 	{ 0x102000, 0x102fff, goal92_text_w, &goal92_textram },
72 	{ 0x103000, 0x103fff, paletteram16_xBBBBBGGGGGRRRRR_word_w, &paletteram16 },
73 	{ 0x104000, 0x13ffff, MWA16_RAM },
74 	{ 0x140000, 0x1407ff, MWA16_RAM, &spriteram16, &spriteram_size },
75 	{ 0x140800, 0x140801, MWA16_NOP },
76 	{ 0x140802, 0x140803, MWA16_NOP },
77 	{ 0x180008, 0x180009, goal92_sound_command_w },
78 	{ 0x18000a, 0x18000b, MWA16_NOP },
79 	{ 0x180010, 0x180017, MWA16_RAM, &goal92_scrollram16 },
80 	{ 0x18001c, 0x18001d, goal92_fg_bank_w },
81 MEMORY_END
82 
83 /* Sound CPU */
84 
85 static WRITE_HANDLER( adpcm_control_w )
86 {
87 	int bankaddress;
88 	unsigned char *RAM = memory_region(REGION_CPU2);
89 
90 	/* the code writes either 2 or 3 in the bottom two bits */
91 	bankaddress = 0x10000 + (data & 0x01) * 0x4000;
92 	cpu_setbank(1,&RAM[bankaddress]);
93 
94 	MSM5205_reset_w(0,data & 0x08);
95 }
96 
WRITE_HANDLER(adpcm_data_w)97 static WRITE_HANDLER( adpcm_data_w )
98 {
99 	msm5205next = data;
100 }
101 
MEMORY_READ_START(sound_readmem)102 static MEMORY_READ_START( sound_readmem )
103 	{ 0x0000, 0x7fff, MRA_ROM },
104 	{ 0x8000, 0xbfff, MRA_BANK1 },
105 	{ 0xe800, 0xe800, YM2203_status_port_0_r },
106 	{ 0xe801, 0xe801, YM2203_read_port_0_r },
107 	{ 0xec00, 0xec00, YM2203_status_port_1_r },
108 	{ 0xec01, 0xec01, YM2203_read_port_1_r },
109 	{ 0xf000, 0xf7ff, MRA_RAM },
110 	{ 0xf800, 0xf800, soundlatch_r },
111 MEMORY_END
112 
113 static MEMORY_WRITE_START( sound_writemem )
114     { 0x0000, 0x7fff, MWA_ROM },
115 	{ 0x8000, 0xbfff, MWA_BANK1 },
116 	{ 0xe000, 0xe000, adpcm_control_w },
117 	{ 0xe400, 0xe400, adpcm_data_w },
118 	{ 0xe800, 0xe800, YM2203_control_port_0_w },
119 	{ 0xe801, 0xe801, YM2203_write_port_0_w },
120 	{ 0xec00, 0xec00, YM2203_control_port_1_w },
121 	{ 0xec01, 0xec01, YM2203_write_port_1_w },
122 	{ 0xf000, 0xf7ff, MWA_RAM },
123 MEMORY_END
124 
125 INPUT_PORTS_START( goal92 )
126 	PORT_START
127 	PORT_DIPNAME( 0x0007, 0x0007, "Coin A / Coin C" )
128 	PORT_DIPSETTING(      0x0000, DEF_STR( 4C_1C ) )
129 	PORT_DIPSETTING(      0x0001, DEF_STR( 3C_1C ) )
130 	PORT_DIPSETTING(      0x0002, DEF_STR( 2C_1C ) )
131 	PORT_DIPSETTING(      0x0007, DEF_STR( 1C_1C ) )
132 	PORT_DIPSETTING(      0x0006, DEF_STR( 1C_2C ) )
133 	PORT_DIPSETTING(      0x0005, DEF_STR( 1C_3C ) )
134 	PORT_DIPSETTING(      0x0003, DEF_STR( 1C_4C ) )
135 	PORT_DIPSETTING(      0x0004, DEF_STR( 1C_6C ) )
136 	PORT_DIPNAME( 0x0038, 0x0038, "Coin B / Coin D" )
137 	PORT_DIPSETTING(      0x0000, DEF_STR( 4C_1C ) )
138 	PORT_DIPSETTING(      0x0008, DEF_STR( 3C_1C ) )
139 	PORT_DIPSETTING(      0x0010, DEF_STR( 2C_1C ) )
140 	PORT_DIPSETTING(      0x0038, DEF_STR( 1C_1C ) )
141 	PORT_DIPSETTING(      0x0030, DEF_STR( 1C_2C ) )
142 	PORT_DIPSETTING(      0x0028, DEF_STR( 1C_3C ) )
143 	PORT_DIPSETTING(      0x0018, DEF_STR( 1C_4C ) )
144 	PORT_DIPSETTING(      0x0020, DEF_STR( 1C_6C ) )
145 	PORT_DIPNAME( 0x0040, 0x0040, "Starting Coin" )
146 	PORT_DIPSETTING(      0x0040, "Normal" )
147 	PORT_DIPSETTING(      0x0000, "X 2" )
148 	PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) )
149 	PORT_DIPSETTING(      0x0080, DEF_STR( Off ) )
150 	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
151 	PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Unknown ) )
152 	PORT_DIPSETTING(      0x0100, DEF_STR( Off ) )
153 	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
154 	PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) )
155 	PORT_DIPSETTING(      0x0200, DEF_STR( Off ) )
156 	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
157 	PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) )
158 	PORT_DIPSETTING(      0x0400, DEF_STR( Off ) )
159 	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
160 	PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) )
161 	PORT_DIPSETTING(      0x0800, DEF_STR( Off ) )
162 	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
163 	PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) )
164 	PORT_DIPSETTING(      0x1000, DEF_STR( Off ) )
165 	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
166 	PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) )
167 	PORT_DIPSETTING(      0x2000, DEF_STR( Off ) )
168 	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
169 	PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) )
170 	PORT_DIPSETTING(      0x4000, DEF_STR( Off ) )
171 	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
172 	PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
173 	PORT_DIPSETTING(      0x8000, DEF_STR( Off ) )
174 	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
175 
176 	PORT_START
177 	PORT_BIT( 0x0001, IP_ACTIVE_LOW,  IPT_JOYSTICK_UP    | IPF_8WAY | IPF_PLAYER1 )
178 	PORT_BIT( 0x0002, IP_ACTIVE_LOW,  IPT_JOYSTICK_DOWN  | IPF_8WAY | IPF_PLAYER1 )
179 	PORT_BIT( 0x0004, IP_ACTIVE_LOW,  IPT_JOYSTICK_LEFT  | IPF_8WAY | IPF_PLAYER1 )
180 	PORT_BIT( 0x0008, IP_ACTIVE_LOW,  IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER1 )
181 	PORT_BIT( 0x0010, IP_ACTIVE_LOW,  IPT_BUTTON1 | IPF_PLAYER1 )
182 	PORT_BIT( 0x0020, IP_ACTIVE_LOW,  IPT_BUTTON2 | IPF_PLAYER1 )
183 	PORT_BIT( 0x0040, IP_ACTIVE_LOW,  IPT_BUTTON3 | IPF_PLAYER1 )
184 	PORT_BIT( 0x0080, IP_ACTIVE_LOW,  IPT_COIN1 )
185 	PORT_BIT( 0x0100, IP_ACTIVE_LOW,  IPT_JOYSTICK_UP    | IPF_8WAY | IPF_PLAYER2 )
186 	PORT_BIT( 0x0200, IP_ACTIVE_LOW,  IPT_JOYSTICK_DOWN  | IPF_8WAY | IPF_PLAYER2 )
187 	PORT_BIT( 0x0400, IP_ACTIVE_LOW,  IPT_JOYSTICK_LEFT  | IPF_8WAY | IPF_PLAYER2 )
188 	PORT_BIT( 0x0800, IP_ACTIVE_LOW,  IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER2 )
189 	PORT_BIT( 0x1000, IP_ACTIVE_LOW,  IPT_BUTTON1 | IPF_PLAYER2 )
190 	PORT_BIT( 0x2000, IP_ACTIVE_LOW,  IPT_BUTTON2 | IPF_PLAYER2 )
191 	PORT_BIT( 0x4000, IP_ACTIVE_LOW,  IPT_BUTTON3 | IPF_PLAYER2 )
192 	PORT_BIT( 0x8000, IP_ACTIVE_LOW,  IPT_COIN2 )
193 
194 	PORT_START
195 	PORT_BIT( 0x0001, IP_ACTIVE_LOW,  IPT_JOYSTICK_UP    | IPF_8WAY | IPF_PLAYER3 )
196 	PORT_BIT( 0x0002, IP_ACTIVE_LOW,  IPT_JOYSTICK_DOWN  | IPF_8WAY | IPF_PLAYER3 )
197 	PORT_BIT( 0x0004, IP_ACTIVE_LOW,  IPT_JOYSTICK_LEFT  | IPF_8WAY | IPF_PLAYER3 )
198 	PORT_BIT( 0x0008, IP_ACTIVE_LOW,  IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER3 )
199 	PORT_BIT( 0x0010, IP_ACTIVE_LOW,  IPT_BUTTON1 | IPF_PLAYER3 )
200 	PORT_BIT( 0x0020, IP_ACTIVE_LOW,  IPT_BUTTON2 | IPF_PLAYER3 )
201 	PORT_BIT( 0x0040, IP_ACTIVE_LOW,  IPT_BUTTON3 | IPF_PLAYER3 )
202 	PORT_BIT( 0x0080, IP_ACTIVE_LOW,  IPT_COIN3 )
203 	PORT_BIT( 0x0100, IP_ACTIVE_LOW,  IPT_JOYSTICK_UP    | IPF_8WAY | IPF_PLAYER4 )
204 	PORT_BIT( 0x0200, IP_ACTIVE_LOW,  IPT_JOYSTICK_DOWN  | IPF_8WAY | IPF_PLAYER4 )
205 	PORT_BIT( 0x0400, IP_ACTIVE_LOW,  IPT_JOYSTICK_LEFT  | IPF_8WAY | IPF_PLAYER4 )
206 	PORT_BIT( 0x0800, IP_ACTIVE_LOW,  IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER4 )
207 	PORT_BIT( 0x1000, IP_ACTIVE_LOW,  IPT_BUTTON1 | IPF_PLAYER4 )
208 	PORT_BIT( 0x2000, IP_ACTIVE_LOW,  IPT_BUTTON2 | IPF_PLAYER4 )
209 	PORT_BIT( 0x4000, IP_ACTIVE_LOW,  IPT_BUTTON3 | IPF_PLAYER4 )
210 	PORT_BIT( 0x8000, IP_ACTIVE_LOW,  IPT_COIN4 )
211 
212 	PORT_START
213 	PORT_BIT( 0x0001, IP_ACTIVE_LOW,  IPT_START1 )
214 	PORT_BIT( 0x0002, IP_ACTIVE_LOW,  IPT_START2 )
215 	PORT_BIT( 0x00fc, IP_ACTIVE_LOW,  IPT_UNKNOWN ) /* unused?*/
216 	PORT_BIT( 0x0100, IP_ACTIVE_LOW,  IPT_START3 )
217 	PORT_BIT( 0x0200, IP_ACTIVE_LOW,  IPT_START4 )
218 	PORT_BIT( 0xfc00, IP_ACTIVE_LOW,  IPT_UNKNOWN ) /* unused?*/
219 
220 	PORT_START
221 	PORT_DIPNAME( 0x0003, 0x0003, DEF_STR( Difficulty ) )
222 	PORT_DIPSETTING(      0x0002, "Easy" )
223 	PORT_DIPSETTING(	  0x0003, "Normal" )
224 	PORT_DIPSETTING(      0x0001, "Hard" )
225 	PORT_DIPSETTING(      0x0000, "Hardest" )
226 	PORT_DIPNAME( 0x000c, 0x0000, "Players / Coin Mode" )
227 	PORT_DIPSETTING(      0x0000, "4 Players / 1 Coin Slot" )
228 	PORT_DIPSETTING(      0x0004, "4 Players / 4 Coin Slots" )
229 	PORT_DIPSETTING(      0x0008, "4 Players / 2 Coin Slots" )
230 	PORT_DIPSETTING(      0x000c, "2 Players" )
231 	PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Demo_Sounds ) )
232 	PORT_DIPSETTING(	  0x0000, DEF_STR( Off ) )
233 	PORT_DIPSETTING(      0x0010, DEF_STR( On ) )
234 	PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Service_Mode ) )
235 	PORT_DIPSETTING(      0x0020, DEF_STR( Off ) )
236 	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
237 	PORT_DIPNAME( 0xffc0, 0xffc0, DEF_STR( Unused ) )
238 	PORT_DIPSETTING(      0xffc0, DEF_STR( Off ) )
239 	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
240 INPUT_PORTS_END
241 
242 /* handler called by the 2203 emulator when the internal timers cause an IRQ */
243 static void irqhandler(int irq)
244 {
245 	cpu_set_nmi_line(1,irq ? ASSERT_LINE : CLEAR_LINE);
246 }
247 
248 static struct YM2203interface ym2203_interface =
249 {
250 	2,			/* 2 chips */
251 	2500000/2,
252 	{ YM2203_VOL(35,35), YM2203_VOL(35,35) },
253 	{ 0 },
254 	{ 0 },
255 	{ 0 },
256 	{ 0 },
257 	{ irqhandler }
258 };
259 
260 static struct OKIM6295interface okim6295_interface =
261 {
262 	1,
263 	{ 2500000 },
264 	{ REGION_SOUND1 },
265 	{ 100 }
266 };
267 
goal92_adpcm_int(int data)268 static void goal92_adpcm_int(int data)
269 {
270 	static int toggle = 0;
271 
272 	MSM5205_data_w (0,msm5205next);
273 	msm5205next>>=4;
274 
275 	toggle ^= 1;
276 	if(toggle)
277 	    cpu_set_nmi_line(1, PULSE_LINE );
278 }
279 
280 static struct MSM5205interface msm5205_interface =
281 {
282 	1,						/* 1 chip */
283 	384000, 				/* 400KHz */
284 	{ goal92_adpcm_int },	/* interrupt function */
285 	{ MSM5205_S96_4B },		/* 4KHz 4-bit */
286 	{ 20 }					/* volume */
287 };
288 
289 
290 static struct GfxLayout layout_8x8x4 =
291 {
292 	8,8,
293 	RGN_FRAC(1,4),
294 	4,
295 	{ RGN_FRAC(3,4),RGN_FRAC(2,4),RGN_FRAC(1,4),RGN_FRAC(0,4) },
296 	{ STEP8(0,1) },
297 	{ STEP8(0,8) },
298 	8*8
299 };
300 
301 static struct GfxLayout layout_16x16x4 =
302 {
303 	16,16,
304 	RGN_FRAC(1,4),
305 	4,
306 	{ RGN_FRAC(3,4),RGN_FRAC(2,4),RGN_FRAC(1,4),RGN_FRAC(0,4) },
307 	{ STEP8(0,1), STEP8(8*8*2,1) },
308 	{ STEP8(0,8), STEP8(8*8*1,8) },
309 	16*16
310 };
311 
312 static struct GfxLayout layout_16x16x4_2 =
313 {
314 	16,16,
315 	RGN_FRAC(1,1),
316 	4,
317 	{ 0,1,2,3 },
318 	{ 4,0,12,8,20,16,28,24,
319 		512+4,512+0,512+12,512+8,512+20,512+16,512+28,512+24 },
320 	{ 0*32,1*32,2*32,3*32,4*32,5*32,6*32,7*32,
321 		256+0*32,256+1*32,256+2*32,256+3*32,256+4*32,256+5*32,256+6*32,256+7*32 },
322 	1024
323 };
324 
325 static struct GfxDecodeInfo goal92_gfxdecodeinfo[] =
326 {
327 	{ REGION_GFX1, 0, &layout_16x16x4,		   0*16, 8*16 }, /* Sprites*/
328 	{ REGION_GFX2, 0, &layout_8x8x4,		  48*16,   16 }, /* Text Layer*/
329 	{ REGION_GFX2, 0, &layout_16x16x4,		   0*16,   16 }, /* BG Layer*/
330 	{ REGION_GFX2, 0, &layout_16x16x4,		  16*16,   16 }, /* Mid Layer*/
331 	{ REGION_GFX2, 0, &layout_16x16x4,		  32*16,   16 }, /* FG Layer*/
332 	{ -1 } /* end of array */
333 };
334 
335 static struct GfxDecodeInfo cupsocbl_gfxdecodeinfo[] =
336 {
337 	{ REGION_GFX1, 0, &layout_16x16x4_2,	   0*16, 8*16 }, /* Sprites*/
338 	{ REGION_GFX2, 0, &layout_8x8x4,	      48*16,   16 }, /* Text Layer*/
339 	{ REGION_GFX3, 0, &layout_16x16x4,	       0*16,   16 }, /* BG Layer*/
340 	{ REGION_GFX4, 0, &layout_16x16x4,	      16*16,   16 }, /* Mid Layer*/
341 	{ REGION_GFX4, 0, &layout_16x16x4,  	  32*16,   16 }, /* FG Layer*/
342 	{ -1 } /* end of array */
343 };
344 
345 static MACHINE_DRIVER_START( goal92 )
346 
347 	/* basic machine hardware */
348 	MDRV_CPU_ADD(M68000,12000000)
349 	MDRV_CPU_MEMORY(goal92_readmem,goal92_writemem)
350 	MDRV_CPU_VBLANK_INT(irq6_line_hold,1) /* VBL */
351 
352 	MDRV_CPU_ADD(Z80, 2500000)
353 	MDRV_CPU_FLAGS(CPU_AUDIO_CPU)
354 	MDRV_CPU_MEMORY(sound_readmem,sound_writemem)
355 								/* IRQs are triggered by the main CPU */
356 
357 	MDRV_FRAMES_PER_SECOND(60)
358 	MDRV_VBLANK_DURATION(DEFAULT_60HZ_VBLANK_DURATION)
359 
360 	/* video hardware */
361 	MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
362 	MDRV_SCREEN_SIZE(40*8, 32*8)
363 	MDRV_VISIBLE_AREA(0*8, 40*8-1, 1*8, 31*8-1) // black border at bottom is a game bug...
364 	MDRV_GFXDECODE(goal92_gfxdecodeinfo)
365 	MDRV_PALETTE_LENGTH(128*16)
366 
367 	MDRV_VIDEO_START(goal92)
368 	MDRV_VIDEO_UPDATE(goal92)
369 	MDRV_VIDEO_EOF(goal92)
370 
371 	/* sound hardware */
372 	MDRV_SOUND_ADD(YM2203, ym2203_interface)
373 	MDRV_SOUND_ADD(MSM5205, msm5205_interface)
374 MACHINE_DRIVER_END
375 
376 static MACHINE_DRIVER_START( cupsocbl )
377 
378 	/* basic machine hardware */
379 	MDRV_CPU_ADD(M68000,12000000)
380 	MDRV_CPU_MEMORY(goal92_readmem,goal92_writemem)
381 	MDRV_CPU_VBLANK_INT(irq4_line_hold,1) /* VBL */
382 
383 	MDRV_CPU_ADD(Z80, 2500000)
384 	MDRV_CPU_FLAGS(CPU_AUDIO_CPU)
385 	MDRV_CPU_MEMORY(sound_readmem,sound_writemem)
386 								/* IRQs are triggered by the main CPU */
387 
388 	MDRV_FRAMES_PER_SECOND(60)
389 	MDRV_VBLANK_DURATION(DEFAULT_60HZ_VBLANK_DURATION)
390 
391 	/* video hardware */
392 	MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
393 	MDRV_SCREEN_SIZE(40*8, 32*8)
394 	MDRV_VISIBLE_AREA(0*8, 40*8-1, 2*8, 30*8-1)
395 	MDRV_GFXDECODE(cupsocbl_gfxdecodeinfo)
396 	MDRV_PALETTE_LENGTH(128*16)
397 
398 	MDRV_VIDEO_START(goal92)
399 	MDRV_VIDEO_UPDATE(goal92)
400 	MDRV_VIDEO_EOF(goal92)
401 
402 	/* sound hardware */
403 	MDRV_SOUND_ADD(OKIM6295, okim6295_interface)
404 MACHINE_DRIVER_END
405 
406 /*
407 
408 Goal '92 (bootleg of Seibu Cup Soccer)
409 
410 
411 PCB Layout
412 
413 ----------------------------------------------------------
414 | 400KHz  Z80                 10MHz            68000     |
415 |   6116   1                                   2   3     |
416 |  YM2203           6116                    681000 681000|
417 | 5205              6116                                 |
418 |                   6116                                 |
419 | 10MHz             6116                       24.0MHz   |
420 |                         6264                           |
421 |                         6264        TPC1020            |
422 |                                                        |
423 |     6116                                               |
424 |                                                        |
425 |     6116                                               |
426 |                                                        |
427 | DSW1  DSW3                                             |
428 |                                                        |
429 | DSW2                                                   |
430 |                             4             8            |
431 |                   6116      5             9            |
432 |                             6             10           |
433 |                   6116      7             11           |
434 |                                                        |
435 ----------------------------------------------------------
436 
437 Notes:
438 Z80 clock: 2.51MHz
439 68k clock: 12.0MHz
440     VSync: 60Hz
441     HSync: 15.27kHz
442 
443 */
444 
445 ROM_START( goal92 )
446 	ROM_REGION( 0x100000, REGION_CPU1, 0 ) /* 68000 Code */
447 	ROM_LOAD16_BYTE( "2.bin", 0x00000, 0x80000, CRC(db0a6c7c) SHA1(b609db7806b99bc921806d8b3e5e515b4651c375) )
448 	ROM_LOAD16_BYTE( "3.bin", 0x00001, 0x80000, CRC(e4c45dee) SHA1(542749bd1ff51220a151fe66acdadac83df8f0ee) )
449 
450 	ROM_REGION( 0x18000, REGION_CPU2, 0 )	/* Z80 code */
451 	ROM_LOAD( "1.bin",        0x00000, 0x8000, CRC(3d317622) SHA1(ae4e8c5247bc215a2769786cb8639bce2f80db22) )
452 	ROM_CONTINUE(             0x10000, 0x8000 ) /* banked at 8000-bfff */
453 
454 	ROM_REGION( 0x100000, REGION_GFX1, ROMREGION_DISPOSE )
455 	ROM_LOAD( "6.bin",        0x000000, 0x040000, CRC(83cadc8f) SHA1(1d3309750347c5d6d661f5cf452235e5a83a7483) )
456 	ROM_LOAD( "7.bin",        0x040000, 0x040000, CRC(067e10fc) SHA1(9831b8dc9b8efa6f7797b2946ee5be03fb36de7b) )
457 	ROM_LOAD( "5.bin",        0x080000, 0x040000, CRC(9a390af2) SHA1(8bc46f8cc7823b8caf381866bea016ebfad9d5d3) )
458 	ROM_LOAD( "4.bin",        0x0c0000, 0x040000, CRC(69b118d5) SHA1(80ab6f03e1254ba47c27299ce11559b244a024ad) )
459 
460 	ROM_REGION( 0x200000, REGION_GFX2, ROMREGION_DISPOSE )
461 	ROM_LOAD( "11.bin",       0x000000, 0x080000, CRC(5701e626) SHA1(e6915714e9ca90be8fa8ab1bf7fd1f23a83fb82c) )
462 	ROM_LOAD( "10.bin",       0x080000, 0x080000, CRC(ebb359cc) SHA1(b2f724ef7a91fca0ff0b7d7abe1c37816464b37d) )
463 	ROM_LOAD( "9.bin",        0x100000, 0x080000, CRC(c9f0dd07) SHA1(d70cdb24b7df521255b5841f01dd9e8344ab7bdb) )
464 	ROM_LOAD( "8.bin",        0x180000, 0x080000, CRC(aeab3534) SHA1(af91238f412bfcff3a52232278d81276584614a7) )
465 ROM_END
466 
467 /*
468 
469 Seibu Cup Soccer - Seibu - Bootleg
470 
471 2 boards
472 
473 1st board
474 
475 (snd)
476 1 x z80
477 1 x oki 6295
478 sc_01 (prg)
479 sc_02 and sc_03 (data)
480 
481 (prg)
482 1 x 68000
483 sc_04 and sc_05
484 
485 (gfx)
486 2 x ti tpc1020
487 from sc_06 to sc_11
488 
489 2nd board
490 
491 (gfx)
492 1 x actel pl84c
493 from sc_12 to sc_15
494 
495 */
496 
497 ROM_START( cupsocbl )
498 	ROM_REGION( 0x100000, REGION_CPU1, 0 ) /* 68000 Code */
499 	ROM_LOAD16_BYTE( "sc_04.bin", 0x00001, 0x80000, CRC(22566087) SHA1(4392f46ca50cc9947823a5190aa25f5e9654aa0d) )
500 	ROM_LOAD16_BYTE( "sc_05.bin", 0x00000, 0x80000, CRC(2f977dff) SHA1(4d8d6e7d06ce17bb7292072965911f8b1f1067e2) )
501 
502 	ROM_REGION( 0x10000, REGION_CPU2, 0 )	/* Z80 code */
503 	ROM_LOAD( "sc_01.bin",    0x000000, 0x08000, CRC(cea39d6d) SHA1(f0b79c03ffafdd1e57673d6d4836becbe415110b) )
504 	ROM_CONTINUE(			  0x000000, 0x08000 )
505 
506 	ROM_REGION( 0x100000, REGION_GFX1, ROMREGION_DISPOSE )
507 	ROM_LOAD( "sc_07.bin", 0x000000, 0x80000, CRC(dcb29d01) SHA1(72b4234622605f0ab03f21fdb6a61c6dac36000d) )
508 	ROM_LOAD( "sc_06.bin", 0x080000, 0x80000, CRC(2dc70e05) SHA1(f1d0beb8428a7e1d7c7818e6719abdc543b2fa80) )
509 
510 	ROM_REGION( 0x020000, REGION_GFX2, ROMREGION_DISPOSE ) /* text layer ?*/
511 	ROM_LOAD( "sc_13.bin",    0x000000, 0x010000, CRC(229bddd8) SHA1(0924bf29db9c5a970546f154e7752697fdce6a58) )
512 	ROM_LOAD( "sc_12.bin",    0x010000, 0x010000, CRC(dabfa826) SHA1(0db587c846755491b169ef7751ba8e7cdc2607e6) )
513 
514 	ROM_REGION( 0x200000, REGION_GFX3, ROMREGION_DISPOSE ) /* background ?*/
515 	ROM_LOAD( "sc_08.bin",    0x000000, 0x080000, CRC(637120f3) SHA1(b4b2ad192e46ff80d4cb440d7fb6dac215a353ed) )
516 	ROM_LOAD( "sc_09.bin",    0x080000, 0x080000, CRC(695b6342) SHA1(dfccb43789021ba2568b9284ae61e64f7f89b152) )
517 	ROM_LOAD( "sc_10.bin",    0x100000, 0x080000, CRC(27e172b8) SHA1(ed86db2f42c8061607d46f2407b0130aaf692a02) )
518 	ROM_LOAD( "sc_11.bin",    0x180000, 0x080000, CRC(0cd5ca5e) SHA1(a59665e543e9383355de2576e6693348ec356591) )
519 
520 	ROM_REGION( 0x100000, REGION_GFX4, ROMREGION_DISPOSE ) /* foreground ?*/
521 	ROM_LOAD( "sc_14.bin",    0x000000, 0x080000, CRC(566086c2) SHA1(b7d09ce978f99ecc0d1975b31330ed49317701d5) )
522 	ROM_LOAD( "sc_15.bin",    0x080000, 0x080000, CRC(8fd87e65) SHA1(acc9fd0289fa9ab60bec16d3e642039380e5180a) )
523 
524 	ROM_REGION( 0x020000, REGION_SOUND1, 0 )	/* ADPCM samples */
525 	ROM_LOAD( "sc_02.bin",    0x000000, 0x020000, CRC(a70d4f03) SHA1(c2482e624c8a828a94206a36d10c1021ad8ca1d0) )
526 
527 	ROM_REGION( 0x080000, REGION_USER1, 0 ) /* sound related ?*/
528 	ROM_LOAD( "sc_03.bin",    0x000000, 0x080000, CRC(6e254d12) SHA1(857779dbd276b688201a8ea3afd5817e38acad2e) )
529 ROM_END
530 
531 GAME(  1992, goal92,   cupsoc, goal92,   goal92, 0, ROT0, "bootleg", "Goal '92" )
532 GAMEX( 1992, cupsocbl, cupsoc, cupsocbl, goal92, 0, ROT0, "bootleg", "Seibu Cup Soccer (bootleg)", GAME_NOT_WORKING | GAME_NO_SOUND )
533