1 /***************************************************************************
2
3 Several Namco games from 1982-1985
4
5 driver by Nicola Salmoria
6 based on previous work by Aaron Giles, Manuel Abadia
7
8 The games supported by this driver all run on similar hardware.
9 They can be divided in three "families":
10 1) Super Pacman, the first version of the board. Pac & Pal and Grobda run on
11 seemingly identical hardware.
12 The hardware consists of two 6809, and several Namco custom ICs that provide
13 a static tilemap and 2bpp sprites.
14 Grobda is the only Namco game of this era that has speech (just a short
15 sample). At this time, it is still unknown whether the DAC used to play
16 the speech is part of the standard Namco sound hardware, or a quick addition
17 to the base board.
18 2) Phozon. This game runs on an unique board: the large number of sprites on
19 screen at the same time required a 3rd 6809 to help with the calculations.
20 The sprite hardware is also different from Super Pacman, featuring 8x8 sprites.
21 Despite the hardware differences, the memory map is almost identical to
22 Super Pacman, and that's why it's included in this driver.
23 There is no information about the custom ICs used by this board. The video
24 section is probably more similar to Gaplus than to Supr Pacman: the sprite
25 generator might be a 21XX (though Gaplus doesn't use 8x8 sprites), and the
26 00XX and 04XX address generators are probably replaced by the single CUS20
27 (which also handles the flip screen flag).
28 3) Mappy runs on a revised design of the Super Pacman board, where the 00XX
29 custom is replaced by a 17XX, which provides a scrolling tilemap. The larger
30 tilemap requires more RAM, so the memory map is slightly different. Also,
31 sprites are 4bpp instead of 2bpp, so the final stage of video generation is
32 a little different as well, though the custom ICs are still the same.
33 Dig Dig II and Motos are almost the same, apart from larger ROMs.
34 Tower of Druaga also has 4x the amount of sprite color combinations so it's
35 the most different of the four.
36
37
38 Custom ICs (Super Pacman and Mappy):
39 -----------------------------------
40 CPU board:
41 07XX clock divider
42 15XX sound control
43 16XX I/O control
44 5xXX(x2) I/O
45 99XX sound volume (only Mappy, Super Pacman uses a standard LS273)
46
47 Video board:
48 00XX tilemap address generator with scrolling capability (only Super Pacman)
49 04XX sprite address generator
50 07XX clock divider
51 11XX gfx data shifter and mixer (16-bit in, 4-bit out) [1]
52 12XX sprite generator
53 17XX tilemap address generator with scrolling capability (only Mappy)
54
55 [1] Used differently: in Super Pacman it merges the 2bpp tilemap with the 2bpp
56 sprites; in Mappy it handles the 4bpp sprites, while the tilemap is handled by
57 standard LS components.
58
59 The I/O interface chips vary from game to game (see machine/namcoio.c)
60
61
62 Super Pac-Man memory map
63 ------------------------
64 Pac & Pal is the same. Grobda appears to have a DAC hacked in.
65 Note: Part of the address decoding is done by PALs (SPC-5 and SPC-6) so the
66 tables are inferred by program behaviour.
67
68 MAIN CPU:
69
70 Address Dir Data Name Description
71 ---------------- --- -------- --------- -----------------------
72 00000xxxxxxxxxxx R/W xxxxxxxx RAM 2E tilemap RAM
73 00001xxxxxxxxxxx R/W xxxxxxxx RAM 2H work RAM
74 000011111xxxxxxx R/W xxxxxxxx portion holding sprite registers (sprite number & color)
75 00010xxxxxxxxxxx R/W xxxxxxxx RAM 2K work RAM
76 000101111xxxxxxx R/W xxxxxxxx portion holding sprite registers (x, y)
77 00011xxxxxxxxxxx R/W xxxxxxxx RAM 2J work RAM
78 000111111xxxxxxx R/W xxxxxxxx portion holding sprite registers (x msb, flip, size)
79 00100----------- R/W -------x FLIP screen flip (reading this address sets the bit, done by pacnpal)
80 01000-xxxxxxxxxx R/W xxxxxxxx SOUND RAM (shared with sound CPU)
81 01000-0000xxxxxx R/W xxxxxxxx portion holding the sound registers
82 01001-----xxxxxx R/W ----xxxx FBIT I/O chips [1]
83 01010-------000x r/W -------- INT ON 2 sound CPU irq enable (data is in A0)
84 01010-------001x r/W -------- INT ON main CPU irq enable (data is in A0)
85 01010-------010x W -------- n.c.
86 01010-------011x r/W -------- SOUND ON sound enable (data is in A0)
87 01010-------100x r/W -------- 4 RESET reset I/O chips (data is in A0)
88 01010-------101x r/W -------- SUB RESET reset sound CPU (data is in A0)
89 01010-------110x W -------- n.c.
90 01010-------111x W -------- n.c.
91 10000----------- R/W -------- WDR Watch Dog Reset
92 101xxxxxxxxxxxxx R xxxxxxxx ROM 1D program ROM
93 110xxxxxxxxxxxxx R xxxxxxxx ROM 1C program ROM
94 111xxxxxxxxxxxxx R xxxxxxxx ROM 1B program ROM
95
96 [1] only half of that space is actually used, because only 2 of the possible 4 I/O chips are present
97
98
99 SOUND CPU:
100
101 Address Dir Data Name Description
102 ---------------- --- -------- --------- -----------------------
103 000---xxxxxxxxxx R/W xxxxxxxx RAM 3K/3L work RAM (shared with main CPU)
104 000---0000xxxxxx R/W xxxxxxxx portion holding the sound registers
105 001---------000x W -------- INT ON 2 sound CPU irq enable (data is in A0)
106 001---------001x W -------- INT ON main CPU irq enable (data is in A0)
107 001---------010x W -------- n.c.
108 001---------011x W -------- SOUND ON sound enable (data is in A0)
109 001---------100x W -------- 4 RESET reset 58XX I/O chips (data is in A0)
110 001---------101x W -------- SUB RESET reset sound CPU (data is in A0)
111 001---------110x W -------- n.c.
112 001---------111x W -------- n.c.
113 110-xxxxxxxxxxxx R xxxxxxxx ROM 1J program ROM (optional, not used by any game)
114 111xxxxxxxxxxxxx R xxxxxxxx ROM 1K program ROM (space for a 2764, but some games use a 2732)
115
116
117
118 Mappy memory map
119 ----------------
120 Tower of Druaga, Dig Dug 2, Motos are the same, with minor differences.
121 The main difference with Super Pac-Man is the increased video RAM, needed to
122 implement a scrolling tilemap.
123
124 Note: Part of the address decoding is done by PALs (SPC-5 and SPC-6, the same
125 as Super Pac-Man) so the tables are inferred by program behaviour.
126
127 MAIN CPU:
128
129 Address Dir Data Name Description
130 ---------------- --- -------- --------- -----------------------
131 00000xxxxxxxxxxx R/W xxxxxxxx RAM 2H tilemap RAM (tile number)
132 00001xxxxxxxxxxx R/W xxxxxxxx RAM 2J tilemap RAM (tile color)
133 00010xxxxxxxxxxx R/W xxxxxxxx RAM 2N work RAM
134 000101111xxxxxxx R/W xxxxxxxx portion holding sprite registers (sprite number & color)
135 00011xxxxxxxxxxx R/W xxxxxxxx RAM 2L work RAM
136 000111111xxxxxxx R/W xxxxxxxx portion holding sprite registers (x, y)
137 00100xxxxxxxxxxx R/W xxxxxxxx RAM 2M work RAM
138 001001111xxxxxxx R/W xxxxxxxx portion holding sprite registers (x msb, flip, size)
139 00111xxxxxxxx--- W -------- POSIV tilemap scroll (data is in A3-A10)
140 01000-xxxxxxxxxx R/W xxxxxxxx SOUND RAM (shared with sound CPU)
141 01000-0000xxxxxx R/W xxxxxxxx portion holding the sound registers
142 01001-----xxxxxx R/W ----xxxx FBIT I/O chips [1]
143 01010-------000x W -------- INT ON 2 sound CPU irq enable (data is in A0)
144 01010-------001x W -------- INT ON main CPU irq enable (data is in A0)
145 01010-------010x W -------- FLIP screen flip (data is in A0)
146 01010-------011x W -------- SOUND ON sound enable (to 99XX custom) (data is in A0)
147 01010-------100x W -------- 4 RESET reset I/O chips (data is in A0)
148 01010-------101x W -------- SUB RESET reset sound CPU (data is in A0)
149 01010-------110x W -------- n.c.
150 01010-------111x W -------- n.c.
151 10000----------- R/W -------- WDR Watch Dog Reset [3]
152 101xxxxxxxxxxxxx R xxxxxxxx ROM 1D program ROM [2]
153 110xxxxxxxxxxxxx R xxxxxxxx ROM 1C program ROM [2]
154 111xxxxxxxxxxxxx R xxxxxxxx ROM 1B program ROM [2]
155
156 [1] only half of that space is actually used, because only 2 of the possible 4 I/O chips are present
157 [2] Tower of Druaga, Dig Dug 2, Motos have 2 128k ROMs instead of 3 64k:
158 10xxxxxxxxxxxxxx R xxxxxxxx ROM 1D program ROM
159 11xxxxxxxxxxxxxx R xxxxxxxx ROM 1B program ROM
160 [3] Overlaps the ROM region. Dig Dug 2 reads it.
161
162 SOUND CPU:
163
164 Address Dir Data Name Description
165 ---------------- --- -------- --------- -----------------------
166 000---xxxxxxxxxx R/W xxxxxxxx RAM 3K/3L work RAM (shared with main CPU)
167 000---0000xxxxxx R/W xxxxxxxx portion holding the sound registers
168 001---------000x W -------- INT ON 2 sound CPU irq enable (data is in A0)
169 001---------001x W -------- INT ON main CPU irq enable (data is in A0)
170 001---------010x W -------- FLIP screen flip (data is in A0)
171 001---------011x W -------- SOUND ON sound enable (to 99XX custom) (data is in A0)
172 001---------100x W -------- 4 RESET reset 58XX I/O chips (data is in A0)
173 001---------101x W -------- SUB RESET reset sound CPU (data is in A0)
174 001---------110x W -------- n.c.
175 001---------111x W -------- n.c.
176 110-xxxxxxxxxxxx R xxxxxxxx ROM 1J program ROM (optional, not used by any game)
177 111xxxxxxxxxxxxx R xxxxxxxx ROM 1K program ROM
178
179
180 ----------------------------------------------------------------------------
181
182
183 Grobda
184 Namco, 1984
185
186 PCB Layout
187 ----------
188
189 Top Board
190
191 PCB Number: 22109611 (22109631)
192 |---------------------------------|
193 | 0773 1502 |
194 | PAL GR1-3.3M |
195 | 8148 VOL |
196 | 6809 8148 |
197 | |
198 | GR1-4.1K |
199 | --|
200 | |
201 | --|
202 |--| |
203 | | 2|
204 | | 2|
205 | | |
206 | | W|
207 | | 5806 A|
208 | | Y|
209 | | DSWB |
210 |--| |
211 |RESET_SW |
212 | GR2-3.1D --|
213 | |
214 | GR2-2.1C --|
215 | 5604 |
216 | GR2-1.1B |
217 | PAL 1603 DSWA |
218 | 6809 |
219 | 18.432MHz |
220 |---------------------------------|
221
222 Notes:
223 Namco Customs:
224 0773 - Clock Divider/Sync Generator
225 1502 - Sound Generator
226 5806 - I/O interface
227 5604 - I/O interface
228 1603 - I/O control
229
230 6809 clocks: 1.536MHz (both)
231 VSync: 60.606060Hz
232 22 Way Connector pinout same as Galaga, Pacland, Baraduke, Dragon Buster etc.
233 8148 - SRAM 1k x4
234 GR1-3.3M - PROM type 82S129
235 All ROMs - EPROM type 2764
236
237
238 Bottom Board
239
240 PCB Number: 22109612 (22109632)
241 |---------------------------------|
242 | 8148 |
243 | |
244 | 8148 |
245 | |
246 | GR1-4.3L |
247 | |
248 | 2016 |
249 | |
250 | |
251 |--| 2016 1204 |
252 | | |
253 | | |
254 | | 2016 |
255 | | |
256 | | |
257 | | |
258 | | 0433 GR1-5.3F |
259 |--| |
260 | |
261 | 2016 GR1-6.3E |
262 | GR1-5.4E |
263 | |
264 | 0042 1108 PAL |
265 | |
266 | GR1-6.4C |
267 | 0763 GR1-7.3C |
268 | |
269 |---------------------------------|
270
271 Notes:
272 Namco Customs:
273 1204 - Motion Object Position
274 0433 - Motion Object Controller
275 0042 - Video Ram Addresser
276 0763 - Clock Divider/Sync Generator
277 1108 - Datashift Playfield Register
278
279 8148 - SRAM 1k x4
280 2016 - SRAM 2x x8
281
282 GR1-4.3L \ PROMs type 82S129
283 GR1-5.4E /
284 GR1-6.4C - PROM type 82S123
285
286 GR1-5.3F \
287 GR1-6.3E / EPROM type 2764
288
289 GR1-7.3C - EPROM type 2732
290
291 ----------------------------------------------------------------------------
292
293
294 Easter eggs:
295 -----------
296 Abbreviations:
297 U, D, L, R: player 1 joystick directions
298 B1, B2: player 1 buttons
299 S1, S2: start buttons
300 S: service switch (the one that adds a credit, not the one to enter service mode)
301
302 - Super Pac-Man
303 - enter service mode
304 - keep B1 pressed and enter the following sequence:
305 R D D L L L L U
306 (c) (p) 1982 NAMCO LTD. will be added at the bottom of the screen.
307
308 - Pac & Pal
309 - enter service mode
310 - enter the following sequence:
311 L 9xR 5xD 6xU
312 (c) (p) 1982 NAMCO LTD. will appear on the screen.
313
314 - Phozon
315 - enter service mode
316 - enter the following sequence:
317 U U U U R D L L
318 (c) (p) 1983 NAMCO LTD. will appear on the screen.
319
320 - Mappy
321 - enter service mode
322 - keep L pressed to make the screen scroll left until the grid covers the whole screen
323 - press S 3 times
324 - keep B1 pressed and enter the following sequence:
325 4xL 6xS1 3xL S2
326 (c) 1983 NAMCO will appear on the screen.
327
328 - Mappy
329 - play the game and reach the third bonus round (the one after round 10)
330 - press B1 3 times, S1 3 times, S2 3 times
331 - after the score of the bonus round is shown, this text will be added at
332 the bottom of the screen:
333 (c) 1983 NAMCO
334 ALL RIGHTS RESERVED
335
336 - Tower of Druaga
337 - enter service mode
338 - select sound 19
339 - press S to display the grid
340 - enter the following sequence:
341 4xU D 2xR 6xL S2
342 (c) NAMCO LTD. 1984 will appear on the screen.
343
344 - Dig Dug II (New Ver. only, Old Ver. doesn't have it)
345 - enter service mode
346 - select sound 1B
347 - press S to display the grid
348 - enter the following sequence:
349 D D R L L D D L L L U U
350 - press S again
351 Some music will play and
352 DIGDUGII
353 (c) 1985
354 NAMCO LTD.
355 will be slowly drawn on the screen.
356
357 - Grobda
358 - enter service mode
359 - set coin A to 1 Coin / 1 Credit
360 - set coin B to 1 Coin / 4 Credits
361 - set Freeze to On
362 - (the above means DSW A = 11101001)
363 - set Lives to 1
364 - set Difficulty to Rank C
365 - set Demo Sounds to Off
366 - set Level Select to Off
367 - set Bonus Life to 10k
368 - (the above means DSW B = 10011100)
369 - press S to display the grid
370 - press (all together) R + B1 + S2
371 (c) NAMCO LTD. 1984 will appear on the screen.
372 To exit, press S1 or S coin
373
374 - Motos
375 - enter service mode
376 - set coinage to 3 Coins / 1 Credit
377 - set Lives to 3
378 - set Difficulty to Rank A
379 - set Bonus Life to 10k 30k 50k
380 - set Demo Sounds to Off
381 - (the above means DSW A = 11100001)
382 - press S to display the grid
383 - press (all together) R + B1 + S2
384 (c) NAMCO LTD. 1985 will appear on the screen.
385 To exit, press S1 or S
386
387
388 Notes:
389 -----
390 - Phozon: completing level 34 (the second round of world 9) causes the game to
391 crash. This seems to be the correct behaviour: there is no data for levels
392 after that one, and using the level select dip switch to jump to level 35
393 (="22") causes the same crash. I think being able to complete level 34 is a
394 bug, it should be impossible because there shouldn't be enough molecules so
395 you would play it forever.
396
397 - Phozon: if you enter service mode and press service coin something
398 like the following is written at the bottom of the screen:
399 99,99999,9999,9999,9999
400 99,99999,9999,9999,999999
401 it seems to be a counter decremented while the game is running.
402
403 - Mappy: similarly, if you enter service mode and press press
404 P1 button + service coin the following is shown:
405 99.99.999.9999.9999.9999
406 99.99.999.9999.9999.0000
407
408 - Tower of Druaga: keep button 1 pressed while pressing the start button to
409 continue the previous game; you can choose which level to start from.
410
411 - Grobda: when the Level Select dip switch is On, after inserting a coin press
412 button + start to be asked the level to start from.
413
414 - The only difference between "grobda2" and "grobda3" is a tiny patch to some
415 code related to player shoots handling. Bugfix, I guess.
416
417 - Dig Dug II: when the "freeze" dip switch is on, at the beginning of the game
418 select starting level with joystick up/down, then press button 2. During the
419 game, press start to pause/resume.
420
421
422 TODO:
423 ----
424
425 - Phozon: there appear to be two palette banks (sprites are the same, but
426 characters change from a blue background to brown background). It is not
427 known if and when the alternate palette should be used. The palette select
428 bit might be at address 500E/500F; if that's the case, it is set to 0 on
429 startup and I don't think it's ever set to 1 - which would mean the second
430 bank is not used and colors are right as they are.
431
432 - Phozon: one unknown PROM, I don't know what it could be.
433
434 ***************************************************************************/
435
436 #include "driver.h"
437 #include "vidhrdw/generic.h"
438 #include "machine/namcoio.h"
439 #include "sound/namco.h"
440
441
442 /* video functions */
443 VIDEO_START( phozon );
444 PALETTE_INIT( phozon );
445 VIDEO_UPDATE( phozon );
446
447 /* video driver data & functions */
448 extern data8_t *mappy_videoram;
449 extern data8_t *mappy_spriteram;
450 PALETTE_INIT( superpac );
451 PALETTE_INIT( mappy );
452 VIDEO_START( superpac );
453 VIDEO_START( mappy );
454 VIDEO_UPDATE( superpac );
455 VIDEO_UPDATE( mappy );
456 READ_HANDLER( superpac_videoram_r );
457 WRITE_HANDLER( superpac_videoram_w );
458 READ_HANDLER( mappy_videoram_r );
459 WRITE_HANDLER( mappy_videoram_w );
460 READ_HANDLER( mappy_spriteram_r );
461 WRITE_HANDLER( mappy_spriteram_w );
462 WRITE_HANDLER( mappy_scroll_w );
463 READ_HANDLER( superpac_flipscreen_r );
464 WRITE_HANDLER( superpac_flipscreen_w );
465
466
467
468 /***************************************************************************
469
470 Custom I/O initialization
471
472 ***************************************************************************/
473
474 static int mux;
READ_HANDLER(in0_l)475 static READ_HANDLER( in0_l ) { return readinputport(0); } // P1 joystick
READ_HANDLER(in0_h)476 static READ_HANDLER( in0_h ) { return readinputport(0) >> 4; } // P2 joystick
READ_HANDLER(in1_l)477 static READ_HANDLER( in1_l ) { return readinputport(1); } // fire and start buttons
READ_HANDLER(in1_h)478 static READ_HANDLER( in1_h ) { return readinputport(1) >> 4; } // coins
READ_HANDLER(in2)479 static READ_HANDLER( in2 ) { return readinputport(2); } // test, cocktail, optional buttons
READ_HANDLER(dipA_l)480 static READ_HANDLER( dipA_l ) { return readinputport(3); } // dips A
READ_HANDLER(dipA_h)481 static READ_HANDLER( dipA_h ) { return readinputport(3) >> 4; } // dips A
READ_HANDLER(dipB_mux)482 static READ_HANDLER( dipB_mux ) { return readinputport(4) >> (4*mux); } // dips B
READ_HANDLER(dipB_muxi)483 static READ_HANDLER( dipB_muxi ) // dips B
484 {
485 // bits are interleaved in Phozon
486 return BITSWAP8(readinputport(4),6,4,2,0,7,5,3,1) >> (4*mux);
487 }
WRITE_HANDLER(out_mux)488 static WRITE_HANDLER( out_mux ) { mux = data & 1; }
WRITE_HANDLER(out_lamps)489 static WRITE_HANDLER( out_lamps )
490 {
491 set_led_status(0,data & 1);
492 set_led_status(1,data & 2);
493 coin_lockout_global_w(data & 4);
494 coin_counter_w(0,~data & 8);
495 }
496
497 /* chip #0: player inputs, buttons, coins */
498 static struct namcoio_interface intf0 =
499 {
500 { in1_h, in0_l, in0_h, in1_l }, /* port read handlers */
501 { NULL, NULL } /* port write handlers */
502 };
503 static struct namcoio_interface intf0_lamps =
504 {
505 { in1_h, in0_l, in0_h, in1_l }, /* port read handlers */
506 { out_lamps, NULL } /* port write handlers */
507 };
508 /* chip #1: dip switches, test/cocktail, optional buttons */
509 static struct namcoio_interface intf1 =
510 {
511 { dipB_mux, dipA_l, dipA_h, in2 }, /* port read handlers */
512 { out_mux, NULL } /* port write handlers */
513 };
514 static struct namcoio_interface intf1_interleave =
515 {
516 { dipB_muxi, dipA_l, dipA_h, in2 }, /* port read handlers */
517 { out_mux, NULL } /* port write handlers */
518 };
519
520 static DRIVER_INIT( 56_56 )
521 {
522 namcoio_init(0, NAMCOIO_56XX, &intf0);
523 namcoio_init(1, NAMCOIO_56XX, &intf1);
524 }
525
526 static DRIVER_INIT( 58_56i )
527 {
528 namcoio_init(0, NAMCOIO_58XX, &intf0);
529 namcoio_init(1, NAMCOIO_56XX, &intf1_interleave);
530 }
531
532 static DRIVER_INIT( 56out_56 )
533 {
534 namcoio_init(0, NAMCOIO_56XX, &intf0_lamps);
535 namcoio_init(1, NAMCOIO_56XX, &intf1);
536 }
537
538 static DRIVER_INIT( 56out_PP )
539 {
540 namcoio_init(0, NAMCOIO_56XX, &intf0_lamps);
541 namcoio_init(1, NAMCOIO_PACNPAL, &intf1);
542 }
543
544 static DRIVER_INIT( 58_58 )
545 {
546 namcoio_init(0, NAMCOIO_58XX, &intf0);
547 namcoio_init(1, NAMCOIO_58XX, &intf1);
548 }
549
550 static DRIVER_INIT( 58_56 )
551 {
552 namcoio_init(0, NAMCOIO_58XX, &intf0);
553 namcoio_init(1, NAMCOIO_56XX, &intf1);
554 }
555
556 /***************************************************************************/
557
558
READ_HANDLER(mappy_snd_sharedram_r)559 static READ_HANDLER( mappy_snd_sharedram_r )
560 {
561 return namco_soundregs[offset];
562 }
563
WRITE_HANDLER(mappy_snd_sharedram_w)564 static WRITE_HANDLER( mappy_snd_sharedram_w )
565 {
566 if (offset < 0x40)
567 namco_15xx_w(offset,data);
568 else
569 namco_soundregs[offset] = data;
570 }
571
WRITE_HANDLER(superpac_latch_w)572 static WRITE_HANDLER( superpac_latch_w )
573 {
574 int bit = offset & 1;
575
576 switch (offset & 0x0e)
577 {
578 case 0x00: /* INT ON 2 */
579 cpu_interrupt_enable(1,bit);
580 if (!bit)
581 cpu_set_irq_line(1, 0, CLEAR_LINE);
582 break;
583
584 case 0x02: /* INT ON */
585 cpu_interrupt_enable(0,bit);
586 if (!bit)
587 cpu_set_irq_line(0, 0, CLEAR_LINE);
588 break;
589
590 case 0x04: /* n.c. */
591 break;
592
593 case 0x06: /* SOUND ON */
594 mappy_sound_enable(bit);
595 break;
596
597 case 0x08: /* 4 RESET */
598 namcoio_set_reset_line(0, bit ? CLEAR_LINE : ASSERT_LINE);
599 namcoio_set_reset_line(1, bit ? CLEAR_LINE : ASSERT_LINE);
600 break;
601
602 case 0x0a: /* SUB RESET */
603 cpu_set_reset_line(1, bit ? CLEAR_LINE : ASSERT_LINE);
604 break;
605
606 case 0x0c: /* n.c. */
607 break;
608
609 case 0x0e: /* n.c. */
610 break;
611 }
612 }
613
WRITE_HANDLER(phozon_latch_w)614 static WRITE_HANDLER( phozon_latch_w )
615 {
616 int bit = offset & 1;
617
618 switch (offset & 0x0e)
619 {
620 case 0x00:
621 cpu_interrupt_enable(1,bit);
622 if (!bit)
623 cpu_set_irq_line(1, 0, CLEAR_LINE);
624 break;
625
626 case 0x02:
627 cpu_interrupt_enable(0,bit);
628 if (!bit)
629 cpu_set_irq_line(0, 0, CLEAR_LINE);
630 break;
631
632 case 0x04:
633 cpu_interrupt_enable(2,bit);
634 if (!bit)
635 cpu_set_irq_line(2, 0, CLEAR_LINE);
636 break;
637
638 case 0x06:
639 mappy_sound_enable(bit);
640 break;
641
642 case 0x08:
643 namcoio_set_reset_line(0, bit ? CLEAR_LINE : ASSERT_LINE);
644 namcoio_set_reset_line(1, bit ? CLEAR_LINE : ASSERT_LINE);
645 break;
646
647 case 0x0a:
648 cpu_set_reset_line(1, bit ? CLEAR_LINE : ASSERT_LINE);
649 break;
650
651 case 0x0c:
652 cpu_set_reset_line(2, bit ? CLEAR_LINE : ASSERT_LINE);
653 break;
654
655 case 0x0e:
656 break;
657 }
658 }
659
WRITE_HANDLER(mappy_latch_w)660 static WRITE_HANDLER( mappy_latch_w )
661 {
662 int bit = offset & 1;
663
664 switch (offset & 0x0e)
665 {
666 case 0x00: /* INT ON 2 */
667 cpu_interrupt_enable(1,bit);
668 if (!bit)
669 cpu_set_irq_line(1, 0, CLEAR_LINE);
670 break;
671
672 case 0x02: /* INT ON */
673 cpu_interrupt_enable(0,bit);
674 if (!bit)
675 cpu_set_irq_line(0, 0, CLEAR_LINE);
676 break;
677
678 case 0x04: /* FLIP */
679 flip_screen_set(bit);
680 break;
681
682 case 0x06: /* SOUND ON */
683 mappy_sound_enable(bit);
684 break;
685
686 case 0x08: /* 4 RESET */
687 namcoio_set_reset_line(0, bit ? CLEAR_LINE : ASSERT_LINE);
688 namcoio_set_reset_line(1, bit ? CLEAR_LINE : ASSERT_LINE);
689 break;
690
691 case 0x0a: /* SUB RESET */
692 cpu_set_reset_line(1, bit ? CLEAR_LINE : ASSERT_LINE);
693 break;
694
695 case 0x0c: /* n.c. */
696 break;
697
698 case 0x0e: /* n.c. */
699 break;
700 }
701 }
702
MACHINE_INIT(superpac)703 static MACHINE_INIT( superpac )
704 {
705 int i;
706
707 /* Reset all latches */
708 for (i = 0;i < 0x10;i += 2)
709 superpac_latch_w(i,0);
710 }
711
MACHINE_INIT(phozon)712 static MACHINE_INIT( phozon )
713 {
714 int i;
715
716 /* Reset all latches */
717 for (i = 0;i < 0x10;i += 2)
718 phozon_latch_w(i,0);
719 }
720
MACHINE_INIT(mappy)721 static MACHINE_INIT( mappy )
722 {
723 int i;
724
725 /* Reset all latches */
726 for (i = 0;i < 0x10;i += 2)
727 mappy_latch_w(i,0);
728 }
729
INTERRUPT_GEN(mappy_interrupt_1)730 static INTERRUPT_GEN( mappy_interrupt_1 )
731 {
732 irq0_line_assert(); // this also checks if irq is enabled - IMPORTANT!
733 // so don't replace with cpu_set_irq_line(0, 0, ASSERT_LINE);
734
735 namcoio_set_irq_line(0,PULSE_LINE);
736 namcoio_set_irq_line(1,PULSE_LINE);
737 }
738
739
740
MEMORY_READ_START(readmem_superpac_cpu1)741 static MEMORY_READ_START( readmem_superpac_cpu1 )
742 { 0x0000, 0x07ff, superpac_videoram_r }, /* video RAM */
743 { 0x0800, 0x1fff, mappy_spriteram_r }, /* work RAM with embedded sprite RAM */
744 { 0x2000, 0x2000, superpac_flipscreen_r },
745 { 0x4000, 0x43ff, mappy_snd_sharedram_r }, /* shared RAM with the sound CPU */
746 { 0x4800, 0x4bff, namcoio_r }, /* custom I/O chips interface */
747 { 0xa000, 0xffff, MRA_ROM },
748 MEMORY_END
749
750 static MEMORY_WRITE_START( writemem_superpac_cpu1 )
751 { 0x0000, 0x07ff, superpac_videoram_w, &mappy_videoram }, /* video RAM */
752 { 0x0800, 0x1fff, mappy_spriteram_w, &mappy_spriteram }, /* work RAM with embedded sprite RAM */
753 { 0x2000, 0x2000, superpac_flipscreen_w },
754 { 0x4000, 0x43ff, mappy_snd_sharedram_w }, /* shared RAM with the sound CPU */
755 { 0x4800, 0x4bff, namcoio_w }, /* custom I/O chips interface */
756 { 0x5000, 0x500f, superpac_latch_w }, /* various control bits */
757 { 0x8000, 0x8000, watchdog_reset_w },
758 { 0xa000, 0xffff, MWA_ROM },
759 MEMORY_END
760
761
762 static MEMORY_READ_START( readmem_phozon_cpu1 )
763 { 0x0000, 0x07ff, superpac_videoram_r }, /* video RAM */
764 { 0x0800, 0x1fff, mappy_spriteram_r }, /* work RAM with embedded sprite RAM */
765 { 0x4000, 0x43ff, mappy_snd_sharedram_r }, /* shared RAM with CPU #2 */
766 { 0x4800, 0x4bff, namcoio_r }, /* custom I/O chips interface */
767 { 0x8000, 0xffff, MRA_ROM }, /* ROM */
768 MEMORY_END
769
770 static MEMORY_WRITE_START( writemem_phozon_cpu1 )
771 { 0x0000, 0x07ff, superpac_videoram_w, &mappy_videoram }, /* video RAM */
772 { 0x0800, 0x1fff, mappy_spriteram_w, &mappy_spriteram }, /* shared RAM with CPU #2/sprite RAM*/
773 { 0x4000, 0x43ff, mappy_snd_sharedram_w }, /* shared RAM with CPU #2 */
774 { 0x4800, 0x4bff, namcoio_w }, /* custom I/O chips interface */
775 { 0x5000, 0x500f, phozon_latch_w }, /* various control bits */
776 { 0x7000, 0x7000, watchdog_reset_w }, /* watchdog reset */
777 { 0x8000, 0xffff, MWA_ROM }, /* ROM */
778 MEMORY_END
779
780
781 static MEMORY_READ_START( readmem_mappy_cpu1 )
782 { 0x0000, 0x0fff, mappy_videoram_r }, /* video RAM */
783 { 0x1000, 0x27ff, mappy_spriteram_r }, /* work RAM with embedded sprite RAM */
784 { 0x4000, 0x43ff, mappy_snd_sharedram_r }, /* shared RAM with the sound CPU */
785 { 0x4800, 0x4bff, namcoio_r }, /* custom I/O chips interface */
786 { 0x8000, 0x8000, MRA_ROM }, /* watchdog reset */
787 { 0x8000, 0xffff, MRA_ROM }, /* ROM code (only a000-ffff in Mappy) */
788 MEMORY_END
789
790 static MEMORY_WRITE_START( writemem_mappy_cpu1 )
791 { 0x0000, 0x0fff, mappy_videoram_w, &mappy_videoram }, /* video RAM */
792 { 0x1000, 0x27ff, mappy_spriteram_w, &mappy_spriteram }, /* work RAM with embedded sprite RAM */
793 { 0x3800, 0x3fff, mappy_scroll_w }, /* scroll */
794 { 0x4000, 0x43ff, mappy_snd_sharedram_w }, /* shared RAM with the sound CPU */
795 { 0x4800, 0x4bff, namcoio_w }, /* custom I/O chips interface */
796 { 0x5000, 0x500f, mappy_latch_w }, /* various control bits */
797 { 0x8000, 0x8000, MWA_NOP }, /* watchdog reset */
798 { 0x8000, 0xffff, MWA_ROM }, /* ROM code (only a000-ffff in Mappy) */
799 MEMORY_END
800
801
802 static MEMORY_READ_START( readmem_superpac_cpu2 )
803 { 0x0000, 0x03ff, mappy_snd_sharedram_r }, /* shared RAM with the main CPU */
804 { 0xe000, 0xffff, MRA_ROM },
805 MEMORY_END
806
807 static MEMORY_WRITE_START( writemem_superpac_cpu2 )
808 { 0x0000, 0x03ff, mappy_snd_sharedram_w, &namco_soundregs }, /* shared RAM with the main CPU (also sound registers) */
809 { 0x2000, 0x200f, superpac_latch_w }, /* various control bits */
810 { 0xe000, 0xffff, MWA_ROM },
811 MEMORY_END
812
813
814 static MEMORY_READ_START( readmem_phozon_cpu2 )
815 { 0x0000, 0x03ff, mappy_snd_sharedram_r }, /* shared RAM with CPU #1 */
816 { 0xe000, 0xffff, MRA_ROM }, /* ROM */
817 MEMORY_END
818
819 static MEMORY_WRITE_START( writemem_phozon_cpu2 )
820 { 0x0000, 0x03ff, mappy_snd_sharedram_w, &namco_soundregs }, /* shared RAM with the main CPU + sound registers */
821 { 0xe000, 0xffff, MWA_ROM }, /* ROM */
822 MEMORY_END
823
824
825 static MEMORY_READ_START( readmem_mappy_cpu2 )
826 { 0x0000, 0x03ff, mappy_snd_sharedram_r }, /* shared RAM with the main CPU */
827 { 0xe000, 0xffff, MRA_ROM }, /* ROM code */
828 MEMORY_END
829
830 static MEMORY_WRITE_START( writemem_mappy_cpu2 )
831 { 0x0000, 0x03ff, mappy_snd_sharedram_w, &namco_soundregs }, /* shared RAM with the main CPU (also sound registers) */
832 { 0x2000, 0x200f, mappy_latch_w }, /* various control bits */
833 { 0xe000, 0xffff, MWA_ROM }, /* ROM code */
834 MEMORY_END
835
836
837 /* extra CPU only present in Phozon */
838 static MEMORY_READ_START( readmem_phozon_cpu3 )
839 { 0x0000, 0x07ff, superpac_videoram_r }, /* video RAM */
840 { 0x0800, 0x1fff, mappy_spriteram_r }, /* shared RAM with CPU #1/sprite RAM*/
841 { 0x4000, 0x43ff, mappy_snd_sharedram_r }, /* shared RAM with CPU #2 */
842 { 0xa000, 0xa7ff, MRA_RAM }, /* RAM */
843 { 0xe000, 0xffff, MRA_ROM }, /* ROM */
844 MEMORY_END
845
846 static MEMORY_WRITE_START( writemem_phozon_cpu3 )
847 { 0x0000, 0x07ff, superpac_videoram_w },/* video RAM */
848 { 0x0800, 0x1fff, mappy_spriteram_w }, /* shared RAM with CPU #1/sprite RAM*/
849 { 0x4000, 0x43ff, mappy_snd_sharedram_w }, /* shared RAM with CPU #2 */
850 { 0xa000, 0xa7ff, MWA_RAM }, /* RAM */
851 { 0xe000, 0xffff, MWA_ROM }, /* ROM */
852 MEMORY_END
853
854
855
856 INPUT_PORTS_START( superpac )
857 PORT_START /* 56XX #0 pins 22-29 */
858 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_4WAY )
859 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_4WAY )
860 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_4WAY )
861 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_4WAY )
862 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_4WAY | IPF_COCKTAIL )
863 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_4WAY | IPF_COCKTAIL )
864 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_4WAY | IPF_COCKTAIL )
865 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_4WAY | IPF_COCKTAIL )
866
867 PORT_START /* 56XX #0 pins 30-33 and 38-41 */
868 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
869 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_COCKTAIL )
870 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
871 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
872 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 )
873 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
874 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
875 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 )
876
877 PORT_START /* 56XX #1 pins 30-33 */
878 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
879 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED )
880 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Cabinet ) )
881 PORT_DIPSETTING( 0x04, DEF_STR( Upright ) )
882 PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
883 PORT_SERVICE( 0x08, IP_ACTIVE_LOW )
884
885 PORT_START /* 56XX #1 pins 22-29 */
886 PORT_DIPNAME( 0x0f, 0x0f, DEF_STR( Difficulty ) )
887 PORT_DIPSETTING( 0x0f, "Rank 0-Normal" )
888 PORT_DIPSETTING( 0x0e, "Rank 1-Easiest" )
889 PORT_DIPSETTING( 0x0d, "Rank 2" )
890 PORT_DIPSETTING( 0x0c, "Rank 3" )
891 PORT_DIPSETTING( 0x0b, "Rank 4" )
892 PORT_DIPSETTING( 0x0a, "Rank 5" )
893 PORT_DIPSETTING( 0x09, "Rank 6-Medium" )
894 PORT_DIPSETTING( 0x08, "Rank 7" )
895 PORT_DIPSETTING( 0x07, "Rank 8-Default" )
896 PORT_DIPSETTING( 0x06, "Rank 9" )
897 PORT_DIPSETTING( 0x05, "Rank A" )
898 PORT_DIPSETTING( 0x04, "Rank B-Hardest" )
899 PORT_DIPSETTING( 0x03, "Rank C-Easy Auto" )
900 PORT_DIPSETTING( 0x02, "Rank D-Auto" )
901 PORT_DIPSETTING( 0x01, "Rank E-Auto" )
902 PORT_DIPSETTING( 0x00, "Rank F-Hard Auto" )
903 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_B ) )
904 PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) )
905 PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
906 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
907 PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) )
908 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Demo_Sounds ) )
909 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
910 PORT_DIPSETTING( 0x40, DEF_STR( On ) )
911 PORT_DIPNAME( 0x80, 0x80, "Freeze" )
912 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
913 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
914
915 PORT_START /* 56XX #1 pins 38-41 multiplexed */
916 PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coin_A ) )
917 PORT_DIPSETTING( 0x00, DEF_STR( 3C_1C ) )
918 PORT_DIPSETTING( 0x02, DEF_STR( 2C_1C ) )
919 PORT_DIPSETTING( 0x07, DEF_STR( 1C_1C ) )
920 PORT_DIPSETTING( 0x01, DEF_STR( 2C_3C ) )
921 PORT_DIPSETTING( 0x06, DEF_STR( 1C_2C ) )
922 PORT_DIPSETTING( 0x05, DEF_STR( 1C_3C ) )
923 PORT_DIPSETTING( 0x04, DEF_STR( 1C_6C ) )
924 PORT_DIPSETTING( 0x03, DEF_STR( 1C_7C ) )
925 PORT_DIPNAME( 0x38, 0x38, DEF_STR( Bonus_Life ) )
926 PORT_DIPSETTING( 0x20, "30k 80k 80k" )
927 PORT_DIPSETTING( 0x30, "30k 80k" )
928 PORT_DIPSETTING( 0x18, "30k 100k 100k" )
929 PORT_DIPSETTING( 0x38, "30k 100k" )
930 PORT_DIPSETTING( 0x10, "30k 120k 120k" )
931 PORT_DIPSETTING( 0x28, "30k 120k" )
932 PORT_DIPSETTING( 0x08, "30k" )
933 PORT_DIPSETTING( 0x00, "None" )
934 /* TODO: bonus scores for 5 lives */
935 /* PORT_DIPNAME( 0x38, 0x38, DEF_STR( Bonus_Life ) )
936 PORT_DIPSETTING( 0x00, "None" )
937 PORT_DIPSETTING( 0x10, "30k" )
938 PORT_DIPSETTING( 0x08, "40k" )
939 PORT_DIPSETTING( 0x38, "30k 100k" )
940 PORT_DIPSETTING( 0x30, "30k 120k" )
941 PORT_DIPSETTING( 0x28, "40k 120k" )
942 PORT_DIPSETTING( 0x20, "30k 100k 100k" )
943 PORT_DIPSETTING( 0x18, "40k 120k 120k" ) */
944 PORT_DIPNAME( 0xc0, 0xc8, DEF_STR( Lives ) )
945 PORT_DIPSETTING( 0x88, "1" )
946 PORT_DIPSETTING( 0x48, "2" )
947 PORT_DIPSETTING( 0xc8, "3" )
948 PORT_DIPSETTING( 0x08, "5" )
949 INPUT_PORTS_END
950
951
952 INPUT_PORTS_START( pacnpal )
953 PORT_START /* 56XX #0 pins 22-29 */
954 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_4WAY )
955 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_4WAY )
956 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_4WAY )
957 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_4WAY )
958 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_4WAY | IPF_COCKTAIL )
959 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_4WAY | IPF_COCKTAIL )
960 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_4WAY | IPF_COCKTAIL )
961 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_4WAY | IPF_COCKTAIL )
962
963 PORT_START /* 56XX #0 pins 30-33 and 38-41 */
964 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
965 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_COCKTAIL )
966 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
967 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
968 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 )
969 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
970 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
971 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 )
972
973 PORT_START /* 56XX #1 pins 30-33 */
974 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
975 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED )
976 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Cabinet ) )
977 PORT_DIPSETTING( 0x04, DEF_STR( Upright ) )
978 PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
979 PORT_SERVICE( 0x08, IP_ACTIVE_LOW )
980
981 PORT_START /* ???? #1 pins ??-?? */
982 PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coin_A ) )
983 PORT_DIPSETTING( 0x00, DEF_STR( 3C_1C ) )
984 PORT_DIPSETTING( 0x02, DEF_STR( 2C_1C ) )
985 PORT_DIPSETTING( 0x07, DEF_STR( 1C_1C ) )
986 PORT_DIPSETTING( 0x01, DEF_STR( 2C_3C ) )
987 PORT_DIPSETTING( 0x06, DEF_STR( 1C_2C ) )
988 PORT_DIPSETTING( 0x05, DEF_STR( 1C_3C ) )
989 PORT_DIPSETTING( 0x04, DEF_STR( 1C_6C ) )
990 PORT_DIPSETTING( 0x03, DEF_STR( 1C_7C ) )
991 PORT_DIPNAME( 0x38, 0x30, DEF_STR( Bonus_Life ) )
992 PORT_DIPSETTING( 0x30, "20k 70k 70k" )
993 PORT_DIPSETTING( 0x20, "20k 70k" )
994 PORT_DIPSETTING( 0x18, "30k 70k" )
995 PORT_DIPSETTING( 0x28, "30k 80k 80k" )
996 PORT_DIPSETTING( 0x10, "30k 80k" )
997 PORT_DIPSETTING( 0x08, "30k 100k" )
998 PORT_DIPSETTING( 0x00, "30k" )
999 PORT_DIPSETTING( 0x38, "None" )
1000 /* TODO: bonus scores are different for 5 lives */
1001 /* PORT_DIPNAME( 0x38, 0x30, DEF_STR( Bonus_Life ) )
1002 PORT_DIPSETTING( 0x38, "None" )
1003 PORT_DIPSETTING( 0x08, "30k" )
1004 PORT_DIPSETTING( 0x00, "40k" )
1005 PORT_DIPSETTING( 0x20, "30k 80k" )
1006 PORT_DIPSETTING( 0x18, "30k 100k" )
1007 PORT_DIPSETTING( 0x10, "40k 120k" )
1008 PORT_DIPSETTING( 0x30, "30k 80k 80k" )
1009 PORT_DIPSETTING( 0x28, "40k 100k 100k" ) */
1010 PORT_DIPNAME( 0xc0, 0x40, DEF_STR( Lives ) )
1011 PORT_DIPSETTING( 0xc0, "1" )
1012 PORT_DIPSETTING( 0x80, "2" )
1013 PORT_DIPSETTING( 0x40, "3" )
1014 PORT_DIPSETTING( 0x00, "5" )
1015
1016 PORT_START /* ???? #1 pins ??-?? */
1017 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_B ) )
1018 PORT_DIPSETTING( 0x01, DEF_STR( 2C_1C ) )
1019 PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) )
1020 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
1021 PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) )
1022 PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Difficulty ) )
1023 PORT_DIPSETTING( 0x0c, "Rank A" )
1024 PORT_DIPSETTING( 0x08, "Rank B" )
1025 PORT_DIPSETTING( 0x04, "Rank C" )
1026 PORT_DIPSETTING( 0x00, "Rank D" )
1027 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unused ) )
1028 PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
1029 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1030 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unused ) )
1031 PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
1032 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1033 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) )
1034 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
1035 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1036 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) )
1037 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
1038 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1039 INPUT_PORTS_END
1040
1041
1042 INPUT_PORTS_START( grobda )
1043 PORT_START /* 58XX #0 pins 22-29 */
1044 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY )
1045 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY )
1046 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY )
1047 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY )
1048 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_COCKTAIL )
1049 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_COCKTAIL )
1050 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_COCKTAIL )
1051 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_COCKTAIL )
1052
1053 PORT_START /* 58XX #0 pins 30-33 and 38-41 */
1054 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
1055 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_COCKTAIL )
1056 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
1057 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
1058 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 )
1059 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
1060 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
1061 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 )
1062
1063 PORT_START /* 56XX #1 pins 30-33 */
1064 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON2 )
1065 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_COCKTAIL )
1066 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Cabinet ) )
1067 PORT_DIPSETTING( 0x04, DEF_STR( Upright ) )
1068 PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
1069 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) // service mode again
1070
1071 PORT_START /* 56XX #1 pins 22-29 */
1072 PORT_SERVICE( 0x01, IP_ACTIVE_LOW )
1073 PORT_DIPNAME( 0x0e, 0x08, DEF_STR( Coin_A ) )
1074 PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) )
1075 PORT_DIPSETTING( 0x02, DEF_STR( 3C_1C ) )
1076 PORT_DIPSETTING( 0x06, DEF_STR( 2C_1C ) )
1077 PORT_DIPSETTING( 0x08, DEF_STR( 1C_1C ) )
1078 PORT_DIPSETTING( 0x04, DEF_STR( 2C_3C ) )
1079 PORT_DIPSETTING( 0x0a, DEF_STR( 1C_2C ) )
1080 PORT_DIPSETTING( 0x0e, DEF_STR( 1C_3C ) )
1081 PORT_DIPSETTING( 0x0c, DEF_STR( 1C_4C ) )
1082 PORT_DIPNAME( 0x70, 0x40, DEF_STR( Coin_B ) )
1083 PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) )
1084 PORT_DIPSETTING( 0x10, DEF_STR( 3C_1C ) )
1085 PORT_DIPSETTING( 0x30, DEF_STR( 2C_1C ) )
1086 PORT_DIPSETTING( 0x40, DEF_STR( 1C_1C ) )
1087 PORT_DIPSETTING( 0x20, DEF_STR( 2C_3C ) )
1088 PORT_DIPSETTING( 0x50, DEF_STR( 1C_2C ) )
1089 PORT_DIPSETTING( 0x70, DEF_STR( 1C_3C ) )
1090 PORT_DIPSETTING( 0x60, DEF_STR( 1C_4C ) )
1091 PORT_DIPNAME( 0x80, 0x80, "Freeze" )
1092 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
1093 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1094
1095 PORT_START /* 56XX #1 pins 38-41 multiplexed */
1096 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) )
1097 PORT_DIPSETTING( 0x02, "1" )
1098 PORT_DIPSETTING( 0x01, "2" )
1099 PORT_DIPSETTING( 0x03, "3" )
1100 PORT_DIPSETTING( 0x00, "5" )
1101 PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Difficulty ) )
1102 PORT_DIPSETTING( 0x0c, "Rank A" )
1103 PORT_DIPSETTING( 0x08, "Rank B" )
1104 PORT_DIPSETTING( 0x04, "Rank C" )
1105 PORT_DIPSETTING( 0x00, "Rank D" )
1106 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Demo_Sounds ) )
1107 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1108 PORT_DIPSETTING( 0x10, DEF_STR( On ) )
1109 PORT_DIPNAME( 0x20, 0x20, "Level Select" )
1110 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1111 PORT_DIPSETTING( 0x20, DEF_STR( On ) )
1112 PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Bonus_Life ) )
1113 PORT_DIPSETTING( 0x00, "10k 50k and every 50k" )
1114 PORT_DIPSETTING( 0x40, "10k 30k" )
1115 PORT_DIPSETTING( 0xc0, "10k" )
1116 PORT_DIPSETTING( 0x80, "None" )
1117 INPUT_PORTS_END
1118
1119
1120 INPUT_PORTS_START( phozon )
1121 PORT_START /* 58XX #0 pins 22-29 */
1122 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY )
1123 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY )
1124 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY )
1125 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY )
1126 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_COCKTAIL )
1127 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_COCKTAIL )
1128 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_COCKTAIL )
1129 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_COCKTAIL )
1130
1131 PORT_START /* 58XX #0 pins 30-33 and 38-41 */
1132 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
1133 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_COCKTAIL )
1134 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
1135 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
1136 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 )
1137 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
1138 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
1139 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 )
1140
1141 PORT_START /* 56XX #1 pins 30-33 */
1142 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
1143 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED )
1144 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Cabinet ) )
1145 PORT_DIPSETTING( 0x04, DEF_STR( Upright ) )
1146 PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
1147 PORT_SERVICE( 0x08, IP_ACTIVE_LOW )
1148
1149 PORT_START /* 56XX #1 pins 22-29 */
1150 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
1151 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
1152 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1153 PORT_DIPNAME( 0x0e, 0x0e, DEF_STR( Difficulty ) )
1154 PORT_DIPSETTING( 0x0e, "Rank 0" )
1155 PORT_DIPSETTING( 0x0c, "Rank 1" )
1156 PORT_DIPSETTING( 0x0a, "Rank 2" )
1157 PORT_DIPSETTING( 0x08, "Rank 3" )
1158 PORT_DIPSETTING( 0x06, "Rank 4" )
1159 PORT_DIPSETTING( 0x04, "Rank 5" )
1160 PORT_DIPSETTING( 0x02, "Rank 6" )
1161 PORT_DIPSETTING( 0x00, "Rank 7" )
1162 // when level select is on, press P1 start during the game and move joystick to select level to jump to
1163 PORT_DIPNAME( 0x10, 0x10, "Level Select" )
1164 PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
1165 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1166 // when stop mode is on, press P1 start to pause the game
1167 PORT_DIPNAME( 0x20, 0x20, "Stop Mode" )
1168 PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
1169 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1170 PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) )
1171 PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) )
1172 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) )
1173 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
1174 PORT_DIPSETTING( 0x80, DEF_STR( 1C_2C ) )
1175
1176 PORT_START /* 56XX #1 pins 38-41 multiplexed */
1177 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) )
1178 PORT_DIPSETTING( 0x02, "1" )
1179 PORT_DIPSETTING( 0x03, "3" )
1180 PORT_DIPSETTING( 0x01, "4" )
1181 PORT_DIPSETTING( 0x00, "5" )
1182 /* TODO: these are different for 4 and 5 lives */
1183 PORT_DIPNAME( 0x1c, 0x1c, DEF_STR( Bonus_Life ) )
1184 PORT_DIPSETTING( 0x10, "20k 80k and every 80k" )
1185 PORT_DIPSETTING( 0x08, "20k 80k" )
1186 PORT_DIPSETTING( 0x18, "30k 60k" )
1187 PORT_DIPSETTING( 0x1c, "30k 100k" )
1188 // PORT_DIPSETTING( 0x14, "30k 100k" ) // repeated
1189 PORT_DIPSETTING( 0x0c, "30k 120k and every 120k" )
1190 PORT_DIPSETTING( 0x04, "30k" )
1191 PORT_DIPSETTING( 0x00, "None" )
1192 /* these are the settings for 4 and 5 lives
1193 PORT_DIPSETTING( 0x0c, "20k 80k" )
1194 PORT_DIPSETTING( 0x10, "30k 100k and every 100k" )
1195 PORT_DIPSETTING( 0x1c, "30k 100k" )
1196 PORT_DIPSETTING( 0x14, "30k 100k" ) // repeated
1197 PORT_DIPSETTING( 0x08, "30k" )
1198 PORT_DIPSETTING( 0x18, "40k 80k" )
1199 PORT_DIPSETTING( 0x04, "100k" )
1200 PORT_DIPSETTING( 0x00, "None" ) */
1201 PORT_DIPNAME( 0xe0, 0xe0, DEF_STR( Coin_A ) )
1202 PORT_DIPSETTING( 0x00, DEF_STR( 3C_1C ) )
1203 PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) )
1204 PORT_DIPSETTING( 0xe0, DEF_STR( 1C_1C ) )
1205 PORT_DIPSETTING( 0x20, DEF_STR( 2C_3C ) )
1206 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_2C ) )
1207 PORT_DIPSETTING( 0xa0, DEF_STR( 1C_3C ) )
1208 PORT_DIPSETTING( 0x80, DEF_STR( 1C_6C ) )
1209 PORT_DIPSETTING( 0x60, DEF_STR( 1C_7C ) )
1210 INPUT_PORTS_END
1211
1212
1213 INPUT_PORTS_START( mappy )
1214 PORT_START /* 58XX #0 pins 22-29 */
1215 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
1216 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_2WAY )
1217 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
1218 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_2WAY )
1219 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED )
1220 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_2WAY | IPF_COCKTAIL )
1221 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
1222 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_2WAY | IPF_COCKTAIL )
1223
1224 PORT_START /* 58XX #0 pins 30-33 and 38-41 */
1225 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
1226 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_COCKTAIL )
1227 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
1228 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
1229 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 )
1230 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
1231 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
1232 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 )
1233
1234 PORT_START /* 58XX #1 pins 30-33 */
1235 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
1236 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED )
1237 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Cabinet ) )
1238 PORT_DIPSETTING( 0x04, DEF_STR( Upright ) )
1239 PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
1240 PORT_SERVICE( 0x08, IP_ACTIVE_LOW )
1241
1242 PORT_START /* 58XX #1 pins 22-29 */
1243 /* According to the manual, 0x04, 0x08 and 0x10 should always be off, but... */
1244 PORT_DIPNAME( 0x07, 0x07, DEF_STR( Difficulty ) )
1245 PORT_DIPSETTING( 0x07, "Rank A" )
1246 PORT_DIPSETTING( 0x06, "Rank B" )
1247 PORT_DIPSETTING( 0x05, "Rank C" )
1248 PORT_DIPSETTING( 0x04, "Rank D" )
1249 PORT_DIPSETTING( 0x03, "Rank E" )
1250 PORT_DIPSETTING( 0x02, "Rank F" )
1251 PORT_DIPSETTING( 0x01, "Rank G" )
1252 PORT_DIPSETTING( 0x00, "Rank H" )
1253 PORT_DIPNAME( 0x18, 0x18, DEF_STR( Coin_B ) )
1254 PORT_DIPSETTING( 0x00, DEF_STR( 2C_1C ) )
1255 PORT_DIPSETTING( 0x18, DEF_STR( 1C_1C ) )
1256 PORT_DIPSETTING( 0x10, DEF_STR( 1C_5C) )
1257 PORT_DIPSETTING( 0x08, DEF_STR( 1C_7C ) )
1258 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Demo_Sounds ) )
1259 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1260 PORT_DIPSETTING( 0x20, DEF_STR( On ) )
1261 PORT_BITX( 0x40, 0x40, IPT_DIPSWITCH_NAME | IPF_CHEAT, "Rack Test", KEYCODE_F1, IP_JOY_NONE )
1262 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
1263 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1264 PORT_DIPNAME( 0x80, 0x80, "Freeze" )
1265 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
1266 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1267
1268 PORT_START /* 58XX #1 pins 38-41 multiplexed */
1269 PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coin_A ) )
1270 PORT_DIPSETTING( 0x01, DEF_STR( 3C_1C ) )
1271 PORT_DIPSETTING( 0x03, DEF_STR( 2C_1C ) )
1272 PORT_DIPSETTING( 0x00, DEF_STR( 3C_2C ) )
1273 PORT_DIPSETTING( 0x07, DEF_STR( 1C_1C ) )
1274 PORT_DIPSETTING( 0x02, DEF_STR( 2C_3C ) )
1275 PORT_DIPSETTING( 0x06, DEF_STR( 1C_2C ) )
1276 PORT_DIPSETTING( 0x05, DEF_STR( 1C_3C ) )
1277 PORT_DIPSETTING( 0x04, DEF_STR( 1C_6C ) )
1278 /* TODO: bonus scores are different for 5 lives */
1279 PORT_DIPNAME( 0x38, 0x38, DEF_STR( Bonus_Life ) )
1280 PORT_DIPSETTING( 0x30, "20k 60k" )
1281 PORT_DIPSETTING( 0x10, "20k 70k and every 70k" )
1282 PORT_DIPSETTING( 0x38, "20k 70k" )
1283 PORT_DIPSETTING( 0x08, "20k 80k and every 80k" )
1284 PORT_DIPSETTING( 0x28, "20k 80k" )
1285 PORT_DIPSETTING( 0x18, "20k" )
1286 PORT_DIPSETTING( 0x20, "30k 100k" )
1287 PORT_DIPSETTING( 0x00, "None" )
1288 /* those are the bonus with 5 lives
1289 PORT_DIPNAME( 0x38, 0x38, DEF_STR( Bonus_Life ) )
1290 PORT_DIPSETTING( 0x10, "30k 100k and every 100k" )
1291 PORT_DIPSETTING( 0x08, "40k 120k and every 120k" )
1292 PORT_DIPSETTING( 0x38, "30k 80k" )
1293 PORT_DIPSETTING( 0x30, "30k 100k" )
1294 PORT_DIPSETTING( 0x28, "30k 120k" )
1295 PORT_DIPSETTING( 0x20, "30k" )
1296 PORT_DIPSETTING( 0x18, "40k" )
1297 PORT_DIPSETTING( 0x00, "None" ) */
1298 PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Lives ) )
1299 PORT_DIPSETTING( 0x40, "1" )
1300 PORT_DIPSETTING( 0x00, "2" )
1301 PORT_DIPSETTING( 0xc0, "3" )
1302 PORT_DIPSETTING( 0x80, "5" )
1303 INPUT_PORTS_END
1304
1305
1306 INPUT_PORTS_START( todruaga )
1307 PORT_START /* 58XX #0 pins 22-29 */
1308 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_4WAY )
1309 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_4WAY )
1310 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_4WAY )
1311 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_4WAY )
1312 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_4WAY | IPF_COCKTAIL )
1313 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_4WAY | IPF_COCKTAIL )
1314 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_4WAY | IPF_COCKTAIL )
1315 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_4WAY | IPF_COCKTAIL )
1316
1317 PORT_START /* 58XX #0 pins 30-33 and 38-41 */
1318 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
1319 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_COCKTAIL )
1320 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
1321 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
1322 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 )
1323 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
1324 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
1325 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 )
1326
1327 PORT_START /* 56XX #1 pins 30-33 */
1328 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
1329 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED )
1330 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Cabinet ) )
1331 PORT_DIPSETTING( 0x04, DEF_STR( Upright ) )
1332 PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
1333 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) // service mode again
1334
1335 PORT_START /* 56XX #1 pins 22-29 */
1336 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) )
1337 PORT_DIPSETTING( 0x01, "1" )
1338 PORT_DIPSETTING( 0x02, "2" )
1339 PORT_DIPSETTING( 0x03, "3" )
1340 PORT_DIPSETTING( 0x00, "5" )
1341 PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coin_A ) )
1342 PORT_DIPSETTING( 0x00, DEF_STR( 3C_1C ) )
1343 PORT_DIPSETTING( 0x08, DEF_STR( 2C_1C ) )
1344 PORT_DIPSETTING( 0x0c, DEF_STR( 1C_1C ) )
1345 PORT_DIPSETTING( 0x04, DEF_STR( 1C_2C ) )
1346 PORT_DIPNAME( 0x10, 0x10, "Freeze" )
1347 PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
1348 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1349 PORT_SERVICE( 0x20, IP_ACTIVE_LOW )
1350 PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) )
1351 PORT_DIPSETTING( 0x00, DEF_STR( 3C_1C ) )
1352 PORT_DIPSETTING( 0x80, DEF_STR( 2C_1C ) )
1353 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) )
1354 PORT_DIPSETTING( 0x40, DEF_STR( 1C_2C ) )
1355
1356 PORT_START /* 56XX #1 pins 38-41 multiplexed */
1357 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unused ) )
1358 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
1359 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1360 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unused ) )
1361 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
1362 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1363 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unused ) )
1364 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
1365 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1366 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unused ) )
1367 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
1368 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1369 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unused ) )
1370 PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
1371 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1372 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unused ) )
1373 PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
1374 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1375 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) )
1376 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
1377 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1378 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) )
1379 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
1380 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1381 INPUT_PORTS_END
1382
1383
1384 INPUT_PORTS_START( digdug2 )
1385 PORT_START /* 58XX #0 pins 22-29 */
1386 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_4WAY )
1387 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_4WAY )
1388 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_4WAY )
1389 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_4WAY )
1390 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_4WAY | IPF_COCKTAIL )
1391 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_4WAY | IPF_COCKTAIL )
1392 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_4WAY | IPF_COCKTAIL )
1393 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_4WAY | IPF_COCKTAIL )
1394
1395 PORT_START /* 58XX #0 pins 30-33 and 38-41 */
1396 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
1397 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_COCKTAIL )
1398 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
1399 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
1400 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 )
1401 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
1402 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
1403 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 )
1404
1405 PORT_START /* 56XX #1 pins 30-33 */
1406 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON2 )
1407 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_COCKTAIL )
1408 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Cabinet ) )
1409 PORT_DIPSETTING( 0x04, DEF_STR( Upright ) )
1410 PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
1411 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) // service mode again
1412
1413 PORT_START /* 56XX #1 pins 22-29 */
1414 PORT_SERVICE( 0x01, IP_ACTIVE_LOW )
1415 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Lives ) )
1416 PORT_DIPSETTING( 0x02, "3" )
1417 PORT_DIPSETTING( 0x00, "5" )
1418 PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coinage ) )
1419 PORT_DIPSETTING( 0x00, DEF_STR( 3C_1C ) )
1420 PORT_DIPSETTING( 0x08, DEF_STR( 2C_1C ) )
1421 PORT_DIPSETTING( 0x0c, DEF_STR( 1C_1C ) )
1422 PORT_DIPSETTING( 0x04, DEF_STR( 1C_2C ) )
1423 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Bonus_Life ) )
1424 PORT_DIPSETTING( 0x30, "30k 80k and ..." )
1425 PORT_DIPSETTING( 0x20, "30k 100k and ..." )
1426 PORT_DIPSETTING( 0x10, "30k 120k and ..." )
1427 PORT_DIPSETTING( 0x00, "30k 150k and..." )
1428 PORT_DIPNAME( 0x40, 0x40, "Level Select" )
1429 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
1430 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1431 PORT_DIPNAME( 0x80, 0x80, "Freeze" )
1432 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
1433 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1434
1435 PORT_START /* 56XX #1 pins 38-41 multiplexed */
1436 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unused ) )
1437 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
1438 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1439 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unused ) )
1440 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
1441 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1442 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unused ) )
1443 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
1444 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1445 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unused ) )
1446 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
1447 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1448 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unused ) )
1449 PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
1450 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1451 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unused ) )
1452 PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
1453 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1454 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) )
1455 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
1456 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1457 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) )
1458 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
1459 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1460 INPUT_PORTS_END
1461
1462
1463 INPUT_PORTS_START( motos )
1464 PORT_START /* 56XX #0 pins 22-29 */
1465 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY )
1466 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY )
1467 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY )
1468 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY )
1469 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_COCKTAIL )
1470 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_COCKTAIL )
1471 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_COCKTAIL )
1472 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_COCKTAIL )
1473
1474 PORT_START /* 56XX #0 pins 30-33 and 38-41 */
1475 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
1476 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_COCKTAIL )
1477 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
1478 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
1479 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 )
1480 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
1481 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
1482 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 )
1483
1484 PORT_START /* 56XX #1 pins 30-33 */
1485 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON2 )
1486 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_COCKTAIL )
1487 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Cabinet ) )
1488 PORT_DIPSETTING( 0x04, DEF_STR( Upright ) )
1489 PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
1490 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) // service mode again
1491
1492 PORT_START /* 56XX #1 pins 22-29 */
1493 PORT_SERVICE( 0x01, IP_ACTIVE_LOW )
1494 PORT_DIPNAME( 0x06, 0x06, DEF_STR( Coinage ) )
1495 PORT_DIPSETTING( 0x00, DEF_STR( 3C_1C ) )
1496 PORT_DIPSETTING( 0x02, DEF_STR( 2C_1C ) )
1497 PORT_DIPSETTING( 0x06, DEF_STR( 1C_1C ) )
1498 PORT_DIPSETTING( 0x04, DEF_STR( 1C_2C ) )
1499 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Lives ) )
1500 PORT_DIPSETTING( 0x08, "3" )
1501 PORT_DIPSETTING( 0x00, "5" )
1502 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Difficulty ) )
1503 PORT_DIPSETTING( 0x10, "Rank A" )
1504 PORT_DIPSETTING( 0x00, "Rank B" )
1505 PORT_DIPNAME( 0x60, 0x60, DEF_STR( Bonus_Life ) )
1506 PORT_DIPSETTING( 0x60, "10k 30k and every 50k" )
1507 PORT_DIPSETTING( 0x40, "20k and every 50k" )
1508 PORT_DIPSETTING( 0x20, "30k and every 70k" )
1509 PORT_DIPSETTING( 0x00, "20k 70k" )
1510 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Demo_Sounds ) )
1511 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1512 PORT_DIPSETTING( 0x80, DEF_STR( On ) )
1513
1514 PORT_START /* 56XX #1 pins 38-41 multiplexed */
1515 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unused ) )
1516 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
1517 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1518 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unused ) )
1519 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
1520 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1521 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unused ) )
1522 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
1523 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1524 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unused ) )
1525 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
1526 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1527 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unused ) )
1528 PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
1529 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1530 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unused ) )
1531 PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
1532 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1533 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) )
1534 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
1535 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1536 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) )
1537 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
1538 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1539 INPUT_PORTS_END
1540
1541
1542
1543 static struct GfxLayout charlayout =
1544 {
1545 8,8,
1546 RGN_FRAC(1,1),
1547 2,
1548 { 0, 4 },
1549 { 8*8+0, 8*8+1, 8*8+2, 8*8+3, 0, 1, 2, 3 },
1550 { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
1551 16*8
1552 };
1553
1554 static struct GfxLayout spritelayout_2bpp =
1555 {
1556 16,16,
1557 RGN_FRAC(1,1),
1558 2,
1559 { 0, 4 },
1560 { 0, 1, 2, 3, 8*8, 8*8+1, 8*8+2, 8*8+3,
1561 16*8+0, 16*8+1, 16*8+2, 16*8+3, 24*8+0, 24*8+1, 24*8+2, 24*8+3 },
1562 { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
1563 32*8, 33*8, 34*8, 35*8, 36*8, 37*8, 38*8, 39*8 },
1564 64*8
1565 };
1566
1567 static struct GfxLayout spritelayout_8x8 =
1568 {
1569 8,8,
1570 RGN_FRAC(1,1),
1571 2,
1572 { 0, 4 },
1573 { 0, 1, 2, 3, 8*8, 8*8+1, 8*8+2, 8*8+3 },
1574 { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
1575 16*8
1576 };
1577
1578 static struct GfxLayout spritelayout_4bpp =
1579 {
1580 16,16,
1581 RGN_FRAC(1,2),
1582 4,
1583 { 0, 4, RGN_FRAC(1,2)+0, RGN_FRAC(1,2)+4 },
1584 { 0, 1, 2, 3, 8*8, 8*8+1, 8*8+2, 8*8+3, 16*8+0, 16*8+1, 16*8+2, 16*8+3,
1585 24*8+0, 24*8+1, 24*8+2, 24*8+3 },
1586 { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
1587 32*8, 33*8, 34*8, 35*8, 36*8, 37*8, 38*8, 39*8 },
1588 64*8
1589 };
1590
1591
1592
1593 static struct GfxDecodeInfo gfxdecodeinfo_superpac[] =
1594 {
1595 { REGION_GFX1, 0, &charlayout, 0, 64 },
1596 { REGION_GFX2, 0, &spritelayout_2bpp, 64*4, 64 },
1597 { -1 } /* end of array */
1598 };
1599
1600 static struct GfxDecodeInfo gfxdecodeinfo_phozon[] =
1601 {
1602 { REGION_GFX1, 0, &charlayout, 0, 64 },
1603 { REGION_GFX2, 0, &spritelayout_8x8, 64*4, 64 },
1604 { -1 } /* end of table */
1605 };
1606
1607 static struct GfxDecodeInfo gfxdecodeinfo_mappy[] =
1608 {
1609 { REGION_GFX1, 0, &charlayout, 0, 64 },
1610 { REGION_GFX2, 0, &spritelayout_4bpp, 64*4, 16 },
1611 { -1 } /* end of array */
1612 };
1613
1614 static struct GfxDecodeInfo gfxdecodeinfo_todruaga[] =
1615 {
1616 { REGION_GFX1, 0, &charlayout, 0, 64 },
1617 { REGION_GFX2, 0, &spritelayout_4bpp, 64*4, 64 },
1618 { -1 } /* end of array */
1619 };
1620
1621
1622
1623 static struct namco_interface namco_interface =
1624 {
1625 18432000/768, /* 24000 Hz sample rate */
1626 8, /* number of voices */
1627 100, /* playback volume */
1628 REGION_SOUND1 /* memory region */
1629 };
1630
1631 static struct DACinterface dac_interface =
1632 {
1633 1,
1634 { 55 }
1635 };
1636
1637
1638
1639 static MACHINE_DRIVER_START( superpac )
1640
1641 /* basic machine hardware */
1642 MDRV_CPU_ADD(M6809, 18432000/12) /* 1.536 MHz */
MDRV_CPU_MEMORY(readmem_superpac_cpu1,writemem_superpac_cpu1)1643 MDRV_CPU_MEMORY(readmem_superpac_cpu1,writemem_superpac_cpu1)
1644 MDRV_CPU_VBLANK_INT(mappy_interrupt_1,1) // also update the custom I/O chips
1645
1646 MDRV_CPU_ADD(M6809, 18432000/12) /* 1.536 MHz */
1647 MDRV_CPU_MEMORY(readmem_superpac_cpu2,writemem_superpac_cpu2)
1648 MDRV_CPU_VBLANK_INT(irq0_line_assert,1)
1649
1650 MDRV_FRAMES_PER_SECOND(60.606060)
1651 MDRV_VBLANK_DURATION(DEFAULT_60HZ_VBLANK_DURATION)
1652 MDRV_INTERLEAVE(100) /* 100 CPU slices per frame - an high value to ensure proper */
1653 /* synchronization of the CPUs */
1654 MDRV_MACHINE_INIT(superpac)
1655
1656 /* video hardware */
1657 MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
1658 MDRV_SCREEN_SIZE(36*8, 28*8)
1659 MDRV_VISIBLE_AREA(0*8, 36*8-1, 0*8, 28*8-1)
1660 MDRV_GFXDECODE(gfxdecodeinfo_superpac)
1661 MDRV_PALETTE_LENGTH(32)
1662 MDRV_COLORTABLE_LENGTH(4*(64+64))
1663
1664 MDRV_PALETTE_INIT(superpac)
1665 MDRV_VIDEO_START(superpac)
1666 MDRV_VIDEO_UPDATE(superpac)
1667
1668 /* sound hardware */
1669 MDRV_SOUND_ADD(NAMCO_15XX, namco_interface)
1670 MACHINE_DRIVER_END
1671
1672 static MACHINE_DRIVER_START( grobda )
1673
1674 /* basic machine hardware */
1675 MDRV_IMPORT_FROM( superpac )
1676
1677 /* sound hardware */
1678 MDRV_SOUND_ADD(DAC, dac_interface)
1679 MACHINE_DRIVER_END
1680
1681
1682 static MACHINE_DRIVER_START( phozon )
1683
1684 /* basic machine hardware */
1685 MDRV_CPU_ADD(M6809, 1536000) /* MAIN CPU */
1686 MDRV_CPU_MEMORY(readmem_phozon_cpu1,writemem_phozon_cpu1)
1687 MDRV_CPU_VBLANK_INT(mappy_interrupt_1,1) // also update the custom I/O chips
1688
1689 MDRV_CPU_ADD(M6809, 1536000) /* SOUND CPU */
1690 MDRV_CPU_MEMORY(readmem_phozon_cpu2,writemem_phozon_cpu2)
1691 MDRV_CPU_VBLANK_INT(irq0_line_assert,1)
1692
1693 MDRV_CPU_ADD(M6809, 1536000) /* SUB CPU */
1694 MDRV_CPU_MEMORY(readmem_phozon_cpu3,writemem_phozon_cpu3)
1695 MDRV_CPU_VBLANK_INT(irq0_line_assert,1)
1696
1697 MDRV_FRAMES_PER_SECOND(60.606060)
1698 MDRV_VBLANK_DURATION(DEFAULT_60HZ_VBLANK_DURATION)
1699 MDRV_INTERLEAVE(100) /* 100 CPU slices per frame - an high value to ensure proper */
1700 /* synchronization of the CPUs */
1701 MDRV_MACHINE_INIT(phozon)
1702
1703 /* video hardware */
1704 MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
1705 MDRV_SCREEN_SIZE(36*8, 28*8)
1706 MDRV_VISIBLE_AREA(0*8, 36*8-1, 0*8, 28*8-1)
1707 MDRV_GFXDECODE(gfxdecodeinfo_phozon)
1708 MDRV_PALETTE_LENGTH(64)
1709 MDRV_COLORTABLE_LENGTH(64*4+64*4)
1710
1711 MDRV_PALETTE_INIT(phozon)
1712 MDRV_VIDEO_START(phozon)
1713 MDRV_VIDEO_UPDATE(phozon)
1714
1715 /* sound hardware */
1716 MDRV_SOUND_ADD(NAMCO_15XX, namco_interface)
1717 MACHINE_DRIVER_END
1718
1719
1720 static MACHINE_DRIVER_START( mappy )
1721
1722 /* basic machine hardware */
1723 MDRV_CPU_ADD(M6809, 18432000/12) /* 1.536 MHz */
1724 MDRV_CPU_MEMORY(readmem_mappy_cpu1,writemem_mappy_cpu1)
1725 MDRV_CPU_VBLANK_INT(mappy_interrupt_1,1) // also update the custom I/O chips
1726
1727 MDRV_CPU_ADD(M6809, 18432000/12) /* 1.536 MHz */
1728 MDRV_CPU_MEMORY(readmem_mappy_cpu2,writemem_mappy_cpu2)
1729 MDRV_CPU_VBLANK_INT(irq0_line_assert,1)
1730
1731 MDRV_FRAMES_PER_SECOND(60.606060)
1732 MDRV_VBLANK_DURATION(DEFAULT_60HZ_VBLANK_DURATION)
1733 MDRV_INTERLEAVE(100) /* 100 CPU slices per frame - an high value to ensure proper */
1734 /* synchronization of the CPUs */
1735 MDRV_MACHINE_INIT(mappy)
1736
1737 /* video hardware */
1738 MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
1739 MDRV_SCREEN_SIZE(36*8, 28*8)
1740 MDRV_VISIBLE_AREA(0*8, 36*8-1, 0*8, 28*8-1)
1741 MDRV_GFXDECODE(gfxdecodeinfo_mappy)
1742 MDRV_PALETTE_LENGTH(32)
1743 MDRV_COLORTABLE_LENGTH(64*4+16*16)
1744
1745 MDRV_PALETTE_INIT(mappy)
1746 MDRV_VIDEO_START(mappy)
1747 MDRV_VIDEO_UPDATE(mappy)
1748
1749 /* sound hardware */
1750 MDRV_SOUND_ADD(NAMCO_15XX, namco_interface)
1751 MACHINE_DRIVER_END
1752
1753 static MACHINE_DRIVER_START( todruaga )
1754
1755 /* basic machine hardware */
1756 MDRV_IMPORT_FROM( mappy )
1757
1758 /* video hardware */
1759 MDRV_GFXDECODE(gfxdecodeinfo_todruaga)
1760 MDRV_COLORTABLE_LENGTH(64*4+64*16)
1761 MACHINE_DRIVER_END
1762
1763
1764
1765 ROM_START( superpac )
1766 ROM_REGION( 0x10000, REGION_CPU1, 0 ) /* 64k for code */
1767 ROM_LOAD( "sp1-2.1c", 0xc000, 0x2000, CRC(4bb33d9c) SHA1(dd87f71b4db090a32a6b791079eedd17580cc741) )
1768 ROM_LOAD( "sp1-1.1b", 0xe000, 0x2000, CRC(846fbb4a) SHA1(f6bf90281986b9b7a3ef1dbbeddb722182e84d7c) )
1769
1770 ROM_REGION( 0x10000, REGION_CPU2, 0 ) /* 64k for the second CPU */
1771 ROM_LOAD( "spc-3.1k", 0xf000, 0x1000, CRC(04445ddb) SHA1(ce7d14963d5ddaefdeaf433a6f82c43cd1611d9b) )
1772
1773 ROM_REGION( 0x1000, REGION_GFX1, ROMREGION_DISPOSE )
1774 ROM_LOAD( "sp1-6.3c", 0x0000, 0x1000, CRC(91c5935c) SHA1(10579edabc26a0910253fab7d41b4c19ecdaaa09) )
1775
1776 ROM_REGION( 0x2000, REGION_GFX2, ROMREGION_DISPOSE )
1777 ROM_LOAD( "spv-2.3f", 0x0000, 0x2000, CRC(670a42f2) SHA1(9171922df07e31fd1dc415766f7d2cc50a9d10dc) )
1778
1779 ROM_REGION( 0x0220, REGION_PROMS, 0 )
1780 ROM_LOAD( "superpac.4c", 0x0000, 0x0020, CRC(9ce22c46) SHA1(d97f53ef4c5ef26659a22ed0de4ce7ef3758c924) ) /* palette */
1781 ROM_LOAD( "superpac.4e", 0x0020, 0x0100, CRC(1253c5c1) SHA1(df46a90170e9761d45c90fbd04ef2aa1e8c9944b) ) /* chars */
1782 ROM_LOAD( "superpac.3l", 0x0120, 0x0100, CRC(d4d7026f) SHA1(a486573437c54bfb503424574ad82655491e85e1) ) /* sprites */
1783
1784 ROM_REGION( 0x0100, REGION_SOUND1, 0 ) /* sound prom */
1785 ROM_LOAD( "superpac.3m", 0x0000, 0x0100, CRC(ad43688f) SHA1(072f427453efb1dda8147da61804fff06e1bc4d5) )
1786 ROM_END
1787
1788 ROM_START( superpcm )
1789 ROM_REGION( 0x10000, REGION_CPU1, 0 ) /* 64k for code */
1790 ROM_LOAD( "spc-2.1c", 0xc000, 0x2000, CRC(1a38c30e) SHA1(ae0ee9f3df0991a80698fe745a7a853a4bb60710) )
1791 ROM_LOAD( "spc-1.1b", 0xe000, 0x2000, CRC(730e95a9) SHA1(ca73c8bcb03c2f5c05968c707a5d3f7f9956b886) )
1792
1793 ROM_REGION( 0x10000, REGION_CPU2, 0 ) /* 64k for the second CPU */
1794 ROM_LOAD( "spc-3.1k", 0xf000, 0x1000, CRC(04445ddb) SHA1(ce7d14963d5ddaefdeaf433a6f82c43cd1611d9b) )
1795
1796 ROM_REGION( 0x1000, REGION_GFX1, ROMREGION_DISPOSE )
1797 ROM_LOAD( "spv-1.3c", 0x0000, 0x1000, CRC(78337e74) SHA1(11222adb55e6bce508896ccb1f6dbab0c1d44e5b) )
1798
1799 ROM_REGION( 0x2000, REGION_GFX2, ROMREGION_DISPOSE )
1800 ROM_LOAD( "spv-2.3f", 0x0000, 0x2000, CRC(670a42f2) SHA1(9171922df07e31fd1dc415766f7d2cc50a9d10dc) )
1801
1802 ROM_REGION( 0x0220, REGION_PROMS, 0 )
1803 ROM_LOAD( "superpac.4c", 0x0000, 0x0020, CRC(9ce22c46) SHA1(d97f53ef4c5ef26659a22ed0de4ce7ef3758c924) ) /* palette */
1804 ROM_LOAD( "superpac.4e", 0x0020, 0x0100, CRC(1253c5c1) SHA1(df46a90170e9761d45c90fbd04ef2aa1e8c9944b) ) /* chars */
1805 ROM_LOAD( "superpac.3l", 0x0120, 0x0100, CRC(d4d7026f) SHA1(a486573437c54bfb503424574ad82655491e85e1) ) /* sprites */
1806
1807 ROM_REGION( 0x0100, REGION_SOUND1, 0 ) /* sound prom */
1808 ROM_LOAD( "superpac.3m", 0x0000, 0x0100, CRC(ad43688f) SHA1(072f427453efb1dda8147da61804fff06e1bc4d5) )
1809 ROM_END
1810
1811 ROM_START( pacnpal )
1812 ROM_REGION( 0x10000, REGION_CPU1, 0 ) /* 64k for code */
1813 ROM_LOAD( "pap13b.1d", 0xa000, 0x2000, CRC(ed64a565) SHA1(b16930981490d97486d4df96acbb3d1cddbd3a80) )
1814 ROM_LOAD( "pap12b.1c", 0xc000, 0x2000, CRC(15308bcf) SHA1(334603f8904f8968d05edc420b5f9e3b483ee86d) )
1815 ROM_LOAD( "pap1.1b", 0xe000, 0x2000, CRC(3cac401c) SHA1(38a14228469fa4a20cbc5d862198dc901842682e) )
1816
1817 ROM_REGION( 0x10000, REGION_CPU2, 0 ) /* 64k for the second CPU */
1818 ROM_LOAD( "pap14.1k", 0xf000, 0x1000, CRC(330e20de) SHA1(5b23e5dcc38dc644a36efc8b03eba34cea540bea) )
1819
1820 ROM_REGION( 0x1000, REGION_GFX1, ROMREGION_DISPOSE )
1821 ROM_LOAD( "pap16.3c", 0x0000, 0x1000, CRC(a36b96cb) SHA1(e0a11b5a43cbf756ddb045c743973d0a55dbb979) )
1822
1823 ROM_REGION( 0x2000, REGION_GFX2, ROMREGION_DISPOSE )
1824 ROM_LOAD( "pap15.3f", 0x0000, 0x2000, CRC(fb6f56e3) SHA1(fd10d2ee49b4e059e9ef6046bc86d97e3185164d) )
1825
1826 ROM_REGION( 0x0220, REGION_PROMS, 0 )
1827 ROM_LOAD( "papi6.4c", 0x0000, 0x0020, CRC(52634b41) SHA1(dfb109c8e2c62ae1612ba0e3272468d152123842) ) /* palette */
1828 ROM_LOAD( "papi5.4e", 0x0020, 0x0100, CRC(ac46203c) SHA1(3f47f1991aab9640c0d5f70fad85d20d6cf2ea3d) ) /* chars */
1829 ROM_LOAD( "papi4.3l", 0x0120, 0x0100, CRC(686bde84) SHA1(541d08b43dbfb789c2867955635d2c9e051fedd9) ) /* sprites */
1830
1831 ROM_REGION( 0x0100, REGION_SOUND1, 0 ) /* sound prom */
1832 ROM_LOAD( "papi3.3m", 0x0000, 0x0100, CRC(83c31a98) SHA1(8f1219a6c2b565ae9d8f72a9c277dc4bd38ec40f) )
1833 ROM_END
1834
1835 ROM_START( pacnpal2 )
1836 ROM_REGION( 0x10000, REGION_CPU1, 0 ) /* 64k for code */
1837 ROM_LOAD( "pap1_3.1d", 0xa000, 0x2000, CRC(d7ec2719) SHA1(b633a5360a199d528bcef209c06a21f266525769) )
1838 ROM_LOAD( "pap1_2.1c", 0xc000, 0x2000, CRC(0245396e) SHA1(7e8467e317879621a7b31bc922b5187f20fcea78) )
1839 ROM_LOAD( "pap1_1.1b", 0xe000, 0x2000, CRC(7f046b58) SHA1(2024019e5fafb698bb5775075c9b88c5ed35f7ba) )
1840
1841 ROM_REGION( 0x10000, REGION_CPU2, 0 ) /* 64k for the second CPU */
1842 ROM_LOAD( "pap14.1k", 0xf000, 0x1000, CRC(330e20de) SHA1(5b23e5dcc38dc644a36efc8b03eba34cea540bea) )
1843
1844 ROM_REGION( 0x1000, REGION_GFX1, ROMREGION_DISPOSE )
1845 ROM_LOAD( "pap16.3c", 0x0000, 0x1000, CRC(a36b96cb) SHA1(e0a11b5a43cbf756ddb045c743973d0a55dbb979) )
1846
1847 ROM_REGION( 0x2000, REGION_GFX2, ROMREGION_DISPOSE )
1848 ROM_LOAD( "pap15.3f", 0x0000, 0x2000, CRC(fb6f56e3) SHA1(fd10d2ee49b4e059e9ef6046bc86d97e3185164d) )
1849
1850 ROM_REGION( 0x0220, REGION_PROMS, 0 )
1851 ROM_LOAD( "papi6.4c", 0x0000, 0x0020, CRC(52634b41) SHA1(dfb109c8e2c62ae1612ba0e3272468d152123842) ) /* palette */
1852 ROM_LOAD( "papi5.4e", 0x0020, 0x0100, CRC(ac46203c) SHA1(3f47f1991aab9640c0d5f70fad85d20d6cf2ea3d) ) /* chars */
1853 ROM_LOAD( "papi4.3l", 0x0120, 0x0100, CRC(686bde84) SHA1(541d08b43dbfb789c2867955635d2c9e051fedd9) ) /* sprites */
1854
1855 ROM_REGION( 0x0100, REGION_SOUND1, 0 ) /* sound prom */
1856 ROM_LOAD( "papi3.3m", 0x0000, 0x0100, CRC(83c31a98) SHA1(8f1219a6c2b565ae9d8f72a9c277dc4bd38ec40f) )
1857 ROM_END
1858
1859 ROM_START( pacnchmp )
1860 ROM_REGION( 0x10000, REGION_CPU1, 0 ) /* 64k for code */
1861 ROM_LOAD( "pap3.1d", 0xa000, 0x2000, CRC(20a07d3d) SHA1(2135ad154b575a73cfb1b0f0f282dfc013672aec) )
1862 ROM_LOAD( "pap3.1c", 0xc000, 0x2000, CRC(505bae56) SHA1(590ce9f0e92115a71eb76b71ab4eac16ffa2a28e) )
1863 ROM_LOAD( "pap1.1b", 0xe000, 0x2000, CRC(3cac401c) SHA1(38a14228469fa4a20cbc5d862198dc901842682e) )
1864
1865 ROM_REGION( 0x10000, REGION_CPU2, 0 ) /* 64k for the second CPU */
1866 ROM_LOAD( "pap14.1k", 0xf000, 0x1000, CRC(330e20de) SHA1(5b23e5dcc38dc644a36efc8b03eba34cea540bea) )
1867
1868 ROM_REGION( 0x1000, REGION_GFX1, ROMREGION_DISPOSE )
1869 ROM_LOAD( "pap2.3c", 0x0000, 0x1000, CRC(93d15c30) SHA1(5da4120b680726c83a651b445254604cbf7cc883) )
1870
1871 ROM_REGION( 0x2000, REGION_GFX2, ROMREGION_DISPOSE )
1872 ROM_LOAD( "pap2.3f", 0x0000, 0x2000, CRC(39f44aa4) SHA1(0696539cb2c7fcda2f6c295c7d65678dac18950b) )
1873
1874 ROM_REGION( 0x0220, REGION_PROMS, 0 )
1875 ROM_LOAD( "papi6.4c", 0x0000, 0x0020, BAD_DUMP CRC(52634b41) SHA1(dfb109c8e2c62ae1612ba0e3272468d152123842) ) /* palette */
1876 ROM_LOAD( "papi5.4e", 0x0020, 0x0100, BAD_DUMP CRC(ac46203c) SHA1(3f47f1991aab9640c0d5f70fad85d20d6cf2ea3d) ) /* chars */
1877 ROM_LOAD( "papi4.3l", 0x0120, 0x0100, BAD_DUMP CRC(686bde84) SHA1(541d08b43dbfb789c2867955635d2c9e051fedd9) ) /* sprites */
1878
1879 ROM_REGION( 0x0100, REGION_SOUND1, 0 ) /* sound prom */
1880 ROM_LOAD( "papi3.3m", 0x0000, 0x0100, CRC(83c31a98) SHA1(8f1219a6c2b565ae9d8f72a9c277dc4bd38ec40f) )
1881 ROM_END
1882
1883 ROM_START( grobda )
1884 ROM_REGION( 0x10000, REGION_CPU1, 0 ) /* 64k for code for the first CPU */
1885 ROM_LOAD( "gr2-3.1d", 0xa000, 0x2000, CRC(8e3a23be) SHA1(e54c1366adc561609a3817e074b01245fb335153) )
1886 ROM_LOAD( "gr2-2.1c", 0xc000, 0x2000, CRC(19ffa83d) SHA1(9f4faf5e0de783868d984f166b92ebcf8bb0f93f) )
1887 ROM_LOAD( "gr2-1.1b", 0xe000, 0x2000, CRC(0089b13a) SHA1(286d6a60fc46a6db9a52c19c4e33114717747caf) )
1888
1889 ROM_REGION( 0x10000, REGION_CPU2, 0 ) /* 64k for the second CPU */
1890 ROM_LOAD( "gr1-4.1k", 0xe000, 0x2000, CRC(3fe78c08) SHA1(dd49a96e613e0ced5b82eafcaf935e136e7db53a) )
1891
1892 ROM_REGION( 0x1000, REGION_GFX1, ROMREGION_DISPOSE )
1893 ROM_LOAD( "gr1-7.3c", 0x0000, 0x1000, CRC(4ebfabfd) SHA1(fffce05f59e090c4281aca0c0494825027b764fb) ) /* characters */
1894
1895 ROM_REGION( 0x4000, REGION_GFX2, ROMREGION_DISPOSE )
1896 ROM_LOAD( "gr1-5.3f", 0x0000, 0x2000, CRC(eed43487) SHA1(d2b39651f39bdfca3754f7bbd7a52e7bf843dabe) ) /* sprites */
1897 ROM_LOAD( "gr1-6.3e", 0x2000, 0x2000, CRC(cebb7362) SHA1(6efd57f9fa0f93f70e60efc387b3a782fad2665c) ) /* sprites */
1898
1899 ROM_REGION( 0x0220, REGION_PROMS, 0 )
1900 ROM_LOAD( "gr1-6.4c", 0x0000, 0x0020, CRC(c65efa77) SHA1(ead74917744cb11556153bd6c09a987bc9c6ef08) ) /* palette */
1901 ROM_LOAD( "gr1-5.4e", 0x0020, 0x0100, CRC(a0f66911) SHA1(e08a56327055994e3d9e2c3816d57a3cc2434c88) ) /* characters */
1902 ROM_LOAD( "gr1-4.3l", 0x0120, 0x0100, CRC(f1f2c234) SHA1(d59879e7a598a363d8d9ac9e630ae698f14833f7) ) /* sprites */
1903
1904 ROM_REGION( 0x0100, REGION_SOUND1, 0 ) /* sound prom */
1905 ROM_LOAD( "gr1-3.3m", 0x0000, 0x0100, CRC(66eb1467) SHA1(02b99ced4afd9ac139f634739769f7bf353274f9) )
1906 ROM_END
1907
1908 ROM_START( grobda2 )
1909 ROM_REGION( 0x10000, REGION_CPU1, 0 ) /* 64k for code for the first CPU */
1910 ROM_LOAD( "gr1-3.1d", 0xa000, 0x2000, CRC(4ef4a7c1) SHA1(33367e63531601c3d4f4a7b2170cb1c87f6d72a7) )
1911 ROM_LOAD( "gr2-2a.1c", 0xc000, 0x2000, CRC(f93e82ae) SHA1(cb591bbcaab5ef26f097e7bab9b3638990465d4c) )
1912 ROM_LOAD( "gr1-1.1b", 0xe000, 0x2000, CRC(32d42f22) SHA1(f83d17029f19fc2e8bac183771dbf9d786a56681) )
1913
1914 ROM_REGION( 0x10000, REGION_CPU2, 0 ) /* 64k for the second CPU */
1915 ROM_LOAD( "gr1-4.1k", 0xe000, 0x2000, CRC(3fe78c08) SHA1(dd49a96e613e0ced5b82eafcaf935e136e7db53a) )
1916
1917 ROM_REGION( 0x1000, REGION_GFX1, ROMREGION_DISPOSE )
1918 ROM_LOAD( "gr1-7.3c", 0x0000, 0x1000, CRC(4ebfabfd) SHA1(fffce05f59e090c4281aca0c0494825027b764fb) ) /* characters */
1919
1920 ROM_REGION( 0x4000, REGION_GFX2, ROMREGION_DISPOSE )
1921 ROM_LOAD( "gr1-5.3f", 0x0000, 0x2000, CRC(eed43487) SHA1(d2b39651f39bdfca3754f7bbd7a52e7bf843dabe) ) /* sprites */
1922 ROM_LOAD( "gr1-6.3e", 0x2000, 0x2000, CRC(cebb7362) SHA1(6efd57f9fa0f93f70e60efc387b3a782fad2665c) ) /* sprites */
1923
1924 ROM_REGION( 0x0220, REGION_PROMS, 0 )
1925 ROM_LOAD( "gr1-6.4c", 0x0000, 0x0020, CRC(c65efa77) SHA1(ead74917744cb11556153bd6c09a987bc9c6ef08) ) /* palette */
1926 ROM_LOAD( "gr1-5.4e", 0x0020, 0x0100, CRC(a0f66911) SHA1(e08a56327055994e3d9e2c3816d57a3cc2434c88) ) /* characters */
1927 ROM_LOAD( "gr1-4.3l", 0x0120, 0x0100, CRC(f1f2c234) SHA1(d59879e7a598a363d8d9ac9e630ae698f14833f7) ) /* sprites */
1928
1929 ROM_REGION( 0x0100, REGION_SOUND1, 0 ) /* sound prom */
1930 ROM_LOAD( "gr1-3.3m", 0x0000, 0x0100, CRC(66eb1467) SHA1(02b99ced4afd9ac139f634739769f7bf353274f9) )
1931 ROM_END
1932
1933 ROM_START( grobda3 )
1934 ROM_REGION( 0x10000, REGION_CPU1, 0 ) /* 64k for code for the first CPU */
1935 ROM_LOAD( "gr1-3.1d", 0xa000, 0x2000, CRC(4ef4a7c1) SHA1(33367e63531601c3d4f4a7b2170cb1c87f6d72a7) )
1936 ROM_LOAD( "gr1-2.1c", 0xc000, 0x2000, CRC(7dcc6e8e) SHA1(7580686b7082432a79217c3d7b5ebfa0c25952e3) )
1937 ROM_LOAD( "gr1-1.1b", 0xe000, 0x2000, CRC(32d42f22) SHA1(f83d17029f19fc2e8bac183771dbf9d786a56681) )
1938
1939 ROM_REGION( 0x10000, REGION_CPU2, 0 ) /* 64k for the second CPU */
1940 ROM_LOAD( "gr1-4.1k", 0xe000, 0x2000, CRC(3fe78c08) SHA1(dd49a96e613e0ced5b82eafcaf935e136e7db53a) )
1941
1942 ROM_REGION( 0x1000, REGION_GFX1, ROMREGION_DISPOSE )
1943 ROM_LOAD( "gr1-7.3c", 0x0000, 0x1000, CRC(4ebfabfd) SHA1(fffce05f59e090c4281aca0c0494825027b764fb) ) /* characters */
1944
1945 ROM_REGION( 0x4000, REGION_GFX2, ROMREGION_DISPOSE )
1946 ROM_LOAD( "gr1-5.3f", 0x0000, 0x2000, CRC(eed43487) SHA1(d2b39651f39bdfca3754f7bbd7a52e7bf843dabe) ) /* sprites */
1947 ROM_LOAD( "gr1-6.3e", 0x2000, 0x2000, CRC(cebb7362) SHA1(6efd57f9fa0f93f70e60efc387b3a782fad2665c) ) /* sprites */
1948
1949 ROM_REGION( 0x0220, REGION_PROMS, 0 )
1950 ROM_LOAD( "gr1-6.4c", 0x0000, 0x0020, CRC(c65efa77) SHA1(ead74917744cb11556153bd6c09a987bc9c6ef08) ) /* palette */
1951 ROM_LOAD( "gr1-5.4e", 0x0020, 0x0100, CRC(a0f66911) SHA1(e08a56327055994e3d9e2c3816d57a3cc2434c88) ) /* characters */
1952 ROM_LOAD( "gr1-4.3l", 0x0120, 0x0100, CRC(f1f2c234) SHA1(d59879e7a598a363d8d9ac9e630ae698f14833f7) ) /* sprites */
1953
1954 ROM_REGION( 0x0100, REGION_SOUND1, 0 ) /* sound prom */
1955 ROM_LOAD( "gr1-3.3m", 0x0000, 0x0100, CRC(66eb1467) SHA1(02b99ced4afd9ac139f634739769f7bf353274f9) )
1956 ROM_END
1957
1958
1959 ROM_START( phozon )
1960 ROM_REGION( 0x10000, REGION_CPU1, 0 ) /* 64k for code for the MAIN CPU */
1961 ROM_LOAD( "6e.rom", 0x8000, 0x2000, CRC(a6686af1) SHA1(87a948b289356675d0418c87c3c0ae36ceba3ee0) )
1962 ROM_LOAD( "6h.rom", 0xa000, 0x2000, CRC(72a65ba0) SHA1(b1d5146c009469d4c6695f08ea2c6ad5d05b5b9b) )
1963 ROM_LOAD( "6c.rom", 0xc000, 0x2000, CRC(f1fda22e) SHA1(789881e94743efae01c63c1e3ce8d039cfa0324c) )
1964 ROM_LOAD( "6d.rom", 0xe000, 0x2000, CRC(f40e6df0) SHA1(48585ac1eff8fb7ed35f56c767d725cae88ff128) )
1965
1966 ROM_REGION( 0x10000, REGION_CPU2, 0 ) /* 64k for the SOUND CPU */
1967 ROM_LOAD( "3b.rom", 0xe000, 0x2000, CRC(5a4b3a79) SHA1(2774681ea668403de31ea218d5df3ce64e3b9243) )
1968
1969 ROM_REGION( 0x10000, REGION_CPU3, 0 ) /* 64k for the SUB CPU */
1970 ROM_LOAD( "9r.rom", 0xe000, 0x2000, CRC(5d9f0a28) SHA1(2caef680229180b237f8c4becf052f1a96592efd) )
1971
1972 ROM_REGION( 0x2000, REGION_GFX1, ROMREGION_DISPOSE )
1973 ROM_LOAD( "7j.rom", 0x0000, 0x1000, CRC(27f9db5b) SHA1(12ef817136b45927d7f279952fa19049a1349f60) ) /* characters (set 1) */
1974 ROM_LOAD( "8j.rom", 0x1000, 0x1000, CRC(15b12ef8) SHA1(e3303656b4e8b988e55a9551e5344e289958f677) ) /* characters (set 2) */
1975
1976 ROM_REGION( 0x2000, REGION_GFX2, ROMREGION_DISPOSE )
1977 ROM_LOAD( "5t.rom", 0x0000, 0x2000, CRC(d50f08f8) SHA1(4e9dda0d5ad1c1b8b3be7edb05b3060f5f63a9c7) ) /* sprites */
1978
1979 ROM_REGION( 0x0520, REGION_PROMS, 0 )
1980 ROM_LOAD( "red.prm", 0x0000, 0x0100, CRC(a2880667) SHA1(b24d9b3354d20a7ecc02c428245669c6c86bfd61) ) /* red palette ROM (4 bits) */
1981 ROM_LOAD( "green.prm", 0x0100, 0x0100, CRC(d6e08bef) SHA1(b0ca7f8a77b7208cf974a8cc565fc91b7f40f51f) ) /* green palette ROM (4 bits) */
1982 ROM_LOAD( "blue.prm", 0x0200, 0x0100, CRC(b2d69c72) SHA1(e7b1ed698ab0e87872cb3a8f3ec102ca3a753259) ) /* blue palette ROM (4 bits) */
1983 ROM_LOAD( "chr.prm", 0x0300, 0x0100, CRC(429e8fee) SHA1(7b1899ca3f33f4561b572de1f24d9ea9d7d84b59) ) /* characters */
1984 ROM_LOAD( "sprite.prm", 0x0400, 0x0100, CRC(9061db07) SHA1(4305d37e613e1d15d37539b152c948648189c2cd) ) /* sprites */
1985 ROM_LOAD( "palette.prm", 0x0500, 0x0020, CRC(60e856ed) SHA1(dcc9a2dfc728b9ca1ab895008de07e20ebed9da3) ) /* unused - timing? */
1986
1987 ROM_REGION( 0x0100, REGION_SOUND1, 0 ) /* sound PROMs */
1988 ROM_LOAD( "sound.prm", 0x0000, 0x0100, CRC(ad43688f) SHA1(072f427453efb1dda8147da61804fff06e1bc4d5) )
1989 ROM_END
1990
1991
1992 ROM_START( mappy )
1993 ROM_REGION( 0x10000, REGION_CPU1, 0 ) /* 64k for code for the first CPU */
1994 ROM_LOAD( "mpx_3.1d", 0xa000, 0x2000, CRC(52e6c708) SHA1(b9722941438e93325e84691ada4e95620bec73b2) )
1995 ROM_LOAD( "mp1_2.1c", 0xc000, 0x2000, CRC(a958a61c) SHA1(e5198703cdf47b2cd7fc9f2a5fde7bf4ab2275db) )
1996 ROM_LOAD( "mpx_1.1b", 0xe000, 0x2000, CRC(203766d4) SHA1(1dbc4f42d4c16a08240a221bec27dcc3a8dd7461) )
1997
1998 ROM_REGION( 0x10000, REGION_CPU2, 0 ) /* 64k for the second CPU */
1999 ROM_LOAD( "mp1_4.1k", 0xe000, 0x2000, CRC(8182dd5b) SHA1(f36b57f7f1e79f00b3f07afe1960bca5f5325ee2) )
2000
2001 ROM_REGION( 0x1000, REGION_GFX1, ROMREGION_DISPOSE )
2002 ROM_LOAD( "mp1_5.3b", 0x0000, 0x1000, CRC(16498b9f) SHA1(76610149c65f955484fef1c033ddc3fed3f4e568) )
2003
2004 ROM_REGION( 0x4000, REGION_GFX2, ROMREGION_DISPOSE )
2005 ROM_LOAD( "mp1_6.3m", 0x0000, 0x2000, CRC(f2d9647a) SHA1(3cc216793c6a5f73c437ad2524563deb3b5e2890) )
2006 ROM_LOAD( "mp1_7.3n", 0x2000, 0x2000, CRC(757cf2b6) SHA1(8dfbf03953d5219d9eb5fc654ec3392442ba1dc4) )
2007
2008 ROM_REGION( 0x0220, REGION_PROMS, 0 )
2009 ROM_LOAD( "mp1-5.5b", 0x0000, 0x0020, CRC(56531268) SHA1(2e356706c07f43eeb67783fb122bdc7fed1b3589) ) /* palette */
2010 ROM_LOAD( "mp1-6.4c", 0x0020, 0x0100, CRC(50765082) SHA1(f578e14f15783acb2073644db4a2f0d196cc0957) ) /* characters */
2011 ROM_LOAD( "mp1-7.5k", 0x0120, 0x0100, CRC(5396bd78) SHA1(2e387e5d8b8cab005f67f821b4db65d0ae8bd362) ) /* sprites */
2012
2013 ROM_REGION( 0x0100, REGION_SOUND1, 0 ) /* sound prom */
2014 ROM_LOAD( "mp1-3.3m", 0x0000, 0x0100, CRC(16a9166a) SHA1(847cbaf7c88616576c410177e066ae1d792ac0ba) )
2015 ROM_END
2016
2017 ROM_START( mappyj )
2018 ROM_REGION( 0x10000, REGION_CPU1, 0 ) /* 64k for code for the first CPU */
2019 ROM_LOAD( "mp1_3.1d", 0xa000, 0x2000, CRC(db9d5ab5) SHA1(32a0190f96f9c00c541b24dd17d6ad487938a8bf) )
2020 ROM_LOAD( "mp1_2.1c", 0xc000, 0x2000, CRC(a958a61c) SHA1(e5198703cdf47b2cd7fc9f2a5fde7bf4ab2275db) )
2021 ROM_LOAD( "mp1_1.1b", 0xe000, 0x2000, CRC(77c0b492) SHA1(631b73560ac59c3612e692fa59558773639ceda7) )
2022
2023 ROM_REGION( 0x10000, REGION_CPU2, 0 ) /* 64k for the second CPU */
2024 ROM_LOAD( "mp1_4.1k", 0xe000, 0x2000, CRC(8182dd5b) SHA1(f36b57f7f1e79f00b3f07afe1960bca5f5325ee2) )
2025
2026 ROM_REGION( 0x1000, REGION_GFX1, ROMREGION_DISPOSE )
2027 ROM_LOAD( "mp1_5.3b", 0x0000, 0x1000, CRC(16498b9f) SHA1(76610149c65f955484fef1c033ddc3fed3f4e568) )
2028
2029 ROM_REGION( 0x4000, REGION_GFX2, ROMREGION_DISPOSE )
2030 ROM_LOAD( "mp1_6.3m", 0x0000, 0x2000, CRC(f2d9647a) SHA1(3cc216793c6a5f73c437ad2524563deb3b5e2890) )
2031 ROM_LOAD( "mp1_7.3n", 0x2000, 0x2000, CRC(757cf2b6) SHA1(8dfbf03953d5219d9eb5fc654ec3392442ba1dc4) )
2032
2033 ROM_REGION( 0x0220, REGION_PROMS, 0 )
2034 ROM_LOAD( "mp1-5.5b", 0x0000, 0x0020, CRC(56531268) SHA1(2e356706c07f43eeb67783fb122bdc7fed1b3589) ) /* palette */
2035 ROM_LOAD( "mp1-6.4c", 0x0020, 0x0100, CRC(50765082) SHA1(f578e14f15783acb2073644db4a2f0d196cc0957) ) /* characters */
2036 ROM_LOAD( "mp1-7.5k", 0x0120, 0x0100, CRC(5396bd78) SHA1(2e387e5d8b8cab005f67f821b4db65d0ae8bd362) ) /* sprites */
2037
2038 ROM_REGION( 0x0100, REGION_SOUND1, 0 ) /* sound prom */
2039 ROM_LOAD( "mp1-3.3m", 0x0000, 0x0100, CRC(16a9166a) SHA1(847cbaf7c88616576c410177e066ae1d792ac0ba) )
2040 ROM_END
2041
2042 ROM_START( todruaga )
2043 ROM_REGION( 0x10000, REGION_CPU1, 0 ) /* 64k for code for the first CPU */
2044 ROM_LOAD( "td2_3.1d", 0x8000, 0x4000, CRC(fbf16299) SHA1(9abbaaaf0a53aff38df8287f62d091b13146cf13) )
2045 ROM_LOAD( "td2_1.1b", 0xc000, 0x4000, CRC(b238d723) SHA1(ab8eadd45638ff1ab2dacbd5ab2c6870b9f79086) )
2046
2047 ROM_REGION( 0x10000, REGION_CPU2, 0 ) /* 64k for the second CPU */
2048 ROM_LOAD( "td1_4.1k", 0xe000, 0x2000, CRC(ae9d06d9) SHA1(3d8621fdd74fafa61f342886faa37f0aab50c5a7) )
2049
2050 ROM_REGION( 0x1000, REGION_GFX1, ROMREGION_DISPOSE )
2051 ROM_LOAD( "td1_5.3b", 0x0000, 0x1000, CRC(d32b249f) SHA1(7d7cee4101ef615fb92c3702f89a9823a6231195) )
2052
2053 ROM_REGION( 0x4000, REGION_GFX2, ROMREGION_DISPOSE )
2054 ROM_LOAD( "td1_6.3m", 0x0000, 0x2000, CRC(e827e787) SHA1(74e0af4c7d6e334bcd211a33eb18dddc8a182aa7) )
2055 ROM_LOAD( "td1_7.3n", 0x2000, 0x2000, CRC(962bd060) SHA1(74cdcafc26475bda085bf62ed17e6474ed782453) )
2056
2057 ROM_REGION( 0x0520, REGION_PROMS, 0 )
2058 ROM_LOAD( "td1-5.5b", 0x0000, 0x0020, CRC(122cc395) SHA1(a648c53f2e95634bb5b27d79be3fd908021d056e) ) /* palette */
2059 ROM_LOAD( "td1-6.4c", 0x0020, 0x0100, CRC(8c661d6a) SHA1(1340e4f657f4f2c4ef651a441c3b51632e757d0b) ) /* characters */
2060 ROM_LOAD( "td1-7.5k", 0x0120, 0x0400, CRC(a86c74dd) SHA1(dfd7d6b2740761c3bcab4c7999d2699d920843e7) ) /* sprites */
2061
2062 ROM_REGION( 0x0100, REGION_SOUND1, 0 ) /* sound prom */
2063 ROM_LOAD( "td1-3.3m", 0x0000, 0x0100, CRC(07104c40) SHA1(16db55525034bacb71e7dc8bd2a7c3c4464d4808) )
2064 ROM_END
2065
2066 ROM_START( todruago )
2067 ROM_REGION( 0x10000, REGION_CPU1, 0 ) /* 64k for code for the first CPU */
2068 ROM_LOAD( "td1_3.1d", 0x8000, 0x4000, CRC(7ab4f5b2) SHA1(65035a5ecdff14bf23e01fe0f5e0935d156d94ff) )
2069 ROM_LOAD( "td1_1.1b", 0xc000, 0x4000, CRC(8c20ef10) SHA1(12ea4875ce4d4590b88862139d3379ab9f5cec03) )
2070
2071 ROM_REGION( 0x10000, REGION_CPU2, 0 ) /* 64k for the second CPU */
2072 ROM_LOAD( "td1_4.1k", 0xe000, 0x2000, CRC(ae9d06d9) SHA1(3d8621fdd74fafa61f342886faa37f0aab50c5a7) )
2073
2074 ROM_REGION( 0x1000, REGION_GFX1, ROMREGION_DISPOSE )
2075 ROM_LOAD( "td1_5.3b", 0x0000, 0x1000, CRC(d32b249f) SHA1(7d7cee4101ef615fb92c3702f89a9823a6231195) )
2076
2077 ROM_REGION( 0x4000, REGION_GFX2, ROMREGION_DISPOSE )
2078 ROM_LOAD( "td1_6.3m", 0x0000, 0x2000, CRC(e827e787) SHA1(74e0af4c7d6e334bcd211a33eb18dddc8a182aa7) )
2079 ROM_LOAD( "td1_7.3n", 0x2000, 0x2000, CRC(962bd060) SHA1(74cdcafc26475bda085bf62ed17e6474ed782453) )
2080
2081 ROM_REGION( 0x0520, REGION_PROMS, 0 )
2082 ROM_LOAD( "td1-5.5b", 0x0000, 0x0020, CRC(122cc395) SHA1(a648c53f2e95634bb5b27d79be3fd908021d056e) ) /* palette */
2083 ROM_LOAD( "td1-6.4c", 0x0020, 0x0100, CRC(8c661d6a) SHA1(1340e4f657f4f2c4ef651a441c3b51632e757d0b) ) /* characters */
2084 ROM_LOAD( "td1-7.5k", 0x0120, 0x0400, CRC(a86c74dd) SHA1(dfd7d6b2740761c3bcab4c7999d2699d920843e7) ) /* sprites */
2085
2086 ROM_REGION( 0x0100, REGION_SOUND1, 0 ) /* sound prom */
2087 ROM_LOAD( "td1-3.3m", 0x0000, 0x0100, CRC(07104c40) SHA1(16db55525034bacb71e7dc8bd2a7c3c4464d4808) )
2088 ROM_END
2089
2090 ROM_START( digdug2 )
2091 ROM_REGION( 0x10000, REGION_CPU1, 0 ) /* 64k for code for the first CPU */
2092 ROM_LOAD( "d23_3.1d", 0x8000, 0x4000, CRC(cc155338) SHA1(d6796479ebb00081e9ae281380a4ce75f730766e) )
2093 ROM_LOAD( "d23_1.1b", 0xc000, 0x4000, CRC(40e46af8) SHA1(698a5c425e23627331d85216a4edee9c391e5749) )
2094
2095 ROM_REGION( 0x10000, REGION_CPU2, 0 ) /* 64k for the second CPU */
2096 ROM_LOAD( "d21_4.1k", 0xe000, 0x2000, CRC(737443b1) SHA1(0e46204089cc6e5ffab0d2a62f9a1728f8c35948) )
2097
2098 ROM_REGION( 0x1000, REGION_GFX1, ROMREGION_DISPOSE )
2099 ROM_LOAD( "d21_5.3b", 0x0000, 0x1000, CRC(afcb4509) SHA1(c9a54df22b0b92efbe7417a00200587225906b46) )
2100
2101 ROM_REGION( 0x8000, REGION_GFX2, ROMREGION_DISPOSE )
2102 ROM_LOAD( "d21_6.3m", 0x0000, 0x4000, CRC(df1f4ad8) SHA1(004fba630018dbf03c4b0e284c98077e19fface3) )
2103 ROM_LOAD( "d21_7.3n", 0x4000, 0x4000, CRC(ccadb3ea) SHA1(77d8d8e6039272f73e63c8f76084138ec613365a) )
2104
2105 ROM_REGION( 0x0220, REGION_PROMS, 0 )
2106 ROM_LOAD( "d21-5.5b", 0x0000, 0x0020, CRC(9b169db5) SHA1(77e840d10ab59708a051c3b15305b33d431ee06d) ) /* palette */
2107 ROM_LOAD( "d21-6.4c", 0x0020, 0x0100, CRC(55a88695) SHA1(bd6bd641c9f220b6a2cc414a1117d5c089571400) ) /* characters */
2108 ROM_LOAD( "d21-7.5k", 0x0120, 0x0100, CRC(9c55feda) SHA1(30a4593726f5a4791e0812fd593e592087e730e3) ) /* sprites */
2109
2110 ROM_REGION( 0x0100, REGION_SOUND1, 0 ) /* sound prom */
2111 ROM_LOAD( "d21-3.3m", 0x0000, 0x0100, CRC(e0074ee2) SHA1(f4f02977130110be52f4dd82fc3c0d02f45778b9) )
2112 ROM_END
2113
2114 ROM_START( digdug2o )
2115 ROM_REGION( 0x10000, REGION_CPU1, 0 ) /* 64k for code for the first CPU */
2116 ROM_LOAD( "d21_3.1d", 0x8000, 0x4000, CRC(be7ec80b) SHA1(a053274ffbf3200e9b89a8be1bd91744acb4a823) )
2117 ROM_LOAD( "d21_1.1b", 0xc000, 0x4000, CRC(5c77c0d4) SHA1(56709e5db1686fd996d21c1005accf34e2d863e1) )
2118
2119 ROM_REGION( 0x10000, REGION_CPU2, 0 ) /* 64k for the second CPU */
2120 ROM_LOAD( "d21_4.1k", 0xe000, 0x2000, CRC(737443b1) SHA1(0e46204089cc6e5ffab0d2a62f9a1728f8c35948) )
2121
2122 ROM_REGION( 0x1000, REGION_GFX1, ROMREGION_DISPOSE )
2123 ROM_LOAD( "d21_5.3b", 0x0000, 0x1000, CRC(afcb4509) SHA1(c9a54df22b0b92efbe7417a00200587225906b46) )
2124
2125 ROM_REGION( 0x8000, REGION_GFX2, ROMREGION_DISPOSE )
2126 ROM_LOAD( "d21_6.3m", 0x0000, 0x4000, CRC(df1f4ad8) SHA1(004fba630018dbf03c4b0e284c98077e19fface3) )
2127 ROM_LOAD( "d21_7.3n", 0x4000, 0x4000, CRC(ccadb3ea) SHA1(77d8d8e6039272f73e63c8f76084138ec613365a) )
2128
2129 ROM_REGION( 0x0220, REGION_PROMS, 0 )
2130 ROM_LOAD( "d21-5.5b", 0x0000, 0x0020, CRC(9b169db5) SHA1(77e840d10ab59708a051c3b15305b33d431ee06d) ) /* palette */
2131 ROM_LOAD( "d21-6.4c", 0x0020, 0x0100, CRC(55a88695) SHA1(bd6bd641c9f220b6a2cc414a1117d5c089571400) ) /* characters */
2132 ROM_LOAD( "d2x-7.5k", 0x0120, 0x0100, CRC(1525a4d1) SHA1(bbedb0cf5957671fca1229d38cb33086356813e1) ) /* sprites */
2133 /* the sprite lookup table is different from the other set, could be a bad dump */
2134
2135 ROM_REGION( 0x0100, REGION_SOUND1, 0 ) /* sound prom */
2136 ROM_LOAD( "d21-3.3m", 0x0000, 0x0100, CRC(e0074ee2) SHA1(f4f02977130110be52f4dd82fc3c0d02f45778b9) )
2137 ROM_END
2138
2139 ROM_START( motos )
2140 ROM_REGION( 0x10000, REGION_CPU1, 0 ) /* 64k for code for the first CPU */
2141 ROM_LOAD( "mo1_3.1d", 0x8000, 0x4000, CRC(1104abb2) SHA1(ade809a73ac24494b9f95f65b7592df5f86dce60) )
2142 ROM_LOAD( "mo1_1.1b", 0xc000, 0x4000, CRC(57b157e2) SHA1(b050495fcc4a4d93551b29d4f05e49f64017c870) )
2143
2144 ROM_REGION( 0x10000, REGION_CPU2, 0 ) /* 64k for the second CPU */
2145 ROM_LOAD( "mo1_4.1k", 0xe000, 0x2000, CRC(55e45d21) SHA1(a8b195acfec542734751de29c9dafc2b165a5881) )
2146
2147 ROM_REGION( 0x1000, REGION_GFX1, ROMREGION_DISPOSE )
2148 ROM_LOAD( "mo1_5.3b", 0x0000, 0x1000, CRC(5d4a2a22) SHA1(4af9bf2ae9bb78d2d029ef38809181ffa3c0eb66) )
2149
2150 ROM_REGION( 0x8000, REGION_GFX2, ROMREGION_DISPOSE )
2151 ROM_LOAD( "mo1_6.3m", 0x0000, 0x4000, CRC(2f0e396e) SHA1(664679f9d3d74a3fccb086af910392b4fe40c9bc) )
2152 ROM_LOAD( "mo1_7.3n", 0x4000, 0x4000, CRC(cf8a3b86) SHA1(2b49cdec516e23783f2a291633d81ab8bd0245fc) )
2153
2154 ROM_REGION( 0x0220, REGION_PROMS, 0 )
2155 ROM_LOAD( "mo1-5.5b", 0x0000, 0x0020, CRC(71972383) SHA1(66b0619affcc5168b099108800a941d6e2416ab0) ) /* palette */
2156 ROM_LOAD( "mo1-6.4c", 0x0020, 0x0100, CRC(730ba7fb) SHA1(24eb167266752b064689662e3ef0f62d0407ac26) ) /* characters */
2157 ROM_LOAD( "mo1-7.5k", 0x0120, 0x0100, CRC(7721275d) SHA1(543adb5348db81ea82a5c039451001ebd82735e3) ) /* sprites */
2158
2159 ROM_REGION( 0x0100, REGION_SOUND1, 0 ) /* sound prom */
2160 ROM_LOAD( "mo1-3.3m", 0x0000, 0x0100, CRC(2accdfb4) SHA1(e21a0618c0f8e35ce26666b6850ac9c0d95d7971) )
2161 ROM_END
2162
2163
2164
2165 static WRITE_HANDLER( grobda_DAC_w )
2166 {
2167 DAC_data_w(0, (data << 4) | data);
2168 }
2169
DRIVER_INIT(grobda)2170 static DRIVER_INIT( grobda )
2171 {
2172 /* I think the speech in Grobda is not a standard Namco sound feature, but rather a hack.
2173 The hardware automatically cycles the bottom 6 address lines of sound RAM, so they
2174 probably added a latch loaded when the bottom 4 lines are 0010 (which corresponds
2175 to locations not used by the sound hardware).
2176 The program writes the same value to 0x02, 0x12, 0x22 and 0x32.
2177 However, removing the 15XX from the board causes sound to disappear completely, so
2178 the DAC might be built-in after all.
2179 */
2180 install_mem_write_handler(1, 0x0002, 0x0002, grobda_DAC_w );
2181
2182 init_58_56();
2183 }
2184
2185
2186
2187 /* 2x6809, static tilemap, 2bpp sprites (Super Pacman type) */
2188 GAME( 1982, superpac, 0, superpac, superpac, 56_56, ROT90, "Namco", "Super Pac-Man" )
2189 GAME( 1982, superpcm, superpac, superpac, superpac, 56_56, ROT90, "[Namco] (Bally Midway license)", "Super Pac-Man (Midway)" )
2190 GAME( 1983, pacnpal, 0, superpac, pacnpal, 56out_PP, ROT90, "Namco", "Pac & Pal" )
2191 GAME( 1983, pacnpal2, pacnpal, superpac, pacnpal, 56out_PP, ROT90, "Namco", "Pac & Pal (older)" )
2192 GAMEX(1983, pacnchmp, pacnpal, superpac, pacnpal, 56out_PP, ROT90, "Namco", "Pac-Man & Chomp Chomp", GAME_IMPERFECT_COLORS )
2193 GAME( 1984, grobda, 0, grobda, grobda, grobda, ROT90, "Namco", "Grobda (New Ver.)" )
2194 GAME( 1984, grobda2, grobda, grobda, grobda, grobda, ROT90, "Namco", "Grobda (Old Ver. set 1)" )
2195 GAME( 1984, grobda3, grobda, grobda, grobda, grobda, ROT90, "Namco", "Grobda (Old Ver. set 2)" )
2196
2197 /* 3x6809, static tilemap, 2bpp sprites (Gaplus type) */
2198 GAME( 1983, phozon, 0, phozon, phozon, 58_56i, ROT90, "Namco", "Phozon (Japan)" )
2199
2200 /* 2x6809, scroling tilemap, 4bpp sprites (Super Pacman type) */
2201 GAME( 1983, mappy, 0, mappy, mappy, 58_58, ROT90, "Namco", "Mappy (US)" )
2202 GAME( 1983, mappyj, mappy, mappy, mappy, 58_58, ROT90, "Namco", "Mappy (Japan)" )
2203 GAME( 1984, todruaga, 0, todruaga, todruaga, 58_56, ROT90, "Namco", "Tower of Druaga (New Ver.)" )
2204 GAME( 1984, todruago, todruaga, todruaga, todruaga, 58_56, ROT90, "Namco", "Tower of Druaga (Old Ver.)" )
2205 GAME( 1985, digdug2, 0, mappy, digdug2, 58_56, ROT90, "Namco", "Dig Dug II (New Ver.)" )
2206 GAME( 1985, digdug2o, digdug2, mappy, digdug2, 58_56, ROT90, "Namco", "Dig Dug II (Old Ver.)" )
2207 GAME( 1985, motos, 0, mappy, motos, 56out_56, ROT90, "Namco", "Motos" )
2208