1 /***************************************************************************
2
3 Pipe Dream
4
5 driver by Bryan McPhail & Aaron Giles
6
7 ****************************************************************************
8
9 Memory map
10
11 ****************************************************************************
12
13 ========================================================================
14 MAIN CPU
15 ========================================================================
16 0000-7FFF R xxxxxxxx Program ROM
17 8000-9FFF R/W xxxxxxxx Program RAM
18 A000-BFFF R xxxxxxxx Banked ROM
19 C000-CBFF R/W xxxxxxxx Palette RAM (1536 entries x 2 bytes)
20 R/W ---xxxxx (0: Blue)
21 R/W xxx----- (0: Green, 3 LSB)
22 R/W ------xx (1: Green, 2 MSB)
23 R/W -xxxxx-- (1: Red)
24 CC00-CFFF R/W xxxxxxxx Sprite RAM (256 entries x 8 bytes)
25 R/W xxxxxxxx (0: Y position, 8 LSB)
26 R/W -------x (1: Y position, 1 MSB)
27 R/W xxxx---- (1: Y zoom factor)
28 R/W xxxxxxxx (2: X position, 8 LSB)
29 R/W -------x (3: X position, 1 MSB)
30 R/W xxxx---- (3: X zoom factor)
31 R/W ---x---- (4: Priority)
32 R/W ----xxxx (4: Palette entry)
33 R/W x------- (5: Y flip)
34 R/W -xxx---- (5: Number of Y tiles - 1)
35 R/W ----x--- (5: X flip)
36 R/W -----xxx (5: Number of X tiles - 1)
37 R/W xxxxxxxx (6: Starting tile index, 8 LSB)
38 R/W ----xxxx (7: Starting tile index, 4 MSB)
39 D000-DFFF R/W --xxxxxx Background tile color
40 E000-EFFF R/W xxxxxxxx Background tile index, 8 MSB
41 F000-FFFF R/W xxxxxxxx Background tile index, 8 LSB
42 ========================================================================
43 0020 R xxxxxxxx Player 1 controls
44 R --x----- (Fast button)
45 R ---x---- (Place button)
46 R ----xxxx (Joystick RLDU)
47 0020 W xxxxxxxx Sound command
48 0021 R xxxxxxxx Player 2 controls
49 R --x----- (Fast button)
50 R ---x---- (Place button)
51 R ----xxxx (Joystick RLDU)
52 0021 W -xxxxxxx Bankswitch/video control
53 W -x------ (Flip screen)
54 W --x----- (Background 2 X scroll, 1 MSB)
55 W ---x---- (Background 1 X scroll, 1 MSB)
56 W ----x--- (Background videoram select)
57 W -----xxx (Bank ROM select)
58 0022 R xxxxxxxx Coinage DIP switch
59 R xxxx---- (Coin B)
60 R ----xxxx (Coin A)
61 0022 W xxxxxxxx Background 1 X scroll, 8 LSB
62 0023 R xxxxxxxx Game options DIP switch
63 R x------- (Test switch)
64 R -x------ (Training mode enable)
65 R --x----- (Flip screen)
66 R ---x---- (Demo sounds)
67 R ----xx-- (Lives)
68 R ------xx (Difficulty)
69 0023 W xxxxxxxx Background 1 Y scroll
70 0024 R -x--xxxx Coinage/start
71 R -x------ (Service coin)
72 R ----x--- (2 player start)
73 R -----x-- (1 player start)
74 R ------x- (Coin B)
75 R -------x (Coin A)
76 0024 W xxxxxxxx Background 2 X scroll, 8 LSB
77 0025 R -------x Sound command pending
78 0025 W xxxxxxxx Background 2 Y scroll
79 ========================================================================
80 Interrupts:
81 INT generated by CRTC VBLANK
82 ========================================================================
83
84
85 ========================================================================
86 SOUND CPU
87 ========================================================================
88 0000-77FF R xxxxxxxx Program ROM
89 7800-7FFF R/W xxxxxxxx Program RAM
90 8000-FFFF R xxxxxxxx Banked ROM
91 ========================================================================
92 0004 W -------x Bank ROM select
93 0016 R xxxxxxxx Sound command read
94 0017 W -------- Sound command acknowledge
95 0018-0019 R/W xxxxxxxx YM2610 port A
96 001A-001B R/W xxxxxxxx YM2610 port B
97 ========================================================================
98 Interrupts:
99 INT generated by YM2610
100 NMI generated by command from main CPU
101 ========================================================================
102
103 ***************************************************************************/
104
105
106 #include "driver.h"
107 #include "cpu/z80/z80.h"
108 #include "vidhrdw/generic.h"
109 #include "fromance.h"
110 #include <math.h>
111
112
113 static UINT8 pending_command;
114 static UINT8 sound_command;
115
116
117
118 /*************************************
119 *
120 * Initialization & bankswitching
121 *
122 *************************************/
123
MACHINE_INIT(pipedrm)124 MACHINE_INIT( pipedrm )
125 {
126 UINT8 *ram;
127
128 /* initialize main Z80 bank */
129 ram = memory_region(REGION_CPU1);
130 cpu_setbank(1, &ram[0x10000]);
131
132 /* initialize sound bank */
133 ram = memory_region(REGION_CPU2);
134 cpu_setbank(2, &ram[0x10000]);
135 }
136
137
WRITE_HANDLER(pipedrm_bankswitch_w)138 static WRITE_HANDLER( pipedrm_bankswitch_w )
139 {
140 /*
141 Bit layout:
142
143 D7 = unknown
144 D6 = flip screen
145 D5 = background 2 X scroll MSB
146 D4 = background 1 X scroll MSB
147 D3 = background videoram select
148 D2-D0 = program ROM bank select
149 */
150
151 /* set the memory bank on the Z80 using the low 3 bits */
152 UINT8 *ram = memory_region(REGION_CPU1);
153 cpu_setbank(1, &ram[0x10000 + (data & 0x7) * 0x2000]);
154
155 /* map to the fromance gfx register */
156 fromance_gfxreg_w(offset, ((data >> 6) & 0x01) | /* flipscreen */
157 ((~data >> 2) & 0x02)); /* videoram select */
158 }
159
160
WRITE_HANDLER(sound_bankswitch_w)161 static WRITE_HANDLER( sound_bankswitch_w )
162 {
163 UINT8 *ram = memory_region(REGION_CPU2);
164 cpu_setbank(2, &ram[0x10000 + (data & 0x01) * 0x8000]);
165 }
166
167
168
169 /*************************************
170 *
171 * Sound CPU I/O
172 *
173 *************************************/
174
delayed_command_w(int data)175 static void delayed_command_w(int data)
176 {
177 sound_command = data & 0xff;
178 pending_command = 1;
179
180 /* Hatris polls commands *and* listens to the NMI; this causes it to miss */
181 /* sound commands. It's possible the NMI isn't really hooked up on the YM2608 */
182 /* sound board. */
183 if (data & 0x100)
184 cpu_set_nmi_line(1, ASSERT_LINE);
185 }
186
187
WRITE_HANDLER(sound_command_w)188 static WRITE_HANDLER( sound_command_w )
189 {
190 timer_set(TIME_NOW, data | 0x100, delayed_command_w);
191 }
192
193
WRITE_HANDLER(sound_command_nonmi_w)194 static WRITE_HANDLER( sound_command_nonmi_w )
195 {
196 timer_set(TIME_NOW, data, delayed_command_w);
197 }
198
199
WRITE_HANDLER(pending_command_clear_w)200 static WRITE_HANDLER( pending_command_clear_w )
201 {
202 pending_command = 0;
203 cpu_set_nmi_line(1, CLEAR_LINE);
204 }
205
206
READ_HANDLER(pending_command_r)207 static READ_HANDLER( pending_command_r )
208 {
209 return pending_command;
210 }
211
212
READ_HANDLER(sound_command_r)213 static READ_HANDLER( sound_command_r )
214 {
215 return sound_command;
216 }
217
218
219
220 /*************************************
221 *
222 * Main CPU memory handlers
223 *
224 *************************************/
225
MEMORY_READ_START(readmem)226 static MEMORY_READ_START( readmem )
227 { 0x0000, 0x7fff, MRA_ROM },
228 { 0x8000, 0x9fff, MRA_RAM },
229 { 0xa000, 0xbfff, MRA_BANK1 },
230 { 0xc000, 0xcfff, MRA_RAM },
231 { 0xd000, 0xffff, fromance_videoram_r },
232 MEMORY_END
233
234
235 static MEMORY_WRITE_START( writemem )
236 { 0x0000, 0x7fff, MWA_ROM },
237 { 0x8000, 0x9fff, MWA_RAM },
238 { 0xa000, 0xbfff, MWA_ROM },
239 { 0xc000, 0xcfff, paletteram_xRRRRRGGGGGBBBBB_w, &paletteram },
240 { 0xd000, 0xffff, fromance_videoram_w, &videoram, &videoram_size },
241 MEMORY_END
242
243
244 static PORT_READ_START( readport )
245 { 0x20, 0x20, input_port_0_r },
246 { 0x21, 0x21, input_port_1_r },
247 { 0x22, 0x22, input_port_2_r },
248 { 0x23, 0x23, input_port_3_r },
249 { 0x24, 0x24, input_port_4_r },
250 { 0x25, 0x25, pending_command_r },
251 PORT_END
252
253
254 static PORT_WRITE_START( writeport )
255 { 0x20, 0x20, sound_command_w },
256 { 0x21, 0x21, pipedrm_bankswitch_w },
257 { 0x22, 0x25, fromance_scroll_w },
258 PORT_END
259
260
261
262 /*************************************
263 *
264 * Sound CPU memory handlers
265 *
266 *************************************/
267
268 static MEMORY_READ_START( sound_readmem )
269 { 0x0000, 0x77ff, MRA_ROM },
270 { 0x7800, 0x7fff, MRA_RAM },
271 { 0x8000, 0xffff, MRA_BANK2 },
272 MEMORY_END
273
274
275 static MEMORY_WRITE_START( sound_writemem )
276 { 0x0000, 0x77ff, MWA_ROM },
277 { 0x7800, 0x7fff, MWA_RAM },
278 { 0x8000, 0xffff, MWA_ROM },
279 MEMORY_END
280
281
282 static PORT_READ_START( sound_readport )
283 { 0x16, 0x16, sound_command_r },
284 { 0x18, 0x18, YM2610_status_port_0_A_r },
285 { 0x1a, 0x1a, YM2610_status_port_0_B_r },
286 PORT_END
287
288
289 static PORT_WRITE_START( sound_writeport )
290 { 0x04, 0x04, sound_bankswitch_w },
291 { 0x17, 0x17, pending_command_clear_w },
292 { 0x18, 0x18, YM2610_control_port_0_A_w },
293 { 0x19, 0x19, YM2610_data_port_0_A_w },
294 { 0x1a, 0x1a, YM2610_control_port_0_B_w },
295 { 0x1b, 0x1b, YM2610_data_port_0_B_w },
296 PORT_END
297
298
299 static PORT_READ_START( hatris_sound_readport )
300 { 0x04, 0x04, sound_command_r },
301 { 0x05, 0x05, pending_command_r },
302 { 0x08, 0x08, YM2608_status_port_0_A_r },
303 { 0x0a, 0x0a, YM2608_status_port_0_B_r },
304 PORT_END
305
306
307 static PORT_WRITE_START( hatris_sound_writeport )
308 { 0x02, 0x02, YM2608_control_port_0_B_w },
309 { 0x03, 0x03, YM2608_data_port_0_B_w },
310 { 0x05, 0x05, pending_command_clear_w },
311 { 0x08, 0x08, YM2608_control_port_0_A_w },
312 { 0x09, 0x09, YM2608_data_port_0_A_w },
313 { 0x0a, 0x0a, YM2608_control_port_0_B_w },
314 { 0x0b, 0x0b, YM2608_data_port_0_B_w },
315 PORT_END
316
317
318
319 /*************************************
320 *
321 * Port definitions
322 *
323 *************************************/
324
325 INPUT_PORTS_START( pipedrm )
326 PORT_START /* $20 */
327 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER1 )
328 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER1 )
329 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER1 )
330 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER1 )
331 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER1 )
332 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER1 )
333 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
334 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
335
336 PORT_START /* $21 */
337 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER2 )
338 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER2 )
339 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER2 )
340 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER2 )
341 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
342 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
343 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
344 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
345
346 PORT_START /* $22 */
347 PORT_DIPNAME( 0x0f, 0x0f, DEF_STR( Coin_A ))
348 PORT_DIPSETTING( 0x06, DEF_STR( 5C_1C ))
349 PORT_DIPSETTING( 0x07, DEF_STR( 4C_1C ))
350 PORT_DIPSETTING( 0x08, DEF_STR( 3C_1C ))
351 PORT_DIPSETTING( 0x09, DEF_STR( 2C_1C ))
352 PORT_DIPSETTING( 0x04, "6 Coins/4 Credits" )
353 PORT_DIPSETTING( 0x03, DEF_STR( 4C_3C ))
354 PORT_DIPSETTING( 0x0f, DEF_STR( 1C_1C ))
355 PORT_DIPSETTING( 0x02, "5 Coins/6 Credits" )
356 PORT_DIPSETTING( 0x01, DEF_STR( 4C_5C ))
357 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ))
358 /* PORT_DIPSETTING( 0x05, DEF_STR( 2C_3C ))*/
359 PORT_DIPSETTING( 0x0e, DEF_STR( 1C_2C ))
360 PORT_DIPSETTING( 0x0d, DEF_STR( 1C_3C ))
361 PORT_DIPSETTING( 0x0c, DEF_STR( 1C_4C ))
362 PORT_DIPSETTING( 0x0b, DEF_STR( 1C_5C ))
363 PORT_DIPSETTING( 0x0a, DEF_STR( 1C_6C ))
364 PORT_DIPNAME( 0xf0, 0xf0, DEF_STR( Coin_B ))
365 PORT_DIPSETTING( 0x60, DEF_STR( 5C_1C ))
366 PORT_DIPSETTING( 0x70, DEF_STR( 4C_1C ))
367 PORT_DIPSETTING( 0x80, DEF_STR( 3C_1C ))
368 PORT_DIPSETTING( 0x90, DEF_STR( 2C_1C ))
369 PORT_DIPSETTING( 0x40, "6 Coins/4 Credits" )
370 PORT_DIPSETTING( 0x30, DEF_STR( 4C_3C ))
371 PORT_DIPSETTING( 0xf0, DEF_STR( 1C_1C ))
372 PORT_DIPSETTING( 0x20, "5 Coins/6 Credits" )
373 PORT_DIPSETTING( 0x10, DEF_STR( 4C_5C ))
374 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ))
375 /* PORT_DIPSETTING( 0x50, DEF_STR( 2C_3C ))*/
376 PORT_DIPSETTING( 0xe0, DEF_STR( 1C_2C ))
377 PORT_DIPSETTING( 0xd0, DEF_STR( 1C_3C ))
378 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_4C ))
379 PORT_DIPSETTING( 0xb0, DEF_STR( 1C_5C ))
380 PORT_DIPSETTING( 0xa0, DEF_STR( 1C_6C ))
381
382 PORT_START /* $23 */
383 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ))
384 PORT_DIPSETTING( 0x02, "Easy" )
385 PORT_DIPSETTING( 0x03, "Normal" )
386 PORT_DIPSETTING( 0x01, "Hard" )
387 PORT_DIPSETTING( 0x00, "Super" )
388 PORT_DIPNAME( 0x0c, 0x04, DEF_STR( Lives ))
389 PORT_DIPSETTING( 0x0c, "1" )
390 PORT_DIPSETTING( 0x08, "2" )
391 PORT_DIPSETTING( 0x04, "3" )
392 PORT_DIPSETTING( 0x00, "4" )
393 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Demo_Sounds ))
394 PORT_DIPSETTING( 0x00, DEF_STR( Off ))
395 PORT_DIPSETTING( 0x10, DEF_STR( On ))
396 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Flip_Screen ))
397 PORT_DIPSETTING( 0x20, DEF_STR( Off ))
398 PORT_DIPSETTING( 0x00, DEF_STR( On ))
399 PORT_DIPNAME( 0x40, 0x40, "Training Mode" )
400 PORT_DIPSETTING( 0x00, DEF_STR( Off ))
401 PORT_DIPSETTING( 0x40, DEF_STR( On ))
402 PORT_SERVICE( 0x80, IP_ACTIVE_LOW )
403
404 PORT_START /* $24 */
405 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
406 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
407 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
408 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
409 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
410 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
411 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 )
412 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
413 INPUT_PORTS_END
414
415
416 INPUT_PORTS_START( hatris )
417 PORT_START /* $20 */
418 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER1 )
419 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER1 )
420 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER1 )
421 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER1 )
422 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER1 )
423 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER1 )
424 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 | IPF_PLAYER1 )
425 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
426
427 PORT_START /* $21 */
428 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER2 )
429 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER2 )
430 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER2 )
431 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER2 )
432 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
433 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
434 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 | IPF_PLAYER2 )
435 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
436
437 PORT_START /* $22 */
438 PORT_DIPNAME( 0x0f, 0x00, DEF_STR( Coin_A ))
439 PORT_DIPSETTING( 0x09, DEF_STR( 5C_1C ))
440 PORT_DIPSETTING( 0x08, DEF_STR( 4C_1C ))
441 PORT_DIPSETTING( 0x07, DEF_STR( 3C_1C ))
442 PORT_DIPSETTING( 0x06, DEF_STR( 2C_1C ))
443 PORT_DIPSETTING( 0x0b, "6 Coins/4 Credits" )
444 PORT_DIPSETTING( 0x0c, DEF_STR( 4C_3C ))
445 PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ))
446 PORT_DIPSETTING( 0x0d, "5 Coins/6 Credits" )
447 PORT_DIPSETTING( 0x0e, DEF_STR( 4C_5C ))
448 PORT_DIPSETTING( 0x0f, DEF_STR( 2C_3C ))
449 /* PORT_DIPSETTING( 0x0a, DEF_STR( 2C_3C ))*/
450 PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ))
451 PORT_DIPSETTING( 0x02, DEF_STR( 1C_3C ))
452 PORT_DIPSETTING( 0x03, DEF_STR( 1C_4C ))
453 PORT_DIPSETTING( 0x04, DEF_STR( 1C_5C ))
454 PORT_DIPSETTING( 0x05, DEF_STR( 1C_6C ))
455 PORT_DIPNAME( 0xf0, 0x00, DEF_STR( Coin_B ))
456 PORT_DIPSETTING( 0x90, DEF_STR( 5C_1C ))
457 PORT_DIPSETTING( 0x80, DEF_STR( 4C_1C ))
458 PORT_DIPSETTING( 0x70, DEF_STR( 3C_1C ))
459 PORT_DIPSETTING( 0x60, DEF_STR( 2C_1C ))
460 PORT_DIPSETTING( 0xb0, "6 Coins/4 Credits" )
461 PORT_DIPSETTING( 0xc0, DEF_STR( 4C_3C ))
462 PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ))
463 PORT_DIPSETTING( 0xd0, "5 Coins/6 Credits" )
464 PORT_DIPSETTING( 0xe0, DEF_STR( 4C_5C ))
465 PORT_DIPSETTING( 0xf0, DEF_STR( 2C_3C ))
466 /* PORT_DIPSETTING( 0xa0, DEF_STR( 2C_3C ))*/
467 PORT_DIPSETTING( 0x10, DEF_STR( 1C_2C ))
468 PORT_DIPSETTING( 0x20, DEF_STR( 1C_3C ))
469 PORT_DIPSETTING( 0x30, DEF_STR( 1C_4C ))
470 PORT_DIPSETTING( 0x40, DEF_STR( 1C_5C ))
471 PORT_DIPSETTING( 0x50, DEF_STR( 1C_6C ))
472
473 PORT_START /* $23 */
474 PORT_DIPNAME( 0x03, 0x00, "Difficulty 1" )
475 PORT_DIPSETTING( 0x01, "Easy" )
476 PORT_DIPSETTING( 0x00, "Normal" )
477 PORT_DIPSETTING( 0x02, "Hard" )
478 PORT_DIPSETTING( 0x03, "Super" )
479 PORT_DIPNAME( 0x0c, 0x00, "Difficulty 2" )
480 PORT_DIPSETTING( 0x04, "Easy" )
481 PORT_DIPSETTING( 0x00, "Normal" )
482 PORT_DIPSETTING( 0x08, "Hard" )
483 PORT_DIPSETTING( 0x0c, "Super" )
484 PORT_SERVICE( 0x10, IP_ACTIVE_HIGH )
485 PORT_DIPNAME( 0x20, 0x00, DEF_STR( Flip_Screen ))
486 PORT_DIPSETTING( 0x00, DEF_STR( Off ))
487 PORT_DIPSETTING( 0x20, DEF_STR( On ))
488 PORT_DIPNAME( 0x40, 0x00, DEF_STR( Demo_Sounds ))
489 PORT_DIPSETTING( 0x40, DEF_STR( Off ))
490 PORT_DIPSETTING( 0x00, DEF_STR( On ))
491 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
492
493 PORT_START /* $24 */
494 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
495 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
496 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
497 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
498 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED )
499 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED )
500 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 )
501 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
502 INPUT_PORTS_END
503
504
505
506 /*************************************
507 *
508 * Graphics definitions
509 *
510 *************************************/
511
512 static struct GfxLayout bglayout =
513 {
514 8,4,
515 RGN_FRAC(1,1),
516 4,
517 { 0, 1, 2, 3 },
518 { 4, 0, 12, 8, 20, 16, 28, 24 },
519 { 0*32, 1*32, 2*32, 3*32 },
520 8*16
521 };
522
523
524 static struct GfxLayout splayout =
525 {
526 16,16,
527 RGN_FRAC(1,1),
528 4,
529 { 0, 1, 2, 3 },
530 { 12, 8, 28, 24, 4, 0, 20, 16, 44, 40, 60, 56, 36, 32, 52, 48 },
531 { 0*64, 1*64, 2*64, 3*64, 4*64, 5*64, 6*64, 7*64,
532 8*64, 9*64, 10*64, 11*64, 12*64, 13*64, 14*64, 15*64 },
533 8*128
534 };
535
536
537 static struct GfxDecodeInfo gfxdecodeinfo[] =
538 {
539 { REGION_GFX1, 0, &bglayout, 0, 64 },
540 { REGION_GFX2, 0, &bglayout, 0, 64 },
541 { REGION_GFX3, 0, &splayout, 1024, 32 },
542 { -1 } /* end of array */
543 };
544
545
546 static struct GfxDecodeInfo gfxdecodeinfo_hatris[] =
547 {
548 { REGION_GFX1, 0, &bglayout, 0, 128 },
549 { REGION_GFX2, 0, &bglayout, 0, 128 },
550 { -1 } /* end of array */
551 };
552
553
554
555 /*************************************
556 *
557 * Sound definitions
558 *
559 *************************************/
560
irqhandler(int irq)561 static void irqhandler(int irq)
562 {
563 cpu_set_irq_line(1, 0, irq ? ASSERT_LINE : CLEAR_LINE);
564 }
565
566
567 static struct YM2608interface ym2608_interface =
568 {
569 1,
570 8000000, /* 8 MHz */
571 { 50 },
572 { 0 },
573 { 0 },
574 { 0 },
575 { 0 },
576 { irqhandler },
577 { REGION_SOUND1 },
578 { YM3012_VOL(100,MIXER_PAN_LEFT,100,MIXER_PAN_RIGHT) }
579 };
580
581
582 static struct YM2610interface ym2610_interface =
583 {
584 1,
585 8000000, /* 8 MHz */
586 { 50 },
587 { 0 },
588 { 0 },
589 { 0 },
590 { 0 },
591 { irqhandler },
592 { REGION_SOUND1 },
593 { REGION_SOUND2 },
594 { YM3012_VOL(100,MIXER_PAN_LEFT,100,MIXER_PAN_RIGHT) }
595 };
596
597
598
599 /*************************************
600 *
601 * Machine driver
602 *
603 *************************************/
604
605 static MACHINE_DRIVER_START( pipedrm )
606
607 /* basic machine hardware */
608 MDRV_CPU_ADD(Z80,12000000/2)
MDRV_CPU_MEMORY(readmem,writemem)609 MDRV_CPU_MEMORY(readmem,writemem)
610 MDRV_CPU_PORTS(readport,writeport)
611 MDRV_CPU_VBLANK_INT(irq0_line_hold,1)
612
613 MDRV_CPU_ADD(Z80,14318000/4)
614 MDRV_CPU_FLAGS(CPU_AUDIO_CPU)
615 MDRV_CPU_MEMORY(sound_readmem,sound_writemem)
616 MDRV_CPU_PORTS(sound_readport,sound_writeport)
617
618 MDRV_FRAMES_PER_SECOND(60)
619 MDRV_VBLANK_DURATION(DEFAULT_REAL_60HZ_VBLANK_DURATION)
620
621 MDRV_MACHINE_INIT(pipedrm)
622
623 /* video hardware */
624 MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
625 MDRV_SCREEN_SIZE(44*8, 30*8)
626 MDRV_VISIBLE_AREA(0*8, 44*8-1, 0*8, 30*8-1)
627 MDRV_GFXDECODE(gfxdecodeinfo)
628 MDRV_PALETTE_LENGTH(2048)
629
630 MDRV_VIDEO_START(fromance)
631 MDRV_VIDEO_UPDATE(pipedrm)
632
633 /* sound hardware */
634 MDRV_SOUND_ADD(YM2610, ym2610_interface)
635 MACHINE_DRIVER_END
636
637
638 static MACHINE_DRIVER_START( hatris )
639
640 /* basic machine hardware */
641 MDRV_CPU_ADD(Z80,12000000/2)
642 MDRV_CPU_MEMORY(readmem,writemem)
643 MDRV_CPU_PORTS(readport,writeport)
644 MDRV_CPU_VBLANK_INT(irq0_line_hold,1)
645
646 MDRV_CPU_ADD(Z80,14318000/4)
647 MDRV_CPU_FLAGS(CPU_AUDIO_CPU)
648 MDRV_CPU_MEMORY(sound_readmem,sound_writemem)
649 MDRV_CPU_PORTS(hatris_sound_readport,hatris_sound_writeport)
650
651 MDRV_FRAMES_PER_SECOND(60)
652 MDRV_VBLANK_DURATION(DEFAULT_REAL_60HZ_VBLANK_DURATION)
653
654 MDRV_MACHINE_INIT(pipedrm)
655
656 /* video hardware */
657 MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
658 MDRV_SCREEN_SIZE(44*8, 30*8)
659 MDRV_VISIBLE_AREA(0*8, 44*8-1, 0*8, 30*8-1)
660 MDRV_GFXDECODE(gfxdecodeinfo_hatris)
661 MDRV_PALETTE_LENGTH(2048)
662
663 MDRV_VIDEO_START(fromance)
664 MDRV_VIDEO_UPDATE(fromance)
665
666 /* sound hardware */
667 MDRV_SOUND_ADD(YM2608, ym2608_interface)
668 MACHINE_DRIVER_END
669
670
671
672 /*************************************
673 *
674 * ROM definitions
675 *
676 *************************************/
677
678 ROM_START( pipedrm )
679 ROM_REGION( 0x20000, REGION_CPU1, 0 )
680 ROM_LOAD( "01.u12", 0x00000, 0x08000, CRC(9fe261fb) SHA1(57beeeade8809be0a71086f55b14b1676c0b3759) )
681 ROM_LOAD( "02.u11", 0x10000, 0x10000, CRC(c8209b67) SHA1(cca7356d75e8091b07e3328aef523ff452abbcd8) )
682
683 ROM_REGION( 0x20000, REGION_CPU2, 0 )
684 ROM_LOAD( "4", 0x00000, 0x08000, CRC(497fad4c) SHA1(f151543a0c4a1d6d5d2de5e1dc12fd59dabcf1a8) )
685 ROM_LOAD( "3", 0x10000, 0x10000, CRC(4800322a) SHA1(a616c497ac18351b68b8307050a2a62c717a7873) )
686
687 ROM_REGION( 0x100000, REGION_GFX1, ROMREGION_DISPOSE )
688 ROM_LOAD( "s73", 0x000000, 0x80000, CRC(63f4e10c) SHA1(ba935490578887080d8b16508fa6191236a8fea6) )
689 ROM_LOAD( "s72", 0x080000, 0x80000, CRC(4e669e97) SHA1(1de8a8cd8f8f69fa86b8fe2c73c6997e7a89c706) )
690
691 ROM_REGION( 0x100000, REGION_GFX2, ROMREGION_DISPOSE )
692 ROM_LOAD( "s71", 0x000000, 0x80000, CRC(431485ee) SHA1(70a2ba5338598db9fcd9ef2be46e5cc2fd9510ee) )
693 ROM_COPY( REGION_GFX1, 0x080000, 0x080000, 0x80000 )
694
695 ROM_REGION( 0x080000, REGION_GFX3, ROMREGION_DISPOSE )
696 ROM_LOAD16_BYTE( "a30", 0x00000, 0x40000, CRC(50bc5e98) SHA1(b351af780d04e67a560935a9eeaedf597ac5bb1f) )
697 ROM_LOAD16_BYTE( "a29", 0x00001, 0x40000, CRC(a240a448) SHA1(d64169258e91eb09e8685bcdd96b16bf56e82ef1) )
698
699 ROM_REGION( 0x80000, REGION_SOUND1, 0 )
700 ROM_LOAD( "g72", 0x00000, 0x80000, CRC(dc3d14be) SHA1(4220f3fd13487dd861ac84b1b0d3e92125b3cc19) )
701
702 ROM_REGION( 0x80000, REGION_SOUND2, 0 )
703 ROM_LOAD( "g71", 0x00000, 0x80000, CRC(488e2fd1) SHA1(8ef8ceb2bd36a245138802f51babf62f17c30942) )
704 ROM_END
705
706
707 ROM_START( pipedrmj )
708 ROM_REGION( 0x20000, REGION_CPU1, 0 )
709 ROM_LOAD( "1", 0x00000, 0x08000, CRC(dbfac46b) SHA1(98ddfaed61de28b238964445572eb398b9dd03c7) )
710 ROM_LOAD( "2", 0x10000, 0x10000, CRC(b7adb99a) SHA1(fdab2b99e86aa0b6b17ec95556222e5211ba55e9) )
711
712 ROM_REGION( 0x20000, REGION_CPU2, 0 )
713 ROM_LOAD( "4", 0x00000, 0x08000, CRC(497fad4c) SHA1(f151543a0c4a1d6d5d2de5e1dc12fd59dabcf1a8) )
714 ROM_LOAD( "3", 0x10000, 0x10000, CRC(4800322a) SHA1(a616c497ac18351b68b8307050a2a62c717a7873) )
715
716 ROM_REGION( 0x100000, REGION_GFX1, ROMREGION_DISPOSE )
717 ROM_LOAD( "s73", 0x000000, 0x80000, CRC(63f4e10c) SHA1(ba935490578887080d8b16508fa6191236a8fea6) )
718 ROM_LOAD( "s72", 0x080000, 0x80000, CRC(4e669e97) SHA1(1de8a8cd8f8f69fa86b8fe2c73c6997e7a89c706) )
719
720 ROM_REGION( 0x100000, REGION_GFX2, ROMREGION_DISPOSE )
721 ROM_LOAD( "s71", 0x000000, 0x80000, CRC(431485ee) SHA1(70a2ba5338598db9fcd9ef2be46e5cc2fd9510ee) )
722 ROM_COPY( REGION_GFX1, 0x080000, 0x080000, 0x80000 )
723
724 ROM_REGION( 0x080000, REGION_GFX3, ROMREGION_DISPOSE )
725 ROM_LOAD16_BYTE( "a30", 0x00000, 0x40000, CRC(50bc5e98) SHA1(b351af780d04e67a560935a9eeaedf597ac5bb1f) )
726 ROM_LOAD16_BYTE( "a29", 0x00001, 0x40000, CRC(a240a448) SHA1(d64169258e91eb09e8685bcdd96b16bf56e82ef1) )
727
728 ROM_REGION( 0x80000, REGION_SOUND1, 0 )
729 ROM_LOAD( "g72", 0x00000, 0x80000, CRC(dc3d14be) SHA1(4220f3fd13487dd861ac84b1b0d3e92125b3cc19) )
730
731 ROM_REGION( 0x80000, REGION_SOUND2, 0 )
732 ROM_LOAD( "g71", 0x00000, 0x80000, CRC(488e2fd1) SHA1(8ef8ceb2bd36a245138802f51babf62f17c30942) )
733 ROM_END
734
735
736 ROM_START( hatris )
737 ROM_REGION( 0x10000, REGION_CPU1, 0 )
738 ROM_LOAD( "2-ic79.bin", 0x00000, 0x08000, CRC(bbcaddbf) SHA1(7f01493dadfed87112644a8ef77ae58fa273980d) )
739
740 ROM_REGION( 0x10000, REGION_CPU2, 0 )
741 ROM_LOAD( "1-ic81.bin", 0x00000, 0x08000, CRC(db25e166) SHA1(3538963d092967311d0a216b1e33ea39389b0d87) )
742
743 ROM_REGION( 0x80000, REGION_GFX1, ROMREGION_DISPOSE )
744 ROM_LOAD( "b0-ic56.bin", 0x00000, 0x20000, CRC(34f337a4) SHA1(ad74bb3fbfd16c9e92daa1cf5c5e522d11ba7dfb) )
745 ROM_FILL( 0x20000, 0x20000, 0 )
746 ROM_LOAD( "b1-ic73.bin", 0x40000, 0x08000, CRC(6351d0ba) SHA1(6d6b2e23f0569e625414de11803955df60bbbd48) )
747 ROM_FILL( 0x48000, 0x18000, 0 )
748
749 ROM_REGION( 0x40000, REGION_GFX2, ROMREGION_DISPOSE )
750 ROM_LOAD( "a0-ic55.bin", 0x00000, 0x20000, CRC(7b7bc619) SHA1(b661c772e33aa7352dcdc20c4a9a84ed25ff89d7) )
751 ROM_LOAD( "a1-ic60.bin", 0x20000, 0x20000, CRC(f74d4168) SHA1(9ac433c4ce61fe402334aa97d32a51cfac634c46) )
752
753 ROM_REGION( 0x20000, REGION_SOUND1, 0 )
754 ROM_LOAD( "pc-ic53.bin", 0x00000, 0x20000, CRC(07147712) SHA1(97692186e85f3a4a19dbd1bd95ed882e903a3c4a) )
755 ROM_END
756
757
758
759 /*************************************
760 *
761 * Driver initialization
762 *
763 *************************************/
764
765 static DRIVER_INIT( pipedrm )
766 {
767 /* sprite RAM lives at the end of palette RAM */
768 spriteram = install_mem_read_handler(0, 0xcc00, 0xcfff, MRA_RAM);
769 spriteram = install_mem_write_handler(0, 0xcc00, 0xcfff, MWA_RAM);
770 spriteram_size = 0x400;
771 }
772
773
DRIVER_INIT(hatris)774 static DRIVER_INIT( hatris )
775 {
776 install_port_write_handler(0, 0x20, 0x20, sound_command_nonmi_w);
777 install_port_write_handler(0, 0x21, 0x21, fromance_gfxreg_w);
778 }
779
780
781
782 /*************************************
783 *
784 * Game drivers
785 *
786 *************************************/
787
788 GAME( 1990, pipedrm, 0, pipedrm, pipedrm, pipedrm, ROT0, "Video System Co.", "Pipe Dream (US)" )
789 GAME( 1990, pipedrmj, pipedrm, pipedrm, pipedrm, pipedrm, ROT0, "Video System Co.", "Pipe Dream (Japan)" )
790 GAME( 1990, hatris, 0, hatris, hatris, hatris, ROT0, "Video System Co.", "Hatris (Japan)" )
791