1 /*
2 Taito L-System
3
4 Monoprocessor games (1 main z80, no sound z80)
5 - Plotting
6 - Puzznic
7 - Palamedes
8 - Cachat / Tube-It
9 - American Horseshoes
10 - Play Girls
11 - Play Girls 2
12 - Cuby Bop
13
14 Dual processor games
15 - Kuri Kinton
16 - Evil Stone
17
18 Triple processor games (2 main z80, 1 sound z80)
19 - Fighting hawk
20 - Raimais
21 - Champion Wrestler
22
23 Notes:
24 - the system uses RAM based characters, which aren't really supported by the
25 TileMap system, so we have to tilemap_mark_all_tiles_dirty() to compensate
26 - kurikina has some debug dip switches (invulnerability, slow motion) so might
27 be a prototype. It also doesn't have service mode (or has it disabled).
28
29 TODO:
30 - champwr ADPCM interface is not entirely understood, it involves also addresses
31 0xd000 and 0xe000, and maybe also YM2203 port B.
32 - slowdowns in fhawk, probably the interrupts have to be generated at a
33 different time.
34 - plgirls doesn't work without a kludge because of an interrupt issue. This
35 happens because the program enables interrupts before setting IM2, so the
36 interrupt vector is interpreted as IM0, which is obviously bogus.
37 - The puzznic protection is worked around, but I'm not happy with it
38 (the 68705-returned values are wrong, I'm sure of that).
39 - A bunch of control registers are simply ignored
40 - The source of irqs 0 and 1 is unknown, while 2 is vblank (0 is
41 usually ignored by the program, 1 leads to reading the
42 ports... maybe vbl-in, vbl-out and hblank ?).
43 - Text Plane colours are only right in Cuby Bop once you've started a game
44 & reset
45 - Scrolling in Cuby Bop's Game seems incorrect.
46
47 */
48
49
50 #include "driver.h"
51 #include "cpu/z80/z80.h"
52 #include "sndhrdw/taitosnd.h"
53
54 VIDEO_EOF( taitol );
55 VIDEO_START( taitol );
56 VIDEO_UPDATE( taitol );
57
58 void taitol_chardef14_m(int offset);
59 void taitol_chardef15_m(int offset);
60 void taitol_chardef16_m(int offset);
61 void taitol_chardef17_m(int offset);
62 void taitol_chardef1c_m(int offset);
63 void taitol_chardef1d_m(int offset);
64 void taitol_chardef1e_m(int offset);
65 void taitol_chardef1f_m(int offset);
66 void taitol_bg18_m(int offset);
67 void taitol_bg19_m(int offset);
68 void taitol_char1a_m(int offset);
69 void taitol_obj1b_m(int offset);
70
71 WRITE_HANDLER( taitol_control_w );
72 READ_HANDLER( taitol_control_r );
73 WRITE_HANDLER( horshoes_bankg_w );
74 WRITE_HANDLER( taitol_bankc_w );
75 READ_HANDLER( taitol_bankc_r );
76
77
78
79 static void (*rambank_modify_notifiers[12])(int) =
80 {
81 taitol_chardef14_m, /* 14*/
82 taitol_chardef15_m, /* 15*/
83 taitol_chardef16_m, /* 16*/
84 taitol_chardef17_m, /* 17*/
85
86 taitol_bg18_m, /* 18*/
87 taitol_bg19_m, /* 19*/
88 taitol_char1a_m, /* 1a*/
89 taitol_obj1b_m, /* 1b*/
90
91 taitol_chardef1c_m, /* 1c*/
92 taitol_chardef1d_m, /* 1d*/
93 taitol_chardef1e_m, /* 1e*/
94 taitol_chardef1f_m, /* 1f*/
95 };
96
97 static void (*current_notifier[4])(int);
98 static unsigned char *current_base[4];
99
100 static int cur_rombank, cur_rombank2, cur_rambank[4];
101 static int irq_adr_table[3];
102 static int irq_enable = 0;
103
104 unsigned char *taitol_rambanks;
105
106 static unsigned char *palette_ram;
107 static unsigned char *empty_ram;
108 static unsigned char *shared_ram;
109
110 static mem_read_handler porte0_r;
111 static mem_read_handler porte1_r;
112 static mem_read_handler portf0_r;
113 static mem_read_handler portf1_r;
114
palette_notifier(int addr)115 static void palette_notifier(int addr)
116 {
117 unsigned char *p = palette_ram + (addr & ~1);
118 unsigned char byte0 = *p++;
119 unsigned char byte1 = *p;
120
121 unsigned int b = (byte1 & 0xf) * 0x11;
122 unsigned int g = ((byte0 & 0xf0)>>4) * 0x11;
123 unsigned int r = (byte0 & 0xf) * 0x11;
124
125 /* addr &= 0x1ff;*/
126
127 if(addr > 0x200)
128 {
129 log_cb(RETRO_LOG_DEBUG, LOGPRE "Large palette ? %03x (%04x)\n", addr, activecpu_get_pc());
130 }
131 else
132 {
133 /* r = g = b = ((addr & 0x1e) != 0)*255;*/
134 palette_set_color(addr/2, r, g, b);
135 }
136 }
137
machine_init(void)138 static void machine_init(void)
139 {
140 int i;
141
142 taitol_rambanks = auto_malloc(0x1000*12);
143 palette_ram = auto_malloc(0x1000);
144 empty_ram = auto_malloc(0x1000);
145
146 for(i=0;i<3;i++)
147 irq_adr_table[i] = 0;
148
149 irq_enable = 0;
150
151 for(i=0;i<4;i++)
152 {
153 cur_rambank[i] = 0x80;
154 current_base[i] = palette_ram;
155 current_notifier[i] = palette_notifier;
156 cpu_setbank(2+i, current_base[i]);
157 }
158 cur_rombank = cur_rombank2 = 0;
159 cpu_setbank(1, memory_region(REGION_CPU1) + 0x10000);
160
161 for(i=0;i<512;i++)
162 {
163 decodechar(Machine->gfx[2], i, taitol_rambanks,
164 Machine->drv->gfxdecodeinfo[2].gfxlayout);
165 decodechar(Machine->gfx[2], i+512, taitol_rambanks + 0x4000,
166 Machine->drv->gfxdecodeinfo[2].gfxlayout);
167 }
168 }
169
170
MACHINE_INIT(fhawk)171 static MACHINE_INIT( fhawk )
172 {
173 machine_init();
174 porte0_r = 0;
175 porte1_r = 0;
176 portf0_r = 0;
177 portf1_r = 0;
178 }
179
MACHINE_INIT(raimais)180 static MACHINE_INIT( raimais )
181 {
182 machine_init();
183 porte0_r = 0;
184 porte1_r = 0;
185 portf0_r = 0;
186 portf1_r = 0;
187 }
188
MACHINE_INIT(champwr)189 static MACHINE_INIT( champwr )
190 {
191 machine_init();
192 porte0_r = 0;
193 porte1_r = 0;
194 portf0_r = 0;
195 portf1_r = 0;
196 }
197
198
MACHINE_INIT(kurikint)199 static MACHINE_INIT( kurikint )
200 {
201 machine_init();
202 porte0_r = 0;
203 porte1_r = 0;
204 portf0_r = 0;
205 portf1_r = 0;
206 }
207
MACHINE_INIT(evilston)208 static MACHINE_INIT( evilston )
209 {
210 machine_init();
211 porte0_r = 0;
212 porte1_r = 0;
213 portf0_r = 0;
214 portf1_r = 0;
215 }
216
MACHINE_INIT(puzznic)217 static MACHINE_INIT( puzznic )
218 {
219 machine_init();
220 porte0_r = input_port_0_r;
221 porte1_r = input_port_1_r;
222 portf0_r = input_port_2_r;
223 portf1_r = input_port_3_r;
224 }
225
MACHINE_INIT(plotting)226 static MACHINE_INIT( plotting )
227 {
228 machine_init();
229 porte0_r = input_port_0_r;
230 porte1_r = input_port_1_r;
231 portf0_r = input_port_2_r;
232 portf1_r = input_port_3_r;
233 }
234
MACHINE_INIT(palamed)235 static MACHINE_INIT( palamed )
236 {
237 machine_init();
238 porte0_r = input_port_0_r;
239 porte1_r = 0;
240 portf0_r = input_port_1_r;
241 portf1_r = 0;
242 }
243
MACHINE_INIT(cachat)244 static MACHINE_INIT( cachat )
245 {
246 machine_init();
247 porte0_r = input_port_0_r;
248 porte1_r = 0;
249 portf0_r = input_port_1_r;
250 portf1_r = 0;
251 }
252
MACHINE_INIT(horshoes)253 static MACHINE_INIT( horshoes )
254 {
255 machine_init();
256 porte0_r = input_port_0_r;
257 porte1_r = input_port_1_r;
258 portf0_r = input_port_2_r;
259 portf1_r = input_port_3_r;
260 }
261
262
263
INTERRUPT_GEN(vbl_interrupt)264 static INTERRUPT_GEN( vbl_interrupt )
265 {
266 /* kludge to make plgirls boot */
267 if (cpunum_get_reg(0,Z80_IM) != 2) return;
268
269 /* What is really generating interrupts 0 and 1 is still to be found*/
270
271 if (cpu_getiloops() == 1 && (irq_enable & 1))
272 cpu_set_irq_line_and_vector(0, 0, HOLD_LINE, irq_adr_table[0]);
273 else if (cpu_getiloops() == 2 && (irq_enable & 2))
274 cpu_set_irq_line_and_vector(0, 0, HOLD_LINE, irq_adr_table[1]);
275 else if (cpu_getiloops() == 0 && (irq_enable & 4))
276 cpu_set_irq_line_and_vector(0, 0, HOLD_LINE, irq_adr_table[2]);
277 }
278
WRITE_HANDLER(irq_adr_w)279 static WRITE_HANDLER( irq_adr_w )
280 {
281 /*logerror("irq_adr_table[%d] = %02x\n",offset,data);*/
282 irq_adr_table[offset] = data;
283 }
284
READ_HANDLER(irq_adr_r)285 static READ_HANDLER( irq_adr_r )
286 {
287 return irq_adr_table[offset];
288 }
289
WRITE_HANDLER(irq_enable_w)290 static WRITE_HANDLER( irq_enable_w )
291 {
292 /*logerror("irq_enable = %02x\n",data);*/
293 irq_enable = data;
294 }
295
READ_HANDLER(irq_enable_r)296 static READ_HANDLER( irq_enable_r )
297 {
298 return irq_enable;
299 }
300
301
WRITE_HANDLER(rombankswitch_w)302 static WRITE_HANDLER( rombankswitch_w )
303 {
304 static int high = 0;
305 if(cur_rombank != data)
306 {
307 if(data>high)
308 {
309 high = data;
310 log_cb(RETRO_LOG_DEBUG, LOGPRE "New rom size : %x\n", (high+1)*0x2000);
311 }
312
313 /* log_cb(RETRO_LOG_DEBUG, LOGPRE "robs %d, %02x (%04x)\n", offset, data, activecpu_get_pc());*/
314 cur_rombank = data;
315 cpu_setbank(1, memory_region(REGION_CPU1)+0x10000+0x2000*cur_rombank);
316 }
317 }
318
WRITE_HANDLER(rombank2switch_w)319 static WRITE_HANDLER( rombank2switch_w )
320 {
321 static int high = 0;
322
323 data &= 0xf;
324
325 if(cur_rombank2 != data)
326 {
327 if(data>high)
328 {
329 high = data;
330 log_cb(RETRO_LOG_DEBUG, LOGPRE "New rom2 size : %x\n", (high+1)*0x4000);
331 }
332
333 /* log_cb(RETRO_LOG_DEBUG, LOGPRE "robs2 %02x (%04x)\n", data, activecpu_get_pc());*/
334
335 cur_rombank2 = data;
336 cpu_setbank(6, memory_region(REGION_CPU3)+0x10000+0x4000*cur_rombank2);
337 }
338 }
339
READ_HANDLER(rombankswitch_r)340 static READ_HANDLER( rombankswitch_r )
341 {
342 return cur_rombank;
343 }
344
READ_HANDLER(rombank2switch_r)345 static READ_HANDLER( rombank2switch_r )
346 {
347 return cur_rombank2;
348 }
349
WRITE_HANDLER(rambankswitch_w)350 static WRITE_HANDLER( rambankswitch_w )
351 {
352 if(cur_rambank[offset]!=data)
353 {
354 cur_rambank[offset]=data;
355 /*logerror("rabs %d, %02x (%04x)\n", offset, data, activecpu_get_pc());*/
356 if(data>=0x14 && data<=0x1f)
357 {
358 data -= 0x14;
359 current_notifier[offset] = rambank_modify_notifiers[data];
360 current_base[offset] = taitol_rambanks+0x1000*data;
361 }
362 else if (data == 0x80)
363 {
364 current_notifier[offset] = palette_notifier;
365 current_base[offset] = palette_ram;
366 }
367 else
368 {
369 log_cb(RETRO_LOG_DEBUG, LOGPRE "unknown rambankswitch %d, %02x (%04x)\n", offset, data, activecpu_get_pc());
370 current_notifier[offset] = 0;
371 current_base[offset] = empty_ram;
372 }
373 cpu_setbank(2+offset, current_base[offset]);
374 }
375 }
376
READ_HANDLER(rambankswitch_r)377 static READ_HANDLER( rambankswitch_r )
378 {
379 return cur_rambank[offset];
380 }
381
WRITE_HANDLER(bank0_w)382 static WRITE_HANDLER( bank0_w )
383 {
384 if(current_base[0][offset]!=data)
385 {
386 current_base[0][offset] = data;
387 if(current_notifier[0])
388 current_notifier[0](offset);
389 }
390 }
391
WRITE_HANDLER(bank1_w)392 static WRITE_HANDLER( bank1_w )
393 {
394 if(current_base[1][offset]!=data)
395 {
396 current_base[1][offset] = data;
397 if(current_notifier[1])
398 current_notifier[1](offset);
399 }
400 }
401
WRITE_HANDLER(bank2_w)402 static WRITE_HANDLER( bank2_w )
403 {
404 if(current_base[2][offset]!=data)
405 {
406 current_base[2][offset] = data;
407 if(current_notifier[2])
408 current_notifier[2](offset);
409 }
410 }
411
WRITE_HANDLER(bank3_w)412 static WRITE_HANDLER( bank3_w )
413 {
414 if(current_base[3][offset]!=data)
415 {
416 current_base[3][offset] = data;
417 if(current_notifier[3])
418 current_notifier[3](offset);
419 }
420 }
421
WRITE_HANDLER(control2_w)422 static WRITE_HANDLER( control2_w )
423 {
424 coin_lockout_w(0,~data & 0x01);
425 coin_lockout_w(1,~data & 0x02);
426 coin_counter_w(0,data & 0x04);
427 coin_counter_w(1,data & 0x08);
428 }
429
430 static int extport;
431
READ_HANDLER(portA_r)432 static READ_HANDLER( portA_r )
433 {
434 if (extport == 0) return porte0_r(0);
435 else return porte1_r(0);
436 }
437
READ_HANDLER(portB_r)438 static READ_HANDLER( portB_r )
439 {
440 if (extport == 0) return portf0_r(0);
441 else return portf1_r(0);
442 }
443
READ_HANDLER(ym2203_data0_r)444 static READ_HANDLER( ym2203_data0_r )
445 {
446 extport = 0;
447 return YM2203_read_port_0_r(offset);
448 }
449
READ_HANDLER(ym2203_data1_r)450 static READ_HANDLER( ym2203_data1_r )
451 {
452 extport = 1;
453 return YM2203_read_port_0_r(offset);
454 }
455
456 static int *mcu_reply;
457 static int mcu_pos = 0, mcu_reply_len = 0;
458 static int last_data_adr, last_data;
459
460 static int puzznic_mcu_reply[] = { 0x50, 0x1f, 0xb6, 0xba, 0x06, 0x03, 0x47, 0x05, 0x00 };
461
WRITE_HANDLER(mcu_data_w)462 static WRITE_HANDLER( mcu_data_w )
463 {
464 last_data = data;
465 last_data_adr = activecpu_get_pc();
466 /* log_cb(RETRO_LOG_DEBUG, LOGPRE "mcu write %02x (%04x)\n", data, activecpu_get_pc());*/
467 switch(data)
468 {
469 case 0x43:
470 mcu_pos = 0;
471 mcu_reply = puzznic_mcu_reply;
472 mcu_reply_len = sizeof(puzznic_mcu_reply);
473 break;
474 }
475 }
476
WRITE_HANDLER(mcu_control_w)477 static WRITE_HANDLER( mcu_control_w )
478 {
479 /* log_cb(RETRO_LOG_DEBUG, LOGPRE "mcu control %02x (%04x)\n", data, activecpu_get_pc());*/
480 }
481
READ_HANDLER(mcu_data_r)482 static READ_HANDLER( mcu_data_r )
483 {
484 /* log_cb(RETRO_LOG_DEBUG, LOGPRE "mcu read (%04x) [%02x, %04x]\n", activecpu_get_pc(), last_data, last_data_adr);*/
485 if(mcu_pos==mcu_reply_len)
486 return 0;
487
488 return mcu_reply[mcu_pos++];
489 }
490
READ_HANDLER(mcu_control_r)491 static READ_HANDLER( mcu_control_r )
492 {
493 /* log_cb(RETRO_LOG_DEBUG, LOGPRE "mcu control read (%04x)\n", activecpu_get_pc());*/
494 return 0x1;
495 }
496
497 #if 0
498 static WRITE_HANDLER( sound_w )
499 {
500 log_cb(RETRO_LOG_DEBUG, LOGPRE "Sound_w %02x (%04x)\n", data, activecpu_get_pc());
501 }
502 #endif
503
READ_HANDLER(shared_r)504 static READ_HANDLER( shared_r )
505 {
506 return shared_ram[offset];
507 }
508
WRITE_HANDLER(shared_w)509 static WRITE_HANDLER( shared_w )
510 {
511 shared_ram[offset] = data;
512 }
513
514 static int mux_ctrl = 0;
515
READ_HANDLER(mux_r)516 static READ_HANDLER( mux_r )
517 {
518 switch(mux_ctrl)
519 {
520 case 0:
521 return input_port_0_r(0);
522 case 1:
523 return input_port_1_r(0);
524 case 2:
525 return input_port_2_r(0);
526 case 3:
527 return input_port_3_r(0);
528 case 7:
529 return input_port_4_r(0);
530 default:
531 log_cb(RETRO_LOG_DEBUG, LOGPRE "Mux read from unknown port %d (%04x)\n", mux_ctrl, activecpu_get_pc());
532 return 0xff;
533 }
534 }
535
WRITE_HANDLER(mux_w)536 static WRITE_HANDLER( mux_w )
537 {
538 switch(mux_ctrl)
539 {
540 case 4:
541 control2_w(0, data);
542 break;
543 default:
544 log_cb(RETRO_LOG_DEBUG, LOGPRE "Mux write to unknown port %d, %02x (%04x)\n", mux_ctrl, data, activecpu_get_pc());
545 }
546 }
547
WRITE_HANDLER(mux_ctrl_w)548 static WRITE_HANDLER( mux_ctrl_w )
549 {
550 mux_ctrl = data;
551 }
552
553
554
555
556 static int champwr_adpcm_start;
557
WRITE_HANDLER(champwr_adpcm_lo_w)558 static WRITE_HANDLER( champwr_adpcm_lo_w )
559 {
560 champwr_adpcm_start = (champwr_adpcm_start & 0xff00ff) | (data << 8);
561 }
562
WRITE_HANDLER(champwr_adpcm_hi_w)563 static WRITE_HANDLER( champwr_adpcm_hi_w )
564 {
565 UINT8 *rom = memory_region(REGION_SOUND1);
566 int romlen = memory_region_length(REGION_SOUND1);
567 int length;
568 int i;
569
570 champwr_adpcm_start = ((champwr_adpcm_start & 0x00ffff) | (data << 16)) & (romlen-1);
571 i = champwr_adpcm_start + 0x20;
572 while (i < romlen && (rom[i] || rom[i+1] || rom[i+2] || rom[i+3]))
573 i += 4;
574 length = i - champwr_adpcm_start;
575
576 ADPCM_play(0,champwr_adpcm_start,length*2);
577 }
578
579
580
581 static int trackx,tracky;
582
READ_HANDLER(horshoes_tracky_reset_r)583 static READ_HANDLER( horshoes_tracky_reset_r )
584 {
585 /* reset the trackball counter */
586 tracky = readinputport(4);
587 return 0;
588 }
589
READ_HANDLER(horshoes_trackx_reset_r)590 static READ_HANDLER( horshoes_trackx_reset_r )
591 {
592 /* reset the trackball counter */
593 trackx = readinputport(5);
594 return 0;
595 }
596
READ_HANDLER(horshoes_tracky_lo_r)597 static READ_HANDLER( horshoes_tracky_lo_r )
598 {
599 return (readinputport(4) - tracky) & 0xff;
600 }
601
READ_HANDLER(horshoes_tracky_hi_r)602 static READ_HANDLER( horshoes_tracky_hi_r )
603 {
604 return (readinputport(4) - tracky) >> 8;
605 }
606
READ_HANDLER(horshoes_trackx_lo_r)607 static READ_HANDLER( horshoes_trackx_lo_r )
608 {
609 return (readinputport(5) - trackx) & 0xff;
610 }
611
READ_HANDLER(horshoes_trackx_hi_r)612 static READ_HANDLER( horshoes_trackx_hi_r )
613 {
614 return (readinputport(5) - trackx) >> 8;
615 }
616
617
618
619
620 #define COMMON_BANKS_READ \
621 { 0x0000, 0x5fff, MRA_ROM }, \
622 { 0x6000, 0x7fff, MRA_BANK1 }, \
623 { 0xc000, 0xcfff, MRA_BANK2 }, \
624 { 0xd000, 0xdfff, MRA_BANK3 }, \
625 { 0xe000, 0xefff, MRA_BANK4 }, \
626 { 0xf000, 0xfdff, MRA_BANK5 }, \
627 { 0xfe00, 0xfe03, taitol_bankc_r }, \
628 { 0xfe04, 0xfe04, taitol_control_r }, \
629 { 0xff00, 0xff02, irq_adr_r }, \
630 { 0xff03, 0xff03, irq_enable_r }, \
631 { 0xff04, 0xff07, rambankswitch_r }, \
632 { 0xff08, 0xff08, rombankswitch_r }
633
634 #define COMMON_BANKS_WRITE \
635 { 0x0000, 0x7fff, MWA_ROM }, \
636 { 0xc000, 0xcfff, bank0_w }, \
637 { 0xd000, 0xdfff, bank1_w }, \
638 { 0xe000, 0xefff, bank2_w }, \
639 { 0xf000, 0xfdff, bank3_w }, \
640 { 0xfe00, 0xfe03, taitol_bankc_w }, \
641 { 0xfe04, 0xfe04, taitol_control_w }, \
642 { 0xff00, 0xff02, irq_adr_w }, \
643 { 0xff03, 0xff03, irq_enable_w }, \
644 { 0xff04, 0xff07, rambankswitch_w }, \
645 { 0xff08, 0xff08, rombankswitch_w }
646
647 #define COMMON_SINGLE_READ \
648 { 0xa000, 0xa000, YM2203_status_port_0_r }, \
649 { 0xa001, 0xa001, ym2203_data0_r }, \
650 { 0xa003, 0xa003, ym2203_data1_r }, \
651 { 0x8000, 0x9fff, MRA_RAM }
652
653 #define COMMON_SINGLE_WRITE \
654 { 0xa000, 0xa000, YM2203_control_port_0_w }, \
655 { 0xa001, 0xa001, YM2203_write_port_0_w }, \
656 { 0x8000, 0x9fff, MWA_RAM }
657
658
659
MEMORY_READ_START(fhawk_readmem)660 static MEMORY_READ_START( fhawk_readmem )
661 COMMON_BANKS_READ,
662 { 0x8000, 0x9fff, MRA_RAM },
663 { 0xa000, 0xbfff, MRA_RAM },
664 MEMORY_END
665
666 static MEMORY_WRITE_START( fhawk_writemem )
667 COMMON_BANKS_WRITE,
668 { 0x8000, 0x9fff, MWA_RAM, &shared_ram },
669 { 0xa000, 0xbfff, MWA_RAM },
670 MEMORY_END
671
672 static MEMORY_READ_START( fhawk_2_readmem )
673 { 0x0000, 0x7fff, MRA_ROM },
674 { 0x8000, 0xbfff, MRA_BANK6 },
675 { 0xc800, 0xc800, MRA_NOP },
676 { 0xc801, 0xc801, taitosound_comm_r },
677 { 0xe000, 0xffff, shared_r },
678 { 0xd000, 0xd000, input_port_0_r },
679 { 0xd001, 0xd001, input_port_1_r },
680 { 0xd002, 0xd002, input_port_2_r },
681 { 0xd003, 0xd003, input_port_3_r },
682 { 0xd007, 0xd007, input_port_4_r },
683 MEMORY_END
684
685 static MEMORY_WRITE_START( fhawk_2_writemem )
686 { 0x0000, 0xbfff, MWA_ROM },
687 { 0xc000, 0xc000, rombank2switch_w },
688 { 0xc800, 0xc800, taitosound_port_w },
689 { 0xc801, 0xc801, taitosound_comm_w },
690 { 0xd000, 0xd000, MWA_NOP }, /* Direct copy of input port 0*/
691 { 0xd004, 0xd004, control2_w },
692 { 0xd005, 0xd006, MWA_NOP }, /* Always 0*/
693 { 0xe000, 0xffff, shared_w },
694 MEMORY_END
695
696 static MEMORY_READ_START( fhawk_3_readmem )
697 { 0x0000, 0x3fff, MRA_ROM },
698 { 0x4000, 0x7fff, MRA_BANK7 },
699 { 0x8000, 0x9fff, MRA_RAM },
700 { 0xe000, 0xe000, MRA_NOP },
701 { 0xe001, 0xe001, taitosound_slave_comm_r },
702 { 0xf000, 0xf000, YM2203_status_port_0_r },
703 MEMORY_END
704
705 static MEMORY_WRITE_START( fhawk_3_writemem )
706 { 0x0000, 0x7fff, MWA_ROM },
707 { 0x8000, 0x9fff, MWA_RAM },
708 { 0xe000, 0xe000, taitosound_slave_port_w },
709 { 0xe001, 0xe001, taitosound_slave_comm_w },
710 { 0xf000, 0xf000, YM2203_control_port_0_w },
711 { 0xf001, 0xf001, YM2203_write_port_0_w },
712 MEMORY_END
713
714 static MEMORY_READ_START( raimais_readmem )
715 COMMON_BANKS_READ,
716 { 0x8000, 0x87ff, MRA_RAM },
717 { 0x8800, 0x8800, mux_r },
718 { 0x8801, 0x8801, MRA_NOP }, /* Watchdog or interrupt ack (value ignored)*/
719 { 0x8c00, 0x8c00, MRA_NOP },
720 { 0x8c01, 0x8c01, taitosound_comm_r },
721 { 0xa000, 0xbfff, MRA_RAM },
722 MEMORY_END
723 static MEMORY_WRITE_START( raimais_writemem )
724 COMMON_BANKS_WRITE,
725 { 0x8000, 0x87ff, MWA_RAM, &shared_ram },
726 { 0x8800, 0x8800, mux_w },
727 { 0x8801, 0x8801, mux_ctrl_w },
728 { 0x8c00, 0x8c00, taitosound_port_w },
729 { 0x8c01, 0x8c01, taitosound_comm_w },
730 { 0xa000, 0xbfff, MWA_RAM },
731 MEMORY_END
732
733 static MEMORY_READ_START( raimais_2_readmem )
734 { 0x0000, 0xbfff, MRA_ROM },
735 { 0xc000, 0xdfff, MRA_RAM },
736 { 0xe000, 0xe7ff, shared_r },
737 MEMORY_END
738
739 static MEMORY_WRITE_START( raimais_2_writemem )
740 { 0x0000, 0xbfff, MWA_ROM },
741 { 0xc000, 0xdfff, MWA_RAM },
742 { 0xe000, 0xe7ff, shared_w },
743 MEMORY_END
744
745
746 static MEMORY_READ_START( raimais_3_readmem )
747 { 0x0000, 0x3fff, MRA_ROM },
748 { 0x4000, 0x7fff, MRA_BANK7 },
749 { 0xc000, 0xdfff, MRA_RAM },
750 { 0xe000, 0xe000, YM2610_status_port_0_A_r },
751 { 0xe001, 0xe001, YM2610_read_port_0_r },
752 { 0xe002, 0xe002, YM2610_status_port_0_B_r },
753 { 0xe200, 0xe200, MRA_NOP },
754 { 0xe201, 0xe201, taitosound_slave_comm_r },
755 MEMORY_END
756
757 static WRITE_HANDLER( sound_bankswitch_w )
758 {
759 unsigned char *RAM = memory_region(REGION_CPU2);
760 int banknum = (data - 1) & 3;
761
762 cpu_setbank (7, &RAM [0x10000 + (banknum * 0x4000)]);
763 }
764
MEMORY_WRITE_START(raimais_3_writemem)765 static MEMORY_WRITE_START( raimais_3_writemem )
766 { 0x0000, 0x7fff, MWA_ROM },
767 { 0xc000, 0xdfff, MWA_RAM },
768 { 0xe000, 0xe000, YM2610_control_port_0_A_w },
769 { 0xe001, 0xe001, YM2610_data_port_0_A_w },
770 { 0xe002, 0xe002, YM2610_control_port_0_B_w },
771 { 0xe003, 0xe003, YM2610_data_port_0_B_w },
772 { 0xe200, 0xe200, taitosound_slave_port_w },
773 { 0xe201, 0xe201, taitosound_slave_comm_w },
774 { 0xe400, 0xe403, MWA_NOP }, /* pan */
775 { 0xe600, 0xe600, MWA_NOP }, /* ? */
776 { 0xee00, 0xee00, MWA_NOP }, /* ? */
777 { 0xf000, 0xf000, MWA_NOP }, /* ? */
778 { 0xf200, 0xf200, sound_bankswitch_w },
779 MEMORY_END
780
781
782 static MEMORY_READ_START( champwr_readmem )
783 COMMON_BANKS_READ,
784 { 0x8000, 0x9fff, MRA_RAM },
785 { 0xa000, 0xbfff, MRA_RAM },
786 MEMORY_END
787
788
789 static MEMORY_WRITE_START( champwr_writemem )
790 COMMON_BANKS_WRITE,
791 { 0x8000, 0x9fff, MWA_RAM },
792 { 0xa000, 0xbfff, MWA_RAM, &shared_ram },
793 MEMORY_END
794
795 static MEMORY_READ_START( champwr_2_readmem )
796 { 0x0000, 0x7fff, MRA_ROM },
797 { 0x8000, 0xbfff, MRA_BANK6 },
798 { 0xc000, 0xdfff, shared_r },
799 { 0xe000, 0xe000, input_port_0_r },
800 { 0xe001, 0xe001, input_port_1_r },
801 { 0xe002, 0xe002, input_port_2_r },
802 { 0xe003, 0xe003, input_port_3_r },
803 { 0xe007, 0xe007, input_port_4_r },
804 { 0xe008, 0xe00f, MRA_NOP },
805 { 0xe800, 0xe800, MRA_NOP },
806 { 0xe801, 0xe801, taitosound_comm_r },
807 { 0xf000, 0xf000, rombank2switch_r },
808 MEMORY_END
809
810 static MEMORY_WRITE_START( champwr_2_writemem )
811 { 0x0000, 0xbfff, MWA_ROM },
812 { 0xc000, 0xdfff, shared_w },
813 { 0xe000, 0xe000, MWA_NOP }, /* Watchdog*/
814 { 0xe004, 0xe004, control2_w },
815 { 0xe800, 0xe800, taitosound_port_w },
816 { 0xe801, 0xe801, taitosound_comm_w },
817 { 0xf000, 0xf000, rombank2switch_w },
818 MEMORY_END
819
820 static MEMORY_READ_START( champwr_3_readmem )
821 { 0x0000, 0x3fff, MRA_ROM },
822 { 0x4000, 0x7fff, MRA_BANK7 },
823 { 0x8000, 0x8fff, MRA_RAM },
824 { 0x9000, 0x9000, YM2203_status_port_0_r },
825 { 0xa000, 0xa000, MRA_NOP },
826 { 0xa001, 0xa001, taitosound_slave_comm_r },
827 MEMORY_END
828
829 static MEMORY_WRITE_START( champwr_3_writemem )
830 { 0x0000, 0x7fff, MWA_ROM },
831 { 0x8000, 0x8fff, MWA_RAM },
832 { 0x9000, 0x9000, YM2203_control_port_0_w },
833 { 0x9001, 0x9001, YM2203_write_port_0_w },
834 { 0xa000, 0xa000, taitosound_slave_port_w },
835 { 0xa001, 0xa001, taitosound_slave_comm_w },
836 { 0xb000, 0xb000, champwr_adpcm_hi_w },
837 { 0xc000, 0xc000, champwr_adpcm_lo_w },
838 { 0xd000, 0xd000, MWA_NOP }, /* ADPCM related */
839 { 0xe000, 0xe000, MWA_NOP }, /* ADPCM related */
840 MEMORY_END
841
842
843
844 static MEMORY_READ_START( kurikint_readmem )
845 COMMON_BANKS_READ,
846 { 0x8000, 0x9fff, MRA_RAM },
847 { 0xa000, 0xa7ff, MRA_RAM },
848 { 0xa800, 0xa800, mux_r },
849 { 0xa801, 0xa801, MRA_NOP }, /* Watchdog or interrupt ack (value ignored)*/
850 MEMORY_END
851
852 static MEMORY_WRITE_START( kurikint_writemem )
853 COMMON_BANKS_WRITE,
854 { 0x8000, 0x9fff, MWA_RAM },
855 { 0xa000, 0xa7ff, MWA_RAM, &shared_ram },
856 { 0xa800, 0xa800, mux_w },
857 { 0xa801, 0xa801, mux_ctrl_w },
858 MEMORY_END
859
860 static MEMORY_READ_START( kurikint_2_readmem )
861 { 0x0000, 0x7fff, MRA_ROM },
862 { 0xc000, 0xdfff, MRA_RAM },
863 { 0xe000, 0xe7ff, shared_r },
864 { 0xe800, 0xe800, YM2203_status_port_0_r },
865 #if 0
866 { 0xd000, 0xd000, input_port_0_r },
867 { 0xd001, 0xd001, input_port_1_r },
868 { 0xd002, 0xd002, input_port_2_r },
869 { 0xd003, 0xd003, input_port_3_r },
870 { 0xd007, 0xd007, input_port_4_r },
871 #endif
872 MEMORY_END
873
874 static MEMORY_WRITE_START( kurikint_2_writemem )
875 { 0x0000, 0x7fff, MWA_ROM },
876 { 0xc000, 0xdfff, MWA_RAM },
877 { 0xe000, 0xe7ff, shared_w },
878 { 0xe800, 0xe800, YM2203_control_port_0_w },
879 { 0xe801, 0xe801, YM2203_write_port_0_w },
880 #if 0
881 { 0xc000, 0xc000, rombank2switch_w },
882 #endif
883 MEMORY_END
884
885
886
887 static MEMORY_READ_START( puzznic_readmem )
888 COMMON_BANKS_READ,
889 COMMON_SINGLE_READ,
890 { 0xa800, 0xa800, MRA_NOP }, /* Watchdog*/
891 { 0xb000, 0xb7ff, MRA_RAM }, /* Wrong, used to overcome protection*/
892 { 0xb800, 0xb800, mcu_data_r },
893 { 0xb801, 0xb801, mcu_control_r },
894 MEMORY_END
895
896 static MEMORY_WRITE_START( puzznic_writemem )
897 COMMON_BANKS_WRITE,
898 COMMON_SINGLE_WRITE,
899 { 0xb000, 0xb7ff, MWA_RAM }, /* Wrong, used to overcome protection*/
900 { 0xb800, 0xb800, mcu_data_w },
901 { 0xb801, 0xb801, mcu_control_w },
902 { 0xbc00, 0xbc00, MWA_NOP }, /* Control register, function unknown*/
903 MEMORY_END
904
905
906 static MEMORY_READ_START( plotting_readmem )
907 COMMON_BANKS_READ,
908 COMMON_SINGLE_READ,
909 MEMORY_END
910
911 static MEMORY_WRITE_START( plotting_writemem )
912 COMMON_BANKS_WRITE,
913 COMMON_SINGLE_WRITE,
914 { 0xa800, 0xa800, MWA_NOP }, /* Watchdog or interrupt ack*/
915 { 0xb800, 0xb800, MWA_NOP }, /* Control register, function unknown*/
916 MEMORY_END
917
918
919 static MEMORY_READ_START( palamed_readmem )
920 COMMON_BANKS_READ,
921 COMMON_SINGLE_READ,
922 { 0xa800, 0xa800, input_port_2_r },
923 { 0xa801, 0xa801, input_port_3_r },
924 { 0xa802, 0xa802, input_port_4_r },
925 { 0xb001, 0xb001, MRA_NOP }, /* Watchdog or interrupt ack*/
926 MEMORY_END
927
928 static MEMORY_WRITE_START( palamed_writemem )
929 COMMON_BANKS_WRITE,
930 COMMON_SINGLE_WRITE,
931 { 0xa803, 0xa803, MWA_NOP }, /* Control register, function unknown*/
932 { 0xb000, 0xb000, MWA_NOP }, /* Control register, function unknown (copy of 8822)*/
933 MEMORY_END
934
935
936 static MEMORY_READ_START( cachat_readmem )
937 COMMON_BANKS_READ,
938 COMMON_SINGLE_READ,
939 { 0xa800, 0xa800, input_port_2_r },
940 { 0xa801, 0xa801, input_port_3_r },
941 { 0xa802, 0xa802, input_port_4_r },
942 { 0xb001, 0xb001, MRA_NOP }, /* Watchdog or interrupt ack (value ignored)*/
943 { 0xfff8, 0xfff8, rombankswitch_r },
944 MEMORY_END
945
946 static MEMORY_WRITE_START( cachat_writemem )
947 COMMON_BANKS_WRITE,
948 COMMON_SINGLE_WRITE,
949 { 0xa803, 0xa803, MWA_NOP }, /* Control register, function unknown*/
950 { 0xb000, 0xb000, MWA_NOP }, /* Control register, function unknown*/
951 { 0xfff8, 0xfff8, rombankswitch_w },
952 MEMORY_END
953
954
955 static MEMORY_READ_START( horshoes_readmem )
956 COMMON_BANKS_READ,
957 COMMON_SINGLE_READ,
958 { 0xa800, 0xa800, horshoes_tracky_lo_r },
959 { 0xa802, 0xa802, horshoes_tracky_reset_r },
960 { 0xa803, 0xa803, horshoes_trackx_reset_r },
961 { 0xa804, 0xa804, horshoes_tracky_hi_r },
962 { 0xa808, 0xa808, horshoes_trackx_lo_r },
963 { 0xa80c, 0xa80c, horshoes_trackx_hi_r },
964 { 0xb801, 0xb801, MRA_NOP }, /* Watchdog or interrupt ack*/
965 MEMORY_END
966
967 static MEMORY_WRITE_START( horshoes_writemem )
968 COMMON_BANKS_WRITE,
969 COMMON_SINGLE_WRITE,
970 { 0xb802, 0xb802, horshoes_bankg_w },
971 { 0xbc00, 0xbc00, MWA_NOP },
972 MEMORY_END
973
974 static MEMORY_READ_START( evilston_readmem )
975 COMMON_BANKS_READ,
976 { 0x8000, 0x9fff, MRA_RAM },
977 { 0xa000, 0xa7ff, MRA_RAM },
978 { 0xa800, 0xa800, input_port_0_r },
979 { 0xa801, 0xa801, input_port_1_r },
980 { 0xa802, 0xa802, input_port_2_r },
981 { 0xa803, 0xa803, input_port_3_r },
982 { 0xa807, 0xa807, input_port_4_r },
983 MEMORY_END
984
985
986
987 static WRITE_HANDLER (evilston_snd_w)
988 {
989 shared_ram[0x7fe]=data&0x7f;
990 cpu_set_irq_line(1,IRQ_LINE_NMI,PULSE_LINE);
991 }
992
993
994
995
MEMORY_WRITE_START(evilston_writemem)996 static MEMORY_WRITE_START( evilston_writemem )
997 COMMON_BANKS_WRITE,
998 { 0x8000, 0x9fff, MWA_RAM },
999 { 0xa000, 0xa7ff, MWA_RAM,&shared_ram},/*shared2_w },*/
1000 { 0xa800, 0xa800, MWA_RAM },/*watchdog ?*/
1001 { 0xa804, 0xa804, MWA_RAM}, /*coin couters/locks ?*/
1002
1003 MEMORY_END
1004
1005 static MEMORY_READ_START( evilston_2_readmem )
1006 { 0x0000, 0xbfff, MRA_ROM },
1007 { 0xc000, 0xdfff, MRA_RAM },
1008 { 0xe000, 0xe7ff, shared_r},/*shared_r },*/
1009 { 0xe800, 0xe800, YM2203_status_port_0_r },
1010 { 0xf000, 0xf7ff, MRA_BANK7 },
1011 MEMORY_END
1012
1013 static MEMORY_WRITE_START( evilston_2_writemem )
1014 { 0x0000, 0xbfff, MWA_ROM },
1015 { 0xc000, 0xdfff, MWA_RAM },
1016 { 0xe000, 0xe7ff, shared_w },
1017 { 0xe800, 0xe800, YM2203_control_port_0_w },
1018 { 0xe801, 0xe801, YM2203_write_port_0_w },
1019 MEMORY_END
1020
1021
1022
1023 /***********************************************************
1024 INPUT PORTS, DIPs
1025 ***********************************************************/
1026
1027 #define TAITO_COINAGE_WORLD_8 \
1028 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) ) \
1029 PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) ) \
1030 PORT_DIPSETTING( 0x10, DEF_STR( 3C_1C ) ) \
1031 PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) ) \
1032 PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) ) \
1033 PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) ) \
1034 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_2C ) ) \
1035 PORT_DIPSETTING( 0x80, DEF_STR( 1C_3C ) ) \
1036 PORT_DIPSETTING( 0x40, DEF_STR( 1C_4C ) ) \
1037 PORT_DIPSETTING( 0x00, DEF_STR( 1C_6C ) )
1038
1039 #define TAITO_COINAGE_JAPAN_8 \
1040 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) ) \
1041 PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) ) \
1042 PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) ) \
1043 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) ) \
1044 PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) ) \
1045 PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) ) \
1046 PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) ) \
1047 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) ) \
1048 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) ) \
1049 PORT_DIPSETTING( 0x80, DEF_STR( 1C_2C ) )
1050
1051 #define TAITO_COINAGE_JAPAN_NEW_8 \
1052 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) ) \
1053 PORT_DIPSETTING( 0x00, DEF_STR( 3C_1C ) ) \
1054 PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) ) \
1055 PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) ) \
1056 PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) ) \
1057 PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) ) \
1058 PORT_DIPSETTING( 0x00, DEF_STR( 3C_1C ) ) \
1059 PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) ) \
1060 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) ) \
1061 PORT_DIPSETTING( 0x80, DEF_STR( 1C_2C ) )
1062
1063 #define TAITO_COINAGE_US_8 \
1064 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coinage ) ) \
1065 PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) ) \
1066 PORT_DIPSETTING( 0x10, DEF_STR( 3C_1C ) ) \
1067 PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) ) \
1068 PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) ) \
1069 PORT_DIPNAME( 0xc0, 0xc0, "Price to Continue" ) \
1070 PORT_DIPSETTING( 0x00, DEF_STR( 3C_1C ) ) \
1071 PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) ) \
1072 PORT_DIPSETTING( 0x80, DEF_STR( 1C_1C ) ) \
1073 PORT_DIPSETTING( 0xc0, "Same as Start" )
1074
1075 #define TAITO_DIFFICULTY_8 \
1076 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) ) \
1077 PORT_DIPSETTING( 0x02, "Easy" ) \
1078 PORT_DIPSETTING( 0x03, "Medium" ) \
1079 PORT_DIPSETTING( 0x01, "Hard" ) \
1080 PORT_DIPSETTING( 0x00, "Hardest" )
1081
1082 #define TAITO_L_PLAYERS_INPUT( player ) \
1083 PORT_START \
1084 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | player ) \
1085 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | player ) \
1086 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | player ) \
1087 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | player ) \
1088 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | player ) \
1089 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | player ) \
1090 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
1091 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1092
1093 #define TAITO_L_SYSTEM_INPUT( type, impulse ) \
1094 PORT_START \
1095 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_TILT ) \
1096 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE1 ) \
1097 PORT_BIT_IMPULSE( 0x04, type, IPT_COIN1, impulse ) \
1098 PORT_BIT_IMPULSE( 0x08, type, IPT_COIN2, impulse ) \
1099 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
1100 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
1101 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 ) \
1102 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
1103
1104 #define TAITO_L_DSWA_2_4 \
1105 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) ) \
1106 PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) \
1107 PORT_DIPSETTING( 0x00, DEF_STR( On ) ) \
1108 PORT_SERVICE( 0x04, IP_ACTIVE_LOW ) \
1109 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) ) \
1110 PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) \
1111 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
1112
1113 INPUT_PORTS_START( fhawk )
1114 PORT_START
1115 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
1116 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
1117 PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
1118 TAITO_L_DSWA_2_4
1119 TAITO_COINAGE_WORLD_8
1120
1121 PORT_START
1122 TAITO_DIFFICULTY_8
1123 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unused ) ) /* all in manual*/
1124 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
1125 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1126 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unused ) )
1127 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
1128 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1129 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) )
1130 PORT_DIPSETTING( 0x30, "3" )
1131 PORT_DIPSETTING( 0x20, "4" )
1132 PORT_DIPSETTING( 0x10, "5" )
1133 PORT_DIPSETTING( 0x00, "6" )
1134 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) )
1135 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
1136 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1137 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) )
1138 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
1139 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1140
1141 TAITO_L_PLAYERS_INPUT( IPF_PLAYER1 )
1142
1143 TAITO_L_PLAYERS_INPUT( IPF_PLAYER2 )
1144
1145 TAITO_L_SYSTEM_INPUT( IP_ACTIVE_LOW, 4 )
1146 INPUT_PORTS_END
1147
1148 INPUT_PORTS_START( fhawkj )
1149 PORT_START
1150 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
1151 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
1152 PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
1153 TAITO_L_DSWA_2_4
1154 TAITO_COINAGE_JAPAN_8
1155
1156 PORT_START
1157 TAITO_DIFFICULTY_8
1158 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unused ) ) /* all in manual*/
1159 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
1160 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1161 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unused ) )
1162 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
1163 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1164 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) )
1165 PORT_DIPSETTING( 0x30, "3" )
1166 PORT_DIPSETTING( 0x20, "4" )
1167 PORT_DIPSETTING( 0x10, "5" )
1168 PORT_DIPSETTING( 0x00, "6" )
1169 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) )
1170 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
1171 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1172 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) )
1173 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
1174 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1175
1176 TAITO_L_PLAYERS_INPUT( IPF_PLAYER1 )
1177
1178 TAITO_L_PLAYERS_INPUT( IPF_PLAYER2 )
1179
1180 TAITO_L_SYSTEM_INPUT( IP_ACTIVE_LOW, 4 )
1181 INPUT_PORTS_END
1182
1183 INPUT_PORTS_START( raimais )
1184 PORT_START
1185 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
1186 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
1187 PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
1188 TAITO_L_DSWA_2_4
1189 TAITO_COINAGE_JAPAN_8
1190
1191 PORT_START
1192 TAITO_DIFFICULTY_8
1193 PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) )
1194 PORT_DIPSETTING( 0x08, "80k and 160k" )
1195 PORT_DIPSETTING( 0x0c, "80k only" )
1196 PORT_DIPSETTING( 0x04, "160k only" )
1197 PORT_DIPSETTING( 0x00, "None" )
1198 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) )
1199 PORT_DIPSETTING( 0x30, "3" )
1200 PORT_DIPSETTING( 0x20, "4" )
1201 PORT_DIPSETTING( 0x10, "5" )
1202 PORT_DIPSETTING( 0x00, "6" )
1203 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
1204 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
1205 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1206 PORT_DIPNAME( 0x80, 0x00, "Allow Continue" )
1207 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
1208 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1209
1210 TAITO_L_PLAYERS_INPUT( IPF_PLAYER1 )
1211
1212 TAITO_L_PLAYERS_INPUT( IPF_PLAYER2 )
1213
1214 TAITO_L_SYSTEM_INPUT( IP_ACTIVE_HIGH, 1 )
1215 INPUT_PORTS_END
1216
1217 #define CHAMPWR_DSWB \
1218 PORT_START \
1219 TAITO_DIFFICULTY_8 \
1220 PORT_DIPNAME( 0x0c, 0x0c, "Time" ) \
1221 PORT_DIPSETTING( 0x08, "2 minutes" ) \
1222 PORT_DIPSETTING( 0x0c, "3 minutes" ) \
1223 PORT_DIPSETTING( 0x04, "4 minutes" ) \
1224 PORT_DIPSETTING( 0x00, "5 minutes" ) \
1225 PORT_DIPNAME( 0x30, 0x30, "1 minute Lenght" ) \
1226 PORT_DIPSETTING( 0x00, "30 sec" ) \
1227 PORT_DIPSETTING( 0x10, "40 sec" ) \
1228 PORT_DIPSETTING( 0x30, "50 sec" ) \
1229 PORT_DIPSETTING( 0x20, "60 sec" ) \
1230 PORT_DIPNAME( 0x40, 0x40, "Allow Continue" ) \
1231 PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) \
1232 PORT_DIPSETTING( 0x40, DEF_STR( On ) ) \
1233 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) ) \
1234 PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) \
1235 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1236
1237 #define CHAMPWR_INPUTS \
1238 PORT_START \
1239 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER1 ) \
1240 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER1 ) \
1241 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 ) \
1242 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 ) \
1243 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 ) \
1244 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 ) \
1245 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_TILT ) \
1246 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 ) \
1247 \
1248 PORT_START \
1249 PORT_BIT_IMPULSE( 0x01, IP_ACTIVE_LOW, IPT_COIN2, 1 ) \
1250 PORT_BIT_IMPULSE( 0x02, IP_ACTIVE_LOW, IPT_COIN1, 1 ) \
1251 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
1252 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
1253 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
1254 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
1255 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
1256 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
1257 \
1258 PORT_START \
1259 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER2 ) \
1260 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER2 ) \
1261 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER2 ) \
1262 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER2 ) \
1263 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER1 ) \
1264 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER1 ) \
1265 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER1 ) \
1266 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER1 )
1267
1268 INPUT_PORTS_START( champwr )
1269 PORT_START
1270 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unused ) ) /* all 2 in manual*/
1271 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
1272 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1273 TAITO_L_DSWA_2_4
1274 TAITO_COINAGE_WORLD_8
1275
1276 CHAMPWR_DSWB
1277
1278 CHAMPWR_INPUTS
1279 INPUT_PORTS_END
1280
1281 INPUT_PORTS_START( champwrj )
1282 PORT_START
1283 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unused ) )
1284 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
1285 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1286 TAITO_L_DSWA_2_4
1287 TAITO_COINAGE_JAPAN_8
1288
1289 CHAMPWR_DSWB
1290
1291 CHAMPWR_INPUTS
1292 INPUT_PORTS_END
1293
1294 INPUT_PORTS_START( champwru )
1295 PORT_START
1296 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unused ) )
1297 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
1298 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1299 TAITO_L_DSWA_2_4
1300 TAITO_COINAGE_US_8
1301
1302 CHAMPWR_DSWB
1303
1304 CHAMPWR_INPUTS
1305 INPUT_PORTS_END
1306
1307 #define KURIKIN_DSWB \
1308 PORT_START \
1309 TAITO_DIFFICULTY_8 \
1310 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) \
1311 PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) \
1312 PORT_DIPSETTING( 0x00, DEF_STR( On ) ) \
1313 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) \
1314 PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) \
1315 PORT_DIPSETTING( 0x00, DEF_STR( On ) ) \
1316 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) \
1317 PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) \
1318 PORT_DIPSETTING( 0x00, DEF_STR( On ) ) \
1319 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) \
1320 PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) \
1321 PORT_DIPSETTING( 0x00, DEF_STR( On ) ) \
1322 PORT_DIPNAME( 0x40, 0x40, "Bosses' messages" ) \
1323 PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) \
1324 PORT_DIPSETTING( 0x40, DEF_STR( On ) ) \
1325 PORT_DIPNAME( 0x80, 0x80, "Allow Continue" ) \
1326 PORT_DIPSETTING( 0x80, "5 Times" ) \
1327 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1328
1329 INPUT_PORTS_START( kurikint )
1330 PORT_START
1331 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
1332 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
1333 PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
1334 TAITO_L_DSWA_2_4
1335 TAITO_COINAGE_WORLD_8
1336
1337 KURIKIN_DSWB
1338
1339 TAITO_L_PLAYERS_INPUT( IPF_PLAYER1 )
1340
1341 TAITO_L_PLAYERS_INPUT( IPF_PLAYER2 )
1342
1343 TAITO_L_SYSTEM_INPUT( IP_ACTIVE_HIGH, 4 )
1344 INPUT_PORTS_END
1345
1346 INPUT_PORTS_START( kurikinj )
1347 PORT_START
1348 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
1349 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
1350 PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
1351 TAITO_L_DSWA_2_4
1352 TAITO_COINAGE_JAPAN_8
1353
1354 KURIKIN_DSWB
1355
1356 TAITO_L_PLAYERS_INPUT( IPF_PLAYER1 )
1357
1358 TAITO_L_PLAYERS_INPUT( IPF_PLAYER2 )
1359
1360 TAITO_L_SYSTEM_INPUT( IP_ACTIVE_HIGH, 4 )
1361 INPUT_PORTS_END
1362
1363 INPUT_PORTS_START( kurikina )
1364 PORT_START
1365 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
1366 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
1367 PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
1368 PORT_DIPNAME( 0x02, 0x00, DEF_STR( Flip_Screen ) )
1369 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1370 PORT_DIPSETTING( 0x02, DEF_STR( On ) )
1371 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
1372 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
1373 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1374 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
1375 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
1376 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1377 TAITO_COINAGE_WORLD_8
1378
1379 PORT_START
1380 PORT_BITX( 0x01, 0x01, IPT_DIPSWITCH_NAME | IPF_CHEAT, "Level select", IP_KEY_NONE, IP_JOY_NONE )
1381 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
1382 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1383 PORT_BITX( 0x02, 0x02, IPT_DIPSWITCH_NAME | IPF_CHEAT, "Invulnerability", IP_KEY_NONE, IP_JOY_NONE )
1384 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
1385 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1386 PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Difficulty ) )
1387 PORT_DIPSETTING( 0x08, "Easy" )
1388 PORT_DIPSETTING( 0x0c, "Medium" )
1389 PORT_DIPSETTING( 0x04, "Hard" )
1390 PORT_DIPSETTING( 0x00, "Hardest" )
1391 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
1392 PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
1393 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1394 PORT_DIPNAME( 0x20, 0x20, "Bosses' messages" )
1395 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1396 PORT_DIPSETTING( 0x20, DEF_STR( On ) )
1397 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
1398 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
1399 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1400 PORT_BITX( 0x80, 0x80, IPT_DIPSWITCH_NAME | IPF_CHEAT, "Slow Motion", IP_KEY_NONE, IP_JOY_NONE )
1401 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
1402 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1403
1404 TAITO_L_PLAYERS_INPUT( IPF_PLAYER1 )
1405
1406 TAITO_L_PLAYERS_INPUT( IPF_PLAYER2 )
1407
1408 TAITO_L_SYSTEM_INPUT( IP_ACTIVE_HIGH, 4 )
1409 INPUT_PORTS_END
1410
1411 INPUT_PORTS_START( puzznic )
1412 PORT_START
1413 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
1414 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
1415 PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
1416 TAITO_L_DSWA_2_4
1417 /* There is no Coin B in the Manuals */
1418 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coinage ) )
1419 PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) )
1420 PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
1421 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
1422 PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) )
1423 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) )
1424 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
1425 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1426 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) )
1427 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
1428 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1429
1430 PORT_START
1431 /* Difficulty controls the Timer Speed (how many seconds are there in a minute) */
1432 TAITO_DIFFICULTY_8
1433 PORT_DIPNAME( 0x0c, 0x0c, "Retries" )
1434 PORT_DIPSETTING( 0x00, "0" )
1435 PORT_DIPSETTING( 0x04, "1" )
1436 PORT_DIPSETTING( 0x0c, "2" )
1437 PORT_DIPSETTING( 0x08, "3" )
1438 PORT_DIPNAME( 0x10, 0x10, "Bombs" )
1439 PORT_DIPSETTING( 0x10, "0" )
1440 PORT_DIPSETTING( 0x00, "2" )
1441 PORT_DIPNAME( 0x20, 0x20, "Girls" )
1442 PORT_DIPSETTING( 0x00, DEF_STR( No ) )
1443 PORT_DIPSETTING( 0x20, DEF_STR( Yes ) )
1444 PORT_DIPNAME( 0xc0, 0xc0, "Terms of Replay" )
1445 PORT_DIPSETTING( 0x40, "Stage one step back/Timer continuous" )
1446 PORT_DIPSETTING( 0xc0, "Stage reset to start/Timer continuous" )
1447 PORT_DIPSETTING( 0x80, "Stage reset to start/Timer reset to start" )
1448 /* PORT_DIPSETTING( 0x00, "No Use" )*/
1449
1450 PORT_START
1451 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 )
1452 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN1 )
1453 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
1454 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER1 )
1455 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER1 )
1456 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER1 )
1457 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER1 )
1458 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER1 )
1459
1460 PORT_START
1461 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER1 )
1462 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
1463 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START2 )
1464 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER2 )
1465 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER2 )
1466 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER2 )
1467 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER2 )
1468 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
1469
1470 PORT_START /* Not read yet. There is no Coin_B in manual */
1471 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
1472 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
1473 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
1474 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
1475 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
1476 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
1477 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1478 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1479 INPUT_PORTS_END
1480
1481 INPUT_PORTS_START( plotting )
1482 PORT_START
1483 PORT_DIPNAME( 0x01, 0x01, "Max Players" )
1484 PORT_DIPSETTING( 0x00, "1" )
1485 PORT_DIPSETTING( 0x01, "2" )
1486 TAITO_L_DSWA_2_4
1487 TAITO_COINAGE_WORLD_8
1488
1489 PORT_START
1490 TAITO_DIFFICULTY_8
1491 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
1492 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
1493 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1494 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
1495 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
1496 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1497 PORT_DIPNAME( 0x30, 0x30, "Misses" )
1498 PORT_DIPSETTING( 0x20, "1" )
1499 PORT_DIPSETTING( 0x30, "2" )
1500 PORT_DIPSETTING( 0x10, "3" )
1501 PORT_DIPSETTING( 0x00, "4" )
1502 PORT_DIPNAME( 0x40, 0x40, "Allow Continue" )
1503 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1504 PORT_DIPSETTING( 0x40, DEF_STR( On ) )
1505 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
1506 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1507 PORT_DIPSETTING( 0x80, DEF_STR( On ) )
1508
1509 PORT_START
1510 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 )
1511 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN1 )
1512 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
1513 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER1 )
1514 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER1 )
1515 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER1 )
1516 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER1 )
1517 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER1 )
1518
1519 PORT_START
1520 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_TILT )
1521 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
1522 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START2 )
1523 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER2 )
1524 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER2 )
1525 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER2 )
1526 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER2 )
1527 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
1528 INPUT_PORTS_END
1529
1530 INPUT_PORTS_START( palamed )
1531 PORT_START
1532 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
1533 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
1534 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1535 TAITO_L_DSWA_2_4
1536 TAITO_COINAGE_JAPAN_NEW_8
1537
1538 PORT_START
1539 /* Difficulty controls how faster falls the dice lines */
1540 TAITO_DIFFICULTY_8
1541 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
1542 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
1543 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1544 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
1545 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
1546 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1547 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
1548 PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
1549 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1550 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
1551 PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
1552 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1553 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
1554 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
1555 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1556 PORT_DIPNAME( 0x80, 0x80, "Versus Mode" )
1557 PORT_DIPSETTING( 0x00, DEF_STR( No ) )
1558 PORT_DIPSETTING( 0x80, DEF_STR( Yes ) )
1559
1560 PORT_START
1561 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 )
1562 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_TILT )
1563 PORT_BIT_IMPULSE( 0x04, IP_ACTIVE_LOW, IPT_COIN1, 1 )
1564 PORT_BIT_IMPULSE( 0x08, IP_ACTIVE_LOW, IPT_COIN2, 1 )
1565 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START1 )
1566 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
1567 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER1 )
1568 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER1 )
1569
1570 PORT_START
1571 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER1 )
1572 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER1 )
1573 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER1 )
1574 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER1 )
1575 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER2 )
1576 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER2 )
1577 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER2 )
1578 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER2 )
1579
1580 PORT_START
1581 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
1582 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
1583 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
1584 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
1585 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
1586 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
1587 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1588 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1589 INPUT_PORTS_END
1590
1591 INPUT_PORTS_START( cachat )
1592 PORT_START
1593 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
1594 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
1595 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1596 PORT_DIPNAME( 0x02, 0x00, DEF_STR( Flip_Screen ) )
1597 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1598 PORT_DIPSETTING( 0x02, DEF_STR( On ) )
1599 PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
1600 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) )
1601 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1602 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
1603 TAITO_COINAGE_JAPAN_NEW_8
1604
1605 PORT_START
1606 TAITO_DIFFICULTY_8
1607 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
1608 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
1609 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1610 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
1611 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
1612 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1613 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
1614 PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
1615 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1616 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
1617 PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
1618 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1619 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
1620 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
1621 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1622 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
1623 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
1624 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1625
1626 PORT_START
1627 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 )
1628 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_TILT )
1629 PORT_BIT_IMPULSE( 0x04, IP_ACTIVE_LOW, IPT_COIN1, 1 )
1630 PORT_BIT_IMPULSE( 0x08, IP_ACTIVE_LOW, IPT_COIN2, 1 )
1631 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START1 )
1632 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
1633 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER1 )
1634 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER1 )
1635
1636 PORT_START
1637 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER1 )
1638 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER1 )
1639 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER1 )
1640 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER1 )
1641 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER2 )
1642 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER2 )
1643 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER2 )
1644 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER2 )
1645
1646 PORT_START
1647 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
1648 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
1649 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
1650 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
1651 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
1652 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
1653 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1654 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1655 INPUT_PORTS_END
1656
1657 INPUT_PORTS_START( tubeit )
1658 PORT_START
1659 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
1660 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
1661 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1662 PORT_DIPNAME( 0x02, 0x00, DEF_STR( Flip_Screen ) )
1663 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1664 PORT_DIPSETTING( 0x02, DEF_STR( On ) )
1665 PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
1666 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) )
1667 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1668 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
1669 TAITO_COINAGE_WORLD_8
1670
1671 PORT_START
1672 TAITO_DIFFICULTY_8
1673 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
1674 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
1675 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1676 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
1677 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
1678 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1679 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
1680 PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
1681 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1682 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
1683 PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
1684 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1685 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
1686 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
1687 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1688 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
1689 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
1690 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1691
1692 PORT_START
1693 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 )
1694 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_TILT )
1695 PORT_BIT_IMPULSE( 0x04, IP_ACTIVE_LOW, IPT_COIN1, 1 )
1696 PORT_BIT_IMPULSE( 0x08, IP_ACTIVE_LOW, IPT_COIN2, 1 )
1697 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START1 )
1698 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
1699 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER1 )
1700 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER1 )
1701
1702 PORT_START
1703 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER1 )
1704 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER1 )
1705 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER1 )
1706 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER1 )
1707 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER2 )
1708 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER2 )
1709 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER2 )
1710 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER2 )
1711
1712 PORT_START
1713 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
1714 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
1715 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
1716 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
1717 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
1718 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
1719 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1720 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1721 INPUT_PORTS_END
1722
1723 INPUT_PORTS_START( horshoes )
1724 PORT_START
1725 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
1726 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
1727 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1728 TAITO_L_DSWA_2_4
1729 /* The Coinage is the same as US, but it has no Continue Price feature */
1730 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coinage ) )
1731 PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) )
1732 PORT_DIPSETTING( 0x10, DEF_STR( 3C_1C ) )
1733 PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) )
1734 PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
1735 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
1736 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
1737 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1738 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
1739 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
1740 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1741
1742 PORT_START
1743 /* Not for sure, the CPU seems to play better when set to Hardest */
1744 TAITO_DIFFICULTY_8
1745 PORT_DIPNAME( 0x04, 0x04, "Time" )
1746 PORT_DIPSETTING( 0x00, "20 sec" )
1747 PORT_DIPSETTING( 0x04, "30 sec" )
1748 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
1749 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
1750 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1751 PORT_DIPNAME( 0x10, 0x10, "Innings" )
1752 PORT_DIPSETTING( 0x10, "3 per Credit" )
1753 PORT_DIPSETTING( 0x00, "9 per Credit" )
1754 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
1755 PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
1756 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1757 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
1758 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
1759 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1760 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
1761 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
1762 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1763
1764 PORT_START
1765 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 )
1766 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN1 )
1767 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
1768 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
1769 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
1770 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
1771 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1772 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER1 )
1773
1774 PORT_START
1775 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_TILT )
1776 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
1777 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
1778 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
1779 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
1780 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
1781 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1782 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER1 )
1783
1784 PORT_START
1785 PORT_ANALOG( 0xffff, 0x0000, IPT_TRACKBALL_Y | IPF_REVERSE, 50, 30, 0, 0 )
1786
1787 PORT_START
1788 PORT_ANALOG( 0xffff, 0x0000, IPT_TRACKBALL_X, 50, 30, 0, 0 )
1789 INPUT_PORTS_END
1790
1791 INPUT_PORTS_START( plgirls )
1792 PORT_START
1793 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Demo_Sounds ) )
1794 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1795 PORT_DIPSETTING( 0x01, DEF_STR( On ) )
1796 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) )
1797 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
1798 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1799 PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
1800 PORT_DIPNAME( 0x38, 0x38, DEF_STR( Coinage ) )
1801 PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) )
1802 PORT_DIPSETTING( 0x10, DEF_STR( 3C_1C ) )
1803 PORT_DIPSETTING( 0x18, DEF_STR( 2C_1C ) )
1804 PORT_DIPSETTING( 0x38, DEF_STR( 1C_1C ) )
1805 PORT_DIPSETTING( 0x08, DEF_STR( 2C_3C ) )
1806 PORT_DIPSETTING( 0x28, DEF_STR( 1C_2C ) )
1807 PORT_DIPSETTING( 0x20, DEF_STR( 1C_4C ) )
1808 /* PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )*/
1809 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
1810 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
1811 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1812 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
1813 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
1814 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1815
1816 PORT_START
1817 /* Difficulty controls the Ball Speed */
1818 TAITO_DIFFICULTY_8
1819 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
1820 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
1821 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1822 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
1823 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
1824 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1825 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
1826 PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
1827 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1828 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
1829 PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
1830 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1831 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
1832 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
1833 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1834 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
1835 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
1836 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1837
1838 PORT_START
1839 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 )
1840 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_TILT )
1841 PORT_BIT_IMPULSE( 0x04, IP_ACTIVE_LOW, IPT_COIN1, 1 )
1842 PORT_BIT_IMPULSE( 0x08, IP_ACTIVE_LOW, IPT_COIN2, 1 )
1843 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START1 )
1844 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
1845 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER1 )
1846 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER1 )
1847
1848 PORT_START
1849 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER1 )
1850 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER1 )
1851 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER1 )
1852 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER1 )
1853 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER2 )
1854 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER2 )
1855 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER2 )
1856 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER2 )
1857
1858 PORT_START
1859 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
1860 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
1861 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
1862 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
1863 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
1864 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
1865 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1866 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1867 INPUT_PORTS_END
1868
1869 INPUT_PORTS_START( plgirls2 )
1870 PORT_START
1871 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
1872 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
1873 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1874 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) )
1875 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
1876 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1877 PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
1878 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
1879 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
1880 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1881 TAITO_COINAGE_JAPAN_8
1882
1883 PORT_START
1884 /* Difficulty controls the number of hits requiered to destroy enemies */
1885 TAITO_DIFFICULTY_8
1886 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
1887 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
1888 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1889 PORT_DIPNAME( 0x18, 0x18, "Life" )
1890 PORT_DIPSETTING( 0x10, "3/2/3" )
1891 PORT_DIPSETTING( 0x18, "4/3/4" )
1892 PORT_DIPSETTING( 0x08, "5/4/5" )
1893 PORT_DIPSETTING( 0x00, "6/5/6" )
1894 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
1895 PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
1896 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1897 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
1898 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
1899 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1900 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
1901 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
1902 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1903
1904 PORT_START
1905 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 )
1906 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_TILT )
1907 PORT_BIT_IMPULSE( 0x04, IP_ACTIVE_LOW, IPT_COIN1, 1 )
1908 PORT_BIT_IMPULSE( 0x08, IP_ACTIVE_LOW, IPT_COIN2, 1 )
1909 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START1 )
1910 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
1911 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER1 )
1912 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER1 )
1913
1914 PORT_START
1915 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER1 )
1916 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER1 )
1917 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER1 )
1918 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER1 )
1919 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER2 )
1920 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER2 )
1921 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER2 )
1922 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER2 )
1923
1924 PORT_START
1925 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
1926 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
1927 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
1928 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
1929 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
1930 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
1931 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1932 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1933 INPUT_PORTS_END
1934
1935 INPUT_PORTS_START( cubybop )
1936 PORT_START
1937 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
1938 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
1939 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1940 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
1941 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
1942 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1943 PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
1944 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) )
1945 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1946 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
1947 TAITO_COINAGE_JAPAN_NEW_8
1948
1949 PORT_START
1950 TAITO_DIFFICULTY_8
1951 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
1952 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
1953 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1954 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
1955 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
1956 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1957 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
1958 PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
1959 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1960 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
1961 PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
1962 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1963 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
1964 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
1965 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1966 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
1967 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
1968 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1969
1970 PORT_START
1971 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 )
1972 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_TILT )
1973 PORT_BIT_IMPULSE( 0x04, IP_ACTIVE_LOW, IPT_COIN1, 1 )
1974 PORT_BIT_IMPULSE( 0x08, IP_ACTIVE_LOW, IPT_COIN2, 1 )
1975 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START1 )
1976 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
1977 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER1 )
1978 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER1 )
1979
1980 PORT_START
1981 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER1 )
1982 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER1 )
1983 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER1 )
1984 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER1 )
1985 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER2 )
1986 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER2 )
1987 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER2 )
1988 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER2 )
1989
1990 PORT_START
1991 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
1992 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
1993 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
1994 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
1995 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
1996 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
1997 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1998 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1999 INPUT_PORTS_END
2000
2001 INPUT_PORTS_START( evilston )
2002
2003 PORT_START
2004 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
2005 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
2006 PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
2007 TAITO_L_DSWA_2_4
2008 TAITO_COINAGE_WORLD_8
2009
2010 PORT_START
2011 TAITO_DIFFICULTY_8
2012 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unused ) )
2013 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
2014 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
2015 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unused ) )
2016 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
2017 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
2018 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) )
2019 PORT_DIPSETTING( 0x30, "3" )
2020 PORT_DIPSETTING( 0x20, "2" )
2021 PORT_DIPSETTING( 0x10, "1" )
2022 PORT_DIPSETTING( 0x00, "4" )
2023 PORT_DIPNAME( 0xc0, 0x00, "Language" )
2024 PORT_DIPSETTING( 0x00, "English" )
2025 PORT_DIPSETTING( 0x80, "English" )
2026 PORT_DIPSETTING( 0x40, "English" )
2027 PORT_DIPSETTING( 0xc0, "Japanese" )
2028
2029 PORT_START
2030 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
2031 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 )
2032 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 )
2033 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_COCKTAIL )
2034 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_COCKTAIL )
2035 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
2036
2037 PORT_START
2038
2039 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_TILT )
2040 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE1 )
2041 PORT_BIT_IMPULSE( 0x04, IP_ACTIVE_LOW, IPT_COIN1, 4 )
2042 PORT_BIT_IMPULSE( 0x08, IP_ACTIVE_LOW, IPT_COIN2, 4 )
2043
2044 PORT_START
2045 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_4WAY )
2046 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_4WAY )
2047 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_4WAY )
2048 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_4WAY )
2049 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_COCKTAIL | IPF_4WAY )
2050 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_COCKTAIL | IPF_4WAY )
2051 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_COCKTAIL | IPF_4WAY )
2052 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_COCKTAIL | IPF_4WAY )
2053
2054 INPUT_PORTS_END
2055
2056
2057
2058 static struct GfxLayout bg1_layout =
2059 {
2060 8, 8,
2061 RGN_FRAC(1,2),
2062 4,
2063 { RGN_FRAC(1,2)+0, RGN_FRAC(1,2)+4, 0, 4 },
2064 { 3, 2, 1, 0, 8+3, 8+2, 8+1, 8+0 },
2065 { 0*16, 1*16, 2*16, 3*16, 4*16, 5*16, 6*16, 7*16 },
2066 8*8*2
2067 };
2068
2069 static struct GfxLayout bg2_layout =
2070 {
2071 8, 8,
2072 RGN_FRAC(1,1),
2073 4,
2074 { 8, 12, 0, 4 },
2075 { 3, 2, 1, 0, 19, 18, 17, 16 },
2076 { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 },
2077 8*8*4
2078 };
2079
2080 #define O 8*8*2
2081 #define O2 2*O
2082 static struct GfxLayout sp1_layout =
2083 {
2084 16, 16,
2085 RGN_FRAC(1,2),
2086 4,
2087 { RGN_FRAC(1,2)+0, RGN_FRAC(1,2)+4, 0, 4 },
2088 { 3, 2, 1, 0, 8+3, 8+2, 8+1, 8+0, O+3, O+2, O+1, O+0, O+8+3, O+8+2, O+8+1, O+8+0 },
2089 { 0*16, 1*16, 2*16, 3*16, 4*16, 5*16, 6*16, 7*16, O2+0*16, O2+1*16, O2+2*16, O2+3*16, O2+4*16, O2+5*16, O2+6*16, O2+7*16 },
2090 8*8*2*4
2091 };
2092 #undef O
2093 #undef O2
2094
2095 #define O 8*8*4
2096 #define O2 2*O
2097 static struct GfxLayout sp2_layout =
2098 {
2099 16, 16,
2100 RGN_FRAC(1,1),
2101 4,
2102 { 8, 12, 0, 4 },
2103 { 3, 2, 1, 0, 19, 18, 17, 16, O+3, O+2, O+1, O+0, O+19, O+18, O+17, O+16 },
2104 { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32, O2+0*32, O2+1*32, O2+2*32, O2+3*32, O2+4*32, O2+5*32, O2+6*32, O2+7*32 },
2105 8*8*4*4
2106 };
2107 #undef O
2108 #undef O2
2109
2110 static struct GfxLayout char_layout =
2111 {
2112 8, 8,
2113 1024,
2114 4,
2115 { 8, 12, 0, 4 },
2116 { 3, 2, 1, 0, 19, 18, 17, 16},
2117 { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 },
2118 8*8*4
2119 };
2120
2121 static struct GfxDecodeInfo gfxdecodeinfo1[] =
2122 {
2123 { REGION_GFX1, 0, &bg1_layout, 0, 16 },
2124 { REGION_GFX1, 0, &sp1_layout, 0, 16 },
2125 { 0, 0, &char_layout, 0, 16 }, /* Ram-based*/
2126 { -1 }
2127 };
2128
2129 static struct GfxDecodeInfo gfxdecodeinfo2[] =
2130 {
2131 { REGION_GFX1, 0, &bg2_layout, 0, 16 },
2132 { REGION_GFX1, 0, &sp2_layout, 0, 16 },
2133 { 0, 0, &char_layout, 0, 16 }, /* Ram-based*/
2134 { -1 }
2135 };
2136
2137
2138
irqhandler(int irq)2139 static void irqhandler(int irq)
2140 {
2141 cpu_set_irq_line(1,0,irq ? ASSERT_LINE : CLEAR_LINE);
2142 }
2143
WRITE_HANDLER(portA_w)2144 static WRITE_HANDLER( portA_w )
2145 {
2146 static int cur_bank = 0;
2147
2148 if (cur_bank != (data & 0x03) )
2149 {
2150 int bankaddress;
2151 unsigned char *RAM = memory_region(REGION_CPU2);
2152
2153 cur_bank = data & 0x03;
2154 bankaddress = 0x10000 + (cur_bank-1) * 0x4000;
2155 cpu_setbank(7,&RAM[bankaddress]);
2156 /*logerror ("YM2203 bank change val=%02x pc=%04x\n",cur_bank, activecpu_get_pc() );*/
2157 }
2158 }
2159
2160 static struct YM2203interface ym2203_interface_triple =
2161 {
2162 1, /* 1 chip */
2163 3000000, /* ??? */
2164 { YM2203_VOL(80,20) },
2165 { 0 },
2166 { 0 },
2167 { portA_w },
2168 { 0 },
2169 { irqhandler }
2170 };
2171
2172 static struct ADPCMinterface adpcm_interface =
2173 {
2174 1, /* 1 channel */
2175 8000, /* 8000Hz playback? */
2176 REGION_SOUND1, /* memory region */
2177 { 80 } /* volume */
2178 };
2179
2180
2181 static struct YM2610interface ym2610_interface =
2182 {
2183 1, /* 1 chip */
2184 8000000, /* 8 MHz */
2185 { 25 },
2186 { 0 },
2187 { 0 },
2188 { 0 },
2189 { 0 },
2190 { irqhandler },
2191 { REGION_SOUND1 },
2192 { REGION_SOUND1 },
2193 { YM3012_VOL(100,MIXER_PAN_LEFT,100,MIXER_PAN_RIGHT) }
2194 };
2195
2196 static struct YM2203interface ym2203_interface_double =
2197 {
2198 1, /* 1 chip */
2199 3000000, /* ??? */
2200 { YM2203_VOL(80,20) },
2201 { 0 },
2202 { 0 },
2203 { 0 },
2204 { 0 },
2205 { 0 }
2206 };
2207
2208 static struct YM2203interface ym2203_interface_evilston =
2209 {
2210 1, /* 1 chip */
2211 3000000, /* ??? */
2212 { YM2203_VOL(80,0) },
2213 { 0 },
2214 { 0 },
2215 { 0 },
2216 { 0 },
2217 { 0 }
2218 };
2219
2220
2221
2222 static struct YM2203interface ym2203_interface_single =
2223 {
2224 1, /* 1 chip */
2225 3000000, /* ??? */
2226 { YM2203_VOL(80,20) },
2227 { portA_r },
2228 { portB_r },
2229 { 0 },
2230 { 0 },
2231 { 0 }
2232 };
2233
2234
2235 static MACHINE_DRIVER_START( fhawk )
2236
2237 /* basic machine hardware */
2238 MDRV_CPU_ADD_TAG("cpu1", Z80, 6665280) /* ? xtal is 13.33056 */
MDRV_CPU_MEMORY(fhawk_readmem,fhawk_writemem)2239 MDRV_CPU_MEMORY(fhawk_readmem,fhawk_writemem)
2240 MDRV_CPU_VBLANK_INT(vbl_interrupt,3)
2241
2242 MDRV_CPU_ADD_TAG("sound", Z80, 4000000) /* ? xtal is 13.33056 */
2243 MDRV_CPU_FLAGS(CPU_AUDIO_CPU)
2244 MDRV_CPU_MEMORY(fhawk_3_readmem,fhawk_3_writemem)
2245
2246 MDRV_CPU_ADD_TAG("cpu2", Z80, 4000000) /* ? xtal is 13.33056 */
2247 MDRV_CPU_MEMORY(fhawk_2_readmem,fhawk_2_writemem)
2248 MDRV_CPU_VBLANK_INT(irq0_line_hold,3)
2249
2250 MDRV_FRAMES_PER_SECOND(60)
2251 MDRV_VBLANK_DURATION(DEFAULT_60HZ_VBLANK_DURATION)
2252 MDRV_INTERLEAVE(100)
2253
2254 MDRV_MACHINE_INIT(fhawk)
2255
2256 /* video hardware */
2257 MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
2258 MDRV_SCREEN_SIZE(40*8, 32*8)
2259 MDRV_VISIBLE_AREA(0*8, 40*8-1, 2*8, 30*8-1)
2260 MDRV_GFXDECODE(gfxdecodeinfo2)
2261 MDRV_PALETTE_LENGTH(256)
2262
2263 MDRV_VIDEO_START(taitol)
2264 MDRV_VIDEO_EOF(taitol)
2265 MDRV_VIDEO_UPDATE(taitol)
2266
2267 /* sound hardware */
2268 MDRV_SOUND_ADD_TAG("2203", YM2203, ym2203_interface_triple)
2269 MACHINE_DRIVER_END
2270
2271
2272 static MACHINE_DRIVER_START( champwr )
2273
2274 /* basic machine hardware */
2275 MDRV_IMPORT_FROM(fhawk)
2276 MDRV_CPU_MODIFY("cpu1")
2277 MDRV_CPU_MEMORY(champwr_readmem,champwr_writemem)
2278
2279 MDRV_CPU_MODIFY("sound")
2280 MDRV_CPU_MEMORY(champwr_3_readmem,champwr_3_writemem)
2281
2282 MDRV_CPU_MODIFY("cpu2")
2283 MDRV_CPU_MEMORY(champwr_2_readmem,champwr_2_writemem)
2284
2285 MDRV_MACHINE_INIT(champwr)
2286
2287 /* sound hardware */
2288 MDRV_SOUND_ADD(ADPCM, adpcm_interface)
2289 MACHINE_DRIVER_END
2290
2291
2292 static MACHINE_DRIVER_START( raimais )
2293
2294 /* basic machine hardware */
2295 MDRV_IMPORT_FROM(fhawk)
2296 MDRV_CPU_MODIFY("cpu1")
2297 MDRV_CPU_MEMORY(raimais_readmem,raimais_writemem)
2298
2299 MDRV_CPU_MODIFY("sound")
2300 MDRV_CPU_MEMORY(raimais_3_readmem,raimais_3_writemem)
2301
2302 MDRV_CPU_MODIFY("cpu2")
2303 MDRV_CPU_MEMORY(raimais_2_readmem,raimais_2_writemem)
2304
2305 MDRV_MACHINE_INIT(raimais)
2306
2307 /* sound hardware */
2308 MDRV_SOUND_REPLACE("2203", YM2610, ym2610_interface)
2309 MACHINE_DRIVER_END
2310
2311
2312 static MACHINE_DRIVER_START( kurikint )
2313
2314 /* basic machine hardware */
2315 MDRV_CPU_ADD(Z80, 6000000) /* ? xtal is 13.33056 */
2316 MDRV_CPU_MEMORY(kurikint_readmem,kurikint_writemem)
2317 MDRV_CPU_VBLANK_INT(vbl_interrupt,3)
2318
2319 MDRV_CPU_ADD(Z80, 6000000) /* ? xtal is 13.33056 */
2320 MDRV_CPU_MEMORY(kurikint_2_readmem,kurikint_2_writemem)
2321 MDRV_CPU_VBLANK_INT(irq0_line_hold,1)
2322
2323 MDRV_FRAMES_PER_SECOND(60)
2324 MDRV_VBLANK_DURATION(DEFAULT_60HZ_VBLANK_DURATION)
2325 MDRV_INTERLEAVE(100)
2326
2327 MDRV_MACHINE_INIT(kurikint)
2328
2329 /* video hardware */
2330 MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
2331 MDRV_SCREEN_SIZE(40*8, 32*8)
2332 MDRV_VISIBLE_AREA(0*8, 40*8-1, 2*8, 30*8-1)
2333 MDRV_GFXDECODE(gfxdecodeinfo2)
2334 MDRV_PALETTE_LENGTH(256)
2335
2336 MDRV_VIDEO_START(taitol)
2337 MDRV_VIDEO_EOF(taitol)
2338 MDRV_VIDEO_UPDATE(taitol)
2339
2340 /* sound hardware */
2341 MDRV_SOUND_ADD(YM2203, ym2203_interface_double)
2342 MACHINE_DRIVER_END
2343
2344
2345 static MACHINE_DRIVER_START( kurikina )
2346
2347 /* basic machine hardware */
2348 MDRV_IMPORT_FROM(kurikint)
2349
2350 /* video hardware */
2351 MDRV_GFXDECODE(gfxdecodeinfo1)
2352 MACHINE_DRIVER_END
2353
2354
2355 static MACHINE_DRIVER_START( plotting )
2356
2357 /* basic machine hardware */
2358 MDRV_CPU_ADD_TAG("main", Z80, 6000000) /* ? xtal is 13.33056 */
2359 MDRV_CPU_MEMORY(plotting_readmem,plotting_writemem)
2360 MDRV_CPU_VBLANK_INT(vbl_interrupt,3)
2361
2362 MDRV_FRAMES_PER_SECOND(60)
2363 MDRV_VBLANK_DURATION(DEFAULT_60HZ_VBLANK_DURATION)
2364
2365 MDRV_MACHINE_INIT(plotting)
2366
2367 /* video hardware */
2368 MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
2369 MDRV_SCREEN_SIZE(40*8, 32*8)
2370 MDRV_VISIBLE_AREA(0*8, 40*8-1, 2*8, 30*8-1)
2371 MDRV_GFXDECODE(gfxdecodeinfo1)
2372 MDRV_PALETTE_LENGTH(256)
2373
2374 MDRV_VIDEO_START(taitol)
2375 MDRV_VIDEO_EOF(taitol)
2376 MDRV_VIDEO_UPDATE(taitol)
2377
2378 /* sound hardware */
2379 MDRV_SOUND_ADD(YM2203, ym2203_interface_single)
2380 MACHINE_DRIVER_END
2381
2382
2383 static MACHINE_DRIVER_START( puzznic )
2384
2385 /* basic machine hardware */
2386 MDRV_IMPORT_FROM(plotting)
2387 MDRV_CPU_MODIFY("main")
2388 MDRV_CPU_MEMORY(puzznic_readmem,puzznic_writemem)
2389
2390 MDRV_MACHINE_INIT(puzznic)
2391 MACHINE_DRIVER_END
2392
2393
2394 static MACHINE_DRIVER_START( horshoes )
2395
2396 /* basic machine hardware */
2397 MDRV_IMPORT_FROM(plotting)
2398 MDRV_CPU_MODIFY("main")
2399 MDRV_CPU_MEMORY(horshoes_readmem,horshoes_writemem)
2400
2401 MDRV_MACHINE_INIT(horshoes)
2402 MACHINE_DRIVER_END
2403
2404
2405 static MACHINE_DRIVER_START( palamed )
2406
2407 /* basic machine hardware */
2408 MDRV_IMPORT_FROM(plotting)
2409 MDRV_CPU_MODIFY("main")
2410 MDRV_CPU_MEMORY(palamed_readmem,palamed_writemem)
2411
2412 MDRV_MACHINE_INIT(palamed)
2413 MACHINE_DRIVER_END
2414
2415
2416 static MACHINE_DRIVER_START( cachat )
2417
2418 /* basic machine hardware */
2419 MDRV_IMPORT_FROM(plotting)
2420 MDRV_CPU_MODIFY("main")
2421 MDRV_CPU_MEMORY(cachat_readmem,cachat_writemem)
2422
2423 MDRV_MACHINE_INIT(cachat)
2424 MACHINE_DRIVER_END
2425
2426 static MACHINE_DRIVER_START( evilston )
2427
2428 /* basic machine hardware */
2429 MDRV_CPU_ADD(Z80, 6000000)
2430 MDRV_CPU_MEMORY(evilston_readmem,evilston_writemem)
2431 MDRV_CPU_VBLANK_INT(vbl_interrupt,3)
2432
2433 MDRV_CPU_ADD(Z80, 6000000)
2434 MDRV_CPU_MEMORY(evilston_2_readmem,evilston_2_writemem)
2435 MDRV_CPU_VBLANK_INT(irq0_line_hold,1)
2436
2437 MDRV_FRAMES_PER_SECOND(60)
2438 MDRV_VBLANK_DURATION(DEFAULT_60HZ_VBLANK_DURATION)
2439 MDRV_INTERLEAVE(100)
2440
2441 MDRV_MACHINE_INIT(evilston)
2442
2443 /* video hardware */
2444 MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
2445 MDRV_SCREEN_SIZE(40*8, 32*8)
2446 MDRV_VISIBLE_AREA(0*8, 40*8-1, 2*8, 30*8-1)
2447 MDRV_GFXDECODE(gfxdecodeinfo2)
2448 MDRV_PALETTE_LENGTH(256)
2449
2450 MDRV_VIDEO_START(taitol)
2451 MDRV_VIDEO_EOF(taitol)
2452 MDRV_VIDEO_UPDATE(taitol)
2453
2454 /* sound hardware */
2455 MDRV_SOUND_ADD(YM2203, ym2203_interface_evilston)
2456 MACHINE_DRIVER_END
2457
2458
2459
2460
2461 ROM_START( raimais )
2462 ROM_REGION( 0xb0000, REGION_CPU1, 0 )
2463 ROM_LOAD( "b36-08-1.bin", 0x00000, 0x20000, CRC(6cc8f79f) SHA1(17b4903f87e6d5447c8557c2baca1728f86245dc) )
2464 ROM_RELOAD( 0x10000, 0x20000 )
2465 ROM_LOAD( "b36-09.bin", 0x30000, 0x20000, CRC(9c466e43) SHA1(2466a3f1f8124323008c9925f90e9a1d2edf1564) )
2466
2467 ROM_REGION( 0x1c000, REGION_CPU2, 0 ) /* sound (sndhrdw/rastan.c wants it as #2 */
2468 ROM_LOAD( "b36-06.bin", 0x00000, 0x4000, CRC(29bbc4f8) SHA1(39a68729c6180c5f6cdf604e692018e7d6bf5591) )
2469 ROM_CONTINUE( 0x10000, 0xc000 )
2470
2471 ROM_REGION( 0x10000, REGION_CPU3, 0 )
2472 ROM_LOAD( "b36-07.bin", 0x00000, 0x10000, CRC(4f3737e6) SHA1(ff5f5d4ca5485441d03c8cb01a6a096941ab02eb) )
2473
2474 ROM_REGION( 0x100000, REGION_GFX1, ROMREGION_DISPOSE )
2475 ROM_LOAD( "b36-01.bin", 0x00000, 0x80000, CRC(89355cb2) SHA1(433e929fe8b488af84e88486d9679468a3d9677a) )
2476 ROM_LOAD( "b36-02.bin", 0x80000, 0x80000, CRC(e71da5db) SHA1(aa47ae02c359264c0a1f09ecc583eefd1ef1dfa4) )
2477
2478 ROM_REGION( 0x80000, REGION_SOUND1, 0 )
2479 ROM_LOAD( "b36-03.bin", 0x00000, 0x80000, CRC(96166516) SHA1(a6748218188cbd1b037f6c0845416665c0d55a7b) )
2480 ROM_END
2481
2482 ROM_START( fhawk )
2483 ROM_REGION( 0xb0000, REGION_CPU1, 0 )
2484 ROM_LOAD( "b70-11.bin", 0x00000, 0x20000, CRC(7d9f7583) SHA1(d8fa7c66a81fb356fa9c72f377bfc31b1837eafb) )
2485 ROM_RELOAD( 0x10000, 0x20000 )
2486 ROM_LOAD( "b70-03.bin", 0x30000, 0x80000, CRC(42d5a9b8) SHA1(10714fe95c372cec12376e615a9abe213aff12bc) )
2487
2488 ROM_REGION( 0x1c000, REGION_CPU2, 0 ) /* sound (sndhrdw/rastan.c wants it as #2 */
2489 ROM_LOAD( "b70-09.bin", 0x00000, 0x4000, CRC(85cccaa2) SHA1(5459cd8df9d94e1938008cfc17d4ebac98004bfc) )
2490 ROM_CONTINUE( 0x10000, 0xc000 )
2491
2492 ROM_REGION( 0x30000, REGION_CPU3, 0 )
2493 ROM_LOAD( "b70-08.bin", 0x00000, 0x20000, CRC(4d795f48) SHA1(58040d8ccbd0572cf6aef6ea9dd646b9338a03a0) )
2494 ROM_RELOAD( 0x10000, 0x20000 )
2495
2496 ROM_REGION( 0x100000, REGION_GFX1, ROMREGION_DISPOSE )
2497 ROM_LOAD( "b70-01.bin", 0x00000, 0x80000, CRC(fcdf67e2) SHA1(08a6a04a45c4adb4f5b4b0b83e90b2e5fe5cb0b1) )
2498 ROM_LOAD( "b70-02.bin", 0x80000, 0x80000, CRC(35f7172e) SHA1(f257e9db470bb6dcca491b89cb666ef6d2546887) )
2499 ROM_END
2500
2501 ROM_START( fhawkj )
2502 ROM_REGION( 0xb0000, REGION_CPU1, 0 )
2503 ROM_LOAD( "b70-07.bin", 0x00000, 0x20000, CRC(939114af) SHA1(66218536dcb3b34ffa01d3c9c2fee365d91cfe00) )
2504 ROM_RELOAD( 0x10000, 0x20000 )
2505 ROM_LOAD( "b70-03.bin", 0x30000, 0x80000, CRC(42d5a9b8) SHA1(10714fe95c372cec12376e615a9abe213aff12bc) )
2506
2507 ROM_REGION( 0x1c000, REGION_CPU2, 0 ) /* sound (sndhrdw/rastan.c wants it as #2 */
2508 ROM_LOAD( "b70-09.bin", 0x00000, 0x4000, CRC(85cccaa2) SHA1(5459cd8df9d94e1938008cfc17d4ebac98004bfc) )
2509 ROM_CONTINUE( 0x10000, 0xc000 )
2510
2511 ROM_REGION( 0x30000, REGION_CPU3, 0 )
2512 ROM_LOAD( "b70-08.bin", 0x00000, 0x20000, CRC(4d795f48) SHA1(58040d8ccbd0572cf6aef6ea9dd646b9338a03a0) )
2513 ROM_RELOAD( 0x10000, 0x20000 )
2514
2515 ROM_REGION( 0x100000, REGION_GFX1, ROMREGION_DISPOSE )
2516 ROM_LOAD( "b70-01.bin", 0x00000, 0x80000, CRC(fcdf67e2) SHA1(08a6a04a45c4adb4f5b4b0b83e90b2e5fe5cb0b1) )
2517 ROM_LOAD( "b70-02.bin", 0x80000, 0x80000, CRC(35f7172e) SHA1(f257e9db470bb6dcca491b89cb666ef6d2546887) )
2518 ROM_END
2519
2520 ROM_START( champwr )
2521 ROM_REGION( 0xf0000, REGION_CPU1, 0 )
2522 ROM_LOAD( "c01-13.rom", 0x00000, 0x20000, CRC(7ef47525) SHA1(79789fa3bcaeb6666c108d2e4b69a1f9341b2f4a) )
2523 ROM_RELOAD( 0x10000, 0x20000 )
2524 ROM_LOAD( "c01-04.rom", 0x30000, 0x20000, CRC(358bd076) SHA1(beb20a09370d05de719dde596eadca8fecb14ce5) )
2525
2526 ROM_REGION( 0x1c000, REGION_CPU2, 0 ) /* sound (sndhrdw/rastan.c wants it as #2 */
2527 ROM_LOAD( "c01-08.rom", 0x00000, 0x4000, CRC(810efff8) SHA1(dd4fc046095e0e815e8e1fd96d258da0d6bba298) )
2528 ROM_CONTINUE( 0x10000, 0xc000 )
2529
2530 ROM_REGION( 0x30000, REGION_CPU3, 0 )
2531 ROM_LOAD( "c01-07.rom", 0x00000, 0x20000, CRC(5117c98f) SHA1(16b3a443eb113d2591833884a1b0ff297d8c00a4) )
2532 ROM_RELOAD( 0x10000, 0x20000 )
2533
2534 ROM_REGION( 0x180000, REGION_GFX1, ROMREGION_DISPOSE )
2535 ROM_LOAD( "c01-01.rom", 0x000000, 0x80000, CRC(f302e6e9) SHA1(456b046932c1ee29c890b8e87d417c4bb508c06a) )
2536 ROM_LOAD( "c01-02.rom", 0x080000, 0x80000, CRC(1e0476c4) SHA1(b7922e5196990ad4382f367ec80b5c72e75f9d35) )
2537 ROM_LOAD( "c01-03.rom", 0x100000, 0x80000, CRC(2a142dbc) SHA1(5d0e40ec266d3abcff4237c5c609355c65b4fa33) )
2538
2539 ROM_REGION( 0x20000, REGION_SOUND1, 0 ) /* ADPCM samples */
2540 ROM_LOAD( "c01-05.rom", 0x00000, 0x20000, CRC(22efad4a) SHA1(54fb33dfba5059dee16fa8b5a33b0b2d62a78373) )
2541 ROM_END
2542
2543 ROM_START( champwru )
2544 ROM_REGION( 0xf0000, REGION_CPU1, 0 )
2545 ROM_LOAD( "c01-12.rom", 0x00000, 0x20000, CRC(09f345b3) SHA1(f3f9a7dab0b3f87b6919a7b37cb52245e112cb08) )
2546 ROM_RELOAD( 0x10000, 0x20000 )
2547 ROM_LOAD( "c01-04.rom", 0x30000, 0x20000, CRC(358bd076) SHA1(beb20a09370d05de719dde596eadca8fecb14ce5) )
2548
2549 ROM_REGION( 0x1c000, REGION_CPU2, 0 ) /* sound (sndhrdw/rastan.c wants it as #2 */
2550 ROM_LOAD( "c01-08.rom", 0x00000, 0x4000, CRC(810efff8) SHA1(dd4fc046095e0e815e8e1fd96d258da0d6bba298) )
2551 ROM_CONTINUE( 0x10000, 0xc000 )
2552
2553 ROM_REGION( 0x30000, REGION_CPU3, 0 )
2554 ROM_LOAD( "c01-07.rom", 0x00000, 0x20000, CRC(5117c98f) SHA1(16b3a443eb113d2591833884a1b0ff297d8c00a4) )
2555 ROM_RELOAD( 0x10000, 0x20000 )
2556
2557 ROM_REGION( 0x180000, REGION_GFX1, ROMREGION_DISPOSE )
2558 ROM_LOAD( "c01-01.rom", 0x000000, 0x80000, CRC(f302e6e9) SHA1(456b046932c1ee29c890b8e87d417c4bb508c06a) )
2559 ROM_LOAD( "c01-02.rom", 0x080000, 0x80000, CRC(1e0476c4) SHA1(b7922e5196990ad4382f367ec80b5c72e75f9d35) )
2560 ROM_LOAD( "c01-03.rom", 0x100000, 0x80000, CRC(2a142dbc) SHA1(5d0e40ec266d3abcff4237c5c609355c65b4fa33) )
2561
2562 ROM_REGION( 0x20000, REGION_SOUND1, 0 ) /* ADPCM samples */
2563 ROM_LOAD( "c01-05.rom", 0x00000, 0x20000, CRC(22efad4a) SHA1(54fb33dfba5059dee16fa8b5a33b0b2d62a78373) )
2564 ROM_END
2565
2566 ROM_START( champwrj )
2567 ROM_REGION( 0xf0000, REGION_CPU1, 0 )
2568 ROM_LOAD( "c01-06.bin", 0x00000, 0x20000, CRC(90fa1409) SHA1(7904488d567ce5d8705b2d2c8a4b4aae310cc28b) )
2569 ROM_RELOAD( 0x10000, 0x20000 )
2570 ROM_LOAD( "c01-04.rom", 0x30000, 0x20000, CRC(358bd076) SHA1(beb20a09370d05de719dde596eadca8fecb14ce5) )
2571
2572 ROM_REGION( 0x1c000, REGION_CPU2, 0 ) /* sound (sndhrdw/rastan.c wants it as #2 */
2573 ROM_LOAD( "c01-08.rom", 0x00000, 0x4000, CRC(810efff8) SHA1(dd4fc046095e0e815e8e1fd96d258da0d6bba298) )
2574 ROM_CONTINUE( 0x10000, 0xc000 )
2575
2576 ROM_REGION( 0x30000, REGION_CPU3, 0 )
2577 ROM_LOAD( "c01-07.rom", 0x00000, 0x20000, CRC(5117c98f) SHA1(16b3a443eb113d2591833884a1b0ff297d8c00a4) )
2578 ROM_RELOAD( 0x10000, 0x20000 )
2579
2580 ROM_REGION( 0x180000, REGION_GFX1, ROMREGION_DISPOSE )
2581 ROM_LOAD( "c01-01.rom", 0x000000, 0x80000, CRC(f302e6e9) SHA1(456b046932c1ee29c890b8e87d417c4bb508c06a) )
2582 ROM_LOAD( "c01-02.rom", 0x080000, 0x80000, CRC(1e0476c4) SHA1(b7922e5196990ad4382f367ec80b5c72e75f9d35) )
2583 ROM_LOAD( "c01-03.rom", 0x100000, 0x80000, CRC(2a142dbc) SHA1(5d0e40ec266d3abcff4237c5c609355c65b4fa33) )
2584
2585 ROM_REGION( 0x20000, REGION_SOUND1, 0 ) /* ADPCM samples */
2586 ROM_LOAD( "c01-05.rom", 0x00000, 0x20000, CRC(22efad4a) SHA1(54fb33dfba5059dee16fa8b5a33b0b2d62a78373) )
2587 ROM_END
2588
2589
2590 ROM_START( kurikint )
2591 ROM_REGION( 0xb0000, REGION_CPU1, 0 )
2592 ROM_LOAD( "b42-09.2", 0x00000, 0x20000, CRC(e97c4394) SHA1(fdeb15315166f7615d4039d5dc9c28d53cee86f2) )
2593 ROM_RELOAD( 0x10000, 0x20000 )
2594 ROM_LOAD( "b42-06.6", 0x30000, 0x20000, CRC(fa15fd65) SHA1(a810d7315878212e4e5344a24addf117ea6baeab) )
2595
2596 ROM_REGION( 0x10000, REGION_CPU2, 0 )
2597 ROM_LOAD( "b42-07.22", 0x00000, 0x10000, CRC(0f2719c0) SHA1(f870335a75f236f0059522f9a577dee7ca3acb2f) )
2598
2599 ROM_REGION( 0x100000, REGION_GFX1, ROMREGION_DISPOSE )
2600 ROM_LOAD( "b42-01.1", 0x00000, 0x80000, CRC(7d1a1fec) SHA1(28311b07673686c18988400d0254533a454f07f4) )
2601 ROM_LOAD( "b42-02.5", 0x80000, 0x80000, CRC(1a52e65c) SHA1(20a1fc4d02b5928fb01444079692e23d178c6297) )
2602 ROM_END
2603
2604 ROM_START( kurikinu )
2605 ROM_REGION( 0xb0000, REGION_CPU1, 0 )
2606 ROM_LOAD( "b42-08.2", 0x00000, 0x20000, CRC(7075122e) SHA1(55f5f0cf3b91b7b408f9c05c91f9839c43b49c5f) )
2607 ROM_RELOAD( 0x10000, 0x20000 )
2608 ROM_LOAD( "b42-06.6", 0x30000, 0x20000, CRC(fa15fd65) SHA1(a810d7315878212e4e5344a24addf117ea6baeab) )
2609
2610 ROM_REGION( 0x10000, REGION_CPU2, 0 )
2611 ROM_LOAD( "b42-07.22", 0x00000, 0x10000, CRC(0f2719c0) SHA1(f870335a75f236f0059522f9a577dee7ca3acb2f) )
2612
2613 ROM_REGION( 0x100000, REGION_GFX1, ROMREGION_DISPOSE )
2614 ROM_LOAD( "b42-01.1", 0x00000, 0x80000, CRC(7d1a1fec) SHA1(28311b07673686c18988400d0254533a454f07f4) )
2615 ROM_LOAD( "b42-02.5", 0x80000, 0x80000, CRC(1a52e65c) SHA1(20a1fc4d02b5928fb01444079692e23d178c6297) )
2616 ROM_END
2617
2618 ROM_START( kurikinj )
2619 ROM_REGION( 0xb0000, REGION_CPU1, 0 )
2620 ROM_LOAD( "b42_05.2", 0x00000, 0x20000, CRC(077222b8) SHA1(953fb3444f6bb0dbe0323a0fd8fc3067b106a4f6) )
2621 ROM_RELOAD( 0x10000, 0x20000 )
2622 ROM_LOAD( "b42-06.6", 0x30000, 0x20000, CRC(fa15fd65) SHA1(a810d7315878212e4e5344a24addf117ea6baeab) )
2623
2624 ROM_REGION( 0x10000, REGION_CPU2, 0 )
2625 ROM_LOAD( "b42-07.22", 0x00000, 0x10000, CRC(0f2719c0) SHA1(f870335a75f236f0059522f9a577dee7ca3acb2f) )
2626
2627 ROM_REGION( 0x100000, REGION_GFX1, ROMREGION_DISPOSE )
2628 ROM_LOAD( "b42-01.1", 0x00000, 0x80000, CRC(7d1a1fec) SHA1(28311b07673686c18988400d0254533a454f07f4) )
2629 ROM_LOAD( "b42-02.5", 0x80000, 0x80000, CRC(1a52e65c) SHA1(20a1fc4d02b5928fb01444079692e23d178c6297) )
2630 ROM_END
2631
2632 ROM_START( kurikina )
2633 ROM_REGION( 0xb0000, REGION_CPU1, 0 )
2634 ROM_LOAD( "kk_ic2.rom", 0x00000, 0x20000, CRC(908603f2) SHA1(f810f2501458224e9264a984f22547cc8ccc2b0e) )
2635 ROM_RELOAD( 0x10000, 0x20000 )
2636 ROM_LOAD( "kk_ic6.rom", 0x30000, 0x20000, CRC(a4a957b1) SHA1(bbdb5b71ab613a8c89f7a0300abd85408951dc7e) )
2637
2638 ROM_REGION( 0x10000, REGION_CPU2, 0 )
2639 ROM_LOAD( "b42-07.22", 0x00000, 0x10000, CRC(0f2719c0) SHA1(f870335a75f236f0059522f9a577dee7ca3acb2f) )
2640
2641 ROM_REGION( 0x100000, REGION_GFX1, ROMREGION_DISPOSE )
2642 ROM_LOAD( "kk_1-1l.rom", 0x00000, 0x20000, CRC(df1d4fcd) SHA1(300cad3636ea9648595c3f4bba3ca737f95f7354) )
2643 ROM_LOAD( "kk_2-2l.rom", 0x20000, 0x20000, CRC(fca7f647) SHA1(0571e8fc2eda9f139e81d6d191368fb99764f797) )
2644 ROM_LOAD( "kk_5-3l.rom", 0x40000, 0x20000, CRC(d080fde1) SHA1(e5011cdf35bf5d39f4786e6d60d2b35a79560dfa) )
2645 ROM_LOAD( "kk_7-4l.rom", 0x60000, 0x20000, CRC(f5bf6829) SHA1(4c1b4c6f451ed823730762f67c2e716789cddb10) )
2646 ROM_LOAD( "kk_3-1h.rom", 0x80000, 0x20000, CRC(71af848e) SHA1(1e4d050c9191a8645f324de84767662ed80165b6) )
2647 ROM_LOAD( "kk_4-2h.rom", 0xa0000, 0x20000, CRC(cebb5bac) SHA1(6c1e3cdea353bd835b49b95af0bb718e2b46ecfe) )
2648 ROM_LOAD( "kk_6-3h.rom", 0xc0000, 0x20000, CRC(322e3752) SHA1(7592b5dc7945c96f53aeb5c328c54c0dcba3809a) )
2649 ROM_LOAD( "kk_8-4h.rom", 0xe0000, 0x20000, CRC(117bde99) SHA1(fe0f56b6c840e35870639c4de129443e14720a7b) )
2650 ROM_END
2651
2652
2653 ROM_START( plotting )
2654 ROM_REGION( 0x20000, REGION_CPU1, 0 )
2655 ROM_LOAD( "plot01.bin", 0x00000, 0x10000, CRC(5b30bc25) SHA1(df8839a90da9e5122d75b6faaf97f59499dbd316) )
2656 ROM_RELOAD( 0x10000, 0x10000 )
2657
2658 ROM_REGION( 0x20000, REGION_GFX1, ROMREGION_DISPOSE )
2659 ROM_LOAD( "plot07.bin", 0x00000, 0x10000, CRC(6e0bad2a) SHA1(73996688cd058a2f56f61ea60144b9c673919a58) )
2660 ROM_LOAD( "plot08.bin", 0x10000, 0x10000, CRC(fb5f3ca4) SHA1(0c335acceea50133a6899f9e368cff5f61b55a96) )
2661 ROM_END
2662
2663 ROM_START( puzznic )
2664 ROM_REGION( 0x30000, REGION_CPU1, 0 )
2665 ROM_LOAD( "u11.rom", 0x00000, 0x20000, CRC(a4150b6c) SHA1(27719b8993735532cd59f4ed5693ff3143ee2336) )
2666 ROM_RELOAD( 0x10000, 0x20000 )
2667
2668 ROM_REGION( 0x0800, REGION_CPU2, 0 ) /* 2k for the microcontroller */
2669 ROM_LOAD( "mc68705p", 0x0000, 0x0800, NO_DUMP )
2670
2671 ROM_REGION( 0x40000, REGION_GFX1, ROMREGION_DISPOSE )
2672 ROM_LOAD( "u10.rom", 0x00000, 0x20000, CRC(4264056c) SHA1(d2d8a170ae0f361093a5384935238605a59e5938) )
2673 ROM_LOAD( "u09.rom", 0x20000, 0x20000, CRC(3c115f8b) SHA1(8d518be01b7c4d6d993d5d9b62aab719a5c8baca) )
2674 ROM_END
2675
2676 ROM_START( horshoes )
2677 ROM_REGION( 0x30000, REGION_CPU1, 0 )
2678 ROM_LOAD( "c47.03", 0x00000, 0x20000, CRC(37e15b20) SHA1(85baa0ee553e4c9fed38294ba8912f18f519e62f) )
2679 ROM_RELOAD( 0x10000, 0x20000 )
2680
2681 ROM_REGION( 0x80000, REGION_GFX1, ROMREGION_DISPOSE )
2682 ROM_LOAD( "c47.02", 0x00000, 0x10000, CRC(35f96526) SHA1(e7f9b33d82b050aff49f991aa12db436421caa5b) )
2683 ROM_CONTINUE ( 0x20000, 0x10000 )
2684 ROM_LOAD( "c47.04", 0x40000, 0x10000, CRC(aeac7121) SHA1(cf67688cde14d452da6d9cbd7a81593f4048ce77) )
2685 ROM_CONTINUE ( 0x60000, 0x10000 )
2686 ROM_LOAD( "c47.01", 0x10000, 0x10000, CRC(031c73d8) SHA1(deef972fbf226701f9a6469ae3934129dc52ce9c) )
2687 ROM_CONTINUE ( 0x30000, 0x10000 )
2688 ROM_LOAD( "c47.05", 0x50000, 0x10000, CRC(b2a3dafe) SHA1(5ffd3e296272ef3f31432005c827f057aac79497) )
2689 ROM_CONTINUE ( 0x70000, 0x10000 )
2690 ROM_END
2691
2692 ROM_START( palamed )
2693 ROM_REGION( 0x30000, REGION_CPU1, 0 )
2694 ROM_LOAD( "c63.02", 0x00000, 0x20000, CRC(55a82bb2) SHA1(f157ad770351d4b8d8f8c061c4e330d6391fc624) )
2695 ROM_RELOAD( 0x10000, 0x20000 )
2696
2697 ROM_REGION( 0x40000, REGION_GFX1, ROMREGION_DISPOSE )
2698 ROM_LOAD( "c63.04", 0x00000, 0x20000, CRC(c7bbe460) SHA1(1c1f186d0b0b2e383f82c53ae93b975a75f50f9c) )
2699 ROM_LOAD( "c63.03", 0x20000, 0x20000, CRC(fcd86e44) SHA1(bdd0750ed6e93cc49f09f4ccb05b0c4a44cb9c23) )
2700 ROM_END
2701
2702 ROM_START( cachat )
2703 ROM_REGION( 0x30000, REGION_CPU1, 0 )
2704 ROM_LOAD( "cac6", 0x00000, 0x20000, CRC(8105cf5f) SHA1(e6dd22165436c247db887a04c3e69c9e2505bb33) )
2705 ROM_RELOAD( 0x10000, 0x20000 )
2706
2707 ROM_REGION( 0x80000, REGION_GFX1, ROMREGION_DISPOSE )
2708 ROM_LOAD( "cac9", 0x00000, 0x20000, CRC(bc462914) SHA1(3eede8940cabadf563acb63059bfc2d13253b29f) )
2709 ROM_LOAD( "cac10", 0x20000, 0x20000, CRC(ecc64b31) SHA1(04ce97cdcdbdbd38602011f5ed27fe9182fb500a) )
2710 ROM_LOAD( "cac7", 0x40000, 0x20000, CRC(7fb71578) SHA1(34cfa1383ea1f3cbf45eaf6b989a1248cdef1bb9) )
2711 ROM_LOAD( "cac8", 0x60000, 0x20000, CRC(d2a63799) SHA1(71b024b239834ef068b7fc20cd49aae7853e0f7c) )
2712 ROM_END
2713
2714 ROM_START( tubeit )
2715 ROM_REGION( 0x30000, REGION_CPU1, 0 )
2716 ROM_LOAD( "t-i_02.6", 0x00000, 0x20000, CRC(54730669) SHA1(a44ebd31a8588a133a7552a39fa8d52ba1985e45) )
2717 ROM_RELOAD( 0x10000, 0x20000 )
2718
2719 ROM_REGION( 0x80000, REGION_GFX1, ROMREGION_DISPOSE )
2720 ROM_LOAD( "t-i_03.7", 0x40000, 0x40000, CRC(e1c3fed0) SHA1(cd68dbf61ed820f4aa50c630e7cb778aafb433c2) )
2721 ROM_LOAD( "t-i_04.9", 0x00000, 0x40000, CRC(b4a6e31d) SHA1(e9abab8f19c78207f25a62104bcae1e391cbd2c0) )
2722 ROM_END
2723
2724 ROM_START( cubybop )
2725 ROM_REGION( 0x50000, REGION_CPU1, 0 )
2726 ROM_LOAD( "cb06.6", 0x00000, 0x40000, CRC(66b89a85) SHA1(2ba26d71fd1aa8e64584a5908a1d797666718d49) )
2727 ROM_RELOAD( 0x10000, 0x40000 )
2728
2729 ROM_REGION( 0x100000, REGION_GFX1, ROMREGION_DISPOSE )
2730 ROM_LOAD( "cb09.9", 0x00000, 0x40000, CRC(5f831e59) SHA1(db319a6c1058200274d687163b4df2f78a2bf879) )
2731 ROM_LOAD( "cb10.10", 0x40000, 0x40000, CRC(430510fc) SHA1(95c0a0ebd0485a15090f302e5d2f4da8204baf7c) )
2732 ROM_LOAD( "cb07.7", 0x80000, 0x40000, CRC(3582de99) SHA1(51620cc9044aef8e5ed0335b7d5d6d67a7857005) )
2733 ROM_LOAD( "cb08.8", 0xc0000, 0x40000, CRC(09e18a51) SHA1(18db47d1d84f9be892bc796116c7ef7d0c1ee59f) )
2734 ROM_END
2735
2736 ROM_START( plgirls )
2737 ROM_REGION( 0x50000, REGION_CPU1, 0 )
2738 ROM_LOAD( "pg03.ic6", 0x00000, 0x40000, CRC(6ca73092) SHA1(f5679f047a29b936046c0d3677489df553ad7b41) )
2739 ROM_RELOAD( 0x10000, 0x40000 )
2740
2741 ROM_REGION( 0x80000, REGION_GFX1, ROMREGION_DISPOSE )
2742 ROM_LOAD( "pg02.ic9", 0x00000, 0x40000, CRC(3cf05ca9) SHA1(502c45a5330dda1b2fbf7d3d0c9bc6e889ff07d8) )
2743 ROM_LOAD( "pg01.ic7", 0x40000, 0x40000, CRC(79e41e74) SHA1(aa8efbeeee47f84e19b639821a89a7bcd67fe7a9) )
2744 ROM_END
2745
2746 ROM_START( plgirls2 )
2747 ROM_REGION( 0x50000, REGION_CPU1, 0 )
2748 ROM_LOAD( "pg2_1j.ic6", 0x00000, 0x40000, CRC(f924197a) SHA1(ecaaefd1b3715ba60608e05d58be67e3c71f653a) )
2749 ROM_RELOAD( 0x10000, 0x40000 )
2750
2751 ROM_REGION( 0x100000, REGION_GFX1, ROMREGION_DISPOSE )
2752 ROM_LOAD( "cho-l.ic9", 0x00000, 0x80000, CRC(956384ec) SHA1(94a2b95f340e96bdccbeafd373f0dea90b8328dd) )
2753 ROM_LOAD( "cho-h.ic7", 0x80000, 0x80000, CRC(992f99b1) SHA1(c79f1014d73654740f7823812f92376d65d6b15d) )
2754 ROM_END
2755
2756 ROM_START( evilston )
2757 ROM_REGION( 0xb0000, REGION_CPU1, 0 )
2758 ROM_LOAD( "c67-03.ic2", 0x00000, 0x20000, CRC(53419982) SHA1(ecc338e2237d26c5ff25b756d371b26b23beed1e) )
2759 ROM_RELOAD( 0x10000, 0x20000 )
2760 ROM_LOAD( "c67-04.ic6", 0x30000, 0x20000, CRC(55d57e19) SHA1(8815bcaafe7ee056314b4131e3fb7963854dd6ba) )
2761
2762 ROM_REGION( 0x80000, REGION_CPU2, 0 )
2763 ROM_LOAD( "c67-05.22", 0x00000, 0x20000, CRC(94d3a642) SHA1(af20aa5bb60a45c05eb1deba23ba30e6640ca235) )
2764
2765 ROM_REGION( 0x100000, REGION_GFX1, ROMREGION_DISPOSE )
2766 ROM_LOAD( "c67-01.ic1", 0x00000, 0x80000, CRC(2f351bf4) SHA1(0fb37abf3413cd11baece1c9bbca5a51b0f28938) )
2767 ROM_LOAD( "c67-02.ic5", 0x80000, 0x80000, CRC(eb4f895c) SHA1(2c902572fe5a5d4442e4dd29e8a85cb40c384140) )
2768 ROM_END
2769
2770
2771
2772
2773 /* bits 7..0 => bits 0..7*/
2774 static DRIVER_INIT( plotting )
2775 {
2776 unsigned char tab[256];
2777 unsigned char *p;
2778 int i;
2779
2780 for(i=0;i<256;i++)
2781 {
2782 int j, v=0;
2783 for(j=0;j<8;j++)
2784 if(i & (1<<j))
2785 v |= 1<<(7-j);
2786 tab[i] = v;
2787 }
2788 p = memory_region(REGION_CPU1);
2789 for(i=0;i<0x20000;i++)
2790 {
2791 *p = tab[*p];
2792 p++;
2793 }
2794 }
2795
DRIVER_INIT(evilston)2796 static DRIVER_INIT( evilston )
2797 {
2798 unsigned char *ROM = memory_region(REGION_CPU2);
2799 ROM[0x72]=0x45; /* reti -> retn ('dead' loop @ $1104 )*/
2800 install_mem_write_handler( 0, 0xa7fe, 0xa7fe, evilston_snd_w);
2801 }
2802
2803
2804 GAME( 1988, raimais, 0, raimais, raimais, 0, ROT0, "Taito Corporation", "Raimais (Japan)" )
2805 GAME( 1988, fhawk, 0, fhawk, fhawk, 0, ROT270, "Taito Corporation Japan", "Fighting Hawk (World)" )
2806 GAME( 1988, fhawkj, fhawk, fhawk, fhawkj, 0, ROT270, "Taito Corporation", "Fighting Hawk (Japan)" )
2807 GAME( 1989, champwr, 0, champwr, champwr, 0, ROT0, "Taito Corporation Japan", "Champion Wrestler (World)" )
2808 GAME( 1989, champwru, champwr, champwr, champwru, 0, ROT0, "Taito America Corporation", "Champion Wrestler (US)" )
2809 GAME( 1989, champwrj, champwr, champwr, champwrj, 0, ROT0, "Taito Corporation", "Champion Wrestler (Japan)" )
2810 GAME( 1988, kurikint, 0, kurikint, kurikint, 0, ROT0, "Taito Corporation Japan", "Kuri Kinton (World)" )
2811 GAME( 1988, kurikinu, kurikint, kurikint, kurikinj, 0, ROT0, "Taito America Corporation", "Kuri Kinton (US)" )
2812 GAME( 1988, kurikinj, kurikint, kurikint, kurikinj, 0, ROT0, "Taito Corporation", "Kuri Kinton (Japan)" )
2813 GAME( 1988, kurikina, kurikint, kurikina, kurikina, 0, ROT0, "Taito Corporation Japan", "Kuri Kinton (World, prototype[Q])" )
2814 GAME( 1989, plotting, 0, plotting, plotting, plotting, ROT0, "Taito Corporation Japan", "Plotting (World)" )
2815 GAME( 1989, puzznic, 0, puzznic, puzznic, 0, ROT0, "Taito Corporation", "Puzznic (Japan)" )
2816 GAME( 1990, horshoes, 0, horshoes, horshoes, 0, ROT270, "Taito America Corporation", "American Horseshoes (US)" )
2817 GAME( 1990, palamed, 0, palamed, palamed, 0, ROT0, "Taito Corporation", "Palamedes (Japan)" )
2818 GAME( 1993, cachat, 0, cachat, cachat, 0, ROT0, "Taito Corporation", "Cachat (Japan)" )
2819 GAME( 1993, tubeit, cachat, cachat, tubeit, 0, ROT0, "Taito Corporation", "Tube-It" ) /* No (c) message*/
2820 GAME( 199?, cubybop, 0, cachat, cubybop, 0, ROT0, "Taito Corporation", "Cuby Bop (Location Test)" ) /* No (c) message*/
2821
2822 GAME( 1992, plgirls, 0, cachat, plgirls, 0, ROT270, "Hot-B.", "Play Girls" )
2823 GAME( 1993, plgirls2, 0, cachat, plgirls2, 0, ROT270, "Hot-B.", "Play Girls 2" )
2824
2825 GAME( 1990, evilston, 0, evilston, evilston, evilston, ROT270, "Spacy Industrial, Ltd.", "Evil Stone" )
2826