1 /***************************************************************************
2
3 Taxi Driver (c) 1984 Graphic Techno
4
5 ***************************************************************************/
6
7 #include "driver.h"
8 #include "vidhrdw/generic.h"
9 #include "machine/8255ppi.h"
10 #include "taxidrvr.h"
11
12
13
WRITE_HANDLER(p2a_w)14 WRITE_HANDLER( p2a_w ) { taxidrvr_spritectrl_w(0,data); }
WRITE_HANDLER(p2b_w)15 WRITE_HANDLER( p2b_w ) { taxidrvr_spritectrl_w(1,data); }
WRITE_HANDLER(p2c_w)16 WRITE_HANDLER( p2c_w ) { taxidrvr_spritectrl_w(2,data); }
WRITE_HANDLER(p3a_w)17 WRITE_HANDLER( p3a_w ) { taxidrvr_spritectrl_w(3,data); }
WRITE_HANDLER(p3b_w)18 WRITE_HANDLER( p3b_w ) { taxidrvr_spritectrl_w(4,data); }
WRITE_HANDLER(p3c_w)19 WRITE_HANDLER( p3c_w ) { taxidrvr_spritectrl_w(5,data); }
WRITE_HANDLER(p4a_w)20 WRITE_HANDLER( p4a_w ) { taxidrvr_spritectrl_w(6,data); }
WRITE_HANDLER(p4b_w)21 WRITE_HANDLER( p4b_w ) { taxidrvr_spritectrl_w(7,data); }
WRITE_HANDLER(p4c_w)22 WRITE_HANDLER( p4c_w ) { taxidrvr_spritectrl_w(8,data); }
23
24
25
26
27 static int s1,s2,s3,s4,latchA,latchB;
28
READ_HANDLER(p0a_r)29 static READ_HANDLER( p0a_r )
30 {
31 return latchA;
32 }
33
READ_HANDLER(p0c_r)34 static READ_HANDLER( p0c_r )
35 {
36 return (s1 << 7);
37 }
38
WRITE_HANDLER(p0b_w)39 static WRITE_HANDLER( p0b_w )
40 {
41 latchB = data;
42 }
43
WRITE_HANDLER(p0c_w)44 static WRITE_HANDLER( p0c_w )
45 {
46 s2 = data & 1;
47
48 taxidrvr_bghide = data & 2;
49
50 /* bit 2 toggles during gameplay */
51
52 flip_screen_set(data & 8);
53
54 /* usrintf_showmessage("%02x",data&0x0f);*/
55 }
56
READ_HANDLER(p1b_r)57 static READ_HANDLER( p1b_r )
58 {
59 return latchB;
60 }
61
READ_HANDLER(p1c_r)62 static READ_HANDLER( p1c_r )
63 {
64 return (s2 << 7) | (s4 << 6) | ((readinputport(5) & 1) << 4);
65 }
66
WRITE_HANDLER(p1a_w)67 static WRITE_HANDLER( p1a_w )
68 {
69 latchA = data;
70 }
71
WRITE_HANDLER(p1c_w)72 static WRITE_HANDLER( p1c_w )
73 {
74 s1 = data & 1;
75 s3 = (data & 2) >> 1;
76 }
77
READ_HANDLER(p8910_0a_r)78 static READ_HANDLER( p8910_0a_r )
79 {
80 return latchA;
81 }
82
READ_HANDLER(p8910_1a_r)83 static READ_HANDLER( p8910_1a_r )
84 {
85 return s3;
86 }
87
88 /* note that a lot of writes happen with port B set as input. I think this is a bug in the
89 original, since it works anyway even if the communication is flawed. */
WRITE_HANDLER(p8910_0b_w)90 static WRITE_HANDLER( p8910_0b_w )
91 {
92 s4 = data & 1;
93 }
94
95
96 static ppi8255_interface ppi8255_intf =
97 {
98 5, /* 5 chips */
99 { p0a_r, NULL, NULL, NULL, NULL }, /* Port A read */
100 { NULL, p1b_r, NULL, NULL, NULL }, /* Port B read */
101 { p0c_r, p1c_r, NULL, NULL, NULL }, /* Port C read */
102 { NULL, p1a_w, p2a_w, p3a_w, p4a_w }, /* Port A write */
103 { p0b_w, NULL, p2b_w, p3b_w, p4b_w }, /* Port B write */
104 { p0c_w, p1c_w, p2c_w, p3c_w, p4c_w } /* Port C write */
105 };
106
MACHINE_INIT(taxidrvr)107 MACHINE_INIT( taxidrvr )
108 {
109 ppi8255_init(&ppi8255_intf);
110 }
111
112
113
MEMORY_READ_START(readmem1)114 static MEMORY_READ_START( readmem1 )
115 { 0x0000, 0x7fff, MRA_ROM },
116 { 0x8000, 0x8fff, MRA_RAM },
117 { 0x9000, 0x9fff, MRA_RAM },
118 { 0xa000, 0xafff, MRA_RAM },
119 { 0xb000, 0xbfff, MRA_RAM },
120 { 0xc000, 0xc7ff, MRA_RAM },
121 { 0xd800, 0xdfff, MRA_RAM },
122 { 0xe000, 0xf3ff, MRA_RAM },
123 { 0xf400, 0xf403, ppi8255_0_r },
124 { 0xf480, 0xf483, ppi8255_2_r },
125 { 0xf500, 0xf503, ppi8255_3_r },
126 { 0xf580, 0xf583, ppi8255_4_r },
127 { 0xf800, 0xffff, MRA_RAM },
128 MEMORY_END
129
130 static MEMORY_WRITE_START( writemem1 )
131 { 0x0000, 0x7fff, MWA_ROM },
132 { 0x8000, 0x8fff, MWA_RAM }, /* ??? */
133 { 0x9000, 0x9fff, MWA_RAM }, /* ??? */
134 { 0xa000, 0xafff, MWA_RAM }, /* ??? */
135 { 0xb000, 0xbfff, MWA_RAM }, /* ??? */
136 { 0xc000, 0xc7ff, MWA_RAM, &taxidrvr_vram4 }, /* radar bitmap */
137 { 0xc800, 0xcfff, MWA_RAM, &taxidrvr_vram5 }, /* "sprite1" bitmap */
138 { 0xd000, 0xd7ff, MWA_RAM, &taxidrvr_vram6 }, /* "sprite2" bitmap */
139 { 0xd800, 0xdfff, MWA_RAM, &taxidrvr_vram7 }, /* "sprite3" bitmap */
140 { 0xe000, 0xe3ff, MWA_RAM, &taxidrvr_vram1 }, /* car tilemap */
141 { 0xe400, 0xebff, MWA_RAM, &taxidrvr_vram2 }, /* bg1 tilemap */
142 { 0xec00, 0xefff, MWA_RAM, &taxidrvr_vram0 }, /* fg tilemap */
143 { 0xf000, 0xf3ff, MWA_RAM, &taxidrvr_vram3 }, /* bg2 tilemap */
144 { 0xf400, 0xf403, ppi8255_0_w },
145 { 0xf480, 0xf483, ppi8255_2_w }, /* "sprite1" placement */
146 { 0xf500, 0xf503, ppi8255_3_w }, /* "sprite2" placement */
147 { 0xf580, 0xf583, ppi8255_4_w }, /* "sprite3" placement */
148 /* { 0xf780, 0xf781, MWA_RAM }, // more scroll registers? /*/
149 { 0xf782, 0xf787, MWA_RAM, &taxidrvr_scroll }, /* bg scroll (three copies always identical) */
150 { 0xf800, 0xffff, MWA_RAM },
151 MEMORY_END
152
153 static MEMORY_READ_START( readmem2 )
154 { 0x0000, 0x3fff, MRA_ROM },
155 { 0x6000, 0x67ff, MRA_RAM },
156 { 0x8000, 0x87ff, MRA_RAM },
157 { 0xa000, 0xa003, ppi8255_1_r },
158 { 0xe000, 0xe000, input_port_0_r },
159 { 0xe001, 0xe001, input_port_1_r },
160 { 0xe002, 0xe002, input_port_2_r },
161 { 0xe003, 0xe003, input_port_3_r },
162 { 0xe004, 0xe004, input_port_4_r },
163 MEMORY_END
164
165 static MEMORY_WRITE_START( writemem2 )
166 { 0x0000, 0x3fff, MWA_ROM },
167 { 0x6000, 0x67ff, MWA_RAM },
168 { 0x8000, 0x87ff, MWA_RAM },
169 { 0xa000, 0xa003, ppi8255_1_w },
170 MEMORY_END
171
172 static MEMORY_READ_START( readmem3 )
173 { 0x0000, 0x1fff, MRA_ROM },
174 { 0x2000, 0x2000, MRA_NOP }, /* irq ack? */
175 { 0xfc00, 0xffff, MRA_RAM },
176 MEMORY_END
177
178 static MEMORY_WRITE_START( writemem3 )
179 { 0x0000, 0x1fff, MWA_ROM },
180 { 0xfc00, 0xffff, MWA_RAM },
181 MEMORY_END
182
183 static PORT_READ_START( readport3 )
184 { 0x01, 0x01, AY8910_read_port_0_r },
185 { 0x03, 0x03, AY8910_read_port_1_r },
186 PORT_END
187
188 static PORT_WRITE_START( writeport3 )
189 { 0x00, 0x00, AY8910_control_port_0_w },
190 { 0x01, 0x01, AY8910_write_port_0_w },
191 { 0x02, 0x02, AY8910_control_port_1_w },
192 { 0x03, 0x03, AY8910_write_port_1_w },
193 PORT_END
194
195
196
197 INPUT_PORTS_START( taxidrvr )
198 PORT_START
199 PORT_DIPNAME( 0x0f, 0x00, DEF_STR( Coin_A ) )
200 PORT_DIPSETTING( 0x0d, DEF_STR( 4C_1C ) )
201 PORT_DIPSETTING( 0x0a, DEF_STR( 3C_1C ) )
202 PORT_DIPSETTING( 0x0e, DEF_STR( 4C_2C ) )
203 PORT_DIPSETTING( 0x07, DEF_STR( 2C_1C ) )
204 PORT_DIPSETTING( 0x0b, DEF_STR( 3C_2C ) )
205 PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
206 PORT_DIPSETTING( 0x0c, DEF_STR( 3C_4C ) )
207 PORT_DIPSETTING( 0x08, DEF_STR( 2C_3C ) )
208 PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
209 PORT_DIPSETTING( 0x09, DEF_STR( 2C_5C ) )
210 PORT_DIPSETTING( 0x02, DEF_STR( 1C_3C ) )
211 PORT_DIPSETTING( 0x03, DEF_STR( 1C_4C ) )
212 PORT_DIPSETTING( 0x04, DEF_STR( 1C_5C ) )
213 PORT_DIPSETTING( 0x05, DEF_STR( 1C_6C ) )
214 PORT_DIPSETTING( 0x06, DEF_STR( 1C_7C ) )
215 PORT_DIPSETTING( 0x0f, DEF_STR( Free_Play ) )
216 PORT_DIPNAME( 0xf0, 0x00, DEF_STR( Coin_B ) )
217 PORT_DIPSETTING( 0xd0, DEF_STR( 4C_1C ) )
218 PORT_DIPSETTING( 0xa0, DEF_STR( 3C_1C ) )
219 PORT_DIPSETTING( 0xe0, DEF_STR( 4C_2C ) )
220 PORT_DIPSETTING( 0x70, DEF_STR( 2C_1C ) )
221 PORT_DIPSETTING( 0xb0, DEF_STR( 3C_2C ) )
222 PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
223 PORT_DIPSETTING( 0xc0, DEF_STR( 3C_4C ) )
224 PORT_DIPSETTING( 0x80, DEF_STR( 2C_3C ) )
225 PORT_DIPSETTING( 0x10, DEF_STR( 1C_2C ) )
226 PORT_DIPSETTING( 0x90, DEF_STR( 2C_5C ) )
227 PORT_DIPSETTING( 0x20, DEF_STR( 1C_3C ) )
228 PORT_DIPSETTING( 0x30, DEF_STR( 1C_4C ) )
229 PORT_DIPSETTING( 0x40, DEF_STR( 1C_5C ) )
230 PORT_DIPSETTING( 0x50, DEF_STR( 1C_6C ) )
231 PORT_DIPSETTING( 0x60, DEF_STR( 1C_7C ) )
232 PORT_DIPSETTING( 0xf0, DEF_STR( Free_Play ) )
233
234 PORT_START
235 PORT_DIPNAME( 0x03, 0x00, DEF_STR( Lives ) )
236 PORT_DIPSETTING( 0x00, "3" )
237 PORT_DIPSETTING( 0x01, "4" )
238 PORT_DIPSETTING( 0x02, "5" )
239 PORT_BITX( 0, 0x03, IPT_DIPSWITCH_SETTING | IPF_CHEAT, "255", IP_KEY_NONE, IP_JOY_NONE )
240 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Cabinet ) )
241 PORT_DIPSETTING( 0x04, DEF_STR( Upright ) )
242 PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
243 PORT_DIPNAME( 0x38, 0x00, DEF_STR( Unknown ) )
244 PORT_DIPSETTING( 0x00, "1" )
245 PORT_DIPSETTING( 0x08, "2" )
246 PORT_DIPSETTING( 0x10, "3" )
247 PORT_DIPSETTING( 0x18, "4" )
248 PORT_DIPSETTING( 0x20, "5" )
249 PORT_DIPSETTING( 0x28, "6" )
250 PORT_DIPSETTING( 0x30, "7" )
251 PORT_DIPSETTING( 0x38, "8" )
252 PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) )
253 PORT_DIPSETTING( 0x00, "0" )
254 PORT_DIPSETTING( 0x40, "1" )
255 PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unused ) )
256 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
257 PORT_DIPSETTING( 0x80, DEF_STR( On ) )
258
259 PORT_START
260 PORT_DIPNAME( 0x07, 0x00, "Fuel Consumption" )
261 PORT_DIPSETTING( 0x00, "Slowest" )
262 PORT_DIPSETTING( 0x01, "2" )
263 PORT_DIPSETTING( 0x02, "3" )
264 PORT_DIPSETTING( 0x03, "4" )
265 PORT_DIPSETTING( 0x04, "5" )
266 PORT_DIPSETTING( 0x05, "6" )
267 PORT_DIPSETTING( 0x06, "7" )
268 PORT_DIPSETTING( 0x07, "Fastest" )
269 PORT_DIPNAME( 0x38, 0x00, DEF_STR( Unknown ) )
270 PORT_DIPSETTING( 0x00, "1" )
271 PORT_DIPSETTING( 0x08, "2" )
272 PORT_DIPSETTING( 0x10, "3" )
273 PORT_DIPSETTING( 0x18, "4" )
274 PORT_DIPSETTING( 0x20, "5" )
275 PORT_DIPSETTING( 0x28, "6" )
276 PORT_DIPSETTING( 0x30, "7" )
277 PORT_DIPSETTING( 0x38, "8" )
278 PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Unknown ) )
279 PORT_DIPSETTING( 0x00, "40/30" )
280 PORT_DIPSETTING( 0x40, "30/20" )
281 PORT_DIPSETTING( 0x80, "20/15" )
282 PORT_DIPSETTING( 0xc0, "10/10" )
283
284 PORT_START
285 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
286 PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON1 )
287 PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON2 )
288 PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_START1 )
289 PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP | IPF_4WAY )
290 PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN | IPF_4WAY )
291 PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT | IPF_4WAY )
292 PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT | IPF_4WAY )
293
294 PORT_START
295 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN2 )
296 PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON1 | IPF_COCKTAIL )
297 PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON2 | IPF_COCKTAIL )
298 PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_START2 )
299 PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP | IPF_4WAY | IPF_COCKTAIL )
300 PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN | IPF_4WAY | IPF_COCKTAIL )
301 PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT | IPF_4WAY | IPF_COCKTAIL )
302 PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT | IPF_4WAY | IPF_COCKTAIL )
303
304 PORT_START
305 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 ) /* handled by p1c_r() */
306 INPUT_PORTS_END
307
308
309
310 static struct GfxLayout charlayout =
311 {
312 8,8,
313 RGN_FRAC(1,1),
314 4,
315 { 3, 2, 1, 0 },
316 { 1*4, 0*4, 3*4, 2*4, 5*4, 4*4, 7*4, 6*4 },
317 { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 },
318 32*8
319 };
320
321 static struct GfxLayout charlayout2 =
322 {
323 4,4,
324 RGN_FRAC(1,1),
325 4,
326 { 3, 2, 1, 0 },
327 { 1*4, 0*4, 3*4, 2*4 },
328 { 0*16, 1*16, 2*16, 3*16 },
329 16*4
330 };
331
332
333 static struct GfxDecodeInfo gfxdecodeinfo[] =
334 {
335 { REGION_GFX1, 0, &charlayout, 0, 1 },
336 { REGION_GFX2, 0, &charlayout, 0, 1 },
337 { REGION_GFX3, 0, &charlayout, 0, 1 },
338 { REGION_GFX4, 0, &charlayout, 0, 1 },
339 { REGION_GFX5, 0, &charlayout2, 0, 1 },
340 { -1 } /* end of array */
341 };
342
343
344
345 static struct AY8910interface ay8910_interface =
346 {
347 2, /* 2 chips */
348 1250000, /* 1.25 MHz ??? */
349 { 25, 25 },
350 { p8910_0a_r, p8910_1a_r },
351 { 0, 0 },
352 { 0, 0 },
353 { p8910_0b_w, 0 }
354 };
355
356
357
358 static MACHINE_DRIVER_START( taxidrvr )
359
360 /* basic machine hardware */
361 MDRV_CPU_ADD(Z80,4000000) /* 4 MHz ??? */
362 MDRV_CPU_MEMORY(readmem1,writemem1)
363 MDRV_CPU_VBLANK_INT(irq0_line_hold,1)
364
365 MDRV_CPU_ADD(Z80,4000000) /* 4 MHz ??? */
366 MDRV_CPU_MEMORY(readmem2,writemem2)
367 MDRV_CPU_VBLANK_INT(irq0_line_hold,1) /* ??? */
368
369 MDRV_CPU_ADD(Z80,4000000) /* 4 MHz ??? */
370 MDRV_CPU_MEMORY(readmem3,writemem3)
371 MDRV_CPU_PORTS(readport3,writeport3)
372 MDRV_CPU_VBLANK_INT(irq0_line_hold,1) /* ??? */
373
374 MDRV_FRAMES_PER_SECOND(60)
375 MDRV_VBLANK_DURATION(DEFAULT_60HZ_VBLANK_DURATION)
376 MDRV_INTERLEAVE(100) /* 100 CPU slices per frame - an high value to ensure proper */
377 /* synchronization of the CPUs */
378 MDRV_MACHINE_INIT(taxidrvr)
379
380 /* video hardware */
381 MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
382 MDRV_SCREEN_SIZE(32*8, 32*8)
383 MDRV_VISIBLE_AREA(0*8, 32*8-1, 1*8, 27*8-1)
384 MDRV_GFXDECODE(gfxdecodeinfo)
385 MDRV_PALETTE_LENGTH(16)
386
387 MDRV_VIDEO_UPDATE(taxidrvr)
388
389 /* sound hardware */
390 MDRV_SOUND_ADD(AY8910, ay8910_interface)
391 MACHINE_DRIVER_END
392
393
394
395 /***************************************************************************
396
397 Game driver(s)
398
399 ***************************************************************************/
400
401 ROM_START( taxidrvr )
402 ROM_REGION( 0x10000, REGION_CPU1, 0 )
403 ROM_LOAD( "1", 0x0000, 0x2000, CRC(6b2424e9) SHA1(a65bb01da8f3b0649d945981cc4f1324b7fac5c7) )
404 ROM_LOAD( "2", 0x2000, 0x2000, CRC(15111229) SHA1(0350918f9504b0e470684ebc94a823bb2513a54d) )
405 ROM_LOAD( "3", 0x4000, 0x2000, CRC(a7782eee) SHA1(0f10b7876420f4237937b1b922aa410de3f79af1) )
406 ROM_LOAD( "4", 0x6000, 0x2000, CRC(8eb0b16b) SHA1(a0015744373ee91bc505f077a04ab3546f8bb6fb) )
407
408 ROM_REGION( 0x10000, REGION_CPU2, 0 )
409 ROM_LOAD( "8", 0x0000, 0x2000, CRC(9f9a3865) SHA1(908cf4f2cc68c088649241997276ea25c27d9718) )
410 ROM_LOAD( "9", 0x2000, 0x2000, CRC(b28b766c) SHA1(21e08ef1e2671c8540380e3fa0858e8a4d821945) )
411
412 ROM_REGION( 0x10000, REGION_CPU3, 0 )
413 ROM_LOAD( "7", 0x0000, 0x2000, CRC(2b4cbfe6) SHA1(a2a900831116554d5aea1a81c93245d3bb424d48) )
414
415 ROM_REGION( 0x2000, REGION_GFX1, ROMREGION_DISPOSE )
416 ROM_LOAD( "5", 0x0000, 0x2000, CRC(a3aa5f2f) SHA1(7e046e2a5d230c62d93a83f5a773e6e4d6e85961) )
417
418 ROM_REGION( 0x2000, REGION_GFX2, ROMREGION_DISPOSE )
419 ROM_LOAD( "6", 0x0000, 0x2000, CRC(bfddd550) SHA1(f528c2701c635bc61eda14fbe2cfe9b44cb75c20) )
420
421 ROM_REGION( 0x6000, REGION_GFX3, ROMREGION_DISPOSE )
422 ROM_LOAD( "11", 0x0000, 0x2000, CRC(7485eaea) SHA1(8d69c61145470003cfeb33b11b81345c5e5e6503) )
423 ROM_LOAD( "14", 0x2000, 0x2000, CRC(0d99a33e) SHA1(0df29464ea43aecd866ae322f4f7ca9152422023) )
424 ROM_LOAD( "15", 0x4000, 0x2000, CRC(410fdf7c) SHA1(0957f335b84c4fbde983271786e7bf199fc22682) )
425
426 ROM_REGION( 0x2000, REGION_GFX4, ROMREGION_DISPOSE )
427 ROM_LOAD( "10", 0x0000, 0x2000, CRC(c370b177) SHA1(4b3f73f764ff95cc7777fe01333558201658cead) )
428
429 ROM_REGION( 0x4000, REGION_GFX5, ROMREGION_DISPOSE ) /* not used?? */
430 ROM_LOAD( "12", 0x0000, 0x2000, CRC(684b7bb0) SHA1(d83c45ff3adf94c649340227794020482231399f) )
431 ROM_LOAD( "13", 0x2000, 0x2000, CRC(d1ef110e) SHA1(e34b6b4b70c783a8cf1296a05d3cec6af5820d0c) )
432 ROM_END
433
434
435
436 GAMEX( 1984, taxidrvr, 0, taxidrvr, taxidrvr, 0, ROT90, "Graphic Techno", "Taxi Driver", GAME_IMPERFECT_GRAPHICS | GAME_NO_COCKTAIL )
437