1 /* system 16 - 7751 emulation, based on monster bash code.*/
2 #include "driver.h"
3 #include "cpu/i8039/i8039.h"
4
5 static unsigned int port_8255_c03 = 0;
6 static unsigned int port_8255_c47 = 0;
7 static unsigned int port_7751_p27 = 0;
8 static unsigned int rom_offset = 0;
9 static unsigned int rom_base = 0;
10 static unsigned int rom_bank = 0;
11
trigger_7751_sound(int data)12 static void trigger_7751_sound(int data)
13 {
14 /* I think this is correct for 128k sound roms,
15 it's OK for smaller roms */
16 if((data&0xf) == 0xc) rom_bank=0;
17 else if((data&0xf) == 0xd) rom_bank=0x4000;
18 else if((data&0xf) == 0xb) rom_bank=0xc000;
19 else if((data&0xf) == 0xa) rom_bank=0x8000;
20
21 else if((data&0xf) == 0xf) rom_bank=0x1c000;
22 else if((data&0xf) == 0xe) rom_bank=0x18000;
23 else if((data&0xf) == 0x7) rom_bank=0x14000;
24 else if((data&0xf) == 0x6) rom_bank=0x10000;
25
26 port_8255_c03 = (data>>5);
27
28 cpu_set_irq_line(2, 0, PULSE_LINE);
29 }
30
31 /* I'm sure this must be wrong, but it seems to work for quartet music.*/
WRITE_HANDLER(sys16_7751_audio_8255_w)32 WRITE_HANDLER( sys16_7751_audio_8255_w )
33 {
34 log_cb(RETRO_LOG_DEBUG, LOGPRE "7751: %4x %4x\n",data,data^0xff);
35
36 if ((data & 0x0f) != 8)
37 {
38 cpu_set_reset_line(2,PULSE_LINE);
39 timer_set(TIME_IN_USEC(300), data, trigger_7751_sound);
40 }
41 }
42
43
READ_HANDLER(sys16_7751_audio_8255_r)44 READ_HANDLER( sys16_7751_audio_8255_r )
45 {
46 /* Only PC4 is hooked up*/
47 /* 0x00 = BUSY, 0x10 = NOT BUSY */
48 return (port_8255_c47 & 0x10);
49 }
50
51 /* read from BUS */
READ_HANDLER(sys16_7751_sh_rom_r)52 READ_HANDLER( sys16_7751_sh_rom_r )
53 {
54 unsigned char *sound_rom = memory_region(REGION_SOUND1);
55
56 return sound_rom[rom_offset+rom_base];
57 }
58
59 /* read from T1 */
READ_HANDLER(sys16_7751_sh_t1_r)60 READ_HANDLER( sys16_7751_sh_t1_r )
61 {
62 /* Labelled as "TEST", connected to ground*/
63 return 0;
64 }
65
66 /* read from P2 */
READ_HANDLER(sys16_7751_sh_command_r)67 READ_HANDLER( sys16_7751_sh_command_r )
68 {
69 /* 8255's PC0-2 connects to 7751's S0-2 (P24-P26 on an 8048)*/
70 return ((port_8255_c03 & 0x07) << 4) | port_7751_p27;
71 }
72
73 /* write to P1 */
WRITE_HANDLER(sys16_7751_sh_dac_w)74 WRITE_HANDLER( sys16_7751_sh_dac_w )
75 {
76 DAC_data_w(0,data);
77 }
78
79 /* write to P2 */
WRITE_HANDLER(sys16_7751_sh_busy_w)80 WRITE_HANDLER( sys16_7751_sh_busy_w )
81 {
82 port_8255_c03 = (data & 0x70) >> 4;
83 port_8255_c47 = (data & 0x80) >> 3;
84 port_7751_p27 = data & 0x80;
85 rom_base = rom_bank;
86 }
87
88 /* write to P4 */
WRITE_HANDLER(sys16_7751_sh_offset_a0_a3_w)89 WRITE_HANDLER( sys16_7751_sh_offset_a0_a3_w )
90 {
91 rom_offset = (rom_offset & 0xFFF0) | (data & 0x0F);
92 }
93
94 /* write to P5 */
WRITE_HANDLER(sys16_7751_sh_offset_a4_a7_w)95 WRITE_HANDLER( sys16_7751_sh_offset_a4_a7_w )
96 {
97 rom_offset = (rom_offset & 0xFF0F) | ((data & 0x0F) << 4);
98 }
99
100 /* write to P6 */
WRITE_HANDLER(sys16_7751_sh_offset_a8_a11_w)101 WRITE_HANDLER( sys16_7751_sh_offset_a8_a11_w )
102 {
103 rom_offset = (rom_offset & 0xF0FF) | ((data & 0x0F) << 8);
104 }
105
106 /* write to P7 */
WRITE_HANDLER(sys16_7751_sh_rom_select_w)107 WRITE_HANDLER( sys16_7751_sh_rom_select_w )
108 {
109 rom_offset = (rom_offset & 0x0FFF) | ((0x4000 + ((data&0xf) << 12)) & 0x3000);
110
111 }
112