1 /* helper function to join two 16-bit ROMs and form a 32-bit data stream */ 2 void konami_rom_deinterleave_2(int mem_region); 3 void konami_rom_deinterleave_2_half(int mem_region); 4 /* helper function to join four 16-bit ROMs and form a 64-bit data stream */ 5 void konami_rom_deinterleave_4(int mem_region); 6 7 8 #define MAX_K007121 2 9 extern unsigned char K007121_ctrlram[MAX_K007121][8]; 10 11 void K007121_ctrl_w(int chip,int offset,int data); 12 WRITE_HANDLER( K007121_ctrl_0_w ); 13 WRITE_HANDLER( K007121_ctrl_1_w ); 14 void K007121_sprites_draw(int chip,struct mame_bitmap *bitmap,const struct rectangle *cliprect, 15 const unsigned char *source,int base_color,int global_x_offset,int bank_base, 16 UINT32 pri_mask); 17 18 19 int K007342_vh_start(int gfx_index, void (*callback)(int layer,int bank,int *code,int *color)); 20 READ_HANDLER( K007342_r ); 21 WRITE_HANDLER( K007342_w ); 22 READ_HANDLER( K007342_scroll_r ); 23 WRITE_HANDLER( K007342_scroll_w ); 24 void K007342_tilemap_update(void); 25 WRITE_HANDLER( K007342_vreg_w ); 26 void K007342_tilemap_set_enable(int layer, int enable); 27 void K007342_tilemap_draw(struct mame_bitmap *bitmap,const struct rectangle *cliprect,int num,int flags,UINT32 priority); 28 int K007342_is_INT_enabled(void); 29 30 31 int K007420_vh_start(int gfxnum, void (*callback)(int *code,int *color)); 32 READ_HANDLER( K007420_r ); 33 WRITE_HANDLER( K007420_w ); 34 void K007420_sprites_draw(struct mame_bitmap *bitmap,const struct rectangle *cliprect); 35 void K007420_set_banklimit(int limit); 36 37 38 /* 39 You don't have to decode the graphics: the vh_start() routines will do that 40 for you, using the plane order passed. 41 Of course the ROM data must be in the correct order. This is a way to ensure 42 that the ROM test will pass. 43 The konami_rom_deinterleave() function above will do the reorganization for 44 you in most cases (but see tmnt.c for additional bit rotations or byte 45 permutations which may be required). 46 */ 47 #define NORMAL_PLANE_ORDER 0,1,2,3 48 #define REVERSE_PLANE_ORDER 3,2,1,0 49 50 51 /* 52 The callback is passed: 53 - layer number (0 = FIX, 1 = A, 2 = B) 54 - bank (range 0-3, output of the pins CAB1 and CAB2) 55 - code (range 00-FF, output of the pins VC3-VC10) 56 NOTE: code is in the range 0000-FFFF for X-Men, which uses extra RAM 57 - color (range 00-FF, output of the pins COL0-COL7) 58 The callback must put: 59 - in code the resulting tile number 60 - in color the resulting color index 61 - if necessary, put flags and/or priority for the TileMap code in the tile_info 62 structure (e.g. TILE_FLIPX). Note that TILE_FLIPY is handled internally by the 63 chip so it must not be set by the callback. 64 */ 65 extern struct tilemap *K052109_tilemap[3]; 66 67 int K052109_vh_start(int gfx_memory_region,int plane0,int plane1,int plane2,int plane3, 68 void (*callback)(int layer,int bank,int *code,int *color)); 69 /* plain 8-bit access */ 70 READ_HANDLER( K052109_r ); 71 WRITE_HANDLER( K052109_w ); 72 READ16_HANDLER( K052109_word_r ); 73 WRITE16_HANDLER( K052109_word_w ); 74 READ16_HANDLER( K052109_lsb_r ); 75 WRITE16_HANDLER( K052109_lsb_w ); 76 void K052109_set_RMRD_line(int state); 77 void K052109_tilemap_update(void); 78 int K052109_is_IRQ_enabled(void); 79 void K052109_set_layer_offsets(int layer, int dx, int dy); 80 81 82 /* 83 The callback is passed: 84 - code (range 00-1FFF, output of the pins CA5-CA17) 85 - color (range 00-FF, output of the pins OC0-OC7). Note that most of the 86 time COL7 seems to be "shadow", but not always (e.g. Aliens). 87 The callback must put: 88 - in code the resulting sprite number 89 - in color the resulting color index 90 - if necessary, in priority the priority of the sprite wrt tilemaps 91 - if necessary, alter shadow to indicate whether the sprite has shadows enabled. 92 shadow is preloaded with color & 0x80 so it doesn't need to be changed unless 93 the game has special treatment (Aliens) 94 */ 95 int K051960_vh_start(int gfx_memory_region,int plane0,int plane1,int plane2,int plane3, 96 void (*callback)(int *code,int *color,int *priority,int *shadow)); 97 READ_HANDLER( K051960_r ); 98 WRITE_HANDLER( K051960_w ); 99 READ16_HANDLER( K051960_word_r ); 100 WRITE16_HANDLER( K051960_word_w ); 101 READ_HANDLER( K051937_r ); 102 WRITE_HANDLER( K051937_w ); 103 READ16_HANDLER( K051937_word_r ); 104 WRITE16_HANDLER( K051937_word_w ); 105 void K051960_sprites_draw(struct mame_bitmap *bitmap,const struct rectangle *cliprect,int min_priority,int max_priority); 106 int K051960_is_IRQ_enabled(void); 107 int K051960_is_NMI_enabled(void); 108 109 /* special handling for the chips sharing address space */ 110 READ_HANDLER( K052109_051960_r ); 111 WRITE_HANDLER( K052109_051960_w ); 112 113 114 int K053245_vh_start(int chip, int gfx_memory_region,int plane0,int plane1,int plane2,int plane3, 115 void (*callback)(int *code,int *color,int *priority_mask)); 116 READ16_HANDLER( K053245_word_r ); 117 WRITE16_HANDLER( K053245_word_w ); 118 READ_HANDLER( K053245_r ); 119 WRITE_HANDLER( K053245_w ); 120 WRITE_HANDLER( K053245_1_w ); 121 READ_HANDLER( K053244_r ); 122 WRITE_HANDLER( K053244_w ); 123 WRITE_HANDLER( K053244_1_w ); 124 READ16_HANDLER( K053244_lsb_r ); 125 WRITE16_HANDLER( K053244_lsb_w ); 126 READ16_HANDLER( K053244_word_r ); 127 WRITE16_HANDLER( K053244_word_w ); 128 void K053244_bankselect(int chip, int bank); /* used by TMNT2, Asterix and Premier Soccer for ROM testing */ 129 void K053245_sprites_draw(int chip, struct mame_bitmap *bitmap,const struct rectangle *cliprect); 130 void K053245_sprites_draw_lethal(int chip, struct mame_bitmap *bitmap,const struct rectangle *cliprect); /* for lethal enforcers */ 131 void K053245_clear_buffer(int chip); 132 void K053245_set_SpriteOffset(int chip,int offsx, int offsy); 133 134 #define K055673_LAYOUT_GX 0 135 #define K055673_LAYOUT_RNG 1 136 #define K055673_LAYOUT_LE2 2 137 #define K055673_LAYOUT_GX6 3 138 139 int K055673_vh_start(int gfx_memory_region, int alt_layout, int dx, int dy, 140 void (*callback)(int *code,int *color,int *priority)); 141 READ16_HANDLER( K055673_rom_word_r ); 142 READ16_HANDLER( K055673_GX6bpp_rom_word_r ); 143 144 /* 145 Callback procedures for non-standard shadows: 146 147 1) translate shadow code to the correct 2-bit form (0=off, 1-3=style) 148 2) shift shadow code left by K053247_SHDSHIFT and add the K053247_CUSTOMSHADOW flag 149 3) combine the result with sprite color 150 */ 151 #define K053247_CUSTOMSHADOW 0x20000000 152 #define K053247_SHDSHIFT 20 153 154 int K053247_vh_start(int gfx_memory_region,int dx,int dy,int plane0,int plane1,int plane2,int plane3, 155 void (*callback)(int *code,int *color,int *priority_mask)); 156 READ_HANDLER( K053247_r ); 157 WRITE_HANDLER( K053247_w ); 158 READ16_HANDLER( K053247_word_r ); 159 WRITE16_HANDLER( K053247_word_w ); 160 READ32_HANDLER( K053247_long_r ); 161 WRITE32_HANDLER( K053247_long_w ); 162 WRITE16_HANDLER( K053247_reg_word_w ); /* "OBJSET2" registers*/ 163 WRITE32_HANDLER( K053247_reg_long_w ); 164 void K053247_sprites_draw(struct mame_bitmap *bitmap,const struct rectangle *cliprect); 165 int K053247_read_register(int regnum); 166 void K053247_set_SpriteOffset(int offsx, int offsy); 167 void K053247_wraparound_enable(int status); 168 void K05324x_set_z_rejection(int zcode); /* common to K053245/6/7 */ 169 void K053247_export_config(data16_t **ram, struct GfxElement **gfx, void (**callback)(int *, int *, int *), int *dx, int *dy); 170 171 READ_HANDLER( K053246_r ); 172 WRITE_HANDLER( K053246_w ); 173 READ16_HANDLER( K053246_word_r ); 174 WRITE16_HANDLER( K053246_word_w ); 175 READ32_HANDLER( K053246_long_r ); 176 WRITE32_HANDLER( K053246_long_w ); 177 void K053246_set_OBJCHA_line(int state); 178 int K053246_is_IRQ_enabled(void); 179 int K053246_read_register(int regnum); 180 181 182 /* 183 The callback is passed: 184 - code (range 00-FF, contents of the first tilemap RAM byte) 185 - color (range 00-FF, contents of the first tilemap RAM byte). Note that bit 6 186 seems to be hardcoded as flip X. 187 The callback must put: 188 - in code the resulting tile number 189 - in color the resulting color index 190 - if necessary, put flags for the TileMap code in the tile_info 191 structure (e.g. TILE_FLIPX) 192 */ 193 int K051316_vh_start_0(int gfx_memory_region,int bpp, 194 int tilemap_type,int transparent_pen, 195 void (*callback)(int *code,int *color)); 196 int K051316_vh_start_1(int gfx_memory_region,int bpp, 197 int tilemap_type,int transparent_pen, 198 void (*callback)(int *code,int *color)); 199 int K051316_vh_start_2(int gfx_memory_region,int bpp, 200 int tilemap_type,int transparent_pen, 201 void (*callback)(int *code,int *color)); 202 READ_HANDLER( K051316_0_r ); 203 READ_HANDLER( K051316_1_r ); 204 READ_HANDLER( K051316_2_r ); 205 WRITE_HANDLER( K051316_0_w ); 206 WRITE_HANDLER( K051316_1_w ); 207 WRITE_HANDLER( K051316_2_w ); 208 READ_HANDLER( K051316_rom_0_r ); 209 READ_HANDLER( K051316_rom_1_r ); 210 READ_HANDLER( K051316_rom_2_r ); 211 WRITE_HANDLER( K051316_ctrl_0_w ); 212 WRITE_HANDLER( K051316_ctrl_1_w ); 213 WRITE_HANDLER( K051316_ctrl_2_w ); 214 void K051316_zoom_draw_0(struct mame_bitmap *bitmap,const struct rectangle *cliprect,int flags,UINT32 priority); 215 void K051316_zoom_draw_1(struct mame_bitmap *bitmap,const struct rectangle *cliprect,int flags,UINT32 priority); 216 void K051316_zoom_draw_2(struct mame_bitmap *bitmap,const struct rectangle *cliprect,int flags,UINT32 priority); 217 void K051316_wraparound_enable(int chip, int status); 218 void K051316_set_offset(int chip, int xoffs, int yoffs); 219 220 221 extern data16_t *K053936_0_ctrl,*K053936_0_linectrl; 222 extern data16_t *K053936_1_ctrl,*K053936_1_linectrl; 223 void K053936_0_zoom_draw(struct mame_bitmap *bitmap,const struct rectangle *cliprect,struct tilemap *tilemap,int flags,UINT32 priority); 224 void K053936_1_zoom_draw(struct mame_bitmap *bitmap,const struct rectangle *cliprect,struct tilemap *tilemap,int flags,UINT32 priority); 225 void K053936_wraparound_enable(int chip, int status); 226 void K053936_set_offset(int chip, int xoffs, int yoffs); 227 228 229 /* 230 Note: K053251_w() automatically does a tilemap_mark_all_tiles_dirty(ALL_TILEMAPS) 231 when some palette index changes. If ALL_TILEMAPS is too expensive, use 232 K053251_set_tilemaps() to indicate which tilemap is associated with each index. 233 */ 234 WRITE_HANDLER( K053251_w ); 235 WRITE16_HANDLER( K053251_lsb_w ); 236 WRITE16_HANDLER( K053251_msb_w ); 237 enum { K053251_CI0=0,K053251_CI1,K053251_CI2,K053251_CI3,K053251_CI4 }; 238 int K053251_get_priority(int ci); 239 int K053251_get_palette_index(int ci); 240 void K053251_set_tilemaps(struct tilemap *ci0,struct tilemap *ci1,struct tilemap *ci2,struct tilemap *ci3,struct tilemap *ci4); 241 int K053251_vh_start(void); 242 243 244 WRITE_HANDLER( K054000_w ); 245 READ_HANDLER( K054000_r ); 246 WRITE16_HANDLER( K054000_lsb_w ); 247 READ16_HANDLER( K054000_lsb_r ); 248 249 WRITE_HANDLER( K051733_w ); 250 READ_HANDLER( K051733_r ); 251 252 int K054157_vh_start(int gfx_memory_region, int big, int (*scrolld)[4][2], 253 int plane0,int plane1,int plane2,int plane3, 254 void (*callback)(int, int *, int *)); 255 READ16_HANDLER( K054157_ram_word_r ); 256 WRITE16_HANDLER( K054157_ram_word_w ); 257 READ16_HANDLER( K054157_ram_half_word_r ); 258 WRITE16_HANDLER( K054157_ram_half_word_w ); 259 READ16_HANDLER( K054157_rom_word_r ); 260 READ16_HANDLER( K054157_rom_word_8000_r ); 261 WRITE16_HANDLER( K054157_word_w ); 262 WRITE16_HANDLER( K054157_b_word_w ); 263 264 void K054157_tilemap_update(void); 265 void K054157_tilemap_draw(struct mame_bitmap *bitmap, const struct rectangle *cliprect, int num, int flags, UINT32 priority); 266 void K054157_tilemap_draw_alpha(struct mame_bitmap *bitmap, const struct rectangle *cliprect, int num, int flags, int alpha); 267 int K054157_is_IRQ_enabled(void); 268 int K054157_get_lookup(int bits); 269 void K054157_set_tile_bank(int bank); /* Asterix */ 270 int K054157_get_current_rambank(void); 271 void K056832_SetExtLinescroll(void); /* Lethal Enforcers */ 272 273 int K056832_vh_start(int gfx_memory_region, int bpp, int big, 274 int (*scrolld)[4][2], 275 void (*callback)(int, int *, int *), 276 int djmain_hack); 277 READ16_HANDLER( K056832_ram_word_r ); 278 WRITE16_HANDLER( K056832_ram_word_w ); 279 READ16_HANDLER( K056832_ram_half_word_r ); 280 WRITE16_HANDLER( K056832_ram_half_word_w ); 281 READ16_HANDLER( K056832_5bpp_rom_word_r ); 282 READ32_HANDLER( K056832_5bpp_rom_long_r ); 283 READ32_HANDLER( K056832_6bpp_rom_long_r ); 284 READ16_HANDLER( K056832_rom_word_r ); 285 READ16_HANDLER( K056832_old_rom_word_r ); 286 WRITE16_HANDLER( K056832_word_w ); /* "VRAM" registers */ 287 WRITE16_HANDLER( K056832_b_word_w ); 288 READ_HANDLER( K056832_ram_code_lo_r ); 289 READ_HANDLER( K056832_ram_code_hi_r ); 290 READ_HANDLER( K056832_ram_attr_lo_r ); 291 READ_HANDLER( K056832_ram_attr_hi_r ); 292 WRITE_HANDLER( K056832_ram_code_lo_w ); 293 WRITE_HANDLER( K056832_ram_code_hi_w ); 294 WRITE_HANDLER( K056832_ram_attr_lo_w ); 295 WRITE_HANDLER( K056832_ram_attr_hi_w ); 296 WRITE_HANDLER( K056832_w ); 297 WRITE_HANDLER( K056832_b_w ); 298 void K056832_mark_plane_dirty(int num); 299 void K056832_MarkAllTilemapsDirty(void); 300 void K056832_tilemap_draw(struct mame_bitmap *bitmap, const struct rectangle *cliprect, int num, int flags, UINT32 priority); 301 void K056832_tilemap_draw_dj(struct mame_bitmap *bitmap, const struct rectangle *cliprect, int layer, int flags, UINT32 priority); 302 void K056832_set_LayerAssociation(int status); 303 int K056832_get_LayerAssociation(void); 304 void K056832_set_LayerOffset(int layer, int offsx, int offsy); 305 void K056832_set_LSRAMPage(int logical_page, int physical_page, int physical_offset); 306 void K056832_set_UpdateMode(int mode); 307 void K056832_linemap_enable(int enable); 308 int K056832_is_IRQ_enabled(int irqline); 309 void K056832_read_AVAC(int *mode, int *data); 310 int K056832_read_register(int regnum); 311 int K056832_get_current_rambank(void); 312 int K056832_get_lookup(int bits); /* Asterix */ 313 void K056832_set_tile_bank(int bank); /* Asterix */ 314 315 READ32_HANDLER( K056832_ram_long_r ); 316 READ32_HANDLER( K056832_rom_long_r ); 317 WRITE32_HANDLER( K056832_ram_long_w ); 318 WRITE32_HANDLER( K056832_long_w ); 319 WRITE32_HANDLER( K056832_b_long_w ); 320 321 322 /* bit depths for the 56832 */ 323 #define K056832_BPP_4 0 324 #define K056832_BPP_5 1 325 #define K056832_BPP_6 2 326 #define K056832_BPP_8 3 327 #define K056832_BPP_4dj 4 328 #define K056832_BPP_8LE 5 329 330 void K055555_vh_start(void); /* "PCU2"*/ 331 void K055555_write_reg(data8_t regnum, data8_t regdat); 332 WRITE16_HANDLER( K055555_word_w ); 333 WRITE32_HANDLER( K055555_long_w ); 334 int K055555_read_register(int regnum); 335 int K055555_get_palette_index(int idx); 336 337 /* K055555 registers */ 338 /* priority inputs */ 339 #define K55_PALBASE_BG 0 /* background palette*/ 340 #define K55_CONTROL 1 /* control register*/ 341 #define K55_COLSEL_0 2 /* layer A, B color depth*/ 342 #define K55_COLSEL_1 3 /* layer C, D color depth*/ 343 #define K55_COLSEL_2 4 /* object, S1 color depth*/ 344 #define K55_COLSEL_3 5 /* S2, S3 color depth*/ 345 346 #define K55_PRIINP_0 7 /* layer A pri 0*/ 347 #define K55_PRIINP_1 8 /* layer A pri 1*/ 348 #define K55_PRIINP_2 9 /* layer A "COLPRI"*/ 349 #define K55_PRIINP_3 10 /* layer B pri 0*/ 350 #define K55_PRIINP_4 11 /* layer B pri 1*/ 351 #define K55_PRIINP_5 12 /* layer B "COLPRI"*/ 352 #define K55_PRIINP_6 13 /* layer C pri*/ 353 #define K55_PRIINP_7 14 /* layer D pri*/ 354 #define K55_PRIINP_8 15 /* OBJ pri*/ 355 #define K55_PRIINP_9 16 /* sub 1 (GP:PSAC) pri*/ 356 #define K55_PRIINP_10 17 /* sub 2 (GX:PSAC) pri*/ 357 #define K55_PRIINP_11 18 /* sub 3 pri*/ 358 359 #define K55_OINPRI_ON 19 /* object priority bits selector*/ 360 361 #define K55_PALBASE_A 23 /* layer A palette*/ 362 #define K55_PALBASE_B 24 /* layer B palette*/ 363 #define K55_PALBASE_C 25 /* layer C palette*/ 364 #define K55_PALBASE_D 26 /* layer D palette*/ 365 #define K55_PALBASE_OBJ 27 /* OBJ palette*/ 366 #define K55_PALBASE_SUB1 28 /* SUB1 palette*/ 367 #define K55_PALBASE_SUB2 29 /* SUB2 palette*/ 368 #define K55_PALBASE_SUB3 30 /* SUB3 palette*/ 369 370 #define K55_BLEND_ENABLES 33 /* blend enables for tilemaps*/ 371 #define K55_VINMIX_ON 34 /* additional blend enables for tilemaps*/ 372 #define K55_OSBLEND_ENABLES 35 /* obj/sub blend enables*/ 373 #define K55_OSBLEND_ON 36 /* not sure, related to obj/sub blend*/ 374 375 #define K55_SHAD1_PRI 37 /* shadow/highlight 1 priority*/ 376 #define K55_SHAD2_PRI 38 /* shadow/highlight 2 priority*/ 377 #define K55_SHAD3_PRI 39 /* shadow/highlight 3 priority*/ 378 #define K55_SHD_ON 40 /* shadow/highlight*/ 379 #define K55_SHD_PRI_SEL 41 /* shadow/highlight*/ 380 381 #define K55_VBRI 42 /* VRAM layer brightness enable*/ 382 #define K55_OSBRI 43 /* obj/sub brightness enable, part 1*/ 383 #define K55_OSBRI_ON 44 /* obj/sub brightness enable, part 2*/ 384 #define K55_INPUT_ENABLES 45 /* input enables*/ 385 386 /* bit masks for the control register */ 387 #define K55_CTL_GRADDIR 0x01 /* 0=vertical, 1=horizontal*/ 388 #define K55_CTL_GRADENABLE 0x02 /* 0=BG is base color only, 1=gradient*/ 389 #define K55_CTL_FLIPPRI 0x04 /* 0=standard Konami priority, 1=reverse*/ 390 #define K55_CTL_SDSEL 0x08 /* 0=normal shadow timing, 1=(not used by GX)*/ 391 392 /* bit masks for the input enables */ 393 #define K55_INP_VRAM_A 0x01 394 #define K55_INP_VRAM_B 0x02 395 #define K55_INP_VRAM_C 0x04 396 #define K55_INP_VRAM_D 0x08 397 #define K55_INP_OBJ 0x10 398 #define K55_INP_SUB1 0x20 399 #define K55_INP_SUB2 0x40 400 #define K55_INP_SUB3 0x80 401 402 /* K054338 mixer/alpha blender */ 403 int K054338_vh_start(void); 404 WRITE16_HANDLER( K054338_word_w ); /* "CLCT" registers*/ 405 WRITE32_HANDLER( K054338_long_w ); 406 int K054338_read_register(int reg); 407 void K054338_update_all_shadows(void); /* called at the beginning of VIDEO_UPDATE()*/ 408 void K054338_fill_solid_bg(struct mame_bitmap *bitmap); /* solid backcolor fill*/ 409 void K054338_fill_backcolor(struct mame_bitmap *bitmap, int mode); /* unified fill, 0=solid, 1=gradient*/ 410 int K054338_set_alpha_level(int pblend); /* blend style 0-2*/ 411 void K054338_invert_alpha(int invert); /* 0=0x00(invis)-0x1f(solid), 1=0x1f(invis)-0x00(solod)*/ 412 void K054338_export_config(int **shdRGB); 413 414 #define K338_REG_BGC_R 0 415 #define K338_REG_BGC_GB 1 416 #define K338_REG_SHAD1R 2 417 #define K338_REG_BRI3 11 418 #define K338_REG_PBLEND 13 419 #define K338_REG_CONTROL 15 420 421 #define K338_CTL_KILL 0x01 /* 0 = no video output, 1 = enable */ 422 #define K338_CTL_MIXPRI 0x02 423 #define K338_CTL_SHDPRI 0x04 424 #define K338_CTL_BRTPRI 0x08 425 #define K338_CTL_WAILSL 0x10 426 #define K338_CTL_CLIPSL 0x20 427 428 int K053250_vh_start(int chips, int *region); 429 WRITE16_HANDLER( K053250_0_w ); 430 READ16_HANDLER( K053250_0_r ); 431 WRITE16_HANDLER( K053250_0_ram_w ); 432 READ16_HANDLER( K053250_0_ram_r ); 433 READ16_HANDLER( K053250_0_rom_r ); 434 WRITE16_HANDLER( K053250_1_w ); 435 READ16_HANDLER( K053250_1_r ); 436 WRITE16_HANDLER( K053250_1_ram_w ); 437 READ16_HANDLER( K053250_1_ram_r ); 438 READ16_HANDLER( K053250_1_rom_r ); 439 440 /* K053250_draw() control flags*/ 441 #define K053250_WRAP500 0x01 442 #define K053250_OVERDRIVE 0x02 443 444 void K053250_draw(struct mame_bitmap *bitmap, const struct rectangle *cliprect, int chip, int colorbase, int flags, int pri); 445 void K053250_set_LayerOffset(int chip, int offsx, int offsy); 446 void K053250_unpack_pixels(int region); 447 void K053250_dma(int chip, int limiter); 448 449 450 /* K053252 CRT and interrupt control unit*/ 451 READ16_HANDLER( K053252_word_r ); /* CCU registers*/ 452 WRITE16_HANDLER( K053252_word_w ); 453 WRITE32_HANDLER( K053252_long_w ); 454 455 456 /* debug handlers*/ 457 READ16_HANDLER( K054157_word_r ); /* VACSET (legacy)*/ 458 READ16_HANDLER( K056832_word_r ); /* VACSET*/ 459 READ16_HANDLER( K056832_b_word_r ); /* VSCCS (board dependent)*/ 460 READ16_HANDLER( K053246_reg_word_r ); /* OBJSET1*/ 461 READ16_HANDLER( K053247_reg_word_r ); /* OBJSET2*/ 462 READ16_HANDLER( K053251_lsb_r ); /* PCU1*/ 463 READ16_HANDLER( K053251_msb_r ); /* PCU1*/ 464 READ16_HANDLER( K055555_word_r ); /* PCU2*/ 465 READ16_HANDLER( K054338_word_r ); /* CLTC*/ 466 467 READ32_HANDLER( K056832_long_r ); /* VACSET*/ 468 READ32_HANDLER( K053247_reg_long_r ); /* OBJSET2*/ 469 READ32_HANDLER( K055555_long_r ); /* PCU2*/ 470 471 READ16_HANDLER( K053244_reg_word_r ); /* OBJSET0*/ 472