1 /*SED1376 Register Definitions*/ 2 3 /*Read-Only Configuration Registers*/ 4 #define REV_CODE 0x00 5 #define DISP_BUFF_SIZE 0x01 6 #define CFG_READBACK 0x02 7 8 /*Clock Configuration Registers*/ 9 #define MEM_CLK 0x04 10 #define PIXEL_CLK 0x05 11 12 /*Look Up Table Registers*/ 13 #define LUT_B_WRITE 0x08 14 #define LUT_G_WRITE 0x09 15 #define LUT_R_WRITE 0x0A 16 #define LUT_WRITE_LOC 0x0B 17 #define LUT_B_READ 0x0C 18 #define LUT_G_READ 0x0D 19 #define LUT_R_READ 0x0E 20 #define LUT_READ_LOC 0x0F 21 22 /*Panel Configuration Registers*/ 23 #define PANEL_TYPE 0x10 24 #define MOD_RATE 0x11 25 #define HORIZ_TOTAL 0x12 26 #define HORIZ_PERIOD 0x14 27 #define HORIZ_START_0 0x16 28 #define HORIZ_START_1 0x17 29 #define VERT_TOTAL_0 0x18 30 #define VERT_TOTAL_1 0x19 31 #define VERT_PERIOD_0 0x1C 32 #define VERT_PERIOD_1 0x1D 33 #define VERT_START_0 0x1E 34 #define VERT_START_1 0x1F 35 #define FPLINE_WIDTH 0x20 36 #define FPLINE_START_0 0x22 37 #define FPLINE_START_1 0x23 38 #define FPFRAME_WIDTH 0x24 39 #define FPFRAME_START_0 0x26 40 #define FPFRAME_START_1 0x27 41 #define DTFD_GCP_INDEX 0x28 42 #define DTFD_GCP_DATA 0x2C 43 44 /*Display Mode Registers*/ 45 #define DISP_MODE 0x70 46 #define SPECIAL_EFFECT 0x71 47 #define DISP_ADDR_0 0x74 48 #define DISP_ADDR_1 0x75 49 #define DISP_ADDR_2 0x76 50 #define LINE_SIZE_0 0x78 51 #define LINE_SIZE_1 0x79 52 53 /*Picture-in-Picture Plus (PIP+) Registers*/ 54 #define PIP_ADDR_0 0x7C 55 #define PIP_ADDR_1 0x7D 56 #define PIP_ADDR_2 0x7E 57 #define PIP_LINE_SZ_0 0x80 58 #define PIP_LINE_SZ_1 0x81 59 #define PIP_X_START_0 0x84 60 #define PIP_X_START_1 0x85 61 #define PIP_Y_START_0 0x88 62 #define PIP_Y_START_1 0x89 63 #define PIP_X_END_0 0x8C 64 #define PIP_X_END_1 0x8D 65 #define PIP_Y_END_0 0x90 66 #define PIP_Y_END_1 0x91 67 68 /*Miscellaneous Registers*/ 69 #define PWR_SAVE_CFG 0xA0 70 #define SCRATCH_0 0xA4 71 #define SCRATCH_1 0xA5 72 73 /*General Purpose IO Pins Registers*/ 74 #define GPIO_CONF_0 0xA8 75 #define GPIO_CONF_1 0xA9 76 #define GPIO_CONT_0 0xAC 77 #define GPIO_CONT_1 0xAD 78 79 /*PWM Clock and CV Pulse Configuration Registers*/ 80 #define PWM_CONTROL 0xB0 81 #define PWM_CONFIG 0xB1 82 #define PWM_LENGTH 0xB2 83 #define PWM_DUTY_CYCLE 0xB3 84