1 /**************************************************************************
2 *
3 * Copyright 2003 VMware, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #ifndef I915_CONTEXT_H
29 #define I915_CONTEXT_H
30
31 #include "pipe/p_context.h"
32 #include "pipe/p_defines.h"
33 #include "pipe/p_state.h"
34
35 #include "draw/draw_vertex.h"
36
37 #include "tgsi/tgsi_scan.h"
38
39 #include "util/log.h"
40 #include "util/slab.h"
41 #include "util/u_blitter.h"
42 #include "i915_reg.h"
43
44 struct i915_winsys;
45 struct i915_winsys_buffer;
46 struct i915_winsys_batchbuffer;
47
48 #define I915_TEX_UNITS 8
49
50 #define I915_DYNAMIC_MODES4 0
51 #define I915_DYNAMIC_DEPTHSCALE_0 1 /* just the header */
52 #define I915_DYNAMIC_DEPTHSCALE_1 2
53 #define I915_DYNAMIC_IAB 3
54 #define I915_DYNAMIC_BC_0 4 /* just the header */
55 #define I915_DYNAMIC_BC_1 5
56 #define I915_DYNAMIC_BFO_0 6
57 #define I915_DYNAMIC_BFO_1 7
58 #define I915_DYNAMIC_STP_0 8
59 #define I915_DYNAMIC_STP_1 9
60 #define I915_DYNAMIC_SC_ENA_0 10
61 #define I915_DYNAMIC_SC_RECT_0 11
62 #define I915_DYNAMIC_SC_RECT_1 12
63 #define I915_DYNAMIC_SC_RECT_2 13
64 #define I915_MAX_DYNAMIC 14
65
66 #define I915_IMMEDIATE_S0 0
67 #define I915_IMMEDIATE_S1 1
68 #define I915_IMMEDIATE_S2 2
69 #define I915_IMMEDIATE_S3 3
70 #define I915_IMMEDIATE_S4 4
71 #define I915_IMMEDIATE_S5 5
72 #define I915_IMMEDIATE_S6 6
73 #define I915_IMMEDIATE_S7 7
74 #define I915_MAX_IMMEDIATE 8
75
76 /* These must mach the order of LI0_STATE_* bits, as they will be used
77 * to generate hardware packets:
78 */
79 #define I915_CACHE_STATIC 0
80 #define I915_CACHE_DYNAMIC 1 /* handled specially */
81 #define I915_CACHE_SAMPLER 2
82 #define I915_CACHE_MAP 3
83 #define I915_CACHE_PROGRAM 4
84 #define I915_CACHE_CONSTANTS 5
85 #define I915_MAX_CACHE 6
86
87 #define I915_MAX_CONSTANT 32
88
89 /** See constant_flags[] below */
90 #define I915_CONSTFLAG_USER 0x1f
91
92 /**
93 * Subclass of pipe_shader_state
94 */
95 struct i915_fragment_shader {
96 struct pipe_shader_state state;
97
98 struct tgsi_shader_info info;
99
100 struct draw_fragment_shader *draw_data;
101
102 uint32_t *program;
103 uint32_t program_len;
104
105 /**
106 * constants introduced during translation.
107 * These are placed at the end of the constant buffer and grow toward
108 * the beginning (eg: slot 31, 30 29, ...)
109 * User-provided constants start at 0.
110 * This allows both types of constants to co-exist (until there's too many)
111 * and doesn't require regenerating/changing the fragment program to
112 * shuffle constants around.
113 */
114 uint32_t num_constants;
115 float constants[I915_MAX_CONSTANT][4];
116
117 /**
118 * Status of each constant
119 * if I915_CONSTFLAG_PARAM, the value must be taken from the corresponding
120 * slot of the user's constant buffer. (set by pipe->set_constant_buffer())
121 * Else, the bitmask indicates which components are occupied by immediates.
122 */
123 ubyte constant_flags[I915_MAX_CONSTANT];
124
125 /**
126 * The mapping between TGSI inputs and hw texture coords.
127 * We need to share this between the vertex and fragment stages.
128 **/
129 struct {
130 enum tgsi_semantic semantic;
131 int index;
132 } texcoords[I915_TEX_UNITS];
133
134 bool reads_pntc;
135 };
136
137 struct i915_cache_context;
138
139 /* Use to calculate differences between state emitted to hardware and
140 * current driver-calculated state.
141 */
142 struct i915_state {
143 unsigned immediate[I915_MAX_IMMEDIATE];
144 unsigned dynamic[I915_MAX_DYNAMIC];
145
146 /** number of constants passed in through a constant buffer */
147 uint32_t num_user_constants[PIPE_SHADER_TYPES];
148
149 /* texture sampler state */
150 unsigned sampler[I915_TEX_UNITS][3];
151 unsigned sampler_enable_flags;
152 unsigned sampler_enable_nr;
153
154 /* texture image buffers */
155 unsigned texbuffer[I915_TEX_UNITS][3];
156
157 /** Describes the current hardware vertex layout */
158 struct vertex_info vertex_info;
159
160 /* static state (dst/depth buffer state) */
161 struct i915_winsys_buffer *cbuf_bo;
162 unsigned cbuf_flags;
163 struct i915_winsys_buffer *depth_bo;
164 unsigned depth_flags;
165 unsigned dst_buf_vars;
166 uint32_t draw_offset;
167 uint32_t draw_size;
168
169 /* Reswizzle for OC writes in PIXEL_SHADER_PROGRAM, or 0 if unnecessary. */
170 uint32_t fixup_swizzle;
171 /* Mapping from color buffer dst channels in HW to gallium API src channels.
172 */
173 uint8_t color_swizzle[4];
174
175 unsigned id; /* track lost context events */
176 };
177
178 struct i915_blend_state {
179 unsigned iab;
180 unsigned iab_alpha_in_g;
181 unsigned iab_alpha_is_x;
182
183 unsigned modes4;
184 unsigned LIS5;
185
186 unsigned LIS6;
187 unsigned LIS6_alpha_in_g;
188 unsigned LIS6_alpha_is_x;
189 };
190
191 struct i915_depth_stencil_state {
192 unsigned stencil_modes4_cw;
193 unsigned stencil_modes4_ccw;
194 unsigned bfo_cw[2];
195 unsigned bfo_ccw[2];
196 unsigned stencil_LIS5_cw;
197 unsigned stencil_LIS5_ccw;
198 unsigned depth_LIS6;
199 };
200
201 struct i915_rasterizer_state {
202 struct pipe_rasterizer_state templ;
203
204 unsigned light_twoside : 1;
205 unsigned st;
206
207 unsigned LIS4;
208 unsigned LIS6;
209 unsigned LIS7;
210 unsigned sc[1];
211
212 union {
213 float f;
214 unsigned u;
215 } ds[2];
216 };
217
218 struct i915_sampler_state {
219 struct pipe_sampler_state templ;
220 unsigned state[3];
221 unsigned minlod;
222 unsigned maxlod;
223 };
224
225 struct i915_surface {
226 struct pipe_surface templ;
227 uint32_t buf_info; /* _3DSTATE_BUF_INFO_CMD flags */
228
229 /* PIXEL_SHADER_PROGRAM swizzle for OC buffer to handle the cbuf format (or 0
230 * if none). */
231 uint32_t oc_swizzle;
232 /* cbuf swizzle from dst r/g/b/a channels in memory to channels of gallium
233 * API. */
234 uint8_t color_swizzle[4];
235
236 bool alpha_in_g : 1;
237 bool alpha_is_x : 1;
238 };
239
240 struct i915_velems_state {
241 unsigned count;
242 struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS];
243 };
244
245 struct i915_context {
246 struct pipe_context base;
247
248 struct i915_winsys *iws;
249
250 struct draw_context *draw;
251
252 /* The most recent drawing state as set by the driver:
253 */
254 const struct i915_blend_state *blend;
255 const struct i915_sampler_state *fragment_sampler[PIPE_MAX_SAMPLERS];
256 struct pipe_sampler_state *vertex_samplers[PIPE_MAX_SAMPLERS];
257 const struct i915_depth_stencil_state *depth_stencil;
258 const struct i915_rasterizer_state *rasterizer;
259
260 struct i915_fragment_shader *fs;
261
262 void *vs;
263
264 struct i915_velems_state *velems;
265 unsigned nr_vertex_buffers;
266 struct pipe_vertex_buffer vertex_buffers[PIPE_MAX_ATTRIBS];
267
268 struct pipe_blend_color blend_color;
269 struct pipe_stencil_ref stencil_ref;
270 struct pipe_clip_state clip;
271 struct pipe_resource *constants[PIPE_SHADER_TYPES];
272 struct pipe_framebuffer_state framebuffer;
273 struct pipe_poly_stipple poly_stipple;
274 struct pipe_scissor_state scissor;
275 struct pipe_sampler_view *fragment_sampler_views[PIPE_MAX_SAMPLERS];
276 struct pipe_viewport_state viewport;
277
278 unsigned dirty;
279
280 unsigned num_samplers;
281 unsigned num_fragment_sampler_views;
282
283 struct i915_winsys_batchbuffer *batch;
284
285 /** Vertex buffer */
286 struct i915_winsys_buffer *vbo;
287 size_t vbo_offset;
288 unsigned vbo_flushed;
289
290 struct i915_state current;
291 unsigned hardware_dirty;
292 unsigned immediate_dirty : I915_MAX_IMMEDIATE;
293 unsigned dynamic_dirty : I915_MAX_DYNAMIC;
294 unsigned static_dirty : 4;
295 unsigned flush_dirty : 2;
296
297 struct i915_winsys_buffer *validation_buffers[2 + 1 + I915_TEX_UNITS];
298 int num_validation_buffers;
299
300 struct slab_mempool transfer_pool;
301 struct slab_mempool texture_transfer_pool;
302
303 /* state for tracking flushes */
304 int last_fired_vertices;
305 int fired_vertices;
306 int queued_vertices;
307
308 bool no_log_program_errors;
309
310 /** blitter/hw-clear */
311 struct blitter_context *blitter;
312
313 struct pipe_debug_callback debug;
314 };
315
316 /* A flag for each frontend state object:
317 */
318 #define I915_NEW_VIEWPORT 0x1
319 #define I915_NEW_RASTERIZER 0x2
320 #define I915_NEW_FS 0x4
321 #define I915_NEW_BLEND 0x8
322 #define I915_NEW_CLIP 0x10
323 #define I915_NEW_SCISSOR 0x20
324 #define I915_NEW_STIPPLE 0x40
325 #define I915_NEW_FRAMEBUFFER 0x80
326 #define I915_NEW_ALPHA_TEST 0x100
327 #define I915_NEW_DEPTH_STENCIL 0x200
328 #define I915_NEW_SAMPLER 0x400
329 #define I915_NEW_SAMPLER_VIEW 0x800
330 #define I915_NEW_VS_CONSTANTS 0x1000
331 #define I915_NEW_FS_CONSTANTS 0x2000
332 #define I915_NEW_GS_CONSTANTS 0x4000
333 #define I915_NEW_VBO 0x8000
334 #define I915_NEW_VS 0x10000
335 #define I915_NEW_COLOR_SWIZZLE 0x20000
336
337 /* Driver's internally generated state flags:
338 */
339 #define I915_NEW_VERTEX_FORMAT 0x10000
340
341 /* Dirty flags for hardware emit
342 */
343 #define I915_HW_STATIC (1 << I915_CACHE_STATIC)
344 #define I915_HW_DYNAMIC (1 << I915_CACHE_DYNAMIC)
345 #define I915_HW_SAMPLER (1 << I915_CACHE_SAMPLER)
346 #define I915_HW_MAP (1 << I915_CACHE_MAP)
347 #define I915_HW_PROGRAM (1 << I915_CACHE_PROGRAM)
348 #define I915_HW_CONSTANTS (1 << I915_CACHE_CONSTANTS)
349 #define I915_HW_IMMEDIATE (1 << (I915_MAX_CACHE + 0))
350 #define I915_HW_INVARIANT (1 << (I915_MAX_CACHE + 1))
351 #define I915_HW_FLUSH (1 << (I915_MAX_CACHE + 1))
352
353 /* hw flush handling */
354 #define I915_FLUSH_CACHE 1
355 #define I915_PIPELINE_FLUSH 2
356
357 /* split up static state */
358 #define I915_DST_BUF_COLOR 1
359 #define I915_DST_BUF_DEPTH 2
360 #define I915_DST_VARS 4
361 #define I915_DST_RECT 8
362
363 static inline void
i915_set_flush_dirty(struct i915_context * i915,unsigned flush)364 i915_set_flush_dirty(struct i915_context *i915, unsigned flush)
365 {
366 i915->hardware_dirty |= I915_HW_FLUSH;
367 i915->flush_dirty |= flush;
368 }
369
370 static inline uint32_t
i915_stencil_ccw(struct i915_context * i915)371 i915_stencil_ccw(struct i915_context *i915)
372 {
373 /* If we're doing two sided stencil, then front_ccw means we need to reverse
374 * the state for the sides.
375 */
376 return i915->rasterizer->templ.front_ccw &&
377 (i915->depth_stencil->bfo_cw[0] & BFO_STENCIL_TWO_SIDE);
378 }
379 /***********************************************************************
380 * i915_prim_emit.c:
381 */
382 struct draw_stage *i915_draw_render_stage(struct i915_context *i915);
383
384 /***********************************************************************
385 * i915_prim_vbuf.c:
386 */
387 struct draw_stage *i915_draw_vbuf_stage(struct i915_context *i915);
388
389 /***********************************************************************
390 * i915_state_emit.c:
391 */
392 void i915_emit_hardware_state(struct i915_context *i915);
393
394 /***********************************************************************
395 * i915_clear.c:
396 */
397 void i915_clear_blitter(struct pipe_context *pipe, unsigned buffers,
398 const struct pipe_scissor_state *scissor_state,
399 const union pipe_color_union *color, double depth,
400 unsigned stencil);
401 void i915_clear_render(struct pipe_context *pipe, unsigned buffers,
402 const struct pipe_scissor_state *scissor_state,
403 const union pipe_color_union *color, double depth,
404 unsigned stencil);
405 void i915_clear_emit(struct pipe_context *pipe, unsigned buffers,
406 const union pipe_color_union *color, double depth,
407 unsigned stencil, unsigned destx, unsigned desty,
408 unsigned width, unsigned height);
409
410 /***********************************************************************
411 *
412 */
413 void i915_init_state_functions(struct i915_context *i915);
414 void i915_init_flush_functions(struct i915_context *i915);
415 void i915_init_string_functions(struct i915_context *i915);
416
417 /************************************************************************
418 * i915_context.c
419 */
420 struct pipe_context *i915_create_context(struct pipe_screen *screen, void *priv,
421 unsigned flags);
422
423 /***********************************************************************
424 * Inline conversion functions. These are better-typed than the
425 * macros used previously:
426 */
427 static inline struct i915_context *
i915_context(struct pipe_context * pipe)428 i915_context(struct pipe_context *pipe)
429 {
430 return (struct i915_context *)pipe;
431 }
432
433 static inline struct i915_surface *
i915_surface(struct pipe_surface * pipe)434 i915_surface(struct pipe_surface *pipe)
435 {
436 return (struct i915_surface *)pipe;
437 }
438
439 #endif
440