1 //===-- AMDGPUCodeEmitter.h - AMDGPU Code Emitter interface -----*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 /// \file
10 /// CodeEmitter interface for R600 and SI codegen.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUMCCODEEMITTER_H
15 #define LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUMCCODEEMITTER_H
16 
17 #include "llvm/MC/MCCodeEmitter.h"
18 #include <cstdint>
19 
20 namespace llvm {
21 
22 class MCInst;
23 class MCInstrInfo;
24 class MCOperand;
25 class MCSubtargetInfo;
26 class FeatureBitset;
27 
28 class AMDGPUMCCodeEmitter : public MCCodeEmitter {
29   virtual void anchor();
30 
31 protected:
32   const MCInstrInfo &MCII;
33 
AMDGPUMCCodeEmitter(const MCInstrInfo & mcii)34   AMDGPUMCCodeEmitter(const MCInstrInfo &mcii) : MCII(mcii) {}
35 
36 public:
37 
38   uint64_t getBinaryCodeForInstr(const MCInst &MI,
39                                  SmallVectorImpl<MCFixup> &Fixups,
40                                  const MCSubtargetInfo &STI) const;
41 
getMachineOpValue(const MCInst & MI,const MCOperand & MO,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI)42   virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
43                                      SmallVectorImpl<MCFixup> &Fixups,
44                                      const MCSubtargetInfo &STI) const {
45     return 0;
46   }
47 
getSOPPBrEncoding(const MCInst & MI,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI)48   virtual unsigned getSOPPBrEncoding(const MCInst &MI, unsigned OpNo,
49                                      SmallVectorImpl<MCFixup> &Fixups,
50                                      const MCSubtargetInfo &STI) const {
51     return 0;
52   }
53 
getSMEMOffsetEncoding(const MCInst & MI,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI)54   virtual unsigned getSMEMOffsetEncoding(const MCInst &MI, unsigned OpNo,
55                                          SmallVectorImpl<MCFixup> &Fixups,
56                                          const MCSubtargetInfo &STI) const {
57     return 0;
58   }
59 
getSDWASrcEncoding(const MCInst & MI,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI)60   virtual unsigned getSDWASrcEncoding(const MCInst &MI, unsigned OpNo,
61                                       SmallVectorImpl<MCFixup> &Fixups,
62                                       const MCSubtargetInfo &STI) const {
63     return 0;
64   }
65 
getSDWAVopcDstEncoding(const MCInst & MI,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI)66   virtual unsigned getSDWAVopcDstEncoding(const MCInst &MI, unsigned OpNo,
67                                           SmallVectorImpl<MCFixup> &Fixups,
68                                           const MCSubtargetInfo &STI) const {
69     return 0;
70   }
71 
getAVOperandEncoding(const MCInst & MI,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI)72   virtual unsigned getAVOperandEncoding(const MCInst &MI, unsigned OpNo,
73                                         SmallVectorImpl<MCFixup> &Fixups,
74                                         const MCSubtargetInfo &STI) const {
75     return 0;
76   }
77 
78 protected:
79   FeatureBitset computeAvailableFeatures(const FeatureBitset &FB) const;
80   void
81   verifyInstructionPredicates(const MCInst &MI,
82                               const FeatureBitset &AvailableFeatures) const;
83 };
84 
85 } // End namespace llvm
86 
87 #endif
88