1; RUN: llc -march=amdgcn -mcpu=tahiti -show-mc-encoding < %s | FileCheck -check-prefix=GCN -check-prefix=SI %s
2; RUN: llc -march=amdgcn -mcpu=fiji -show-mc-encoding < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s
3
4declare void @llvm.amdgcn.s.dcache.inv() #0
5declare void @llvm.amdgcn.s.waitcnt(i32) #0
6
7; GCN-LABEL: {{^}}test_s_dcache_inv:
8; GCN-NEXT: ; %bb.0:
9; SI-NEXT: s_dcache_inv ; encoding: [0x00,0x00,0xc0,0xc7]
10; VI-NEXT: s_dcache_inv ; encoding: [0x00,0x00,0x80,0xc0,0x00,0x00,0x00,0x00]
11; GCN-NEXT: s_endpgm
12define amdgpu_kernel void @test_s_dcache_inv() #0 {
13  call void @llvm.amdgcn.s.dcache.inv()
14  ret void
15}
16
17; GCN-LABEL: {{^}}test_s_dcache_inv_insert_wait:
18; GCN-NEXT: ; %bb.0:
19; GCN: s_dcache_inv
20; GCN: s_waitcnt lgkmcnt(0) ; encoding
21define amdgpu_kernel void @test_s_dcache_inv_insert_wait() #0 {
22  call void @llvm.amdgcn.s.dcache.inv()
23  call void @llvm.amdgcn.s.waitcnt(i32 127)
24  br label %end
25
26end:
27  store volatile i32 3, i32 addrspace(1)* undef
28  ret void
29}
30
31attributes #0 = { nounwind }
32