1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; Check the vctlz* instructions that were added in P8
3; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s
4; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff -vec-extabi -mcpu=pwr8 < %s | FileCheck %s
5; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 -mattr=-vsx < %s | FileCheck %s --check-prefix=CHECK-NOVSX
6; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff -vec-extabi -mcpu=pwr8 -mattr=-vsx < %s | FileCheck %s --check-prefix=CHECK-NOVSX
7
8declare <16 x i8> @llvm.ctlz.v16i8(<16 x i8>) nounwind readnone
9declare <8 x i16> @llvm.ctlz.v8i16(<8 x i16>) nounwind readnone
10declare <4 x i32> @llvm.ctlz.v4i32(<4 x i32>) nounwind readnone
11declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>) nounwind readnone
12
13define <16 x i8> @test_v16i8(<16 x i8> %x) nounwind readnone {
14; CHECK-LABEL: test_v16i8:
15; CHECK:       # %bb.0:
16; CHECK-NEXT:    vclzb 2, 2
17; CHECK-NEXT:    blr
18;
19; CHECK-NOVSX-LABEL: test_v16i8:
20; CHECK-NOVSX:       # %bb.0:
21; CHECK-NOVSX-NEXT:    vclzb 2, 2
22; CHECK-NOVSX-NEXT:    blr
23       %vcnt = tail call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %x)
24       ret <16 x i8> %vcnt
25}
26
27define <8 x i16> @test_v8i16(<8 x i16> %x) nounwind readnone {
28; CHECK-LABEL: test_v8i16:
29; CHECK:       # %bb.0:
30; CHECK-NEXT:    vclzh 2, 2
31; CHECK-NEXT:    blr
32;
33; CHECK-NOVSX-LABEL: test_v8i16:
34; CHECK-NOVSX:       # %bb.0:
35; CHECK-NOVSX-NEXT:    vclzh 2, 2
36; CHECK-NOVSX-NEXT:    blr
37       %vcnt = tail call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %x)
38       ret <8 x i16> %vcnt
39}
40
41define <4 x i32> @test_v4i32(<4 x i32> %x) nounwind readnone {
42; CHECK-LABEL: test_v4i32:
43; CHECK:       # %bb.0:
44; CHECK-NEXT:    vclzw 2, 2
45; CHECK-NEXT:    blr
46;
47; CHECK-NOVSX-LABEL: test_v4i32:
48; CHECK-NOVSX:       # %bb.0:
49; CHECK-NOVSX-NEXT:    vclzw 2, 2
50; CHECK-NOVSX-NEXT:    blr
51       %vcnt = tail call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %x)
52       ret <4 x i32> %vcnt
53}
54
55define <2 x i64> @test_v2i64(<2 x i64> %x) nounwind readnone {
56; CHECK-LABEL: test_v2i64:
57; CHECK:       # %bb.0:
58; CHECK-NEXT:    vclzd 2, 2
59; CHECK-NEXT:    blr
60;
61; CHECK-NOVSX-LABEL: test_v2i64:
62; CHECK-NOVSX:       # %bb.0:
63; CHECK-NOVSX-NEXT:    vclzd 2, 2
64; CHECK-NOVSX-NEXT:    blr
65       %vcnt = tail call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %x)
66       ret <2 x i64> %vcnt
67}
68
69declare <2 x i32> @llvm.ctlz.v2i32(<2 x i32>, i1 immarg)
70
71define <2 x i32> @illegal_ctlz(<2 x i32> %v1) {
72; CHECK-LABEL: illegal_ctlz:
73; CHECK:       # %bb.0:
74; CHECK-NEXT:    vclzw 2, 2
75; CHECK-NEXT:    blr
76;
77; CHECK-NOVSX-LABEL: illegal_ctlz:
78; CHECK-NOVSX:       # %bb.0:
79; CHECK-NOVSX-NEXT:    vclzw 2, 2
80; CHECK-NOVSX-NEXT:    blr
81  %v2 = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %v1, i1 true)
82  ret <2 x i32> %v2
83}
84
85declare <2 x i32> @llvm.cttz.v2i32(<2 x i32>, i1 immarg)
86
87define <2 x i32> @illegal_cttz(<2 x i32> %v1) {
88; CHECK-LABEL: illegal_cttz:
89; CHECK:       # %bb.0:
90; CHECK-NEXT:    vspltisw 3, 1
91; CHECK-NEXT:    vsubuwm 3, 2, 3
92; CHECK-NEXT:    xxlandc 34, 35, 34
93; CHECK-NEXT:    vpopcntw 2, 2
94; CHECK-NEXT:    blr
95;
96; CHECK-NOVSX-LABEL: illegal_cttz:
97; CHECK-NOVSX:       # %bb.0:
98; CHECK-NOVSX-NEXT:    vspltisw 3, 1
99; CHECK-NOVSX-NEXT:    vsubuwm 3, 2, 3
100; CHECK-NOVSX-NEXT:    vandc 2, 3, 2
101; CHECK-NOVSX-NEXT:    vpopcntw 2, 2
102; CHECK-NOVSX-NEXT:    blr
103  %v2 = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %v1, i1 true)
104  ret <2 x i32> %v2
105}
106