1// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
2
3// --------------------------------------------------------------------------//
4// Invalid operand (.b)
5
6ldff1sb z27.b, p7/z, [x0]
7// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
8// CHECK-NEXT: ldff1sb z27.b, p7/z, [x0]
9// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
10
11// --------------------------------------------------------------------------//
12// restricted predicate has range [0, 7].
13
14ldff1sb z9.h, p8/z, [x0]
15// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
16// CHECK-NEXT: ldff1sb z9.h, p8/z, [x0]
17// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
18
19ldff1sb z12.s, p8/z, [x0]
20// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
21// CHECK-NEXT: ldff1sb z12.s, p8/z, [x0]
22// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
23
24ldff1sb z4.d, p8/z, [x0]
25// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
26// CHECK-NEXT: ldff1sb z4.d, p8/z, [x0]
27// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
28
29// --------------------------------------------------------------------------//
30// Invalid scalar + scalar addressing modes
31
32ldff1sb z0.h, p0/z, [x0, sp]
33// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 or xzr, without shift
34// CHECK-NEXT: ldff1sb z0.h, p0/z, [x0, sp]
35// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
36
37ldff1sb z0.h, p0/z, [x0, x0, lsl #1]
38// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 or xzr, without shift
39// CHECK-NEXT: ldff1sb z0.h, p0/z, [x0, x0, lsl #1]
40// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
41
42ldff1sb z0.h, p0/z, [x0, w0]
43// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 or xzr, without shift
44// CHECK-NEXT: ldff1sb z0.h, p0/z, [x0, w0]
45// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
46
47ldff1sb z0.h, p0/z, [x0, w0, uxtw]
48// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 or xzr, without shift
49// CHECK-NEXT: ldff1sb z0.h, p0/z, [x0, w0, uxtw]
50// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
51
52// --------------------------------------------------------------------------//
53// Invalid scalar + vector addressing modes
54
55ldff1sb z0.d, p0/z, [x0, z0.b]
56// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
57// CHECK-NEXT: ldff1sb z0.d, p0/z, [x0, z0.b]
58// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
59
60ldff1sb z0.d, p0/z, [x0, z0.h]
61// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
62// CHECK-NEXT: ldff1sb z0.d, p0/z, [x0, z0.h]
63// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
64
65ldff1sb z0.d, p0/z, [x0, z0.s]
66// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
67// CHECK-NEXT: ldff1sb z0.d, p0/z, [x0, z0.s]
68// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
69
70ldff1sb z0.s, p0/z, [x0, z0.s]
71// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)'
72// CHECK-NEXT: ldff1sb z0.s, p0/z, [x0, z0.s]
73// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
74
75ldff1sb z0.s, p0/z, [x0, z0.s, uxtw #1]
76// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)'
77// CHECK-NEXT: ldff1sb z0.s, p0/z, [x0, z0.s, uxtw #1]
78// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
79
80ldff1sb z0.s, p0/z, [x0, z0.s, lsl #0]
81// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)'
82// CHECK-NEXT: ldff1sb z0.s, p0/z, [x0, z0.s, lsl #0]
83// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
84
85ldff1sb z0.d, p0/z, [x0, z0.d, lsl #1]
86// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
87// CHECK-NEXT: ldff1sb z0.d, p0/z, [x0, z0.d, lsl #1]
88// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
89
90ldff1sb z0.d, p0/z, [x0, z0.d, sxtw #1]
91// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
92// CHECK-NEXT: ldff1sb z0.d, p0/z, [x0, z0.d, sxtw #1]
93// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
94
95
96// --------------------------------------------------------------------------//
97// Invalid vector + immediate addressing modes
98
99ldff1sb z0.s, p0/z, [z0.s, #-1]
100// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 31].
101// CHECK-NEXT: ldff1sb z0.s, p0/z, [z0.s, #-1]
102// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
103
104ldff1sb z0.s, p0/z, [z0.s, #32]
105// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 31].
106// CHECK-NEXT: ldff1sb z0.s, p0/z, [z0.s, #32]
107// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
108
109ldff1sb z0.d, p0/z, [z0.d, #-1]
110// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 31].
111// CHECK-NEXT: ldff1sb z0.d, p0/z, [z0.d, #-1]
112// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
113
114ldff1sb z0.d, p0/z, [z0.d, #32]
115// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 31].
116// CHECK-NEXT: ldff1sb z0.d, p0/z, [z0.d, #32]
117// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
118
119
120// --------------------------------------------------------------------------//
121// Negative tests for instructions that are incompatible with movprfx
122
123movprfx z0.d, p0/z, z7.d
124ldff1sb { z0.d }, p0/z, [z0.d]
125// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
126// CHECK-NEXT: ldff1sb { z0.d }, p0/z, [z0.d]
127// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
128
129movprfx z0, z7
130ldff1sb { z0.d }, p0/z, [z0.d]
131// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
132// CHECK-NEXT: ldff1sb { z0.d }, p0/z, [z0.d]
133// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
134