1 /*
2 * Copyright © 2016-2018 Broadcom
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "v3d_compiler.h"
25
26 /* We don't do any address packing. */
27 #define __gen_user_data void
28 #define __gen_address_type uint32_t
29 #define __gen_address_offset(reloc) (*reloc)
30 #define __gen_emit_reloc(cl, reloc)
31 #include "cle/v3d_packet_v33_pack.h"
32
33 void
v3d33_vir_emit_tex(struct v3d_compile * c,nir_tex_instr * instr)34 v3d33_vir_emit_tex(struct v3d_compile *c, nir_tex_instr *instr)
35 {
36 unsigned unit = instr->texture_index;
37
38 struct V3D33_TEXTURE_UNIFORM_PARAMETER_0_CFG_MODE1 p0_unpacked = {
39 V3D33_TEXTURE_UNIFORM_PARAMETER_0_CFG_MODE1_header,
40
41 .fetch_sample_mode = instr->op == nir_texop_txf,
42 };
43
44 struct V3D33_TEXTURE_UNIFORM_PARAMETER_1_CFG_MODE1 p1_unpacked = {
45 };
46
47 switch (instr->sampler_dim) {
48 case GLSL_SAMPLER_DIM_1D:
49 if (instr->is_array)
50 p0_unpacked.lookup_type = TEXTURE_1D_ARRAY;
51 else
52 p0_unpacked.lookup_type = TEXTURE_1D;
53 break;
54 case GLSL_SAMPLER_DIM_2D:
55 case GLSL_SAMPLER_DIM_RECT:
56 if (instr->is_array)
57 p0_unpacked.lookup_type = TEXTURE_2D_ARRAY;
58 else
59 p0_unpacked.lookup_type = TEXTURE_2D;
60 break;
61 case GLSL_SAMPLER_DIM_3D:
62 p0_unpacked.lookup_type = TEXTURE_3D;
63 break;
64 case GLSL_SAMPLER_DIM_CUBE:
65 p0_unpacked.lookup_type = TEXTURE_CUBE_MAP;
66 break;
67 default:
68 unreachable("Bad sampler type");
69 }
70
71 struct qreg coords[5];
72 int next_coord = 0;
73 for (unsigned i = 0; i < instr->num_srcs; i++) {
74 switch (instr->src[i].src_type) {
75 case nir_tex_src_coord:
76 for (int j = 0; j < instr->coord_components; j++) {
77 coords[next_coord++] =
78 ntq_get_src(c, instr->src[i].src, j);
79 }
80 if (instr->coord_components < 2)
81 coords[next_coord++] = vir_uniform_f(c, 0.5);
82 break;
83 case nir_tex_src_bias:
84 coords[next_coord++] =
85 ntq_get_src(c, instr->src[i].src, 0);
86
87 p0_unpacked.bias_supplied = true;
88 break;
89 case nir_tex_src_lod:
90 coords[next_coord++] =
91 vir_FADD(c,
92 ntq_get_src(c, instr->src[i].src, 0),
93 vir_uniform(c, QUNIFORM_TEXTURE_FIRST_LEVEL,
94 unit));
95
96 if (instr->op != nir_texop_txf &&
97 instr->op != nir_texop_tg4) {
98 p0_unpacked.disable_autolod_use_bias_only = true;
99 }
100 break;
101 case nir_tex_src_comparator:
102 coords[next_coord++] =
103 ntq_get_src(c, instr->src[i].src, 0);
104
105 p0_unpacked.shadow = true;
106 break;
107
108 case nir_tex_src_offset: {
109 p0_unpacked.texel_offset_for_s_coordinate =
110 nir_src_comp_as_int(instr->src[i].src, 0);
111
112 if (instr->coord_components >= 2)
113 p0_unpacked.texel_offset_for_t_coordinate =
114 nir_src_comp_as_int(instr->src[i].src, 1);
115
116 if (instr->coord_components >= 3)
117 p0_unpacked.texel_offset_for_r_coordinate =
118 nir_src_comp_as_int(instr->src[i].src, 2);
119 break;
120 }
121
122 default:
123 unreachable("unknown texture source");
124 }
125 }
126
127 /* Limit the number of channels returned to both how many the NIR
128 * instruction writes and how many the instruction could produce.
129 */
130 assert(instr->dest.is_ssa);
131 p1_unpacked.return_words_of_texture_data =
132 nir_ssa_def_components_read(&instr->dest.ssa);
133
134 uint32_t p0_packed;
135 V3D33_TEXTURE_UNIFORM_PARAMETER_0_CFG_MODE1_pack(NULL,
136 (uint8_t *)&p0_packed,
137 &p0_unpacked);
138
139 uint32_t p1_packed;
140 V3D33_TEXTURE_UNIFORM_PARAMETER_1_CFG_MODE1_pack(NULL,
141 (uint8_t *)&p1_packed,
142 &p1_unpacked);
143 /* Load unit number into the address field, which will be be used by
144 * the driver to decide which texture to put in the actual address
145 * field.
146 */
147 p1_packed |= unit << 5;
148
149 /* There is no native support for GL texture rectangle coordinates, so
150 * we have to rescale from ([0, width], [0, height]) to ([0, 1], [0,
151 * 1]).
152 */
153 if (instr->sampler_dim == GLSL_SAMPLER_DIM_RECT) {
154 coords[0] = vir_FMUL(c, coords[0],
155 vir_uniform(c, QUNIFORM_TEXRECT_SCALE_X,
156 unit));
157 coords[1] = vir_FMUL(c, coords[1],
158 vir_uniform(c, QUNIFORM_TEXRECT_SCALE_Y,
159 unit));
160 }
161
162 int texture_u[] = {
163 vir_get_uniform_index(c, QUNIFORM_TEXTURE_CONFIG_P0_0 + unit, p0_packed),
164 vir_get_uniform_index(c, QUNIFORM_TEXTURE_CONFIG_P1, p1_packed),
165 };
166
167 for (int i = 0; i < next_coord; i++) {
168 struct qreg dst;
169
170 if (i == next_coord - 1)
171 dst = vir_reg(QFILE_MAGIC, V3D_QPU_WADDR_TMUL);
172 else
173 dst = vir_reg(QFILE_MAGIC, V3D_QPU_WADDR_TMU);
174
175 struct qinst *tmu = vir_MOV_dest(c, dst, coords[i]);
176
177 if (i < 2)
178 tmu->uniform = texture_u[i];
179 }
180
181 vir_emit_thrsw(c);
182
183 for (int i = 0; i < 4; i++) {
184 if (p1_unpacked.return_words_of_texture_data & (1 << i))
185 ntq_store_dest(c, &instr->dest, i, vir_LDTMU(c));
186 }
187 }
188