1 /*
2 * Copyright (c) 2012-2015 Etnaviv Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Wladimir J. van der Laan <laanwj@gmail.com>
25 */
26
27 #include "etnaviv_zsa.h"
28
29 #include "etnaviv_context.h"
30 #include "etnaviv_screen.h"
31 #include "etnaviv_translate.h"
32 #include "util/half_float.h"
33 #include "util/u_memory.h"
34
35 #include "hw/common.xml.h"
36
37 void *
etna_zsa_state_create(struct pipe_context * pctx,const struct pipe_depth_stencil_alpha_state * so)38 etna_zsa_state_create(struct pipe_context *pctx,
39 const struct pipe_depth_stencil_alpha_state *so)
40 {
41 struct etna_context *ctx = etna_context(pctx);
42 struct etna_screen *screen = ctx->screen;
43 struct etna_zsa_state *cs = CALLOC_STRUCT(etna_zsa_state);
44
45 if (!cs)
46 return NULL;
47
48 cs->base = *so;
49
50 cs->z_test_enabled = so->depth_enabled && so->depth_func != PIPE_FUNC_ALWAYS;
51 cs->z_write_enabled = so->depth_enabled && so->depth_writemask;
52
53 /* XXX does stencil[0] / stencil[1] order depend on rs->front_ccw? */
54
55 /* Set operations to KEEP if write mask is 0.
56 * When we don't do this, the depth buffer is written for the entire primitive
57 * instead of just where the stencil condition holds (GC600 rev 0x0019, without
58 * feature CORRECT_STENCIL).
59 * Not sure if this is a hardware bug or just a strange edge case. */
60 #if 0 /* TODO: It looks like a hardware bug */
61 for(int i=0; i<2; ++i)
62 {
63 if(so->stencil[i].writemask == 0)
64 {
65 so->stencil[i].fail_op = so->stencil[i].zfail_op = so->stencil[i].zpass_op = PIPE_STENCIL_OP_KEEP;
66 }
67 }
68 #endif
69
70 /* Determine whether to enable early z reject. Don't enable it when any of
71 * the stencil-modifying functions is used. */
72 if (so->stencil[0].enabled) {
73 if (so->stencil[0].func != PIPE_FUNC_ALWAYS ||
74 (so->stencil[1].enabled && so->stencil[1].func != PIPE_FUNC_ALWAYS))
75 cs->stencil_enabled = 1;
76
77 if (so->stencil[0].fail_op != PIPE_STENCIL_OP_KEEP ||
78 so->stencil[0].zfail_op != PIPE_STENCIL_OP_KEEP ||
79 so->stencil[0].zpass_op != PIPE_STENCIL_OP_KEEP) {
80 cs->stencil_enabled = 1;
81 cs->stencil_modified = 1;
82 } else if (so->stencil[1].enabled) {
83 if (so->stencil[1].fail_op != PIPE_STENCIL_OP_KEEP ||
84 so->stencil[1].zfail_op != PIPE_STENCIL_OP_KEEP ||
85 so->stencil[1].zpass_op != PIPE_STENCIL_OP_KEEP) {
86 cs->stencil_enabled = 1;
87 cs->stencil_modified = 1;
88 }
89 }
90 }
91
92 /* calculate extra_reference value */
93 uint32_t extra_reference = 0;
94
95 if (VIV_FEATURE(screen, chipMinorFeatures1, HALF_FLOAT))
96 extra_reference = _mesa_float_to_half(SATURATE(so->alpha_ref_value));
97
98 cs->PE_STENCIL_CONFIG_EXT =
99 VIVS_PE_STENCIL_CONFIG_EXT_EXTRA_ALPHA_REF(extra_reference);
100
101 cs->PE_ALPHA_OP =
102 COND(so->alpha_enabled, VIVS_PE_ALPHA_OP_ALPHA_TEST) |
103 VIVS_PE_ALPHA_OP_ALPHA_FUNC(so->alpha_func) |
104 VIVS_PE_ALPHA_OP_ALPHA_REF(etna_cfloat_to_uint8(so->alpha_ref_value));
105
106 for (unsigned i = 0; i < 2; i++) {
107 const struct pipe_stencil_state *stencil_front = (so->stencil[1].enabled && so->stencil[1].valuemask) ? &so->stencil[i] : &so->stencil[0];
108 const struct pipe_stencil_state *stencil_back = (so->stencil[1].enabled && so->stencil[1].valuemask) ? &so->stencil[!i] : &so->stencil[0];
109 cs->PE_STENCIL_OP[i] =
110 VIVS_PE_STENCIL_OP_FUNC_FRONT(stencil_front->func) |
111 VIVS_PE_STENCIL_OP_FUNC_BACK(stencil_back->func) |
112 VIVS_PE_STENCIL_OP_FAIL_FRONT(translate_stencil_op(stencil_front->fail_op)) |
113 VIVS_PE_STENCIL_OP_FAIL_BACK(translate_stencil_op(stencil_back->fail_op)) |
114 VIVS_PE_STENCIL_OP_DEPTH_FAIL_FRONT(translate_stencil_op(stencil_front->zfail_op)) |
115 VIVS_PE_STENCIL_OP_DEPTH_FAIL_BACK(translate_stencil_op(stencil_back->zfail_op)) |
116 VIVS_PE_STENCIL_OP_PASS_FRONT(translate_stencil_op(stencil_front->zpass_op)) |
117 VIVS_PE_STENCIL_OP_PASS_BACK(translate_stencil_op(stencil_back->zpass_op));
118 cs->PE_STENCIL_CONFIG[i] =
119 translate_stencil_mode(so->stencil[0].enabled, so->stencil[0].enabled) |
120 VIVS_PE_STENCIL_CONFIG_MASK_FRONT(stencil_front->valuemask) |
121 VIVS_PE_STENCIL_CONFIG_WRITE_MASK_FRONT(stencil_front->writemask);
122 cs->PE_STENCIL_CONFIG_EXT2[i] =
123 VIVS_PE_STENCIL_CONFIG_EXT2_MASK_BACK(stencil_back->valuemask) |
124 VIVS_PE_STENCIL_CONFIG_EXT2_WRITE_MASK_BACK(stencil_back->writemask);
125 }
126
127 /* XXX does alpha/stencil test affect PE_COLOR_FORMAT_OVERWRITE? */
128 return cs;
129 }
130