1 /*
2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
3  Intel funded Tungsten Graphics to
4  develop this 3D driver.
5 
6  Permission is hereby granted, free of charge, to any person obtaining
7  a copy of this software and associated documentation files (the
8  "Software"), to deal in the Software without restriction, including
9  without limitation the rights to use, copy, modify, merge, publish,
10  distribute, sublicense, and/or sell copies of the Software, and to
11  permit persons to whom the Software is furnished to do so, subject to
12  the following conditions:
13 
14  The above copyright notice and this permission notice (including the
15  next paragraph) shall be included in all copies or substantial
16  portions of the Software.
17 
18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 
26  **********************************************************************/
27  /*
28   * Authors:
29   *   Keith Whitwell <keithw@vmware.com>
30   */
31 
32 
33 #include "util/compiler.h"
34 #include "main/context.h"
35 #include "brw_context.h"
36 #include "brw_vs.h"
37 #include "brw_util.h"
38 #include "brw_state.h"
39 #include "program/prog_print.h"
40 #include "program/prog_parameter.h"
41 #include "compiler/brw_nir.h"
42 #include "brw_program.h"
43 
44 #include "util/ralloc.h"
45 
46 /**
47  * Decide which set of clip planes should be used when clipping via
48  * gl_Position or gl_ClipVertex.
49  */
50 gl_clip_plane *
brw_select_clip_planes(struct gl_context * ctx)51 brw_select_clip_planes(struct gl_context *ctx)
52 {
53    if (ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX]) {
54       /* There is currently a GLSL vertex shader, so clip according to GLSL
55        * rules, which means compare gl_ClipVertex (or gl_Position, if
56        * gl_ClipVertex wasn't assigned) against the eye-coordinate clip planes
57        * that were stored in EyeUserPlane at the time the clip planes were
58        * specified.
59        */
60       return ctx->Transform.EyeUserPlane;
61    } else {
62       /* Either we are using fixed function or an ARB vertex program.  In
63        * either case the clip planes are going to be compared against
64        * gl_Position (which is in clip coordinates) so we have to clip using
65        * _ClipUserPlane, which was transformed into clip coordinates by Mesa
66        * core.
67        */
68       return ctx->Transform._ClipUserPlane;
69    }
70 }
71 
72 static GLbitfield64
brw_vs_outputs_written(struct brw_context * brw,struct brw_vs_prog_key * key,GLbitfield64 user_varyings)73 brw_vs_outputs_written(struct brw_context *brw, struct brw_vs_prog_key *key,
74                        GLbitfield64 user_varyings)
75 {
76    const struct intel_device_info *devinfo = &brw->screen->devinfo;
77    GLbitfield64 outputs_written = user_varyings;
78 
79    if (devinfo->ver < 6) {
80       /* Put dummy slots into the VUE for the SF to put the replaced
81        * point sprite coords in.  We shouldn't need these dummy slots,
82        * which take up precious URB space, but it would mean that the SF
83        * doesn't get nice aligned pairs of input coords into output
84        * coords, which would be a pain to handle.
85        */
86       for (unsigned i = 0; i < 8; i++) {
87          if (key->point_coord_replace & (1 << i))
88             outputs_written |= BITFIELD64_BIT(VARYING_SLOT_TEX0 + i);
89       }
90 
91       /* if back colors are written, allocate slots for front colors too */
92       if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_BFC0))
93          outputs_written |= BITFIELD64_BIT(VARYING_SLOT_COL0);
94       if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_BFC1))
95          outputs_written |= BITFIELD64_BIT(VARYING_SLOT_COL1);
96    }
97 
98    /* In order for legacy clipping to work, we need to populate the clip
99     * distance varying slots whenever clipping is enabled, even if the vertex
100     * shader doesn't write to gl_ClipDistance.
101     */
102    if (key->nr_userclip_plane_consts > 0) {
103       outputs_written |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST0);
104       outputs_written |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST1);
105    }
106 
107    return outputs_written;
108 }
109 
110 static bool
brw_codegen_vs_prog(struct brw_context * brw,struct brw_program * vp,struct brw_vs_prog_key * key)111 brw_codegen_vs_prog(struct brw_context *brw,
112                     struct brw_program *vp,
113                     struct brw_vs_prog_key *key)
114 {
115    const struct brw_compiler *compiler = brw->screen->compiler;
116    const struct intel_device_info *devinfo = &brw->screen->devinfo;
117    const GLuint *program;
118    struct brw_vs_prog_data prog_data;
119    struct brw_stage_prog_data *stage_prog_data = &prog_data.base.base;
120    void *mem_ctx;
121    bool start_busy = false;
122    double start_time = 0;
123 
124    memset(&prog_data, 0, sizeof(prog_data));
125 
126    /* Use ALT floating point mode for ARB programs so that 0^0 == 1. */
127    if (vp->program.info.is_arb_asm)
128       stage_prog_data->use_alt_mode = true;
129 
130    mem_ctx = ralloc_context(NULL);
131 
132    nir_shader *nir = nir_shader_clone(mem_ctx, vp->program.nir);
133 
134    brw_assign_common_binding_table_offsets(devinfo, &vp->program,
135                                            &prog_data.base.base, 0);
136 
137    if (!vp->program.info.is_arb_asm) {
138       brw_nir_setup_glsl_uniforms(mem_ctx, nir, &vp->program,
139                                   &prog_data.base.base,
140                                   compiler->scalar_stage[MESA_SHADER_VERTEX]);
141       if (brw->can_push_ubos) {
142          brw_nir_analyze_ubo_ranges(compiler, nir, key,
143                                     prog_data.base.base.ubo_ranges);
144       }
145    } else {
146       brw_nir_setup_arb_uniforms(mem_ctx, nir, &vp->program,
147                                  &prog_data.base.base);
148    }
149 
150    if (key->nr_userclip_plane_consts > 0) {
151       brw_nir_lower_legacy_clipping(nir, key->nr_userclip_plane_consts,
152                                     &prog_data.base.base);
153    }
154 
155    if (key->copy_edgeflag)
156       nir_lower_passthrough_edgeflags(nir);
157 
158    uint64_t outputs_written =
159       brw_vs_outputs_written(brw, key, nir->info.outputs_written);
160 
161    brw_compute_vue_map(devinfo,
162                        &prog_data.base.vue_map, outputs_written,
163                        nir->info.separate_shader, 1);
164 
165    if (0) {
166       _mesa_fprint_program_opt(stderr, &vp->program, PROG_PRINT_DEBUG, true);
167    }
168 
169    if (unlikely(brw->perf_debug)) {
170       start_busy = (brw->batch.last_bo &&
171                     brw_bo_busy(brw->batch.last_bo));
172       start_time = get_time();
173    }
174 
175    if (INTEL_DEBUG(DEBUG_VS)) {
176       if (vp->program.info.is_arb_asm)
177          brw_dump_arb_asm("vertex", &vp->program);
178    }
179 
180 
181    /* Emit GFX4 code.
182     */
183    struct brw_compile_vs_params params = {
184       .nir = nir,
185       .key = key,
186       .prog_data = &prog_data,
187       .log_data = brw,
188    };
189 
190    if (INTEL_DEBUG(DEBUG_SHADER_TIME)) {
191       params.shader_time = true;
192       params.shader_time_index =
193          brw_get_shader_time_index(brw, &vp->program, ST_VS,
194                                    !vp->program.info.is_arb_asm);
195    }
196 
197    program = brw_compile_vs(compiler, mem_ctx, &params);
198    if (program == NULL) {
199       if (!vp->program.info.is_arb_asm) {
200          vp->program.sh.data->LinkStatus = LINKING_FAILURE;
201          ralloc_strcat(&vp->program.sh.data->InfoLog, params.error_str);
202       }
203 
204       _mesa_problem(NULL, "Failed to compile vertex shader: %s\n", params.error_str);
205 
206       ralloc_free(mem_ctx);
207       return false;
208    }
209 
210    if (unlikely(brw->perf_debug)) {
211       if (vp->compiled_once) {
212          brw_debug_recompile(brw, MESA_SHADER_VERTEX, vp->program.Id,
213                              &key->base);
214       }
215       if (start_busy && !brw_bo_busy(brw->batch.last_bo)) {
216          perf_debug("VS compile took %.03f ms and stalled the GPU\n",
217                     (get_time() - start_time) * 1000);
218       }
219       vp->compiled_once = true;
220    }
221 
222    /* Scratch space is used for register spilling */
223    brw_alloc_stage_scratch(brw, &brw->vs.base,
224                            prog_data.base.base.total_scratch);
225 
226    /* The param and pull_param arrays will be freed by the shader cache. */
227    ralloc_steal(NULL, prog_data.base.base.param);
228    ralloc_steal(NULL, prog_data.base.base.pull_param);
229    brw_upload_cache(&brw->cache, BRW_CACHE_VS_PROG,
230                     key, sizeof(struct brw_vs_prog_key),
231                     program, prog_data.base.base.program_size,
232                     &prog_data, sizeof(prog_data),
233                     &brw->vs.base.prog_offset, &brw->vs.base.prog_data);
234    ralloc_free(mem_ctx);
235 
236    return true;
237 }
238 
239 static bool
brw_vs_state_dirty(const struct brw_context * brw)240 brw_vs_state_dirty(const struct brw_context *brw)
241 {
242    return brw_state_dirty(brw,
243                           _NEW_BUFFERS |
244                           _NEW_LIGHT |
245                           _NEW_POINT |
246                           _NEW_POLYGON |
247                           _NEW_TEXTURE |
248                           _NEW_TRANSFORM,
249                           BRW_NEW_VERTEX_PROGRAM |
250                           BRW_NEW_VS_ATTRIB_WORKAROUNDS);
251 }
252 
253 void
brw_vs_populate_key(struct brw_context * brw,struct brw_vs_prog_key * key)254 brw_vs_populate_key(struct brw_context *brw,
255                     struct brw_vs_prog_key *key)
256 {
257    struct gl_context *ctx = &brw->ctx;
258    /* BRW_NEW_VERTEX_PROGRAM */
259    struct gl_program *prog = brw->programs[MESA_SHADER_VERTEX];
260    struct brw_program *vp = (struct brw_program *) prog;
261    const struct intel_device_info *devinfo = &brw->screen->devinfo;
262 
263    memset(key, 0, sizeof(*key));
264 
265    /* Just upload the program verbatim for now.  Always send it all
266     * the inputs it asks for, whether they are varying or not.
267     */
268 
269    /* _NEW_TEXTURE */
270    brw_populate_base_prog_key(ctx, vp, &key->base);
271 
272    if (ctx->Transform.ClipPlanesEnabled != 0 &&
273        (ctx->API == API_OPENGL_COMPAT || ctx->API == API_OPENGLES) &&
274        vp->program.info.clip_distance_array_size == 0) {
275       key->nr_userclip_plane_consts =
276          util_logbase2(ctx->Transform.ClipPlanesEnabled) + 1;
277    }
278 
279    if (devinfo->ver < 6) {
280       /* _NEW_POLYGON */
281       key->copy_edgeflag = (ctx->Polygon.FrontMode != GL_FILL ||
282                             ctx->Polygon.BackMode != GL_FILL);
283 
284       /* _NEW_POINT */
285       if (ctx->Point.PointSprite) {
286          key->point_coord_replace = ctx->Point.CoordReplace & 0xff;
287       }
288    }
289 
290    if (prog->info.outputs_written &
291        (VARYING_BIT_COL0 | VARYING_BIT_COL1 | VARYING_BIT_BFC0 |
292         VARYING_BIT_BFC1)) {
293       /* _NEW_LIGHT | _NEW_BUFFERS */
294       key->clamp_vertex_color = ctx->Light._ClampVertexColor;
295    }
296 
297    /* BRW_NEW_VS_ATTRIB_WORKAROUNDS */
298    if (devinfo->verx10 <= 70) {
299       memcpy(key->gl_attrib_wa_flags, brw->vb.attrib_wa_flags,
300              sizeof(brw->vb.attrib_wa_flags));
301    }
302 }
303 
304 void
brw_upload_vs_prog(struct brw_context * brw)305 brw_upload_vs_prog(struct brw_context *brw)
306 {
307    struct brw_vs_prog_key key;
308    /* BRW_NEW_VERTEX_PROGRAM */
309    struct brw_program *vp =
310       (struct brw_program *) brw->programs[MESA_SHADER_VERTEX];
311 
312    if (!brw_vs_state_dirty(brw))
313       return;
314 
315    brw_vs_populate_key(brw, &key);
316 
317    if (brw_search_cache(&brw->cache, BRW_CACHE_VS_PROG, &key, sizeof(key),
318                         &brw->vs.base.prog_offset, &brw->vs.base.prog_data,
319                         true))
320       return;
321 
322    if (brw_disk_cache_upload_program(brw, MESA_SHADER_VERTEX))
323       return;
324 
325    vp = (struct brw_program *) brw->programs[MESA_SHADER_VERTEX];
326    vp->id = key.base.program_string_id;
327 
328    ASSERTED bool success = brw_codegen_vs_prog(brw, vp, &key);
329    assert(success);
330 }
331 
332 void
brw_vs_populate_default_key(const struct brw_compiler * compiler,struct brw_vs_prog_key * key,struct gl_program * prog)333 brw_vs_populate_default_key(const struct brw_compiler *compiler,
334                             struct brw_vs_prog_key *key,
335                             struct gl_program *prog)
336 {
337    const struct intel_device_info *devinfo = compiler->devinfo;
338    struct brw_program *bvp = brw_program(prog);
339 
340    memset(key, 0, sizeof(*key));
341 
342    brw_populate_default_base_prog_key(devinfo, bvp, &key->base);
343 
344    key->clamp_vertex_color =
345       (prog->info.outputs_written &
346        (VARYING_BIT_COL0 | VARYING_BIT_COL1 | VARYING_BIT_BFC0 |
347         VARYING_BIT_BFC1));
348 }
349 
350 bool
brw_vs_precompile(struct gl_context * ctx,struct gl_program * prog)351 brw_vs_precompile(struct gl_context *ctx, struct gl_program *prog)
352 {
353    struct brw_context *brw = brw_context(ctx);
354    struct brw_vs_prog_key key;
355    uint32_t old_prog_offset = brw->vs.base.prog_offset;
356    struct brw_stage_prog_data *old_prog_data = brw->vs.base.prog_data;
357    bool success;
358 
359    struct brw_program *bvp = brw_program(prog);
360 
361    brw_vs_populate_default_key(brw->screen->compiler, &key, prog);
362 
363    success = brw_codegen_vs_prog(brw, bvp, &key);
364 
365    brw->vs.base.prog_offset = old_prog_offset;
366    brw->vs.base.prog_data = old_prog_data;
367 
368    return success;
369 }
370