1 /************************************************************************** 2 3 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and 4 VA Linux Systems Inc., Fremont, California. 5 6 All Rights Reserved. 7 8 Permission is hereby granted, free of charge, to any person obtaining 9 a copy of this software and associated documentation files (the 10 "Software"), to deal in the Software without restriction, including 11 without limitation the rights to use, copy, modify, merge, publish, 12 distribute, sublicense, and/or sell copies of the Software, and to 13 permit persons to whom the Software is furnished to do so, subject to 14 the following conditions: 15 16 The above copyright notice and this permission notice (including the 17 next paragraph) shall be included in all copies or substantial 18 portions of the Software. 19 20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 27 28 **************************************************************************/ 29 30 /* 31 * Authors: 32 * Kevin E. Martin <martin@valinux.com> 33 * Gareth Hughes <gareth@valinux.com> 34 */ 35 36 #ifndef __RADEON_SCREEN_H__ 37 #define __RADEON_SCREEN_H__ 38 39 /* 40 * IMPORTS: these headers contain all the DRI, X and kernel-related 41 * definitions that we need. 42 */ 43 #include <xf86drm.h> 44 #include <radeon_drm.h> 45 #include "dri_util.h" 46 #include "radeon_chipset.h" 47 #include "radeon_reg.h" 48 #include "util/xmlconfig.h" 49 50 #define DRI_CONF_COLOR_REDUCTION_ROUND 0 51 #define DRI_CONF_COLOR_REDUCTION_DITHER 1 52 #define DRI_CONF_COLOR_REDUCTION(def) \ 53 DRI_CONF_OPT_E(color_reduction, def, 0, 1, \ 54 "Initial color reduction method", \ 55 DRI_CONF_ENUM(0, "Round colors") \ 56 DRI_CONF_ENUM(1, "Dither colors")) 57 58 #define DRI_CONF_DITHER_XERRORDIFF 0 59 #define DRI_CONF_DITHER_XERRORDIFFRESET 1 60 #define DRI_CONF_DITHER_ORDERED 2 61 #define DRI_CONF_DITHER_MODE(def) \ 62 DRI_CONF_OPT_E(dither_mode, def, 0, 2, \ 63 "Color dithering method", \ 64 DRI_CONF_ENUM(0, "Horizontal error diffusion") \ 65 DRI_CONF_ENUM(1, "Horizontal error diffusion, reset error at line start") \ 66 DRI_CONF_ENUM(2, "Ordered 2D color dithering")) 67 68 #define DRI_CONF_ROUND_TRUNC 0 69 #define DRI_CONF_ROUND_ROUND 1 70 #define DRI_CONF_ROUND_MODE(def) \ 71 DRI_CONF_OPT_E(round_mode, def, 0, 1, \ 72 "Color rounding method", \ 73 DRI_CONF_ENUM(0, "Round color components downward") \ 74 DRI_CONF_ENUM(1, "Round to nearest color")) 75 76 #define DRI_CONF_FTHROTTLE_BUSY 0 77 #define DRI_CONF_FTHROTTLE_USLEEPS 1 78 #define DRI_CONF_FTHROTTLE_IRQS 2 79 #define DRI_CONF_FTHROTTLE_MODE(def) \ 80 DRI_CONF_OPT_E(fthrottle_mode, def, 0, 2, \ 81 "Method to limit rendering latency", \ 82 DRI_CONF_ENUM(0, "Busy waiting for the graphics hardware") \ 83 DRI_CONF_ENUM(1, "Sleep for brief intervals while waiting for the graphics hardware") \ 84 DRI_CONF_ENUM(2, "Let the graphics hardware emit a software interrupt and sleep")) 85 86 #define DRI_CONF_TEXTURE_DEPTH_FB 0 87 #define DRI_CONF_TEXTURE_DEPTH_32 1 88 #define DRI_CONF_TEXTURE_DEPTH_16 2 89 #define DRI_CONF_TEXTURE_DEPTH_FORCE_16 3 90 #define DRI_CONF_TEXTURE_DEPTH(def) \ 91 DRI_CONF_OPT_E(texture_depth, def, 0, 3, \ 92 "Texture color depth", \ 93 DRI_CONF_ENUM(0, "Prefer frame buffer color depth") \ 94 DRI_CONF_ENUM(1, "Prefer 32 bits per texel") \ 95 DRI_CONF_ENUM(2, "Prefer 16 bits per texel") \ 96 DRI_CONF_ENUM(3, "Force 16 bits per texel")) 97 98 #define DRI_CONF_TCL_SW 0 99 #define DRI_CONF_TCL_PIPELINED 1 100 #define DRI_CONF_TCL_VTXFMT 2 101 #define DRI_CONF_TCL_CODEGEN 3 102 103 typedef struct { 104 drm_handle_t handle; /* Handle to the DRM region */ 105 drmSize size; /* Size of the DRM region */ 106 drmAddress map; /* Mapping of the DRM region */ 107 } radeonRegionRec, *radeonRegionPtr; 108 109 typedef struct radeon_screen { 110 int chip_family; 111 int chip_flags; 112 int cpp; 113 int card_type; 114 int device_id; /* PCI ID */ 115 int AGPMode; 116 unsigned int irq; /* IRQ number (0 means none) */ 117 118 unsigned int fbLocation; 119 unsigned int frontOffset; 120 unsigned int frontPitch; 121 unsigned int backOffset; 122 unsigned int backPitch; 123 124 unsigned int depthOffset; 125 unsigned int depthPitch; 126 127 /* Shared texture data */ 128 int numTexHeaps; 129 int texOffset[RADEON_NR_TEX_HEAPS]; 130 int texSize[RADEON_NR_TEX_HEAPS]; 131 int logTexGranularity[RADEON_NR_TEX_HEAPS]; 132 133 radeonRegionRec mmio; 134 radeonRegionRec status; 135 radeonRegionRec gartTextures; 136 137 drmBufMapPtr buffers; 138 139 __volatile__ uint32_t *scratch; 140 141 __DRIscreen *driScreen; 142 unsigned int gart_buffer_offset; /* offset in card memory space */ 143 unsigned int gart_texture_offset; /* offset in card memory space */ 144 unsigned int gart_base; 145 146 GLboolean depthHasSurface; 147 148 /* Configuration cache with default values for all contexts */ 149 driOptionCache optionCache; 150 151 int num_gb_pipes; 152 int num_z_pipes; 153 struct radeon_bo_manager *bom; 154 155 } radeonScreenRec, *radeonScreenPtr; 156 157 struct __DRIimageRec { 158 struct radeon_bo *bo; 159 GLenum internal_format; 160 uint32_t dri_format; 161 GLuint format; 162 GLenum data_type; 163 int width, height; /* in pixels */ 164 int pitch; /* in pixels */ 165 int cpp; 166 void *data; 167 }; 168 169 #ifdef RADEON_R200 170 /* These defines are to ensure that r200_dri's symbols don't conflict with 171 * radeon's when linked together. 172 */ 173 #define get_radeon_buffer_object r200_get_radeon_buffer_object 174 #define radeonInitBufferObjectFuncs r200_radeonInitBufferObjectFuncs 175 #define radeonDestroyContext r200_radeonDestroyContext 176 #define radeonInitContext r200_radeonInitContext 177 #define radeonMakeCurrent r200_radeonMakeCurrent 178 #define radeon_prepare_render r200_radeon_prepare_render 179 #define radeonUnbindContext r200_radeonUnbindContext 180 #define radeon_update_renderbuffers r200_radeon_update_renderbuffers 181 #define radeonCountStateEmitSize r200_radeonCountStateEmitSize 182 #define radeon_draw_buffer r200_radeon_draw_buffer 183 #define radeonDrawBuffer r200_radeonDrawBuffer 184 #define radeonEmitState r200_radeonEmitState 185 #define radeonFinish r200_radeonFinish 186 #define radeonFlush r200_radeonFlush 187 #define radeonGetAge r200_radeonGetAge 188 #define radeonReadBuffer r200_radeonReadBuffer 189 #define radeonScissor r200_radeonScissor 190 #define radeonSetCliprects r200_radeonSetCliprects 191 #define radeonUpdateScissor r200_radeonUpdateScissor 192 #define radeonUserClear r200_radeonUserClear 193 #define radeon_viewport r200_radeon_viewport 194 #define radeon_window_moved r200_radeon_window_moved 195 #define rcommonBeginBatch r200_rcommonBeginBatch 196 #define rcommonDestroyCmdBuf r200_rcommonDestroyCmdBuf 197 #define rcommonEnsureCmdBufSpace r200_rcommonEnsureCmdBufSpace 198 #define rcommonFlushCmdBuf r200_rcommonFlushCmdBuf 199 #define rcommonFlushCmdBufLocked r200_rcommonFlushCmdBufLocked 200 #define rcommonInitCmdBuf r200_rcommonInitCmdBuf 201 #define radeonAllocDmaRegion r200_radeonAllocDmaRegion 202 #define radeonEmitVec12 r200_radeonEmitVec12 203 #define radeonEmitVec16 r200_radeonEmitVec16 204 #define radeonEmitVec4 r200_radeonEmitVec4 205 #define radeonEmitVec8 r200_radeonEmitVec8 206 #define radeonFreeDmaRegions r200_radeonFreeDmaRegions 207 #define radeon_init_dma r200_radeon_init_dma 208 #define radeonRefillCurrentDmaRegion r200_radeonRefillCurrentDmaRegion 209 #define radeonReleaseArrays r200_radeonReleaseArrays 210 #define radeonReleaseDmaRegions r200_radeonReleaseDmaRegions 211 #define radeonReturnDmaRegion r200_radeonReturnDmaRegion 212 #define rcommonAllocDmaLowVerts r200_rcommonAllocDmaLowVerts 213 #define rcommon_emit_vecfog r200_rcommon_emit_vecfog 214 #define rcommon_emit_vector r200_rcommon_emit_vector 215 #define rcommon_flush_last_swtcl_prim r200_rcommon_flush_last_swtcl_prim 216 #define _radeon_debug_add_indent r200__radeon_debug_add_indent 217 #define _radeon_debug_remove_indent r200__radeon_debug_remove_indent 218 #define radeon_init_debug r200_radeon_init_debug 219 #define _radeon_print r200__radeon_print 220 #define radeon_create_renderbuffer r200_radeon_create_renderbuffer 221 #define radeon_fbo_init r200_radeon_fbo_init 222 #define radeon_renderbuffer_set_bo r200_radeon_renderbuffer_set_bo 223 #define radeonComputeFogBlendFactor r200_radeonComputeFogBlendFactor 224 #define radeonInitStaticFogData r200_radeonInitStaticFogData 225 #define get_base_teximage_offset r200_get_base_teximage_offset 226 #define get_texture_image_row_stride r200_get_texture_image_row_stride 227 #define get_texture_image_size r200_get_texture_image_size 228 #define radeon_miptree_create r200_radeon_miptree_create 229 #define radeon_miptree_image_offset r200_radeon_miptree_image_offset 230 #define radeon_miptree_matches_image r200_radeon_miptree_matches_image 231 #define radeon_miptree_reference r200_radeon_miptree_reference 232 #define radeon_miptree_unreference r200_radeon_miptree_unreference 233 #define radeon_try_alloc_miptree r200_radeon_try_alloc_miptree 234 #define radeon_validate_texture_miptree r200_radeon_validate_texture_miptree 235 #define radeonReadPixels r200_radeonReadPixels 236 #define radeon_check_query_active r200_radeon_check_query_active 237 #define radeonEmitQueryEnd r200_radeonEmitQueryEnd 238 #define radeon_emit_queryobj r200_radeon_emit_queryobj 239 #define radeonInitQueryObjFunctions r200_radeonInitQueryObjFunctions 240 #define radeonInitSpanFuncs r200_radeonInitSpanFuncs 241 #define copy_rows r200_copy_rows 242 #define radeonChooseTextureFormat r200_radeonChooseTextureFormat 243 #define radeonChooseTextureFormat_mesa r200_radeonChooseTextureFormat_mesa 244 #define radeonFreeTextureImageBuffer r200_radeonFreeTextureImageBuffer 245 #define radeon_image_target_texture_2d r200_radeon_image_target_texture_2d 246 #define radeon_init_common_texture_funcs r200_radeon_init_common_texture_funcs 247 #define radeonIsFormatRenderable r200_radeonIsFormatRenderable 248 #define radeonNewTextureImage r200_radeonNewTextureImage 249 #define _radeon_texformat_al88 r200__radeon_texformat_al88 250 #define _radeon_texformat_argb1555 r200__radeon_texformat_argb1555 251 #define _radeon_texformat_argb4444 r200__radeon_texformat_argb4444 252 #define _radeon_texformat_argb8888 r200__radeon_texformat_argb8888 253 #define _radeon_texformat_rgb565 r200__radeon_texformat_rgb565 254 #define _radeon_texformat_rgba8888 r200__radeon_texformat_rgba8888 255 #define radeonCopyTexSubImage r200_radeonCopyTexSubImage 256 #define get_tile_size r200_get_tile_size 257 #define tile_image r200_tile_image 258 #define untile_image r200_untile_image 259 #define set_re_cntl_d3d r200_set_re_cntl_d3d 260 #define radeonDestroyBuffer r200_radeonDestroyBuffer 261 #define radeonVendorString r200_radeonVendorString 262 #define radeonGetRendererString r200_radeonGetRendererString 263 #endif 264 265 extern void radeonDestroyBuffer(__DRIdrawable *driDrawPriv); 266 const __DRIextension **__driDriverGetExtensions_radeon(void); 267 const __DRIextension **__driDriverGetExtensions_r200(void); 268 269 #endif /* __RADEON_SCREEN_H__ */ 270