1 /*
2  * Copyright © 2007-2019 Advanced Micro Devices, Inc.
3  * All Rights Reserved.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining
6  * a copy of this software and associated documentation files (the
7  * "Software"), to deal in the Software without restriction, including
8  * without limitation the rights to use, copy, modify, merge, publish,
9  * distribute, sub license, and/or sell copies of the Software, and to
10  * permit persons to whom the Software is furnished to do so, subject to
11  * the following conditions:
12  *
13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
14  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
15  * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
16  * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
17  * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20  * USE OR OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * The above copyright notice and this permission notice (including the
23  * next paragraph) shall be included in all copies or substantial portions
24  * of the Software.
25  */
26 
27 /**
28 ****************************************************************************************************
29 * @file  addrtypes.h
30 * @brief Contains the helper function and constants
31 ****************************************************************************************************
32 */
33 #ifndef __ADDR_TYPES_H__
34 #define __ADDR_TYPES_H__
35 
36 #if defined(__APPLE__) && !defined(HAVE_TSERVER)
37 // External definitions header maintained by Apple driver team, but not for diag team under Mac.
38 // Helps address compilation issues & reduces code covered by NDA
39 #include "addrExtDef.h"
40 
41 #else
42 
43 // Windows and/or Linux
44 #if !defined(VOID)
45 typedef void           VOID;
46 #endif
47 
48 #if !defined(FLOAT)
49 typedef float          FLOAT;
50 #endif
51 
52 #if !defined(DOUBLE)
53 typedef double         DOUBLE;
54 #endif
55 
56 #if !defined(CHAR)
57 typedef char           CHAR;
58 #endif
59 
60 #if !defined(INT)
61 typedef int            INT;
62 #endif
63 
64 #include <stdarg.h> // va_list...etc need this header
65 
66 #endif // defined (__APPLE__) && !defined(HAVE_TSERVER)
67 
68 /**
69 ****************************************************************************************************
70 *   Calling conventions
71 ****************************************************************************************************
72 */
73 #ifndef ADDR_CDECL
74     #if defined(__GNUC__)
75         #if defined(__i386__)
76             #define ADDR_CDECL __attribute__((cdecl))
77         #else
78             #define ADDR_CDECL
79         #endif
80     #else
81         #define ADDR_CDECL __cdecl
82     #endif
83 #endif
84 
85 #ifndef ADDR_STDCALL
86     #if defined(__GNUC__)
87         #if defined(__i386__)
88             #define ADDR_STDCALL __attribute__((stdcall))
89         #else
90             #define ADDR_STDCALL
91         #endif
92     #else
93         #define ADDR_STDCALL __stdcall
94     #endif
95 #endif
96 
97 #ifndef ADDR_FASTCALL
98     #if defined(__GNUC__)
99         #if defined(__i386__) || defined(__amd64__) || defined(__x86_64__)
100             #define ADDR_FASTCALL __attribute__((regparm(0)))
101         #else
102             #define ADDR_FASTCALL
103         #endif
104     #else
105         #define ADDR_FASTCALL __fastcall
106     #endif
107 #endif
108 
109 #ifndef GC_CDECL
110     #define GC_CDECL  ADDR_CDECL
111 #endif
112 
113 #ifndef GC_STDCALL
114     #define GC_STDCALL  ADDR_STDCALL
115 #endif
116 
117 #ifndef GC_FASTCALL
118     #define GC_FASTCALL  ADDR_FASTCALL
119 #endif
120 
121 
122 #if defined(__GNUC__)
123     #define ADDR_INLINE static inline   // inline needs to be static to link
124 #else
125     // win32, win64, other platforms
126     #define ADDR_INLINE   __inline
127 #endif // #if defined(__GNUC__)
128 
129 #define ADDR_API ADDR_FASTCALL //default call convention is fast call
130 
131 /**
132 ****************************************************************************************************
133 * Global defines used by other modules
134 ****************************************************************************************************
135 */
136 #if !defined(TILEINDEX_INVALID)
137 #define TILEINDEX_INVALID                -1
138 #endif
139 
140 #if !defined(TILEINDEX_LINEAR_GENERAL)
141 #define TILEINDEX_LINEAR_GENERAL         -2
142 #endif
143 
144 #if !defined(TILEINDEX_LINEAR_ALIGNED)
145 #define TILEINDEX_LINEAR_ALIGNED          8
146 #endif
147 
148 /**
149 ****************************************************************************************************
150 * Return codes
151 ****************************************************************************************************
152 */
153 typedef enum _ADDR_E_RETURNCODE
154 {
155     // General Return
156     ADDR_OK    = 0,
157     ADDR_ERROR = 1,
158 
159     // Specific Errors
160     ADDR_OUTOFMEMORY,
161     ADDR_INVALIDPARAMS,
162     ADDR_NOTSUPPORTED,
163     ADDR_NOTIMPLEMENTED,
164     ADDR_PARAMSIZEMISMATCH,
165     ADDR_INVALIDGBREGVALUES,
166 
167 } ADDR_E_RETURNCODE;
168 
169 /**
170 ****************************************************************************************************
171 * @brief
172 *   Neutral enums that define tile modes for all H/W
173 * @note
174 *   R600/R800 tiling mode can be cast to hw enums directly but never cast into HW enum from
175 *   ADDR_TM_2D_TILED_XTHICK
176 *
177 ****************************************************************************************************
178 */
179 typedef enum _AddrTileMode
180 {
181     ADDR_TM_LINEAR_GENERAL      = 0,    ///< Least restrictions, pitch: multiple of 8 if not buffer
182     ADDR_TM_LINEAR_ALIGNED      = 1,    ///< Requests pitch or slice to be multiple of 64 pixels
183     ADDR_TM_1D_TILED_THIN1      = 2,    ///< Linear array of 8x8 tiles
184     ADDR_TM_1D_TILED_THICK      = 3,    ///< Linear array of 8x8x4 tiles
185     ADDR_TM_2D_TILED_THIN1      = 4,    ///< A set of macro tiles consist of 8x8 tiles
186     ADDR_TM_2D_TILED_THIN2      = 5,    ///< 600 HWL only, macro tile ratio is 1:4
187     ADDR_TM_2D_TILED_THIN4      = 6,    ///< 600 HWL only, macro tile ratio is 1:16
188     ADDR_TM_2D_TILED_THICK      = 7,    ///< A set of macro tiles consist of 8x8x4 tiles
189     ADDR_TM_2B_TILED_THIN1      = 8,    ///< 600 HWL only, with bank swap
190     ADDR_TM_2B_TILED_THIN2      = 9,    ///< 600 HWL only, with bank swap and ratio is 1:4
191     ADDR_TM_2B_TILED_THIN4      = 10,   ///< 600 HWL only, with bank swap and ratio is 1:16
192     ADDR_TM_2B_TILED_THICK      = 11,   ///< 600 HWL only, with bank swap, consists of 8x8x4 tiles
193     ADDR_TM_3D_TILED_THIN1      = 12,   ///< Macro tiling w/ pipe rotation between slices
194     ADDR_TM_3D_TILED_THICK      = 13,   ///< Macro tiling w/ pipe rotation bwtween slices, thick
195     ADDR_TM_3B_TILED_THIN1      = 14,   ///< 600 HWL only, with bank swap
196     ADDR_TM_3B_TILED_THICK      = 15,   ///< 600 HWL only, with bank swap, thick
197     ADDR_TM_2D_TILED_XTHICK     = 16,   ///< Tile is 8x8x8, valid from NI
198     ADDR_TM_3D_TILED_XTHICK     = 17,   ///< Tile is 8x8x8, valid from NI
199     ADDR_TM_POWER_SAVE          = 18,   ///< Power save mode, only used by KMD on NI
200     ADDR_TM_PRT_TILED_THIN1     = 19,   ///< No bank/pipe rotation or hashing beyond macrotile size
201     ADDR_TM_PRT_2D_TILED_THIN1  = 20,   ///< Same as 2D_TILED_THIN1, PRT only
202     ADDR_TM_PRT_3D_TILED_THIN1  = 21,   ///< Same as 3D_TILED_THIN1, PRT only
203     ADDR_TM_PRT_TILED_THICK     = 22,   ///< No bank/pipe rotation or hashing beyond macrotile size
204     ADDR_TM_PRT_2D_TILED_THICK  = 23,   ///< Same as 2D_TILED_THICK, PRT only
205     ADDR_TM_PRT_3D_TILED_THICK  = 24,   ///< Same as 3D_TILED_THICK, PRT only
206     ADDR_TM_UNKNOWN             = 25,   ///< Unkown tile mode, should be decided by address lib
207     ADDR_TM_COUNT               = 26,   ///< Must be the value of the last tile mode
208 } AddrTileMode;
209 
210 /**
211 ****************************************************************************************************
212 * @brief
213 *   Neutral enums that define swizzle modes for Gfx9+ ASIC
214 * @note
215 *
216 *   ADDR_SW_LINEAR linear aligned addressing mode, for 1D/2D/3D resource
217 *   ADDR_SW_256B_* addressing block aligned size is 256B, for 2D resource
218 *   ADDR_SW_4KB_*  addressing block aligned size is 4KB, for 2D/3D resource
219 *   ADDR_SW_64KB_* addressing block aligned size is 64KB, for 1D/2D/3D resource
220 *   ADDR_SW_VAR_*  addressing block aligned size is ASIC specific
221 *
222 *   ADDR_SW_*_Z    For GFX9:
223                    - for 2D resource, represents Z-order swizzle mode for depth/stencil/FMask
224                    - for 3D resource, represents a swizzle mode similar to legacy thick tile mode
225                    For GFX10:
226                    - represents Z-order swizzle mode for depth/stencil/FMask
227 *   ADDR_SW_*_S    For GFX9+:
228                    - represents standard swizzle mode defined by MS
229 *   ADDR_SW_*_D    For GFX9:
230                    - for 2D resource, represents a swizzle mode for displayable resource
231 *                  - for 3D resource, represents a swizzle mode which places each slice in order & pixel
232                    For GFX10:
233                    - for 2D resource, represents a swizzle mode for displayable resource
234                    - for 3D resource, represents a swizzle mode similar to legacy thick tile mode
235                    within slice is placed as 2D ADDR_SW_*_S. Don't use this combination if possible!
236 *   ADDR_SW_*_R    For GFX9:
237                    - 2D resource only, represents a swizzle mode for rotated displayable resource
238                    For GFX10:
239                    - represents a swizzle mode for render target resource
240 *
241 ****************************************************************************************************
242 */
243 typedef enum _AddrSwizzleMode
244 {
245     ADDR_SW_LINEAR          = 0,
246     ADDR_SW_256B_S          = 1,
247     ADDR_SW_256B_D          = 2,
248     ADDR_SW_256B_R          = 3,
249     ADDR_SW_4KB_Z           = 4,
250     ADDR_SW_4KB_S           = 5,
251     ADDR_SW_4KB_D           = 6,
252     ADDR_SW_4KB_R           = 7,
253     ADDR_SW_64KB_Z          = 8,
254     ADDR_SW_64KB_S          = 9,
255     ADDR_SW_64KB_D          = 10,
256     ADDR_SW_64KB_R          = 11,
257     ADDR_SW_MISCDEF12       = 12,
258     ADDR_SW_MISCDEF13       = 13,
259     ADDR_SW_MISCDEF14       = 14,
260     ADDR_SW_MISCDEF15       = 15,
261     ADDR_SW_64KB_Z_T        = 16,
262     ADDR_SW_64KB_S_T        = 17,
263     ADDR_SW_64KB_D_T        = 18,
264     ADDR_SW_64KB_R_T        = 19,
265     ADDR_SW_4KB_Z_X         = 20,
266     ADDR_SW_4KB_S_X         = 21,
267     ADDR_SW_4KB_D_X         = 22,
268     ADDR_SW_4KB_R_X         = 23,
269     ADDR_SW_64KB_Z_X        = 24,
270     ADDR_SW_64KB_S_X        = 25,
271     ADDR_SW_64KB_D_X        = 26,
272     ADDR_SW_64KB_R_X        = 27,
273     ADDR_SW_MISCDEF28       = 28,
274     ADDR_SW_MISCDEF29       = 29,
275     ADDR_SW_MISCDEF30       = 30,
276     ADDR_SW_MISCDEF31       = 31,
277     ADDR_SW_LINEAR_GENERAL  = 32,
278     ADDR_SW_MAX_TYPE        = 33,
279 
280     ADDR_SW_RESERVED0       = ADDR_SW_MISCDEF12,
281     ADDR_SW_RESERVED1       = ADDR_SW_MISCDEF13,
282     ADDR_SW_RESERVED2       = ADDR_SW_MISCDEF14,
283     ADDR_SW_RESERVED3       = ADDR_SW_MISCDEF15,
284     ADDR_SW_RESERVED4       = ADDR_SW_MISCDEF29,
285     ADDR_SW_RESERVED5       = ADDR_SW_MISCDEF30,
286 
287     ADDR_SW_VAR_Z_X         = ADDR_SW_MISCDEF28,
288     ADDR_SW_VAR_R_X         = ADDR_SW_MISCDEF31,
289 
290 } AddrSwizzleMode;
291 
292 /**
293 ****************************************************************************************************
294 * @brief
295 *   Neutral enums that define image type
296 * @note
297 *   this is new for address library interface version 2
298 *
299 ****************************************************************************************************
300 */
301 typedef enum _AddrResourceType
302 {
303     ADDR_RSRC_TEX_1D = 0,
304     ADDR_RSRC_TEX_2D = 1,
305     ADDR_RSRC_TEX_3D = 2,
306     ADDR_RSRC_MAX_TYPE = 3,
307 } AddrResourceType;
308 
309 /**
310 ****************************************************************************************************
311 * @brief
312 *   Neutral enums that define resource heap location
313 * @note
314 *   this is new for address library interface version 2
315 *
316 ****************************************************************************************************
317 */
318 typedef enum _AddrResrouceLocation
319 {
320     ADDR_RSRC_LOC_UNDEF  = 0,   // Resource heap is undefined/unknown
321     ADDR_RSRC_LOC_LOCAL  = 1,   // CPU visable and CPU invisable local heap
322     ADDR_RSRC_LOC_USWC   = 2,   // CPU write-combined non-cached nonlocal heap
323     ADDR_RSRC_LOC_CACHED = 3,   // CPU cached nonlocal heap
324     ADDR_RSRC_LOC_INVIS  = 4,   // CPU invisable local heap only
325     ADDR_RSRC_LOC_MAX_TYPE = 5,
326 } AddrResrouceLocation;
327 
328 /**
329 ****************************************************************************************************
330 * @brief
331 *   Neutral enums that define resource basic swizzle mode
332 * @note
333 *   this is new for address library interface version 2
334 *
335 ****************************************************************************************************
336 */
337 typedef enum _AddrSwType
338 {
339     ADDR_SW_Z  = 0,   // Resource basic swizzle mode is ZOrder
340     ADDR_SW_S  = 1,   // Resource basic swizzle mode is Standard
341     ADDR_SW_D  = 2,   // Resource basic swizzle mode is Display
342     ADDR_SW_R  = 3,   // Resource basic swizzle mode is Rotated/Render optimized
343     ADDR_SW_L  = 4,   // Resource basic swizzle mode is Linear
344     ADDR_SW_MAX_SWTYPE
345 } AddrSwType;
346 
347 /**
348 ****************************************************************************************************
349 * @brief
350 *   Neutral enums that define mipmap major mode
351 * @note
352 *   this is new for address library interface version 2
353 *
354 ****************************************************************************************************
355 */
356 typedef enum _AddrMajorMode
357 {
358     ADDR_MAJOR_X = 0,
359     ADDR_MAJOR_Y = 1,
360     ADDR_MAJOR_Z = 2,
361     ADDR_MAJOR_MAX_TYPE = 3,
362 } AddrMajorMode;
363 
364 /**
365 ****************************************************************************************************
366 *   AddrFormat
367 *
368 *   @brief
369 *       Neutral enum for SurfaceFormat
370 *
371 ****************************************************************************************************
372 */
373 typedef enum _AddrFormat {
374     ADDR_FMT_INVALID                              = 0x00000000,
375     ADDR_FMT_8                                    = 0x00000001,
376     ADDR_FMT_4_4                                  = 0x00000002,
377     ADDR_FMT_3_3_2                                = 0x00000003,
378     ADDR_FMT_RESERVED_4                           = 0x00000004,
379     ADDR_FMT_16                                   = 0x00000005,
380     ADDR_FMT_16_FLOAT                             = ADDR_FMT_16,
381     ADDR_FMT_8_8                                  = 0x00000007,
382     ADDR_FMT_5_6_5                                = 0x00000008,
383     ADDR_FMT_6_5_5                                = 0x00000009,
384     ADDR_FMT_1_5_5_5                              = 0x0000000a,
385     ADDR_FMT_4_4_4_4                              = 0x0000000b,
386     ADDR_FMT_5_5_5_1                              = 0x0000000c,
387     ADDR_FMT_32                                   = 0x0000000d,
388     ADDR_FMT_32_FLOAT                             = ADDR_FMT_32,
389     ADDR_FMT_16_16                                = 0x0000000f,
390     ADDR_FMT_16_16_FLOAT                          = ADDR_FMT_16_16,
391     ADDR_FMT_8_24                                 = 0x00000011,
392     ADDR_FMT_8_24_FLOAT                           = ADDR_FMT_8_24,
393     ADDR_FMT_24_8                                 = 0x00000013,
394     ADDR_FMT_24_8_FLOAT                           = ADDR_FMT_24_8,
395     ADDR_FMT_10_11_11                             = 0x00000015,
396     ADDR_FMT_10_11_11_FLOAT                       = ADDR_FMT_10_11_11,
397     ADDR_FMT_11_11_10                             = 0x00000017,
398     ADDR_FMT_11_11_10_FLOAT                       = ADDR_FMT_11_11_10,
399     ADDR_FMT_2_10_10_10                           = 0x00000019,
400     ADDR_FMT_8_8_8_8                              = 0x0000001a,
401     ADDR_FMT_10_10_10_2                           = 0x0000001b,
402     ADDR_FMT_X24_8_32_FLOAT                       = 0x0000001c,
403     ADDR_FMT_32_32                                = 0x0000001d,
404     ADDR_FMT_32_32_FLOAT                          = ADDR_FMT_32_32,
405     ADDR_FMT_16_16_16_16                          = 0x0000001f,
406     ADDR_FMT_16_16_16_16_FLOAT                    = ADDR_FMT_16_16_16_16,
407     ADDR_FMT_RESERVED_33                          = 0x00000021,
408     ADDR_FMT_32_32_32_32                          = 0x00000022,
409     ADDR_FMT_32_32_32_32_FLOAT                    = ADDR_FMT_32_32_32_32,
410     ADDR_FMT_RESERVED_36                          = 0x00000024,
411     ADDR_FMT_1                                    = 0x00000025,
412     ADDR_FMT_1_REVERSED                           = 0x00000026,
413     ADDR_FMT_GB_GR                                = 0x00000027,
414     ADDR_FMT_BG_RG                                = 0x00000028,
415     ADDR_FMT_32_AS_8                              = 0x00000029,
416     ADDR_FMT_32_AS_8_8                            = 0x0000002a,
417     ADDR_FMT_5_9_9_9_SHAREDEXP                    = 0x0000002b,
418     ADDR_FMT_8_8_8                                = 0x0000002c,
419     ADDR_FMT_16_16_16                             = 0x0000002d,
420     ADDR_FMT_16_16_16_FLOAT                       = ADDR_FMT_16_16_16,
421     ADDR_FMT_32_32_32                             = 0x0000002f,
422     ADDR_FMT_32_32_32_FLOAT                       = ADDR_FMT_32_32_32,
423     ADDR_FMT_BC1                                  = 0x00000031,
424     ADDR_FMT_BC2                                  = 0x00000032,
425     ADDR_FMT_BC3                                  = 0x00000033,
426     ADDR_FMT_BC4                                  = 0x00000034,
427     ADDR_FMT_BC5                                  = 0x00000035,
428     ADDR_FMT_BC6                                  = 0x00000036,
429     ADDR_FMT_BC7                                  = 0x00000037,
430     ADDR_FMT_32_AS_32_32_32_32                    = 0x00000038,
431     ADDR_FMT_APC3                                 = 0x00000039,
432     ADDR_FMT_APC4                                 = 0x0000003a,
433     ADDR_FMT_APC5                                 = 0x0000003b,
434     ADDR_FMT_APC6                                 = 0x0000003c,
435     ADDR_FMT_APC7                                 = 0x0000003d,
436     ADDR_FMT_CTX1                                 = 0x0000003e,
437     ADDR_FMT_RESERVED_63                          = 0x0000003f,
438     ADDR_FMT_ASTC_4x4                             = 0x00000040,
439     ADDR_FMT_ASTC_5x4                             = 0x00000041,
440     ADDR_FMT_ASTC_5x5                             = 0x00000042,
441     ADDR_FMT_ASTC_6x5                             = 0x00000043,
442     ADDR_FMT_ASTC_6x6                             = 0x00000044,
443     ADDR_FMT_ASTC_8x5                             = 0x00000045,
444     ADDR_FMT_ASTC_8x6                             = 0x00000046,
445     ADDR_FMT_ASTC_8x8                             = 0x00000047,
446     ADDR_FMT_ASTC_10x5                            = 0x00000048,
447     ADDR_FMT_ASTC_10x6                            = 0x00000049,
448     ADDR_FMT_ASTC_10x8                            = 0x0000004a,
449     ADDR_FMT_ASTC_10x10                           = 0x0000004b,
450     ADDR_FMT_ASTC_12x10                           = 0x0000004c,
451     ADDR_FMT_ASTC_12x12                           = 0x0000004d,
452     ADDR_FMT_ETC2_64BPP                           = 0x0000004e,
453     ADDR_FMT_ETC2_128BPP                          = 0x0000004f,
454 } AddrFormat;
455 
456 /**
457 ****************************************************************************************************
458 *   AddrDepthFormat
459 *
460 *   @brief
461 *       Neutral enum for addrFlt32ToDepthPixel
462 *
463 ****************************************************************************************************
464 */
465 typedef enum _AddrDepthFormat
466 {
467     ADDR_DEPTH_INVALID                            = 0x00000000,
468     ADDR_DEPTH_16                                 = 0x00000001,
469     ADDR_DEPTH_X8_24                              = 0x00000002,
470     ADDR_DEPTH_8_24                               = 0x00000003,
471     ADDR_DEPTH_X8_24_FLOAT                        = 0x00000004,
472     ADDR_DEPTH_8_24_FLOAT                         = 0x00000005,
473     ADDR_DEPTH_32_FLOAT                           = 0x00000006,
474     ADDR_DEPTH_X24_8_32_FLOAT                     = 0x00000007,
475 
476 } AddrDepthFormat;
477 
478 /**
479 ****************************************************************************************************
480 *   AddrColorFormat
481 *
482 *   @brief
483 *       Neutral enum for ColorFormat
484 *
485 ****************************************************************************************************
486 */
487 typedef enum _AddrColorFormat
488 {
489     ADDR_COLOR_INVALID                            = 0x00000000,
490     ADDR_COLOR_8                                  = 0x00000001,
491     ADDR_COLOR_4_4                                = 0x00000002,
492     ADDR_COLOR_3_3_2                              = 0x00000003,
493     ADDR_COLOR_RESERVED_4                         = 0x00000004,
494     ADDR_COLOR_16                                 = 0x00000005,
495     ADDR_COLOR_16_FLOAT                           = 0x00000006,
496     ADDR_COLOR_8_8                                = 0x00000007,
497     ADDR_COLOR_5_6_5                              = 0x00000008,
498     ADDR_COLOR_6_5_5                              = 0x00000009,
499     ADDR_COLOR_1_5_5_5                            = 0x0000000a,
500     ADDR_COLOR_4_4_4_4                            = 0x0000000b,
501     ADDR_COLOR_5_5_5_1                            = 0x0000000c,
502     ADDR_COLOR_32                                 = 0x0000000d,
503     ADDR_COLOR_32_FLOAT                           = 0x0000000e,
504     ADDR_COLOR_16_16                              = 0x0000000f,
505     ADDR_COLOR_16_16_FLOAT                        = 0x00000010,
506     ADDR_COLOR_8_24                               = 0x00000011,
507     ADDR_COLOR_8_24_FLOAT                         = 0x00000012,
508     ADDR_COLOR_24_8                               = 0x00000013,
509     ADDR_COLOR_24_8_FLOAT                         = 0x00000014,
510     ADDR_COLOR_10_11_11                           = 0x00000015,
511     ADDR_COLOR_10_11_11_FLOAT                     = 0x00000016,
512     ADDR_COLOR_11_11_10                           = 0x00000017,
513     ADDR_COLOR_11_11_10_FLOAT                     = 0x00000018,
514     ADDR_COLOR_2_10_10_10                         = 0x00000019,
515     ADDR_COLOR_8_8_8_8                            = 0x0000001a,
516     ADDR_COLOR_10_10_10_2                         = 0x0000001b,
517     ADDR_COLOR_X24_8_32_FLOAT                     = 0x0000001c,
518     ADDR_COLOR_32_32                              = 0x0000001d,
519     ADDR_COLOR_32_32_FLOAT                        = 0x0000001e,
520     ADDR_COLOR_16_16_16_16                        = 0x0000001f,
521     ADDR_COLOR_16_16_16_16_FLOAT                  = 0x00000020,
522     ADDR_COLOR_RESERVED_33                        = 0x00000021,
523     ADDR_COLOR_32_32_32_32                        = 0x00000022,
524     ADDR_COLOR_32_32_32_32_FLOAT                  = 0x00000023,
525 } AddrColorFormat;
526 
527 /**
528 ****************************************************************************************************
529 *   AddrSurfaceNumber
530 *
531 *   @brief
532 *       Neutral enum for SurfaceNumber
533 *
534 ****************************************************************************************************
535 */
536 typedef enum _AddrSurfaceNumber {
537     ADDR_NUMBER_UNORM                             = 0x00000000,
538     ADDR_NUMBER_SNORM                             = 0x00000001,
539     ADDR_NUMBER_USCALED                           = 0x00000002,
540     ADDR_NUMBER_SSCALED                           = 0x00000003,
541     ADDR_NUMBER_UINT                              = 0x00000004,
542     ADDR_NUMBER_SINT                              = 0x00000005,
543     ADDR_NUMBER_SRGB                              = 0x00000006,
544     ADDR_NUMBER_FLOAT                             = 0x00000007,
545 } AddrSurfaceNumber;
546 
547 /**
548 ****************************************************************************************************
549 *   AddrSurfaceSwap
550 *
551 *   @brief
552 *       Neutral enum for SurfaceSwap
553 *
554 ****************************************************************************************************
555 */
556 typedef enum _AddrSurfaceSwap {
557     ADDR_SWAP_STD                                 = 0x00000000,
558     ADDR_SWAP_ALT                                 = 0x00000001,
559     ADDR_SWAP_STD_REV                             = 0x00000002,
560     ADDR_SWAP_ALT_REV                             = 0x00000003,
561 } AddrSurfaceSwap;
562 
563 /**
564 ****************************************************************************************************
565 *   AddrHtileBlockSize
566 *
567 *   @brief
568 *       Size of HTILE blocks, valid values are 4 or 8 for now
569 ****************************************************************************************************
570 */
571 typedef enum _AddrHtileBlockSize
572 {
573     ADDR_HTILE_BLOCKSIZE_4 = 4,
574     ADDR_HTILE_BLOCKSIZE_8 = 8,
575 } AddrHtileBlockSize;
576 
577 
578 /**
579 ****************************************************************************************************
580 *   AddrPipeCfg
581 *
582 *   @brief
583 *       The pipe configuration field specifies both the number of pipes and
584 *       how pipes are interleaved on the surface.
585 *       The expression of number of pipes, the shader engine tile size, and packer tile size
586 *       is encoded in a PIPE_CONFIG register field.
587 *       In general the number of pipes usually matches the number of memory channels of the
588 *       hardware configuration.
589 *       For hw configurations w/ non-pow2 memory number of memory channels, it usually matches
590 *       the number of ROP units(? TODO: which registers??)
591 *       The enum value = hw enum + 1 which is to reserve 0 for requesting default.
592 ****************************************************************************************************
593 */
594 typedef enum _AddrPipeCfg
595 {
596     ADDR_PIPECFG_INVALID              = 0,
597     ADDR_PIPECFG_P2                   = 1, /// 2 pipes,
598     ADDR_PIPECFG_P4_8x16              = 5, /// 4 pipes,
599     ADDR_PIPECFG_P4_16x16             = 6,
600     ADDR_PIPECFG_P4_16x32             = 7,
601     ADDR_PIPECFG_P4_32x32             = 8,
602     ADDR_PIPECFG_P8_16x16_8x16        = 9, /// 8 pipes
603     ADDR_PIPECFG_P8_16x32_8x16        = 10,
604     ADDR_PIPECFG_P8_32x32_8x16        = 11,
605     ADDR_PIPECFG_P8_16x32_16x16       = 12,
606     ADDR_PIPECFG_P8_32x32_16x16       = 13,
607     ADDR_PIPECFG_P8_32x32_16x32       = 14,
608     ADDR_PIPECFG_P8_32x64_32x32       = 15,
609     ADDR_PIPECFG_P16_32x32_8x16       = 17, /// 16 pipes
610     ADDR_PIPECFG_P16_32x32_16x16      = 18,
611     ADDR_PIPECFG_UNUSED               = 19,
612     ADDR_PIPECFG_MAX                  = 20,
613 } AddrPipeCfg;
614 
615 /**
616 ****************************************************************************************************
617 * AddrTileType
618 *
619 *   @brief
620 *       Neutral enums that specifies micro tile type (MICRO_TILE_MODE)
621 ****************************************************************************************************
622 */
623 typedef enum _AddrTileType
624 {
625     ADDR_DISPLAYABLE        = 0,    ///< Displayable tiling
626     ADDR_NON_DISPLAYABLE    = 1,    ///< Non-displayable tiling, a.k.a thin micro tiling
627     ADDR_DEPTH_SAMPLE_ORDER = 2,    ///< Same as non-displayable plus depth-sample-order
628     ADDR_ROTATED            = 3,    ///< Rotated displayable tiling
629     ADDR_THICK              = 4,    ///< Thick micro-tiling, only valid for THICK and XTHICK
630 } AddrTileType;
631 
632 ////////////////////////////////////////////////////////////////////////////////////////////////////
633 //
634 //  Type definitions: short system-independent names for address library types
635 //
636 ////////////////////////////////////////////////////////////////////////////////////////////////////
637 
638 #if !defined(__APPLE__) || defined(HAVE_TSERVER)
639 
640 #ifndef BOOL_32        // no bool type in C
641 /// @brief Boolean type, since none is defined in C
642 /// @ingroup type
643 #define BOOL_32 int
644 #endif
645 
646 #ifndef INT_32
647 #define INT_32  int
648 #endif
649 
650 #ifndef UINT_32
651 #define UINT_32 unsigned int
652 #endif
653 
654 #ifndef INT_16
655 #define INT_16  short
656 #endif
657 
658 #ifndef UINT_16
659 #define UINT_16 unsigned short
660 #endif
661 
662 #ifndef INT_8
663 #define INT_8   signed char // signed must be used because of aarch64
664 #endif
665 
666 #ifndef UINT_8
667 #define UINT_8  unsigned char
668 #endif
669 
670 #ifndef NULL
671 #define NULL 0
672 #endif
673 
674 #ifndef TRUE
675 #define TRUE 1
676 #endif
677 
678 #ifndef FALSE
679 #define FALSE 0
680 #endif
681 
682 //
683 //  64-bit integer types depend on the compiler
684 //
685 #if defined( __GNUC__ ) || defined( __WATCOMC__ )
686 #define INT_64   long long
687 #define UINT_64  unsigned long long
688 
689 #elif defined( _WIN32 )
690 #define INT_64   __int64
691 #define UINT_64  unsigned __int64
692 
693 #else
694 #error Unsupported compiler and/or operating system for 64-bit integers
695 
696 /// @brief 64-bit signed integer type (compiler dependent)
697 /// @ingroup type
698 ///
699 /// The addrlib defines a 64-bit signed integer type for either
700 /// Gnu/Watcom compilers (which use the first syntax) or for
701 /// the Windows VCC compiler (which uses the second syntax).
702 #define INT_64  long long OR __int64
703 
704 /// @brief 64-bit unsigned integer type (compiler dependent)
705 /// @ingroup type
706 ///
707 /// The addrlib defines a 64-bit unsigned integer type for either
708 /// Gnu/Watcom compilers (which use the first syntax) or for
709 /// the Windows VCC compiler (which uses the second syntax).
710 ///
711 #define UINT_64  unsigned long long OR unsigned __int64
712 #endif
713 
714 #endif // #if !defined(__APPLE__) || defined(HAVE_TSERVER)
715 
716 //  ADDR64X is used to print addresses in hex form on both Windows and Linux
717 //
718 #if defined( __GNUC__ ) || defined( __WATCOMC__ )
719 #define ADDR64X "llx"
720 #define ADDR64D "lld"
721 
722 #elif defined( _WIN32 )
723 #define ADDR64X "I64x"
724 #define ADDR64D "I64d"
725 
726 #else
727 #error Unsupported compiler and/or operating system for 64-bit integers
728 
729 /// @brief Addrlib device address 64-bit printf tag  (compiler dependent)
730 /// @ingroup type
731 ///
732 /// This allows printf to display an ADDR_64 for either the Windows VCC compiler
733 /// (which used this value) or the Gnu/Watcom compilers (which use "llx".
734 /// An example of use is printf("addr 0x%"ADDR64X"\n", address);
735 ///
736 #define ADDR64X "llx" OR "I64x"
737 #define ADDR64D "lld" OR "I64d"
738 #endif
739 
740 
741 /// @brief Union for storing a 32-bit float or 32-bit integer
742 /// @ingroup type
743 ///
744 /// This union provides a simple way to convert between a 32-bit float
745 /// and a 32-bit integer. It also prevents the compiler from producing
746 /// code that alters NaN values when assiging or coying floats.
747 /// Therefore, all address library routines that pass or return 32-bit
748 /// floating point data do so by passing or returning a FLT_32.
749 ///
750 typedef union {
751     INT_32   i;
752     UINT_32  u;
753     float    f;
754 } ADDR_FLT_32;
755 
756 
757 ////////////////////////////////////////////////////////////////////////////////////////////////////
758 //
759 //  Macros for controlling linking and building on multiple systems
760 //
761 ////////////////////////////////////////////////////////////////////////////////////////////////////
762 #if defined(_MSC_VER)
763 #if defined(va_copy)
764 #undef va_copy  //redefine va_copy to support VC2013
765 #endif
766 #endif
767 
768 #if !defined(va_copy)
769 #define va_copy(dst, src) \
770     ((void) memcpy(&(dst), &(src), sizeof(va_list)))
771 #endif
772 
773 #endif // __ADDR_TYPES_H__
774 
775