1 /*
2  * Copyright 2014 Advanced Micro Devices, Inc.
3  * All Rights Reserved.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the next
13  * paragraph) shall be included in all copies or substantial portions of the
14  * Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22  * SOFTWARE.
23  */
24 
25 #include "si_build_pm4.h"
26 
27 /* For MSAA sample positions. */
28 #define FILL_SREG(s0x, s0y, s1x, s1y, s2x, s2y, s3x, s3y)                                          \
29    ((((unsigned)(s0x)&0xf) << 0) | (((unsigned)(s0y)&0xf) << 4) | (((unsigned)(s1x)&0xf) << 8) |   \
30     (((unsigned)(s1y)&0xf) << 12) | (((unsigned)(s2x)&0xf) << 16) |                                \
31     (((unsigned)(s2y)&0xf) << 20) | (((unsigned)(s3x)&0xf) << 24) | (((unsigned)(s3y)&0xf) << 28))
32 
33 /* For obtaining location coordinates from registers */
34 #define SEXT4(x)               ((int)((x) | ((x)&0x8 ? 0xfffffff0 : 0)))
35 #define GET_SFIELD(reg, index) SEXT4(((reg) >> ((index)*4)) & 0xf)
36 #define GET_SX(reg, index)     GET_SFIELD((reg)[(index) / 4], ((index) % 4) * 2)
37 #define GET_SY(reg, index)     GET_SFIELD((reg)[(index) / 4], ((index) % 4) * 2 + 1)
38 
39 /* The following sample ordering is required by EQAA.
40  *
41  * Sample 0 is approx. in the top-left quadrant.
42  * Sample 1 is approx. in the bottom-right quadrant.
43  *
44  * Sample 2 is approx. in the bottom-left quadrant.
45  * Sample 3 is approx. in the top-right quadrant.
46  * (sample I={2,3} adds more detail to the vicinity of sample I-2)
47  *
48  * Sample 4 is approx. in the same quadrant as sample 0. (top-left)
49  * Sample 5 is approx. in the same quadrant as sample 1. (bottom-right)
50  * Sample 6 is approx. in the same quadrant as sample 2. (bottom-left)
51  * Sample 7 is approx. in the same quadrant as sample 3. (top-right)
52  * (sample I={4,5,6,7} adds more detail to the vicinity of sample I-4)
53  *
54  * The next 8 samples add more detail to the vicinity of the previous samples.
55  * (sample I (I >= 8) adds more detail to the vicinity of sample I-8)
56  *
57  * The ordering is specified such that:
58  *   If we take the first 2 samples, we should get good 2x MSAA.
59  *   If we add 2 more samples, we should get good 4x MSAA with the same sample locations.
60  *   If we add 4 more samples, we should get good 8x MSAA with the same sample locations.
61  *   If we add 8 more samples, we should get perfect 16x MSAA with the same sample locations.
62  *
63  * The ordering also allows finding samples in the same vicinity.
64  *
65  * Group N of 2 samples in the same vicinity in 16x MSAA: {N,N+8}
66  * Group N of 2 samples in the same vicinity in 8x MSAA: {N,N+4}
67  * Group N of 2 samples in the same vicinity in 4x MSAA: {N,N+2}
68  *
69  * Groups of 4 samples in the same vicinity in 16x MSAA:
70  *   Top left:     {0,4,8,12}
71  *   Bottom right: {1,5,9,13}
72  *   Bottom left:  {2,6,10,14}
73  *   Top right:    {3,7,11,15}
74  *
75  * Groups of 4 samples in the same vicinity in 8x MSAA:
76  *   Left half:  {0,2,4,6}
77  *   Right half: {1,3,5,7}
78  *
79  * Groups of 8 samples in the same vicinity in 16x MSAA:
80  *   Left half:  {0,2,4,6,8,10,12,14}
81  *   Right half: {1,3,5,7,9,11,13,15}
82  */
83 
84 /* Important note: We have to use the standard DX positions because shader-based culling
85  * relies on them.
86  */
87 
88 /* 1x MSAA */
89 static const uint32_t sample_locs_1x =
90    FILL_SREG(0, 0, 0, 0, 0, 0, 0, 0); /* S1, S2, S3 fields are not used by 1x */
91 static const uint64_t centroid_priority_1x = 0x0000000000000000ull;
92 
93 /* 2x MSAA (the positions are sorted for EQAA) */
94 static const uint32_t sample_locs_2x =
95    FILL_SREG(-4, -4, 4, 4, 0, 0, 0, 0); /* S2 & S3 fields are not used by 2x MSAA */
96 static const uint64_t centroid_priority_2x = 0x1010101010101010ull;
97 
98 /* 4x MSAA (the positions are sorted for EQAA) */
99 static const uint32_t sample_locs_4x = FILL_SREG(-2, -6, 2, 6, -6, 2, 6, -2);
100 static const uint64_t centroid_priority_4x = 0x3210321032103210ull;
101 
102 /* 8x MSAA (the positions are sorted for EQAA) */
103 static const uint32_t sample_locs_8x[] = {
104    FILL_SREG(-3, -5, 5, 1, -1, 3, 7, -7),
105    FILL_SREG(-7, -1, 3, 7, -5, 5, 1, -3),
106    /* The following are unused by hardware, but we emit them to IBs
107     * instead of multiple SET_CONTEXT_REG packets. */
108    0,
109    0,
110 };
111 static const uint64_t centroid_priority_8x = 0x3546012735460127ull;
112 
113 /* 16x MSAA (the positions are sorted for EQAA) */
114 static const uint32_t sample_locs_16x[] = {
115    FILL_SREG(-5, -2, 5, 3, -2, 6, 3, -5),
116    FILL_SREG(-4, -6, 1, 1, -6, 4, 7, -4),
117    FILL_SREG(-1, -3, 6, 7, -3, 2, 0, -7),
118    FILL_SREG(-7, -8, 2, 5, -8, 0, 4, -1),
119 };
120 static const uint64_t centroid_priority_16x = 0xc97e64b231d0fa85ull;
121 
si_get_sample_position(struct pipe_context * ctx,unsigned sample_count,unsigned sample_index,float * out_value)122 static void si_get_sample_position(struct pipe_context *ctx, unsigned sample_count,
123                                    unsigned sample_index, float *out_value)
124 {
125    const uint32_t *sample_locs;
126 
127    switch (sample_count) {
128    case 1:
129    default:
130       sample_locs = &sample_locs_1x;
131       break;
132    case 2:
133       sample_locs = &sample_locs_2x;
134       break;
135    case 4:
136       sample_locs = &sample_locs_4x;
137       break;
138    case 8:
139       sample_locs = sample_locs_8x;
140       break;
141    case 16:
142       sample_locs = sample_locs_16x;
143       break;
144    }
145 
146    out_value[0] = (GET_SX(sample_locs, sample_index) + 8) / 16.0f;
147    out_value[1] = (GET_SY(sample_locs, sample_index) + 8) / 16.0f;
148 }
149 
si_emit_max_4_sample_locs(struct radeon_cmdbuf * cs,uint64_t centroid_priority,uint32_t sample_locs)150 static void si_emit_max_4_sample_locs(struct radeon_cmdbuf *cs, uint64_t centroid_priority,
151                                       uint32_t sample_locs)
152 {
153    radeon_begin(cs);
154    radeon_set_context_reg_seq(R_028BD4_PA_SC_CENTROID_PRIORITY_0, 2);
155    radeon_emit(centroid_priority);
156    radeon_emit(centroid_priority >> 32);
157    radeon_set_context_reg(R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, sample_locs);
158    radeon_set_context_reg(R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, sample_locs);
159    radeon_set_context_reg(R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, sample_locs);
160    radeon_set_context_reg(R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, sample_locs);
161    radeon_end();
162 }
163 
si_emit_max_16_sample_locs(struct radeon_cmdbuf * cs,uint64_t centroid_priority,const uint32_t * sample_locs,unsigned num_samples)164 static void si_emit_max_16_sample_locs(struct radeon_cmdbuf *cs, uint64_t centroid_priority,
165                                        const uint32_t *sample_locs, unsigned num_samples)
166 {
167    radeon_begin(cs);
168    radeon_set_context_reg_seq(R_028BD4_PA_SC_CENTROID_PRIORITY_0, 2);
169    radeon_emit(centroid_priority);
170    radeon_emit(centroid_priority >> 32);
171    radeon_set_context_reg_seq(R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0,
172                               num_samples == 8 ? 14 : 16);
173    radeon_emit_array(sample_locs, 4);
174    radeon_emit_array(sample_locs, 4);
175    radeon_emit_array(sample_locs, 4);
176    radeon_emit_array(sample_locs, num_samples == 8 ? 2 : 4);
177    radeon_end();
178 }
179 
si_emit_sample_locations(struct radeon_cmdbuf * cs,int nr_samples)180 void si_emit_sample_locations(struct radeon_cmdbuf *cs, int nr_samples)
181 {
182    switch (nr_samples) {
183    default:
184    case 1:
185       si_emit_max_4_sample_locs(cs, centroid_priority_1x, sample_locs_1x);
186       break;
187    case 2:
188       si_emit_max_4_sample_locs(cs, centroid_priority_2x, sample_locs_2x);
189       break;
190    case 4:
191       si_emit_max_4_sample_locs(cs, centroid_priority_4x, sample_locs_4x);
192       break;
193    case 8:
194       si_emit_max_16_sample_locs(cs, centroid_priority_8x, sample_locs_8x, 8);
195       break;
196    case 16:
197       si_emit_max_16_sample_locs(cs, centroid_priority_16x, sample_locs_16x, 16);
198       break;
199    }
200 }
201 
si_init_msaa_functions(struct si_context * sctx)202 void si_init_msaa_functions(struct si_context *sctx)
203 {
204    int i;
205 
206    sctx->b.get_sample_position = si_get_sample_position;
207 
208    si_get_sample_position(&sctx->b, 1, 0, sctx->sample_positions.x1[0]);
209 
210    for (i = 0; i < 2; i++)
211       si_get_sample_position(&sctx->b, 2, i, sctx->sample_positions.x2[i]);
212    for (i = 0; i < 4; i++)
213       si_get_sample_position(&sctx->b, 4, i, sctx->sample_positions.x4[i]);
214    for (i = 0; i < 8; i++)
215       si_get_sample_position(&sctx->b, 8, i, sctx->sample_positions.x8[i]);
216    for (i = 0; i < 16; i++)
217       si_get_sample_position(&sctx->b, 16, i, sctx->sample_positions.x16[i]);
218 }
219