1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "brw_fs.h"
25 #include "brw_fs_live_variables.h"
26 #include "brw_cfg.h"
27
28 /** @file brw_fs_dead_code_eliminate.cpp
29 *
30 * Dataflow-aware dead code elimination.
31 *
32 * Walks the instruction list from the bottom, removing instructions that
33 * have results that both aren't used in later blocks and haven't been read
34 * yet in the tail end of this block.
35 */
36
37 using namespace brw;
38
39 /**
40 * Is it safe to eliminate the instruction?
41 */
42 static bool
can_eliminate(const intel_device_info * devinfo,const fs_inst * inst,BITSET_WORD * flag_live)43 can_eliminate(const intel_device_info *devinfo, const fs_inst *inst,
44 BITSET_WORD *flag_live)
45 {
46 return !inst->is_control_flow() &&
47 !inst->has_side_effects() &&
48 !(flag_live[0] & inst->flags_written(devinfo)) &&
49 !inst->writes_accumulator;
50 }
51
52 /**
53 * Is it safe to omit the write, making the destination ARF null?
54 */
55 static bool
can_omit_write(const fs_inst * inst)56 can_omit_write(const fs_inst *inst)
57 {
58 switch (inst->opcode) {
59 case SHADER_OPCODE_UNTYPED_ATOMIC_LOGICAL:
60 case SHADER_OPCODE_UNTYPED_ATOMIC_FLOAT_LOGICAL:
61 case SHADER_OPCODE_TYPED_ATOMIC_LOGICAL:
62 return true;
63 default:
64 /* We can eliminate the destination write for ordinary instructions,
65 * but not most SENDs.
66 */
67 if (inst->opcode < 128 && inst->mlen == 0)
68 return true;
69
70 /* It might not be safe for other virtual opcodes. */
71 return false;
72 }
73 }
74
75 bool
dead_code_eliminate()76 fs_visitor::dead_code_eliminate()
77 {
78 bool progress = false;
79
80 const fs_live_variables &live_vars = live_analysis.require();
81 int num_vars = live_vars.num_vars;
82 BITSET_WORD *live = rzalloc_array(NULL, BITSET_WORD, BITSET_WORDS(num_vars));
83 BITSET_WORD *flag_live = rzalloc_array(NULL, BITSET_WORD, 1);
84
85 foreach_block_reverse_safe(block, cfg) {
86 memcpy(live, live_vars.block_data[block->num].liveout,
87 sizeof(BITSET_WORD) * BITSET_WORDS(num_vars));
88 memcpy(flag_live, live_vars.block_data[block->num].flag_liveout,
89 sizeof(BITSET_WORD));
90
91 foreach_inst_in_block_reverse_safe(fs_inst, inst, block) {
92 if (inst->dst.file == VGRF) {
93 const unsigned var = live_vars.var_from_reg(inst->dst);
94 bool result_live = false;
95
96 for (unsigned i = 0; i < regs_written(inst); i++)
97 result_live |= BITSET_TEST(live, var + i);
98
99 if (!result_live &&
100 (can_omit_write(inst) || can_eliminate(devinfo, inst, flag_live))) {
101 inst->dst = fs_reg(spread(retype(brw_null_reg(), inst->dst.type),
102 inst->dst.stride));
103 progress = true;
104 }
105 }
106
107 if (inst->dst.is_null() && can_eliminate(devinfo, inst, flag_live)) {
108 inst->opcode = BRW_OPCODE_NOP;
109 progress = true;
110 }
111
112 if (inst->dst.file == VGRF) {
113 if (!inst->is_partial_write()) {
114 const unsigned var = live_vars.var_from_reg(inst->dst);
115 for (unsigned i = 0; i < regs_written(inst); i++) {
116 BITSET_CLEAR(live, var + i);
117 }
118 }
119 }
120
121 if (!inst->predicate && inst->exec_size >= 8)
122 flag_live[0] &= ~inst->flags_written(devinfo);
123
124 if (inst->opcode == BRW_OPCODE_NOP) {
125 inst->remove(block, true);
126 continue;
127 }
128
129 for (int i = 0; i < inst->sources; i++) {
130 if (inst->src[i].file == VGRF) {
131 int var = live_vars.var_from_reg(inst->src[i]);
132
133 for (unsigned j = 0; j < regs_read(inst, i); j++) {
134 BITSET_SET(live, var + j);
135 }
136 }
137 }
138
139 flag_live[0] |= inst->flags_read(devinfo);
140 }
141 }
142
143 cfg->adjust_block_ips();
144
145 ralloc_free(live);
146 ralloc_free(flag_live);
147
148 if (progress)
149 invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
150
151 return progress;
152 }
153