1 /* 2 * Copyright © 2007-2019 Advanced Micro Devices, Inc. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining 6 * a copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sub license, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 14 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 15 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 16 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS 17 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 20 * USE OR OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * The above copyright notice and this permission notice (including the 23 * next paragraph) shall be included in all copies or substantial portions 24 * of the Software. 25 */ 26 27 /** 28 **************************************************************************************************** 29 * @file siaddrlib.h 30 * @brief Contains the R800Lib class definition. 31 **************************************************************************************************** 32 */ 33 34 #ifndef __SI_ADDR_LIB_H__ 35 #define __SI_ADDR_LIB_H__ 36 37 #include "addrlib1.h" 38 #include "egbaddrlib.h" 39 40 namespace Addr 41 { 42 namespace V1 43 { 44 45 /** 46 **************************************************************************************************** 47 * @brief Describes the information in tile mode table 48 **************************************************************************************************** 49 */ 50 struct TileConfig 51 { 52 AddrTileMode mode; 53 AddrTileType type; 54 ADDR_TILEINFO info; 55 }; 56 57 /** 58 **************************************************************************************************** 59 * @brief SI specific settings structure. 60 **************************************************************************************************** 61 */ 62 struct SiChipSettings 63 { 64 UINT_32 isSouthernIsland : 1; 65 UINT_32 isTahiti : 1; 66 UINT_32 isPitCairn : 1; 67 UINT_32 isCapeVerde : 1; 68 // Oland/Hainan are of GFXIP 6.0, similar with SI 69 UINT_32 isOland : 1; 70 UINT_32 isHainan : 1; 71 72 // CI 73 UINT_32 isSeaIsland : 1; 74 UINT_32 isBonaire : 1; 75 UINT_32 isKaveri : 1; 76 UINT_32 isSpectre : 1; 77 UINT_32 isSpooky : 1; 78 UINT_32 isKalindi : 1; 79 UINT_32 isHawaii : 1; 80 81 // VI 82 UINT_32 isVolcanicIslands : 1; 83 UINT_32 isIceland : 1; 84 UINT_32 isTonga : 1; 85 UINT_32 isFiji : 1; 86 UINT_32 isPolaris10 : 1; 87 UINT_32 isPolaris11 : 1; 88 UINT_32 isPolaris12 : 1; 89 UINT_32 isVegaM : 1; 90 UINT_32 isCarrizo : 1; 91 }; 92 93 /** 94 **************************************************************************************************** 95 * @brief This class is the SI specific address library 96 * function set. 97 **************************************************************************************************** 98 */ 99 class SiLib : public EgBasedLib 100 { 101 public: 102 /// Creates SiLib object CreateObj(const Client * pClient)103 static Addr::Lib* CreateObj(const Client* pClient) 104 { 105 VOID* pMem = Object::ClientAlloc(sizeof(SiLib), pClient); 106 return (pMem != NULL) ? new (pMem) SiLib(pClient) : NULL; 107 } 108 109 protected: 110 SiLib(const Client* pClient); 111 virtual ~SiLib(); 112 113 // Hwl interface - defined in AddrLib1 114 virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfo( 115 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, 116 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; 117 118 virtual ADDR_E_RETURNCODE HwlConvertTileInfoToHW( 119 const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, 120 ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) const; 121 122 virtual UINT_64 HwlComputeXmaskAddrFromCoord( 123 UINT_32 pitch, UINT_32 height, UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 numSlices, 124 UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8, 125 ADDR_TILEINFO* pTileInfo, UINT_32* pBitPosition) const; 126 127 virtual VOID HwlComputeXmaskCoordFromAddr( 128 UINT_64 addr, UINT_32 bitPosition, UINT_32 pitch, UINT_32 height, UINT_32 numSlices, 129 UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8, 130 ADDR_TILEINFO* pTileInfo, UINT_32* pX, UINT_32* pY, UINT_32* pSlice) const; 131 132 virtual ADDR_E_RETURNCODE HwlGetTileIndex( 133 const ADDR_GET_TILEINDEX_INPUT* pIn, 134 ADDR_GET_TILEINDEX_OUTPUT* pOut) const; 135 136 virtual BOOL_32 HwlComputeMipLevel( 137 ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const; 138 139 virtual ChipFamily HwlConvertChipFamily( 140 UINT_32 uChipFamily, UINT_32 uChipRevision); 141 142 virtual BOOL_32 HwlInitGlobalParams( 143 const ADDR_CREATE_INPUT* pCreateIn); 144 145 virtual ADDR_E_RETURNCODE HwlSetupTileCfg( 146 UINT_32 bpp, INT_32 index, INT_32 macroModeIndex, 147 ADDR_TILEINFO* pInfo, AddrTileMode* pMode = 0, AddrTileType* pType = 0) const; 148 149 virtual VOID HwlComputeTileDataWidthAndHeightLinear( 150 UINT_32* pMacroWidth, UINT_32* pMacroHeight, 151 UINT_32 bpp, ADDR_TILEINFO* pTileInfo) const; 152 153 virtual UINT_64 HwlComputeHtileBytes( 154 UINT_32 pitch, UINT_32 height, UINT_32 bpp, 155 BOOL_32 isLinear, UINT_32 numSlices, UINT_64* pSliceBytes, UINT_32 baseAlign) const; 156 157 virtual ADDR_E_RETURNCODE ComputeBankEquation( 158 UINT_32 log2BytesPP, UINT_32 threshX, UINT_32 threshY, 159 ADDR_TILEINFO* pTileInfo, ADDR_EQUATION* pEquation) const; 160 161 virtual ADDR_E_RETURNCODE ComputePipeEquation( 162 UINT_32 log2BytesPP, UINT_32 threshX, UINT_32 threshY, 163 ADDR_TILEINFO* pTileInfo, ADDR_EQUATION* pEquation) const; 164 165 virtual UINT_32 ComputePipeFromCoord( 166 UINT_32 x, UINT_32 y, UINT_32 slice, 167 AddrTileMode tileMode, UINT_32 pipeSwizzle, BOOL_32 ignoreSE, 168 ADDR_TILEINFO* pTileInfo) const; 169 170 virtual UINT_32 HwlGetPipes(const ADDR_TILEINFO* pTileInfo) const; 171 172 /// Pre-handler of 3x pitch (96 bit) adjustment 173 virtual UINT_32 HwlPreHandleBaseLvl3xPitch( 174 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32 expPitch) const; 175 /// Post-handler of 3x pitch adjustment 176 virtual UINT_32 HwlPostHandleBaseLvl3xPitch( 177 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32 expPitch) const; 178 179 /// Dummy function to finalize the inheritance 180 virtual UINT_32 HwlComputeXmaskCoordYFrom8Pipe( 181 UINT_32 pipe, UINT_32 x) const; 182 183 // Sub-hwl interface - defined in EgBasedLib 184 virtual VOID HwlSetupTileInfo( 185 AddrTileMode tileMode, ADDR_SURFACE_FLAGS flags, 186 UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, 187 ADDR_TILEINFO* inputTileInfo, ADDR_TILEINFO* outputTileInfo, 188 AddrTileType inTileType, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; 189 190 virtual UINT_32 HwlGetPitchAlignmentMicroTiled( 191 AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples) const; 192 193 virtual UINT_64 HwlGetSizeAdjustmentMicroTiled( 194 UINT_32 thickness, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples, 195 UINT_32 baseAlign, UINT_32 pitchAlign, 196 UINT_32 *pPitch, UINT_32 *pHeight) const; 197 198 virtual VOID HwlCheckLastMacroTiledLvl( 199 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; 200 201 virtual BOOL_32 HwlTileInfoEqual( 202 const ADDR_TILEINFO* pLeft, const ADDR_TILEINFO* pRight) const; 203 204 virtual AddrTileMode HwlDegradeThickTileMode( 205 AddrTileMode baseTileMode, UINT_32 numSlices, UINT_32* pBytesPerTile) const; 206 207 virtual VOID HwlOverrideTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const; 208 209 virtual VOID HwlOptimizeTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const; 210 211 virtual VOID HwlSelectTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const; 212 213 /// Overwrite tile setting to PRT 214 virtual VOID HwlSetPrtTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const; 215 HwlSanityCheckMacroTiled(ADDR_TILEINFO * pTileInfo)216 virtual BOOL_32 HwlSanityCheckMacroTiled( 217 ADDR_TILEINFO* pTileInfo) const 218 { 219 return TRUE; 220 } 221 222 virtual UINT_32 HwlGetPitchAlignmentLinear(UINT_32 bpp, ADDR_SURFACE_FLAGS flags) const; 223 224 virtual UINT_64 HwlGetSizeAdjustmentLinear( 225 AddrTileMode tileMode, 226 UINT_32 bpp, UINT_32 numSamples, UINT_32 baseAlign, UINT_32 pitchAlign, 227 UINT_32 *pPitch, UINT_32 *pHeight, UINT_32 *pHeightAlign) const; 228 229 virtual VOID HwlComputeSurfaceCoord2DFromBankPipe( 230 AddrTileMode tileMode, UINT_32* pX, UINT_32* pY, UINT_32 slice, 231 UINT_32 bank, UINT_32 pipe, 232 UINT_32 bankSwizzle, UINT_32 pipeSwizzle, UINT_32 tileSlices, 233 BOOL_32 ignoreSE, 234 ADDR_TILEINFO* pTileInfo) const; 235 236 virtual UINT_32 HwlPreAdjustBank( 237 UINT_32 tileX, UINT_32 bank, ADDR_TILEINFO* pTileInfo) const; 238 239 virtual INT_32 HwlPostCheckTileIndex( 240 const ADDR_TILEINFO* pInfo, AddrTileMode mode, AddrTileType type, 241 INT curIndex = TileIndexInvalid) const; 242 243 virtual VOID HwlFmaskPreThunkSurfInfo( 244 const ADDR_COMPUTE_FMASK_INFO_INPUT* pFmaskIn, 245 const ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut, 246 ADDR_COMPUTE_SURFACE_INFO_INPUT* pSurfIn, 247 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut) const; 248 249 virtual VOID HwlFmaskPostThunkSurfInfo( 250 const ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut, 251 ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut) const; 252 253 virtual UINT_32 HwlComputeFmaskBits( 254 const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, 255 UINT_32* pNumSamples) const; 256 HwlReduceBankWidthHeight(UINT_32 tileSize,UINT_32 bpp,ADDR_SURFACE_FLAGS flags,UINT_32 numSamples,UINT_32 bankHeightAlign,UINT_32 pipes,ADDR_TILEINFO * pTileInfo)257 virtual BOOL_32 HwlReduceBankWidthHeight( 258 UINT_32 tileSize, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples, 259 UINT_32 bankHeightAlign, UINT_32 pipes, 260 ADDR_TILEINFO* pTileInfo) const 261 { 262 return TRUE; 263 } 264 265 virtual UINT_32 HwlComputeMaxBaseAlignments() const; 266 267 virtual UINT_32 HwlComputeMaxMetaBaseAlignments() const; 268 269 virtual VOID HwlComputeSurfaceAlignmentsMacroTiled( 270 AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, 271 UINT_32 mipLevel, UINT_32 numSamples, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; 272 273 // Get equation table pointer and number of equations HwlGetEquationTableInfo(const ADDR_EQUATION ** ppEquationTable)274 virtual UINT_32 HwlGetEquationTableInfo(const ADDR_EQUATION** ppEquationTable) const 275 { 276 *ppEquationTable = m_equationTable; 277 278 return m_numEquations; 279 } 280 281 // Check if it is supported for given bpp and tile config to generate an equation 282 BOOL_32 IsEquationSupported( 283 UINT_32 bpp, TileConfig tileConfig, INT_32 tileIndex, UINT_32 elementBytesLog2) const; 284 285 // Protected non-virtual functions 286 VOID ComputeTileCoordFromPipeAndElemIdx( 287 UINT_32 elemIdx, UINT_32 pipe, AddrPipeCfg pipeCfg, UINT_32 pitchInMacroTile, 288 UINT_32 x, UINT_32 y, UINT_32* pX, UINT_32* pY) const; 289 290 UINT_32 TileCoordToMaskElementIndex( 291 UINT_32 tx, UINT_32 ty, AddrPipeCfg pipeConfig, 292 UINT_32 *macroShift, UINT_32 *elemIdxBits) const; 293 294 BOOL_32 DecodeGbRegs( 295 const ADDR_REGISTER_VALUE* pRegValue); 296 297 const TileConfig* GetTileSetting( 298 UINT_32 index) const; 299 300 // Initialize equation table 301 VOID InitEquationTable(); 302 303 UINT_32 GetPipePerSurf(AddrPipeCfg pipeConfig) const; 304 305 static const UINT_32 TileTableSize = 32; 306 TileConfig m_tileTable[TileTableSize]; 307 UINT_32 m_noOfEntries; 308 309 // Max number of bpp (8bpp/16bpp/32bpp/64bpp/128bpp) 310 static const UINT_32 MaxNumElementBytes = 5; 311 312 static const BOOL_32 m_EquationSupport[TileTableSize][MaxNumElementBytes]; 313 314 // Prt tile mode index mask 315 static const UINT_32 SiPrtTileIndexMask = ((1 << 3) | (1 << 5) | (1 << 6) | (1 << 7) | 316 (1 << 21) | (1 << 22) | (1 << 23) | (1 << 24) | 317 (1 << 25) | (1 << 30)); 318 319 // More than half slots in tile mode table can't support equation 320 static const UINT_32 EquationTableSize = (MaxNumElementBytes * TileTableSize) / 2; 321 // Equation table 322 ADDR_EQUATION m_equationTable[EquationTableSize]; 323 UINT_32 m_numMacroBits[EquationTableSize]; 324 UINT_32 m_blockWidth[EquationTableSize]; 325 UINT_32 m_blockHeight[EquationTableSize]; 326 UINT_32 m_blockSlices[EquationTableSize]; 327 // Number of equation entries in the table 328 UINT_32 m_numEquations; 329 // Equation lookup table according to bpp and tile index 330 UINT_32 m_equationLookupTable[MaxNumElementBytes][TileTableSize]; 331 332 UINT_32 m_uncompressDepthEqIndex; 333 334 SiChipSettings m_settings; 335 336 private: 337 338 VOID ReadGbTileMode(UINT_32 regValue, TileConfig* pCfg) const; 339 BOOL_32 InitTileSettingTable(const UINT_32 *pSetting, UINT_32 noOfEntries); 340 }; 341 342 } // V1 343 } // Addr 344 345 #endif 346 347