1 /* sane - Scanner Access Now Easy. 2 3 Copyright (C) 2019 Povilas Kanapickas <povilas@radix.lt> 4 5 This file is part of the SANE package. 6 7 This program is free software; you can redistribute it and/or 8 modify it under the terms of the GNU General Public License as 9 published by the Free Software Foundation; either version 2 of the 10 License, or (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, but 13 WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program. If not, see <https://www.gnu.org/licenses/>. 19 20 As a special exception, the authors of SANE give permission for 21 additional uses of the libraries contained in this release of SANE. 22 23 The exception is that, if you link a SANE library with other files 24 to produce an executable, this does not by itself cause the 25 resulting executable to be covered by the GNU General Public 26 License. Your use of that executable is in no way restricted on 27 account of linking the SANE library code into it. 28 29 This exception does not, however, invalidate any other reasons why 30 the executable file might be covered by the GNU General Public 31 License. 32 33 If you submit changes to SANE to the maintainers to be included in 34 a subsequent release, you agree by submitting the changes that 35 those changes may be distributed with this exception intact. 36 37 If you write modifications of your own for SANE, it is your choice 38 whether to permit this exception to apply to your modifications. 39 If you do not wish that, delete this exception notice. 40 */ 41 42 #ifndef BACKEND_GENESYS_GL841_REGISTERS_H 43 #define BACKEND_GENESYS_GL841_REGISTERS_H 44 45 #include <cstdint> 46 47 namespace genesys { 48 namespace gl841 { 49 50 using RegAddr = std::uint16_t; 51 using RegMask = std::uint8_t; 52 using RegShift = unsigned; 53 54 static constexpr RegAddr REG_0x01 = 0x01; 55 static constexpr RegMask REG_0x01_CISSET = 0x80; 56 static constexpr RegMask REG_0x01_DOGENB = 0x40; 57 static constexpr RegMask REG_0x01_DVDSET = 0x20; 58 static constexpr RegMask REG_0x01_M16DRAM = 0x08; 59 static constexpr RegMask REG_0x01_DRAMSEL = 0x04; 60 static constexpr RegMask REG_0x01_SHDAREA = 0x02; 61 static constexpr RegMask REG_0x01_SCAN = 0x01; 62 63 static constexpr RegAddr REG_0x02 = 0x02; 64 static constexpr RegMask REG_0x02_NOTHOME = 0x80; 65 static constexpr RegMask REG_0x02_ACDCDIS = 0x40; 66 static constexpr RegMask REG_0x02_AGOHOME = 0x20; 67 static constexpr RegMask REG_0x02_MTRPWR = 0x10; 68 static constexpr RegMask REG_0x02_FASTFED = 0x08; 69 static constexpr RegMask REG_0x02_MTRREV = 0x04; 70 static constexpr RegMask REG_0x02_HOMENEG = 0x02; 71 static constexpr RegMask REG_0x02_LONGCURV = 0x01; 72 73 static constexpr RegMask REG_0x03_LAMPDOG = 0x80; 74 static constexpr RegMask REG_0x03_AVEENB = 0x40; 75 static constexpr RegMask REG_0x03_XPASEL = 0x20; 76 static constexpr RegMask REG_0x03_LAMPPWR = 0x10; 77 static constexpr RegMask REG_0x03_LAMPTIM = 0x0f; 78 79 static constexpr RegMask REG_0x04_LINEART = 0x80; 80 static constexpr RegMask REG_0x04_BITSET = 0x40; 81 static constexpr RegMask REG_0x04_AFEMOD = 0x30; 82 static constexpr RegMask REG_0x04_FILTER = 0x0c; 83 static constexpr RegMask REG_0x04_FESET = 0x03; 84 85 static constexpr RegShift REG_0x04S_AFEMOD = 4; 86 87 static constexpr RegAddr REG_0x05 = 0x05; 88 static constexpr RegMask REG_0x05_DPIHW = 0xc0; 89 static constexpr RegMask REG_0x05_DPIHW_600 = 0x00; 90 static constexpr RegMask REG_0x05_DPIHW_1200 = 0x40; 91 static constexpr RegMask REG_0x05_DPIHW_2400 = 0x80; 92 static constexpr RegMask REG_0x05_MTLLAMP = 0x30; 93 static constexpr RegMask REG_0x05_GMMENB = 0x08; 94 static constexpr RegMask REG_0x05_MTLBASE = 0x03; 95 96 static constexpr RegAddr REG_0x06 = 0x06; 97 static constexpr RegMask REG_0x06_SCANMOD = 0xe0; 98 static constexpr RegShift REG_0x06S_SCANMOD = 5; 99 static constexpr RegMask REG_0x06_PWRBIT = 0x10; 100 static constexpr RegMask REG_0x06_GAIN4 = 0x08; 101 static constexpr RegMask REG_0x06_OPTEST = 0x07; 102 103 static constexpr RegMask REG_0x07_SRAMSEL = 0x08; 104 static constexpr RegMask REG_0x07_FASTDMA = 0x04; 105 static constexpr RegMask REG_0x07_DMASEL = 0x02; 106 static constexpr RegMask REG_0x07_DMARDWR = 0x01; 107 108 static constexpr RegMask REG_0x08_DECFLAG = 0x40; 109 static constexpr RegMask REG_0x08_GMMFFR = 0x20; 110 static constexpr RegMask REG_0x08_GMMFFG = 0x10; 111 static constexpr RegMask REG_0x08_GMMFFB = 0x08; 112 static constexpr RegMask REG_0x08_GMMZR = 0x04; 113 static constexpr RegMask REG_0x08_GMMZG = 0x02; 114 static constexpr RegMask REG_0x08_GMMZB = 0x01; 115 116 static constexpr RegMask REG_0x09_MCNTSET = 0xc0; 117 static constexpr RegMask REG_0x09_CLKSET = 0x30; 118 static constexpr RegMask REG_0x09_BACKSCAN = 0x08; 119 static constexpr RegMask REG_0x09_ENHANCE = 0x04; 120 static constexpr RegMask REG_0x09_SHORTTG = 0x02; 121 static constexpr RegMask REG_0x09_NWAIT = 0x01; 122 123 static constexpr RegShift REG_0x09S_MCNTSET = 6; 124 static constexpr RegShift REG_0x09S_CLKSET = 4; 125 126 127 static constexpr RegMask REG_0x0A_SRAMBUF = 0x01; 128 129 static constexpr RegAddr REG_0x0D = 0x0d; 130 static constexpr RegMask REG_0x0D_CLRLNCNT = 0x01; 131 132 static constexpr RegMask REG_0x16_CTRLHI = 0x80; 133 static constexpr RegMask REG_0x16_TOSHIBA = 0x40; 134 static constexpr RegMask REG_0x16_TGINV = 0x20; 135 static constexpr RegMask REG_0x16_CK1INV = 0x10; 136 static constexpr RegMask REG_0x16_CK2INV = 0x08; 137 static constexpr RegMask REG_0x16_CTRLINV = 0x04; 138 static constexpr RegMask REG_0x16_CKDIS = 0x02; 139 static constexpr RegMask REG_0x16_CTRLDIS = 0x01; 140 141 static constexpr RegMask REG_0x17_TGMODE = 0xc0; 142 static constexpr RegMask REG_0x17_TGMODE_NO_DUMMY = 0x00; 143 static constexpr RegMask REG_0x17_TGMODE_REF = 0x40; 144 static constexpr RegMask REG_0x17_TGMODE_XPA = 0x80; 145 static constexpr RegMask REG_0x17_TGW = 0x3f; 146 static constexpr RegShift REG_0x17S_TGW = 0; 147 148 static constexpr RegMask REG_0x18_CNSET = 0x80; 149 static constexpr RegMask REG_0x18_DCKSEL = 0x60; 150 static constexpr RegMask REG_0x18_CKTOGGLE = 0x10; 151 static constexpr RegMask REG_0x18_CKDELAY = 0x0c; 152 static constexpr RegMask REG_0x18_CKSEL = 0x03; 153 154 static constexpr RegMask REG_0x1A_MANUAL3 = 0x02; 155 static constexpr RegMask REG_0x1A_MANUAL1 = 0x01; 156 static constexpr RegMask REG_0x1A_CK4INV = 0x08; 157 static constexpr RegMask REG_0x1A_CK3INV = 0x04; 158 static constexpr RegMask REG_0x1A_LINECLP = 0x02; 159 160 static constexpr RegMask REG_0x1C_TGTIME = 0x07; 161 162 static constexpr RegMask REG_0x1D_CK4LOW = 0x80; 163 static constexpr RegMask REG_0x1D_CK3LOW = 0x40; 164 static constexpr RegMask REG_0x1D_CK1LOW = 0x20; 165 static constexpr RegMask REG_0x1D_TGSHLD = 0x1f; 166 static constexpr RegShift REG_0x1DS_TGSHLD = 0; 167 168 169 static constexpr RegAddr REG_0x1E = 0x1e; 170 static constexpr RegMask REG_0x1E_WDTIME = 0xf0; 171 static constexpr RegShift REG_0x1ES_WDTIME = 4; 172 static constexpr RegMask REG_0x1E_LINESEL = 0x0f; 173 static constexpr RegShift REG_0x1ES_LINESEL = 0; 174 175 static constexpr RegAddr REG_EXPR = 0x10; 176 static constexpr RegAddr REG_EXPG = 0x12; 177 static constexpr RegAddr REG_EXPB = 0x14; 178 static constexpr RegAddr REG_STEPNO = 0x21; 179 static constexpr RegAddr REG_FWDSTEP = 0x22; 180 static constexpr RegAddr REG_BWDSTEP = 0x23; 181 static constexpr RegAddr REG_FASTNO = 0x24; 182 static constexpr RegAddr REG_LINCNT = 0x25; 183 static constexpr RegAddr REG_DPISET = 0x2c; 184 static constexpr RegAddr REG_STRPIXEL = 0x30; 185 static constexpr RegAddr REG_ENDPIXEL = 0x32; 186 static constexpr RegAddr REG_MAXWD = 0x35; 187 static constexpr RegAddr REG_LPERIOD = 0x38; 188 189 static constexpr RegAddr REG_0x40 = 0x40; 190 static constexpr RegMask REG_0x40_HISPDFLG = 0x04; 191 static constexpr RegMask REG_0x40_MOTMFLG = 0x02; 192 static constexpr RegMask REG_0x40_DATAENB = 0x01; 193 194 static constexpr RegMask REG_0x41_PWRBIT = 0x80; 195 static constexpr RegMask REG_0x41_BUFEMPTY = 0x40; 196 static constexpr RegMask REG_0x41_FEEDFSH = 0x20; 197 static constexpr RegMask REG_0x41_SCANFSH = 0x10; 198 static constexpr RegMask REG_0x41_HOMESNR = 0x08; 199 static constexpr RegMask REG_0x41_LAMPSTS = 0x04; 200 static constexpr RegMask REG_0x41_FEBUSY = 0x02; 201 static constexpr RegMask REG_0x41_MOTORENB = 0x01; 202 203 static constexpr RegMask REG_0x58_VSMP = 0xf8; 204 static constexpr RegShift REG_0x58S_VSMP = 3; 205 static constexpr RegMask REG_0x58_VSMPW = 0x07; 206 static constexpr RegShift REG_0x58S_VSMPW = 0; 207 208 static constexpr RegMask REG_0x59_BSMP = 0xf8; 209 static constexpr RegShift REG_0x59S_BSMP = 3; 210 static constexpr RegMask REG_0x59_BSMPW = 0x07; 211 static constexpr RegShift REG_0x59S_BSMPW = 0; 212 213 static constexpr RegMask REG_0x5A_ADCLKINV = 0x80; 214 static constexpr RegMask REG_0x5A_RLCSEL = 0x40; 215 static constexpr RegMask REG_0x5A_CDSREF = 0x30; 216 static constexpr RegShift REG_0x5AS_CDSREF = 4; 217 static constexpr RegMask REG_0x5A_RLC = 0x0f; 218 static constexpr RegShift REG_0x5AS_RLC = 0; 219 220 static constexpr RegMask REG_0x5E_DECSEL = 0xe0; 221 static constexpr RegShift REG_0x5ES_DECSEL = 5; 222 static constexpr RegMask REG_0x5E_STOPTIM = 0x1f; 223 static constexpr RegShift REG_0x5ES_STOPTIM = 0; 224 225 static constexpr RegAddr REG_0x60 = 0x60; 226 static constexpr RegMask REG_0x60_ZIMOD = 0x1f; 227 static constexpr RegMask REG_0x61_Z1MOD = 0xff; 228 static constexpr RegMask REG_0x62_Z1MOD = 0xff; 229 230 static constexpr RegAddr REG_0x63 = 0x63; 231 static constexpr RegMask REG_0x63_Z2MOD = 0x1f; 232 static constexpr RegMask REG_0x64_Z2MOD = 0xff; 233 static constexpr RegMask REG_0x65_Z2MOD = 0xff; 234 235 static constexpr RegMask REG_0x67_STEPSEL = 0xc0; 236 static constexpr RegMask REG_0x67_FULLSTEP = 0x00; 237 static constexpr RegMask REG_0x67_HALFSTEP = 0x40; 238 static constexpr RegMask REG_0x67_QUATERSTEP = 0x80; 239 static constexpr RegMask REG_0x67_MTRPWM = 0x3f; 240 241 static constexpr RegMask REG_0x68_FSTPSEL = 0xc0; 242 static constexpr RegMask REG_0x68_FULLSTEP = 0x00; 243 static constexpr RegMask REG_0x68_HALFSTEP = 0x40; 244 static constexpr RegMask REG_0x68_QUATERSTEP = 0x80; 245 static constexpr RegMask REG_0x68_FASTPWM = 0x3f; 246 247 static constexpr RegMask REG_0x6B_MULTFILM = 0x80; 248 static constexpr RegMask REG_0x6B_GPOM13 = 0x40; 249 static constexpr RegMask REG_0x6B_GPOM12 = 0x20; 250 static constexpr RegMask REG_0x6B_GPOM11 = 0x10; 251 static constexpr RegMask REG_0x6B_GPO18 = 0x02; 252 static constexpr RegMask REG_0x6B_GPO17 = 0x01; 253 254 static constexpr RegAddr REG_0x6B = 0x6b; 255 256 static constexpr RegAddr REG_0x6C = 0x6c; 257 static constexpr RegMask REG_0x6C_GPIOH = 0xff; 258 static constexpr RegMask REG_0x6C_GPIOL = 0xff; 259 260 static constexpr RegAddr REG_0x6D = 0x6d; 261 static constexpr RegAddr REG_0x6E = 0x6e; 262 static constexpr RegAddr REG_0x6F = 0x6f; 263 264 static constexpr RegMask REG_0x87_LEDADD = 0x04; 265 266 } // namespace gl841 267 } // namespace genesys 268 269 #endif // BACKEND_GENESYS_GL841_REGISTERS_H 270