1 /*
2 * Copyright (c) 2000, 2019, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef SHARE_C1_C1_LIR_HPP
26 #define SHARE_C1_C1_LIR_HPP
27
28 #include "c1/c1_Defs.hpp"
29 #include "c1/c1_ValueType.hpp"
30 #include "oops/method.hpp"
31 #include "utilities/globalDefinitions.hpp"
32
33 class BlockBegin;
34 class BlockList;
35 class LIR_Assembler;
36 class CodeEmitInfo;
37 class CodeStub;
38 class CodeStubList;
39 class ArrayCopyStub;
40 class LIR_Op;
41 class ciType;
42 class ValueType;
43 class LIR_OpVisitState;
44 class FpuStackSim;
45
46 //---------------------------------------------------------------------
47 // LIR Operands
48 // LIR_OprDesc
49 // LIR_OprPtr
50 // LIR_Const
51 // LIR_Address
52 //---------------------------------------------------------------------
53 class LIR_OprDesc;
54 class LIR_OprPtr;
55 class LIR_Const;
56 class LIR_Address;
57 class LIR_OprVisitor;
58
59
60 typedef LIR_OprDesc* LIR_Opr;
61 typedef int RegNr;
62
63 typedef GrowableArray<LIR_Opr> LIR_OprList;
64 typedef GrowableArray<LIR_Op*> LIR_OpArray;
65 typedef GrowableArray<LIR_Op*> LIR_OpList;
66
67 // define LIR_OprPtr early so LIR_OprDesc can refer to it
68 class LIR_OprPtr: public CompilationResourceObj {
69 public:
is_oop_pointer() const70 bool is_oop_pointer() const { return (type() == T_OBJECT); }
is_float_kind() const71 bool is_float_kind() const { BasicType t = type(); return (t == T_FLOAT) || (t == T_DOUBLE); }
72
as_constant()73 virtual LIR_Const* as_constant() { return NULL; }
as_address()74 virtual LIR_Address* as_address() { return NULL; }
75 virtual BasicType type() const = 0;
76 virtual void print_value_on(outputStream* out) const = 0;
77 };
78
79
80
81 // LIR constants
82 class LIR_Const: public LIR_OprPtr {
83 private:
84 JavaValue _value;
85
type_check(BasicType t) const86 void type_check(BasicType t) const { assert(type() == t, "type check"); }
type_check(BasicType t1,BasicType t2) const87 void type_check(BasicType t1, BasicType t2) const { assert(type() == t1 || type() == t2, "type check"); }
type_check(BasicType t1,BasicType t2,BasicType t3) const88 void type_check(BasicType t1, BasicType t2, BasicType t3) const { assert(type() == t1 || type() == t2 || type() == t3, "type check"); }
89
90 public:
LIR_Const(jint i,bool is_address=false)91 LIR_Const(jint i, bool is_address=false) { _value.set_type(is_address?T_ADDRESS:T_INT); _value.set_jint(i); }
LIR_Const(jlong l)92 LIR_Const(jlong l) { _value.set_type(T_LONG); _value.set_jlong(l); }
LIR_Const(jfloat f)93 LIR_Const(jfloat f) { _value.set_type(T_FLOAT); _value.set_jfloat(f); }
LIR_Const(jdouble d)94 LIR_Const(jdouble d) { _value.set_type(T_DOUBLE); _value.set_jdouble(d); }
LIR_Const(jobject o)95 LIR_Const(jobject o) { _value.set_type(T_OBJECT); _value.set_jobject(o); }
LIR_Const(void * p)96 LIR_Const(void* p) {
97 #ifdef _LP64
98 assert(sizeof(jlong) >= sizeof(p), "too small");;
99 _value.set_type(T_LONG); _value.set_jlong((jlong)p);
100 #else
101 assert(sizeof(jint) >= sizeof(p), "too small");;
102 _value.set_type(T_INT); _value.set_jint((jint)p);
103 #endif
104 }
LIR_Const(Metadata * m)105 LIR_Const(Metadata* m) {
106 _value.set_type(T_METADATA);
107 #ifdef _LP64
108 _value.set_jlong((jlong)m);
109 #else
110 _value.set_jint((jint)m);
111 #endif // _LP64
112 }
113
type() const114 virtual BasicType type() const { return _value.get_type(); }
as_constant()115 virtual LIR_Const* as_constant() { return this; }
116
as_jint() const117 jint as_jint() const { type_check(T_INT, T_ADDRESS); return _value.get_jint(); }
as_jlong() const118 jlong as_jlong() const { type_check(T_LONG ); return _value.get_jlong(); }
as_jfloat() const119 jfloat as_jfloat() const { type_check(T_FLOAT ); return _value.get_jfloat(); }
as_jdouble() const120 jdouble as_jdouble() const { type_check(T_DOUBLE); return _value.get_jdouble(); }
as_jobject() const121 jobject as_jobject() const { type_check(T_OBJECT); return _value.get_jobject(); }
as_jint_lo() const122 jint as_jint_lo() const { type_check(T_LONG ); return low(_value.get_jlong()); }
as_jint_hi() const123 jint as_jint_hi() const { type_check(T_LONG ); return high(_value.get_jlong()); }
124
125 #ifdef _LP64
as_pointer() const126 address as_pointer() const { type_check(T_LONG ); return (address)_value.get_jlong(); }
as_metadata() const127 Metadata* as_metadata() const { type_check(T_METADATA); return (Metadata*)_value.get_jlong(); }
128 #else
as_pointer() const129 address as_pointer() const { type_check(T_INT ); return (address)_value.get_jint(); }
as_metadata() const130 Metadata* as_metadata() const { type_check(T_METADATA); return (Metadata*)_value.get_jint(); }
131 #endif
132
133
as_jint_bits() const134 jint as_jint_bits() const { type_check(T_FLOAT, T_INT, T_ADDRESS); return _value.get_jint(); }
as_jint_lo_bits() const135 jint as_jint_lo_bits() const {
136 if (type() == T_DOUBLE) {
137 return low(jlong_cast(_value.get_jdouble()));
138 } else {
139 return as_jint_lo();
140 }
141 }
as_jint_hi_bits() const142 jint as_jint_hi_bits() const {
143 if (type() == T_DOUBLE) {
144 return high(jlong_cast(_value.get_jdouble()));
145 } else {
146 return as_jint_hi();
147 }
148 }
as_jlong_bits() const149 jlong as_jlong_bits() const {
150 if (type() == T_DOUBLE) {
151 return jlong_cast(_value.get_jdouble());
152 } else {
153 return as_jlong();
154 }
155 }
156
157 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
158
159
is_zero_float()160 bool is_zero_float() {
161 jfloat f = as_jfloat();
162 jfloat ok = 0.0f;
163 return jint_cast(f) == jint_cast(ok);
164 }
165
is_one_float()166 bool is_one_float() {
167 jfloat f = as_jfloat();
168 return !g_isnan(f) && g_isfinite(f) && f == 1.0;
169 }
170
is_zero_double()171 bool is_zero_double() {
172 jdouble d = as_jdouble();
173 jdouble ok = 0.0;
174 return jlong_cast(d) == jlong_cast(ok);
175 }
176
is_one_double()177 bool is_one_double() {
178 jdouble d = as_jdouble();
179 return !g_isnan(d) && g_isfinite(d) && d == 1.0;
180 }
181 };
182
183
184 //---------------------LIR Operand descriptor------------------------------------
185 //
186 // The class LIR_OprDesc represents a LIR instruction operand;
187 // it can be a register (ALU/FPU), stack location or a constant;
188 // Constants and addresses are represented as resource area allocated
189 // structures (see above).
190 // Registers and stack locations are inlined into the this pointer
191 // (see value function).
192
193 class LIR_OprDesc: public CompilationResourceObj {
194 public:
195 // value structure:
196 // data opr-type opr-kind
197 // +--------------+-------+-------+
198 // [max...........|7 6 5 4|3 2 1 0]
199 // ^
200 // is_pointer bit
201 //
202 // lowest bit cleared, means it is a structure pointer
203 // we need 4 bits to represent types
204
205 private:
206 friend class LIR_OprFact;
207
208 // Conversion
value() const209 intptr_t value() const { return (intptr_t) this; }
210
check_value_mask(intptr_t mask,intptr_t masked_value) const211 bool check_value_mask(intptr_t mask, intptr_t masked_value) const {
212 return (value() & mask) == masked_value;
213 }
214
215 enum OprKind {
216 pointer_value = 0
217 , stack_value = 1
218 , cpu_register = 3
219 , fpu_register = 5
220 , illegal_value = 7
221 };
222
223 enum OprBits {
224 pointer_bits = 1
225 , kind_bits = 3
226 , type_bits = 4
227 , size_bits = 2
228 , destroys_bits = 1
229 , virtual_bits = 1
230 , is_xmm_bits = 1
231 , last_use_bits = 1
232 , is_fpu_stack_offset_bits = 1 // used in assertion checking on x86 for FPU stack slot allocation
233 , non_data_bits = kind_bits + type_bits + size_bits + destroys_bits + last_use_bits +
234 is_fpu_stack_offset_bits + virtual_bits + is_xmm_bits
235 , data_bits = BitsPerInt - non_data_bits
236 , reg_bits = data_bits / 2 // for two registers in one value encoding
237 };
238
239 enum OprShift {
240 kind_shift = 0
241 , type_shift = kind_shift + kind_bits
242 , size_shift = type_shift + type_bits
243 , destroys_shift = size_shift + size_bits
244 , last_use_shift = destroys_shift + destroys_bits
245 , is_fpu_stack_offset_shift = last_use_shift + last_use_bits
246 , virtual_shift = is_fpu_stack_offset_shift + is_fpu_stack_offset_bits
247 , is_xmm_shift = virtual_shift + virtual_bits
248 , data_shift = is_xmm_shift + is_xmm_bits
249 , reg1_shift = data_shift
250 , reg2_shift = data_shift + reg_bits
251
252 };
253
254 enum OprSize {
255 single_size = 0 << size_shift
256 , double_size = 1 << size_shift
257 };
258
259 enum OprMask {
260 kind_mask = right_n_bits(kind_bits)
261 , type_mask = right_n_bits(type_bits) << type_shift
262 , size_mask = right_n_bits(size_bits) << size_shift
263 , last_use_mask = right_n_bits(last_use_bits) << last_use_shift
264 , is_fpu_stack_offset_mask = right_n_bits(is_fpu_stack_offset_bits) << is_fpu_stack_offset_shift
265 , virtual_mask = right_n_bits(virtual_bits) << virtual_shift
266 , is_xmm_mask = right_n_bits(is_xmm_bits) << is_xmm_shift
267 , pointer_mask = right_n_bits(pointer_bits)
268 , lower_reg_mask = right_n_bits(reg_bits)
269 , no_type_mask = (int)(~(type_mask | last_use_mask | is_fpu_stack_offset_mask))
270 };
271
data() const272 uintptr_t data() const { return value() >> data_shift; }
lo_reg_half() const273 int lo_reg_half() const { return data() & lower_reg_mask; }
hi_reg_half() const274 int hi_reg_half() const { return (data() >> reg_bits) & lower_reg_mask; }
kind_field() const275 OprKind kind_field() const { return (OprKind)(value() & kind_mask); }
size_field() const276 OprSize size_field() const { return (OprSize)(value() & size_mask); }
277
278 static char type_char(BasicType t);
279
280 public:
281 enum {
282 vreg_base = ConcreteRegisterImpl::number_of_registers,
283 vreg_max = (1 << data_bits) - 1
284 };
285
286 static inline LIR_Opr illegalOpr();
287
288 enum OprType {
289 unknown_type = 0 << type_shift // means: not set (catch uninitialized types)
290 , int_type = 1 << type_shift
291 , long_type = 2 << type_shift
292 , object_type = 3 << type_shift
293 , address_type = 4 << type_shift
294 , float_type = 5 << type_shift
295 , double_type = 6 << type_shift
296 , metadata_type = 7 << type_shift
297 };
298 friend OprType as_OprType(BasicType t);
299 friend BasicType as_BasicType(OprType t);
300
type_field_valid() const301 OprType type_field_valid() const { assert(is_register() || is_stack(), "should not be called otherwise"); return (OprType)(value() & type_mask); }
type_field() const302 OprType type_field() const { return is_illegal() ? unknown_type : (OprType)(value() & type_mask); }
303
size_for(BasicType t)304 static OprSize size_for(BasicType t) {
305 switch (t) {
306 case T_LONG:
307 case T_DOUBLE:
308 return double_size;
309 break;
310
311 case T_FLOAT:
312 case T_BOOLEAN:
313 case T_CHAR:
314 case T_BYTE:
315 case T_SHORT:
316 case T_INT:
317 case T_ADDRESS:
318 case T_OBJECT:
319 case T_ARRAY:
320 case T_METADATA:
321 return single_size;
322 break;
323
324 default:
325 ShouldNotReachHere();
326 return single_size;
327 }
328 }
329
330
331 void validate_type() const PRODUCT_RETURN;
332
type() const333 BasicType type() const {
334 if (is_pointer()) {
335 return pointer()->type();
336 }
337 return as_BasicType(type_field());
338 }
339
340
value_type() const341 ValueType* value_type() const { return as_ValueType(type()); }
342
type_char() const343 char type_char() const { return type_char((is_pointer()) ? pointer()->type() : type()); }
344
is_equal(LIR_Opr opr) const345 bool is_equal(LIR_Opr opr) const { return this == opr; }
346 // checks whether types are same
is_same_type(LIR_Opr opr) const347 bool is_same_type(LIR_Opr opr) const {
348 assert(type_field() != unknown_type &&
349 opr->type_field() != unknown_type, "shouldn't see unknown_type");
350 return type_field() == opr->type_field();
351 }
is_same_register(LIR_Opr opr)352 bool is_same_register(LIR_Opr opr) {
353 return (is_register() && opr->is_register() &&
354 kind_field() == opr->kind_field() &&
355 (value() & no_type_mask) == (opr->value() & no_type_mask));
356 }
357
is_pointer() const358 bool is_pointer() const { return check_value_mask(pointer_mask, pointer_value); }
is_illegal() const359 bool is_illegal() const { return kind_field() == illegal_value; }
is_valid() const360 bool is_valid() const { return kind_field() != illegal_value; }
361
is_register() const362 bool is_register() const { return is_cpu_register() || is_fpu_register(); }
is_virtual() const363 bool is_virtual() const { return is_virtual_cpu() || is_virtual_fpu(); }
364
is_constant() const365 bool is_constant() const { return is_pointer() && pointer()->as_constant() != NULL; }
is_address() const366 bool is_address() const { return is_pointer() && pointer()->as_address() != NULL; }
367
is_float_kind() const368 bool is_float_kind() const { return is_pointer() ? pointer()->is_float_kind() : (kind_field() == fpu_register); }
369 bool is_oop() const;
370
371 // semantic for fpu- and xmm-registers:
372 // * is_float and is_double return true for xmm_registers
373 // (so is_single_fpu and is_single_xmm are true)
374 // * So you must always check for is_???_xmm prior to is_???_fpu to
375 // distinguish between fpu- and xmm-registers
376
is_stack() const377 bool is_stack() const { validate_type(); return check_value_mask(kind_mask, stack_value); }
is_single_stack() const378 bool is_single_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | single_size); }
is_double_stack() const379 bool is_double_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | double_size); }
380
is_cpu_register() const381 bool is_cpu_register() const { validate_type(); return check_value_mask(kind_mask, cpu_register); }
is_virtual_cpu() const382 bool is_virtual_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register | virtual_mask); }
is_fixed_cpu() const383 bool is_fixed_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register); }
is_single_cpu() const384 bool is_single_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | single_size); }
is_double_cpu() const385 bool is_double_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | double_size); }
386
is_fpu_register() const387 bool is_fpu_register() const { validate_type(); return check_value_mask(kind_mask, fpu_register); }
is_virtual_fpu() const388 bool is_virtual_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register | virtual_mask); }
is_fixed_fpu() const389 bool is_fixed_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register); }
is_single_fpu() const390 bool is_single_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | single_size); }
is_double_fpu() const391 bool is_double_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | double_size); }
392
is_xmm_register() const393 bool is_xmm_register() const { validate_type(); return check_value_mask(kind_mask | is_xmm_mask, fpu_register | is_xmm_mask); }
is_single_xmm() const394 bool is_single_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | single_size | is_xmm_mask); }
is_double_xmm() const395 bool is_double_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | double_size | is_xmm_mask); }
396
397 // fast accessor functions for special bits that do not work for pointers
398 // (in this functions, the check for is_pointer() is omitted)
is_single_word() const399 bool is_single_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, single_size); }
is_double_word() const400 bool is_double_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, double_size); }
is_virtual_register() const401 bool is_virtual_register() const { assert(is_register(), "type check"); return check_value_mask(virtual_mask, virtual_mask); }
is_oop_register() const402 bool is_oop_register() const { assert(is_register() || is_stack(), "type check"); return type_field_valid() == object_type; }
type_register() const403 BasicType type_register() const { assert(is_register() || is_stack(), "type check"); return as_BasicType(type_field_valid()); }
404
is_last_use() const405 bool is_last_use() const { assert(is_register(), "only works for registers"); return (value() & last_use_mask) != 0; }
is_fpu_stack_offset() const406 bool is_fpu_stack_offset() const { assert(is_register(), "only works for registers"); return (value() & is_fpu_stack_offset_mask) != 0; }
make_last_use()407 LIR_Opr make_last_use() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | last_use_mask); }
make_fpu_stack_offset()408 LIR_Opr make_fpu_stack_offset() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | is_fpu_stack_offset_mask); }
409
410
single_stack_ix() const411 int single_stack_ix() const { assert(is_single_stack() && !is_virtual(), "type check"); return (int)data(); }
double_stack_ix() const412 int double_stack_ix() const { assert(is_double_stack() && !is_virtual(), "type check"); return (int)data(); }
cpu_regnr() const413 RegNr cpu_regnr() const { assert(is_single_cpu() && !is_virtual(), "type check"); return (RegNr)data(); }
cpu_regnrLo() const414 RegNr cpu_regnrLo() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
cpu_regnrHi() const415 RegNr cpu_regnrHi() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
fpu_regnr() const416 RegNr fpu_regnr() const { assert(is_single_fpu() && !is_virtual(), "type check"); return (RegNr)data(); }
fpu_regnrLo() const417 RegNr fpu_regnrLo() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
fpu_regnrHi() const418 RegNr fpu_regnrHi() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
xmm_regnr() const419 RegNr xmm_regnr() const { assert(is_single_xmm() && !is_virtual(), "type check"); return (RegNr)data(); }
xmm_regnrLo() const420 RegNr xmm_regnrLo() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
xmm_regnrHi() const421 RegNr xmm_regnrHi() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
vreg_number() const422 int vreg_number() const { assert(is_virtual(), "type check"); return (RegNr)data(); }
423
pointer() const424 LIR_OprPtr* pointer() const { assert(is_pointer(), "type check"); return (LIR_OprPtr*)this; }
as_constant_ptr() const425 LIR_Const* as_constant_ptr() const { return pointer()->as_constant(); }
as_address_ptr() const426 LIR_Address* as_address_ptr() const { return pointer()->as_address(); }
427
428 Register as_register() const;
429 Register as_register_lo() const;
430 Register as_register_hi() const;
431
as_pointer_register()432 Register as_pointer_register() {
433 #ifdef _LP64
434 if (is_double_cpu()) {
435 assert(as_register_lo() == as_register_hi(), "should be a single register");
436 return as_register_lo();
437 }
438 #endif
439 return as_register();
440 }
441
442 FloatRegister as_float_reg () const;
443 FloatRegister as_double_reg () const;
444 #ifdef X86
445 XMMRegister as_xmm_float_reg () const;
446 XMMRegister as_xmm_double_reg() const;
447 // for compatibility with RInfo
fpu() const448 int fpu() const { return lo_reg_half(); }
449 #endif
450
as_jint() const451 jint as_jint() const { return as_constant_ptr()->as_jint(); }
as_jlong() const452 jlong as_jlong() const { return as_constant_ptr()->as_jlong(); }
as_jfloat() const453 jfloat as_jfloat() const { return as_constant_ptr()->as_jfloat(); }
as_jdouble() const454 jdouble as_jdouble() const { return as_constant_ptr()->as_jdouble(); }
as_jobject() const455 jobject as_jobject() const { return as_constant_ptr()->as_jobject(); }
456
457 void print() const PRODUCT_RETURN;
458 void print(outputStream* out) const PRODUCT_RETURN;
459 };
460
461
as_OprType(BasicType type)462 inline LIR_OprDesc::OprType as_OprType(BasicType type) {
463 switch (type) {
464 case T_INT: return LIR_OprDesc::int_type;
465 case T_LONG: return LIR_OprDesc::long_type;
466 case T_FLOAT: return LIR_OprDesc::float_type;
467 case T_DOUBLE: return LIR_OprDesc::double_type;
468 case T_OBJECT:
469 case T_ARRAY: return LIR_OprDesc::object_type;
470 case T_ADDRESS: return LIR_OprDesc::address_type;
471 case T_METADATA: return LIR_OprDesc::metadata_type;
472 case T_ILLEGAL: // fall through
473 default: ShouldNotReachHere(); return LIR_OprDesc::unknown_type;
474 }
475 }
476
as_BasicType(LIR_OprDesc::OprType t)477 inline BasicType as_BasicType(LIR_OprDesc::OprType t) {
478 switch (t) {
479 case LIR_OprDesc::int_type: return T_INT;
480 case LIR_OprDesc::long_type: return T_LONG;
481 case LIR_OprDesc::float_type: return T_FLOAT;
482 case LIR_OprDesc::double_type: return T_DOUBLE;
483 case LIR_OprDesc::object_type: return T_OBJECT;
484 case LIR_OprDesc::address_type: return T_ADDRESS;
485 case LIR_OprDesc::metadata_type:return T_METADATA;
486 case LIR_OprDesc::unknown_type: // fall through
487 default: ShouldNotReachHere(); return T_ILLEGAL;
488 }
489 }
490
491
492 // LIR_Address
493 class LIR_Address: public LIR_OprPtr {
494 friend class LIR_OpVisitState;
495
496 public:
497 // NOTE: currently these must be the log2 of the scale factor (and
498 // must also be equivalent to the ScaleFactor enum in
499 // assembler_i486.hpp)
500 enum Scale {
501 times_1 = 0,
502 times_2 = 1,
503 times_4 = 2,
504 times_8 = 3
505 };
506
507 private:
508 LIR_Opr _base;
509 LIR_Opr _index;
510 Scale _scale;
511 intx _disp;
512 BasicType _type;
513
514 public:
LIR_Address(LIR_Opr base,LIR_Opr index,BasicType type)515 LIR_Address(LIR_Opr base, LIR_Opr index, BasicType type):
516 _base(base)
517 , _index(index)
518 , _scale(times_1)
519 , _disp(0)
520 , _type(type) { verify(); }
521
LIR_Address(LIR_Opr base,intx disp,BasicType type)522 LIR_Address(LIR_Opr base, intx disp, BasicType type):
523 _base(base)
524 , _index(LIR_OprDesc::illegalOpr())
525 , _scale(times_1)
526 , _disp(disp)
527 , _type(type) { verify(); }
528
LIR_Address(LIR_Opr base,BasicType type)529 LIR_Address(LIR_Opr base, BasicType type):
530 _base(base)
531 , _index(LIR_OprDesc::illegalOpr())
532 , _scale(times_1)
533 , _disp(0)
534 , _type(type) { verify(); }
535
LIR_Address(LIR_Opr base,LIR_Opr index,intx disp,BasicType type)536 LIR_Address(LIR_Opr base, LIR_Opr index, intx disp, BasicType type):
537 _base(base)
538 , _index(index)
539 , _scale(times_1)
540 , _disp(disp)
541 , _type(type) { verify(); }
542
LIR_Address(LIR_Opr base,LIR_Opr index,Scale scale,intx disp,BasicType type)543 LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, intx disp, BasicType type):
544 _base(base)
545 , _index(index)
546 , _scale(scale)
547 , _disp(disp)
548 , _type(type) { verify(); }
549
base() const550 LIR_Opr base() const { return _base; }
index() const551 LIR_Opr index() const { return _index; }
scale() const552 Scale scale() const { return _scale; }
disp() const553 intx disp() const { return _disp; }
554
equals(LIR_Address * other) const555 bool equals(LIR_Address* other) const { return base() == other->base() && index() == other->index() && disp() == other->disp() && scale() == other->scale(); }
556
as_address()557 virtual LIR_Address* as_address() { return this; }
type() const558 virtual BasicType type() const { return _type; }
559 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
560
561 void verify() const PRODUCT_RETURN;
562
563 static Scale scale(BasicType type);
564 };
565
566
567 // operand factory
568 class LIR_OprFact: public AllStatic {
569 public:
570
571 static LIR_Opr illegalOpr;
572
single_cpu(int reg)573 static LIR_Opr single_cpu(int reg) {
574 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
575 LIR_OprDesc::int_type |
576 LIR_OprDesc::cpu_register |
577 LIR_OprDesc::single_size);
578 }
single_cpu_oop(int reg)579 static LIR_Opr single_cpu_oop(int reg) {
580 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
581 LIR_OprDesc::object_type |
582 LIR_OprDesc::cpu_register |
583 LIR_OprDesc::single_size);
584 }
single_cpu_address(int reg)585 static LIR_Opr single_cpu_address(int reg) {
586 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
587 LIR_OprDesc::address_type |
588 LIR_OprDesc::cpu_register |
589 LIR_OprDesc::single_size);
590 }
single_cpu_metadata(int reg)591 static LIR_Opr single_cpu_metadata(int reg) {
592 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
593 LIR_OprDesc::metadata_type |
594 LIR_OprDesc::cpu_register |
595 LIR_OprDesc::single_size);
596 }
double_cpu(int reg1,int reg2)597 static LIR_Opr double_cpu(int reg1, int reg2) {
598 LP64_ONLY(assert(reg1 == reg2, "must be identical"));
599 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
600 (reg2 << LIR_OprDesc::reg2_shift) |
601 LIR_OprDesc::long_type |
602 LIR_OprDesc::cpu_register |
603 LIR_OprDesc::double_size);
604 }
605
single_fpu(int reg)606 static LIR_Opr single_fpu(int reg) {
607 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
608 LIR_OprDesc::float_type |
609 LIR_OprDesc::fpu_register |
610 LIR_OprDesc::single_size);
611 }
612
613 // Platform dependant.
614 static LIR_Opr double_fpu(int reg1, int reg2 = -1 /*fnoreg*/);
615
616 #ifdef ARM32
single_softfp(int reg)617 static LIR_Opr single_softfp(int reg) {
618 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
619 LIR_OprDesc::float_type |
620 LIR_OprDesc::cpu_register |
621 LIR_OprDesc::single_size);
622 }
double_softfp(int reg1,int reg2)623 static LIR_Opr double_softfp(int reg1, int reg2) {
624 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
625 (reg2 << LIR_OprDesc::reg2_shift) |
626 LIR_OprDesc::double_type |
627 LIR_OprDesc::cpu_register |
628 LIR_OprDesc::double_size);
629 }
630 #endif // ARM32
631
632 #if defined(X86)
single_xmm(int reg)633 static LIR_Opr single_xmm(int reg) {
634 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
635 LIR_OprDesc::float_type |
636 LIR_OprDesc::fpu_register |
637 LIR_OprDesc::single_size |
638 LIR_OprDesc::is_xmm_mask);
639 }
double_xmm(int reg)640 static LIR_Opr double_xmm(int reg) {
641 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
642 (reg << LIR_OprDesc::reg2_shift) |
643 LIR_OprDesc::double_type |
644 LIR_OprDesc::fpu_register |
645 LIR_OprDesc::double_size |
646 LIR_OprDesc::is_xmm_mask);
647 }
648 #endif // X86
649
virtual_register(int index,BasicType type)650 static LIR_Opr virtual_register(int index, BasicType type) {
651 LIR_Opr res;
652 switch (type) {
653 case T_OBJECT: // fall through
654 case T_ARRAY:
655 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
656 LIR_OprDesc::object_type |
657 LIR_OprDesc::cpu_register |
658 LIR_OprDesc::single_size |
659 LIR_OprDesc::virtual_mask);
660 break;
661
662 case T_METADATA:
663 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
664 LIR_OprDesc::metadata_type|
665 LIR_OprDesc::cpu_register |
666 LIR_OprDesc::single_size |
667 LIR_OprDesc::virtual_mask);
668 break;
669
670 case T_INT:
671 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
672 LIR_OprDesc::int_type |
673 LIR_OprDesc::cpu_register |
674 LIR_OprDesc::single_size |
675 LIR_OprDesc::virtual_mask);
676 break;
677
678 case T_ADDRESS:
679 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
680 LIR_OprDesc::address_type |
681 LIR_OprDesc::cpu_register |
682 LIR_OprDesc::single_size |
683 LIR_OprDesc::virtual_mask);
684 break;
685
686 case T_LONG:
687 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
688 LIR_OprDesc::long_type |
689 LIR_OprDesc::cpu_register |
690 LIR_OprDesc::double_size |
691 LIR_OprDesc::virtual_mask);
692 break;
693
694 #ifdef __SOFTFP__
695 case T_FLOAT:
696 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
697 LIR_OprDesc::float_type |
698 LIR_OprDesc::cpu_register |
699 LIR_OprDesc::single_size |
700 LIR_OprDesc::virtual_mask);
701 break;
702 case T_DOUBLE:
703 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
704 LIR_OprDesc::double_type |
705 LIR_OprDesc::cpu_register |
706 LIR_OprDesc::double_size |
707 LIR_OprDesc::virtual_mask);
708 break;
709 #else // __SOFTFP__
710 case T_FLOAT:
711 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
712 LIR_OprDesc::float_type |
713 LIR_OprDesc::fpu_register |
714 LIR_OprDesc::single_size |
715 LIR_OprDesc::virtual_mask);
716 break;
717
718 case
719 T_DOUBLE: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
720 LIR_OprDesc::double_type |
721 LIR_OprDesc::fpu_register |
722 LIR_OprDesc::double_size |
723 LIR_OprDesc::virtual_mask);
724 break;
725 #endif // __SOFTFP__
726 default: ShouldNotReachHere(); res = illegalOpr;
727 }
728
729 #ifdef ASSERT
730 res->validate_type();
731 assert(res->vreg_number() == index, "conversion check");
732 assert(index >= LIR_OprDesc::vreg_base, "must start at vreg_base");
733 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
734
735 // old-style calculation; check if old and new method are equal
736 LIR_OprDesc::OprType t = as_OprType(type);
737 #ifdef __SOFTFP__
738 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
739 t |
740 LIR_OprDesc::cpu_register |
741 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
742 #else // __SOFTFP__
743 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | t |
744 ((type == T_FLOAT || type == T_DOUBLE) ? LIR_OprDesc::fpu_register : LIR_OprDesc::cpu_register) |
745 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
746 assert(res == old_res, "old and new method not equal");
747 #endif // __SOFTFP__
748 #endif // ASSERT
749
750 return res;
751 }
752
753 // 'index' is computed by FrameMap::local_stack_pos(index); do not use other parameters as
754 // the index is platform independent; a double stack useing indeces 2 and 3 has always
755 // index 2.
stack(int index,BasicType type)756 static LIR_Opr stack(int index, BasicType type) {
757 LIR_Opr res;
758 switch (type) {
759 case T_OBJECT: // fall through
760 case T_ARRAY:
761 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
762 LIR_OprDesc::object_type |
763 LIR_OprDesc::stack_value |
764 LIR_OprDesc::single_size);
765 break;
766
767 case T_METADATA:
768 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
769 LIR_OprDesc::metadata_type |
770 LIR_OprDesc::stack_value |
771 LIR_OprDesc::single_size);
772 break;
773 case T_INT:
774 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
775 LIR_OprDesc::int_type |
776 LIR_OprDesc::stack_value |
777 LIR_OprDesc::single_size);
778 break;
779
780 case T_ADDRESS:
781 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
782 LIR_OprDesc::address_type |
783 LIR_OprDesc::stack_value |
784 LIR_OprDesc::single_size);
785 break;
786
787 case T_LONG:
788 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
789 LIR_OprDesc::long_type |
790 LIR_OprDesc::stack_value |
791 LIR_OprDesc::double_size);
792 break;
793
794 case T_FLOAT:
795 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
796 LIR_OprDesc::float_type |
797 LIR_OprDesc::stack_value |
798 LIR_OprDesc::single_size);
799 break;
800 case T_DOUBLE:
801 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
802 LIR_OprDesc::double_type |
803 LIR_OprDesc::stack_value |
804 LIR_OprDesc::double_size);
805 break;
806
807 default: ShouldNotReachHere(); res = illegalOpr;
808 }
809
810 #ifdef ASSERT
811 assert(index >= 0, "index must be positive");
812 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
813
814 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
815 LIR_OprDesc::stack_value |
816 as_OprType(type) |
817 LIR_OprDesc::size_for(type));
818 assert(res == old_res, "old and new method not equal");
819 #endif
820
821 return res;
822 }
823
intConst(jint i)824 static LIR_Opr intConst(jint i) { return (LIR_Opr)(new LIR_Const(i)); }
longConst(jlong l)825 static LIR_Opr longConst(jlong l) { return (LIR_Opr)(new LIR_Const(l)); }
floatConst(jfloat f)826 static LIR_Opr floatConst(jfloat f) { return (LIR_Opr)(new LIR_Const(f)); }
doubleConst(jdouble d)827 static LIR_Opr doubleConst(jdouble d) { return (LIR_Opr)(new LIR_Const(d)); }
oopConst(jobject o)828 static LIR_Opr oopConst(jobject o) { return (LIR_Opr)(new LIR_Const(o)); }
address(LIR_Address * a)829 static LIR_Opr address(LIR_Address* a) { return (LIR_Opr)a; }
intptrConst(void * p)830 static LIR_Opr intptrConst(void* p) { return (LIR_Opr)(new LIR_Const(p)); }
intptrConst(intptr_t v)831 static LIR_Opr intptrConst(intptr_t v) { return (LIR_Opr)(new LIR_Const((void*)v)); }
illegal()832 static LIR_Opr illegal() { return (LIR_Opr)-1; }
addressConst(jint i)833 static LIR_Opr addressConst(jint i) { return (LIR_Opr)(new LIR_Const(i, true)); }
metadataConst(Metadata * m)834 static LIR_Opr metadataConst(Metadata* m) { return (LIR_Opr)(new LIR_Const(m)); }
835
836 static LIR_Opr value_type(ValueType* type);
837 static LIR_Opr dummy_value_type(ValueType* type);
838 };
839
840
841 //-------------------------------------------------------------------------------
842 // LIR Instructions
843 //-------------------------------------------------------------------------------
844 //
845 // Note:
846 // - every instruction has a result operand
847 // - every instruction has an CodeEmitInfo operand (can be revisited later)
848 // - every instruction has a LIR_OpCode operand
849 // - LIR_OpN, means an instruction that has N input operands
850 //
851 // class hierarchy:
852 //
853 class LIR_Op;
854 class LIR_Op0;
855 class LIR_OpLabel;
856 class LIR_Op1;
857 class LIR_OpBranch;
858 class LIR_OpConvert;
859 class LIR_OpAllocObj;
860 class LIR_OpRoundFP;
861 class LIR_Op2;
862 class LIR_OpDelay;
863 class LIR_Op3;
864 class LIR_OpAllocArray;
865 class LIR_OpCall;
866 class LIR_OpJavaCall;
867 class LIR_OpRTCall;
868 class LIR_OpArrayCopy;
869 class LIR_OpUpdateCRC32;
870 class LIR_OpLock;
871 class LIR_OpTypeCheck;
872 class LIR_OpCompareAndSwap;
873 class LIR_OpProfileCall;
874 class LIR_OpProfileType;
875 #ifdef ASSERT
876 class LIR_OpAssert;
877 #endif
878
879 // LIR operation codes
880 enum LIR_Code {
881 lir_none
882 , begin_op0
883 , lir_word_align
884 , lir_label
885 , lir_nop
886 , lir_backwardbranch_target
887 , lir_std_entry
888 , lir_osr_entry
889 , lir_build_frame
890 , lir_fpop_raw
891 , lir_24bit_FPU
892 , lir_reset_FPU
893 , lir_breakpoint
894 , lir_rtcall
895 , lir_membar
896 , lir_membar_acquire
897 , lir_membar_release
898 , lir_membar_loadload
899 , lir_membar_storestore
900 , lir_membar_loadstore
901 , lir_membar_storeload
902 , lir_get_thread
903 , lir_on_spin_wait
904 , end_op0
905 , begin_op1
906 , lir_fxch
907 , lir_fld
908 , lir_ffree
909 , lir_push
910 , lir_pop
911 , lir_null_check
912 , lir_return
913 , lir_leal
914 , lir_branch
915 , lir_cond_float_branch
916 , lir_move
917 , lir_convert
918 , lir_alloc_object
919 , lir_monaddr
920 , lir_roundfp
921 , lir_safepoint
922 , lir_pack64
923 , lir_unpack64
924 , lir_unwind
925 , end_op1
926 , begin_op2
927 , lir_cmp
928 , lir_cmp_l2i
929 , lir_ucmp_fd2i
930 , lir_cmp_fd2i
931 , lir_cmove
932 , lir_add
933 , lir_sub
934 , lir_mul
935 , lir_mul_strictfp
936 , lir_div
937 , lir_div_strictfp
938 , lir_rem
939 , lir_sqrt
940 , lir_abs
941 , lir_neg
942 , lir_tan
943 , lir_log10
944 , lir_logic_and
945 , lir_logic_or
946 , lir_logic_xor
947 , lir_shl
948 , lir_shr
949 , lir_ushr
950 , lir_alloc_array
951 , lir_throw
952 , lir_xadd
953 , lir_xchg
954 , end_op2
955 , begin_op3
956 , lir_idiv
957 , lir_irem
958 , lir_fmad
959 , lir_fmaf
960 , end_op3
961 , begin_opJavaCall
962 , lir_static_call
963 , lir_optvirtual_call
964 , lir_icvirtual_call
965 , lir_virtual_call
966 , lir_dynamic_call
967 , end_opJavaCall
968 , begin_opArrayCopy
969 , lir_arraycopy
970 , end_opArrayCopy
971 , begin_opUpdateCRC32
972 , lir_updatecrc32
973 , end_opUpdateCRC32
974 , begin_opLock
975 , lir_lock
976 , lir_unlock
977 , end_opLock
978 , begin_delay_slot
979 , lir_delay_slot
980 , end_delay_slot
981 , begin_opTypeCheck
982 , lir_instanceof
983 , lir_checkcast
984 , lir_store_check
985 , end_opTypeCheck
986 , begin_opCompareAndSwap
987 , lir_cas_long
988 , lir_cas_obj
989 , lir_cas_int
990 , end_opCompareAndSwap
991 , begin_opMDOProfile
992 , lir_profile_call
993 , lir_profile_type
994 , end_opMDOProfile
995 , begin_opAssert
996 , lir_assert
997 , end_opAssert
998 };
999
1000
1001 enum LIR_Condition {
1002 lir_cond_equal
1003 , lir_cond_notEqual
1004 , lir_cond_less
1005 , lir_cond_lessEqual
1006 , lir_cond_greaterEqual
1007 , lir_cond_greater
1008 , lir_cond_belowEqual
1009 , lir_cond_aboveEqual
1010 , lir_cond_always
1011 , lir_cond_unknown = -1
1012 };
1013
1014
1015 enum LIR_PatchCode {
1016 lir_patch_none,
1017 lir_patch_low,
1018 lir_patch_high,
1019 lir_patch_normal
1020 };
1021
1022
1023 enum LIR_MoveKind {
1024 lir_move_normal,
1025 lir_move_volatile,
1026 lir_move_unaligned,
1027 lir_move_wide,
1028 lir_move_max_flag
1029 };
1030
1031
1032 // --------------------------------------------------
1033 // LIR_Op
1034 // --------------------------------------------------
1035 class LIR_Op: public CompilationResourceObj {
1036 friend class LIR_OpVisitState;
1037
1038 #ifdef ASSERT
1039 private:
1040 const char * _file;
1041 int _line;
1042 #endif
1043
1044 protected:
1045 LIR_Opr _result;
1046 unsigned short _code;
1047 unsigned short _flags;
1048 CodeEmitInfo* _info;
1049 int _id; // value id for register allocation
1050 int _fpu_pop_count;
1051 Instruction* _source; // for debugging
1052
1053 static void print_condition(outputStream* out, LIR_Condition cond) PRODUCT_RETURN;
1054
1055 protected:
is_in_range(LIR_Code test,LIR_Code start,LIR_Code end)1056 static bool is_in_range(LIR_Code test, LIR_Code start, LIR_Code end) { return start < test && test < end; }
1057
1058 public:
LIR_Op()1059 LIR_Op()
1060 :
1061 #ifdef ASSERT
1062 _file(NULL)
1063 , _line(0),
1064 #endif
1065 _result(LIR_OprFact::illegalOpr)
1066 , _code(lir_none)
1067 , _flags(0)
1068 , _info(NULL)
1069 , _id(-1)
1070 , _fpu_pop_count(0)
1071 , _source(NULL) {}
1072
LIR_Op(LIR_Code code,LIR_Opr result,CodeEmitInfo * info)1073 LIR_Op(LIR_Code code, LIR_Opr result, CodeEmitInfo* info)
1074 :
1075 #ifdef ASSERT
1076 _file(NULL)
1077 , _line(0),
1078 #endif
1079 _result(result)
1080 , _code(code)
1081 , _flags(0)
1082 , _info(info)
1083 , _id(-1)
1084 , _fpu_pop_count(0)
1085 , _source(NULL) {}
1086
info() const1087 CodeEmitInfo* info() const { return _info; }
code() const1088 LIR_Code code() const { return (LIR_Code)_code; }
result_opr() const1089 LIR_Opr result_opr() const { return _result; }
set_result_opr(LIR_Opr opr)1090 void set_result_opr(LIR_Opr opr) { _result = opr; }
1091
1092 #ifdef ASSERT
set_file_and_line(const char * file,int line)1093 void set_file_and_line(const char * file, int line) {
1094 _file = file;
1095 _line = line;
1096 }
1097 #endif
1098
1099 virtual const char * name() const PRODUCT_RETURN0;
1100 virtual void visit(LIR_OpVisitState* state);
1101
id() const1102 int id() const { return _id; }
set_id(int id)1103 void set_id(int id) { _id = id; }
1104
1105 // FPU stack simulation helpers -- only used on Intel
set_fpu_pop_count(int count)1106 void set_fpu_pop_count(int count) { assert(count >= 0 && count <= 1, "currently only 0 and 1 are valid"); _fpu_pop_count = count; }
fpu_pop_count() const1107 int fpu_pop_count() const { return _fpu_pop_count; }
pop_fpu_stack()1108 bool pop_fpu_stack() { return _fpu_pop_count > 0; }
1109
source() const1110 Instruction* source() const { return _source; }
set_source(Instruction * ins)1111 void set_source(Instruction* ins) { _source = ins; }
1112
1113 virtual void emit_code(LIR_Assembler* masm) = 0;
1114 virtual void print_instr(outputStream* out) const = 0;
1115 virtual void print_on(outputStream* st) const PRODUCT_RETURN;
1116
is_patching()1117 virtual bool is_patching() { return false; }
as_OpCall()1118 virtual LIR_OpCall* as_OpCall() { return NULL; }
as_OpJavaCall()1119 virtual LIR_OpJavaCall* as_OpJavaCall() { return NULL; }
as_OpLabel()1120 virtual LIR_OpLabel* as_OpLabel() { return NULL; }
as_OpDelay()1121 virtual LIR_OpDelay* as_OpDelay() { return NULL; }
as_OpLock()1122 virtual LIR_OpLock* as_OpLock() { return NULL; }
as_OpAllocArray()1123 virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; }
as_OpAllocObj()1124 virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; }
as_OpRoundFP()1125 virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; }
as_OpBranch()1126 virtual LIR_OpBranch* as_OpBranch() { return NULL; }
as_OpRTCall()1127 virtual LIR_OpRTCall* as_OpRTCall() { return NULL; }
as_OpConvert()1128 virtual LIR_OpConvert* as_OpConvert() { return NULL; }
as_Op0()1129 virtual LIR_Op0* as_Op0() { return NULL; }
as_Op1()1130 virtual LIR_Op1* as_Op1() { return NULL; }
as_Op2()1131 virtual LIR_Op2* as_Op2() { return NULL; }
as_Op3()1132 virtual LIR_Op3* as_Op3() { return NULL; }
as_OpArrayCopy()1133 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; }
as_OpUpdateCRC32()1134 virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return NULL; }
as_OpTypeCheck()1135 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; }
as_OpCompareAndSwap()1136 virtual LIR_OpCompareAndSwap* as_OpCompareAndSwap() { return NULL; }
as_OpProfileCall()1137 virtual LIR_OpProfileCall* as_OpProfileCall() { return NULL; }
as_OpProfileType()1138 virtual LIR_OpProfileType* as_OpProfileType() { return NULL; }
1139 #ifdef ASSERT
as_OpAssert()1140 virtual LIR_OpAssert* as_OpAssert() { return NULL; }
1141 #endif
1142
verify() const1143 virtual void verify() const {}
1144 };
1145
1146 // for calls
1147 class LIR_OpCall: public LIR_Op {
1148 friend class LIR_OpVisitState;
1149
1150 protected:
1151 address _addr;
1152 LIR_OprList* _arguments;
1153 protected:
LIR_OpCall(LIR_Code code,address addr,LIR_Opr result,LIR_OprList * arguments,CodeEmitInfo * info=NULL)1154 LIR_OpCall(LIR_Code code, address addr, LIR_Opr result,
1155 LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1156 : LIR_Op(code, result, info)
1157 , _addr(addr)
1158 , _arguments(arguments) {}
1159
1160 public:
addr() const1161 address addr() const { return _addr; }
arguments() const1162 const LIR_OprList* arguments() const { return _arguments; }
as_OpCall()1163 virtual LIR_OpCall* as_OpCall() { return this; }
1164 };
1165
1166
1167 // --------------------------------------------------
1168 // LIR_OpJavaCall
1169 // --------------------------------------------------
1170 class LIR_OpJavaCall: public LIR_OpCall {
1171 friend class LIR_OpVisitState;
1172
1173 private:
1174 ciMethod* _method;
1175 LIR_Opr _receiver;
1176 LIR_Opr _method_handle_invoke_SP_save_opr; // Used in LIR_OpVisitState::visit to store the reference to FrameMap::method_handle_invoke_SP_save_opr.
1177
1178 public:
LIR_OpJavaCall(LIR_Code code,ciMethod * method,LIR_Opr receiver,LIR_Opr result,address addr,LIR_OprList * arguments,CodeEmitInfo * info)1179 LIR_OpJavaCall(LIR_Code code, ciMethod* method,
1180 LIR_Opr receiver, LIR_Opr result,
1181 address addr, LIR_OprList* arguments,
1182 CodeEmitInfo* info)
1183 : LIR_OpCall(code, addr, result, arguments, info)
1184 , _method(method)
1185 , _receiver(receiver)
1186 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr)
1187 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
1188
LIR_OpJavaCall(LIR_Code code,ciMethod * method,LIR_Opr receiver,LIR_Opr result,intptr_t vtable_offset,LIR_OprList * arguments,CodeEmitInfo * info)1189 LIR_OpJavaCall(LIR_Code code, ciMethod* method,
1190 LIR_Opr receiver, LIR_Opr result, intptr_t vtable_offset,
1191 LIR_OprList* arguments, CodeEmitInfo* info)
1192 : LIR_OpCall(code, (address)vtable_offset, result, arguments, info)
1193 , _method(method)
1194 , _receiver(receiver)
1195 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr)
1196 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
1197
receiver() const1198 LIR_Opr receiver() const { return _receiver; }
method() const1199 ciMethod* method() const { return _method; }
1200
1201 // JSR 292 support.
is_invokedynamic() const1202 bool is_invokedynamic() const { return code() == lir_dynamic_call; }
is_method_handle_invoke() const1203 bool is_method_handle_invoke() const {
1204 return method()->is_compiled_lambda_form() || // Java-generated lambda form
1205 method()->is_method_handle_intrinsic(); // JVM-generated MH intrinsic
1206 }
1207
vtable_offset() const1208 intptr_t vtable_offset() const {
1209 assert(_code == lir_virtual_call, "only have vtable for real vcall");
1210 return (intptr_t) addr();
1211 }
1212
1213 virtual void emit_code(LIR_Assembler* masm);
as_OpJavaCall()1214 virtual LIR_OpJavaCall* as_OpJavaCall() { return this; }
1215 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1216 };
1217
1218 // --------------------------------------------------
1219 // LIR_OpLabel
1220 // --------------------------------------------------
1221 // Location where a branch can continue
1222 class LIR_OpLabel: public LIR_Op {
1223 friend class LIR_OpVisitState;
1224
1225 private:
1226 Label* _label;
1227 public:
LIR_OpLabel(Label * lbl)1228 LIR_OpLabel(Label* lbl)
1229 : LIR_Op(lir_label, LIR_OprFact::illegalOpr, NULL)
1230 , _label(lbl) {}
label() const1231 Label* label() const { return _label; }
1232
1233 virtual void emit_code(LIR_Assembler* masm);
as_OpLabel()1234 virtual LIR_OpLabel* as_OpLabel() { return this; }
1235 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1236 };
1237
1238 // LIR_OpArrayCopy
1239 class LIR_OpArrayCopy: public LIR_Op {
1240 friend class LIR_OpVisitState;
1241
1242 private:
1243 ArrayCopyStub* _stub;
1244 LIR_Opr _src;
1245 LIR_Opr _src_pos;
1246 LIR_Opr _dst;
1247 LIR_Opr _dst_pos;
1248 LIR_Opr _length;
1249 LIR_Opr _tmp;
1250 ciArrayKlass* _expected_type;
1251 int _flags;
1252
1253 public:
1254 enum Flags {
1255 src_null_check = 1 << 0,
1256 dst_null_check = 1 << 1,
1257 src_pos_positive_check = 1 << 2,
1258 dst_pos_positive_check = 1 << 3,
1259 length_positive_check = 1 << 4,
1260 src_range_check = 1 << 5,
1261 dst_range_check = 1 << 6,
1262 type_check = 1 << 7,
1263 overlapping = 1 << 8,
1264 unaligned = 1 << 9,
1265 src_objarray = 1 << 10,
1266 dst_objarray = 1 << 11,
1267 all_flags = (1 << 12) - 1
1268 };
1269
1270 LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp,
1271 ciArrayKlass* expected_type, int flags, CodeEmitInfo* info);
1272
src() const1273 LIR_Opr src() const { return _src; }
src_pos() const1274 LIR_Opr src_pos() const { return _src_pos; }
dst() const1275 LIR_Opr dst() const { return _dst; }
dst_pos() const1276 LIR_Opr dst_pos() const { return _dst_pos; }
length() const1277 LIR_Opr length() const { return _length; }
tmp() const1278 LIR_Opr tmp() const { return _tmp; }
flags() const1279 int flags() const { return _flags; }
expected_type() const1280 ciArrayKlass* expected_type() const { return _expected_type; }
stub() const1281 ArrayCopyStub* stub() const { return _stub; }
1282
1283 virtual void emit_code(LIR_Assembler* masm);
as_OpArrayCopy()1284 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return this; }
1285 void print_instr(outputStream* out) const PRODUCT_RETURN;
1286 };
1287
1288 // LIR_OpUpdateCRC32
1289 class LIR_OpUpdateCRC32: public LIR_Op {
1290 friend class LIR_OpVisitState;
1291
1292 private:
1293 LIR_Opr _crc;
1294 LIR_Opr _val;
1295
1296 public:
1297
1298 LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res);
1299
crc() const1300 LIR_Opr crc() const { return _crc; }
val() const1301 LIR_Opr val() const { return _val; }
1302
1303 virtual void emit_code(LIR_Assembler* masm);
as_OpUpdateCRC32()1304 virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return this; }
1305 void print_instr(outputStream* out) const PRODUCT_RETURN;
1306 };
1307
1308 // --------------------------------------------------
1309 // LIR_Op0
1310 // --------------------------------------------------
1311 class LIR_Op0: public LIR_Op {
1312 friend class LIR_OpVisitState;
1313
1314 public:
LIR_Op0(LIR_Code code)1315 LIR_Op0(LIR_Code code)
1316 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
LIR_Op0(LIR_Code code,LIR_Opr result,CodeEmitInfo * info=NULL)1317 LIR_Op0(LIR_Code code, LIR_Opr result, CodeEmitInfo* info = NULL)
1318 : LIR_Op(code, result, info) { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
1319
1320 virtual void emit_code(LIR_Assembler* masm);
as_Op0()1321 virtual LIR_Op0* as_Op0() { return this; }
1322 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1323 };
1324
1325
1326 // --------------------------------------------------
1327 // LIR_Op1
1328 // --------------------------------------------------
1329
1330 class LIR_Op1: public LIR_Op {
1331 friend class LIR_OpVisitState;
1332
1333 protected:
1334 LIR_Opr _opr; // input operand
1335 BasicType _type; // Operand types
1336 LIR_PatchCode _patch; // only required with patchin (NEEDS_CLEANUP: do we want a special instruction for patching?)
1337
1338 static void print_patch_code(outputStream* out, LIR_PatchCode code);
1339
set_kind(LIR_MoveKind kind)1340 void set_kind(LIR_MoveKind kind) {
1341 assert(code() == lir_move, "must be");
1342 _flags = kind;
1343 }
1344
1345 public:
LIR_Op1(LIR_Code code,LIR_Opr opr,LIR_Opr result=LIR_OprFact::illegalOpr,BasicType type=T_ILLEGAL,LIR_PatchCode patch=lir_patch_none,CodeEmitInfo * info=NULL)1346 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result = LIR_OprFact::illegalOpr, BasicType type = T_ILLEGAL, LIR_PatchCode patch = lir_patch_none, CodeEmitInfo* info = NULL)
1347 : LIR_Op(code, result, info)
1348 , _opr(opr)
1349 , _type(type)
1350 , _patch(patch) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1351
LIR_Op1(LIR_Code code,LIR_Opr opr,LIR_Opr result,BasicType type,LIR_PatchCode patch,CodeEmitInfo * info,LIR_MoveKind kind)1352 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result, BasicType type, LIR_PatchCode patch, CodeEmitInfo* info, LIR_MoveKind kind)
1353 : LIR_Op(code, result, info)
1354 , _opr(opr)
1355 , _type(type)
1356 , _patch(patch) {
1357 assert(code == lir_move, "must be");
1358 set_kind(kind);
1359 }
1360
LIR_Op1(LIR_Code code,LIR_Opr opr,CodeEmitInfo * info)1361 LIR_Op1(LIR_Code code, LIR_Opr opr, CodeEmitInfo* info)
1362 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1363 , _opr(opr)
1364 , _type(T_ILLEGAL)
1365 , _patch(lir_patch_none) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1366
in_opr() const1367 LIR_Opr in_opr() const { return _opr; }
patch_code() const1368 LIR_PatchCode patch_code() const { return _patch; }
type() const1369 BasicType type() const { return _type; }
1370
move_kind() const1371 LIR_MoveKind move_kind() const {
1372 assert(code() == lir_move, "must be");
1373 return (LIR_MoveKind)_flags;
1374 }
1375
is_patching()1376 virtual bool is_patching() { return _patch != lir_patch_none; }
1377 virtual void emit_code(LIR_Assembler* masm);
as_Op1()1378 virtual LIR_Op1* as_Op1() { return this; }
1379 virtual const char * name() const PRODUCT_RETURN0;
1380
set_in_opr(LIR_Opr opr)1381 void set_in_opr(LIR_Opr opr) { _opr = opr; }
1382
1383 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1384 virtual void verify() const;
1385 };
1386
1387
1388 // for runtime calls
1389 class LIR_OpRTCall: public LIR_OpCall {
1390 friend class LIR_OpVisitState;
1391
1392 private:
1393 LIR_Opr _tmp;
1394 public:
LIR_OpRTCall(address addr,LIR_Opr tmp,LIR_Opr result,LIR_OprList * arguments,CodeEmitInfo * info=NULL)1395 LIR_OpRTCall(address addr, LIR_Opr tmp,
1396 LIR_Opr result, LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1397 : LIR_OpCall(lir_rtcall, addr, result, arguments, info)
1398 , _tmp(tmp) {}
1399
1400 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1401 virtual void emit_code(LIR_Assembler* masm);
as_OpRTCall()1402 virtual LIR_OpRTCall* as_OpRTCall() { return this; }
1403
tmp() const1404 LIR_Opr tmp() const { return _tmp; }
1405
1406 virtual void verify() const;
1407 };
1408
1409
1410 class LIR_OpBranch: public LIR_Op {
1411 friend class LIR_OpVisitState;
1412
1413 private:
1414 LIR_Condition _cond;
1415 BasicType _type;
1416 Label* _label;
1417 BlockBegin* _block; // if this is a branch to a block, this is the block
1418 BlockBegin* _ublock; // if this is a float-branch, this is the unorderd block
1419 CodeStub* _stub; // if this is a branch to a stub, this is the stub
1420
1421 public:
LIR_OpBranch(LIR_Condition cond,BasicType type,Label * lbl)1422 LIR_OpBranch(LIR_Condition cond, BasicType type, Label* lbl)
1423 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL)
1424 , _cond(cond)
1425 , _type(type)
1426 , _label(lbl)
1427 , _block(NULL)
1428 , _ublock(NULL)
1429 , _stub(NULL) { }
1430
1431 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block);
1432 LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub);
1433
1434 // for unordered comparisons
1435 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock);
1436
cond() const1437 LIR_Condition cond() const { return _cond; }
type() const1438 BasicType type() const { return _type; }
label() const1439 Label* label() const { return _label; }
block() const1440 BlockBegin* block() const { return _block; }
ublock() const1441 BlockBegin* ublock() const { return _ublock; }
stub() const1442 CodeStub* stub() const { return _stub; }
1443
1444 void change_block(BlockBegin* b);
1445 void change_ublock(BlockBegin* b);
1446 void negate_cond();
1447
1448 virtual void emit_code(LIR_Assembler* masm);
as_OpBranch()1449 virtual LIR_OpBranch* as_OpBranch() { return this; }
1450 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1451 };
1452
1453
1454 class ConversionStub;
1455
1456 class LIR_OpConvert: public LIR_Op1 {
1457 friend class LIR_OpVisitState;
1458
1459 private:
1460 Bytecodes::Code _bytecode;
1461 ConversionStub* _stub;
1462
1463 public:
LIR_OpConvert(Bytecodes::Code code,LIR_Opr opr,LIR_Opr result,ConversionStub * stub)1464 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub)
1465 : LIR_Op1(lir_convert, opr, result)
1466 , _bytecode(code)
1467 , _stub(stub) {}
1468
bytecode() const1469 Bytecodes::Code bytecode() const { return _bytecode; }
stub() const1470 ConversionStub* stub() const { return _stub; }
1471
1472 virtual void emit_code(LIR_Assembler* masm);
as_OpConvert()1473 virtual LIR_OpConvert* as_OpConvert() { return this; }
1474 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1475
1476 static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN;
1477 };
1478
1479
1480 // LIR_OpAllocObj
1481 class LIR_OpAllocObj : public LIR_Op1 {
1482 friend class LIR_OpVisitState;
1483
1484 private:
1485 LIR_Opr _tmp1;
1486 LIR_Opr _tmp2;
1487 LIR_Opr _tmp3;
1488 LIR_Opr _tmp4;
1489 int _hdr_size;
1490 int _obj_size;
1491 CodeStub* _stub;
1492 bool _init_check;
1493
1494 public:
LIR_OpAllocObj(LIR_Opr klass,LIR_Opr result,LIR_Opr t1,LIR_Opr t2,LIR_Opr t3,LIR_Opr t4,int hdr_size,int obj_size,bool init_check,CodeStub * stub)1495 LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result,
1496 LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1497 int hdr_size, int obj_size, bool init_check, CodeStub* stub)
1498 : LIR_Op1(lir_alloc_object, klass, result)
1499 , _tmp1(t1)
1500 , _tmp2(t2)
1501 , _tmp3(t3)
1502 , _tmp4(t4)
1503 , _hdr_size(hdr_size)
1504 , _obj_size(obj_size)
1505 , _stub(stub)
1506 , _init_check(init_check) { }
1507
klass() const1508 LIR_Opr klass() const { return in_opr(); }
obj() const1509 LIR_Opr obj() const { return result_opr(); }
tmp1() const1510 LIR_Opr tmp1() const { return _tmp1; }
tmp2() const1511 LIR_Opr tmp2() const { return _tmp2; }
tmp3() const1512 LIR_Opr tmp3() const { return _tmp3; }
tmp4() const1513 LIR_Opr tmp4() const { return _tmp4; }
header_size() const1514 int header_size() const { return _hdr_size; }
object_size() const1515 int object_size() const { return _obj_size; }
init_check() const1516 bool init_check() const { return _init_check; }
stub() const1517 CodeStub* stub() const { return _stub; }
1518
1519 virtual void emit_code(LIR_Assembler* masm);
as_OpAllocObj()1520 virtual LIR_OpAllocObj * as_OpAllocObj () { return this; }
1521 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1522 };
1523
1524
1525 // LIR_OpRoundFP
1526 class LIR_OpRoundFP : public LIR_Op1 {
1527 friend class LIR_OpVisitState;
1528
1529 private:
1530 LIR_Opr _tmp;
1531
1532 public:
LIR_OpRoundFP(LIR_Opr reg,LIR_Opr stack_loc_temp,LIR_Opr result)1533 LIR_OpRoundFP(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result)
1534 : LIR_Op1(lir_roundfp, reg, result)
1535 , _tmp(stack_loc_temp) {}
1536
tmp() const1537 LIR_Opr tmp() const { return _tmp; }
as_OpRoundFP()1538 virtual LIR_OpRoundFP* as_OpRoundFP() { return this; }
1539 void print_instr(outputStream* out) const PRODUCT_RETURN;
1540 };
1541
1542 // LIR_OpTypeCheck
1543 class LIR_OpTypeCheck: public LIR_Op {
1544 friend class LIR_OpVisitState;
1545
1546 private:
1547 LIR_Opr _object;
1548 LIR_Opr _array;
1549 ciKlass* _klass;
1550 LIR_Opr _tmp1;
1551 LIR_Opr _tmp2;
1552 LIR_Opr _tmp3;
1553 bool _fast_check;
1554 CodeEmitInfo* _info_for_patch;
1555 CodeEmitInfo* _info_for_exception;
1556 CodeStub* _stub;
1557 ciMethod* _profiled_method;
1558 int _profiled_bci;
1559 bool _should_profile;
1560
1561 public:
1562 LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
1563 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1564 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub);
1565 LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array,
1566 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception);
1567
object() const1568 LIR_Opr object() const { return _object; }
array() const1569 LIR_Opr array() const { assert(code() == lir_store_check, "not valid"); return _array; }
tmp1() const1570 LIR_Opr tmp1() const { return _tmp1; }
tmp2() const1571 LIR_Opr tmp2() const { return _tmp2; }
tmp3() const1572 LIR_Opr tmp3() const { return _tmp3; }
klass() const1573 ciKlass* klass() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _klass; }
fast_check() const1574 bool fast_check() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _fast_check; }
info_for_patch() const1575 CodeEmitInfo* info_for_patch() const { return _info_for_patch; }
info_for_exception() const1576 CodeEmitInfo* info_for_exception() const { return _info_for_exception; }
stub() const1577 CodeStub* stub() const { return _stub; }
1578
1579 // MethodData* profiling
set_profiled_method(ciMethod * method)1580 void set_profiled_method(ciMethod *method) { _profiled_method = method; }
set_profiled_bci(int bci)1581 void set_profiled_bci(int bci) { _profiled_bci = bci; }
set_should_profile(bool b)1582 void set_should_profile(bool b) { _should_profile = b; }
profiled_method() const1583 ciMethod* profiled_method() const { return _profiled_method; }
profiled_bci() const1584 int profiled_bci() const { return _profiled_bci; }
should_profile() const1585 bool should_profile() const { return _should_profile; }
1586
is_patching()1587 virtual bool is_patching() { return _info_for_patch != NULL; }
1588 virtual void emit_code(LIR_Assembler* masm);
as_OpTypeCheck()1589 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return this; }
1590 void print_instr(outputStream* out) const PRODUCT_RETURN;
1591 };
1592
1593 // LIR_Op2
1594 class LIR_Op2: public LIR_Op {
1595 friend class LIR_OpVisitState;
1596
1597 int _fpu_stack_size; // for sin/cos implementation on Intel
1598
1599 protected:
1600 LIR_Opr _opr1;
1601 LIR_Opr _opr2;
1602 BasicType _type;
1603 LIR_Opr _tmp1;
1604 LIR_Opr _tmp2;
1605 LIR_Opr _tmp3;
1606 LIR_Opr _tmp4;
1607 LIR_Opr _tmp5;
1608 LIR_Condition _condition;
1609
1610 void verify() const;
1611
1612 public:
LIR_Op2(LIR_Code code,LIR_Condition condition,LIR_Opr opr1,LIR_Opr opr2,CodeEmitInfo * info=NULL)1613 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, CodeEmitInfo* info = NULL)
1614 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1615 , _fpu_stack_size(0)
1616 , _opr1(opr1)
1617 , _opr2(opr2)
1618 , _type(T_ILLEGAL)
1619 , _tmp1(LIR_OprFact::illegalOpr)
1620 , _tmp2(LIR_OprFact::illegalOpr)
1621 , _tmp3(LIR_OprFact::illegalOpr)
1622 , _tmp4(LIR_OprFact::illegalOpr)
1623 , _tmp5(LIR_OprFact::illegalOpr)
1624 , _condition(condition) {
1625 assert(code == lir_cmp || code == lir_assert, "code check");
1626 }
1627
LIR_Op2(LIR_Code code,LIR_Condition condition,LIR_Opr opr1,LIR_Opr opr2,LIR_Opr result,BasicType type)1628 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, BasicType type)
1629 : LIR_Op(code, result, NULL)
1630 , _fpu_stack_size(0)
1631 , _opr1(opr1)
1632 , _opr2(opr2)
1633 , _type(type)
1634 , _tmp1(LIR_OprFact::illegalOpr)
1635 , _tmp2(LIR_OprFact::illegalOpr)
1636 , _tmp3(LIR_OprFact::illegalOpr)
1637 , _tmp4(LIR_OprFact::illegalOpr)
1638 , _tmp5(LIR_OprFact::illegalOpr)
1639 , _condition(condition) {
1640 assert(code == lir_cmove, "code check");
1641 assert(type != T_ILLEGAL, "cmove should have type");
1642 }
1643
LIR_Op2(LIR_Code code,LIR_Opr opr1,LIR_Opr opr2,LIR_Opr result=LIR_OprFact::illegalOpr,CodeEmitInfo * info=NULL,BasicType type=T_ILLEGAL)1644 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr,
1645 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1646 : LIR_Op(code, result, info)
1647 , _fpu_stack_size(0)
1648 , _opr1(opr1)
1649 , _opr2(opr2)
1650 , _type(type)
1651 , _tmp1(LIR_OprFact::illegalOpr)
1652 , _tmp2(LIR_OprFact::illegalOpr)
1653 , _tmp3(LIR_OprFact::illegalOpr)
1654 , _tmp4(LIR_OprFact::illegalOpr)
1655 , _tmp5(LIR_OprFact::illegalOpr)
1656 , _condition(lir_cond_unknown) {
1657 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1658 }
1659
LIR_Op2(LIR_Code code,LIR_Opr opr1,LIR_Opr opr2,LIR_Opr result,LIR_Opr tmp1,LIR_Opr tmp2=LIR_OprFact::illegalOpr,LIR_Opr tmp3=LIR_OprFact::illegalOpr,LIR_Opr tmp4=LIR_OprFact::illegalOpr,LIR_Opr tmp5=LIR_OprFact::illegalOpr)1660 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr,
1661 LIR_Opr tmp3 = LIR_OprFact::illegalOpr, LIR_Opr tmp4 = LIR_OprFact::illegalOpr, LIR_Opr tmp5 = LIR_OprFact::illegalOpr)
1662 : LIR_Op(code, result, NULL)
1663 , _fpu_stack_size(0)
1664 , _opr1(opr1)
1665 , _opr2(opr2)
1666 , _type(T_ILLEGAL)
1667 , _tmp1(tmp1)
1668 , _tmp2(tmp2)
1669 , _tmp3(tmp3)
1670 , _tmp4(tmp4)
1671 , _tmp5(tmp5)
1672 , _condition(lir_cond_unknown) {
1673 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1674 }
1675
in_opr1() const1676 LIR_Opr in_opr1() const { return _opr1; }
in_opr2() const1677 LIR_Opr in_opr2() const { return _opr2; }
type() const1678 BasicType type() const { return _type; }
tmp1_opr() const1679 LIR_Opr tmp1_opr() const { return _tmp1; }
tmp2_opr() const1680 LIR_Opr tmp2_opr() const { return _tmp2; }
tmp3_opr() const1681 LIR_Opr tmp3_opr() const { return _tmp3; }
tmp4_opr() const1682 LIR_Opr tmp4_opr() const { return _tmp4; }
tmp5_opr() const1683 LIR_Opr tmp5_opr() const { return _tmp5; }
condition() const1684 LIR_Condition condition() const {
1685 assert(code() == lir_cmp || code() == lir_cmove || code() == lir_assert, "only valid for cmp and cmove and assert"); return _condition;
1686 }
set_condition(LIR_Condition condition)1687 void set_condition(LIR_Condition condition) {
1688 assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); _condition = condition;
1689 }
1690
set_fpu_stack_size(int size)1691 void set_fpu_stack_size(int size) { _fpu_stack_size = size; }
fpu_stack_size() const1692 int fpu_stack_size() const { return _fpu_stack_size; }
1693
set_in_opr1(LIR_Opr opr)1694 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; }
set_in_opr2(LIR_Opr opr)1695 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; }
1696
1697 virtual void emit_code(LIR_Assembler* masm);
as_Op2()1698 virtual LIR_Op2* as_Op2() { return this; }
1699 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1700 };
1701
1702 class LIR_OpAllocArray : public LIR_Op {
1703 friend class LIR_OpVisitState;
1704
1705 private:
1706 LIR_Opr _klass;
1707 LIR_Opr _len;
1708 LIR_Opr _tmp1;
1709 LIR_Opr _tmp2;
1710 LIR_Opr _tmp3;
1711 LIR_Opr _tmp4;
1712 BasicType _type;
1713 CodeStub* _stub;
1714
1715 public:
LIR_OpAllocArray(LIR_Opr klass,LIR_Opr len,LIR_Opr result,LIR_Opr t1,LIR_Opr t2,LIR_Opr t3,LIR_Opr t4,BasicType type,CodeStub * stub)1716 LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, BasicType type, CodeStub* stub)
1717 : LIR_Op(lir_alloc_array, result, NULL)
1718 , _klass(klass)
1719 , _len(len)
1720 , _tmp1(t1)
1721 , _tmp2(t2)
1722 , _tmp3(t3)
1723 , _tmp4(t4)
1724 , _type(type)
1725 , _stub(stub) {}
1726
klass() const1727 LIR_Opr klass() const { return _klass; }
len() const1728 LIR_Opr len() const { return _len; }
obj() const1729 LIR_Opr obj() const { return result_opr(); }
tmp1() const1730 LIR_Opr tmp1() const { return _tmp1; }
tmp2() const1731 LIR_Opr tmp2() const { return _tmp2; }
tmp3() const1732 LIR_Opr tmp3() const { return _tmp3; }
tmp4() const1733 LIR_Opr tmp4() const { return _tmp4; }
type() const1734 BasicType type() const { return _type; }
stub() const1735 CodeStub* stub() const { return _stub; }
1736
1737 virtual void emit_code(LIR_Assembler* masm);
as_OpAllocArray()1738 virtual LIR_OpAllocArray * as_OpAllocArray () { return this; }
1739 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1740 };
1741
1742
1743 class LIR_Op3: public LIR_Op {
1744 friend class LIR_OpVisitState;
1745
1746 private:
1747 LIR_Opr _opr1;
1748 LIR_Opr _opr2;
1749 LIR_Opr _opr3;
1750 public:
LIR_Op3(LIR_Code code,LIR_Opr opr1,LIR_Opr opr2,LIR_Opr opr3,LIR_Opr result,CodeEmitInfo * info=NULL)1751 LIR_Op3(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr result, CodeEmitInfo* info = NULL)
1752 : LIR_Op(code, result, info)
1753 , _opr1(opr1)
1754 , _opr2(opr2)
1755 , _opr3(opr3) { assert(is_in_range(code, begin_op3, end_op3), "code check"); }
in_opr1() const1756 LIR_Opr in_opr1() const { return _opr1; }
in_opr2() const1757 LIR_Opr in_opr2() const { return _opr2; }
in_opr3() const1758 LIR_Opr in_opr3() const { return _opr3; }
1759
1760 virtual void emit_code(LIR_Assembler* masm);
as_Op3()1761 virtual LIR_Op3* as_Op3() { return this; }
1762 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1763 };
1764
1765
1766 //--------------------------------
1767 class LabelObj: public CompilationResourceObj {
1768 private:
1769 Label _label;
1770 public:
LabelObj()1771 LabelObj() {}
label()1772 Label* label() { return &_label; }
1773 };
1774
1775
1776 class LIR_OpLock: public LIR_Op {
1777 friend class LIR_OpVisitState;
1778
1779 private:
1780 LIR_Opr _hdr;
1781 LIR_Opr _obj;
1782 LIR_Opr _lock;
1783 LIR_Opr _scratch;
1784 CodeStub* _stub;
1785 public:
LIR_OpLock(LIR_Code code,LIR_Opr hdr,LIR_Opr obj,LIR_Opr lock,LIR_Opr scratch,CodeStub * stub,CodeEmitInfo * info)1786 LIR_OpLock(LIR_Code code, LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info)
1787 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1788 , _hdr(hdr)
1789 , _obj(obj)
1790 , _lock(lock)
1791 , _scratch(scratch)
1792 , _stub(stub) {}
1793
hdr_opr() const1794 LIR_Opr hdr_opr() const { return _hdr; }
obj_opr() const1795 LIR_Opr obj_opr() const { return _obj; }
lock_opr() const1796 LIR_Opr lock_opr() const { return _lock; }
scratch_opr() const1797 LIR_Opr scratch_opr() const { return _scratch; }
stub() const1798 CodeStub* stub() const { return _stub; }
1799
1800 virtual void emit_code(LIR_Assembler* masm);
as_OpLock()1801 virtual LIR_OpLock* as_OpLock() { return this; }
1802 void print_instr(outputStream* out) const PRODUCT_RETURN;
1803 };
1804
1805
1806 class LIR_OpDelay: public LIR_Op {
1807 friend class LIR_OpVisitState;
1808
1809 private:
1810 LIR_Op* _op;
1811
1812 public:
LIR_OpDelay(LIR_Op * op,CodeEmitInfo * info)1813 LIR_OpDelay(LIR_Op* op, CodeEmitInfo* info):
1814 LIR_Op(lir_delay_slot, LIR_OprFact::illegalOpr, info),
1815 _op(op) {
1816 assert(op->code() == lir_nop || LIRFillDelaySlots, "should be filling with nops");
1817 }
1818 virtual void emit_code(LIR_Assembler* masm);
as_OpDelay()1819 virtual LIR_OpDelay* as_OpDelay() { return this; }
1820 void print_instr(outputStream* out) const PRODUCT_RETURN;
delay_op() const1821 LIR_Op* delay_op() const { return _op; }
call_info() const1822 CodeEmitInfo* call_info() const { return info(); }
1823 };
1824
1825 #ifdef ASSERT
1826 // LIR_OpAssert
1827 class LIR_OpAssert : public LIR_Op2 {
1828 friend class LIR_OpVisitState;
1829
1830 private:
1831 const char* _msg;
1832 bool _halt;
1833
1834 public:
LIR_OpAssert(LIR_Condition condition,LIR_Opr opr1,LIR_Opr opr2,const char * msg,bool halt)1835 LIR_OpAssert(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, const char* msg, bool halt)
1836 : LIR_Op2(lir_assert, condition, opr1, opr2)
1837 , _msg(msg)
1838 , _halt(halt) {
1839 }
1840
msg() const1841 const char* msg() const { return _msg; }
halt() const1842 bool halt() const { return _halt; }
1843
1844 virtual void emit_code(LIR_Assembler* masm);
as_OpAssert()1845 virtual LIR_OpAssert* as_OpAssert() { return this; }
1846 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1847 };
1848 #endif
1849
1850 // LIR_OpCompareAndSwap
1851 class LIR_OpCompareAndSwap : public LIR_Op {
1852 friend class LIR_OpVisitState;
1853
1854 private:
1855 LIR_Opr _addr;
1856 LIR_Opr _cmp_value;
1857 LIR_Opr _new_value;
1858 LIR_Opr _tmp1;
1859 LIR_Opr _tmp2;
1860
1861 public:
LIR_OpCompareAndSwap(LIR_Code code,LIR_Opr addr,LIR_Opr cmp_value,LIR_Opr new_value,LIR_Opr t1,LIR_Opr t2,LIR_Opr result)1862 LIR_OpCompareAndSwap(LIR_Code code, LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1863 LIR_Opr t1, LIR_Opr t2, LIR_Opr result)
1864 : LIR_Op(code, result, NULL) // no result, no info
1865 , _addr(addr)
1866 , _cmp_value(cmp_value)
1867 , _new_value(new_value)
1868 , _tmp1(t1)
1869 , _tmp2(t2) { }
1870
addr() const1871 LIR_Opr addr() const { return _addr; }
cmp_value() const1872 LIR_Opr cmp_value() const { return _cmp_value; }
new_value() const1873 LIR_Opr new_value() const { return _new_value; }
tmp1() const1874 LIR_Opr tmp1() const { return _tmp1; }
tmp2() const1875 LIR_Opr tmp2() const { return _tmp2; }
1876
1877 virtual void emit_code(LIR_Assembler* masm);
as_OpCompareAndSwap()1878 virtual LIR_OpCompareAndSwap * as_OpCompareAndSwap () { return this; }
1879 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1880 };
1881
1882 // LIR_OpProfileCall
1883 class LIR_OpProfileCall : public LIR_Op {
1884 friend class LIR_OpVisitState;
1885
1886 private:
1887 ciMethod* _profiled_method;
1888 int _profiled_bci;
1889 ciMethod* _profiled_callee;
1890 LIR_Opr _mdo;
1891 LIR_Opr _recv;
1892 LIR_Opr _tmp1;
1893 ciKlass* _known_holder;
1894
1895 public:
1896 // Destroys recv
LIR_OpProfileCall(ciMethod * profiled_method,int profiled_bci,ciMethod * profiled_callee,LIR_Opr mdo,LIR_Opr recv,LIR_Opr t1,ciKlass * known_holder)1897 LIR_OpProfileCall(ciMethod* profiled_method, int profiled_bci, ciMethod* profiled_callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* known_holder)
1898 : LIR_Op(lir_profile_call, LIR_OprFact::illegalOpr, NULL) // no result, no info
1899 , _profiled_method(profiled_method)
1900 , _profiled_bci(profiled_bci)
1901 , _profiled_callee(profiled_callee)
1902 , _mdo(mdo)
1903 , _recv(recv)
1904 , _tmp1(t1)
1905 , _known_holder(known_holder) { }
1906
profiled_method() const1907 ciMethod* profiled_method() const { return _profiled_method; }
profiled_bci() const1908 int profiled_bci() const { return _profiled_bci; }
profiled_callee() const1909 ciMethod* profiled_callee() const { return _profiled_callee; }
mdo() const1910 LIR_Opr mdo() const { return _mdo; }
recv() const1911 LIR_Opr recv() const { return _recv; }
tmp1() const1912 LIR_Opr tmp1() const { return _tmp1; }
known_holder() const1913 ciKlass* known_holder() const { return _known_holder; }
1914
1915 virtual void emit_code(LIR_Assembler* masm);
as_OpProfileCall()1916 virtual LIR_OpProfileCall* as_OpProfileCall() { return this; }
1917 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
should_profile_receiver_type() const1918 bool should_profile_receiver_type() const {
1919 bool callee_is_static = _profiled_callee->is_loaded() && _profiled_callee->is_static();
1920 Bytecodes::Code bc = _profiled_method->java_code_at_bci(_profiled_bci);
1921 bool call_is_virtual = (bc == Bytecodes::_invokevirtual && !_profiled_callee->can_be_statically_bound()) || bc == Bytecodes::_invokeinterface;
1922 return C1ProfileVirtualCalls && call_is_virtual && !callee_is_static;
1923 }
1924 };
1925
1926 // LIR_OpProfileType
1927 class LIR_OpProfileType : public LIR_Op {
1928 friend class LIR_OpVisitState;
1929
1930 private:
1931 LIR_Opr _mdp;
1932 LIR_Opr _obj;
1933 LIR_Opr _tmp;
1934 ciKlass* _exact_klass; // non NULL if we know the klass statically (no need to load it from _obj)
1935 intptr_t _current_klass; // what the profiling currently reports
1936 bool _not_null; // true if we know statically that _obj cannot be null
1937 bool _no_conflict; // true if we're profling parameters, _exact_klass is not NULL and we know
1938 // _exact_klass it the only possible type for this parameter in any context.
1939
1940 public:
1941 // Destroys recv
LIR_OpProfileType(LIR_Opr mdp,LIR_Opr obj,ciKlass * exact_klass,intptr_t current_klass,LIR_Opr tmp,bool not_null,bool no_conflict)1942 LIR_OpProfileType(LIR_Opr mdp, LIR_Opr obj, ciKlass* exact_klass, intptr_t current_klass, LIR_Opr tmp, bool not_null, bool no_conflict)
1943 : LIR_Op(lir_profile_type, LIR_OprFact::illegalOpr, NULL) // no result, no info
1944 , _mdp(mdp)
1945 , _obj(obj)
1946 , _tmp(tmp)
1947 , _exact_klass(exact_klass)
1948 , _current_klass(current_klass)
1949 , _not_null(not_null)
1950 , _no_conflict(no_conflict) { }
1951
mdp() const1952 LIR_Opr mdp() const { return _mdp; }
obj() const1953 LIR_Opr obj() const { return _obj; }
tmp() const1954 LIR_Opr tmp() const { return _tmp; }
exact_klass() const1955 ciKlass* exact_klass() const { return _exact_klass; }
current_klass() const1956 intptr_t current_klass() const { return _current_klass; }
not_null() const1957 bool not_null() const { return _not_null; }
no_conflict() const1958 bool no_conflict() const { return _no_conflict; }
1959
1960 virtual void emit_code(LIR_Assembler* masm);
as_OpProfileType()1961 virtual LIR_OpProfileType* as_OpProfileType() { return this; }
1962 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1963 };
1964
1965 class LIR_InsertionBuffer;
1966
1967 //--------------------------------LIR_List---------------------------------------------------
1968 // Maintains a list of LIR instructions (one instance of LIR_List per basic block)
1969 // The LIR instructions are appended by the LIR_List class itself;
1970 //
1971 // Notes:
1972 // - all offsets are(should be) in bytes
1973 // - local positions are specified with an offset, with offset 0 being local 0
1974
1975 class LIR_List: public CompilationResourceObj {
1976 private:
1977 LIR_OpList _operations;
1978
1979 Compilation* _compilation;
1980 #ifndef PRODUCT
1981 BlockBegin* _block;
1982 #endif
1983 #ifdef ASSERT
1984 const char * _file;
1985 int _line;
1986 #endif
1987
1988 public:
append(LIR_Op * op)1989 void append(LIR_Op* op) {
1990 if (op->source() == NULL)
1991 op->set_source(_compilation->current_instruction());
1992 #ifndef PRODUCT
1993 if (PrintIRWithLIR) {
1994 _compilation->maybe_print_current_instruction();
1995 op->print(); tty->cr();
1996 }
1997 #endif // PRODUCT
1998
1999 _operations.append(op);
2000
2001 #ifdef ASSERT
2002 op->verify();
2003 op->set_file_and_line(_file, _line);
2004 _file = NULL;
2005 _line = 0;
2006 #endif
2007 }
2008
2009 LIR_List(Compilation* compilation, BlockBegin* block = NULL);
2010
2011 #ifdef ASSERT
2012 void set_file_and_line(const char * file, int line);
2013 #endif
2014
2015 //---------- accessors ---------------
instructions_list()2016 LIR_OpList* instructions_list() { return &_operations; }
length() const2017 int length() const { return _operations.length(); }
at(int i) const2018 LIR_Op* at(int i) const { return _operations.at(i); }
2019
2020 NOT_PRODUCT(BlockBegin* block() const { return _block; });
2021
2022 // insert LIR_Ops in buffer to right places in LIR_List
2023 void append(LIR_InsertionBuffer* buffer);
2024
2025 //---------- mutators ---------------
insert_before(int i,LIR_List * op_list)2026 void insert_before(int i, LIR_List* op_list) { _operations.insert_before(i, op_list->instructions_list()); }
insert_before(int i,LIR_Op * op)2027 void insert_before(int i, LIR_Op* op) { _operations.insert_before(i, op); }
remove_at(int i)2028 void remove_at(int i) { _operations.remove_at(i); }
2029
2030 //---------- printing -------------
2031 void print_instructions() PRODUCT_RETURN;
2032
2033
2034 //---------- instructions -------------
call_opt_virtual(ciMethod * method,LIR_Opr receiver,LIR_Opr result,address dest,LIR_OprList * arguments,CodeEmitInfo * info)2035 void call_opt_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2036 address dest, LIR_OprList* arguments,
2037 CodeEmitInfo* info) {
2038 append(new LIR_OpJavaCall(lir_optvirtual_call, method, receiver, result, dest, arguments, info));
2039 }
call_static(ciMethod * method,LIR_Opr result,address dest,LIR_OprList * arguments,CodeEmitInfo * info)2040 void call_static(ciMethod* method, LIR_Opr result,
2041 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2042 append(new LIR_OpJavaCall(lir_static_call, method, LIR_OprFact::illegalOpr, result, dest, arguments, info));
2043 }
call_icvirtual(ciMethod * method,LIR_Opr receiver,LIR_Opr result,address dest,LIR_OprList * arguments,CodeEmitInfo * info)2044 void call_icvirtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2045 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2046 append(new LIR_OpJavaCall(lir_icvirtual_call, method, receiver, result, dest, arguments, info));
2047 }
call_virtual(ciMethod * method,LIR_Opr receiver,LIR_Opr result,intptr_t vtable_offset,LIR_OprList * arguments,CodeEmitInfo * info)2048 void call_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2049 intptr_t vtable_offset, LIR_OprList* arguments, CodeEmitInfo* info) {
2050 append(new LIR_OpJavaCall(lir_virtual_call, method, receiver, result, vtable_offset, arguments, info));
2051 }
call_dynamic(ciMethod * method,LIR_Opr receiver,LIR_Opr result,address dest,LIR_OprList * arguments,CodeEmitInfo * info)2052 void call_dynamic(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2053 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2054 append(new LIR_OpJavaCall(lir_dynamic_call, method, receiver, result, dest, arguments, info));
2055 }
2056
get_thread(LIR_Opr result)2057 void get_thread(LIR_Opr result) { append(new LIR_Op0(lir_get_thread, result)); }
word_align()2058 void word_align() { append(new LIR_Op0(lir_word_align)); }
membar()2059 void membar() { append(new LIR_Op0(lir_membar)); }
membar_acquire()2060 void membar_acquire() { append(new LIR_Op0(lir_membar_acquire)); }
membar_release()2061 void membar_release() { append(new LIR_Op0(lir_membar_release)); }
membar_loadload()2062 void membar_loadload() { append(new LIR_Op0(lir_membar_loadload)); }
membar_storestore()2063 void membar_storestore() { append(new LIR_Op0(lir_membar_storestore)); }
membar_loadstore()2064 void membar_loadstore() { append(new LIR_Op0(lir_membar_loadstore)); }
membar_storeload()2065 void membar_storeload() { append(new LIR_Op0(lir_membar_storeload)); }
2066
nop()2067 void nop() { append(new LIR_Op0(lir_nop)); }
build_frame()2068 void build_frame() { append(new LIR_Op0(lir_build_frame)); }
2069
std_entry(LIR_Opr receiver)2070 void std_entry(LIR_Opr receiver) { append(new LIR_Op0(lir_std_entry, receiver)); }
osr_entry(LIR_Opr osrPointer)2071 void osr_entry(LIR_Opr osrPointer) { append(new LIR_Op0(lir_osr_entry, osrPointer)); }
2072
on_spin_wait()2073 void on_spin_wait() { append(new LIR_Op0(lir_on_spin_wait)); }
2074
branch_destination(Label * lbl)2075 void branch_destination(Label* lbl) { append(new LIR_OpLabel(lbl)); }
2076
leal(LIR_Opr from,LIR_Opr result_reg,LIR_PatchCode patch_code=lir_patch_none,CodeEmitInfo * info=NULL)2077 void leal(LIR_Opr from, LIR_Opr result_reg, LIR_PatchCode patch_code = lir_patch_none, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_leal, from, result_reg, T_ILLEGAL, patch_code, info)); }
2078
2079 // result is a stack location for old backend and vreg for UseLinearScan
2080 // stack_loc_temp is an illegal register for old backend
roundfp(LIR_Opr reg,LIR_Opr stack_loc_temp,LIR_Opr result)2081 void roundfp(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) { append(new LIR_OpRoundFP(reg, stack_loc_temp, result)); }
unaligned_move(LIR_Address * src,LIR_Opr dst)2082 void unaligned_move(LIR_Address* src, LIR_Opr dst) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
unaligned_move(LIR_Opr src,LIR_Address * dst)2083 void unaligned_move(LIR_Opr src, LIR_Address* dst) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), src->type(), lir_patch_none, NULL, lir_move_unaligned)); }
unaligned_move(LIR_Opr src,LIR_Opr dst)2084 void unaligned_move(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
move(LIR_Opr src,LIR_Opr dst,CodeEmitInfo * info=NULL)2085 void move(LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
move(LIR_Address * src,LIR_Opr dst,CodeEmitInfo * info=NULL)2086 void move(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info)); }
move(LIR_Opr src,LIR_Address * dst,CodeEmitInfo * info=NULL)2087 void move(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info)); }
move_wide(LIR_Address * src,LIR_Opr dst,CodeEmitInfo * info=NULL)2088 void move_wide(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) {
2089 if (UseCompressedOops) {
2090 append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info, lir_move_wide));
2091 } else {
2092 move(src, dst, info);
2093 }
2094 }
move_wide(LIR_Opr src,LIR_Address * dst,CodeEmitInfo * info=NULL)2095 void move_wide(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) {
2096 if (UseCompressedOops) {
2097 append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info, lir_move_wide));
2098 } else {
2099 move(src, dst, info);
2100 }
2101 }
volatile_move(LIR_Opr src,LIR_Opr dst,BasicType type,CodeEmitInfo * info=NULL,LIR_PatchCode patch_code=lir_patch_none)2102 void volatile_move(LIR_Opr src, LIR_Opr dst, BasicType type, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none) { append(new LIR_Op1(lir_move, src, dst, type, patch_code, info, lir_move_volatile)); }
2103
oop2reg(jobject o,LIR_Opr reg)2104 void oop2reg (jobject o, LIR_Opr reg) { assert(reg->type() == T_OBJECT, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg)); }
2105 void oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info);
2106
metadata2reg(Metadata * o,LIR_Opr reg)2107 void metadata2reg (Metadata* o, LIR_Opr reg) { assert(reg->type() == T_METADATA, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg)); }
2108 void klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info);
2109
return_op(LIR_Opr result)2110 void return_op(LIR_Opr result) { append(new LIR_Op1(lir_return, result)); }
2111
safepoint(LIR_Opr tmp,CodeEmitInfo * info)2112 void safepoint(LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op1(lir_safepoint, tmp, info)); }
2113
convert(Bytecodes::Code code,LIR_Opr left,LIR_Opr dst,ConversionStub * stub=NULL)2114 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); }
2115
logical_and(LIR_Opr left,LIR_Opr right,LIR_Opr dst)2116 void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and, left, right, dst)); }
logical_or(LIR_Opr left,LIR_Opr right,LIR_Opr dst)2117 void logical_or (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or, left, right, dst)); }
logical_xor(LIR_Opr left,LIR_Opr right,LIR_Opr dst)2118 void logical_xor (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_xor, left, right, dst)); }
2119
pack64(LIR_Opr src,LIR_Opr dst)2120 void pack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_pack64, src, dst, T_LONG, lir_patch_none, NULL)); }
unpack64(LIR_Opr src,LIR_Opr dst)2121 void unpack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_unpack64, src, dst, T_LONG, lir_patch_none, NULL)); }
2122
2123 void null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null = false);
throw_exception(LIR_Opr exceptionPC,LIR_Opr exceptionOop,CodeEmitInfo * info)2124 void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) {
2125 append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info));
2126 }
unwind_exception(LIR_Opr exceptionOop)2127 void unwind_exception(LIR_Opr exceptionOop) {
2128 append(new LIR_Op1(lir_unwind, exceptionOop));
2129 }
2130
push(LIR_Opr opr)2131 void push(LIR_Opr opr) { append(new LIR_Op1(lir_push, opr)); }
pop(LIR_Opr reg)2132 void pop(LIR_Opr reg) { append(new LIR_Op1(lir_pop, reg)); }
2133
cmp(LIR_Condition condition,LIR_Opr left,LIR_Opr right,CodeEmitInfo * info=NULL)2134 void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) {
2135 append(new LIR_Op2(lir_cmp, condition, left, right, info));
2136 }
cmp(LIR_Condition condition,LIR_Opr left,int right,CodeEmitInfo * info=NULL)2137 void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) {
2138 cmp(condition, left, LIR_OprFact::intConst(right), info);
2139 }
2140
2141 void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info);
2142 void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info);
2143
cmove(LIR_Condition condition,LIR_Opr src1,LIR_Opr src2,LIR_Opr dst,BasicType type)2144 void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) {
2145 append(new LIR_Op2(lir_cmove, condition, src1, src2, dst, type));
2146 }
2147
2148 void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2149 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2150 void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2151 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2152 void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2153 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2154
abs(LIR_Opr from,LIR_Opr to,LIR_Opr tmp)2155 void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_abs , from, tmp, to)); }
negate(LIR_Opr from,LIR_Opr to,LIR_Opr tmp=LIR_OprFact::illegalOpr)2156 void negate(LIR_Opr from, LIR_Opr to, LIR_Opr tmp = LIR_OprFact::illegalOpr) { append(new LIR_Op2(lir_neg, from, tmp, to)); }
sqrt(LIR_Opr from,LIR_Opr to,LIR_Opr tmp)2157 void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_sqrt, from, tmp, to)); }
fmad(LIR_Opr from,LIR_Opr from1,LIR_Opr from2,LIR_Opr to)2158 void fmad(LIR_Opr from, LIR_Opr from1, LIR_Opr from2, LIR_Opr to) { append(new LIR_Op3(lir_fmad, from, from1, from2, to)); }
fmaf(LIR_Opr from,LIR_Opr from1,LIR_Opr from2,LIR_Opr to)2159 void fmaf(LIR_Opr from, LIR_Opr from1, LIR_Opr from2, LIR_Opr to) { append(new LIR_Op3(lir_fmaf, from, from1, from2, to)); }
log10(LIR_Opr from,LIR_Opr to,LIR_Opr tmp)2160 void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); }
tan(LIR_Opr from,LIR_Opr to,LIR_Opr tmp1,LIR_Opr tmp2)2161 void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); }
2162
add(LIR_Opr left,LIR_Opr right,LIR_Opr res)2163 void add (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_add, left, right, res)); }
sub(LIR_Opr left,LIR_Opr right,LIR_Opr res,CodeEmitInfo * info=NULL)2164