1 /* 2 * Copyright (c) 1997, 2020, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #ifndef SHARE_OPTO_MACHNODE_HPP 26 #define SHARE_OPTO_MACHNODE_HPP 27 28 #include "opto/callnode.hpp" 29 #include "opto/constantTable.hpp" 30 #include "opto/matcher.hpp" 31 #include "opto/multnode.hpp" 32 #include "opto/node.hpp" 33 #include "opto/regmask.hpp" 34 #include "utilities/growableArray.hpp" 35 36 class BiasedLockingCounters; 37 class BufferBlob; 38 class CodeBuffer; 39 class JVMState; 40 class MachCallDynamicJavaNode; 41 class MachCallJavaNode; 42 class MachCallLeafNode; 43 class MachCallNativeNode; 44 class MachCallNode; 45 class MachCallRuntimeNode; 46 class MachCallStaticJavaNode; 47 class MachEpilogNode; 48 class MachIfNode; 49 class MachNullCheckNode; 50 class MachOper; 51 class MachProjNode; 52 class MachPrologNode; 53 class MachReturnNode; 54 class MachSafePointNode; 55 class MachSpillCopyNode; 56 class Matcher; 57 class PhaseRegAlloc; 58 class RegMask; 59 class RTMLockingCounters; 60 class State; 61 62 //---------------------------MachOper------------------------------------------ 63 class MachOper : public ResourceObj { 64 public: 65 // Allocate right next to the MachNodes in the same arena operator new(size_t x)66 void *operator new(size_t x) throw() { 67 Compile* C = Compile::current(); 68 return C->node_arena()->Amalloc_D(x); 69 } 70 71 // Opcode 72 virtual uint opcode() const = 0; 73 74 // Number of input edges. 75 // Generally at least 1 num_edges() const76 virtual uint num_edges() const { return 1; } 77 // Array of Register masks 78 virtual const RegMask *in_RegMask(int index) const; 79 80 // Methods to output the encoding of the operand 81 82 // Negate conditional branches. Error for non-branch Nodes 83 virtual void negate(); 84 85 // Return the value requested 86 // result register lookup, corresponding to int_format 87 virtual int reg(PhaseRegAlloc *ra_, const Node *node) const; 88 // input register lookup, corresponding to ext_format 89 virtual int reg(PhaseRegAlloc *ra_, const Node *node, int idx) const; 90 91 // helpers for MacroAssembler generation from ADLC as_Register(PhaseRegAlloc * ra_,const Node * node) const92 Register as_Register(PhaseRegAlloc *ra_, const Node *node) const { 93 return ::as_Register(reg(ra_, node)); 94 } as_Register(PhaseRegAlloc * ra_,const Node * node,int idx) const95 Register as_Register(PhaseRegAlloc *ra_, const Node *node, int idx) const { 96 return ::as_Register(reg(ra_, node, idx)); 97 } as_FloatRegister(PhaseRegAlloc * ra_,const Node * node) const98 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node) const { 99 return ::as_FloatRegister(reg(ra_, node)); 100 } as_FloatRegister(PhaseRegAlloc * ra_,const Node * node,int idx) const101 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { 102 return ::as_FloatRegister(reg(ra_, node, idx)); 103 } 104 105 #if defined(IA32) || defined(AMD64) as_XMMRegister(PhaseRegAlloc * ra_,const Node * node) const106 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node) const { 107 return ::as_XMMRegister(reg(ra_, node)); 108 } as_XMMRegister(PhaseRegAlloc * ra_,const Node * node,int idx) const109 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { 110 return ::as_XMMRegister(reg(ra_, node, idx)); 111 } 112 #endif 113 // CondRegister reg converter 114 #if defined(PPC64) as_ConditionRegister(PhaseRegAlloc * ra_,const Node * node) const115 ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node) const { 116 return ::as_ConditionRegister(reg(ra_, node)); 117 } as_ConditionRegister(PhaseRegAlloc * ra_,const Node * node,int idx) const118 ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { 119 return ::as_ConditionRegister(reg(ra_, node, idx)); 120 } as_VectorRegister(PhaseRegAlloc * ra_,const Node * node) const121 VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node) const { 122 return ::as_VectorRegister(reg(ra_, node)); 123 } as_VectorRegister(PhaseRegAlloc * ra_,const Node * node,int idx) const124 VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { 125 return ::as_VectorRegister(reg(ra_, node, idx)); 126 } as_VectorSRegister(PhaseRegAlloc * ra_,const Node * node) const127 VectorSRegister as_VectorSRegister(PhaseRegAlloc *ra_, const Node *node) const { 128 return ::as_VectorSRegister(reg(ra_, node)); 129 } as_VectorSRegister(PhaseRegAlloc * ra_,const Node * node,int idx) const130 VectorSRegister as_VectorSRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { 131 return ::as_VectorSRegister(reg(ra_, node, idx)); 132 } 133 #endif 134 135 virtual intptr_t constant() const; 136 virtual relocInfo::relocType constant_reloc() const; 137 virtual jdouble constantD() const; 138 virtual jfloat constantF() const; 139 virtual jlong constantL() const; 140 virtual TypeOopPtr *oop() const; 141 virtual int ccode() const; 142 // A zero, default, indicates this value is not needed. 143 // May need to lookup the base register, as done in int_ and ext_format 144 virtual int base (PhaseRegAlloc *ra_, const Node *node, int idx) const; 145 virtual int index(PhaseRegAlloc *ra_, const Node *node, int idx) const; 146 virtual int scale() const; 147 // Parameters needed to support MEMORY_INTERFACE access to stackSlot 148 virtual int disp (PhaseRegAlloc *ra_, const Node *node, int idx) const; 149 // Check for PC-Relative displacement 150 virtual relocInfo::relocType disp_reloc() const; 151 virtual int constant_disp() const; // usu. 0, may return Type::OffsetBot 152 virtual int base_position() const; // base edge position, or -1 153 virtual int index_position() const; // index edge position, or -1 154 155 // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP 156 // Only returns non-null value for x86_32.ad's indOffset32X disp_as_type() const157 virtual const TypePtr *disp_as_type() const { return NULL; } 158 159 // Return the label 160 virtual Label *label() const; 161 162 // Return the method's address 163 virtual intptr_t method() const; 164 165 // Hash and compare over operands are currently identical 166 virtual uint hash() const; 167 virtual bool cmp( const MachOper &oper ) const; 168 169 // Virtual clone, since I do not know how big the MachOper is. 170 virtual MachOper *clone() const = 0; 171 172 // Return ideal Type from simple operands. Fail for complex operands. 173 virtual const Type *type() const; 174 175 // Set an integer offset if we have one, or error otherwise set_con(jint c0)176 virtual void set_con( jint c0 ) { ShouldNotReachHere(); } 177 178 #ifndef PRODUCT 179 // Return name of operand Name() const180 virtual const char *Name() const { return "???";} 181 182 // Methods to output the text version of the operand 183 virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0; 184 virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0; 185 186 virtual void dump_spec(outputStream *st) const; // Print per-operand info 187 188 // Check whether o is a valid oper. notAnOper(const MachOper * o)189 static bool notAnOper(const MachOper *o) { 190 if (o == NULL) return true; 191 if (((intptr_t)o & 1) != 0) return true; 192 if (*(address*)o == badAddress) return true; // kill by Node::destruct 193 return false; 194 } 195 #endif // !PRODUCT 196 }; 197 198 //------------------------------MachNode--------------------------------------- 199 // Base type for all machine specific nodes. All node classes generated by the 200 // ADLC inherit from this class. 201 class MachNode : public Node { 202 public: MachNode()203 MachNode() : Node((uint)0), _barrier(0), _num_opnds(0), _opnds(NULL) { 204 init_class_id(Class_Mach); 205 } 206 // Required boilerplate size_of() const207 virtual uint size_of() const { return sizeof(MachNode); } 208 virtual int Opcode() const; // Always equal to MachNode 209 virtual uint rule() const = 0; // Machine-specific opcode 210 // Number of inputs which come before the first operand. 211 // Generally at least 1, to skip the Control input oper_input_base() const212 virtual uint oper_input_base() const { return 1; } 213 // Position of constant base node in node's inputs. -1 if 214 // no constant base node input. mach_constant_base_node_input() const215 virtual uint mach_constant_base_node_input() const { return (uint)-1; } 216 barrier_data() const217 uint8_t barrier_data() const { return _barrier; } set_barrier_data(uint8_t data)218 void set_barrier_data(uint8_t data) { _barrier = data; } 219 220 // Copy inputs and operands to new node of instruction. 221 // Called from cisc_version() and short_branch_version(). 222 // !!!! The method's body is defined in ad_<arch>.cpp file. 223 void fill_new_machnode(MachNode *n) const; 224 225 // Return an equivalent instruction using memory for cisc_operand position 226 virtual MachNode *cisc_version(int offset); 227 // Modify this instruction's register mask to use stack version for cisc_operand 228 virtual void use_cisc_RegMask(); 229 230 // Support for short branches may_be_short_branch() const231 bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; } 232 233 // Avoid back to back some instructions on some CPUs. 234 enum AvoidBackToBackFlag { AVOID_NONE = 0, 235 AVOID_BEFORE = Flag_avoid_back_to_back_before, 236 AVOID_AFTER = Flag_avoid_back_to_back_after, 237 AVOID_BEFORE_AND_AFTER = AVOID_BEFORE | AVOID_AFTER }; 238 avoid_back_to_back(AvoidBackToBackFlag flag_value) const239 bool avoid_back_to_back(AvoidBackToBackFlag flag_value) const { 240 return (flags() & flag_value) == flag_value; 241 } 242 243 // instruction implemented with a call has_call() const244 bool has_call() const { return (flags() & Flag_has_call) != 0; } 245 246 // First index in _in[] corresponding to operand, or -1 if there is none 247 int operand_index(uint operand) const; 248 int operand_index(const MachOper *oper) const; 249 int operand_index(Node* m) const; 250 251 // Register class input is expected in 252 virtual const RegMask &in_RegMask(uint) const; 253 254 // cisc-spillable instructions redefine for use by in_RegMask cisc_RegMask() const255 virtual const RegMask *cisc_RegMask() const { return NULL; } 256 257 // If this instruction is a 2-address instruction, then return the 258 // index of the input which must match the output. Not nessecary 259 // for instructions which bind the input and output register to the 260 // same singleton regiser (e.g., Intel IDIV which binds AX to be 261 // both an input and an output). It is nessecary when the input and 262 // output have choices - but they must use the same choice. two_adr() const263 virtual uint two_adr( ) const { return 0; } 264 265 // The GC might require some barrier metadata for machine code emission. 266 uint8_t _barrier; 267 268 // Array of complex operand pointers. Each corresponds to zero or 269 // more leafs. Must be set by MachNode constructor to point to an 270 // internal array of MachOpers. The MachOper array is sized by 271 // specific MachNodes described in the ADL. 272 uint _num_opnds; 273 MachOper **_opnds; num_opnds() const274 uint num_opnds() const { return _num_opnds; } 275 276 // Emit bytes into cbuf 277 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; 278 // Expand node after register allocation. 279 // Node is replaced by several nodes in the postalloc expand phase. 280 // Corresponding methods are generated for nodes if they specify 281 // postalloc_expand. See block.cpp for more documentation. requires_postalloc_expand() const282 virtual bool requires_postalloc_expand() const { return false; } 283 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_); 284 // Size of instruction in bytes 285 virtual uint size(PhaseRegAlloc *ra_) const; 286 // Helper function that computes size by emitting code 287 virtual uint emit_size(PhaseRegAlloc *ra_) const; 288 289 // Return the alignment required (in units of relocInfo::addr_unit()) 290 // for this instruction (must be a power of 2) 291 int pd_alignment_required() const; alignment_required() const292 virtual int alignment_required() const { return pd_alignment_required(); } 293 294 // Return the padding (in bytes) to be emitted before this 295 // instruction to properly align it. 296 virtual int compute_padding(int current_offset) const; 297 298 // Return number of relocatable values contained in this instruction reloc() const299 virtual int reloc() const { return 0; } 300 301 // Return number of words used for double constants in this instruction ins_num_consts() const302 virtual int ins_num_consts() const { return 0; } 303 304 // Hash and compare over operands. Used to do GVN on machine Nodes. 305 virtual uint hash() const; 306 virtual bool cmp( const Node &n ) const; 307 308 // Expand method for MachNode, replaces nodes representing pseudo 309 // instructions with a set of nodes which represent real machine 310 // instructions and compute the same value. Expand(State *,Node_List & proj_list,Node * mem)311 virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; } 312 313 // Bottom_type call; value comes from operand0 bottom_type() const314 virtual const class Type *bottom_type() const { return _opnds[0]->type(); } ideal_reg() const315 virtual uint ideal_reg() const { 316 const Type *t = _opnds[0]->type(); 317 if (t == TypeInt::CC) { 318 return Op_RegFlags; 319 } else { 320 return t->ideal_reg(); 321 } 322 } 323 324 // If this is a memory op, return the base pointer and fixed offset. 325 // If there are no such, return NULL. If there are multiple addresses 326 // or the address is indeterminate (rare cases) then return (Node*)-1, 327 // which serves as node bottom. 328 // If the offset is not statically determined, set it to Type::OffsetBot. 329 // This method is free to ignore stack slots if that helps. 330 #define TYPE_PTR_SENTINAL ((const TypePtr*)-1) 331 // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible 332 const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const; 333 334 // Helper for get_base_and_disp: find the base and index input nodes. 335 // Returns the MachOper as determined by memory_operand(), for use, if 336 // needed by the caller. If (MachOper *)-1 is returned, base and index 337 // are set to NodeSentinel. If (MachOper *) NULL is returned, base and 338 // index are set to NULL. 339 const MachOper* memory_inputs(Node* &base, Node* &index) const; 340 341 // Helper for memory_inputs: Which operand carries the necessary info? 342 // By default, returns NULL, which means there is no such operand. 343 // If it returns (MachOper*)-1, this means there are multiple memories. memory_operand() const344 virtual const MachOper* memory_operand() const { return NULL; } 345 346 // Call "get_base_and_disp" to decide which category of memory is used here. 347 virtual const class TypePtr *adr_type() const; 348 349 // Apply peephole rule(s) to this instruction 350 virtual MachNode *peephole(Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted); 351 352 // Top-level ideal Opcode matched ideal_Opcode() const353 virtual int ideal_Opcode() const { return Op_Node; } 354 355 // Adds the label for the case 356 virtual void add_case_label( int switch_val, Label* blockLabel); 357 358 // Set the absolute address for methods 359 virtual void method_set( intptr_t addr ); 360 361 // Should we clone rather than spill this instruction? 362 bool rematerialize() const; 363 364 // Get the pipeline info 365 static const Pipeline *pipeline_class(); 366 virtual const Pipeline *pipeline() const; 367 368 // Returns true if this node is a check that can be implemented with a trap. is_TrapBasedCheckNode() const369 virtual bool is_TrapBasedCheckNode() const { return false; } 370 371 #ifndef PRODUCT 372 virtual const char *Name() const = 0; // Machine-specific name 373 virtual void dump_spec(outputStream *st) const; // Print per-node info 374 void dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual 375 #endif 376 }; 377 378 //------------------------------MachIdealNode---------------------------- 379 // Machine specific versions of nodes that must be defined by user. 380 // These are not converted by matcher from ideal nodes to machine nodes 381 // but are inserted into the code by the compiler. 382 class MachIdealNode : public MachNode { 383 public: MachIdealNode()384 MachIdealNode( ) {} 385 386 // Define the following defaults for non-matched machine nodes oper_input_base() const387 virtual uint oper_input_base() const { return 0; } rule() const388 virtual uint rule() const { return 9999999; } bottom_type() const389 virtual const class Type *bottom_type() const { return _opnds == NULL ? Type::CONTROL : MachNode::bottom_type(); } 390 }; 391 392 //------------------------------MachTypeNode---------------------------- 393 // Machine Nodes that need to retain a known Type. 394 class MachTypeNode : public MachNode { size_of() const395 virtual uint size_of() const { return sizeof(*this); } // Size is bigger 396 public: MachTypeNode()397 MachTypeNode( ) {} 398 const Type *_bottom_type; 399 bottom_type() const400 virtual const class Type *bottom_type() const { return _bottom_type; } 401 #ifndef PRODUCT 402 virtual void dump_spec(outputStream *st) const; 403 #endif 404 }; 405 406 //------------------------------MachBreakpointNode---------------------------- 407 // Machine breakpoint or interrupt Node 408 class MachBreakpointNode : public MachIdealNode { 409 public: MachBreakpointNode()410 MachBreakpointNode( ) {} 411 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; 412 virtual uint size(PhaseRegAlloc *ra_) const; 413 414 #ifndef PRODUCT Name() const415 virtual const char *Name() const { return "Breakpoint"; } 416 virtual void format( PhaseRegAlloc *, outputStream *st ) const; 417 #endif 418 }; 419 420 //------------------------------MachConstantBaseNode-------------------------- 421 // Machine node that represents the base address of the constant table. 422 class MachConstantBaseNode : public MachIdealNode { 423 public: 424 static const RegMask& _out_RegMask; // We need the out_RegMask statically in MachConstantNode::in_RegMask(). 425 426 public: MachConstantBaseNode()427 MachConstantBaseNode() : MachIdealNode() { 428 init_class_id(Class_MachConstantBase); 429 } bottom_type() const430 virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; } ideal_reg() const431 virtual uint ideal_reg() const { return Op_RegP; } oper_input_base() const432 virtual uint oper_input_base() const { return 1; } 433 434 virtual bool requires_postalloc_expand() const; 435 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_); 436 437 virtual void emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const; 438 virtual uint size(PhaseRegAlloc* ra_) const; 439 static_out_RegMask()440 static const RegMask& static_out_RegMask() { return _out_RegMask; } out_RegMask() const441 virtual const RegMask& out_RegMask() const { return static_out_RegMask(); } 442 443 #ifndef PRODUCT Name() const444 virtual const char* Name() const { return "MachConstantBaseNode"; } 445 virtual void format(PhaseRegAlloc*, outputStream* st) const; 446 #endif 447 }; 448 449 //------------------------------MachConstantNode------------------------------- 450 // Machine node that holds a constant which is stored in the constant table. 451 class MachConstantNode : public MachTypeNode { 452 protected: 453 ConstantTable::Constant _constant; // This node's constant. 454 455 public: MachConstantNode()456 MachConstantNode() : MachTypeNode() { 457 init_class_id(Class_MachConstant); 458 } 459 eval_constant(Compile * C)460 virtual void eval_constant(Compile* C) { 461 #ifdef ASSERT 462 tty->print("missing MachConstantNode eval_constant function: "); 463 dump(); 464 #endif 465 ShouldNotCallThis(); 466 } 467 in_RegMask(uint idx) const468 virtual const RegMask &in_RegMask(uint idx) const { 469 if (idx == mach_constant_base_node_input()) 470 return MachConstantBaseNode::static_out_RegMask(); 471 return MachNode::in_RegMask(idx); 472 } 473 474 // Input edge of MachConstantBaseNode. mach_constant_base_node_input() const475 virtual uint mach_constant_base_node_input() const { return req() - 1; } 476 477 int constant_offset(); constant_offset() const478 int constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); } 479 // Unchecked version to avoid assertions in debug output. 480 int constant_offset_unchecked() const; 481 }; 482 483 //------------------------------MachUEPNode----------------------------------- 484 // Machine Unvalidated Entry Point Node 485 class MachUEPNode : public MachIdealNode { 486 public: MachUEPNode()487 MachUEPNode( ) {} 488 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; 489 virtual uint size(PhaseRegAlloc *ra_) const; 490 491 #ifndef PRODUCT Name() const492 virtual const char *Name() const { return "Unvalidated-Entry-Point"; } 493 virtual void format( PhaseRegAlloc *, outputStream *st ) const; 494 #endif 495 }; 496 497 //------------------------------MachPrologNode-------------------------------- 498 // Machine function Prolog Node 499 class MachPrologNode : public MachIdealNode { 500 public: MachPrologNode()501 MachPrologNode( ) {} 502 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; 503 virtual uint size(PhaseRegAlloc *ra_) const; 504 virtual int reloc() const; 505 506 #ifndef PRODUCT Name() const507 virtual const char *Name() const { return "Prolog"; } 508 virtual void format( PhaseRegAlloc *, outputStream *st ) const; 509 #endif 510 }; 511 512 //------------------------------MachEpilogNode-------------------------------- 513 // Machine function Epilog Node 514 class MachEpilogNode : public MachIdealNode { 515 public: MachEpilogNode(bool do_poll=false)516 MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {} 517 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; 518 virtual uint size(PhaseRegAlloc *ra_) const; 519 virtual int reloc() const; 520 virtual const Pipeline *pipeline() const; 521 522 private: 523 bool _do_polling; 524 525 public: do_polling() const526 bool do_polling() const { return _do_polling; } 527 528 #ifndef PRODUCT Name() const529 virtual const char *Name() const { return "Epilog"; } 530 virtual void format( PhaseRegAlloc *, outputStream *st ) const; 531 #endif 532 }; 533 534 //------------------------------MachNopNode----------------------------------- 535 // Machine function Nop Node 536 class MachNopNode : public MachIdealNode { 537 private: 538 int _count; 539 public: MachNopNode()540 MachNopNode( ) : _count(1) {} MachNopNode(int count)541 MachNopNode( int count ) : _count(count) {} 542 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; 543 virtual uint size(PhaseRegAlloc *ra_) const; 544 bottom_type() const545 virtual const class Type *bottom_type() const { return Type::CONTROL; } 546 ideal_Opcode() const547 virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp 548 virtual const Pipeline *pipeline() const; 549 #ifndef PRODUCT Name() const550 virtual const char *Name() const { return "Nop"; } 551 virtual void format( PhaseRegAlloc *, outputStream *st ) const; dump_spec(outputStream * st) const552 virtual void dump_spec(outputStream *st) const { } // No per-operand info 553 #endif 554 }; 555 556 //------------------------------MachSpillCopyNode------------------------------ 557 // Machine SpillCopy Node. Copies 1 or 2 words from any location to any 558 // location (stack or register). 559 class MachSpillCopyNode : public MachIdealNode { 560 public: 561 enum SpillType { 562 TwoAddress, // Inserted when coalescing of a two-address-instruction node and its input fails 563 PhiInput, // Inserted when coalescing of a phi node and its input fails 564 DebugUse, // Inserted as debug info spills to safepoints in non-frequent blocks 565 LoopPhiInput, // Pre-split compares of loop-phis 566 Definition, // An lrg marked as spilled will be spilled to memory right after its definition, 567 // if in high pressure region or the lrg is bound 568 RegToReg, // A register to register move 569 RegToMem, // A register to memory move 570 MemToReg, // A memory to register move 571 PhiLocationDifferToInputLocation, // When coalescing phi nodes in PhaseChaitin::Split(), a move spill is inserted if 572 // the phi and its input resides at different locations (i.e. reg or mem) 573 BasePointerToMem, // Spill base pointer to memory at safepoint 574 InputToRematerialization, // When rematerializing a node we stretch the inputs live ranges, and they might be 575 // stretched beyond a new definition point, therefore we split out new copies instead 576 CallUse, // Spill use at a call 577 Bound // An lrg marked as spill that is bound and needs to be spilled at a use 578 }; 579 private: 580 const RegMask *_in; // RegMask for input 581 const RegMask *_out; // RegMask for output 582 const Type *_type; 583 const SpillType _spill_type; 584 public: MachSpillCopyNode(SpillType spill_type,Node * n,const RegMask & in,const RegMask & out)585 MachSpillCopyNode(SpillType spill_type, Node *n, const RegMask &in, const RegMask &out ) : 586 MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()), _spill_type(spill_type) { 587 init_class_id(Class_MachSpillCopy); 588 init_flags(Flag_is_Copy); 589 add_req(NULL); 590 add_req(n); 591 } size_of() const592 virtual uint size_of() const { return sizeof(*this); } set_out_RegMask(const RegMask & out)593 void set_out_RegMask(const RegMask &out) { _out = &out; } set_in_RegMask(const RegMask & in)594 void set_in_RegMask(const RegMask &in) { _in = ∈ } out_RegMask() const595 virtual const RegMask &out_RegMask() const { return *_out; } in_RegMask(uint) const596 virtual const RegMask &in_RegMask(uint) const { return *_in; } bottom_type() const597 virtual const class Type *bottom_type() const { return _type; } ideal_reg() const598 virtual uint ideal_reg() const { return _type->ideal_reg(); } oper_input_base() const599 virtual uint oper_input_base() const { return 1; } 600 uint implementation( CodeBuffer *cbuf, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const; 601 602 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; 603 virtual uint size(PhaseRegAlloc *ra_) const; 604 605 606 #ifndef PRODUCT spill_type(SpillType st)607 static const char *spill_type(SpillType st) { 608 switch (st) { 609 case TwoAddress: 610 return "TwoAddressSpillCopy"; 611 case PhiInput: 612 return "PhiInputSpillCopy"; 613 case DebugUse: 614 return "DebugUseSpillCopy"; 615 case LoopPhiInput: 616 return "LoopPhiInputSpillCopy"; 617 case Definition: 618 return "DefinitionSpillCopy"; 619 case RegToReg: 620 return "RegToRegSpillCopy"; 621 case RegToMem: 622 return "RegToMemSpillCopy"; 623 case MemToReg: 624 return "MemToRegSpillCopy"; 625 case PhiLocationDifferToInputLocation: 626 return "PhiLocationDifferToInputLocationSpillCopy"; 627 case BasePointerToMem: 628 return "BasePointerToMemSpillCopy"; 629 case InputToRematerialization: 630 return "InputToRematerializationSpillCopy"; 631 case CallUse: 632 return "CallUseSpillCopy"; 633 case Bound: 634 return "BoundSpillCopy"; 635 default: 636 assert(false, "Must have valid spill type"); 637 return "MachSpillCopy"; 638 } 639 } 640 Name() const641 virtual const char *Name() const { 642 return spill_type(_spill_type); 643 } 644 645 virtual void format( PhaseRegAlloc *, outputStream *st ) const; 646 #endif 647 }; 648 649 // MachMergeNode is similar to a PhiNode in a sense it merges multiple values, 650 // however it doesn't have a control input and is more like a MergeMem. 651 // It is inserted after the register allocation is done to ensure that nodes use single 652 // definition of a multidef lrg in a block. 653 class MachMergeNode : public MachIdealNode { 654 public: MachMergeNode(Node * n1)655 MachMergeNode(Node *n1) { 656 init_class_id(Class_MachMerge); 657 add_req(NULL); 658 add_req(n1); 659 } out_RegMask() const660 virtual const RegMask &out_RegMask() const { return in(1)->out_RegMask(); } in_RegMask(uint idx) const661 virtual const RegMask &in_RegMask(uint idx) const { return in(1)->in_RegMask(idx); } bottom_type() const662 virtual const class Type *bottom_type() const { return in(1)->bottom_type(); } ideal_reg() const663 virtual uint ideal_reg() const { return bottom_type()->ideal_reg(); } oper_input_base() const664 virtual uint oper_input_base() const { return 1; } emit(CodeBuffer & cbuf,PhaseRegAlloc * ra_) const665 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const { } size(PhaseRegAlloc * ra_) const666 virtual uint size(PhaseRegAlloc *ra_) const { return 0; } 667 #ifndef PRODUCT Name() const668 virtual const char *Name() const { return "MachMerge"; } 669 #endif 670 }; 671 672 //------------------------------MachBranchNode-------------------------------- 673 // Abstract machine branch Node 674 class MachBranchNode : public MachIdealNode { 675 public: MachBranchNode()676 MachBranchNode() : MachIdealNode() { 677 init_class_id(Class_MachBranch); 678 } 679 virtual void label_set(Label* label, uint block_num) = 0; 680 virtual void save_label(Label** label, uint* block_num) = 0; 681 682 // Support for short branches short_branch_version()683 virtual MachNode *short_branch_version() { return NULL; } 684 pinned() const685 virtual bool pinned() const { return true; }; 686 }; 687 688 //------------------------------MachNullChkNode-------------------------------- 689 // Machine-dependent null-pointer-check Node. Points a real MachNode that is 690 // also some kind of memory op. Turns the indicated MachNode into a 691 // conditional branch with good latency on the ptr-not-null path and awful 692 // latency on the pointer-is-null path. 693 694 class MachNullCheckNode : public MachBranchNode { 695 public: 696 const uint _vidx; // Index of memop being tested MachNullCheckNode(Node * ctrl,Node * memop,uint vidx)697 MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachBranchNode(), _vidx(vidx) { 698 init_class_id(Class_MachNullCheck); 699 add_req(ctrl); 700 add_req(memop); 701 } size_of() const702 virtual uint size_of() const { return sizeof(*this); } 703 704 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; 705 virtual void label_set(Label* label, uint block_num); 706 virtual void save_label(Label** label, uint* block_num); negate()707 virtual void negate() { } bottom_type() const708 virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; } ideal_reg() const709 virtual uint ideal_reg() const { return NotAMachineReg; } 710 virtual const RegMask &in_RegMask(uint) const; out_RegMask() const711 virtual const RegMask &out_RegMask() const { return RegMask::Empty; } 712 #ifndef PRODUCT Name() const713 virtual const char *Name() const { return "NullCheck"; } 714 virtual void format( PhaseRegAlloc *, outputStream *st ) const; 715 #endif 716 }; 717 718 //------------------------------MachProjNode---------------------------------- 719 // Machine-dependent Ideal projections (how is that for an oxymoron). Really 720 // just MachNodes made by the Ideal world that replicate simple projections 721 // but with machine-dependent input & output register masks. Generally 722 // produced as part of calling conventions. Normally I make MachNodes as part 723 // of the Matcher process, but the Matcher is ill suited to issues involving 724 // frame handling, so frame handling is all done in the Ideal world with 725 // occasional callbacks to the machine model for important info. 726 class MachProjNode : public ProjNode { 727 public: MachProjNode(Node * multi,uint con,const RegMask & out,uint ideal_reg)728 MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) { 729 init_class_id(Class_MachProj); 730 } 731 RegMask _rout; 732 const uint _ideal_reg; 733 enum projType { 734 unmatched_proj = 0, // Projs for Control, I/O, memory not matched 735 fat_proj = 999 // Projs killing many regs, defined by _rout 736 }; 737 virtual int Opcode() const; 738 virtual const Type *bottom_type() const; 739 virtual const TypePtr *adr_type() const; in_RegMask(uint) const740 virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; } out_RegMask() const741 virtual const RegMask &out_RegMask() const { return _rout; } ideal_reg() const742 virtual uint ideal_reg() const { return _ideal_reg; } 743 // Need size_of() for virtual ProjNode::clone() size_of() const744 virtual uint size_of() const { return sizeof(MachProjNode); } 745 #ifndef PRODUCT 746 virtual void dump_spec(outputStream *st) const; 747 #endif 748 }; 749 750 //------------------------------MachIfNode------------------------------------- 751 // Machine-specific versions of IfNodes 752 class MachIfNode : public MachBranchNode { size_of() const753 virtual uint size_of() const { return sizeof(*this); } // Size is bigger 754 public: 755 float _prob; // Probability branch goes either way 756 float _fcnt; // Frequency counter MachIfNode()757 MachIfNode() : MachBranchNode() { 758 init_class_id(Class_MachIf); 759 } 760 // Negate conditional branches. 761 virtual void negate() = 0; 762 #ifndef PRODUCT 763 virtual void dump_spec(outputStream *st) const; 764 #endif 765 }; 766 767 //------------------------------MachJumpNode----------------------------------- 768 // Machine-specific versions of JumpNodes 769 class MachJumpNode : public MachConstantNode { 770 public: 771 float* _probs; MachJumpNode()772 MachJumpNode() : MachConstantNode() { 773 init_class_id(Class_MachJump); 774 } 775 }; 776 777 //------------------------------MachGotoNode----------------------------------- 778 // Machine-specific versions of GotoNodes 779 class MachGotoNode : public MachBranchNode { 780 public: MachGotoNode()781 MachGotoNode() : MachBranchNode() { 782 init_class_id(Class_MachGoto); 783 } 784 }; 785 786 //------------------------------MachFastLockNode------------------------------------- 787 // Machine-specific versions of FastLockNodes 788 class MachFastLockNode : public MachNode { size_of() const789 virtual uint size_of() const { return sizeof(*this); } // Size is bigger 790 public: 791 BiasedLockingCounters* _counters; 792 RTMLockingCounters* _rtm_counters; // RTM lock counters for inflated locks 793 RTMLockingCounters* _stack_rtm_counters; // RTM lock counters for stack locks MachFastLockNode()794 MachFastLockNode() : MachNode() {} 795 }; 796 797 //------------------------------MachReturnNode-------------------------------- 798 // Machine-specific versions of subroutine returns 799 class MachReturnNode : public MachNode { 800 virtual uint size_of() const; // Size is bigger 801 public: 802 RegMask *_in_rms; // Input register masks, set during allocation 803 ReallocMark _nesting; // assertion check for reallocations 804 const TypePtr* _adr_type; // memory effects of call or return MachReturnNode()805 MachReturnNode() : MachNode() { 806 init_class_id(Class_MachReturn); 807 _adr_type = TypePtr::BOTTOM; // the default: all of memory 808 } 809 set_adr_type(const TypePtr * atp)810 void set_adr_type(const TypePtr* atp) { _adr_type = atp; } 811 812 virtual const RegMask &in_RegMask(uint) const; pinned() const813 virtual bool pinned() const { return true; }; 814 virtual const TypePtr *adr_type() const; 815 }; 816 817 //------------------------------MachSafePointNode----------------------------- 818 // Machine-specific versions of safepoints 819 class MachSafePointNode : public MachReturnNode { 820 public: 821 OopMap* _oop_map; // Array of OopMap info (8-bit char) for GC 822 JVMState* _jvms; // Pointer to list of JVM State Objects 823 uint _jvmadj; // Extra delta to jvms indexes (mach. args) 824 bool _has_ea_local_in_scope; // NoEscape or ArgEscape objects in JVM States oop_map() const825 OopMap* oop_map() const { return _oop_map; } set_oop_map(OopMap * om)826 void set_oop_map(OopMap* om) { _oop_map = om; } 827 MachSafePointNode()828 MachSafePointNode() : MachReturnNode(), _oop_map(NULL), _jvms(NULL), _jvmadj(0), _has_ea_local_in_scope(false) { 829 init_class_id(Class_MachSafePoint); 830 } 831 jvms() const832 virtual JVMState* jvms() const { return _jvms; } set_jvms(JVMState * s)833 void set_jvms(JVMState* s) { 834 _jvms = s; 835 } 836 virtual const Type *bottom_type() const; 837 838 virtual const RegMask &in_RegMask(uint) const; 839 840 // Functionality from old debug nodes returnadr() const841 Node *returnadr() const { return in(TypeFunc::ReturnAdr); } frameptr() const842 Node *frameptr () const { return in(TypeFunc::FramePtr); } 843 local(const JVMState * jvms,uint idx) const844 Node *local(const JVMState* jvms, uint idx) const { 845 assert(verify_jvms(jvms), "jvms must match"); 846 return in(_jvmadj + jvms->locoff() + idx); 847 } stack(const JVMState * jvms,uint idx) const848 Node *stack(const JVMState* jvms, uint idx) const { 849 assert(verify_jvms(jvms), "jvms must match"); 850 return in(_jvmadj + jvms->stkoff() + idx); 851 } monitor_obj(const JVMState * jvms,uint idx) const852 Node *monitor_obj(const JVMState* jvms, uint idx) const { 853 assert(verify_jvms(jvms), "jvms must match"); 854 return in(_jvmadj + jvms->monitor_obj_offset(idx)); 855 } monitor_box(const JVMState * jvms,uint idx) const856 Node *monitor_box(const JVMState* jvms, uint idx) const { 857 assert(verify_jvms(jvms), "jvms must match"); 858 return in(_jvmadj + jvms->monitor_box_offset(idx)); 859 } set_local(const JVMState * jvms,uint idx,Node * c)860 void set_local(const JVMState* jvms, uint idx, Node *c) { 861 assert(verify_jvms(jvms), "jvms must match"); 862 set_req(_jvmadj + jvms->locoff() + idx, c); 863 } set_stack(const JVMState * jvms,uint idx,Node * c)864 void set_stack(const JVMState* jvms, uint idx, Node *c) { 865 assert(verify_jvms(jvms), "jvms must match"); 866 set_req(_jvmadj + jvms->stkoff() + idx, c); 867 } set_monitor(const JVMState * jvms,uint idx,Node * c)868 void set_monitor(const JVMState* jvms, uint idx, Node *c) { 869 assert(verify_jvms(jvms), "jvms must match"); 870 set_req(_jvmadj + jvms->monoff() + idx, c); 871 } 872 }; 873 874 //------------------------------MachCallNode---------------------------------- 875 // Machine-specific versions of subroutine calls 876 class MachCallNode : public MachSafePointNode { 877 protected: hash() const878 virtual uint hash() const { return NO_HASH; } // CFG nodes do not hash 879 virtual bool cmp( const Node &n ) const; 880 virtual uint size_of() const = 0; // Size is bigger 881 public: 882 const TypeFunc *_tf; // Function type 883 address _entry_point; // Address of the method being called 884 float _cnt; // Estimate of number of times called 885 bool _guaranteed_safepoint; // Do we need to observe safepoint? 886 tf() const887 const TypeFunc* tf() const { return _tf; } entry_point() const888 const address entry_point() const { return _entry_point; } cnt() const889 const float cnt() const { return _cnt; } 890 set_tf(const TypeFunc * tf)891 void set_tf(const TypeFunc* tf) { _tf = tf; } set_entry_point(address p)892 void set_entry_point(address p) { _entry_point = p; } set_cnt(float c)893 void set_cnt(float c) { _cnt = c; } set_guaranteed_safepoint(bool b)894 void set_guaranteed_safepoint(bool b) { _guaranteed_safepoint = b; } 895 MachCallNode()896 MachCallNode() : MachSafePointNode() { 897 init_class_id(Class_MachCall); 898 } 899 900 virtual const Type *bottom_type() const; pinned() const901 virtual bool pinned() const { return false; } 902 virtual const Type* Value(PhaseGVN* phase) const; 903 virtual const RegMask &in_RegMask(uint) const; ret_addr_offset()904 virtual int ret_addr_offset() { return 0; } 905 returns_long() const906 bool returns_long() const { return tf()->return_type() == T_LONG; } 907 bool return_value_is_used() const; 908 909 // Similar to cousin class CallNode::returns_pointer 910 bool returns_pointer() const; 911 guaranteed_safepoint() const912 bool guaranteed_safepoint() const { return _guaranteed_safepoint; } 913 914 #ifndef PRODUCT 915 virtual void dump_spec(outputStream *st) const; 916 #endif 917 }; 918 919 //------------------------------MachCallJavaNode------------------------------ 920 // "Base" class for machine-specific versions of subroutine calls 921 class MachCallJavaNode : public MachCallNode { 922 protected: 923 virtual bool cmp( const Node &n ) const; 924 virtual uint size_of() const; // Size is bigger 925 public: 926 ciMethod* _method; // Method being direct called 927 bool _override_symbolic_info; // Override symbolic call site info from bytecode 928 int _bci; // Byte Code index of call byte code 929 bool _optimized_virtual; // Tells if node is a static call or an optimized virtual 930 bool _method_handle_invoke; // Tells if the call has to preserve SP 931 bool _arg_escape; // ArgEscape in parameter list MachCallJavaNode()932 MachCallJavaNode() : MachCallNode(), _override_symbolic_info(false) { 933 init_class_id(Class_MachCallJava); 934 } 935 936 virtual const RegMask &in_RegMask(uint) const; 937 resolved_method_index(CodeBuffer & cbuf) const938 int resolved_method_index(CodeBuffer &cbuf) const { 939 if (_override_symbolic_info) { 940 // Attach corresponding Method* to the call site, so VM can use it during resolution 941 // instead of querying symbolic info from bytecode. 942 assert(_method != NULL, "method should be set"); 943 assert(_method->constant_encoding()->is_method(), "should point to a Method"); 944 return cbuf.oop_recorder()->find_index(_method->constant_encoding()); 945 } 946 return 0; // Use symbolic info from bytecode (resolved_method == NULL). 947 } 948 949 #ifndef PRODUCT 950 virtual void dump_spec(outputStream *st) const; 951 #endif 952 }; 953 954 //------------------------------MachCallStaticJavaNode------------------------ 955 // Machine-specific versions of monomorphic subroutine calls 956 class MachCallStaticJavaNode : public MachCallJavaNode { 957 virtual bool cmp( const Node &n ) const; 958 virtual uint size_of() const; // Size is bigger 959 public: 960 const char *_name; // Runtime wrapper name MachCallStaticJavaNode()961 MachCallStaticJavaNode() : MachCallJavaNode() { 962 init_class_id(Class_MachCallStaticJava); 963 } 964 965 // If this is an uncommon trap, return the request code, else zero. 966 int uncommon_trap_request() const; 967 968 virtual int ret_addr_offset(); 969 #ifndef PRODUCT 970 virtual void dump_spec(outputStream *st) const; 971 void dump_trap_args(outputStream *st) const; 972 #endif 973 }; 974 975 //------------------------------MachCallDynamicJavaNode------------------------ 976 // Machine-specific versions of possibly megamorphic subroutine calls 977 class MachCallDynamicJavaNode : public MachCallJavaNode { 978 public: 979 int _vtable_index; MachCallDynamicJavaNode()980 MachCallDynamicJavaNode() : MachCallJavaNode() { 981 init_class_id(Class_MachCallDynamicJava); 982 DEBUG_ONLY(_vtable_index = -99); // throw an assert if uninitialized 983 } 984 virtual int ret_addr_offset(); 985 #ifndef PRODUCT 986 virtual void dump_spec(outputStream *st) const; 987 #endif 988 }; 989 990 //------------------------------MachCallRuntimeNode---------------------------- 991 // Machine-specific versions of subroutine calls 992 class MachCallRuntimeNode : public MachCallNode { 993 virtual bool cmp( const Node &n ) const; 994 virtual uint size_of() const; // Size is bigger 995 public: 996 const char *_name; // Printable name, if _method is NULL 997 bool _leaf_no_fp; // Is this CallLeafNoFP? MachCallRuntimeNode()998 MachCallRuntimeNode() : MachCallNode() { 999 init_class_id(Class_MachCallRuntime); 1000 } 1001 virtual int ret_addr_offset(); 1002 #ifndef PRODUCT 1003 virtual void dump_spec(outputStream *st) const; 1004 #endif 1005 }; 1006 1007 class MachCallLeafNode: public MachCallRuntimeNode { 1008 public: MachCallLeafNode()1009 MachCallLeafNode() : MachCallRuntimeNode() { 1010 init_class_id(Class_MachCallLeaf); 1011 } 1012 }; 1013 1014 class MachCallNativeNode: public MachCallNode { 1015 virtual bool cmp( const Node &n ) const; 1016 virtual uint size_of() const; 1017 void print_regs(const GrowableArray<VMReg>& regs, outputStream* st) const; 1018 public: 1019 const char *_name; 1020 GrowableArray<VMReg> _arg_regs; 1021 GrowableArray<VMReg> _ret_regs; 1022 MachCallNativeNode()1023 MachCallNativeNode() : MachCallNode() { 1024 init_class_id(Class_MachCallNative); 1025 } 1026 1027 virtual int ret_addr_offset(); 1028 #ifndef PRODUCT 1029 virtual void dump_spec(outputStream *st) const; 1030 #endif 1031 }; 1032 1033 //------------------------------MachHaltNode----------------------------------- 1034 // Machine-specific versions of halt nodes 1035 class MachHaltNode : public MachReturnNode { 1036 public: 1037 bool _reachable; 1038 const char* _halt_reason; 1039 virtual JVMState* jvms() const; is_reachable() const1040 bool is_reachable() const { 1041 return _reachable; 1042 } 1043 }; 1044 1045 class MachMemBarNode : public MachNode { 1046 virtual uint size_of() const; // Size is bigger 1047 public: 1048 const TypePtr* _adr_type; // memory effects MachMemBarNode()1049 MachMemBarNode() : MachNode() { 1050 init_class_id(Class_MachMemBar); 1051 _adr_type = TypePtr::BOTTOM; // the default: all of memory 1052 } 1053 set_adr_type(const TypePtr * atp)1054 void set_adr_type(const TypePtr* atp) { _adr_type = atp; } 1055 virtual const TypePtr *adr_type() const; 1056 }; 1057 1058 1059 //------------------------------MachTempNode----------------------------------- 1060 // Node used by the adlc to construct inputs to represent temporary registers 1061 class MachTempNode : public MachNode { 1062 private: 1063 MachOper *_opnd_array[1]; 1064 1065 public: out_RegMask() const1066 virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); } rule() const1067 virtual uint rule() const { return 9999999; } emit(CodeBuffer & cbuf,PhaseRegAlloc * ra_) const1068 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {} 1069 MachTempNode(MachOper * oper)1070 MachTempNode(MachOper* oper) { 1071 init_class_id(Class_MachTemp); 1072 _num_opnds = 1; 1073 _opnds = _opnd_array; 1074 add_req(NULL); 1075 _opnds[0] = oper; 1076 } size_of() const1077 virtual uint size_of() const { return sizeof(MachTempNode); } 1078 1079 #ifndef PRODUCT format(PhaseRegAlloc *,outputStream * st) const1080 virtual void format(PhaseRegAlloc *, outputStream *st ) const {} Name() const1081 virtual const char *Name() const { return "MachTemp";} 1082 #endif 1083 }; 1084 1085 1086 1087 //------------------------------labelOper-------------------------------------- 1088 // Machine-independent version of label operand 1089 class labelOper : public MachOper { 1090 private: num_edges() const1091 virtual uint num_edges() const { return 0; } 1092 public: 1093 // Supported for fixed size branches 1094 Label* _label; // Label for branch(es) 1095 1096 uint _block_num; 1097 labelOper()1098 labelOper() : _label(0), _block_num(0) {} 1099 labelOper(Label * label,uint block_num)1100 labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {} 1101 labelOper(labelOper * l)1102 labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {} 1103 1104 virtual MachOper *clone() const; 1105 label() const1106 virtual Label *label() const { assert(_label != NULL, "need Label"); return _label; } 1107 1108 virtual uint opcode() const; 1109 1110 virtual uint hash() const; 1111 virtual bool cmp( const MachOper &oper ) const; 1112 #ifndef PRODUCT Name() const1113 virtual const char *Name() const { return "Label";} 1114 1115 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const; ext_format(PhaseRegAlloc * ra,const MachNode * node,int idx,outputStream * st) const1116 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); } 1117 #endif 1118 }; 1119 1120 1121 //------------------------------methodOper-------------------------------------- 1122 // Machine-independent version of method operand 1123 class methodOper : public MachOper { 1124 private: num_edges() const1125 virtual uint num_edges() const { return 0; } 1126 public: 1127 intptr_t _method; // Address of method methodOper()1128 methodOper() : _method(0) {} methodOper(intptr_t method)1129 methodOper(intptr_t method) : _method(method) {} 1130 1131 virtual MachOper *clone() const; 1132 method() const1133 virtual intptr_t method() const { return _method; } 1134 1135 virtual uint opcode() const; 1136 1137 virtual uint hash() const; 1138 virtual bool cmp( const MachOper &oper ) const; 1139 #ifndef PRODUCT Name() const1140 virtual const char *Name() const { return "Method";} 1141 1142 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const; ext_format(PhaseRegAlloc * ra,const MachNode * node,int idx,outputStream * st) const1143 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); } 1144 #endif 1145 }; 1146 1147 #endif // SHARE_OPTO_MACHNODE_HPP 1148