1  {
2     Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
3
4     @APPLE_LICENSE_HEADER_START@
5
6     The contents of this file constitute Original Code as defined in and
7     are subject to the Apple Public Source License Version 1.1 (the
8     "License").  You may not use this file except in compliance with the
9     License.  Please obtain a copy of the License at
10     http://www.apple.com/publicsource and read it before using this file.
11
12     This Original Code and all software distributed under the License are
13     distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
14     EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
15     INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
16     FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT.  Please see the
17     License for the specific language governing rights and limitations
18     under the License.
19
20     @APPLE_LICENSE_HEADER_END@
21    }
22  {
23     Copyright (c) 1992, 1993 NeXT Computer, Inc.
24
25     HISTORY
26
27        Machine specific signal information.
28
29     HISTORY
30     25-MAR-97  Umesh Vaishampayan (umeshv@NeXT.com)
31        Ported from m98k and hppa.
32
33     13-Jan-92  Peter King (king) at NeXT Computer, Inc.
34        Filled out struct sigcontext to hold all registers.
35        Added regs_saved_t to specify which regs stored in the
36        sigcontext are valid.
37
38     09-Nov-92  Ben Fathi (benf) at NeXT, Inc.
39        Ported to m98k.
40
41     09-May-91  Mike DeMoney (mike) at NeXT, Inc.
42        Ported to m88k.
43    }
44
45{$packrecords C}
46
47  const
48     _PPC_SIGNAL_ = 1;
49
50  type
51
52     sig_atomic_t = longint;
53  {
54     Machine-dependant flags used in sigvec call.
55    }
56  { Save all regs in sigcontext  }
57
58  const
59     SV_SAVE_REGS = $1000;
60  {
61     regs_saved_t -- Describes which registers beyond what the kernel cares
62                   about are saved to and restored from this sigcontext.
63
64     The default is REGS_SAVED_CALLER, only the caller saved registers
65     are saved.  If the SV_SAVE_REGS flag was set when the signal
66     handler was registered with sigvec() then all the registers will be
67     saved in the sigcontext, and REGS_SAVED_ALL will be set.  The C
68     library uses REGS_SAVED_NONE in order to quickly restore kernel
69     state during a longjmp().
70    }
71  { Only kernel managed regs restored  }
72  { "Caller saved" regs: rpc, a0-a7,
73                                           t0-t4, at, lk0-lk1, xt1-xt20,
74                                           xr0-xr1  }
75  { All registers  }
76
77  type
78
79     ppc_thread_state = record
80  { Instruction address register (PC)  }
81          srr0 : dword;
82  { Machine state register (supervisor)  }
83          srr1 : dword;
84          r0 : dword;
85          r1 : dword;
86          r2 : dword;
87          r3 : dword;
88          r4 : dword;
89          r5 : dword;
90          r6 : dword;
91          r7 : dword;
92          r8 : dword;
93          r9 : dword;
94          r10 : dword;
95          r11 : dword;
96          r12 : dword;
97          r13 : dword;
98          r14 : dword;
99          r15 : dword;
100          r16 : dword;
101          r17 : dword;
102          r18 : dword;
103          r19 : dword;
104          r20 : dword;
105          r21 : dword;
106          r22 : dword;
107          r23 : dword;
108          r24 : dword;
109          r25 : dword;
110          r26 : dword;
111          r27 : dword;
112          r28 : dword;
113          r29 : dword;
114          r30 : dword;
115          r31 : dword;
116  { Condition register  }
117          cr : dword;
118  { User's integer exception register  }
119          xer : dword;
120  { Link register  }
121          lr : dword;
122  { Count register  }
123          ctr : dword;
124  { MQ register (601 only)  }
125          mq : dword;
126  { Vector Save Register  }
127          vrsave : dword;
128       end;
129     ppc_thread_state_t = ppc_thread_state;
130
131{$packrecords 4}
132     ppc_thread_state64 = record
133          srr0 : qword;
134          srr1 : qword;
135          r0 : qword;
136          r1 : qword;
137          r2 : qword;
138          r3 : qword;
139          r4 : qword;
140          r5 : qword;
141          r6 : qword;
142          r7 : qword;
143          r8 : qword;
144          r9 : qword;
145          r10 : qword;
146          r11 : qword;
147          r12 : qword;
148          r13 : qword;
149          r14 : qword;
150          r15 : qword;
151          r16 : qword;
152          r17 : qword;
153          r18 : qword;
154          r19 : qword;
155          r20 : qword;
156          r21 : qword;
157          r22 : qword;
158          r23 : qword;
159          r24 : qword;
160          r25 : qword;
161          r26 : qword;
162          r27 : qword;
163          r28 : qword;
164          r29 : qword;
165          r30 : qword;
166          r31 : qword;
167          cr : dword;
168          xer : qword;
169          lr : qword;
170          ctr : qword;
171          vrsave : dword;
172       end;
173     ppc_thread_state64_t = ppc_thread_state64;
174
175{$packrecords C}
176
177  { This structure should be double-word aligned for performance  }
178  type
179
180     ppc_float_state = record
181          fpregs : array[0..31] of double;
182  { fpscr is 64 bits, 32 bits of rubbish  }
183          fpscr_pad : dword;
184  { floating point status register  }
185          fpscr : dword;
186       end;
187     ppc_float_state_t = ppc_float_state;
188
189  { VRs that have been saved  }
190     ppc_vector_state = record
191          save_vr : array[0..31] of array[0..3] of dword;
192          save_vscr : array[0..3] of dword;
193          save_pad5 : array[0..3] of dword;
194          save_vrvalid : dword;
195          save_pad6 : array[0..6] of dword;
196       end;
197     ppc_vector_state_t = ppc_vector_state;
198
199  {
200     ppc_exception_state
201
202     This structure corresponds to some additional state of the user
203     registers as saved in the PCB upon kernel entry. They are only
204     available if an exception is passed out of the kernel, and even
205     then not all are guaranteed to be updated.
206
207     Some padding is included in this structure which allows space for
208     servers to store temporary values if need be, to maintain binary
209     compatiblity.
210    }
211
212  type
213
214     ppc_exception_state = record
215  { Fault registers for coredump  }
216          dar : dword;
217          dsisr : dword;
218  { number of powerpc exception taken  }
219          exception : dword;
220  { align to 16 bytes  }
221          pad0 : dword;
222  { space in PCB "just in case"  }
223          pad1 : array[0..3] of dword;
224       end;
225     ppc_exception_state_t = ppc_exception_state;
226
227{$packrecords 4}
228
229  type
230
231     ppc_exception_state64 = record
232  { Fault registers for coredump  }
233          dar : qword;
234          dsisr : dword;
235  { number of powerpc exception taken  }
236          exception : dword;
237  { space in PCB "just in case"  }
238          pad1 : array[0..3] of dword;
239       end;
240     ppc_exception_state64_t = ppc_exception_state64;
241
242{$packrecords C}
243
244     mcontext_t = record
245{$ifdef cpu64}
246        es: ppc_exception_state64_t;
247        ss: ppc_thread_state64_t;
248{$else cpu64}
249        es: ppc_exception_state_t;
250        ss: ppc_thread_state_t;
251{$endif cpu64}
252        fs: ppc_float_state_t;
253        vs: ppc_vector_state_t;
254     end;
255