1{
2Register definitions and utility code for STM32F10x - Low Density
3
4Created by Jeppe Johansen 2012 - jeppe@j-software.dk
5}
6unit stm32f10x_ld;
7
8{$goto on}
9{$define stm32f10x_ld}
10
11interface
12
13type
14 TBitvector32 = bitpacked array[0..31] of 0..1;
15
16{$PACKRECORDS 2}
17const
18 PeripheralBase 	= $40000000;
19
20 FSMCBase			= $60000000;
21
22 APB1Base 			= PeripheralBase;
23 APB2Base 			= PeripheralBase+$10000;
24 AHBBase 			= PeripheralBase+$20000;
25
26 { FSMC }
27 FSMCBank1NOR1		= FSMCBase+$00000000;
28 FSMCBank1NOR2		= FSMCBase+$04000000;
29 FSMCBank1NOR3		= FSMCBase+$08000000;
30 FSMCBank1NOR4		= FSMCBase+$0C000000;
31
32 FSMCBank1PSRAM1	= FSMCBase+$00000000;
33 FSMCBank1PSRAM2	= FSMCBase+$04000000;
34 FSMCBank1PSRAM3	= FSMCBase+$08000000;
35 FSMCBank1PSRAM4	= FSMCBase+$0C000000;
36
37 FSMCBank2NAND1	= FSMCBase+$10000000;
38 FSMCBank3NAND2	= FSMCBase+$20000000;
39
40 FSMCBank4PCCARD	= FSMCBase+$30000000;
41
42type
43 TTimerRegisters = record
44  CR1, res1,
45  CR2, res2,
46  SMCR, res3,
47  DIER, res4,
48  SR, res5,
49  EGR, res,
50  CCMR1, res6,
51  CCMR2, res7,
52  CCER, res8,
53  CNT, res9,
54  PSC, res10,
55  ARR, res11,
56  RCR, res12,
57  CCR1, res13,
58  CCR2, res14,
59  CCR3, res15,
60  CCR4, res16,
61  BDTR, res17,
62  DCR, res18,
63  DMAR, res19: Word;
64 end;
65
66 TRTCRegisters = record
67  CRH, res1,
68  CRL, res2,
69  PRLH, res3,
70  PRLL, res4,
71  DIVH, res5,
72  DIVL, res6,
73  CNTH, res7,
74  CNTL, res8,
75  ALRH, res9,
76  ALRL, res10: Word;
77 end;
78
79 TIWDGRegisters = record
80  KR, res1,
81  PR, res2,
82  RLR, res3,
83  SR, res4: word;
84 end;
85
86 TWWDGRegisters = record
87  CR, res2,
88  CFR, res3,
89  SR, res4: word;
90 end;
91
92 TSPIRegisters = record
93  CR1, res1,
94  CR2, res2,
95  SR, res3,
96  DR, res4,
97  CRCPR, res5,
98  RXCRCR, res6,
99  TXCRCR, res7,
100  I2SCFGR, res8,
101  I2SPR, res9: Word;
102 end;
103
104 TUSARTRegisters = record
105  SR, res1,
106  DR, res2,
107  BRR, res3,
108  CR1, res4,
109  CR2, res5,
110  CR3, res6,
111  GTPR, res7: Word;
112 end;
113
114 TI2CRegisters = record
115  CR1, res1,
116  CR2, res2,
117  OAR1, res3,
118  OAR2, res4,
119  DR, res5,
120  SR1, res6,
121  SR2, res7,
122  CCR, res8: word;
123  TRISE: byte;
124 end;
125
126 TUSBRegisters = record
127  EPR: array[0..7] of longword;
128
129  res: array[0..7] of longword;
130
131  CNTR, res1,
132  ISTR, res2,
133  FNR, res3: Word;
134  DADDR: byte; res4: word; res5: byte;
135  BTABLE: Word;
136 end;
137
138 TUSBMem = packed array[0..511] of byte;
139
140 TCANMailbox = record
141  IR,
142  DTR,
143  DLR,
144  DHR: longword;
145 end;
146
147 TCANRegisters = record
148  MCR,
149  MSR,
150  TSR,
151  RF0R,
152  RF1R,
153  IER,
154  ESR,
155  BTR: longword;
156
157  res5: array[$020..$17F] of byte;
158
159  TX: array[0..2] of TCANMailbox;
160  RX: array[0..2] of TCANMailbox;
161
162  res6: array[$1D0..$1FF] of byte;
163
164  FMR,
165  FM1R,
166  res9: longword;
167  FS1R, res10: word;
168  res11: longword;
169  FFA1R, res12: word;
170  res13: longword;
171  FA1R, res14: word;
172  res15: array[$220..$23F] of byte;
173
174  FOR1,
175  FOR2: longword;
176
177  FB: array[1..13] of array[1..2] of longword;
178 end;
179
180 TBKPRegisters = record
181  DR: array[1..10] of record data, res: word; end;
182
183  RTCCR,
184  CR,
185  CSR,
186  res1,res2: longword;
187
188  DR2: array[11..42] of record data, res: word; end;
189 end;
190
191 TPwrRegisters = record
192  CR, res: word;
193  CSR: Word;
194 end;
195
196 TDACRegisters = record
197  CR,
198  SWTRIGR: longword;
199
200  DHR12R1, res2,
201  DHR12L1, res3,
202  DHR8R1, res4,
203  DHR12R2, res5,
204  DHR12L2, res6,
205  DHR8R2, res7: word;
206
207  DHR12RD,
208  DHR12LD: longword;
209
210  DHR8RD, res8,
211
212  DOR1, res9,
213  DOR2, res10: Word;
214 end;
215
216 TAFIORegisters = record
217  EVCR,
218  MAPR: longword;
219  EXTICR: array[0..3] of longword;
220 end;
221
222 TEXTIRegisters = record
223  IMR,
224  EMR,
225  RTSR,
226  FTSR,
227  SWIER,
228  PR: longword;
229 end;
230
231 TPortRegisters = record
232  CRL,
233  CRH,
234  IDR,
235  ODR,
236  BSRR,
237  BRR,
238  LCKR: longword;
239 end;
240
241 TADCRegisters = record
242  SR,
243  CR1,
244  CR2,
245  SMPR1,
246  SMPR2: longword;
247  JOFR1, res2,
248  JOFR2, res3,
249  JOFR3, res4,
250  JOFR4, res5,
251  HTR, res6,
252  LTR, res7: word;
253  SQR1,
254  SQR2,
255  SQR3,
256  JSQR: longword;
257  JDR1, res8,
258  JDR2, res9,
259  JDR3, res10,
260  JDR4, res11: Word;
261  DR: longword;
262 end;
263
264 TSDIORegisters = record
265  POWER,
266  CLKCR,
267  ARG: longword;
268  CMD, res3,
269  RESPCMD, res4: Word;
270  RESP1,
271  RESP2,
272  RESP3,
273  RESP4,
274  DTIMER,
275  DLEN: longword;
276  DCTRL, res5: word;
277  DCOUNT,
278  STA,
279  ICR,
280  MASK,
281  FIFOCNT,
282  FIFO: longword;
283 end;
284
285 TDMAChannel = record
286  CCR, res1,
287  CNDTR, res2: word;
288  CPAR,
289  CMAR,
290  res: longword;
291 end;
292
293 TDMARegisters = record
294  ISR,
295  IFCR: longword;
296  Channel: array[0..7] of TDMAChannel;
297 end;
298
299 TRCCRegisters = record
300  CR,
301  CFGR,
302  CIR,
303  APB2RSTR,
304  APB1RSTR,
305  AHBENR,
306  APB2ENR,
307  APB1ENR,
308  BDCR,
309  CSR: longword;
310 end;
311
312 TCRCRegisters = record
313  DR: longword;
314  IDR: byte; res1: word; res2: byte;
315  CR: byte;
316 end;
317
318 TFlashRegisters = record
319  ACR,
320  KEYR,
321  OPTKEYR,
322  SR,
323  CR,
324  AR,
325  res,
326  OBR,
327  WRPR: longword;
328 end;
329
330{$ALIGN 2}
331var
332 { Timers }
333 Timer1: TTimerRegisters 	absolute (APB2Base+$2C00);
334 Timer2: TTimerRegisters 	absolute (APB1Base+$0000);
335 Timer3: TTimerRegisters 	absolute (APB1Base+$0400);
336 Timer4: TTimerRegisters 	absolute (APB1Base+$0800);
337 Timer5: TTimerRegisters 	absolute (APB1Base+$0C00);
338 Timer6: TTimerRegisters 	absolute (APB1Base+$1000);
339 Timer7: TTimerRegisters 	absolute (APB1Base+$1400);
340 Timer8: TTimerRegisters 	absolute (APB2Base+$3400);
341
342 { RTC }
343 RTC: TRTCRegisters 			absolute (APB1Base+$2800);
344
345 { WDG }
346 WWDG: TWWDGRegisters 		absolute (APB1Base+$2C00);
347 IWDG: TIWDGRegisters 		absolute (APB1Base+$3000);
348
349 { SPI }
350 SPI1: TSPIRegisters			absolute (APB2Base+$3000);
351 SPI2: TSPIRegisters			absolute (APB1Base+$3800);
352 SPI3: TSPIRegisters			absolute (APB1Base+$3C00);
353
354 { USART/UART }
355 USART1: TUSARTRegisters	absolute (APB2Base+$3800);
356 USART2: TUSARTRegisters	absolute (APB1Base+$4400);
357 USART3: TUSARTRegisters	absolute (APB1Base+$4800);
358 UART4: TUSARTRegisters		absolute (APB1Base+$4C00);
359 UART5: TUSARTRegisters		absolute (APB1Base+$5000);
360
361 { I2C }
362 I2C1: TI2CRegisters			absolute (APB1Base+$5400);
363 I2C2: TI2CRegisters			absolute (APB1Base+$5800);
364
365 { USB }
366 USB: TUSBRegisters			absolute (APB1Base+$5C00);
367 USBMem: TUSBMem                        absolute (APB1Base+$6000);
368
369 { CAN }
370 CAN: TCANRegisters			absolute (APB1Base+$6800);
371
372 { BKP }
373 BKP: TBKPRegisters			absolute (APB1Base+$6C00);
374
375 { PWR }
376 PWR: TPwrRegisters			absolute (APB1Base+$7000);
377
378 { DAC }
379 DAC: TDACRegisters			absolute (APB1Base+$7400);
380
381 { GPIO }
382 AFIO: TAFIORegisters		absolute (APB2Base+$0);
383 EXTI: TEXTIRegisters		absolute (APB2Base+$0400);
384
385 PortA: TPortRegisters		absolute (APB2Base+$0800);
386 PortB: TPortRegisters		absolute (APB2Base+$0C00);
387 PortC: TPortRegisters		absolute (APB2Base+$1000);
388 PortD: TPortRegisters		absolute (APB2Base+$1400);
389 PortE: TPortRegisters		absolute (APB2Base+$1800);
390 PortF: TPortRegisters		absolute (APB2Base+$1C00);
391 PortG: TPortRegisters		absolute (APB2Base+$2000);
392
393 { ADC }
394 ADC1: TADCRegisters			absolute (APB2Base+$2400);
395 ADC2: TADCRegisters			absolute (APB2Base+$2800);
396 ADC3: TADCRegisters			absolute (APB2Base+$3C00);
397
398 { SDIO }
399 SDIO: TSDIORegisters		absolute (APB2Base+$8000);
400
401 { DMA }
402 DMA1: TDMARegisters			absolute (AHBBase+$0000);
403 DMA2: TDMARegisters			absolute (AHBBase+$0400);
404
405 { RCC }
406 RCC: TRCCRegisters			absolute (AHBBase+$1000);
407
408 { Flash }
409 Flash: TFlashRegisters		absolute (AHBBase+$2000);
410
411 { CRC }
412 CRC: TCRCRegisters			absolute (AHBBase+$3000);
413
414implementation
415
416procedure NMI_interrupt; external name 'NMI_interrupt';
417procedure Hardfault_interrupt; external name 'Hardfault_interrupt';
418procedure MemManage_interrupt; external name 'MemManage_interrupt';
419procedure BusFault_interrupt; external name 'BusFault_interrupt';
420procedure UsageFault_interrupt; external name 'UsageFault_interrupt';
421procedure SWI_interrupt; external name 'SWI_interrupt';
422procedure DebugMonitor_interrupt; external name 'DebugMonitor_interrupt';
423procedure PendingSV_interrupt; external name 'PendingSV_interrupt';
424procedure SysTick_interrupt; external name 'SysTick_interrupt';
425procedure Window_watchdog_interrupt; external name 'Window_watchdog_interrupt';
426procedure PVD_through_EXTI_Line_detection_interrupt; external name 'PVD_through_EXTI_Line_detection_interrupt';
427procedure Tamper_interrupt; external name 'Tamper_interrupt';
428procedure RTC_global_interrupt; external name 'RTC_global_interrupt';
429procedure Flash_global_interrupt; external name 'Flash_global_interrupt';
430procedure RCC_global_interrupt; external name 'RCC_global_interrupt';
431procedure EXTI_Line0_interrupt; external name 'EXTI_Line0_interrupt';
432procedure EXTI_Line1_interrupt; external name 'EXTI_Line1_interrupt';
433procedure EXTI_Line2_interrupt; external name 'EXTI_Line2_interrupt';
434procedure EXTI_Line3_interrupt; external name 'EXTI_Line3_interrupt';
435procedure EXTI_Line4_interrupt; external name 'EXTI_Line4_interrupt';
436procedure DMA1_Channel1_global_interrupt; external name 'DMA1_Channel1_global_interrupt';
437procedure DMA1_Channel2_global_interrupt; external name 'DMA1_Channel2_global_interrupt';
438procedure DMA1_Channel3_global_interrupt; external name 'DMA1_Channel3_global_interrupt';
439procedure DMA1_Channel4_global_interrupt; external name 'DMA1_Channel4_global_interrupt';
440procedure DMA1_Channel5_global_interrupt; external name 'DMA1_Channel5_global_interrupt';
441procedure DMA1_Channel6_global_interrupt; external name 'DMA1_Channel6_global_interrupt';
442procedure DMA1_Channel7_global_interrupt; external name 'DMA1_Channel7_global_interrupt';
443procedure ADC1_and_ADC2_global_interrupt; external name 'ADC1_and_ADC2_global_interrupt';
444procedure USB_High_Priority_or_CAN_TX_interrupts; external name 'USB_High_Priority_or_CAN_TX_interrupts';
445procedure USB_Low_Priority_or_CAN_RX0_interrupts; external name 'USB_Low_Priority_or_CAN_RX0_interrupts';
446procedure CAN_RX1_interrupt; external name 'CAN_RX1_interrupt';
447procedure CAN_SCE_interrupt; external name 'CAN_SCE_interrupt';
448procedure EXTI_Line9_5_interrupts; external name 'EXTI_Line9_5_interrupts';
449procedure TIM1_Break_interrupt; external name 'TIM1_Break_interrupt';
450procedure TIM1_Update_interrupt; external name 'TIM1_Update_interrupt';
451procedure TIM1_Trigger_and_Commutation_interrupts; external name 'TIM1_Trigger_and_Commutation_interrupts';
452procedure TIM1_Capture_Compare_interrupt; external name 'TIM1_Capture_Compare_interrupt';
453procedure TIM2_global_interrupt; external name 'TIM2_global_interrupt';
454procedure TIM3_global_interrupt; external name 'TIM3_global_interrupt';
455procedure TIM4_global_interrupt; external name 'TIM4_global_interrupt';
456procedure I2C1_event_interrupt; external name 'I2C1_event_interrupt';
457procedure I2C1_error_interrupt; external name 'I2C1_error_interrupt';
458procedure I2C2_event_interrupt; external name 'I2C2_event_interrupt';
459procedure I2C2_error_interrupt; external name 'I2C2_error_interrupt';
460procedure SPI1_global_interrupt; external name 'SPI1_global_interrupt';
461procedure SPI2_global_interrupt; external name 'SPI2_global_interrupt';
462procedure USART1_global_interrupt; external name 'USART1_global_interrupt';
463procedure USART2_global_interrupt; external name 'USART2_global_interrupt';
464procedure USART3_global_interrupt; external name 'USART3_global_interrupt';
465procedure EXTI_Line15_10_interrupts; external name 'EXTI_Line15_10_interrupts';
466procedure RTC_alarm_through_EXTI_line_interrupt; external name 'RTC_alarm_through_EXTI_line_interrupt';
467procedure USB_wakeup_from_suspend_through_EXTI_line_interrupt; external name 'USB_wakeup_from_suspend_through_EXTI_line_interrupt';
468procedure TIM8_Break_interrupt; external name 'TIM8_Break_interrupt';
469procedure TIM8_Update_interrupt; external name 'TIM8_Update_interrupt';
470procedure TIM8_Trigger_and_Commutation_interrupts; external name 'TIM8_Trigger_and_Commutation_interrupts';
471procedure TIM8_Capture_Compare_interrupt; external name 'TIM8_Capture_Compare_interrupt';
472procedure ADC3_global_interrupt; external name 'ADC3_global_interrupt';
473procedure FSMC_global_interrupt; external name 'FSMC_global_interrupt';
474procedure SDIO_global_interrupt; external name 'SDIO_global_interrupt';
475procedure TIM5_global_interrupt; external name 'TIM5_global_interrupt';
476procedure SPI3_global_interrupt; external name 'SPI3_global_interrupt';
477procedure UART4_global_interrupt; external name 'UART4_global_interrupt';
478procedure UART5_global_interrupt; external name 'UART5_global_interrupt';
479procedure TIM6_global_interrupt; external name 'TIM6_global_interrupt';
480procedure TIM7_global_interrupt; external name 'TIM7_global_interrupt';
481procedure DMA2_Channel1_global_interrupt; external name 'DMA2_Channel1_global_interrupt';
482procedure DMA2_Channel2_global_interrupt; external name 'DMA2_Channel2_global_interrupt';
483procedure DMA2_Channel3_global_interrupt; external name 'DMA2_Channel3_global_interrupt';
484procedure DMA2_Channel4_and_DMA2_Channel5_global_interrupts; external name 'DMA2_Channel4_and_DMA2_Channel5_global_interrupts';
485
486{$i cortexm3_start.inc}
487
488procedure Vectors; assembler; nostackframe;
489label interrupt_vectors;
490asm
491   .section ".init.interrupt_vectors"
492interrupt_vectors:
493   .long _stack_top
494   .long Startup
495   .long NMI_interrupt
496   .long Hardfault_interrupt
497   .long MemManage_interrupt
498   .long BusFault_interrupt
499   .long UsageFault_interrupt
500   .long 0
501   .long 0
502   .long 0
503   .long 0
504   .long SWI_interrupt
505   .long DebugMonitor_interrupt
506   .long 0
507   .long PendingSV_interrupt
508   .long SysTick_interrupt
509
510   .long Window_watchdog_interrupt
511   .long PVD_through_EXTI_Line_detection_interrupt
512   .long Tamper_interrupt
513   .long RTC_global_interrupt
514   .long Flash_global_interrupt
515   .long RCC_global_interrupt
516   .long EXTI_Line0_interrupt
517   .long EXTI_Line1_interrupt
518   .long EXTI_Line2_interrupt
519   .long EXTI_Line3_interrupt
520   .long EXTI_Line4_interrupt
521   .long DMA1_Channel1_global_interrupt
522   .long DMA1_Channel2_global_interrupt
523   .long DMA1_Channel3_global_interrupt
524   .long DMA1_Channel4_global_interrupt
525   .long DMA1_Channel5_global_interrupt
526   .long DMA1_Channel6_global_interrupt
527   .long DMA1_Channel7_global_interrupt
528   .long ADC1_and_ADC2_global_interrupt
529   .long USB_High_Priority_or_CAN_TX_interrupts
530   .long USB_Low_Priority_or_CAN_RX0_interrupts
531   .long CAN_RX1_interrupt
532   .long CAN_SCE_interrupt
533   .long EXTI_Line9_5_interrupts
534   .long TIM1_Break_interrupt
535   .long TIM1_Update_interrupt
536   .long TIM1_Trigger_and_Commutation_interrupts
537   .long TIM1_Capture_Compare_interrupt
538   .long TIM2_global_interrupt
539   .long TIM3_global_interrupt
540   .long TIM4_global_interrupt
541   .long I2C1_event_interrupt
542   .long I2C1_error_interrupt
543   .long I2C2_event_interrupt
544   .long I2C2_error_interrupt
545   .long SPI1_global_interrupt
546   .long SPI2_global_interrupt
547   .long USART1_global_interrupt
548   .long USART2_global_interrupt
549   .long USART3_global_interrupt
550   .long EXTI_Line15_10_interrupts
551   .long RTC_alarm_through_EXTI_line_interrupt
552   .long USB_wakeup_from_suspend_through_EXTI_line_interrupt
553   .long TIM8_Break_interrupt
554   .long TIM8_Update_interrupt
555   .long TIM8_Trigger_and_Commutation_interrupts
556   .long TIM8_Capture_Compare_interrupt
557   .long ADC3_global_interrupt
558   .long FSMC_global_interrupt
559   .long SDIO_global_interrupt
560   .long TIM5_global_interrupt
561   .long SPI3_global_interrupt
562   .long UART4_global_interrupt
563   .long UART5_global_interrupt
564   .long TIM6_global_interrupt
565   .long TIM7_global_interrupt
566   .long DMA2_Channel1_global_interrupt
567   .long DMA2_Channel2_global_interrupt
568   .long DMA2_Channel3_global_interrupt
569   .long DMA2_Channel4_and_DMA2_Channel5_global_interrupts
570
571   .weak NMI_interrupt
572   .weak Hardfault_interrupt
573   .weak MemManage_interrupt
574   .weak BusFault_interrupt
575   .weak UsageFault_interrupt
576   .weak SWI_interrupt
577   .weak DebugMonitor_interrupt
578   .weak PendingSV_interrupt
579   .weak SysTick_interrupt
580
581   .weak Window_watchdog_interrupt
582   .weak PVD_through_EXTI_Line_detection_interrupt
583   .weak Tamper_interrupt
584   .weak RTC_global_interrupt
585   .weak Flash_global_interrupt
586   .weak RCC_global_interrupt
587   .weak EXTI_Line0_interrupt
588   .weak EXTI_Line1_interrupt
589   .weak EXTI_Line2_interrupt
590   .weak EXTI_Line3_interrupt
591   .weak EXTI_Line4_interrupt
592   .weak DMA1_Channel1_global_interrupt
593   .weak DMA1_Channel2_global_interrupt
594   .weak DMA1_Channel3_global_interrupt
595   .weak DMA1_Channel4_global_interrupt
596   .weak DMA1_Channel5_global_interrupt
597   .weak DMA1_Channel6_global_interrupt
598   .weak DMA1_Channel7_global_interrupt
599   .weak ADC1_and_ADC2_global_interrupt
600   .weak USB_High_Priority_or_CAN_TX_interrupts
601   .weak USB_Low_Priority_or_CAN_RX0_interrupts
602   .weak CAN_RX1_interrupt
603   .weak CAN_SCE_interrupt
604   .weak EXTI_Line9_5_interrupts
605   .weak TIM1_Break_interrupt
606   .weak TIM1_Update_interrupt
607   .weak TIM1_Trigger_and_Commutation_interrupts
608   .weak TIM1_Capture_Compare_interrupt
609   .weak TIM2_global_interrupt
610   .weak TIM3_global_interrupt
611   .weak TIM4_global_interrupt
612   .weak I2C1_event_interrupt
613   .weak I2C1_error_interrupt
614   .weak I2C2_event_interrupt
615   .weak I2C2_error_interrupt
616   .weak SPI1_global_interrupt
617   .weak SPI2_global_interrupt
618   .weak USART1_global_interrupt
619   .weak USART2_global_interrupt
620   .weak USART3_global_interrupt
621   .weak EXTI_Line15_10_interrupts
622   .weak RTC_alarm_through_EXTI_line_interrupt
623   .weak USB_wakeup_from_suspend_through_EXTI_line_interrupt
624   .weak TIM8_Break_interrupt
625   .weak TIM8_Update_interrupt
626   .weak TIM8_Trigger_and_Commutation_interrupts
627   .weak TIM8_Capture_Compare_interrupt
628   .weak ADC3_global_interrupt
629   .weak FSMC_global_interrupt
630   .weak SDIO_global_interrupt
631   .weak TIM5_global_interrupt
632   .weak SPI3_global_interrupt
633   .weak UART4_global_interrupt
634   .weak UART5_global_interrupt
635   .weak TIM6_global_interrupt
636   .weak TIM7_global_interrupt
637   .weak DMA2_Channel1_global_interrupt
638   .weak DMA2_Channel2_global_interrupt
639   .weak DMA2_Channel3_global_interrupt
640   .weak DMA2_Channel4_and_DMA2_Channel5_global_interrupts
641
642
643   .set NMI_interrupt, HaltProc
644   .set Hardfault_interrupt, HaltProc
645   .set MemManage_interrupt, HaltProc
646   .set BusFault_interrupt, HaltProc
647   .set UsageFault_interrupt, HaltProc
648   .set SWI_interrupt, HaltProc
649   .set DebugMonitor_interrupt, HaltProc
650   .set PendingSV_interrupt, HaltProc
651   .set SysTick_interrupt, HaltProc
652
653   .set Window_watchdog_interrupt, HaltProc
654   .set PVD_through_EXTI_Line_detection_interrupt, HaltProc
655   .set Tamper_interrupt, HaltProc
656   .set RTC_global_interrupt, HaltProc
657   .set Flash_global_interrupt, HaltProc
658   .set RCC_global_interrupt, HaltProc
659   .set EXTI_Line0_interrupt, HaltProc
660   .set EXTI_Line1_interrupt, HaltProc
661   .set EXTI_Line2_interrupt, HaltProc
662   .set EXTI_Line3_interrupt, HaltProc
663   .set EXTI_Line4_interrupt, HaltProc
664   .set DMA1_Channel1_global_interrupt, HaltProc
665   .set DMA1_Channel2_global_interrupt, HaltProc
666   .set DMA1_Channel3_global_interrupt, HaltProc
667   .set DMA1_Channel4_global_interrupt, HaltProc
668   .set DMA1_Channel5_global_interrupt, HaltProc
669   .set DMA1_Channel6_global_interrupt, HaltProc
670   .set DMA1_Channel7_global_interrupt, HaltProc
671   .set ADC1_and_ADC2_global_interrupt, HaltProc
672   .set USB_High_Priority_or_CAN_TX_interrupts, HaltProc
673   .set USB_Low_Priority_or_CAN_RX0_interrupts, HaltProc
674   .set CAN_RX1_interrupt, HaltProc
675   .set CAN_SCE_interrupt, HaltProc
676   .set EXTI_Line9_5_interrupts, HaltProc
677   .set TIM1_Break_interrupt, HaltProc
678   .set TIM1_Update_interrupt, HaltProc
679   .set TIM1_Trigger_and_Commutation_interrupts, HaltProc
680   .set TIM1_Capture_Compare_interrupt, HaltProc
681   .set TIM2_global_interrupt, HaltProc
682   .set TIM3_global_interrupt, HaltProc
683   .set TIM4_global_interrupt, HaltProc
684   .set I2C1_event_interrupt, HaltProc
685   .set I2C1_error_interrupt, HaltProc
686   .set I2C2_event_interrupt, HaltProc
687   .set I2C2_error_interrupt, HaltProc
688   .set SPI1_global_interrupt, HaltProc
689   .set SPI2_global_interrupt, HaltProc
690   .set USART1_global_interrupt, HaltProc
691   .set USART2_global_interrupt, HaltProc
692   .set USART3_global_interrupt, HaltProc
693   .set EXTI_Line15_10_interrupts, HaltProc
694   .set RTC_alarm_through_EXTI_line_interrupt, HaltProc
695   .set USB_wakeup_from_suspend_through_EXTI_line_interrupt, HaltProc
696   .set TIM8_Break_interrupt, HaltProc
697   .set TIM8_Update_interrupt, HaltProc
698   .set TIM8_Trigger_and_Commutation_interrupts, HaltProc
699   .set TIM8_Capture_Compare_interrupt, HaltProc
700   .set ADC3_global_interrupt, HaltProc
701   .set FSMC_global_interrupt, HaltProc
702   .set SDIO_global_interrupt, HaltProc
703   .set TIM5_global_interrupt, HaltProc
704   .set SPI3_global_interrupt, HaltProc
705   .set UART4_global_interrupt, HaltProc
706   .set UART5_global_interrupt, HaltProc
707   .set TIM6_global_interrupt, HaltProc
708   .set TIM7_global_interrupt, HaltProc
709   .set DMA2_Channel1_global_interrupt, HaltProc
710   .set DMA2_Channel2_global_interrupt, HaltProc
711   .set DMA2_Channel3_global_interrupt, HaltProc
712   .set DMA2_Channel4_and_DMA2_Channel5_global_interrupts, HaltProc
713
714   .text
715end;
716
717end.
718