1 /* Prototypes for exported functions defined in arm.c and pe.c
2    Copyright (C) 1999-2020 Free Software Foundation, Inc.
3    Contributed by Richard Earnshaw (rearnsha@arm.com)
4    Minor hacks by Nick Clifton (nickc@cygnus.com)
5 
6    This file is part of GCC.
7 
8    GCC is free software; you can redistribute it and/or modify
9    it under the terms of the GNU General Public License as published by
10    the Free Software Foundation; either version 3, or (at your option)
11    any later version.
12 
13    GCC is distributed in the hope that it will be useful,
14    but WITHOUT ANY WARRANTY; without even the implied warranty of
15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16    GNU General Public License for more details.
17 
18    You should have received a copy of the GNU General Public License
19    along with GCC; see the file COPYING3.  If not see
20    <http://www.gnu.org/licenses/>.  */
21 
22 #ifndef GCC_ARM_PROTOS_H
23 #define GCC_ARM_PROTOS_H
24 
25 #include "sbitmap.h"
26 
27 extern enum unwind_info_type arm_except_unwind_info (struct gcc_options *);
28 extern int use_return_insn (int, rtx);
29 extern bool use_simple_return_p (void);
30 extern enum reg_class arm_regno_class (int);
31 extern bool arm_check_builtin_call (location_t , vec<location_t> , tree,
32 				    tree, unsigned int, tree *);
33 extern void arm_load_pic_register (unsigned long, rtx);
34 extern int arm_volatile_func (void);
35 extern void arm_expand_prologue (void);
36 extern void arm_expand_epilogue (bool);
37 extern void arm_declare_function_name (FILE *, const char *, tree);
38 extern void arm_asm_declare_function_name (FILE *, const char *, tree);
39 extern void thumb2_expand_return (bool);
40 extern const char *arm_strip_name_encoding (const char *);
41 extern void arm_asm_output_labelref (FILE *, const char *);
42 extern void thumb2_asm_output_opcode (FILE *);
43 extern unsigned long arm_current_func_type (void);
44 extern HOST_WIDE_INT arm_compute_initial_elimination_offset (unsigned int,
45 							     unsigned int);
46 extern HOST_WIDE_INT thumb_compute_initial_elimination_offset (unsigned int,
47 							       unsigned int);
48 extern unsigned int arm_dbx_register_number (unsigned int);
49 extern void arm_output_fn_unwind (FILE *, bool);
50 
51 extern rtx arm_expand_builtin (tree exp, rtx target, rtx subtarget
52 			       ATTRIBUTE_UNUSED, machine_mode mode
53 			       ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED);
54 extern tree arm_builtin_decl (unsigned code, bool initialize_p
55 			      ATTRIBUTE_UNUSED);
56 extern void arm_init_builtins (void);
57 extern void arm_atomic_assign_expand_fenv (tree *hold, tree *clear, tree *update);
58 extern rtx arm_simd_vect_par_cnst_half (machine_mode mode, bool high);
59 extern bool arm_simd_check_vect_par_cnst_half_p (rtx op, machine_mode mode,
60 						 bool high);
61 extern void arm_emit_speculation_barrier_function (void);
62 extern void arm_decompose_di_binop (rtx, rtx, rtx *, rtx *, rtx *, rtx *);
63 extern bool arm_q_bit_access (void);
64 extern bool arm_ge_bits_access (void);
65 
66 #ifdef RTX_CODE
67 enum reg_class
68 arm_mode_base_reg_class (machine_mode);
69 extern void arm_gen_unlikely_cbranch (enum rtx_code, machine_mode cc_mode,
70 				      rtx label_ref);
71 extern bool arm_vector_mode_supported_p (machine_mode);
72 extern bool arm_small_register_classes_for_mode_p (machine_mode);
73 extern int const_ok_for_arm (HOST_WIDE_INT);
74 extern int const_ok_for_op (HOST_WIDE_INT, enum rtx_code);
75 extern int const_ok_for_dimode_op (HOST_WIDE_INT, enum rtx_code);
76 extern void thumb1_gen_const_int (rtx, HOST_WIDE_INT);
77 extern int arm_split_constant (RTX_CODE, machine_mode, rtx,
78 			       HOST_WIDE_INT, rtx, rtx, int);
79 extern int legitimate_pic_operand_p (rtx);
80 extern rtx legitimize_pic_address (rtx, machine_mode, rtx, rtx, bool);
81 extern rtx legitimize_tls_address (rtx, rtx);
82 extern bool arm_legitimate_address_p (machine_mode, rtx, bool);
83 extern int arm_legitimate_address_outer_p (machine_mode, rtx, RTX_CODE, int);
84 extern int thumb_legitimate_offset_p (machine_mode, HOST_WIDE_INT);
85 extern int thumb1_legitimate_address_p (machine_mode, rtx, int);
86 extern bool ldm_stm_operation_p (rtx, bool, machine_mode mode,
87                                  bool, bool);
88 extern bool clear_operation_p (rtx, bool);
89 extern int arm_const_double_rtx (rtx);
90 extern int vfp3_const_double_rtx (rtx);
91 extern int simd_immediate_valid_for_move (rtx, machine_mode, rtx *, int *);
92 extern int neon_immediate_valid_for_logic (rtx, machine_mode, int, rtx *,
93 					   int *);
94 extern int neon_immediate_valid_for_shift (rtx, machine_mode, rtx *,
95 					   int *, bool);
96 extern char *neon_output_logic_immediate (const char *, rtx *,
97 					  machine_mode, int, int);
98 extern char *neon_output_shift_immediate (const char *, char, rtx *,
99 					  machine_mode, int, bool);
100 extern void neon_pairwise_reduce (rtx, rtx, machine_mode,
101 				  rtx (*) (rtx, rtx, rtx));
102 extern rtx neon_make_constant (rtx, bool generate = true);
103 extern tree arm_builtin_vectorized_function (unsigned int, tree, tree);
104 extern void neon_expand_vector_init (rtx, rtx);
105 extern void neon_lane_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT, const_tree);
106 extern void arm_const_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT);
107 extern HOST_WIDE_INT neon_element_bits (machine_mode);
108 extern void neon_emit_pair_result_insn (machine_mode,
109 					rtx (*) (rtx, rtx, rtx, rtx),
110 					rtx, rtx, rtx);
111 extern void neon_disambiguate_copy (rtx *, rtx *, rtx *, unsigned int);
112 extern void neon_split_vcombine (rtx op[3]);
113 extern enum reg_class coproc_secondary_reload_class (machine_mode, rtx,
114 						     bool);
115 extern bool arm_tls_referenced_p (rtx);
116 
117 extern int arm_coproc_mem_operand (rtx, bool);
118 extern int arm_coproc_mem_operand_no_writeback (rtx);
119 extern int arm_coproc_mem_operand_wb (rtx, int);
120 extern int neon_vector_mem_operand (rtx, int, bool);
121 extern int mve_vector_mem_operand (machine_mode, rtx, bool);
122 extern int neon_struct_mem_operand (rtx);
123 
124 extern rtx *neon_vcmla_lane_prepare_operands (rtx *);
125 
126 extern int tls_mentioned_p (rtx);
127 extern int symbol_mentioned_p (rtx);
128 extern int label_mentioned_p (rtx);
129 extern RTX_CODE minmax_code (rtx);
130 extern bool arm_sat_operator_match (rtx, rtx, int *, bool *);
131 extern int adjacent_mem_locations (rtx, rtx);
132 extern bool gen_ldm_seq (rtx *, int, bool);
133 extern bool gen_stm_seq (rtx *, int);
134 extern bool gen_const_stm_seq (rtx *, int);
135 extern rtx arm_gen_load_multiple (int *, int, rtx, int, rtx, HOST_WIDE_INT *);
136 extern rtx arm_gen_store_multiple (int *, int, rtx, int, rtx, HOST_WIDE_INT *);
137 extern bool offset_ok_for_ldrd_strd (HOST_WIDE_INT);
138 extern bool operands_ok_ldrd_strd (rtx, rtx, rtx, HOST_WIDE_INT, bool, bool);
139 extern bool gen_operands_ldrd_strd (rtx *, bool, bool, bool);
140 extern bool valid_operands_ldrd_strd (rtx *, bool);
141 extern int arm_gen_cpymemqi (rtx *);
142 extern bool gen_cpymem_ldrd_strd (rtx *);
143 extern machine_mode arm_select_cc_mode (RTX_CODE, rtx, rtx);
144 extern machine_mode arm_select_dominance_cc_mode (rtx, rtx,
145 						       HOST_WIDE_INT);
146 extern rtx arm_gen_compare_reg (RTX_CODE, rtx, rtx, rtx);
147 extern rtx arm_gen_return_addr_mask (void);
148 extern void arm_reload_in_hi (rtx *);
149 extern void arm_reload_out_hi (rtx *);
150 extern int arm_max_const_double_inline_cost (void);
151 extern int arm_const_double_inline_cost (rtx);
152 extern bool arm_const_double_by_parts (rtx);
153 extern bool arm_const_double_by_immediates (rtx);
154 extern rtx arm_load_function_descriptor (rtx funcdesc);
155 extern void arm_emit_call_insn (rtx, rtx, bool);
156 bool detect_cmse_nonsecure_call (tree);
157 extern const char *output_call (rtx *);
158 void arm_emit_movpair (rtx, rtx);
159 extern const char *output_mov_long_double_arm_from_arm (rtx *);
160 extern const char *output_move_double (rtx *, bool, int *count);
161 extern const char *output_move_quad (rtx *);
162 extern int arm_count_output_move_double_insns (rtx *);
163 extern int arm_count_ldrdstrd_insns (rtx *, bool);
164 extern const char *output_move_vfp (rtx *operands);
165 extern const char *output_move_neon (rtx *operands);
166 extern int arm_attr_length_move_neon (rtx_insn *);
167 extern int arm_address_offset_is_imm (rtx_insn *);
168 extern const char *output_add_immediate (rtx *);
169 extern const char *arithmetic_instr (rtx, int);
170 extern void output_ascii_pseudo_op (FILE *, const unsigned char *, int);
171 extern const char *output_return_instruction (rtx, bool, bool, bool);
172 extern const char *output_probe_stack_range (rtx, rtx);
173 extern void arm_poke_function_name (FILE *, const char *);
174 extern void arm_final_prescan_insn (rtx_insn *);
175 extern int arm_debugger_arg_offset (int, rtx);
176 extern bool arm_is_long_call_p (tree);
177 extern int    arm_emit_vector_const (FILE *, rtx);
178 extern void arm_emit_fp16_const (rtx c);
179 extern const char * arm_output_load_gr (rtx *);
180 extern const char *vfp_output_vstmd (rtx *);
181 extern void arm_output_multireg_pop (rtx *, bool, rtx, bool, bool);
182 extern void arm_set_return_address (rtx, rtx);
183 extern int arm_eliminable_register (rtx);
184 extern const char *arm_output_shift(rtx *, int);
185 extern const char *arm_output_iwmmxt_shift_immediate (const char *, rtx *, bool);
186 extern const char *arm_output_iwmmxt_tinsr (rtx *);
187 extern unsigned int arm_sync_loop_insns (rtx , rtx *);
188 extern int arm_attr_length_push_multi(rtx, rtx);
189 extern int arm_attr_length_pop_multi(rtx *, bool, bool);
190 extern void arm_expand_compare_and_swap (rtx op[]);
191 extern void arm_split_compare_and_swap (rtx op[]);
192 extern void arm_split_atomic_op (enum rtx_code, rtx, rtx, rtx, rtx, rtx, rtx);
193 extern rtx arm_load_tp (rtx);
194 extern bool arm_coproc_builtin_available (enum unspecv);
195 extern bool arm_coproc_ldc_stc_legitimate_address (rtx);
196 
197 #if defined TREE_CODE
198 extern void arm_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree);
199 extern bool arm_pad_reg_upward (machine_mode, tree, int);
200 #endif
201 extern int arm_apply_result_size (void);
202 
203 #endif /* RTX_CODE */
204 
205 /* Thumb functions.  */
206 extern void arm_init_expanders (void);
207 extern const char *thumb1_unexpanded_epilogue (void);
208 extern void thumb1_expand_prologue (void);
209 extern void thumb1_expand_epilogue (void);
210 extern const char *thumb1_output_interwork (void);
211 extern int thumb_shiftable_const (unsigned HOST_WIDE_INT);
212 #ifdef RTX_CODE
213 extern enum arm_cond_code maybe_get_arm_condition_code (rtx);
214 extern void thumb1_final_prescan_insn (rtx_insn *);
215 extern void thumb2_final_prescan_insn (rtx_insn *);
216 extern const char *thumb_load_double_from_address (rtx *);
217 extern const char *thumb_output_move_mem_multiple (int, rtx *);
218 extern const char *thumb_call_via_reg (rtx);
219 extern void thumb_expand_cpymemqi (rtx *);
220 extern rtx arm_return_addr (int, rtx);
221 extern void thumb_reload_out_hi (rtx *);
222 extern void thumb_set_return_address (rtx, rtx);
223 extern const char *thumb1_output_casesi (rtx *);
224 extern const char *thumb2_output_casesi (rtx *);
225 #endif
226 
227 /* Defined in pe.c.  */
228 extern int arm_dllexport_name_p (const char *);
229 extern int arm_dllimport_name_p (const char *);
230 
231 #ifdef TREE_CODE
232 extern void arm_pe_unique_section (tree, int);
233 extern void arm_pe_encode_section_info (tree, rtx, int);
234 extern int arm_dllexport_p (tree);
235 extern int arm_dllimport_p (tree);
236 extern void arm_mark_dllexport (tree);
237 extern void arm_mark_dllimport (tree);
238 extern bool arm_change_mode_p (tree);
239 #endif
240 
241 extern tree arm_valid_target_attribute_tree (tree, struct gcc_options *,
242 					     struct gcc_options *);
243 extern void arm_configure_build_target (struct arm_build_target *,
244 					struct cl_target_option *,
245 					struct gcc_options *, bool);
246 extern void arm_option_reconfigure_globals (void);
247 extern void arm_options_perform_arch_sanity_checks (void);
248 extern void arm_pr_long_calls (struct cpp_reader *);
249 extern void arm_pr_no_long_calls (struct cpp_reader *);
250 extern void arm_pr_long_calls_off (struct cpp_reader *);
251 
252 extern const char *arm_mangle_type (const_tree);
253 extern const char *arm_mangle_builtin_type (const_tree);
254 
255 extern void arm_order_regs_for_local_alloc (void);
256 
257 extern int arm_max_conditional_execute ();
258 
259 /* Vectorizer cost model implementation.  */
260 struct cpu_vec_costs {
261   const int scalar_stmt_cost;   /* Cost of any scalar operation, excluding
262 				   load and store.  */
263   const int scalar_load_cost;   /* Cost of scalar load.  */
264   const int scalar_store_cost;  /* Cost of scalar store.  */
265   const int vec_stmt_cost;      /* Cost of any vector operation, excluding
266                                    load, store, vector-to-scalar and
267                                    scalar-to-vector operation.  */
268   const int vec_to_scalar_cost;    /* Cost of vect-to-scalar operation.  */
269   const int scalar_to_vec_cost;    /* Cost of scalar-to-vector operation.  */
270   const int vec_align_load_cost;   /* Cost of aligned vector load.  */
271   const int vec_unalign_load_cost; /* Cost of unaligned vector load.  */
272   const int vec_unalign_store_cost; /* Cost of unaligned vector load.  */
273   const int vec_store_cost;        /* Cost of vector store.  */
274   const int cond_taken_branch_cost;    /* Cost of taken branch for vectorizer
275 					  cost model.  */
276   const int cond_not_taken_branch_cost;/* Cost of not taken branch for
277 					  vectorizer cost model.  */
278 };
279 
280 #ifdef RTX_CODE
281 /* This needs to be here because we need RTX_CODE and similar.  */
282 
283 struct cpu_cost_table;
284 
285 /* Addressing mode operations.  Used to index tables in struct
286    addr_mode_cost_table.  */
287 enum arm_addr_mode_op
288 {
289    AMO_DEFAULT,
290    AMO_NO_WB,	/* Offset with no writeback.  */
291    AMO_WB,	/* Offset with writeback.  */
292    AMO_MAX	/* For array size.  */
293 };
294 
295 /* Table of additional costs in units of COSTS_N_INSNS() when using
296    addressing modes for each access type.  */
297 struct addr_mode_cost_table
298 {
299    const int integer[AMO_MAX];
300    const int fp[AMO_MAX];
301    const int vector[AMO_MAX];
302 };
303 
304 /* Dump function ARM_PRINT_TUNE_INFO should be updated whenever this
305    structure is modified.  */
306 
307 struct tune_params
308 {
309   const struct cpu_cost_table *insn_extra_cost;
310   const struct addr_mode_cost_table *addr_mode_costs;
311   bool (*sched_adjust_cost) (rtx_insn *, int, rtx_insn *, int *);
312   int (*branch_cost) (bool, bool);
313   /* Vectorizer costs.  */
314   const struct cpu_vec_costs* vec_costs;
315   int constant_limit;
316   /* Maximum number of instructions to conditionalise.  */
317   int max_insns_skipped;
318   /* Maximum number of instructions to inline calls to memset.  */
319   int max_insns_inline_memset;
320   /* Issue rate of the processor.  */
321   unsigned int issue_rate;
322   /* Explicit prefetch data.  */
323   struct
324     {
325       int num_slots;
326       int l1_cache_size;
327       int l1_cache_line_size;
328     } prefetch;
329   enum {PREF_CONST_POOL_FALSE, PREF_CONST_POOL_TRUE}
330     prefer_constant_pool: 1;
331   /* Prefer STRD/LDRD instructions over PUSH/POP/LDM/STM.  */
332   enum {PREF_LDRD_FALSE, PREF_LDRD_TRUE} prefer_ldrd_strd: 1;
333   /* The preference for non short cirtcuit operation when optimizing for
334      performance. The first element covers Thumb state and the second one
335      is for ARM state.  */
336   enum log_op_non_short_circuit {LOG_OP_NON_SHORT_CIRCUIT_FALSE,
337 				 LOG_OP_NON_SHORT_CIRCUIT_TRUE};
338   log_op_non_short_circuit logical_op_non_short_circuit_thumb: 1;
339   log_op_non_short_circuit logical_op_non_short_circuit_arm: 1;
340   /* Prefer 32-bit encoding instead of flag-setting 16-bit encoding.  */
341   enum {DISPARAGE_FLAGS_NEITHER, DISPARAGE_FLAGS_PARTIAL, DISPARAGE_FLAGS_ALL}
342     disparage_flag_setting_t16_encodings: 2;
343   /* Prefer to inline string operations like memset by using Neon.  */
344   enum {PREF_NEON_STRINGOPS_FALSE, PREF_NEON_STRINGOPS_TRUE}
345     string_ops_prefer_neon: 1;
346   /* Bitfield encoding the fusible pairs of instructions.  Use FUSE_OPS
347      in an initializer if multiple fusion operations are supported on a
348      target.  */
349   enum fuse_ops
350   {
351     FUSE_NOTHING   = 0,
352     FUSE_MOVW_MOVT = 1 << 0,
353     FUSE_AES_AESMC = 1 << 1
354   } fusible_ops: 2;
355   /* Depth of scheduling queue to check for L2 autoprefetcher.  */
356   enum {SCHED_AUTOPREF_OFF, SCHED_AUTOPREF_RANK, SCHED_AUTOPREF_FULL}
357     sched_autopref: 2;
358 };
359 
360 /* Smash multiple fusion operations into a type that can be used for an
361    initializer.  */
362 #define FUSE_OPS(x) ((tune_params::fuse_ops) (x))
363 
364 extern const struct tune_params *current_tune;
365 extern int vfp3_const_double_for_fract_bits (rtx);
366 /* return power of two from operand, otherwise 0.  */
367 extern int vfp3_const_double_for_bits (rtx);
368 
369 extern void arm_emit_coreregs_64bit_shift (enum rtx_code, rtx, rtx, rtx, rtx,
370 					   rtx);
371 extern bool arm_fusion_enabled_p (tune_params::fuse_ops);
372 extern bool arm_valid_symbolic_address_p (rtx);
373 extern bool arm_validize_comparison (rtx *, rtx *, rtx *);
374 #endif /* RTX_CODE */
375 
376 extern bool arm_gen_setmem (rtx *);
377 extern void arm_expand_vec_perm (rtx target, rtx op0, rtx op1, rtx sel);
378 
379 extern bool arm_autoinc_modes_ok_p (machine_mode, enum arm_auto_incmodes);
380 
381 extern void arm_emit_eabi_attribute (const char *, int, int);
382 
383 extern void arm_reset_previous_fndecl (void);
384 extern void save_restore_target_globals (tree);
385 
386 /* Defined in gcc/common/config/arm-common.c.  */
387 extern const char *arm_rewrite_selected_cpu (const char *name);
388 
389 /* Defined in gcc/common/config/arm-c.c.  */
390 extern void arm_lang_object_attributes_init (void);
391 extern void arm_register_target_pragmas (void);
392 extern void arm_cpu_cpp_builtins (struct cpp_reader *);
393 
394 /* Defined in arm-d.c  */
395 extern void arm_d_target_versions (void);
396 
397 extern bool arm_is_constant_pool_ref (rtx);
398 
399 /* The bits in this mask specify which instruction scheduling options should
400    be used.  */
401 extern unsigned int tune_flags;
402 
403 /* Nonzero if this chip supports the ARM Architecture 4 extensions.  */
404 extern int arm_arch4;
405 
406 /* Nonzero if this chip supports the ARM Architecture 4t extensions.  */
407 extern int arm_arch4t;
408 
409 /* Nonzero if this chip supports the ARM Architecture 5t extensions.  */
410 extern int arm_arch5t;
411 
412 /* Nonzero if this chip supports the ARM Architecture 5te extensions.  */
413 extern int arm_arch5te;
414 
415 /* Nonzero if this chip supports the ARM Architecture 6 extensions.  */
416 extern int arm_arch6;
417 
418 /* Nonzero if this chip supports the ARM 6K extensions.  */
419 extern int arm_arch6k;
420 
421 /* Nonzero if this chip supports the ARM 6KZ extensions.  */
422 extern int arm_arch6kz;
423 
424 /* Nonzero if instructions present in ARMv6-M can be used.  */
425 extern int arm_arch6m;
426 
427 /* Nonzero if this chip supports the ARM 7 extensions.  */
428 extern int arm_arch7;
429 
430 /* Nonzero if this chip supports the Large Physical Address Extension.  */
431 extern int arm_arch_lpae;
432 
433 /* Nonzero if instructions not present in the 'M' profile can be used.  */
434 extern int arm_arch_notm;
435 
436 /* Nonzero if instructions present in ARMv7E-M can be used.  */
437 extern int arm_arch7em;
438 
439 /* Nonzero if instructions present in ARMv8 can be used.  */
440 extern int arm_arch8;
441 
442 /* Nonzero if this chip can benefit from load scheduling.  */
443 extern int arm_ld_sched;
444 
445 /* Nonzero if this chip is a StrongARM.  */
446 extern int arm_tune_strongarm;
447 
448 /* Nonzero if this chip supports Intel Wireless MMX technology.  */
449 extern int arm_arch_iwmmxt;
450 
451 /* Nonzero if this chip supports Intel Wireless MMX2 technology.  */
452 extern int arm_arch_iwmmxt2;
453 
454 /* Nonzero if this chip is an XScale.  */
455 extern int arm_arch_xscale;
456 
457 /* Nonzero if tuning for XScale  */
458 extern int arm_tune_xscale;
459 
460 /* Nonzero if we want to tune for stores that access the write-buffer.
461    This typically means an ARM6 or ARM7 with MMU or MPU.  */
462 extern int arm_tune_wbuf;
463 
464 /* Nonzero if tuning for Cortex-A9.  */
465 extern int arm_tune_cortex_a9;
466 
467 /* Nonzero if we should define __THUMB_INTERWORK__ in the
468    preprocessor.
469    XXX This is a bit of a hack, it's intended to help work around
470    problems in GLD which doesn't understand that armv5t code is
471    interworking clean.  */
472 extern int arm_cpp_interwork;
473 
474 /* Nonzero if chip supports Thumb 1.  */
475 extern int arm_arch_thumb1;
476 
477 /* Nonzero if chip supports Thumb 2.  */
478 extern int arm_arch_thumb2;
479 
480 /* Nonzero if chip supports integer division instruction.  */
481 extern int arm_arch_arm_hwdiv;
482 extern int arm_arch_thumb_hwdiv;
483 
484 /* Nonzero if chip disallows volatile memory access in IT block.  */
485 extern int arm_arch_no_volatile_ce;
486 
487 /* Structure defining the current overall architectural target and tuning.  */
488 struct arm_build_target
489 {
490   /* Name of the target CPU, if known, or NULL if the target CPU was not
491      specified by the user (and inferred from the -march option).  */
492   const char *core_name;
493   /* Name of the target ARCH.  NULL if there is a selected CPU.  */
494   const char *arch_name;
495   /* Preprocessor substring (never NULL).  */
496   const char *arch_pp_name;
497   /* The base architecture value.  */
498   enum base_architecture base_arch;
499   /* The profile letter for the architecture, upper case by convention.  */
500   char profile;
501   /* Bitmap encapsulating the isa_bits for the target environment.  */
502   sbitmap isa;
503   /* Flags used for tuning.  Long term, these move into tune_params.  */
504   unsigned int tune_flags;
505   /* Tables with more detailed tuning information.  */
506   const struct tune_params *tune;
507   /* CPU identifier for the tuning target.  */
508   enum processor_type tune_core;
509 };
510 
511 extern struct arm_build_target arm_active_target;
512 
513 /* Table entry for a CPU alias.  */
514 struct cpu_alias
515 {
516   /* The alias name.  */
517   const char *const name;
518   /* True if the name should be displayed in help text listing cpu names.  */
519   bool visible;
520 };
521 
522 /* Table entry for an architectural feature extension.  */
523 struct cpu_arch_extension
524 {
525   /* Feature name.  */
526   const char *const name;
527   /* True if the option is negative (removes extensions).  */
528   bool remove;
529   /* True if the option is an alias for another option with identical effect;
530      the option will be ignored for canonicalization.  */
531   bool alias;
532   /* The modifier bits.  */
533   const enum isa_feature isa_bits[isa_num_bits];
534 };
535 
536 /* Common elements of both CPU and architectural options.  */
537 struct cpu_arch_option
538 {
539   /* Name for this option.  */
540   const char *name;
541   /* List of feature extensions permitted.  */
542   const struct cpu_arch_extension *extensions;
543   /* Standard feature bits.  */
544   enum isa_feature isa_bits[isa_num_bits];
545 };
546 
547 /* Table entry for an architecture entry.  */
548 struct arch_option
549 {
550   /* Common option fields.  */
551   cpu_arch_option common;
552   /* Short string for this architecture.  */
553   const char *arch;
554   /* Base architecture, from which this specific architecture is derived.  */
555   enum base_architecture base_arch;
556   /* The profile letter for the architecture, upper case by convention.  */
557   const char profile;
558   /* Default tune target (in the absence of any more specific data).  */
559   enum processor_type tune_id;
560 };
561 
562 /* Table entry for a CPU entry.  */
563 struct cpu_option
564 {
565   /* Common option fields.  */
566   cpu_arch_option common;
567   /* List of aliases for this CPU.  */
568   const struct cpu_alias *aliases;
569   /* Architecture upon which this CPU is based.  */
570   enum arch_type arch;
571 };
572 
573 extern const arch_option all_architectures[];
574 extern const cpu_option all_cores[];
575 
576 const cpu_option *arm_parse_cpu_option_name (const cpu_option *, const char *,
577 					     const char *, bool = true);
578 const arch_option *arm_parse_arch_option_name (const arch_option *,
579 					       const char *, const char *, bool = true);
580 void arm_parse_option_features (sbitmap, const cpu_arch_option *,
581 				const char *);
582 
583 void arm_initialize_isa (sbitmap, const enum isa_feature *);
584 
585 const char * arm_gen_far_branch (rtx *, int, const char * , const char *);
586 
587 bool arm_mve_immediate_check(rtx, machine_mode, bool);
588 #endif /* ! GCC_ARM_PROTOS_H */
589