1 /* { dg-do run { target { aarch64_sve_hw } } } */ 2 /* { dg-options "-O2 -ftree-vectorize -ffast-math" } */ 3 4 #include "reduc_1.c" 5 6 #define NUM_ELEMS(TYPE) (73 + sizeof (TYPE)) 7 8 #define INIT_VECTOR(TYPE) \ 9 TYPE a[NUM_ELEMS (TYPE) + 1]; \ 10 for (int i = 0; i < NUM_ELEMS (TYPE) + 1; i++) \ 11 { \ 12 a[i] = ((i * 2) * (i & 1 ? 1 : -1) | 3); \ 13 asm volatile ("" ::: "memory"); \ 14 } 15 16 #define TEST_REDUC_PLUS(TYPE) \ 17 { \ 18 INIT_VECTOR (TYPE); \ 19 TYPE r1 = reduc_plus_##TYPE (a, NUM_ELEMS (TYPE)); \ 20 volatile TYPE r2 = 0; \ 21 for (int i = 0; i < NUM_ELEMS (TYPE); ++i) \ 22 r2 += a[i]; \ 23 if (r1 != r2) \ 24 __builtin_abort (); \ 25 } 26 27 #define TEST_REDUC_MAXMIN(TYPE, NAME, CMP_OP) \ 28 { \ 29 INIT_VECTOR (TYPE); \ 30 TYPE r1 = reduc_##NAME##_##TYPE (a, NUM_ELEMS (TYPE)); \ 31 volatile TYPE r2 = 13; \ 32 for (int i = 0; i < NUM_ELEMS (TYPE); ++i) \ 33 r2 = a[i] CMP_OP r2 ? a[i] : r2; \ 34 if (r1 != r2) \ 35 __builtin_abort (); \ 36 } 37 38 #define TEST_REDUC_BITWISE(TYPE, NAME, BIT_OP) \ 39 { \ 40 INIT_VECTOR (TYPE); \ 41 TYPE r1 = reduc_##NAME##_##TYPE (a, NUM_ELEMS (TYPE)); \ 42 volatile TYPE r2 = 13; \ 43 for (int i = 0; i < NUM_ELEMS (TYPE); ++i) \ 44 r2 BIT_OP a[i]; \ 45 if (r1 != r2) \ 46 __builtin_abort (); \ 47 } 48 main()49int main () 50 { 51 TEST_PLUS (TEST_REDUC_PLUS) 52 TEST_MAXMIN (TEST_REDUC_MAXMIN) 53 TEST_BITWISE (TEST_REDUC_BITWISE) 54 55 return 0; 56 } 57