12021-10-06 Patrick Palka <ppalka@redhat.com> 2 3 Backported from master: 4 2021-09-24 Patrick Palka <ppalka@redhat.com> 5 6 PR c++/98216 7 PR c++/91292 8 * real.c (encode_ieee_double): Avoid unwanted sign extension. 9 (encode_ieee_quad): Likewise. 10 112021-10-05 Ilya Leoshkevich <iii@linux.ibm.com> 12 13 Backported from master: 14 2021-07-16 Ilya Leoshkevich <iii@linux.ibm.com> 15 16 * config/s390/predicates.md (bras_sym_operand): Accept all 17 functions in 64-bit mode, use UNSPEC_PLT31. 18 (larl_operand): Use UNSPEC_PLT31. 19 * config/s390/s390.c (s390_loadrelative_operand_p): Likewise. 20 (legitimize_pic_address): Likewise. 21 (s390_emit_tls_call_insn): Mark __tls_get_offset as function, 22 use UNSPEC_PLT31. 23 (s390_delegitimize_address): Use UNSPEC_PLT31. 24 (s390_output_addr_const_extra): Likewise. 25 (print_operand): Add @PLT to TLS calls, handle %K. 26 (s390_function_profiler): Mark __fentry__/_mcount as function, 27 use %K, use UNSPEC_PLT31. 28 (s390_output_mi_thunk): Use only UNSPEC_GOT, use %K. 29 (s390_emit_call): Use UNSPEC_PLT31. 30 (s390_emit_tpf_eh_return): Mark __tpf_eh_return as function. 31 * config/s390/s390.md (UNSPEC_PLT31): Rename from UNSPEC_PLT. 32 (*movdi_64): Use %K. 33 (reload_base_64): Likewise. 34 (*sibcall_brc): Likewise. 35 (*sibcall_brcl): Likewise. 36 (*sibcall_value_brc): Likewise. 37 (*sibcall_value_brcl): Likewise. 38 (*bras): Likewise. 39 (*brasl): Likewise. 40 (*bras_r): Likewise. 41 (*brasl_r): Likewise. 42 (*bras_tls): Likewise. 43 (*brasl_tls): Likewise. 44 (main_base_64): Likewise. 45 (reload_base_64): Likewise. 46 (@split_stack_call<mode>): Likewise. 47 482021-10-05 Ilya Leoshkevich <iii@linux.ibm.com> 49 50 Backported from master: 51 2021-06-24 Ilya Leoshkevich <iii@linux.ibm.com> 52 53 * config/s390/s390.c (s390_function_profiler): Ignore labelno 54 parameter. 55 * config/s390/s390.h (NO_PROFILE_COUNTERS): Define. 56 572021-10-04 Eric Botcazou <ebotcazou@adacore.com> 58 59 * config/rs6000/vxworks.h (TARGET_INIT_LIBFUNCS): Delete. 60 612021-10-01 John David Anglin <danglin@gcc.gnu.org> 62 63 PR debug/102373 64 * config/pa/pa.c (pa_option_override): Default to dwarf version 4 65 on hppa64-hpux. 66 672021-10-01 Eric Botcazou <ebotcazou@adacore.com> 68 69 * explow.c: Include langhooks.h. 70 (set_stack_check_libfunc): Build a proper function type. 71 722021-10-01 Eric Botcazou <ebotcazou@adacore.com> 73 74 PR c++/64697 75 * config/i386/i386.c (legitimate_pic_address_disp_p): For PE-COFF do 76 not return true for external weak function symbols in medium model. 77 782021-09-29 Peter Bergner <bergner@linux.ibm.com> 79 80 Backported from master: 81 2021-09-14 Peter Bergner <bergner@linux.ibm.com> 82 83 * config/rs6000/mma.md (unspec): Delete UNSPEC_MMA_XXSETACCZ. 84 (unspecv): Add UNSPECV_MMA_XXSETACCZ. 85 (*mma_xxsetaccz): Delete. 86 (mma_xxsetaccz): Change to define_insn. Remove operand 1. 87 Use UNSPECV_MMA_XXSETACCZ. Update comment. 88 * config/rs6000/rs6000.c (rs6000_rtx_costs): Use UNSPECV_MMA_XXSETACCZ. 89 902021-09-28 Jakub Jelinek <jakub@redhat.com> 91 92 Backported from master: 93 2021-09-28 Jakub Jelinek <jakub@redhat.com> 94 95 PR target/102498 96 * config/i386/i386.c (standard_80387_constant_p): Don't recognize 97 special 80387 instruction XFmode constants if flag_rounding_math. 98 992021-09-24 Feng Xue <fxue@os.amperecomputing.com> 100 101 PR tree-optimization/102400 102 * tree-ssa-sccvn.c (vn_reference_insert_pieces): Initialize 103 result_vdef to zero value. 104 1052021-09-24 Feng Xue <fxue@os.amperecomputing.com> 106 107 PR tree-optimization/102451 108 * tree-ssa-dse.c (delete_dead_or_redundant_call): Record bb of stmt 109 before removal. 110 1112021-09-22 Andreas Krebbel <krebbel@linux.ibm.com> 112 113 Backported from master: 114 2021-09-22 Andreas Krebbel <krebbel@linux.ibm.com> 115 116 * config/s390/tpf.md (prologue_tpf, epilogue_tpf): Add cc clobber. 117 1182021-09-22 Andreas Krebbel <krebbel@linux.ibm.com> 119 120 Backported from master: 121 2021-09-22 Andreas Krebbel <krebbel@linux.ibm.com> 122 123 PR target/102222 124 * config/s390/s390.c (s390_expand_insv): Emit a normal move if it 125 is actually a full copy of the source operand into the target. 126 Don't emit a strict low part move if source and target mode match. 127 1282021-09-22 Kewen Lin <linkw@linux.ibm.com> 129 130 * ipa-fnsummary.c (inline_read_section): Unpack a dummy bit 131 to keep consistent with the side of streaming out. 132 1332021-09-21 Segher Boessenkool <segher@kernel.crashing.org> 134 135 Backported from master: 136 2021-09-08 Segher Boessenkool <segher@kernel.crashing.org> 137 138 PR target/102107 139 * config/rs6000/rs6000-logue.c (rs6000_emit_epilogue): For ELFv2 use 140 r11 instead of r12 for restoring CR. 141 1422021-09-21 Segher Boessenkool <segher@kernel.crashing.org> 143 144 Backported from master: 145 2021-09-03 Segher Boessenkool <segher@kernel.crashing.org> 146 147 PR target/102107 148 * config/rs6000/rs6000-logue.c (rs6000_emit_prologue): On ELFv2 use r11 149 instead of r12 for CR save, in all cases. 150 1512021-09-17 Eric Botcazou <ebotcazou@adacore.com> 152 153 PR rtl-optimization/102306 154 * combine.c (try_combine): Abort the combination if we are about to 155 duplicate volatile references. 156 1572021-09-16 Daniel Cederman <cederman@gaisler.com> 158 159 * config/sparc/sparc-opts.h (enum sparc_processor_type): Add LEON5 160 * config/sparc/sparc.c (struct processor_costs): Add LEON5 costs 161 (leon5_adjust_cost): Increase cost of store with data dependency 162 on ALU instruction and FPU anti-dependencies. 163 (sparc_option_override): Add LEON5 costs 164 (sparc_adjust_cost): Add LEON5 cost adjustments 165 * config/sparc/sparc.h: Add LEON5 166 * config/sparc/sparc.md: Include LEON5 scheduling information 167 * config/sparc/sparc.opt: Add LEON5 168 * doc/invoke.texi: Add LEON5 169 * config/sparc/leon5.md: New file. 170 1712021-09-16 Daniel Cederman <cederman@gaisler.com> 172 173 * config/sparc/sparc.md (stack_protect_setsi): Add NOP to prevent 174 sensitive sequence for B2BST errata workaround. 175 1762021-09-16 Daniel Cederman <cederman@gaisler.com> 177 178 * config/sparc/sparc.c (sparc_do_work_around_errata): Do not begin 179 functions with atomic instruction in the UT700 errata workaround. 180 1812021-09-16 Daniel Cederman <cederman@gaisler.com> 182 183 * config/sparc/sparc.c (next_active_non_empty_insn): New function 184 that returns next active non empty assembly instruction. 185 (sparc_do_work_around_errata): Use new function. 186 1872021-09-16 Daniel Cederman <cederman@gaisler.com> 188 189 * config/sparc/sparc.c (store_insn_p): Add predicate for store 190 attributes. 191 (load_insn_p): Add predicate for load attributes. 192 (sparc_do_work_around_errata): Use new predicates. 193 1942021-09-16 Andreas Larsson <andreas@gaisler.com> 195 196 * config/sparc/sparc.c (dump_target_flag_bits): Print bit names for 197 LEON and LEON3. 198 1992021-09-16 Andrew Pinski <apinski@marvell.com> 200 201 Backported from master: 202 2021-09-01 Andrew Pinski <apinski@marvell.com> 203 204 PR target/101934 205 * config/aarch64/aarch64.c (aarch64_expand_setmem): 206 Check STRICT_ALIGNMENT before creating an overlapping 207 store. 208 2092021-09-15 Jakub Jelinek <jakub@redhat.com> 210 211 Backported from master: 212 2021-09-15 Jakub Jelinek <jakub@redhat.com> 213 214 PR c++/88578 215 PR c++/102295 216 * varasm.c (output_constructor_regular_field): Instead of assertion 217 that array_size_for_constructor result is equal to size of 218 TREE_TYPE (local->val) in bytes, assert that the type size is greater 219 or equal to array_size_for_constructor result and use type size as 220 fieldsize. 221 2222021-09-15 Pat Haugen <pthaugen@linux.ibm.com> 223 224 * config/rs6000/rs6000-cpus.def (ISA_3_1_MASKS_SERVER): Add 225 OPTION_MASK_P10_FUSION_2STORE. 226 (POWERPC_MASKS): Likewise. 227 * config/rs6000/rs6000.c (rs6000_option_override_internal): Enable 228 store fusion for Power10. 229 (is_fusable_store): New. 230 (power10_sched_reorder): Likewise. 231 (rs6000_sched_reorder): Do Power10 specific reordering. 232 (rs6000_sched_reorder2): Likewise. 233 * config/rs6000/rs6000.opt: Add new option. 234 2352021-09-15 Peter Bergner <bergner@linux.ibm.com> 236 237 Backported from master: 238 2021-07-14 Peter Bergner <bergner@linux.ibm.com> 239 240 * config/rs6000/rs6000.c (adjacent_mem_locations): Return the lower 241 addressed memory rtx, if any. 242 (rs6000_split_multireg_move): Fix code formatting. 243 Handle MMA build built-ins with operands in adjacent memory locations. 244 2452021-09-15 Peter Bergner <bergner@linux.ibm.com> 246 247 Backported from master: 248 2021-07-14 Peter Bergner <bergner@linux.ibm.com> 249 250 * config/rs6000/rs6000.c (rs6000_split_multireg_move): Move to later 251 in the file. 252 2532021-09-14 Pat Haugen <pthaugen@linux.ibm.com> 254 255 * config/rs6000/rs6000.c (is_load_insn1): Verify destination is a 256 register. 257 (is_store_insn1): Verify source is a register. 258 2592021-09-14 Xionghu Luo <luoxhu@linux.ibm.com> 260 261 PR target/97142 262 * config/rs6000/rs6000.md (fmod<mode>3): New define_expand. 263 (remainder<mode>3): Likewise. 264 2652021-09-08 Jonathan Wakely <jwakely@redhat.com> 266 267 Backported from master: 268 2021-09-08 Jonathan Wakely <jwakely@redhat.com> 269 270 PR c++/60318 271 * doc/trouble.texi (Copy Assignment): Fix description of 272 behaviour and fix code in example. 273 2742021-09-08 Jakub Jelinek <jakub@redhat.com> 275 276 Backported from master: 277 2021-09-08 Jakub Jelinek <jakub@redhat.com> 278 279 PR target/102224 280 * config/i386/i386.md (xorsign<mode>3): If operands[1] is equal to 281 operands[2], emit abs<mode>2 instead. 282 (@xorsign<mode>3_1): Add early-clobber for output operand. 283 2842021-09-07 Max Filippov <jcmvbkbc@gmail.com> 285 286 Backported from master: 287 2021-09-07 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> 288 289 PR target/102115 290 * config/xtensa/xtensa.c (xtensa_emit_move_sequence): Add 291 'CONST_INT_P (src)' to the condition of the block that tries to 292 eliminate literal when loading integer contant. 293 2942021-09-06 Richard Biener <rguenther@suse.de> 295 296 Backported from master: 297 2021-08-25 Richard Biener <rguenther@suse.de> 298 299 PR tree-optimization/102046 300 * tree-vect-slp.c (vect_build_slp_tree_2): Conservatively 301 update ->any_pattern when swapping operands. 302 3032021-09-06 Richard Biener <rguenther@suse.de> 304 305 Backported from master: 306 2021-08-17 Richard Biener <rguenther@suse.de> 307 308 PR tree-optimization/101925 309 * tree-ssa-sccvn.c (copy_reference_ops_from_ref): Set 310 reverse on COMPONENT_REF and ARRAY_REF according to 311 what reverse_storage_order_for_component_p does. 312 (vn_reference_eq): Compare reversed on reference ops. 313 (reverse_storage_order_for_component_p): New overload. 314 (vn_reference_lookup_3): Check reverse_storage_order_for_component_p 315 on the reference looked up. 316 3172021-09-06 Richard Biener <rguenther@suse.de> 318 319 Backported from master: 320 2021-08-10 Richard Biener <rguenther@suse.de> 321 322 PR middle-end/101824 323 * tree-nested.c (get_frame_field): Mark the COMPONENT_REF as 324 volatile in case the variable was. 325 3262021-09-03 Michael Meissner <meissner@linux.ibm.com> 327 328 * config/rs6000/altivec.md (UNSPEC_XXSPLTIDP): Rename from 329 UNSPEC_XXSPLTID. 330 (xxspltidp_v2df): Likewise. 331 (xxspltidp_v2df_inst): Likewise. 332 3332021-09-03 Michael Meissner <meissner@linux.ibm.com> 334 335 * config/rs6000/altivec.md (xxspltiw_v4si): Use vecperm type 336 attribute. Backport from master, 2021-08-24. 337 (xxspltiw_v4si_inst): Likewise. 338 (xxspltiw_v4sf_inst): Likewise. 339 (xxspltidp_v2df): Likewise. 340 (xxspltidp_v2df_inst): Likewise. 341 (xxsplti32dx_v4si): Likewise. 342 (xxsplti32dx_v4si_inst): Likewise. 343 (xxsplti32dx_v4sf_inst): Likewise. 344 (xxblend_<mode>): Likewise. 345 (xxpermx): Likewise. 346 (xxpermx_inst): Likewise. 347 (xxeval): Likewise. 348 3492021-09-03 liuhongt <hongtao.liu@intel.com> 350 351 PR target/102166 352 * config/i386/amxbf16intrin.h : Remove macro check for __AMX_BF16__. 353 * config/i386/amxint8intrin.h : Remove macro check for __AMX_INT8__. 354 * config/i386/amxtileintrin.h : Remove macro check for __AMX_TILE__. 355 3562021-09-02 Peter Bergner <bergner@linux.ibm.com> 357 358 Backported from master: 359 2021-08-19 Peter Bergner <bergner@linux.ibm.com> 360 361 PR target/101849 362 * config/rs6000/rs6000-call.c (rs6000_gimple_fold_mma_builtin): Cast 363 pointer to __vector_pair *. 364 3652021-09-01 Marek Polacek <polacek@redhat.com> 366 Jakub Jelinek <jakub@redhat.com> 367 368 PR c++/101592 369 * fold-const.c (make_range_step): Return NULL_TREE for NULLPTR_TYPE. 370 3712021-09-01 Jakub Jelinek <jakub@redhat.com> 372 373 Backported from master: 374 2021-09-01 Jakub Jelinek <jakub@redhat.com> 375 376 PR tree-optimization/102124 377 * tree-vect-patterns.c (vect_recog_widen_op_pattern): For ORIG_CODE 378 MINUS_EXPR, if itype is unsigned with smaller precision than type, 379 add an extra cast to signed variant of itype to ensure sign-extension. 380 3812021-08-31 Thomas Schwinge <thomas@codesourcery.com> 382 383 Backported from master: 384 2021-08-31 Thomas Schwinge <thomas@codesourcery.com> 385 386 * tree.c (walk_tree_1) <OMP_CLAUSE_TILE>: Handle three operands. 387 3882021-08-30 Haochen Gui <guihaoc@gcc.gnu.org> 389 390 Backported from master: 391 2021-06-04 Haochen Gui <guihaoc@gcc.gnu.org> 392 393 * config/rs6000/rs6000-call.c (rs6000_promote_function_mode): 394 Replace PROMOTE_MODE marco with its content. 395 3962021-08-30 Haochen Gui <guihaoc@gcc.gnu.org> 397 398 Backported from master: 399 2021-06-04 Haochen Gui <guihaoc@gcc.gnu.org> 400 401 * config/rs6000/rs6000.h (PROMOTE_MODE): Remove. 402 4032021-08-27 konglin1 <lingling.kong@intel.com> 404 405 PR target/101472 406 * config/i386/sse.md: (<avx512>scattersi<mode>): Add mask operand to 407 UNSPEC_VSIBADDR. 408 (<avx512>scattersi<mode>): Likewise. 409 (*avx512f_scattersi<VI48F:mode>): Merge mask operand to set_dest. 410 (*avx512f_scatterdi<VI48F:mode>): Likewise 411 4122021-08-25 H.J. Lu <hjl.tools@gmail.com> 413 414 Backported from master: 415 2021-08-05 H.J. Lu <hjl.tools@gmail.com> 416 417 PR target/99744 418 * config/i386/i386.c (ix86_can_inline_p): Ignore MASK_80387 if 419 callee only uses GPRs. 420 * config/i386/ia32intrin.h: Revert commit 5463cee2770. 421 * config/i386/serializeintrin.h: Revert commit 71958f740f1. 422 * config/i386/x86gprintrin.h: Add 423 #pragma GCC target("general-regs-only") and #pragma GCC pop_options 424 to disable non-GPR ISAs. 425 4262021-08-25 H.J. Lu <hjl.tools@gmail.com> 427 428 Backported from master: 429 2021-07-18 H.J. Lu <hjl.tools@gmail.com> 430 431 PR target/101492 432 * common/config/i386/i386-common.c (ix86_handle_option): For 433 -mgeneral-regs-only, enable the GPR only instructions which are 434 enabled implicitly by SSE ISAs unless they have been disabled 435 explicitly. 436 4372021-08-25 H.J. Lu <hjl.tools@gmail.com> 438 439 Backported from master: 440 2021-07-21 H.J. Lu <hjl.tools@gmail.com> 441 442 PR target/101549 443 * config/i386/i386-builtin.def: Remove OPTION_MASK_ISA_SSE4_2 444 from CRC32 _builtin functions. 445 4462021-08-25 H.J. Lu <hjl.tools@gmail.com> 447 448 Backported from master: 449 2021-04-20 H.J. Lu <hjl.tools@gmail.com> 450 451 * config/i386/i386-c.c (ix86_target_macros_internal): Define 452 __CRC32__ for -mcrc32. 453 * config/i386/i386-options.c (ix86_option_override_internal): 454 Enable crc32 instruction for -msse4.2. 455 * config/i386/i386.md (sse4_2_crc32<mode>): Remove TARGET_SSE4_2 456 check. 457 (sse4_2_crc32di): Likewise. 458 * config/i386/ia32intrin.h: Use crc32 target option for CRC32 459 intrinsics. 460 4612021-08-25 H.J. Lu <hjl.tools@gmail.com> 462 463 Backported from master: 464 2021-04-21 H.J. Lu <hjl.tools@gmail.com> 465 466 * config.gcc: Install mwaitintrin.h for i[34567]86-*-* and 467 x86_64-*-* targets. 468 * lto-streamer.h (LTO_minor_version): Bump. 469 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_MWAIT_SET): 470 New. 471 (OPTION_MASK_ISA2_MWAIT_UNSET): Likewise. 472 (ix86_handle_option): Handle -mmwait. 473 * config/i386/i386-builtins.c (ix86_init_mmx_sse_builtins): 474 Replace OPTION_MASK_ISA_SSE3 with OPTION_MASK_ISA2_MWAIT on 475 __builtin_ia32_monitor and __builtin_ia32_mwait. 476 * config/i386/i386-options.c (isa2_opts): Add -mmwait. 477 (ix86_valid_target_attribute_inner_p): Likewise. 478 (ix86_option_override_internal): Enable mwait/monitor 479 instructions for -msse3. 480 * config/i386/i386.h (TARGET_MWAIT): New. 481 (TARGET_MWAIT_P): Likewise. 482 * config/i386/i386.opt: Add -mmwait. 483 * config/i386/mwaitintrin.h: New file. 484 * config/i386/pmmintrin.h: Include <mwaitintrin.h>. 485 * config/i386/sse.md (sse3_mwait): Replace TARGET_SSE3 with 486 TARGET_MWAIT. 487 (@sse3_monitor_<mode>): Likewise. 488 * config/i386/x86gprintrin.h: Include <mwaitintrin.h>. 489 * doc/extend.texi: Document mwait target attribute. 490 * doc/invoke.texi: Document -mmwait. 491 4922021-08-25 konglin1 <lingling.kong@intel.com> 493 494 PR target/101471 495 * config/i386/avx512dqintrin.h (_mm512_fpclass_ps_mask): Fix 496 macro define in O0. 497 (_mm512_mask_fpclass_ps_mask): Ditto. 498 4992021-08-24 Richard Earnshaw <rearnsha@arm.com> 500 501 Backported from master: 502 2021-08-24 Richard Earnshaw <rearnsha@arm.com> 503 504 PR target/102035 505 * config/arm/arm.md (attribute arch): Add fix_vlldm. 506 (arch_enabled): Use it. 507 * config/arm/vfp.md (lazy_store_multiple_insn): Add alternative to 508 use when erratum mitigation is needed. 509 5102021-08-24 Richard Earnshaw <rearnsha@arm.com> 511 512 Backported from master: 513 2021-08-24 Richard Earnshaw <rearnsha@arm.com> 514 515 PR target/102035 516 * config/arm/arm.opt (mfix-cmse-cve-2021-35465): New option. 517 * doc/invoke.texi (Arm Options): Document it. 518 * config/arm/arm-cpus.in (quirk_vlldm): New feature bit. 519 (ALL_QUIRKS): Add quirk_vlldm. 520 (cortex-m33): Add quirk_vlldm. 521 (cortex-m35p, cortex-m55): Likewise. 522 * config/arm/arm.c (arm_option_override): Enable fix_vlldm if 523 targetting an affected CPU and not explicitly controlled on 524 the command line. 525 5262021-08-24 Richard Earnshaw <rearnsha@arm.com> 527 528 Backported from master: 529 2021-08-24 Richard Earnshaw <rearnsha@arm.com> 530 531 * config/arm/vfp.md (lazy_store_multiple_insn): Rewrite as valid RTL. 532 (lazy_load_multiple_insn): Likewise. 533 5342021-08-24 Jan Hubicka <hubicka@ucw.cz> 535 536 Backported from master: 537 2021-08-23 Jan Hubicka <hubicka@ucw.cz> 538 539 PR middle-end/101949 540 * ipa-modref.c (analyze_ssa_name_flags): Fix merging of 541 EAF_NOCLOBBER 542 5432021-08-24 Jan Hubicka <jh@suse.cz> 544 545 Backported from master: 546 2021-08-22 Jan Hubicka <hubicka@ucw.cz> 547 Martin Liska <mliska@suse.cz> 548 549 PR middle-end/101949 550 * ipa-modref.c (analyze_ssa_name_flags): Indirect call implies 551 ~EAF_NOCLOBBER. 552 5532021-08-24 Richard Biener <rguenther@suse.de> 554 555 Backported from master: 556 2021-08-23 Richard Biener <rguenther@suse.de> 557 558 PR ipa/97565 559 * tree-ssa-structalias.c (ipa_pta_execute): Check in_other_partition 560 in addition to has_gimple_body. 561 5622021-08-23 Christophe Lyon <christophe.lyon@foss.st.com> 563 564 Backported from master: 565 2021-08-23 Christophe Lyon <christophe.lyon@foss.st.com> 566 567 * config/arm/arm_mve.h: Fix __arm_vctp16q return type. 568 5692021-08-23 Jakub Jelinek <jakub@redhat.com> 570 571 Backported from master: 572 2021-08-23 Jakub Jelinek <jakub@redhat.com> 573 574 PR debug/101905 575 * dwarf2out.c (gen_variable_die): Add DW_AT_location for global 576 register variables already during early_dwarf if possible. 577 5782021-08-23 Martin Liska <mliska@suse.cz> 579 580 Backported from master: 581 2021-08-20 Martin Liska <mliska@suse.cz> 582 583 PR gcov-profile/89961 584 * gcov.c (make_gcov_file_name): Rewrite using std::string. 585 (mangle_name): Simplify, do not used the second argument. 586 (strip_extention): New function. 587 (get_md5sum): Likewise. 588 (get_gcov_intermediate_filename): Handle properly -p and -x 589 options. 590 (output_gcov_file): Use string type. 591 (generate_results): Likewise. 592 (md5sum_to_hex): Remove. 593 5942021-08-18 Richard Earnshaw <rearnsha@arm.com> 595 596 Backported from master: 597 2021-08-05 Richard Earnshaw <rearnsha@arm.com> 598 599 PR target/101723 600 * config/arm/arm-cpus.in (generic-armv7-a): Add quirk to suppress 601 writing .cpu directive in asm output. 602 * config/arm/arm.c (arm_identify_fpu_from_isa): New variable. 603 (arm_last_printed_arch_string): Delete. 604 (arm_last-printed_fpu_string): Delete. 605 (arm_configure_build_target): If use of floating-point/SIMD is 606 disabled, remove all fp/simd related features from the target ISA. 607 (last_arm_targ_options): New variable. 608 (arm_print_asm_arch_directives): Add new parameters. Change order 609 of emitted directives and handle all cases here. 610 (arm_file_start): Always call arm_print_asm_arch_directives, move 611 all generation of .arch/.arch_extension here. 612 (arm_file_end): Call arm_print_asm_arch. 613 (arm_declare_function_name): Call arm_print_asm_arch_directives 614 instead of printing .arch/.fpu directives directly. 615 6162021-08-18 Richard Earnshaw <rearnsha@arm.com> 617 618 Backported from master: 619 2021-08-05 Richard Earnshaw <rearnsha@arm.com> 620 621 * config/arm/arm.c (arm_configure_build_target): Don't call 622 arm_option_reconfigure_globals. 623 (arm_option_restore): Call arm_option_reconfigure_globals after 624 reconfiguring the target. 625 * config/arm/arm-c.c (arm_pragma_target_parse): Likewise. 626 6272021-08-18 Richard Earnshaw <rearnsha@arm.com> 628 629 Backported from master: 630 2021-08-05 Richard Earnshaw <rearnsha@arm.com> 631 632 * config/arm/arm.c (arm_configure_build_target): Ensure the target's 633 arch_name is always set. 634 6352021-08-17 Richard Biener <rguenther@suse.de> 636 637 PR tree-optimization/101373 638 PR tree-optimization/101868 639 * tree-ssa-pre.c (prune_clobbered_mems): Also prune trapping 640 references when the BB may not return. 641 6422021-08-16 Eric Botcazou <ebotcazou@gcc.gnu.org> 643 644 * dwarf2out.c (add_scalar_info): Deal with DW_AT_data_bit_offset. 645 6462021-08-16 Martin Liska <mliska@suse.cz> 647 648 PR ipa/100600 649 * ipa-icf-gimple.c (func_checker::compare_ssa_name): Do not 650 consider equal SSA_NAMEs when one is a param. 651 6522021-08-16 Martin Liska <mliska@suse.cz> 653 654 PR ipa/101261 655 * symtab.c (symtab_node::noninterposable_alias): Do not create 656 local aliases for target_clone functions as the clonning pass 657 rejects aliases. 658 6592021-08-16 Martin Liska <mliska@suse.cz> 660 661 PR ipa/101726 662 * multiple_target.c (create_dispatcher_calls): Make default 663 function local only if it is a definition. 664 6652021-08-16 Martin Liska <mliska@suse.cz> 666 667 PR c/100150 668 * lto-streamer.h (LTO_minor_version): Bump. 669 6702021-08-13 Martin Liska <mliska@suse.cz> 671 672 PR gcov-profile/100788 673 * coverage.c (coverage_begin_function): Update function 674 beginning when #line macro is used. 675 6762021-08-12 Jakub Jelinek <jakub@redhat.com> 677 678 Backported from master: 679 2021-07-28 Jakub Jelinek <jakub@redhat.com> 680 681 PR middle-end/101624 682 * ubsan.c (maybe_instrument_pointer_overflow, 683 instrument_object_size): Only test DECL_REGISTER on VAR_DECLs, 684 PARM_DECLs or RESULT_DECLs. 685 * sanopt.c (maybe_optimize_ubsan_ptr_ifn): Likewise. 686 6872021-08-12 Eric Botcazou <ebotcazou@gcc.gnu.org> 688 689 * configure.ac (PE linker --disable-dynamicbase support): New check. 690 * configure: Regenerate. 691 * config.in: Likewise. 692 * config/i386/mingw32.h (LINK_SPEC_DISABLE_DYNAMICBASE): New define. 693 (LINK_SPEC): Use it. 694 * config/i386/mingw-w64.h (LINK_SPEC_DISABLE_DYNAMICBASE): Likewise. 695 (LINK_SPEC): Likewise. 696 6972021-08-06 Richard Sandiford <richard.sandiford@arm.com> 698 699 Backported from master: 700 2021-08-03 Richard Sandiford <richard.sandiford@arm.com> 701 702 * doc/invoke.texi: Document -mtune=neoverse-512tvb and 703 -mcpu=neoverse-512tvb. 704 * config/aarch64/aarch64-cores.def (neoverse-512tvb): New entry. 705 * config/aarch64/aarch64-tune.md: Regenerate. 706 * config/aarch64/aarch64.c (neoverse512tvb_sve_vector_cost) 707 (neoverse512tvb_sve_issue_info, neoverse512tvb_vec_issue_info) 708 (neoverse512tvb_vector_cost, neoverse512tvb_tunings): New structures. 709 (aarch64_adjust_body_cost_sve): Handle -mtune=neoverse-512tvb. 710 (aarch64_adjust_body_cost): Likewise. 711 7122021-08-06 Richard Sandiford <richard.sandiford@arm.com> 713 714 Backported from master: 715 2021-08-03 Richard Sandiford <richard.sandiford@arm.com> 716 717 * config/aarch64/aarch64.c (aarch64_add_stmt_cost): Only 718 record issue information for operations that occur in the 719 innermost loop. 720 7212021-08-06 Richard Sandiford <richard.sandiford@arm.com> 722 723 Backported from master: 724 2021-08-03 Richard Sandiford <richard.sandiford@arm.com> 725 726 * config/aarch64/aarch64.c (aarch64_multiply_add_p): Add a vec_flags 727 parameter. Detect cases in which an Advanced SIMD MLA would almost 728 certainly require a MOV. 729 (aarch64_count_ops): Update accordingly. 730 7312021-08-06 Richard Sandiford <richard.sandiford@arm.com> 732 733 Backported from master: 734 2021-08-03 Richard Sandiford <richard.sandiford@arm.com> 735 736 * config/aarch64/aarch64.c (aarch64_is_store_elt_extraction): New 737 function, split out from... 738 (aarch64_detect_vector_stmt_subtype): ...here. 739 (aarch64_add_stmt_cost): Treat extracting element 0 as free. 740 7412021-08-06 Richard Sandiford <richard.sandiford@arm.com> 742 743 Backported from master: 744 2021-08-03 Richard Sandiford <richard.sandiford@arm.com> 745 746 * config/aarch64/aarch64-protos.h (sve_vec_cost): 747 Add gather_load_x32_cost and gather_load_x64_cost. 748 * config/aarch64/aarch64.c (generic_sve_vector_cost) 749 (a64fx_sve_vector_cost, neoversev1_sve_vector_cost): Update 750 accordingly, using the values given by the scalar_load * number 751 of elements calculation that we used previously. 752 (aarch64_detect_vector_stmt_subtype): Use the new fields. 753 7542021-08-06 Richard Sandiford <richard.sandiford@arm.com> 755 756 Backported from master: 757 2021-08-03 Richard Sandiford <richard.sandiford@arm.com> 758 759 * config/aarch64/aarch64.c (aarch64_adjust_body_cost_sve): New 760 function, split out from... 761 (aarch64_adjust_body_cost): ...here. 762 7632021-08-06 Richard Sandiford <richard.sandiford@arm.com> 764 765 Backported from master: 766 2021-08-03 Richard Sandiford <richard.sandiford@arm.com> 767 768 * config/aarch64/fractional-cost.h: New file. 769 * config/aarch64/aarch64.c: Include <algorithm> (indirectly) 770 and cost_fraction.h. 771 (vec_cost_fraction): New typedef. 772 (aarch64_detect_scalar_stmt_subtype): Use it for statement costs. 773 (aarch64_detect_vector_stmt_subtype): Likewise. 774 (aarch64_sve_adjust_stmt_cost, aarch64_adjust_stmt_cost): Likewise. 775 (aarch64_estimate_min_cycles_per_iter): Use vec_cost_fraction 776 for cycle counts. 777 (aarch64_adjust_body_cost): Likewise. 778 (aarch64_test_cost_fraction): New function. 779 (aarch64_run_selftests): Call it. 780 7812021-08-06 Richard Sandiford <richard.sandiford@arm.com> 782 783 Backported from master: 784 2021-08-03 Richard Sandiford <richard.sandiford@arm.com> 785 786 * config/aarch64/aarch64-protos.h (tune_params::sve_width): Turn 787 into a bitmask. 788 * config/aarch64/aarch64.c (aarch64_cmp_autovec_modes): Update 789 accordingly. 790 (aarch64_estimated_poly_value): Likewise. Use the least significant 791 set bit for the minimum and likely values. Use the most significant 792 set bit for the maximum value. 793 7942021-08-06 Richard Biener <rguenther@suse.de> 795 796 Backported from master: 797 2021-07-19 Richard Biener <rguenther@suse.de> 798 799 PR tree-optimization/101505 800 * tree-vect-patterns.c (vect_determine_precisions): Walk 801 PHIs also for loop vectorization. 802 8032021-08-02 Haochen Gui <guihaoc@gcc.gnu.org> 804 805 Backported from master: 806 2021-07-23 Haochen Gui <guihaoc@gcc.gnu.org> 807 808 PR target/100952 809 * config/rs6000/rs6000.md (cstore<mode>4): Fix wrong fall through. 810 8112021-07-30 Xi Ruoyao <xry111@mengyan1223.wang> 812 813 Backported from master: 814 2021-07-30 Xi Ruoyao <xry111@mengyan1223.wang> 815 816 PR target/94780 817 * config/mips/mips.c (mips_atomic_assign_expand_fenv): Use 818 TARGET_EXPR instead of MODIFY_EXPR. 819 8202021-07-30 Xi Ruoyao <xry111@mengyan1223.wang> 821 822 Backported from master: 823 2021-07-30 Xi Ruoyao <xry111@mengyan1223.wang> 824 825 PR target/101132 826 * config/mips/mips-protos.h (mips_expand_vec_cmp_expr): Declare. 827 * config/mips/mips.c (mips_expand_vec_cmp_expr): New function. 828 * config/mips/mips-msa.md (vec_cmp<MSA:mode><mode_i>): New 829 expander. 830 (vec_cmpu<IMSA:mode><mode_i>): New expander. 831 8322021-07-28 Martin Uecker <muecker@gwdg.de> 833 834 * calls.c (maybe_warn_rdwr_sizes): Correct argument 835 numbers in warning that were switched. 836 8372021-07-28 Jakub Jelinek <jakub@redhat.com> 838 839 Backported from master: 840 2021-07-27 Jakub Jelinek <jakub@redhat.com> 841 842 PR middle-end/101586 843 * gimple-fold.c (clear_padding_type): Ignore FIELD_DECLs with byte 844 positions above or equal to sz except for diagnostics of flexible 845 array members. 846 8472021-07-28 Jakub Jelinek <jakub@redhat.com> 848 849 Backported from master: 850 2021-07-23 Jakub Jelinek <jakub@redhat.com> 851 852 PR rtl-optimization/101562 853 * expmed.c (store_integral_bit_field): Only use movstrict_optab 854 if the operand isn't paradoxical. 855 8562021-07-28 Release Manager 857 858 * GCC 11.2.0 released. 859 8602021-07-21 Jakub Jelinek <jakub@redhat.com> 861 862 Backported from master: 863 2021-07-21 Jakub Jelinek <jakub@redhat.com> 864 865 PR middle-end/101535 866 * gimplify.c (omp_check_private): Properly skip ORT_TARGET_DATA 867 contexts in which decl isn't privatized and for ORT_TARGET return 868 false if decl is mapped. 869 8702021-07-20 Jakub Jelinek <jakub@redhat.com> 871 872 PR target/101384 873 * config/rs6000/rs6000.c (vspltis_constant): Accept EASY_VECTOR_MSB 874 only if step and copies are equal to 1. 875 8762021-07-20 Iain Sandoe <iain@sandoe.co.uk> 877 878 Backported from master: 879 2021-07-06 Iain Sandoe <iain@sandoe.co.uk> 880 881 PR bootstrap/100246 882 * config/i386/i386.h (struct stringop_algs): Define a CTOR for 883 this type. 884 8852021-07-20 Iain Sandoe <iain@sandoe.co.uk> 886 887 Backported from master: 888 2021-07-09 Iain Sandoe <iain@sandoe.co.uk> 889 890 PR target/100152 891 * config/i386/i386-expand.c (ix86_expand_call): If a call is 892 to a non-local-binding, or local but to a public symbol, then 893 assume that it might be indirected via the lazy symbol binder. 894 Mark R10 and R10 as clobbered in that case. 895 8962021-07-20 Uroš Bizjak <ubizjak@gmail.com> 897 898 PR target/100182 899 * config/i386/sync.md (define_peephole2 atomic_storedi_fpu): 900 Remove. 901 (define_peephole2 atomic_loaddi_fpu): Ditto. 902 9032021-07-19 Bill Schmidt <wschmidt@linux.ibm.com> 904 905 PR target/101129 906 * config/rs6000/rs6000-p8swap.c (has_part_mult): New. 907 (rs6000_analyze_swaps): Insns containing a subreg of a mult are 908 not swappable. 909 9102021-07-18 Jakub Jelinek <jakub@redhat.com> 911 912 Backported from master: 913 2021-07-01 Jakub Jelinek <jakub@redhat.com> 914 915 PR middle-end/94366 916 * omp-low.c (lower_rec_input_clauses): Rename is_fp_and_or to 917 is_truth_op, set it for TRUTH_*IF_EXPR regardless of new_var's type, 918 use boolean_type_node instead of integer_type_node as NE_EXPR type. 919 (lower_reduction_clauses): Likewise. 920 9212021-07-18 Tobias Burnus <tobias@codesourcery.com> 922 923 Backported from master: 924 2021-05-04 Tobias Burnus <tobias@codesourcery.com> 925 926 * omp-low.c (lower_rec_input_clauses, lower_reduction_clauses): Handle 927 && and || with floating-point and complex arguments. 928 9292021-07-18 Jakub Jelinek <jakub@redhat.com> 930 931 Backported from master: 932 2021-07-14 Jakub Jelinek <jakub@redhat.com> 933 934 PR go/101407 935 * godump.c (godump_str_hash): New type. 936 (godump_container::pot_dummy_types): Use string_hash instead of 937 ptr_hash in the hash_set. 938 9392021-07-18 Jakub Jelinek <jakub@redhat.com> 940 941 Backported from master: 942 2021-07-01 Jakub Jelinek <jakub@redhat.com> 943 944 PR debug/101266 945 * dwarf2out.c (loc_list_from_tree_1): Handle COMPOUND_LITERAL_EXPR. 946 9472021-07-18 Jakub Jelinek <jakub@redhat.com> 948 949 Backported from master: 950 2021-06-29 Jakub Jelinek <jakub@redhat.com> 951 952 PR c++/101210 953 * match.pd ((intptr_t)x eq/ne CST to x eq/ne (typeof x) CST): Don't 954 perform the optimization in GENERIC when sanitizing and x has a 955 reference type. 956 9572021-07-18 Jakub Jelinek <jakub@redhat.com> 958 959 Backported from master: 960 2021-06-24 Jakub Jelinek <jakub@redhat.com> 961 962 PR middle-end/101172 963 * stor-layout.c (finish_bitfield_representative): If nextf has 964 error_mark_node type, set repr type to error_mark_node too. 965 9662021-07-15 H.J. Lu <hjl.tools@gmail.com> 967 968 Backported from master: 969 2021-06-13 H.J. Lu <hjl.tools@gmail.com> 970 971 PR target/101023 972 * config/i386/i386.c (ix86_expand_prologue): Set red_zone_used 973 to true if red zone is used. 974 (ix86_output_indirect_jmp): Replace ix86_red_zone_size with 975 ix86_red_zone_used. 976 * config/i386/i386.h (machine_function): Add red_zone_used. 977 (ix86_red_zone_size): Removed. 978 (ix86_red_zone_used): New. 979 * config/i386/i386.md (peephole2 patterns): Replace 980 ix86_red_zone_size with ix86_red_zone_used. 981 9822021-07-15 H.J. Lu <hjl.tools@gmail.com> 983 984 Backported from master: 985 2021-07-14 H.J. Lu <hjl.tools@gmail.com> 986 987 PR target/101395 988 * config/i386/driver-i386.c (host_detect_local_cpu): Check 989 "arch [32|64]" and "tune [32|64]" for 32-bit and 64-bit codegen. 990 Enable UINTR only for 64-bit codegen. 991 * config/i386/i386-options.c 992 (ix86_option_override_internal::DEF_PTA): Skip PTA_UINTR if not 993 in 64-bit mode. 994 * config/i386/i386.h (ARCH_ARG): New. 995 (CC1_CPU_SPEC): Pass "[arch|tune] 32" for 32-bit codegen and 996 "[arch|tune] 64" for 64-bit codegen. 997 9982021-07-15 Richard Biener <rguenther@suse.de> 999 1000 Backported from master: 1001 2021-07-15 Richard Biener <rguenther@suse.de> 1002 1003 PR driver/101383 1004 * gcc.c (process_command): Process -gtoggle like process_options 1005 would after parsing options. 1006 10072021-07-14 Andrew MacLeod <amacleod@redhat.com> 1008 1009 Backported from master: 1010 2021-07-02 Andrew MacLeod <amacleod@redhat.com> 1011 1012 PR tree-optimization/101223 1013 * range-op.cc (build_lt): Add -1 for signed values. 1014 (built_gt): Subtract -1 for signed values. 1015 10162021-07-14 Andrew MacLeod <amacleod@redhat.com> 1017 1018 PR tree-optimization/101148 1019 PR tree-optimization/101014 1020 * gimple-range-cache.cc (ranger_cache::ranger_cache): Adjust. 1021 (ranger_cache::~ranger_cache): Adjust. 1022 (ranger_cache::block_range): Check if propagation disallowed. 1023 (ranger_cache::propagate_cache): Disallow propagation if new value 1024 can't be stored properly. 1025 * gimple-range-cache.h (ranger_cache::m_propfail): New member. 1026 10272021-07-14 Andrew MacLeod <amacleod@redhat.com> 1028 1029 * gimple-range-cache.cc (class ssa_block_ranges): Adjust prototype. 1030 (sbr_vector::set_bb_range): Return true. 1031 (class sbr_sparse_bitmap): Adjust. 1032 (sbr_sparse_bitmap::set_bb_range): Return value. 1033 (block_range_cache::set_bb_range): Return value. 1034 (ranger_cache::propagate_cache): Use return value to print msg. 1035 * gimple-range-cache.h (class block_range_cache): Adjust. 1036 10372021-07-14 Andrew MacLeod <amacleod@redhat.com> 1038 1039 * gimple-range-cache.cc (ranger_cache::push_poor_value): Disable 1040 poor value processing. 1041 10422021-07-14 Andrew MacLeod <amacleod@redhat.com> 1043 1044 * gimple-range.cc (gimple_ranger::range_of_expr): Treat debug statments 1045 as contextless queries to avoid additional lookups. 1046 10472021-07-14 Andrew MacLeod <amacleod@redhat.com> 1048 1049 Backported from master: 1050 2021-06-07 Andrew MacLeod <amacleod@redhat.com> 1051 1052 PR tree-optimization/100299 1053 * gimple-range-cache.cc (class sbr_sparse_bitmap): New. 1054 (sbr_sparse_bitmap::sbr_sparse_bitmap): New. 1055 (sbr_sparse_bitmap::bitmap_set_quad): New. 1056 (sbr_sparse_bitmap::bitmap_get_quad): New. 1057 (sbr_sparse_bitmap::set_bb_range): New. 1058 (sbr_sparse_bitmap::get_bb_range): New. 1059 (sbr_sparse_bitmap::bb_range_p): New. 1060 (block_range_cache::block_range_cache): initialize bitmap obstack. 1061 (block_range_cache::~block_range_cache): Destruct obstack. 1062 (block_range_cache::set_bb_range): Decide when to utilze the 1063 sparse on entry cache. 1064 * gimple-range-cache.h (block_range_cache): Add bitmap obstack. 1065 * params.opt (-param=evrp-sparse-threshold): New. 1066 10672021-07-14 Andrew MacLeod <amacleod@redhat.com> 1068 1069 Backported from master: 1070 2021-06-07 Andrew MacLeod <amacleod@redhat.com> 1071 1072 * bitmap.c (bitmap_set_aligned_chunk): New. 1073 (bitmap_get_aligned_chunk): New. 1074 (test_aligned_chunk): New. 1075 (bitmap_c_tests): Call test_aligned_chunk. 1076 * bitmap.h (bitmap_set_aligned_chunk, bitmap_get_aligned_chunk): New. 1077 10782021-07-14 Andrew MacLeod <amacleod@redhat.com> 1079 1080 Backported from master: 1081 2021-05-07 Andrew MacLeod <amacleod@redhat.com> 1082 1083 * gimple-range-cache.cc (ssa_block_ranges): Virtualize. 1084 (sbr_vector): Renamed from ssa_block_cache. 1085 (sbr_vector::sbr_vector): Allocate from obstack abd initialize. 1086 (ssa_block_ranges::~ssa_block_ranges): Remove. 1087 (sbr_vector::set_bb_range): Use varying and undefined cached values. 1088 (ssa_block_ranges::set_bb_varying): Remove. 1089 (sbr_vector::get_bb_range): Adjust assert. 1090 (sbr_vector::bb_range_p): Adjust assert. 1091 (~block_range_cache): No freeing loop required. 1092 (block_range_cache::get_block_ranges): Remove. 1093 (block_range_cache::set_bb_range): Inline get_block_ranges. 1094 (block_range_cache::set_bb_varying): Remove. 1095 * gimple-range-cache.h (set_bb_varying): Remove prototype. 1096 * value-range.h (irange_allocator::get_memory): New. 1097 10982021-07-14 Michael Meissner <meissner@linux.ibm.com> 1099 1100 PR target/100809 1101 * config/rs6000/rs6000.md (udivti3): New insn. 1102 (divti3): New insn. 1103 (umodti3): New insn. 1104 (modti3): New insn. 1105 11062021-07-14 Alexandre Oliva <oliva@adacore.com> 1107 1108 Backported from master: 1109 2021-07-14 Alexandre Oliva <oliva@adacore.com> 1110 1111 * tree-ssa-alias.c (attr_fnspec::verify): Fix index in 1112 non-'t'-sized arg check. 1113 11142021-07-14 liuhongt <hongtao.liu@intel.com> 1115 1116 PR target/101185 1117 * config/i386/i386.c (x86_order_regs_for_local_alloc): 1118 Revert r12-1669. 1119 11202021-07-14 liuhongt <hongtao.liu@intel.com> 1121 1122 PR target/101142 1123 * config/i386/i386.md: (*anddi_1): Disparage slightly the mask 1124 register alternative. 1125 (*and<mode>_1): Ditto. 1126 (*andqi_1): Ditto. 1127 (*andn<mode>_1): Ditto. 1128 (*<code><mode>_1): Ditto. 1129 (*<code>qi_1): Ditto. 1130 (*one_cmpl<mode>2_1): Ditto. 1131 (*one_cmplsi2_1_zext): Ditto. 1132 (*one_cmplqi2_1): Ditto. 1133 * config/i386/i386.c (x86_order_regs_for_local_alloc): Change 1134 the order of mask registers to be before general registers. 1135 11362021-07-14 Richard Biener <rguenther@suse.de> 1137 1138 Backported from master: 1139 2021-07-14 Richard Biener <rguenther@suse.de> 1140 1141 PR tree-optimization/101445 1142 * tree-vect-stmts.c (vectorizable_load): Do the gap adjustment 1143 of the IV in the correct direction for negative stride 1144 accesses. 1145 11462021-07-13 Richard Biener <rguenther@suse.de> 1147 1148 Backported from master: 1149 2021-07-05 Richard Biener <rguenther@suse.de> 1150 1151 PR middle-end/101291 1152 * cfgloopmanip.c (loop_version): Set the loop copy of the 1153 versioned loop to the new loop. 1154 11552021-07-13 Richard Biener <rguenther@suse.de> 1156 1157 Backported from master: 1158 2021-07-12 Richard Biener <rguenther@suse.de> 1159 1160 PR tree-optimization/101394 1161 * tree-ssa-pre.c (do_pre_regular_insertion): Avoid inserting 1162 copies from abnormals for a full redundancy. 1163 11642021-07-13 Richard Biener <rguenther@suse.de> 1165 1166 Backported from master: 1167 2021-07-12 Richard Biener <rguenther@suse.de> 1168 1169 PR middle-end/101423 1170 * gimple.c (gimple_could_trap_p_1): Internal function calls 1171 do not trap. 1172 * tree-eh.c (tree_could_trap_p): Likewise. 1173 11742021-07-13 Richard Biener <rguenther@suse.de> 1175 1176 Backported from master: 1177 2021-07-01 Richard Biener <rguenther@suse.de> 1178 1179 PR tree-optimization/100778 1180 * tree-vect-slp.c (vect_schedule_slp_node): Do not place trapping 1181 vectorized ops ahead of their scalar BB. 1182 11832021-07-13 Richard Biener <rguenther@suse.de> 1184 1185 Backported from master: 1186 2021-05-28 Richard Biener <rguenther@suse.de> 1187 1188 PR tree-optimization/100778 1189 * tree-vect-slp.c (vect_build_slp_tree_1): Prevent possibly 1190 trapping ops in different BBs. 1191 11922021-07-09 Martin Jambor <mjambor@suse.cz> 1193 1194 Backported from master: 1195 2021-07-08 Martin Jambor <mjambor@suse.cz> 1196 1197 PR ipa/101066 1198 * ipa-sra.c (class isra_call_summary): New member 1199 m_before_any_store, initialize it in the constructor. 1200 (isra_call_summary::dump): Dump the new field. 1201 (ipa_sra_call_summaries::duplicate): Copy it. 1202 (process_scan_results): Set it. 1203 (isra_write_edge_summary): Stream it. 1204 (isra_read_edge_summary): Likewise. 1205 (param_splitting_across_edge): Only override 1206 safe_to_import_accesses if m_before_any_store is set. 1207 12082021-07-09 Eric Botcazou <ebotcazou@adacore.com> 1209 1210 PR target/101377 1211 * gcc.c (ASM_DEBUG_DWARF_OPTION): Set again to --gdwarf2 in 1212 the case where HAVE_AS_WORKING_DWARF_N_FLAG is not defined 1213 and HAVE_LD_BROKEN_PE_DWARF5 is defined. 1214 12152021-07-07 Peter Bergner <bergner@linux.ibm.com> 1216 1217 Backported from master: 1218 2021-07-07 Peter Bergner <bergner@linux.ibm.com> 1219 1220 * config/rs6000/rs6000-call.c (mma_init_builtins): Use VSX_BUILTIN_LXVP 1221 and VSX_BUILTIN_STXVP. 1222 12232021-07-07 Peter Bergner <bergner@linux.ibm.com> 1224 1225 Backported from master: 1226 2021-07-02 Peter Bergner <bergner@linux.ibm.com> 1227 1228 * config/rs6000/rs6000-builtin.def (BU_MMA_PAIR_LD, BU_MMA_PAIR_ST): 1229 New macros. 1230 (__builtin_vsx_lxvp, __builtin_vsx_stxvp): New built-ins. 1231 * config/rs6000/rs6000-call.c (rs6000_gimple_fold_mma_builtin): Expand 1232 lxvp and stxvp built-ins. 1233 (mma_init_builtins): Handle lxvp and stxvp built-ins. 1234 (builtin_function_type): Likewise. 1235 * doc/extend.texi (__builtin_vsx_lxvp, __builtin_mma_stxvp): Document. 1236 12372021-07-07 Michael Meissner <meissner@linux.ibm.com> 1238 2021-07-01 Michael Meissner <meissner@linux.ibm.com> 1239 1240 * config/rs6000/rs6000.c (rs6000_maybe_emit_fp_cmove): Add IEEE 1241 128-bit floating point conditional move support. 1242 (have_compare_and_set_mask): Add IEEE 128-bit floating point 1243 types. 1244 * config/rs6000/rs6000.md (mov<mode>cc, IEEE128 iterator): New insn. 1245 (mov<mode>cc_p10, IEEE128 iterator): New insn. 1246 (mov<mode>cc_invert_p10, IEEE128 iterator): New insn. 1247 (fpmask<mode>, IEEE128 iterator): New insn. 1248 (xxsel<mode>, IEEE128 iterator): New insn. 1249 Backported from master: 1250 12512021-07-07 Richard Biener <rguenther@suse.de> 1252 1253 Backported from master: 1254 2021-06-28 Richard Biener <rguenther@suse.de> 1255 1256 PR tree-optimization/101229 1257 * gimple-walk.c (gimple_walk_op): Handle PHIs. 1258 12592021-07-07 Richard Biener <rguenther@suse.de> 1260 1261 PR tree-optimization/101173 1262 PR tree-optimization/101280 1263 * gimple-loop-interchange.cc 1264 (tree_loop_interchange::valid_data_dependences): Properly 1265 guard all dependence checks with DDR_REVERSED_P or its 1266 inverse. 1267 12682021-07-07 Richard Biener <rguenther@suse.de> 1269 1270 Backported from master: 1271 2021-06-22 Richard Biener <rguenther@suse.de> 1272 1273 PR middle-end/101156 1274 * gimplify.c (gimplify_expr): Remove premature incorrect 1275 optimization. 1276 12772021-07-07 Richard Biener <rguenther@suse.de> 1278 1279 Backported from master: 1280 2021-06-08 Richard Biener <rguenther@suse.de> 1281 1282 PR tree-optimization/100923 1283 * tree-ssa-sccvn.c (valueize_refs_1): Take a pointer to 1284 the operand vector to be valueized. 1285 (valueize_refs): Likewise. 1286 (valueize_shared_reference_ops_from_ref): Adjust. 1287 (valueize_shared_reference_ops_from_call): Likewise. 1288 (vn_reference_lookup_3): Likewise. 1289 (vn_reference_lookup_pieces): Likewise. Re-valueize 1290 with honoring availability when we are about to create 1291 the ao_ref and valueized before. 1292 (vn_reference_lookup): Likewise. 1293 (vn_reference_insert_pieces): Adjust. 1294 12952021-07-07 Richard Biener <rguenther@suse.de> 1296 1297 Backported from master: 1298 2021-06-16 Richard Biener <rguenther@suse.de> 1299 1300 PR tree-optimization/101088 1301 * tree-ssa-loop-im.c (sm_seq_valid_bb): Only look for 1302 supported refs on edges. Do not assert same ref but 1303 different kind stores are unsuported but mark them so. 1304 (hoist_memory_references): Only look for supported refs 1305 on exits. 1306 13072021-07-07 Richard Biener <rguenther@suse.de> 1308 1309 Backported from master: 1310 2021-06-11 Richard Biener <rguenther@suse.de> 1311 1312 PR tree-optimization/101025 1313 * tree-ssa-loop-im.c (sm_seq_valid_bb): Make sure to process 1314 all refs that require dependence checking. 1315 13162021-07-06 Clément Chigot <clement.chigot@atos.net> 1317 1318 Backported from master: 1319 2021-06-10 Clement Chigot <clement.chigot@atos.net> 1320 1321 * config/rs6000/aix71.h (ASM_CPU_SPEC): Add Power10 directive. 1322 * config/rs6000/aix72.h (ASM_CPU_SPEC): Likewise. 1323 13242021-07-06 David Edelsohn <dje.gcc@gmail.com> 1325 1326 Backported from master: 1327 2021-05-20 Clement Chigot <clement.chigot@atos.net> 1328 David Edelsohn <dje.gcc@gmail.com> 1329 1330 * collect2.c (scan_prog_file): Issue non-fatal warning for 1331 non-COFF files. 1332 13332021-07-02 David Malcolm <dmalcolm@redhat.com> 1334 1335 * diagnostic-show-locus.c (diagnostic_show_locus): Don't reject 1336 printing the same location twice if there are fix-it hints, 1337 multiple locations, or a label. 1338 13392021-07-02 Eric Botcazou <ebotcazou@adacore.com> 1340 1341 * config/i386/i386.c (asm_preferred_eh_data_format): Always use the 1342 PIC encodings for PE-COFF targets. 1343 13442021-06-30 Pat Haugen <pthaugen@linux.ibm.com> 1345 1346 * config/rs6000/power10.md (power10-fused-load, power10-fused-store, 1347 power10-fused_alu, power10-fused-vec, power10-fused-branch): New. 1348 13492021-06-25 Richard Biener <rguenther@suse.de> 1350 1351 * tree-vect-slp.c (vect_optimize_slp): Do not propagate 1352 across operations that have different semantics on different 1353 lanes. 1354 13552021-06-25 Richard Biener <rguenther@suse.de> 1356 1357 Backported from master: 1358 2021-06-22 Richard Biener <rguenther@suse.de> 1359 1360 PR tree-optimization/101158 1361 * tree-vect-slp.c (vect_build_slp_tree_1): Move same operand 1362 checking after checking for matching operation. 1363 13642021-06-25 Richard Biener <rguenther@suse.de> 1365 1366 Backported from master: 1367 2021-06-22 Richard Biener <rguenther@suse.de> 1368 1369 PR tree-optimization/101151 1370 * tree-ssa-sink.c (statement_sink_location): Expand irreducible 1371 region check. 1372 13732021-06-25 Richard Biener <rguenther@suse.de> 1374 1375 Backported from master: 1376 2021-06-24 Richard Biener <rguenther@suse.de> 1377 1378 PR tree-optimization/101105 1379 * tree-vect-data-refs.c (vect_prune_runtime_alias_test_list): 1380 Only ignore steps when they are equal or scalar order is preserved. 1381 13822021-06-25 Richard Biener <rguenther@suse.de> 1383 1384 Backported from master: 1385 2021-05-19 Richard Biener <rguenther@suse.de> 1386 1387 PR middle-end/100672 1388 * fold-const.c (fold_negate_expr_1): Use element_precision. 1389 (negate_expr_p): Likewise. 1390 13912021-06-24 Eric Botcazou <ebotcazou@adacore.com> 1392 1393 * dwarf2out.c (dwarf2out_assembly_start): Emit .file 0 marker here.. 1394 (dwarf2out_finish): ...instead of here. 1395 13962021-06-24 Eric Botcazou <ebotcazou@adacore.com> 1397 1398 * configure.ac (--gdwarf-5 option): Use objdump instead of readelf. 1399 (working --gdwarf-4/--gdwarf-5 for all sources): Likewise. 1400 (--gdwarf-4 not refusing generated .debug_line): Adjust for Windows. 1401 * configure: Regenerate. 1402 14032021-06-23 Aaron Sawdey <acsawdey@linux.ibm.com> 1404 1405 Backported from master: 1406 2021-06-23 Aaron Sawdey <acsawdey@linux.ibm.com> 1407 1408 * config/rs6000/rs6000-cpus.def: Take OPTION_MASK_PCREL_OPT out 1409 of OTHER_POWER10_MASKS so it will not be enabled by default. 1410 14112021-06-23 Michael Meissner <meissner@linux.ibm.com> 1412 1413 * config/rs6000/rs6000.c (rs6000_emit_minmax): Add support for ISA 1414 3.1 IEEE 128-bit floating point xsmaxcqp/xsmincqp instructions. 1415 * config/rs6000/rs6000.md (s<minmax><mode>3, IEEE128 iterator): 1416 New insns. 1417 14182021-06-23 Uros Bizjak <ubizjak@gmail.com> 1419 1420 Backported from master: 1421 2021-06-23 Uroš Bizjak <ubizjak@gmail.com> 1422 1423 PR target/101175 1424 * config/i386/i386.md (bsr_rex64): Add zero-flag setting RTX. 1425 (bsr): Ditto. 1426 (*bsrhi): Remove. 1427 (clz<mode>2): Update RTX pattern for additions. 1428 14292021-06-23 Jakub Jelinek <jakub@redhat.com> 1430 1431 Backported from master: 1432 2021-06-23 Jakub Jelinek <jakub@redhat.com> 1433 1434 PR middle-end/101167 1435 * omp-low.c (lower_omp_regimplify_p): Regimplify also PARM_DECLs 1436 and RESULT_DECLs that have DECL_HAS_VALUE_EXPR_P set. 1437 14382021-06-23 Jakub Jelinek <jakub@redhat.com> 1439 1440 Backported from master: 1441 2021-06-21 Jakub Jelinek <jakub@redhat.com> 1442 1443 PR inline-asm/100785 1444 * cfgexpand.c (expand_asm_stmt): If errors are emitted, 1445 remove all inputs, outputs and clobbers from the asm and 1446 set template to "". 1447 14482021-06-22 liuhongt <hongtao.liu@intel.com> 1449 1450 PR target/100310 1451 * config/i386/i386-expand.c 1452 (ix86_expand_special_args_builtin): Keep constm1_operand only 1453 if it satisfies insn's operand predicate. 1454 14552021-06-21 Carl Love <cel@us.ibm.com> 1456 1457 * config/rs6000/altivec.h (vec_signextll, vec_signexti, vec_signextq): 1458 Add define for new builtins. 1459 * config/rs6000/altivec.md(altivec_vreveti2): Add define_expand. 1460 * config/rs6000/rs6000-builtin.def (VSIGNEXTI, VSIGNEXTLL): Add 1461 overloaded builtin definitions. 1462 (VSIGNEXTSB2W, VSIGNEXTSH2W, VSIGNEXTSB2D, VSIGNEXTSH2D,VSIGNEXTSW2D, 1463 VSIGNEXTSD2Q): Add builtin expansions. 1464 (SIGNEXT): Add P10 overload definition. 1465 * config/rs6000/rs6000-call.c (P9V_BUILTIN_VEC_VSIGNEXTI, 1466 P9V_BUILTIN_VEC_VSIGNEXTLL, P10_BUILTIN_VEC_SIGNEXT): Add 1467 overloaded argument definitions. 1468 * config/rs6000/vsx.md (vsx_sign_extend_v2di_v1ti): Add define_insn. 1469 (vsignextend_v2di_v1ti, vsignextend_qi_<mode>, vsignextend_hi_<mode>, 1470 vsignextend_si_v2di)[VIlong]: Add define_expand. 1471 Make define_insn vsx_sign_extend_si_v2di visible. 1472 * doc/extend.texi: Add documentation for the vec_signexti, 1473 vec_signextll builtins and vec_signextq. 1474 14752021-06-21 Carl Love <cel@us.ibm.com> 1476 1477 * config/rs6000/rs6000.c (__fixkfti, __fixunskfti, __floattikf, 1478 __floatuntikf): Names changed to __fixkfti_sw, __fixunskfti_sw, 1479 __floattikf_sw, __floatuntikf_sw respectively. 1480 * config/rs6000/rs6000.md (floatti<mode>2, floatunsti<mode>2, 1481 fix_trunc<mode>ti2, fixuns_trunc<mode>ti2): Add 1482 define_insn for mode IEEE 128. 1483 14842021-06-21 Carl Love <cel@us.ibm.com> 1485 1486 * config/rs6000/altivec.md (altivec_vslq, altivec_vsrq): 1487 Rename to altivec_vslq_<mode>, altivec_vsrq_<mode>, mode VEC_TI. 1488 * config/rs6000/vector.md (VEC_TI): Was named VSX_TI in vsx.md. 1489 (vashlv1ti3): Change to vashl<mode>3, mode VEC_TI. 1490 (vlshrv1ti3): Change to vlshr<mode>3, mode VEC_TI. 1491 * config/rs6000/vsx.md (VSX_TI): Remove define_mode_iterator. Update 1492 uses of VSX_TI to VEC_TI. 1493 14942021-06-21 Carl Love <cel@us.ibm.com> 1495 1496 * config/rs6000/dfp.md (floattitd2, fixtdti2): New define_insns. 1497 14982021-06-21 Carl Love <cel@us.ibm.com> 1499 1500 * config/rs6000/altivec.h (vec_dive, vec_mod): Add define for new 1501 builtins. 1502 * config/rs6000/altivec.md (UNSPEC_VMULEUD, UNSPEC_VMULESD, 1503 UNSPEC_VMULOUD, UNSPEC_VMULOSD): New unspecs. 1504 (altivec_eqv1ti, altivec_gtv1ti, altivec_gtuv1ti, altivec_vmuleud, 1505 altivec_vmuloud, altivec_vmulesd, altivec_vmulosd, altivec_vrlq, 1506 altivec_vrlqmi, altivec_vrlqmi_inst, altivec_vrlqnm, 1507 altivec_vrlqnm_inst, altivec_vslq, altivec_vsrq, altivec_vsraq, 1508 altivec_vcmpequt_p, altivec_vcmpgtst_p, altivec_vcmpgtut_p): New 1509 define_insn. 1510 (vec_widen_umult_even_v2di, vec_widen_smult_even_v2di, 1511 vec_widen_umult_odd_v2di, vec_widen_smult_odd_v2di, altivec_vrlqmi, 1512 altivec_vrlqnm): New define_expands. 1513 * config/rs6000/rs6000-builtin.def (VCMPEQUT_P, VCMPGTST_P, 1514 VCMPGTUT_P): Add macro expansions. 1515 (BU_P10V_AV_P): Add builtin predicate definition. 1516 (VCMPGTUT, VCMPGTST, VCMPEQUT, CMPNET, CMPGE_1TI, 1517 CMPGE_U1TI, CMPLE_1TI, CMPLE_U1TI, VNOR_V1TI_UNS, VNOR_V1TI, VCMPNET_P, 1518 VCMPAET_P, VMULEUD, VMULESD, VMULOUD, VMULOSD, VRLQ, 1519 VSLQ, VSRQ, VSRAQ, VRLQNM, DIV_V1TI, UDIV_V1TI, DIVES_V1TI, DIVEU_V1TI, 1520 MODS_V1TI, MODU_V1TI, VRLQMI): New macro expansions. 1521 (VRLQ, VSLQ, VSRQ, VSRAQ, DIVE, MOD): New overload expansions. 1522 * config/rs6000/rs6000-call.c (P10_BUILTIN_VCMPEQUT, 1523 P10V_BUILTIN_CMPGE_1TI, P10V_BUILTIN_CMPGE_U1TI, 1524 P10V_BUILTIN_VCMPGTUT, P10V_BUILTIN_VCMPGTST, 1525 P10V_BUILTIN_CMPLE_1TI, P10V_BUILTIN_VCMPLE_U1TI, 1526 P10V_BUILTIN_DIV_V1TI, P10V_BUILTIN_UDIV_V1TI, 1527 P10V_BUILTIN_VMULESD, P10V_BUILTIN_VMULEUD, 1528 P10V_BUILTIN_VMULOSD, P10V_BUILTIN_VMULOUD, 1529 P10V_BUILTIN_VNOR_V1TI, P10V_BUILTIN_VNOR_V1TI_UNS, 1530 P10V_BUILTIN_VRLQ, P10V_BUILTIN_VRLQMI, 1531 P10V_BUILTIN_VRLQNM, P10V_BUILTIN_VSLQ, 1532 P10V_BUILTIN_VSRQ, P10V_BUILTIN_VSRAQ, 1533 P10V_BUILTIN_VCMPGTUT_P, P10V_BUILTIN_VCMPGTST_P, 1534 P10V_BUILTIN_VCMPEQUT_P, P10V_BUILTIN_VCMPGTUT_P, 1535 P10V_BUILTIN_VCMPGTST_P, P10V_BUILTIN_CMPNET, 1536 P10V_BUILTIN_VCMPNET_P, P10V_BUILTIN_VCMPAET_P, 1537 P10V_BUILTIN_DIVES_V1TI, P10V_BUILTIN_MODS_V1TI, 1538 P10V_BUILTIN_MODU_V1TI): 1539 New overloaded definitions. 1540 (rs6000_gimple_fold_builtin) [P10V_BUILTIN_VCMPEQUT, 1541 P10V_BUILTIN_CMPNET, P10V_BUILTIN_CMPGE_1TI, 1542 P10V_BUILTIN_CMPGE_U1TI, P10V_BUILTIN_VCMPGTUT, 1543 P10V_BUILTIN_VCMPGTST, P10V_BUILTIN_CMPLE_1TI, 1544 P10V_BUILTIN_CMPLE_U1TI]: New case statements. 1545 (rs6000_init_builtins) [bool_V1TI_type_node, int_ftype_int_v1ti_v1ti]: 1546 New assignments. 1547 (altivec_init_builtins): New E_V1TImode case statement. 1548 (builtin_function_type)[P10_BUILTIN_128BIT_VMULEUD, 1549 P10_BUILTIN_128BIT_VMULOUD, P10_BUILTIN_128BIT_DIVEU_V1TI, 1550 P10_BUILTIN_128BIT_MODU_V1TI, P10_BUILTIN_CMPGE_U1TI, 1551 P10_BUILTIN_VCMPGTUT, P10_BUILTIN_VCMPEQUT]: New case statements. 1552 * config/rs6000/rs6000.c (rs6000_handle_altivec_attribute) [E_TImode, 1553 E_V1TImode]: New case statements. 1554 * config/rs6000/rs6000.h (rs6000_builtin_type_index): New enum 1555 value RS6000_BTI_bool_V1TI. 1556 * config/rs6000/vector.md (vector_gtv1ti,vector_nltv1ti, 1557 vector_gtuv1ti, vector_nltuv1ti, vector_ngtv1ti, vector_ngtuv1ti, 1558 vector_eq_v1ti_p, vector_ne_v1ti_p, vector_ae_v1ti_p, 1559 vector_gt_v1ti_p, vector_gtu_v1ti_p, vrotlv1ti3, vashlv1ti3, 1560 vlshrv1ti3, vashrv1ti3): New define_expands. 1561 * config/rs6000/vsx.md (UNSPEC_VSX_DIVSQ, UNSPEC_VSX_DIVUQ, 1562 UNSPEC_VSX_DIVESQ, UNSPEC_VSX_DIVEUQ, UNSPEC_VSX_MODSQ, 1563 UNSPEC_VSX_MODUQ): New unspecs. 1564 (mulv2di3, vsx_div_v1ti, vsx_udiv_v1ti, vsx_dives_v1ti, 1565 vsx_diveu_v1ti, vsx_mods_v1ti, vsx_modu_v1ti, xxswapd_v1ti): New 1566 define_insns. 1567 (vcmpnet): New define_expand. 1568 * doc/extend.texi: Add documentation for the new builtins vec_rl, 1569 vec_rlmi, vec_rlnm, vec_sl, vec_sr, vec_sra, vec_mule, vec_mulo, 1570 vec_div, vec_dive, vec_mod, vec_cmpeq, vec_cmpne, vec_cmpgt, vec_cmplt, 1571 vec_cmpge, vec_cmple, vec_all_eq, vec_all_ne, vec_all_gt, vec_all_lt, 1572 vec_all_ge, vec_all_le, vec_any_eq, vec_any_ne, vec_any_gt, vec_any_lt, 1573 vec_any_ge, vec_any_le. 1574 15752021-06-21 Carl Love <cel@us.ibm.com> 1576 1577 * config/rs6000/altivec.md (altivec_vrl<VI_char>mi): Fix 1578 bug in argument generation. 1579 15802021-06-18 Srinath Parvathaneni <srinath.parvathaneni@arm.com> 1581 1582 Backported from master: 1583 2021-06-18 Srinath Parvathaneni <srinath.parvathaneni@arm.com> 1584 1585 PR target/100856 1586 * common/config/arm/arm-common.c (arm_canon_arch_option_1): New function 1587 derived from arm_canon_arch. 1588 (arm_canon_arch_option): Call it. 1589 (arm_canon_arch_multilib_option): New function. 1590 * config/arm/arm-cpus.in (IGNORE_FOR_MULTILIB): New fgroup. 1591 * config/arm/arm.h (arm_canon_arch_multilib_option): New prototype. 1592 (CANON_ARCH_MULTILIB_SPEC_FUNCTION): New macro. 1593 (MULTILIB_ARCH_CANONICAL_SPECS): New macro. 1594 (DRIVER_SELF_SPECS): Add MULTILIB_ARCH_CANONICAL_SPECS. 1595 * config/arm/arm.opt (mlibarch): New option. 1596 * config/arm/t-rmprofile (MULTILIB_MATCHES): For armv8*-m, replace use 1597 of march on RHS with mlibarch. 1598 15992021-06-18 Srinath Parvathaneni <srinath.parvathaneni@arm.com> 1600 1601 Backported from master: 1602 2021-06-11 Srinath Parvathaneni <srinath.parvathaneni@arm.com> 1603 1604 PR target/101016 1605 * config/arm/arm_mve.h (__arm_vld1q): Change __ARM_mve_coerce(p0, 1606 int8_t const *) to __ARM_mve_coerce1(p0, int8_t *) in the argument for 1607 the polymorphic variants matching code. 1608 (__arm_vld1q_z): Likewise. 1609 (__arm_vld2q): Likewise. 1610 (__arm_vld4q): Likewise. 1611 (__arm_vldrbq_gather_offset): Likewise. 1612 (__arm_vldrbq_gather_offset_z): Likewise. 1613 16142021-06-18 Jakub Jelinek <jakub@redhat.com> 1615 1616 PR middle-end/101062 1617 * stor-layout.c (finish_bitfield_layout): Don't add bitfield 1618 representatives in QUAL_UNION_TYPE. 1619 16202021-06-18 Jakub Jelinek <jakub@redhat.com> 1621 1622 Backported from master: 1623 2021-06-16 Jakub Jelinek <jakub@redhat.com> 1624 1625 PR middle-end/101062 1626 * stor-layout.c (finish_bitfield_representative): For fields in unions 1627 assume nextf is always NULL. 1628 (finish_bitfield_layout): Compute bit field representatives also in 1629 unions, but handle it as if each bitfield was the only field in the 1630 aggregate. 1631 16322021-06-17 Peter Bergner <bergner@linux.ibm.com> 1633 1634 Backported from master: 1635 2021-06-14 Peter Bergner <bergner@linux.ibm.com> 1636 1637 PR target/100777 1638 * config/rs6000/rs6000-call.c (rs6000_gimple_fold_mma_builtin): Use 1639 create_tmp_reg_or_ssa_name(). 1640 16412021-06-17 Peter Bergner <bergner@linux.ibm.com> 1642 1643 Backported from master: 1644 2021-06-10 Peter Bergner <bergner@linux.ibm.com> 1645 1646 * config/rs6000/rs6000-builtin.def (build_pair): New built-in. 1647 (build_acc): Likewise. 1648 * config/rs6000/rs6000-call.c (mma_expand_builtin): Swap assemble 1649 source operands in little-endian mode. 1650 (rs6000_gimple_fold_mma_builtin): Handle VSX_BUILTIN_BUILD_PAIR. 1651 (mma_init_builtins): Likewise. 1652 * config/rs6000/rs6000.c (rs6000_split_multireg_move): Handle endianness 1653 ordering for the MMA assemble and build source operands. 1654 * doc/extend.texi (__builtin_vsx_build_acc, __builtin_mma_build_pair): 1655 Document. 1656 (__builtin_mma_assemble_acc, __builtin_mma_assemble_pair): Remove 1657 documentation. 1658 16592021-06-17 Peter Bergner <bergner@linux.ibm.com> 1660 1661 Backported from master: 1662 2021-05-31 Peter Bergner <bergner@linux.ibm.com> 1663 1664 PR target/99842 1665 * config/rs6000/predicates.md(mma_assemble_input_operand): Allow 1666 indexed form addresses. 1667 16682021-06-17 Martin Sebor <msebor@redhat.com> 1669 1670 PR middle-end/100876 1671 * builtins.c: (gimple_call_return_array): Account for size_t 1672 mangling as either unsigned int or unsigned long 1673 16742021-06-17 Martin Sebor <msebor@redhat.com> 1675 1676 PR c++/100876 1677 * builtins.c (gimple_call_return_array): Check for attribute fn spec. 1678 Handle calls to placement new. 1679 (ndecl_dealloc_argno): Avoid placement delete. 1680 16812021-06-17 Martin Sebor <msebor@redhat.com> 1682 1683 PR middle-end/100732 1684 * gimple-fold.c (gimple_fold_builtin_sprintf): Avoid folding calls 1685 with either source or destination argument of invalid type. 1686 * tree-ssa-uninit.c (maybe_warn_pass_by_reference): Avoid checking 1687 calls with arguments of invalid type. 1688 16892021-06-17 Martin Sebor <msebor@redhat.com> 1690 1691 PR middle-end/100684 1692 * tree-ssa-ccp.c (pass_post_ipa_warn::execute): Handle C++ lambda. 1693 16942021-06-17 Martin Sebor <msebor@redhat.com> 1695 1696 PR middle-end/100574 1697 * builtins.c (access_ref::get_ref): Improve detection of PHIs with 1698 all null arguments. 1699 17002021-06-17 Martin Sebor <msebor@redhat.com> 1701 1702 PR middle-end/100307 1703 * builtins.c (compute_objsize_r): Clear base0 for pointers. 1704 17052021-06-17 Martin Sebor <msebor@redhat.com> 1706 1707 PR middle-end/100250 1708 * attribs.c (attr_access::array_as_string): Avoid dereferencing 1709 a pointer when it's null. 1710 17112021-06-17 Aaron Sawdey <acsawdey@linux.ibm.com> 1712 1713 * config/rs6000/genfusion.pl (gen_logical_addsubf): Refactor to 1714 add generation of logical-add and add-logical fusion pairs. Add 1715 earlyclobber to alts 0/1. 1716 (gen_addadd): Add earlyclobber to alts 0/1. 1717 * config/rs6000/rs6000-cpus.def: Add new fusion to ISA 3.1 mask 1718 and powerpc mask. 1719 * config/rs6000/rs6000.c (rs6000_option_override_internal): Turn on 1720 logical-add and add-logical fusion by default. 1721 * config/rs6000/rs6000.opt: Add -mpower10-fusion-logical-add and 1722 -mpower10-fusion-add-logical options. 1723 * config/rs6000/fusion.md: Regenerate file. 1724 17252021-06-17 Marius Hillenbrand <mhillen@linux.ibm.com> 1726 1727 Backported from master: 1728 2021-06-17 Marius Hillenbrand <mhillen@linux.ibm.com> 1729 1730 PR target/100871 1731 * config/s390/vecintrin.h (vec_doublee): Fix to use 1732 __builtin_s390_vflls. 1733 (vec_floate): Fix to use __builtin_s390_vflrd. 1734 17352021-06-17 Jakub Jelinek <jakub@redhat.com> 1736 1737 Backported from master: 1738 2021-06-15 Jakub Jelinek <jakub@redhat.com> 1739 1740 PR target/101046 1741 * expr.c (expand_expr_real_2) <case VEC_PACK_FIX_TRUNC_EXPR, 1742 case VEC_PACK_TRUNC_EXPR>: Clear subtarget when changing mode. 1743 17442021-06-17 Jakub Jelinek <jakub@redhat.com> 1745 1746 Backported from master: 1747 2021-06-11 Jakub Jelinek <jakub@redhat.com> 1748 1749 PR rtl-optimization/101008 1750 * simplify-rtx.c (relational_result): New function. 1751 (simplify_logical_relational_operation, 1752 simplify_relational_operation): Use it. 1753 17542021-06-17 Jakub Jelinek <jakub@redhat.com> 1755 1756 Backported from master: 1757 2021-06-10 Jakub Jelinek <jakub@redhat.com> 1758 1759 PR debug/100852 1760 * ifcvt.c (noce_get_alt_condition, noce_try_abs): Use 1761 prev_nonnote_nondebug_insn instead of prev_nonnote_insn. 1762 17632021-06-17 Jakub Jelinek <jakub@redhat.com> 1764 1765 Backported from master: 1766 2021-06-07 Jakub Jelinek <jakub@redhat.com> 1767 1768 PR target/100887 1769 * fold-const.c (fold_read_from_vector): Return NULL if trying to 1770 read from a CONSTRUCTOR with vector type elements. 1771 17722021-06-17 Jakub Jelinek <jakub@redhat.com> 1773 1774 Backported from master: 1775 2021-06-07 Jakub Jelinek <jakub@redhat.com> 1776 1777 PR middle-end/100898 1778 * tree-inline.c (copy_bb): Only use gimple_call_arg_ptr if memcpy 1779 should copy any arguments. Don't call gimple_call_num_args 1780 on id->call_stmt or call_stmt more than once. 1781 17822021-06-17 Jakub Jelinek <jakub@redhat.com> 1783 1784 Backported from master: 1785 2021-06-04 Jakub Jelinek <jakub@redhat.com> 1786 1787 PR target/100887 1788 * config/i386/i386-expand.c (ix86_expand_vector_init): Handle 1789 concatenation from half-sized modes with TImode elements. 1790 17912021-06-16 Richard Biener <rguenther@suse.de> 1792 1793 Backported from master: 1794 2021-06-11 Richard Biener <rguenther@suse.de> 1795 1796 PR middle-end/101009 1797 * tree-data-ref.c (build_classic_dist_vector_1): Make sure 1798 to set *init_b to true when we encounter a constant equal 1799 index pair. 1800 (compute_affine_dependence): Also dump the actual DR_REF. 1801 18022021-06-16 Richard Biener <rguenther@suse.de> 1803 1804 PR tree-optimization/100981 1805 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use 1806 gimple_get_lhs to also handle calls. 1807 * tree-vect-slp-patterns.c (complex_pattern::build): Transfer 1808 reduction info. 1809 18102021-06-16 Richard Biener <rguenther@suse.de> 1811 1812 Backported from master: 1813 2021-06-14 Richard Biener <rguenther@suse.de> 1814 1815 PR tree-optimization/100934 1816 * tree-ssa-dom.c (pass_dominator::execute): Properly 1817 mark irreducible regions. 1818 18192021-06-16 Richard Biener <rguenther@suse.de> 1820 1821 Backported from master: 1822 2021-05-28 Richard Biener <rguenther@suse.de> 1823 1824 PR ipa/100791 1825 * tree-inline.c (copy_bb): When processing __builtin_va_arg_pack 1826 copy fntype from original call. 1827 18282021-06-14 Aaron Sawdey <acsawdey@linux.ibm.com> 1829 1830 * config/rs6000/genfusion.pl (gen_addadd): New function. 1831 * config/rs6000/fusion.md: Regenerate file. 1832 * config/rs6000/rs6000-cpus.def: Add 1833 OPTION_MASK_P10_FUSION_2ADD to masks. 1834 * config/rs6000/rs6000.c (rs6000_option_override_internal): 1835 Handle default value of OPTION_MASK_P10_FUSION_2ADD. 1836 * config/rs6000/rs6000.opt: Add -mpower10-fusion-2add. 1837 18382021-06-11 Aaron Sawdey <acsawdey@linux.ibm.com> 1839 1840 * config/rs6000/rs6000.md (define_attr "type"): Add types for fusion. 1841 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10): Use new fusion types. 1842 (gen_2logical): Use new fusion types. 1843 * config/rs6000/fusion.md: Regenerate. 1844 18452021-06-09 Claudiu Zissulescu <claziss@synopsys.com> 1846 1847 Backported from master: 1848 2021-06-09 Claudiu Zissulescu <claziss@synopsys.com> 1849 1850 * config/arc/arc.md (loop_end): Change it to 1851 define_insn_and_split. 1852 18532021-06-09 Claudiu Zissulescu <claziss@synopsys.com> 1854 1855 Backported from master: 1856 2021-06-09 Claudiu Zissulescu <claziss@synopsys.com> 1857 1858 * config/arc/arc.md (maddhisi4): Use VMAC2H instruction. 1859 (machi): New pattern. 1860 (umaddhisi4): Use VMAC2HU instruction. 1861 (umachi): New pattern. 1862 18632021-06-09 Claudiu Zissulescu <claziss@synopsys.com> 1864 1865 Backported from master: 1866 2021-06-09 Claudiu Zissulescu <claziss@synopsys.com> 1867 1868 * config/arc/arc-protos.h (arc_split_move_p): New prototype. 1869 * config/arc/arc.c (arc_split_move_p): New function. 1870 (arc_split_move): Clean up. 1871 * config/arc/arc.md (movdi_insn): Clean up, use arc_split_move_p. 1872 (movdf_insn): Likewise. 1873 * config/arc/simdext.md (mov<VWH>_insn): Likewise. 1874 18752021-06-08 Pat Haugen <pthaugen@linux.ibm.com> 1876 1877 * config/rs6000/rs6000-logue.c (rs6000_emit_prologue): Use 1878 gen_frame_store. 1879 18802021-06-07 liuhongt <hongtao.liu@intel.com> 1881 1882 PR target/100885 1883 * config/i386/sse.md (*sse4_1_zero_extendv8qiv8hi2_3): Refine 1884 constraints. 1885 (<insn>v4siv4di2): Delete constraints for define_expand. 1886 18872021-06-03 Eric Botcazou <ebotcazou@adacore.com> 1888 1889 PR ipa/99122 1890 * tree-inline.c (inline_forbidden_p): Remove test on return type. 1891 18922021-06-03 Eric Botcazou <ebotcazou@adacore.com> 1893 1894 * range-op.cc (get_bool_state): Adjust head comment. 1895 (operator_not_equal::op1_range): Fix comment. 1896 (operator_bitwise_xor::op1_range): Remove call to gcc_unreachable. 1897 18982021-06-03 Alex Coplan <alex.coplan@arm.com> 1899 1900 Backported from master: 1901 2021-05-19 Alex Coplan <alex.coplan@arm.com> 1902 1903 PR target/100333 1904 * config/arm/arm.md (nonsecure_call_internal): Always ensure 1905 callee's address is in a register. 1906 19072021-06-03 Claudiu Zissulescu <claziss@synopsys.com> 1908 1909 Backported from master: 1910 2021-06-02 Vineet Gupta <vgupta@synopsys.com> 1911 1912 * config/arc/arc.h (TARGET_CPU_DEFAULT): Change to hs38_linux. 1913 19142021-06-02 Uroš Bizjak <ubizjak@gmail.com> 1915 1916 * config/i386/sse.md (abs<MMXMODEI:mode>2): 1917 Change define_insn to define_expand. 1918 19192021-06-02 Uros Bizjak <ubizjak@gmail.com> 1920 1921 Backported from master: 1922 2021-05-18 Uroš Bizjak <ubizjak@gmail.com> 1923 1924 * config/i386/sse.md (<any_extend:insn>v4qiv4di2): 1925 Fix a mode mismatch with operand 1. 1926 19272021-06-01 Jason Merrill <jason@redhat.com> 1928 1929 PR c++/91859 1930 * tree.h (CALL_FROM_NEW_OR_DELETE_P): Adjust comment. 1931 19322021-05-31 Jakub Jelinek <jakub@redhat.com> 1933 1934 Backported from master: 1935 2021-05-19 Jakub Jelinek <jakub@redhat.com> 1936 1937 PR middle-end/100576 1938 * builtins.c (check_read_access): Convert bound to size_type_node if 1939 non-NULL. 1940 19412021-05-31 Jakub Jelinek <jakub@redhat.com> 1942 1943 Backported from master: 1944 2021-05-18 Jakub Jelinek <jakub@redhat.com> 1945 1946 PR rtl-optimization/100590 1947 * regcprop.c (copyprop_hardreg_forward_1): Only DCE dead sets if 1948 they are NONJUMP_INSN_P. 1949 19502021-05-31 Jakub Jelinek <jakub@redhat.com> 1951 1952 Backported from master: 1953 2021-05-18 Jakub Jelinek <jakub@redhat.com> 1954 1955 PR c++/100580 1956 * function.c (push_dummy_function): Set DECL_ARTIFICIAL and 1957 DECL_ASSEMBLER_NAME on the fn_decl. 1958 19592021-05-31 Jakub Jelinek <jakub@redhat.com> 1960 1961 Backported from master: 1962 2021-05-15 Jakub Jelinek <jakub@redhat.com> 1963 1964 PR rtl-optimization/100342 1965 * regcprop.c (copy_value): When copying a source reg in a wider 1966 mode than it has recorded for the value, adjust recorded destination 1967 mode too or punt if !REG_CAN_CHANGE_MODE_P. 1968 19692021-05-28 David Edelsohn <dje.gcc@gmail.com> 1970 1971 PR target/94177 1972 * calls.c (precompute_register_parameters): Additionally test 1973 targetm.precompute_tls_p to pre-compute argument. 1974 * config/rs6000/aix.h (TARGET_PRECOMPUTE_TLS_P): Define. 1975 * config/rs6000/rs6000.c (rs6000_aix_precompute_tls_p): New. 1976 * target.def (precompute_tls_p): New. 1977 * doc/tm.texi.in (TARGET_PRECOMPUTE_TLS_P): Add hook documentation. 1978 * doc/tm.texi: Regenerated. 1979 (cherry-picked from commit a21b399708175f6fc0ac723a0cebc127da421c60) 1980 19812021-05-27 Richard Earnshaw <rearnsha@arm.com> 1982 1983 Backported from master: 1984 2021-05-27 Richard Earnshaw <rearnsha@arm.com> 1985 1986 PR target/100767 1987 * config/arm/arm.c (arm_configure_build_target): Remove parameter 1988 opts_set, directly check opts parameters for being non-null. 1989 (arm_option_restore): Update call to arm_configure_build_target. 1990 (arm_option_override): Likewise. 1991 (arm_can_inline_p): Likewise. 1992 (arm_valid_target_attribute_tree): Likewise. 1993 * config/arm/arm-c.c (arm_pragma_target_parse): Likewise. 1994 * config/arm/arm-protos.h (arm_configure_build_target): Adjust 1995 prototype. 1996 19972021-05-27 Alex Coplan <alex.coplan@arm.com> 1998 1999 Backported from master: 2000 2021-05-11 Alex Coplan <alex.coplan@arm.com> 2001 2002 PR target/99725 2003 * config/arm/arm.c (cmse_nonsecure_call_inline_register_clear): 2004 Avoid emitting CFA adjusts on the sp if we have the fp. 2005 20062021-05-25 Uros Bizjak <ubizjak@gmail.com> 2007 2008 Backported from master: 2009 2021-05-18 Uroš Bizjak <ubizjak@gmail.com> 2010 2011 PR target/100626 2012 * config/i386/i386-expand.c (split_double_mode): Return 2013 temporary register when simplify_gen_subreg fails with 2014 the high half od the paradoxical subreg. 2015 20162021-05-25 Richard Biener <rguenther@suse.de> 2017 2018 Backported from master: 2019 2021-05-12 Richard Biener <rguenther@suse.de> 2020 2021 PR tree-optimization/100519 2022 * tree-ssa-reassoc.c (can_associate_p): Split into... 2023 (can_associate_op_p): ... this 2024 (can_associate_type_p): ... and this. 2025 (is_reassociable_op): Call can_associate_op_p. 2026 (break_up_subtract_bb): Call the appropriate predicates. 2027 (reassociate_bb): Likewise. 2028 20292021-05-25 Richard Biener <rguenther@suse.de> 2030 2031 Backported from master: 2032 2021-05-11 Richard Biener <rguenther@suse.de> 2033 2034 PR ipa/100513 2035 * ipa-param-manipulation.c 2036 (ipa_param_body_adjustments::modify_call_stmt): Avoid 2037 altering SSA_NAME_DEF_STMT by adjusting the calls LHS 2038 via gimple_call_lhs_ptr. 2039 20402021-05-25 Richard Biener <rguenther@suse.de> 2041 2042 Backported from master: 2043 2021-05-11 Richard Biener <rguenther@suse.de> 2044 2045 PR middle-end/100509 2046 * gimple-fold.c (fold_gimple_assign): Only call 2047 get_symbol_constant_value on register type symbols. 2048 20492021-05-25 Richard Biener <rguenther@suse.de> 2050 2051 Backported from master: 2052 2021-05-10 Richard Biener <rguenther@suse.de> 2053 2054 PR tree-optimization/100492 2055 * tree-loop-distribution.c (find_seed_stmts_for_distribution): 2056 Find nothing when the loop contains an irreducible region. 2057 20582021-05-24 Alex Coplan <alex.coplan@arm.com> 2059 2060 Backported from master: 2061 2021-05-10 Alex Coplan <alex.coplan@arm.com> 2062 2063 PR target/99960 2064 * config/arm/mve.md (*mve_mov<mode>): Simplify output code. Use 2065 vldrw.u32 and vstrw.32 for V2D[IF]mode loads and stores. 2066 20672021-05-20 Andreas Krebbel <krebbel@linux.ibm.com> 2068 2069 Backported from master: 2070 2021-05-18 Andreas Krebbel <krebbel@linux.ibm.com> 2071 2072 PR c++/100281 2073 * tree.c (build_reference_type_for_mode) 2074 (build_pointer_type_for_mode): Pick pointer mode if MODE argument 2075 is VOIDmode. 2076 (build_reference_type, build_pointer_type): Invoke 2077 build_*_type_for_mode with VOIDmode. 2078 20792021-05-19 Bill Schmidt <wschmidt@linux.ibm.com> 2080 2081 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define 2082 __ROP_PROTECT__ if -mrop-protect is selected. 2083 20842021-05-19 Bill Schmidt <wschmidt@linux.ibm.com> 2085 2086 * config/rs6000/rs6000-internal.h (rs6000_stack): Add 2087 rop_hash_save_offset and rop_hash_size. 2088 * config/rs6000/rs6000-logue.c (rs6000_stack_info): Compute 2089 rop_hash_size and rop_hash_save_offset. 2090 (debug_stack_info): Dump rop_hash_save_offset and rop_hash_size. 2091 (rs6000_emit_prologue): Emit hashst[p] in prologue. 2092 (rs6000_emit_epilogue): Emit hashchk[p] in epilogue. 2093 * config/rs6000/rs6000.md (unspec): Add UNSPEC_HASHST and 2094 UNSPEC_HASHCHK. 2095 (hashst): New define_insn. 2096 (hashchk): Likewise. 2097 20982021-05-19 Bill Schmidt <wschmidt@linux.ibm.com> 2099 2100 * config/rs6000/rs6000.c (rs6000_option_override_internal): 2101 Disable shrink wrap when inserting ROP-protect instructions. 2102 * config/rs6000/rs6000.opt (mrop-protect): New option. 2103 (mprivileged): Likewise. 2104 * doc/invoke.texi: Document mrop-protect and mprivileged. 2105 21062021-05-19 Jonathan Wakely <jwakely@redhat.com> 2107 2108 Backported from master: 2109 2021-05-19 Jonathan Wakely <jwakely@redhat.com> 2110 2111 * doc/cpp.texi (Common Predefined Macros): Update documentation 2112 for the __GXX_EXPERIMENTAL_CXX0X__ macro. 2113 21142021-05-17 Alex Coplan <alex.coplan@arm.com> 2115 2116 Backported from master: 2117 2021-04-27 Alex Coplan <alex.coplan@arm.com> 2118 2119 PR target/99977 2120 * config/arm/arm.c (arm_split_compare_and_swap): Fix up codegen 2121 with negative immediates: ensure we expand cbranchsi4_scratch 2122 correctly and ensure we satisfy its constraints. 2123 * config/arm/sync.md 2124 (@atomic_compare_and_swap<CCSI:arch><NARROW:mode>_1): Don't 2125 attempt to tie two output operands together with constraints; 2126 collapse two alternatives. 2127 (@atomic_compare_and_swap<CCSI:arch><SIDI:mode>_1): Likewise. 2128 * config/arm/thumb1.md (cbranchsi4_neg_late): New. 2129 21302021-05-17 Marius Hillenbrand <mhillen@linux.ibm.com> 2131 2132 Backported from master: 2133 2021-05-17 Marius Hillenbrand <mhillen@linux.ibm.com> 2134 2135 PR bootstrap/100552 2136 * configure.ac: Replace pattern substitution with call to sed. 2137 * configure: Regenerate. 2138 21392021-05-13 Tobias Burnus <tobias@codesourcery.com> 2140 2141 Backported from master: 2142 2021-05-12 Tobias Burnus <tobias@codesourcery.com> 2143 2144 * omp-low.c (finish_taskreg_scan): Use the proper detach decl. 2145 21462021-05-13 Srinath Parvathaneni <srinath.parvathaneni@arm.com> 2147 2148 Backported from master: 2149 2021-05-11 Srinath Parvathaneni <srinath.parvathaneni@arm.com> 2150 Joe Ramsay <joe.ramsay@arm.com> 2151 2152 PR target/100419 2153 * config/arm/arm_mve.h (__arm_vstrwq_scatter_offset): Fix wrong arguments. 2154 (__arm_vcmpneq): Remove duplicate definition. 2155 (__arm_vstrwq_scatter_offset_p): Likewise. 2156 (__arm_vmaxq_x): Likewise. 2157 (__arm_vmlsdavaq): Likewise. 2158 (__arm_vmlsdavaxq): Likewise. 2159 (__arm_vmlsdavq_p): Likewise. 2160 (__arm_vmlsdavxq_p): Likewise. 2161 (__arm_vrmlaldavhaq): Likewise. 2162 (__arm_vstrbq_p): Likewise. 2163 (__arm_vstrbq_scatter_offset): Likewise. 2164 (__arm_vstrbq_scatter_offset_p): Likewise. 2165 (__arm_vstrdq_scatter_offset): Likewise. 2166 (__arm_vstrdq_scatter_offset_p): Likewise. 2167 (__arm_vstrdq_scatter_shifted_offset): Likewise. 2168 (__arm_vstrdq_scatter_shifted_offset_p): Likewise. 2169 21702021-05-13 Richard Earnshaw <rearnsha@arm.com> 2171 2172 PR target/100563 2173 * config/arm/arm.c (arm_canonicalize_comparison): Correctly 2174 canonicalize DImode inequality comparisons against the 2175 maximum integral value. 2176 21772021-05-12 Richard Biener <rguenther@suse.de> 2178 2179 Backported from master: 2180 2021-05-12 Richard Biener <rguenther@suse.de> 2181 2182 PR tree-optimization/100566 2183 * tree-ssa-sccvn.c (dominated_by_p_w_unex): Properly handle 2184 allow_back for all edge queries. 2185 21862021-05-12 Jakub Jelinek <jakub@redhat.com> 2187 2188 Backported from master: 2189 2021-05-12 Jakub Jelinek <jakub@redhat.com> 2190 2191 PR middle-end/100508 2192 * cfgexpand.c (expand_debug_expr): For DEBUG_EXPR_DECL with vector 2193 type, don't reuse DECL_RTL if it has different mode, instead force 2194 creation of a new DEBUG_EXPR. 2195 21962021-05-12 Jakub Jelinek <jakub@redhat.com> 2197 2198 Backported from master: 2199 2021-05-11 Jakub Jelinek <jakub@redhat.com> 2200 2201 PR middle-end/100471 2202 * omp-low.c (lower_omp_task_reductions): For OMP_TASKLOOP, if data 2203 is 0, bypass the reduction loop including 2204 GOMP_taskgroup_reduction_unregister call. 2205 22062021-05-12 Geng Qi <gengqi@linux.alibaba.com> 2207 2208 Backported from master: 2209 2021-04-30 Geng Qi <gengqi@linux.alibaba.com> 2210 2211 * config/riscv/riscv.opt (march=,mabi=): Negative itself. 2212 22132021-05-11 Alex Coplan <alex.coplan@arm.com> 2214 2215 PR target/99988 2216 * config/aarch64/aarch64-bti-insert.c (aarch64_bti_j_insn_p): New. 2217 (rest_of_insert_bti): Avoid inserting duplicate bti j insns for 2218 jump table targets. 2219 22202021-05-06 Marius Hillenbrand <mhillen@linux.ibm.com> 2221 2222 Backported from master: 2223 2021-05-06 Marius Hillenbrand <mhillen@linux.ibm.com> 2224 2225 * config/s390/s390-builtins.def (O_M5, O1_M5, ...): Remove unused macros. 2226 (s390_vec_permi_s64, s390_vec_permi_b64, s390_vec_permi_u64) 2227 (s390_vec_permi_dbl, s390_vpdi): Use the O3_U2 type for the immediate 2228 operand. 2229 * config/s390/s390.c (s390_const_operand_ok): Remove unused 2230 values. 2231 22322021-05-06 Roman Zhuykov <zhroma@ispras.ru> 2233 2234 Backported from master: 2235 2021-04-30 Roman Zhuykov <zhroma@ispras.ru> 2236 2237 PR rtl-optimization/100225 2238 PR rtl-optimization/84878 2239 * modulo-sched.c (sms_schedule): Use note_stores to skip loops 2240 where we have an instruction which touches (writes) any hard 2241 register from df->regular_block_artificial_uses set. 2242 Allow not-single-set instruction only right before basic block 2243 tail. 2244 22452021-05-06 Ilya Leoshkevich <iii@linux.ibm.com> 2246 2247 PR target/100217 2248 * config/s390/s390.c (s390_hard_fp_reg_p): New function. 2249 (s390_md_asm_adjust): Handle hard registers. 2250 22512021-05-05 Eric Botcazou <ebotcazou@adacore.com> 2252 2253 PR target/100402 2254 * config/i386/i386.c (ix86_compute_frame_layout): For a SEH target, 2255 always return the establisher frame for __builtin_frame_address (0). 2256 22572021-05-05 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> 2258 2259 Backported from master: 2260 2021-05-05 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> 2261 2262 PR rtl-optimization/100263 2263 * postreload.c (move2add_valid_value_p): Ensure register can 2264 change mode. 2265 22662021-05-05 Eric Botcazou <ebotcazou@adacore.com> 2267 2268 PR rtl-optimization/100411 2269 * cfgcleanup.c (try_crossjump_to_edge): Also skip end of prologue 2270 and beginning of function markers. 2271 22722021-05-05 Richard Biener <rguenther@suse.de> 2273 2274 Backported from master: 2275 2021-04-29 Richard Biener <rguenther@suse.de> 2276 2277 PR tree-optimization/100253 2278 * tree-vect-stmts.c (vectorizable_load): Do not assume 2279 element alignment when DR_MISALIGNMENT is -1. 2280 (vectorizable_store): Likewise. 2281 22822021-05-05 Richard Biener <rguenther@suse.de> 2283 2284 Backported from master: 2285 2021-04-27 Richard Biener <rguenther@suse.de> 2286 2287 PR tree-optimization/100278 2288 * tree-ssa-pre.c (compute_avail): Give up when we cannot 2289 adjust TBAA beacuse of mismatching bases. 2290 22912021-05-05 Richard Biener <rguenther@suse.de> 2292 2293 Backported from master: 2294 2021-04-29 Richard Biener <rguenther@suse.de> 2295 2296 PR ipa/100308 2297 * ipa-prop.c (ipcp_modif_dom_walker::before_dom_children): 2298 Track blocks to cleanup EH in new m_need_eh_cleanup. 2299 (ipcp_modif_dom_walker::cleanup_eh): New. 2300 (ipcp_transform_function): Release dominator info before 2301 doing EH cleanup. 2302 23032021-05-05 Richard Biener <rguenther@suse.de> 2304 2305 Backported from master: 2306 2021-05-04 Richard Biener <rguenther@suse.de> 2307 2308 PR tree-optimization/100414 2309 * tree-ssa-phiopt.c (get_non_trapping): Do not compute dominance 2310 info here. 2311 (tree_ssa_phiopt_worker): But unconditionally here. 2312 23132021-05-05 Richard Biener <rguenther@suse.de> 2314 2315 Backported from master: 2316 2021-05-04 Richard Biener <rguenther@suse.de> 2317 2318 PR tree-optimization/100329 2319 * tree-ssa-reassoc.c (can_reassociate_p): Do not reassociate 2320 asm goto defs. 2321 (insert_stmt_after): Assert we're not running into asm goto. 2322 23232021-05-04 Jakub Jelinek <jakub@redhat.com> 2324 2325 Backported from master: 2326 2021-05-02 Jakub Jelinek <jakub@redhat.com> 2327 2328 PR target/100375 2329 * config/nvptx/nvptx.c (nvptx_sese_pseudo): Use nullptr instead of 0 2330 as first argument of pseudo_node_t constructors. 2331 23322021-05-01 Maciej W. Rozycki <macro@orcam.me.uk> 2333 2334 Backported from master: 2335 2021-04-27 Maciej W. Rozycki <macro@orcam.me.uk> 2336 2337 * config/vax/vax.c (print_operand_address, vax_address_cost_1) 2338 (index_term_p): Handle ASHIFT too. 2339 23402021-04-30 David Edelsohn <dje.gcc@gmail.com> 2341 2342 Backported from master: 2343 2021-04-27 David Edelsohn <dje.gcc@gmail.com> 2344 2345 * config/rs6000/aix.h (SUBTARGET_DRIVER_SELF_SPECS): New. 2346 * config/rs6000/aix64.opt (m64): New. 2347 (m32): New. 2348 23492021-04-30 Alex Coplan <alex.coplan@arm.com> 2350 2351 Backported from master: 2352 2021-04-23 Alex Coplan <alex.coplan@arm.com> 2353 2354 PR rtl-optimization/100230 2355 * early-remat.c (early_remat::sort_candidates): Use delete[] 2356 instead of delete for array allocated with new[]. 2357 23582021-04-29 Richard Earnshaw <rearnsha@arm.com> 2359 2360 Backported from master: 2361 2021-04-28 Richard Earnshaw <rearnsha@arm.com> 2362 2363 PR target/100311 2364 * config/arm/arm.c (arm_hard_regno_mode_ok): Only allow VPR to be 2365 used in HImode. 2366 23672021-04-29 Jakub Jelinek <jakub@redhat.com> 2368 2369 Backported from master: 2370 2021-04-29 Jakub Jelinek <jakub@redhat.com> 2371 2372 PR target/100302 2373 * config/aarch64/aarch64.c (aarch64_add_offset_1_temporaries): Use 2374 absu_hwi instead of abs_hwi. 2375 23762021-04-29 Tom de Vries <tdevries@suse.de> 2377 2378 Backported from master: 2379 2021-04-29 Tom de Vries <tdevries@suse.de> 2380 2381 PR target/100232 2382 * internal-fn.c (expand_GOMP_SIMT_ENTER_ALLOC) 2383 (expand_GOMP_SIMT_LAST_LANE, expand_GOMP_SIMT_ORDERED_PRED) 2384 (expand_GOMP_SIMT_VOTE_ANY, expand_GOMP_SIMT_XCHG_BFLY) 2385 (expand_GOMP_SIMT_XCHG_IDX): Ensure target is assigned to. 2386 23872021-04-29 Richard Sandiford <richard.sandiford@arm.com> 2388 2389 Backported from master: 2390 2021-04-28 Richard Sandiford <richard.sandiford@arm.com> 2391 2392 PR target/100305 2393 * config/aarch64/constraints.md (Utq): Require the address to 2394 be valid for both the element mode and for V2DImode. 2395 23962021-04-29 Richard Sandiford <richard.sandiford@arm.com> 2397 2398 Backported from master: 2399 2021-04-27 Richard Sandiford <richard.sandiford@arm.com> 2400 2401 PR target/100270 2402 * config/aarch64/aarch64.c (aarch64_comp_type_attributes): Handle 2403 SVE attributes. 2404 24052021-04-28 YiFei Zhu <zhuyifei1999@gmail.com> 2406 2407 Backported from master: 2408 2021-04-23 YiFei Zhu <zhuyifei1999@gmail.com> 2409 2410 * config/bpf/bpf.h (ASM_OUTPUT_ALIGNED_BSS): Use .type and .lcomm. 2411 24122021-04-28 YiFei Zhu <zhuyifei1999@gmail.com> 2413 2414 Backported from master: 2415 2021-04-23 YiFei Zhu <zhuyifei1999@gmail.com> 2416 2417 * config/bpf/bpf.h (FUNCTION_BOUNDARY): Set to 64. 2418 24192021-04-28 Richard Earnshaw <rearnsha@arm.com> 2420 2421 Backported from master: 2422 2021-04-27 Richard Earnshaw <rearnsha@arm.com> 2423 2424 PR target/100236 2425 * config/arm/arm.c (THUMB2_WORK_REGS): Check PIC_OFFSET_TABLE_REGNUM 2426 is valid before including it in the mask. 2427 24282021-04-28 Uroš Bizjak <ubizjak@gmail.com> 2429 2430 PR target/100182 2431 * config/i386/sync.md (FILD_ATOMIC/FIST_ATOMIC FP load peephole2): 2432 Copy operand 3 to operand 4. Use sse_reg_operand 2433 as operand 3 predicate. 2434 (FILD_ATOMIC/FIST_ATOMIC FP load peephole2 with mem blockage): Ditto. 2435 (LDX_ATOMIC/STX_ATOMIC FP load peephole2): Ditto. 2436 (LDX_ATOMIC/LDX_ATOMIC FP load peephole2 with mem blockage): Ditto. 2437 (FILD_ATOMIC/FIST_ATOMIC FP store peephole2): 2438 Copy operand 1 to operand 0. 2439 (FILD_ATOMIC/FIST_ATOMIC FP store peephole2 with mem blockage): Ditto. 2440 (LDX_ATOMIC/STX_ATOMIC FP store peephole2): Ditto. 2441 (LDX_ATOMIC/LDX_ATOMIC FP store peephole2 with mem blockage): Ditto. 2442 24432021-04-28 Cui,Lili <lili.cui@intel.com> 2444 2445 * common/config/i386/i386-common.c (processor_names): 2446 Sync processor_names with processor_type. 2447 * config/i386/i386-options.c (processor_cost_table): 2448 Sync processor_cost_table with processor_type. 2449 24502021-04-27 Jakub Jelinek <jakub@redhat.com> 2451 2452 Backported from master: 2453 2021-04-27 Jakub Jelinek <jakub@redhat.com> 2454 2455 PR target/100200 2456 * config/aarch64/aarch64.c (aarch64_print_operand): Cast -UINTVAL 2457 back to HOST_WIDE_INT. 2458 24592021-04-27 Jakub Jelinek <jakub@redhat.com> 2460 2461 Backported from master: 2462 2021-04-27 Jakub Jelinek <jakub@redhat.com> 2463 2464 PR target/100200 2465 * config/aarch64/predicates.md (aarch64_sub_immediate, 2466 aarch64_plus_immediate): Use -UINTVAL instead of -INTVAL. 2467 * config/aarch64/aarch64.md (casesi, rotl<mode>3): Likewise. 2468 * config/aarch64/aarch64.c (aarch64_print_operand, 2469 aarch64_split_atomic_op, aarch64_expand_subvti): Likewise. 2470 24712021-04-27 Jakub Jelinek <jakub@redhat.com> 2472 2473 Backported from master: 2474 2021-04-27 Jakub Jelinek <jakub@redhat.com> 2475 2476 PR tree-optimization/100239 2477 * tree-vect-generic.c (lower_vec_perm): Don't accept constant 2478 permutations with all indices from the first zero element as vec_shl. 2479 24802021-04-27 Jakub Jelinek <jakub@redhat.com> 2481 2482 Backported from master: 2483 2021-04-27 Jakub Jelinek <jakub@redhat.com> 2484 2485 PR rtl-optimization/100254 2486 * cfgcleanup.c (outgoing_edges_match): Check REG_EH_REGION on 2487 last1 and last2 insns rather than BB_END (bb1) and BB_END (bb2) insns. 2488 24892021-04-27 Jakub Jelinek <jakub@redhat.com> 2490 2491 Backported from master: 2492 2021-04-26 Jakub Jelinek <jakub@redhat.com> 2493 2494 PR debug/100255 2495 * vmsdbgout.c (ASM_OUTPUT_DEBUG_STRING, vmsdbgout_begin_block, 2496 vmsdbgout_end_block, lookup_filename, vmsdbgout_source_line): Remove 2497 register keywords. 2498 24992021-04-27 Jakub Jelinek <jakub@redhat.com> 2500 2501 Backported from master: 2502 2021-04-21 Jakub Jelinek <jakub@redhat.com> 2503 2504 PR rtl-optimization/100148 2505 * cprop.c (constprop_register): Use next_nondebug_insn instead of 2506 NEXT_INSN. 2507 25082021-04-27 Release Manager 2509 2510 * GCC 11.1.0 released. 2511 25122021-04-20 Segher Boessenkool <segher@kernel.crashing.org> 2513 2514 Backported from master: 2515 2021-04-20 Segher Boessenkool <segher@kernel.crashing.org> 2516 2517 PR target/100108 2518 * config/rs6000/rs6000.c (rs6000_machine_from_flags): Do not consider 2519 OPTION_MASK_ISEL. 2520 25212021-04-20 Martin Liska <mliska@suse.cz> 2522 2523 * lto-streamer.h (LTO_major_version): Bump to 11. 2524 25252021-04-20 Martin Liska <mliska@suse.cz> 2526 2527 Backported from master: 2528 2021-04-20 Martin Liska <mliska@suse.cz> 2529 2530 * doc/invoke.texi: Fix typo. 2531 * params.opt: Likewise. 2532 25332021-04-20 Martin Liska <mliska@suse.cz> 2534 2535 Backported from master: 2536 2021-04-20 Martin Liska <mliska@suse.cz> 2537 2538 * doc/invoke.texi: Document new param. 2539 25402021-04-19 Andrew MacLeod <amacleod@redhat.com> 2541 2542 PR tree-optimization/100081 2543 * gimple-range-cache.h (ranger_cache): Inherit from gori_compute 2544 rather than gori_compute_cache. 2545 * gimple-range-gori.cc (is_gimple_logical_p): Move to top of file. 2546 (range_def_chain::m_logical_depth): New member. 2547 (range_def_chain::range_def_chain): Initialize m_logical_depth. 2548 (range_def_chain::get_def_chain): Don't build defchains through more 2549 than LOGICAL_LIMIT logical expressions. 2550 * params.opt (param_ranger_logical_depth): New. 2551 25522021-04-19 Richard Earnshaw <rearnsha@arm.com> 2553 2554 PR target/100067 2555 * config/arm/arm.c (arm_configure_build_target): Do not strip 2556 extended FPU/SIMD feature bits from the target ISA when -mfpu 2557 is specified (partial revert of r11-8168). 2558 25592021-04-19 Thomas Schwinge <thomas@codesourcery.com> 2560 2561 * params.opt (-param=openacc-kernels=): Add. 2562 * omp-oacc-kernels-decompose.cc 2563 (pass_omp_oacc_kernels_decompose::gate): Use it. 2564 * doc/invoke.texi (-fopenacc-kernels=@var{mode}): Move... 2565 (--param): ... here, 'openacc-kernels'. 2566 25672021-04-19 Martin Liska <mliska@suse.cz> 2568 2569 PR c/100143 2570 * gengtype.c (finish_root_table): Align function arguments 2571 in between declaration and definition. 2572 25732021-04-19 Eric Botcazou <ebotcazou@adacore.com> 2574 2575 * config/i386/winnt.c (i386_pe_seh_cold_init): Properly deal with 2576 frames larger than the SEH maximum frame size. 2577 25782021-04-18 Segher Boessenkool <segher@kernel.crashing.org> 2579 2580 PR rtl-optimization/99927 2581 * combine.c (distribute_notes) [REG_UNUSED]: If the register already 2582 is dead, just drop it. 2583 25842021-04-17 Iain Buclaw <ibuclaw@gdcproject.org> 2585 2586 PR d/99914 2587 * config/i386/winnt-d.c (TARGET_D_TEMPLATES_ALWAYS_COMDAT): Define. 2588 * doc/tm.texi: Regenerate. 2589 * doc/tm.texi.in (D language and ABI): Add @hook for 2590 TARGET_D_TEMPLATES_ALWAYS_COMDAT. 2591 25922021-04-17 Iain Buclaw <ibuclaw@gdcproject.org> 2593 2594 * config/darwin-d.c (darwin_d_handle_target_object_format): New 2595 function. 2596 (darwin_d_register_target_info): New function. 2597 (TARGET_D_REGISTER_OS_TARGET_INFO): Define. 2598 * config/dragonfly-d.c (dragonfly_d_handle_target_object_format): New 2599 function. 2600 (dragonfly_d_register_target_info): New function. 2601 (TARGET_D_REGISTER_OS_TARGET_INFO): Define. 2602 * config/freebsd-d.c (freebsd_d_handle_target_object_format): New 2603 function. 2604 (freebsd_d_register_target_info): New function. 2605 (TARGET_D_REGISTER_OS_TARGET_INFO): Define. 2606 * config/glibc-d.c (glibc_d_handle_target_object_format): New 2607 function. 2608 (glibc_d_register_target_info): New function. 2609 (TARGET_D_REGISTER_OS_TARGET_INFO): Define. 2610 * config/i386/i386-d.c (ix86_d_handle_target_object_format): New 2611 function. 2612 (ix86_d_register_target_info): Add ix86_d_handle_target_object_format 2613 as handler for objectFormat key. 2614 * config/i386/winnt-d.c (winnt_d_handle_target_object_format): New 2615 function. 2616 (winnt_d_register_target_info): New function. 2617 (TARGET_D_REGISTER_OS_TARGET_INFO): Define. 2618 * config/netbsd-d.c (netbsd_d_handle_target_object_format): New 2619 function. 2620 (netbsd_d_register_target_info): New function. 2621 (TARGET_D_REGISTER_OS_TARGET_INFO): Define. 2622 * config/openbsd-d.c (openbsd_d_handle_target_object_format): New 2623 function. 2624 (openbsd_d_register_target_info): New function. 2625 (TARGET_D_REGISTER_OS_TARGET_INFO): Define. 2626 * config/pa/pa-d.c (pa_d_handle_target_object_format): New function. 2627 (pa_d_register_target_info): Add pa_d_handle_target_object_format as 2628 handler for objectFormat key. 2629 * config/rs6000/rs6000-d.c (rs6000_d_handle_target_object_format): New 2630 function. 2631 (rs6000_d_register_target_info): Add 2632 rs6000_d_handle_target_object_format as handler for objectFormat key. 2633 * config/sol2-d.c (solaris_d_handle_target_object_format): New 2634 function. 2635 (solaris_d_register_target_info): New function. 2636 (TARGET_D_REGISTER_OS_TARGET_INFO): Define. 2637 26382021-04-16 Jakub Jelinek <jakub@redhat.com> 2639 2640 PR target/91710 2641 * config/aarch64/aarch64.c (aarch64_function_arg_alignment): Change 2642 abi_break argument from bool * to unsigned *, store there the pre-GCC 9 2643 alignment. 2644 (aarch64_layout_arg, aarch64_gimplify_va_arg_expr): Adjust callers. 2645 (aarch64_function_arg_regno_p): Likewise. Only emit -Wpsabi note if 2646 the old and new alignment after applying MIN/MAX to it is different. 2647 26482021-04-16 Tamar Christina <tamar.christina@arm.com> 2649 2650 PR target/100048 2651 * config/aarch64/aarch64-sve.md (@aarch64_sve_trn1_conv<mode>): New. 2652 * config/aarch64/aarch64.c (aarch64_expand_sve_const_pred_trn): Use new 2653 TRN optab. 2654 * config/aarch64/iterators.md (UNSPEC_TRN1_CONV): New. 2655 26562021-04-16 Bill Schmidt <wschmidt@linux.ibm.com> 2657 2658 * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions): Revise 2659 this section and its subsections. 2660 26612021-04-16 Jakub Jelinek <jakub@redhat.com> 2662 2663 PR target/100075 2664 * config/aarch64/aarch64.md (*neg_asr_si2_extr, *extrsi5_insn_di): New 2665 define_insn patterns. 2666 26672021-04-16 Richard Sandiford <richard.sandiford@arm.com> 2668 2669 PR rtl-optimization/98689 2670 * reg-notes.def (UNTYPED_CALL): New note. 2671 * combine.c (distribute_notes): Handle it. 2672 * emit-rtl.c (try_split): Likewise. 2673 * rtlanal.c (rtx_properties::try_to_add_insn): Likewise. Assume 2674 that calls with the note implicitly set all return value registers. 2675 * builtins.c (expand_builtin_apply): Add a REG_UNTYPED_CALL 2676 to untyped_calls. 2677 26782021-04-16 Richard Sandiford <richard.sandiford@arm.com> 2679 2680 PR rtl-optimization/99596 2681 * rtlanal.c (rtx_properties::try_to_add_insn): Don't add global 2682 register accesses for const calls. Assume that pure functions 2683 can only read from global registers. Ignore cases in which 2684 the stack pointer has been marked global. 2685 26862021-04-16 Jakub Jelinek <jakub@redhat.com> 2687 2688 PR target/99767 2689 * tree-vect-loop.c (vect_transform_loop): Don't remove just 2690 dead scalar .MASK_LOAD calls, but also dead .COND_* calls - replace 2691 them by their last argument. 2692 26932021-04-15 Martin Liska <mliska@suse.cz> 2694 2695 * doc/invoke.texi: Other params don't use it, remove it. 2696 26972021-04-15 Richard Biener <rguenther@suse.de> 2698 2699 * gimple-builder.h: Add deprecation note. 2700 27012021-04-15 Richard Sandiford <richard.sandiford@arm.com> 2702 2703 PR c++/98852 2704 * attribs.h (restrict_type_identity_attributes_to): Declare. 2705 * attribs.c (restrict_type_identity_attributes_to): New function. 2706 27072021-04-15 Richard Sandiford <richard.sandiford@arm.com> 2708 2709 PR c/98852 2710 * attribs.h (affects_type_identity_attributes): Declare. 2711 * attribs.c (remove_attributes_matching): New function. 2712 (affects_type_identity_attributes): Likewise. 2713 27142021-04-15 Jakub Jelinek <jakub@redhat.com> 2715 2716 PR target/100056 2717 * config/aarch64/aarch64.md (*<LOGICAL:optab>_<SHIFT:optab><mode>3): 2718 Add combine splitters for *<LOGICAL:optab>_ashl<mode>3 with 2719 ZERO_EXTEND, SIGN_EXTEND or AND. 2720 27212021-04-14 Richard Sandiford <richard.sandiford@arm.com> 2722 2723 PR rtl-optimization/99929 2724 * rtl.h (same_vector_encodings_p): New function. 2725 * cse.c (exp_equiv_p): Check that CONST_VECTORs have the same encoding. 2726 * cselib.c (rtx_equal_for_cselib_1): Likewise. 2727 * jump.c (rtx_renumbered_equal_p): Likewise. 2728 * lra-constraints.c (operands_match_p): Likewise. 2729 * reload.c (operands_match_p): Likewise. 2730 * rtl.c (rtx_equal_p_cb, rtx_equal_p): Likewise. 2731 27322021-04-14 Richard Sandiford <richard.sandiford@arm.com> 2733 2734 * print-rtl.c (rtx_writer::print_rtx_operand_codes_E_and_V): Print 2735 more information about variable-length CONST_VECTORs. 2736 27372021-04-14 Vladimir N. Makarov <vmakarov@redhat.com> 2738 2739 PR rtl-optimization/100066 2740 * lra-constraints.c (split_reg): Check paradoxical_subreg_p for 2741 ordered modes when choosing splitting mode for hard reg. 2742 27432021-04-14 Richard Sandiford <richard.sandiford@arm.com> 2744 2745 PR target/99246 2746 * config/aarch64/aarch64.c (aarch64_expand_sve_const_vector_sel): 2747 New function. 2748 (aarch64_expand_sve_const_vector): Use it for nelts_per_pattern==2. 2749 27502021-04-14 Andreas Krebbel <krebbel@linux.ibm.com> 2751 2752 * config/s390/s390-builtins.def (O_M5, O_M12, ...): Add new macros 2753 for mask operand types. 2754 (s390_vec_permi_s64, s390_vec_permi_b64, s390_vec_permi_u64) 2755 (s390_vec_permi_dbl, s390_vpdi): Use the M5 type for the immediate 2756 operand. 2757 (s390_vec_msum_u128, s390_vmslg): Use the M12 type for the 2758 immediate operand. 2759 * config/s390/s390.c (s390_const_operand_ok): Check the new 2760 operand types and generate a list of valid values. 2761 27622021-04-14 Iain Buclaw <ibuclaw@gdcproject.org> 2763 2764 * doc/tm.texi: Regenerate. 2765 * doc/tm.texi.in (D language and ABI): Add @hook for 2766 TARGET_D_REGISTER_OS_TARGET_INFO. 2767 27682021-04-14 Iain Buclaw <ibuclaw@gdcproject.org> 2769 2770 * config/aarch64/aarch64-d.c (aarch64_d_handle_target_float_abi): New 2771 function. 2772 (aarch64_d_register_target_info): New function. 2773 * config/aarch64/aarch64-protos.h (aarch64_d_register_target_info): 2774 Declare. 2775 * config/aarch64/aarch64.h (TARGET_D_REGISTER_CPU_TARGET_INFO): 2776 Define. 2777 * config/arm/arm-d.c (arm_d_handle_target_float_abi): New function. 2778 (arm_d_register_target_info): New function. 2779 * config/arm/arm-protos.h (arm_d_register_target_info): Declare. 2780 * config/arm/arm.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define. 2781 * config/i386/i386-d.c (ix86_d_handle_target_float_abi): New function. 2782 (ix86_d_register_target_info): New function. 2783 * config/i386/i386-protos.h (ix86_d_register_target_info): Declare. 2784 * config/i386/i386.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define. 2785 * config/mips/mips-d.c (mips_d_handle_target_float_abi): New function. 2786 (mips_d_register_target_info): New function. 2787 * config/mips/mips-protos.h (mips_d_register_target_info): Declare. 2788 * config/mips/mips.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define. 2789 * config/pa/pa-d.c (pa_d_handle_target_float_abi): New function. 2790 (pa_d_register_target_info): New function. 2791 * config/pa/pa-protos.h (pa_d_register_target_info): Declare. 2792 * config/pa/pa.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define. 2793 * config/riscv/riscv-d.c (riscv_d_handle_target_float_abi): New 2794 function. 2795 (riscv_d_register_target_info): New function. 2796 * config/riscv/riscv-protos.h (riscv_d_register_target_info): Declare. 2797 * config/riscv/riscv.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define. 2798 * config/rs6000/rs6000-d.c (rs6000_d_handle_target_float_abi): New 2799 function. 2800 (rs6000_d_register_target_info): New function. 2801 * config/rs6000/rs6000-protos.h (rs6000_d_register_target_info): 2802 Declare. 2803 * config/rs6000/rs6000.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define. 2804 * config/s390/s390-d.c (s390_d_handle_target_float_abi): New function. 2805 (s390_d_register_target_info): New function. 2806 * config/s390/s390-protos.h (s390_d_register_target_info): Declare. 2807 * config/s390/s390.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define. 2808 * config/sparc/sparc-d.c (sparc_d_handle_target_float_abi): New 2809 function. 2810 (sparc_d_register_target_info): New function. 2811 * config/sparc/sparc-protos.h (sparc_d_register_target_info): Declare. 2812 * config/sparc/sparc.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define. 2813 * doc/tm.texi: Regenerate. 2814 * doc/tm.texi.in (D language and ABI): Add @hook for 2815 TARGET_D_REGISTER_CPU_TARGET_INFO. 2816 28172021-04-14 Iain Buclaw <ibuclaw@gdcproject.org> 2818 2819 * config/i386/i386-d.c (ix86_d_has_stdcall_convention): New function. 2820 * config/i386/i386-protos.h (ix86_d_has_stdcall_convention): Declare. 2821 * config/i386/i386.h (TARGET_D_HAS_STDCALL_CONVENTION): Define. 2822 * doc/tm.texi: Regenerate. 2823 * doc/tm.texi.in (D language and ABI): Add @hook for 2824 TARGET_D_HAS_STDCALL_CONVENTION. 2825 28262021-04-14 Richard Biener <rguenther@suse.de> 2827 2828 * tree-cfg.c (verify_gimple_assign_ternary): Verify that 2829 VEC_COND_EXPRs have a gimple_val condition. 2830 * tree-ssa-propagate.c (valid_gimple_rhs_p): VEC_COND_EXPR 2831 can no longer have a GENERIC condition. 2832 28332021-04-14 Richard Earnshaw <rearnsha@arm.com> 2834 2835 PR target/100067 2836 * config/arm/arm.c (arm_configure_build_target): Strip isa_all_fpbits 2837 from the isa_delta when -mfpu has been used. 2838 (arm_options_perform_arch_sanity_checks): It's the architecture that 2839 lacks an FPU not the processor. 2840 28412021-04-13 Richard Biener <rguenther@suse.de> 2842 2843 PR tree-optimization/100053 2844 * tree-ssa-sccvn.c (vn_nary_op_get_predicated_value): Do 2845 not use optimistic dominance queries for backedges to validate 2846 predicated values. 2847 (dominated_by_p_w_unex): Add parameter to ignore executable 2848 state on backedges. 2849 (rpo_elim::eliminate_avail): Adjust. 2850 28512021-04-13 Jakub Jelinek <jakub@redhat.com> 2852 2853 PR target/100028 2854 * config/aarch64/aarch64.md (*aarch64_bfxil<mode>_extr, 2855 *aarch64_bfxilsi_extrdi): New define_insn patterns. 2856 28572021-04-13 Jakub Jelinek <jakub@redhat.com> 2858 2859 PR target/99648 2860 * simplify-rtx.c (simplify_immed_subreg): For MODE_COMPOSITE_P 2861 outermode, return NULL if the result doesn't encode back to the 2862 original byte sequence. 2863 (simplify_gen_subreg): Don't create SUBREGs from constants to 2864 MODE_COMPOSITE_P outermode. 2865 28662021-04-12 Jakub Jelinek <jakub@redhat.com> 2867 2868 PR rtl-optimization/99905 2869 * combine.c (expand_compound_operation): If pos + len > modewidth, 2870 perform the right shift by pos in inner_mode and then convert to mode, 2871 instead of trying to simplify a shift of rtx with inner_mode by pos 2872 as if it was a shift in mode. 2873 28742021-04-12 Jakub Jelinek <jakub@redhat.com> 2875 2876 PR debug/99830 2877 * combine.c (simplify_and_const_int_1): Don't optimize varop 2878 away if it has side-effects. 2879 28802021-04-12 Martin Liska <mliska@suse.cz> 2881 2882 * doc/extend.texi: Escape @smallexample content. 2883 28842021-04-12 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> 2885 2886 * config/s390/s390.md ("*movdi_31", "*movdi_64"): Add 2887 alternative in order to load a DFP zero. 2888 28892021-04-12 Martin Liska <mliska@suse.cz> 2890 2891 * doc/extend.texi: Be more precise in documentation 2892 of symver attribute. 2893 28942021-04-12 Martin Liska <mliska@suse.cz> 2895 2896 PR sanitizer/99877 2897 * gimplify.c (gimplify_expr): Right now, we unpoison all 2898 variables before a goto <dest>. We should not do it if we are 2899 in a omp context. 2900 29012021-04-12 Cui,Lili <lili.cui@intel.com> 2902 2903 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle 2904 rocketlake. 2905 * common/config/i386/i386-common.c (processor_names): Add 2906 rocketlake. 2907 (processor_alias_table): Add rocketlake. 2908 * common/config/i386/i386-cpuinfo.h (processor_subtypes): Add 2909 INTEL_COREI7_ROCKETLAKE. 2910 * config.gcc: Add -march=rocketlake. 2911 * config/i386/i386-c.c (ix86_target_macros_internal): Handle 2912 rocketlake. 2913 * config/i386/i386-options.c (m_ROCKETLAKE) : Define. 2914 (processor_cost_table): Add rocketlake cost. 2915 * config/i386/i386.h (ix86_size_cost) : Define 2916 TARGET_ROCKETLAKE. 2917 (processor_type) : Add PROCESSOR_ROCKETLAKE. 2918 (PTA_ROCKETLAKE): Ditto. 2919 * doc/extend.texi: Add rocketlake. 2920 * doc/invoke.texi: Add rocketlake. 2921 29222021-04-12 Cui,Lili <lili.cui@intel.com> 2923 2924 * config/i386/i386.h (PTA_ALDERLAKE): Change alderlake ISA list. 2925 * config/i386/i386-options.c (m_CORE_AVX2): Add m_ALDERLAKE. 2926 * common/config/i386/cpuinfo.h (get_intel_cpu): Add AlderLake model. 2927 * doc/invoke.texi: Change alderlake ISA list. 2928 29292021-04-11 Hafiz Abid Qadeer <abidh@codesourcery.com> 2930 2931 PR middle-end/98088 2932 * omp-expand.c (expand_oacc_collapse_init): Update condition in 2933 a gcc_assert. 2934 29352021-04-10 H.J. Lu <hjl.tools@gmail.com> 2936 2937 PR target/99744 2938 * config/i386/serializeintrin.h (_serialize): Defined as macro. 2939 29402021-04-10 Jakub Jelinek <jakub@redhat.com> 2941 2942 PR lto/99849 2943 * expr.c (expand_expr_addr_expr_1): Test is_global_var rather than 2944 just TREE_STATIC on COMPOUND_LITERAL_EXPR_DECLs. 2945 29462021-04-10 Jakub Jelinek <jakub@redhat.com> 2947 2948 PR middle-end/99989 2949 * gimple-ssa-warn-alloca.c 2950 (alloca_type_and_limit::alloca_type_and_limit): Initialize limit to 2951 0 with integer precision unconditionally. 2952 29532021-04-10 Jakub Jelinek <jakub@redhat.com> 2954 2955 PR rtl-optimization/98601 2956 * rtlanal.c (rtx_addr_can_trap_p_1): Allow in assert unknown size 2957 not just for BLKmode, but also for VOIDmode. For STRICT_ALIGNMENT 2958 unaligned_mems handle VOIDmode like BLKmode. 2959 29602021-04-10 Jan Hubicka <hubicka@ucw.cz> 2961 2962 PR lto/99857 2963 * tree.c (free_lang_data_in_decl): Do not release body of 2964 declare_variant_alt. 2965 29662021-04-09 Richard Sandiford <richard.sandiford@arm.com> 2967 2968 * config/aarch64/aarch64.c (aarch64_option_restore): If the 2969 architecture was specified explicitly and the tuning wasn't, 2970 tune for the architecture rather than the configured default CPU. 2971 29722021-04-09 Richard Sandiford <richard.sandiford@arm.com> 2973 2974 * config/aarch64/aarch64.md (tlsdesc_small_sve_<mode>): Use X30 2975 as the temporary register. 2976 29772021-04-09 Martin Liska <mliska@suse.cz> 2978 2979 * doc/extend.texi: Move non-target attributes on the top level. 2980 29812021-04-09 Martin Liska <mliska@suse.cz> 2982 2983 * doc/invoke.texi: Document minimum and maximum value of the 2984 argument for both supported compression algorithms. 2985 29862021-04-08 David Edelsohn <dje.gcc@gmail.com> 2987 2988 * config/rs6000/rs6000.c (rs6000_xcoff_select_section): Select 2989 TLS BSS before TLS data. 2990 * config/rs6000/xcoff.h (ASM_OUTPUT_TLS_COMMON): Use .comm. 2991 29922021-04-08 Richard Sandiford <richard.sandiford@arm.com> 2993 2994 * doc/sourcebuild.texi (stdint_types_mbig_endian): Document. 2995 29962021-04-08 Richard Sandiford <richard.sandiford@arm.com> 2997 2998 * match.pd: Extend vec_cond folds to handle shifts. 2999 30002021-04-08 Maciej W. Rozycki <macro@orcam.me.uk> 3001 3002 * config/vax/vax.md: Fix comment for `*bit<mode>' pattern's 3003 peephole. 3004 30052021-04-08 Alex Coplan <alex.coplan@arm.com> 3006 3007 PR target/99647 3008 * config/arm/iterators.md (MVE_vecs): New. 3009 (V_elem): Also handle V2DF. 3010 * config/arm/mve.md (*mve_mov<mode>): Rename to ... 3011 (*mve_vdup<mode>): ... this. Remove second alternative since 3012 vec_duplicate of const_int is not canonical RTL, and we don't 3013 want to match symbol_refs. 3014 (*mve_vec_duplicate<mode>): Delete (pattern is redundant). 3015 30162021-04-08 Xionghu Luo <luoxhu@linux.ibm.com> 3017 3018 * fold-const.c (fold_single_bit_test): Fix typo. 3019 * print-rtl.c (print_rtx_insn_vec): Call print_rtl_single 3020 instead. 3021 30222021-04-07 Richard Sandiford <richard.sandiford@arm.com> 3023 3024 PR tree-optimization/97513 3025 * tree-vect-slp.c (vect_add_slp_permutation): New function, 3026 split out from... 3027 (vectorizable_slp_permutation): ...here. Detect cases in which 3028 all VEC_PERM_EXPRs are guaranteed to have the same stepped 3029 permute vector and only generate one permute vector for that case. 3030 Extend that case to handle variable-length vectors. 3031 30322021-04-07 Richard Sandiford <richard.sandiford@arm.com> 3033 3034 PR tree-optimization/99873 3035 * tree-vect-slp.c (vect_slp_prefer_store_lanes_p): New function. 3036 (vect_build_slp_instance): Don't split store groups that could 3037 use IFN_STORE_LANES. 3038 30392021-04-07 Jakub Jelinek <jakub@redhat.com> 3040 3041 PR target/99872 3042 * varasm.c (output_constant_pool_contents): Don't strip name encoding 3043 from XSTR (desc->sym, 0) or from label before passing those to 3044 ASM_OUTPUT_DEF. 3045 30462021-04-07 Richard Biener <rguenther@suse.de> 3047 3048 PR tree-optimization/99954 3049 * tree-loop-distribution.c: Include tree-affine.h. 3050 (generate_memcpy_builtin): Try using tree-affine to prove 3051 non-overlap. 3052 (loop_distribution::classify_builtin_ldst): Always classify 3053 as PKIND_MEMMOVE. 3054 30552021-04-07 Richard Biener <rguenther@suse.de> 3056 3057 PR tree-optimization/99947 3058 * tree-vect-loop.c (vectorizable_induction): Pre-allocate 3059 steps vector to avoid pushing elements from the reallocated 3060 vector. 3061 30622021-04-07 Richard Biener <rguenther@suse.de> 3063 3064 * tree-ssa-sccvn.h (print_vn_reference_ops): Declare. 3065 * tree-ssa-pre.c (print_pre_expr): Factor out VN reference operand 3066 printing... 3067 * tree-ssa-sccvn.c (print_vn_reference_ops): ... into this new 3068 function. 3069 (debug_vn_reference_ops): New. 3070 30712021-04-07 Bin Cheng <bin.cheng@linux.alibaba.com> 3072 3073 PR tree-optimization/98736 3074 * tree-loop-distribution.c 3075 * (loop_distribution::bb_top_order_init): 3076 Compute RPO with programing order preserved by calling function 3077 rev_post_order_and_mark_dfs_back_seme. 3078 30792021-04-06 Vladimir N. Makarov <vmakarov@redhat.com> 3080 3081 PR target/99781 3082 * lra-constraints.c (split_reg): Don't check paradoxical_subreg_p. 3083 * lra-lives.c (clear_sparseset_regnos, regnos_in_sparseset_p): New 3084 functions. 3085 (process_bb_lives): Don't update biggest mode of hard reg for 3086 implicit in multi-register group. Use the new functions for 3087 updating dead_set and unused_set by register notes. 3088 30892021-04-06 Xianmiao Qu <xianmiao_qu@c-sky.com> 3090 3091 * config/csky/csky_pipeline_ck802.md : Use insn reservation name 3092 instead of *. 3093 30942021-04-06 H.J. Lu <hjl.tools@gmail.com> 3095 3096 * config/i386/x86-tune-costs.h (skylake_memcpy): Updated. 3097 (skylake_memset): Likewise. 3098 (skylake_cost): Change CLEAR_RATIO to 17. 3099 * config/i386/x86-tune.def (X86_TUNE_PREFER_KNOWN_REP_MOVSB_STOSB): 3100 Replace m_CANNONLAKE, m_ICELAKE_CLIENT, m_ICELAKE_SERVER, 3101 m_TIGERLAKE and m_SAPPHIRERAPIDS with m_SKYLAKE and m_CORE_AVX512. 3102 31032021-04-06 Richard Biener <rguenther@suse.de> 3104 3105 PR tree-optimization/99880 3106 * tree-vect-loop.c (maybe_set_vectorized_backedge_value): Only 3107 set vectorized defs of relevant PHIs. 3108 31092021-04-06 Richard Biener <rguenther@suse.de> 3110 3111 PR tree-optimization/99924 3112 * tree-vect-slp.c (vect_bb_partition_graph_r): Do not mark 3113 nodes w/o scalar stmts as visited. 3114 31152021-04-06 Alex Coplan <alex.coplan@arm.com> 3116 3117 PR target/99748 3118 * config/arm/arm.c (arm_libcall_uses_aapcs_base): Also use base 3119 PCS for [su]fix_optab. 3120 31212021-04-03 Iain Sandoe <iain@sandoe.co.uk> 3122 3123 * config/darwin.c (machopic_legitimize_pic_address): Check 3124 that the current pic register is one of the hard reg set 3125 before setting liveness. 3126 31272021-04-03 Iain Sandoe <iain@sandoe.co.uk> 3128 3129 * config/darwin.c (machopic_legitimize_pic_address): Fix 3130 whitespace, remove unused code. 3131 31322021-04-03 Jakub Jelinek <jakub@redhat.com> 3133 3134 PR tree-optimization/99882 3135 * gimple-ssa-store-merging.c (bswap_view_convert): Handle val with 3136 pointer type. 3137 31382021-04-03 Jakub Jelinek <jakub@redhat.com> 3139 3140 PR rtl-optimization/99863 3141 * dse.c (replace_read): Drop regs_live argument. Instead of 3142 regs_live, use store_insn->fixed_regs_live if non-NULL, 3143 otherwise punt if insns sequence clobbers or sets any hard 3144 registers. 3145 31462021-04-03 Jakub Jelinek <jakub@redhat.com> 3147 3148 PR testsuite/98125 3149 * targhooks.h (default_print_patchable_function_entry_1): Declare. 3150 * targhooks.c (default_print_patchable_function_entry_1): New function, 3151 copied from default_print_patchable_function_entry with an added flags 3152 argument. 3153 (default_print_patchable_function_entry): Rewritten into a small 3154 wrapper around default_print_patchable_function_entry_1. 3155 * config/rs6000/rs6000.c (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): 3156 Redefine. 3157 (rs6000_print_patchable_function_entry): New function. 3158 31592021-04-02 Eric Botcazou <ebotcazou@adacore.com> 3160 3161 * doc/invoke.texi (fdelete-dead-exceptions): Minor tweak. 3162 31632021-04-01 Jason Merrill <jason@redhat.com> 3164 3165 PR c++/98481 3166 * common.opt: Document v15 and v16. 3167 31682021-04-01 Richard Biener <rguenther@suse.de> 3169 3170 PR tree-optimization/99863 3171 * gimplify.c (gimplify_init_constructor): Recompute vector 3172 constructor flags. 3173 31742021-04-01 Jakub Jelinek <jakub@redhat.com> 3175 3176 * doc/extend.texi (symver attribute): Fix up syntax errors 3177 in the examples. 3178 31792021-04-01 Jakub Jelinek <jakub@redhat.com> 3180 3181 PR tree-optimization/96573 3182 * gimple-ssa-store-merging.c (init_symbolic_number): Handle 3183 also pointer types. 3184 31852021-04-01 Richard Biener <rguenther@suse.de> 3186 3187 PR tree-optimization/99856 3188 * tree-vect-patterns.c (vect_recog_over_widening_pattern): Promote 3189 precision to vector element precision. 3190 31912021-04-01 Martin Jambor <mjambor@suse.cz> 3192 3193 PR tree-optimization/97009 3194 * tree-sra.c (access_or_its_child_written): New function. 3195 (propagate_subaccesses_from_rhs): Use it instead of a simple grp_write 3196 test. 3197 31982021-03-31 Jan Hubicka <hubicka@ucw.cz> 3199 3200 PR ipa/98265 3201 * cif-code.def (USES_COMDAT_LOCAL): Make CIF_FINAL_NORMAL. 3202 32032021-03-31 Pat Haugen <pthaugen@linux.ibm.com> 3204 3205 PR target/99133 3206 * config/rs6000/altivec.md (xxspltiw_v4si, xxspltiw_v4sf_inst, 3207 xxspltidp_v2df_inst, xxsplti32dx_v4si_inst, xxsplti32dx_v4sf_inst, 3208 xxblend_<mode>, xxpermx_inst, xxeval): Mark prefixed. 3209 * config/rs6000/mma.md (mma_<vvi4i4i8>, mma_<avvi4i4i8>, 3210 mma_<vvi4i4i2>, mma_<avvi4i4i2>, mma_<vvi4i4>, mma_<avvi4i4>, 3211 mma_<pvi4i2>, mma_<apvi4i2>, mma_<vvi4i4i4>, mma_<avvi4i4i4>): 3212 Likewise. 3213 * config/rs6000/rs6000.c (rs6000_final_prescan_insn): Adjust test. 3214 * config/rs6000/rs6000.md (define_attr "maybe_prefixed"): New. 3215 (define_attr "prefixed"): Update initializer. 3216 32172021-03-31 Jakub Jelinek <jakub@redhat.com> 3218 3219 PR debug/99490 3220 * dwarf2out.c (debug_ranges_dwo_section): New variable. 3221 (DW_RANGES_IDX_SKELETON): Define. 3222 (struct dw_ranges): Add begin_entry and end_entry members. 3223 (DEBUG_DWO_RNGLISTS_SECTION): Define. 3224 (add_ranges_num): Adjust r initializer for addition of *_entry 3225 members. 3226 (add_ranges_by_labels): For -gsplit-dwarf and force_direct, 3227 set idx to DW_RANGES_IDX_SKELETON. 3228 (use_distinct_base_address_for_range): New function. 3229 (index_rnglists): Don't set r->idx if it is equal to 3230 DW_RANGES_IDX_SKELETON. Initialize r->begin_entry and 3231 r->end_entry for -gsplit-dwarf if those will be needed by 3232 output_rnglists. 3233 (output_rnglists): Add DWO argument. If true, switch to 3234 debug_ranges_dwo_section rather than debug_ranges_section. 3235 Adjust l1/l2 label indexes. Only output the offset table when 3236 dwo is true and don't include in there the skeleton range 3237 entry if present. For -gsplit-dwarf, skip ranges that belong 3238 to the other rnglists section. Change return type from void 3239 to bool and return true if there are any range entries for 3240 the other section. For dwarf_split_debug_info use 3241 DW_RLE_startx_endx, DW_RLE_startx_length and DW_RLE_base_addressx 3242 entries instead of DW_RLE_start_end, DW_RLE_start_length and 3243 DW_RLE_base_address. Use use_distinct_base_address_for_range. 3244 (init_sections_and_labels): Initialize debug_ranges_dwo_section 3245 if -gsplit-dwarf and DWARF >= 5. Adjust ranges_section_label 3246 and range_base_label indexes. 3247 (dwarf2out_finish): Call index_rnglists earlier before finalizing 3248 .debug_addr. Never emit DW_AT_rnglists_base attribute. For 3249 -gsplit-dwarf and DWARF >= 5 call output_rnglists up to twice 3250 with different dwo arguments. 3251 (dwarf2out_c_finalize): Clear debug_ranges_dwo_section. 3252 32532021-03-31 Richard Sandiford <richard.sandiford@arm.com> 3254 3255 PR tree-optimization/98268 3256 * gimple-fold.c (maybe_canonicalize_mem_ref_addr): Call 3257 recompute_tree_invariant_for_addr_expr after successfully 3258 folding a TARGET_MEM_REF that occurs inside an ADDR_EXPR. 3259 32602021-03-31 Richard Sandiford <richard.sandiford@arm.com> 3261 3262 PR tree-optimization/99726 3263 * tree-data-ref.c (create_intersect_range_checks_index): Bail 3264 out if there is more than one access function SCEV for the loop 3265 being versioned. 3266 32672021-03-31 Richard Sandiford <richard.sandiford@arm.com> 3268 3269 PR rtl-optimization/97141 3270 PR rtl-optimization/98726 3271 * emit-rtl.c (valid_for_const_vector_p): Return true for 3272 CONST_POLY_INT_P. 3273 * rtx-vector-builder.h (rtx_vector_builder::step): Return a 3274 poly_wide_int instead of a wide_int. 3275 (rtx_vector_builder::apply_set): Take a poly_wide_int instead 3276 of a wide_int. 3277 * rtx-vector-builder.c (rtx_vector_builder::apply_set): Likewise. 3278 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Return 3279 false for CONST_VECTORs that cannot be forced to memory. 3280 * config/aarch64/aarch64-simd.md (mov<mode>): If a CONST_VECTOR 3281 is too complex to force to memory, build it up from individual 3282 elements instead. 3283 32842021-03-31 Jan Hubicka <jh@suse.cz> 3285 3286 PR lto/99447 3287 * cgraph.c (cgraph_node::release_body): Fix overactive check. 3288 32892021-03-31 Christophe Lyon <christophe.lyon@linaro.org> 3290 3291 PR target/99786 3292 * config/arm/vec-common.md (mul<mode>3): Disable on iwMMXT, expect 3293 for V4HI and V2SI. 3294 32952021-03-31 H.J. Lu <hjl.tools@gmail.com> 3296 3297 * config/i386/i386-expand.c (expand_set_or_cpymem_via_rep): 3298 For TARGET_PREFER_KNOWN_REP_MOVSB_STOSB, don't convert QImode 3299 to SImode. 3300 (decide_alg): For TARGET_PREFER_KNOWN_REP_MOVSB_STOSB, use 3301 "rep movsb/stosb" only for known sizes. 3302 * config/i386/i386-options.c (processor_cost_table): Use Ice 3303 Lake cost for Cannon Lake, Ice Lake, Tiger Lake, Sapphire 3304 Rapids and Alder Lake. 3305 * config/i386/i386.h (TARGET_PREFER_KNOWN_REP_MOVSB_STOSB): New. 3306 * config/i386/x86-tune-costs.h (icelake_memcpy): New. 3307 (icelake_memset): Likewise. 3308 (icelake_cost): Likewise. 3309 * config/i386/x86-tune.def (X86_TUNE_PREFER_KNOWN_REP_MOVSB_STOSB): 3310 New. 3311 33122021-03-31 Richard Sandiford <richard.sandiford@arm.com> 3313 3314 PR target/98119 3315 * config/aarch64/aarch64.c 3316 (aarch64_vectorize_preferred_vector_alignment): Query the size 3317 of the provided SVE vector; do not assume that all SVE vectors 3318 have the same size. 3319 33202021-03-31 Jan Hubicka <jh@suse.cz> 3321 3322 PR lto/99447 3323 * cgraph.c (cgraph_node::release_body): Remove all callers and 3324 references. 3325 * cgraphclones.c (cgraph_node::materialize_clone): Do not do it here. 3326 * cgraphunit.c (cgraph_node::expand): And here. 3327 33282021-03-31 Martin Liska <mliska@suse.cz> 3329 3330 * ipa-modref.c (analyze_ssa_name_flags): Fix coding style 3331 and one negated condition. 3332 33332021-03-31 Jakub Jelinek <jakub@redhat.com> 3334 Richard Sandiford <richard.sandiford@arm.com> 3335 3336 PR target/99813 3337 * config/aarch64/aarch64.md (*add<mode>3_poly_1): Swap Uai and Uav 3338 constraints on operands[2] and similarly 0 and rk constraints 3339 on operands[1] corresponding to that. 3340 33412021-03-31 Jakub Jelinek <jakub@redhat.com> 3342 3343 PR bootstrap/98860 3344 * configure.ac (HAVE_LD_BROKEN_PE_DWARF5): New AC_DEFINE if PECOFF 3345 linker doesn't support DWARF sections new in DWARF5. 3346 * config/i386/i386-options.c (ix86_option_override_internal): Default 3347 to dwarf_version 4 if HAVE_LD_BROKEN_PE_DWARF5 for TARGET_PECOFF 3348 targets. 3349 * config.in: Regenerated. 3350 * configure: Regenerated. 3351 33522021-03-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 3353 3354 PR target/99820 3355 * config/aarch64/aarch64.c (aarch64_analyze_loop_vinfo): Check for 3356 available issue_info before using it. 3357 33582021-03-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 3359 3360 PR target/99822 3361 * config/aarch64/aarch64.md (sub<mode>3_compare1_imm): Do not allow zero 3362 in operand 1. 3363 33642021-03-30 Xionghu Luo <luoxhu@linux.ibm.com> 3365 3366 PR target/99718 3367 * config/rs6000/altivec.md (altivec_lvsl_reg): Change to ... 3368 (altivec_lvsl_reg_<mode>): ... this. 3369 (altivec_lvsr_reg): Change to ... 3370 (altivec_lvsr_reg_<mode>): ... this. 3371 * config/rs6000/predicates.md (vec_set_index_operand): New. 3372 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): 3373 Enable 32bit variable vec_insert for all TARGET_VSX. 3374 * config/rs6000/rs6000.c (rs6000_expand_vector_set_var_p9): 3375 Enable 32bit variable vec_insert for p9 and above. 3376 (rs6000_expand_vector_set_var_p8): Rename to ... 3377 (rs6000_expand_vector_set_var_p7): ... this. 3378 (rs6000_expand_vector_set): Use TARGET_VSX and adjust assert 3379 position. 3380 * config/rs6000/vector.md (vec_set<mode>): Use vec_set_index_operand. 3381 * config/rs6000/vsx.md (xl_len_r): Use gen_altivec_lvsl_reg_di and 3382 gen_altivec_lvsr_reg_di. 3383 33842021-03-30 H.J. Lu <hjl.tools@gmail.com> 3385 3386 PR target/99744 3387 * config/i386/ia32intrin.h (__rdtsc): Defined as macro. 3388 (__rdtscp): Likewise. 3389 33902021-03-30 Tamar Christina <tamar.christina@arm.com> 3391 3392 PR tree-optimization/99825 3393 * tree-vect-slp-patterns.c (vect_check_evenodd_blend): 3394 Reject non-mult 2 lanes. 3395 33962021-03-30 Richard Earnshaw <rearnsha@arm.com> 3397 3398 PR target/99773 3399 * config/arm/arm.c (arm_file_start): Fix emission of 3400 Tag_ABI_VFP_args attribute. 3401 34022021-03-30 Richard Biener <rguenther@suse.de> 3403 3404 PR tree-optimization/99824 3405 * stor-layout.c (set_min_and_max_values_for_integral_type): 3406 Assert the precision is within the bounds of 3407 WIDE_INT_MAX_PRECISION. 3408 * tree-ssa-sccvn.c (ao_ref_init_from_vn_reference): Use 3409 the outermost component ref only to lower the access size 3410 and initialize that from the access type. 3411 34122021-03-30 Richard Sandiford <richard.sandiford@arm.com> 3413 3414 PR target/98136 3415 * config/aarch64/aarch64.md (mov<mode>): Pass multi-instruction 3416 CONST_INTs to aarch64_expand_mov_immediate when called after RA. 3417 34182021-03-30 Mihailo Stojanovic <mihailo.stojanovic@typhoon-hil.com> 3419 3420 * config/aarch64/aarch64.md 3421 (<optab>_trunc<fcvt_target><GPI:mode>2): Set the "arch" 3422 attribute to disambiguate between SIMD and FP variants of the 3423 instruction. 3424 34252021-03-29 Jan Hubicka <hubicka@ucw.cz> 3426 3427 * ipa-modref.c (merge_call_lhs_flags): Correct handling of deref. 3428 (analyze_ssa_name_flags): Fix typo in comment. 3429 34302021-03-29 Alex Coplan <alex.coplan@arm.com> 3431 3432 PR target/99216 3433 * config/aarch64/aarch64-sve-builtins.cc 3434 (function_builder::add_function): Add placeholder_p argument, use 3435 placeholder decls if this is set. 3436 (function_builder::add_unique_function): Instead of conditionally adding 3437 direct overloads, unconditionally add either a direct overload or a 3438 placeholder. 3439 (function_builder::add_overloaded_function): Set placeholder_p if we're 3440 using C++ overloads. Use the obstack for string storage instead 3441 of relying on the tree nodes. 3442 (function_builder::add_overloaded_functions): Don't return early for 3443 m_direct_overloads: we need to add placeholders. 3444 * config/aarch64/aarch64-sve-builtins.h 3445 (function_builder::add_function): Add placeholder_p argument. 3446 34472021-03-29 Richard Biener <rguenther@suse.de> 3448 3449 PR tree-optimization/99807 3450 * tree-vect-slp.c (vect_slp_analyze_node_operations_1): Move 3451 assert below VEC_PERM handling. 3452 34532021-03-29 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 3454 3455 PR target/99037 3456 * config/aarch64/aarch64-simd.md (move_lo_quad_internal_<mode>): Use 3457 aarch64_simd_or_scalar_imm_zero to match zeroes. Remove pattern 3458 matching const_int 0. 3459 (move_lo_quad_internal_be_<mode>): Likewise. 3460 (move_lo_quad_<mode>): Update for the above. 3461 * config/aarch64/iterators.md (VQ_2E): Delete. 3462 34632021-03-29 Jakub Jelinek <jakub@redhat.com> 3464 3465 PR tree-optimization/99777 3466 * fold-const.c (extract_muldiv_1): For conversions, punt on casts from 3467 types other than scalar integral types. 3468 34692021-03-28 David Edelsohn <dje.gcc@gmail.com> 3470 3471 * config/rs6000/rs6000.c (rs6000_output_dwarf_dtprel): Do not add 3472 XCOFF TLS reloc decorations. 3473 34742021-03-28 Gerald Pfeifer <gerald@pfeifer.com> 3475 3476 * doc/analyzer.texi (Analyzer Internals): Update link to 3477 "A Memory Model for Static Analysis of C Programs". 3478 34792021-03-26 David Edelsohn <dje.gcc@gmail.com> 3480 3481 * config/rs6000/aix.h (ADJUST_FIELD_ALIGN): Call function. 3482 * config/rs6000/rs6000-protos.h (rs6000_special_adjust_field_align): 3483 Declare. 3484 * config/rs6000/rs6000.c (rs6000_special_adjust_field_align): New. 3485 (rs6000_special_round_type_align): Recursively check innermost first 3486 field. 3487 34882021-03-26 Jakub Jelinek <jakub@redhat.com> 3489 3490 PR debug/99334 3491 * dwarf2out.h (struct dw_fde_node): Add rule18 member. 3492 * dwarf2cfi.c (dwarf2out_frame_debug_expr): When handling (set hfp sp) 3493 assignment with drap_reg active, queue reg save for hfp with offset 0 3494 and flush queued reg saves. When handling a push with rule18, 3495 defer queueing reg save for hfp and just assert the offset is 0. 3496 (scan_trace): Assert that fde->rule18 is false. 3497 34982021-03-26 Vladimir Makarov <vmakarov@redhat.com> 3499 3500 PR target/99766 3501 * ira-costs.c (record_reg_classes): Put case with 3502 CT_RELAXED_MEMORY adjacent to one with CT_MEMORY. 3503 * ira.c (ira_setup_alts): Ditto. 3504 * lra-constraints.c (process_alt_operands): Ditto. 3505 * recog.c (asm_operand_ok): Ditto. 3506 * reload.c (find_reloads): Ditto. 3507 35082021-03-26 Richard Sandiford <richard.sandiford@arm.com> 3509 3510 * config/aarch64/aarch64-protos.h 3511 (cpu_addrcost_table::post_modify_ld3_st3): New member variable. 3512 (cpu_addrcost_table::post_modify_ld4_st4): Likewise. 3513 * config/aarch64/aarch64.c (generic_addrcost_table): Update 3514 accordingly, using the same costs as for post_modify. 3515 (exynosm1_addrcost_table, xgene1_addrcost_table): Likewise. 3516 (thunderx2t99_addrcost_table, thunderx3t110_addrcost_table): 3517 (tsv110_addrcost_table, qdf24xx_addrcost_table): Likewise. 3518 (a64fx_addrcost_table): Likewise. 3519 (neoversev1_addrcost_table): New. 3520 (neoversev1_tunings): Use neoversev1_addrcost_table. 3521 (aarch64_address_cost): Use the new post_modify costs for CImode 3522 and XImode. 3523 35242021-03-26 Richard Sandiford <richard.sandiford@arm.com> 3525 3526 * config/aarch64/aarch64.opt 3527 (-param=aarch64-loop-vect-issue-rate-niters=): New parameter. 3528 * doc/invoke.texi: Document it. 3529 * config/aarch64/aarch64-protos.h (aarch64_base_vec_issue_info) 3530 (aarch64_scalar_vec_issue_info, aarch64_simd_vec_issue_info) 3531 (aarch64_advsimd_vec_issue_info, aarch64_sve_vec_issue_info) 3532 (aarch64_vec_issue_info): New structures. 3533 (cpu_vector_cost): Write comments above the variables rather 3534 than to the side. 3535 (cpu_vector_cost::issue_info): New member variable. 3536 * config/aarch64/aarch64.c: Include gimple-pretty-print.h 3537 and tree-ssa-loop-niter.h. 3538 (generic_vector_cost, a64fx_vector_cost, qdf24xx_vector_cost) 3539 (thunderx_vector_cost, tsv110_vector_cost, cortexa57_vector_cost) 3540 (exynosm1_vector_cost, xgene1_vector_cost, thunderx2t99_vector_cost) 3541 (thunderx3t110_vector_cost): Initialize issue_info to null. 3542 (neoversev1_scalar_issue_info, neoversev1_advsimd_issue_info) 3543 (neoversev1_sve_issue_info, neoversev1_vec_issue_info): New structures. 3544 (neoversev1_vector_cost): Use them. 3545 (aarch64_vec_op_count, aarch64_sve_op_count): New structures. 3546 (aarch64_vector_costs::saw_sve_only_op): New member variable. 3547 (aarch64_vector_costs::num_vector_iterations): Likewise. 3548 (aarch64_vector_costs::scalar_ops): Likewise. 3549 (aarch64_vector_costs::advsimd_ops): Likewise. 3550 (aarch64_vector_costs::sve_ops): Likewise. 3551 (aarch64_vector_costs::seen_loads): Likewise. 3552 (aarch64_simd_vec_costs_for_flags): New function. 3553 (aarch64_analyze_loop_vinfo): Initialize num_vector_iterations. 3554 Count the number of predicate operations required by SVE WHILE 3555 instructions. 3556 (aarch64_comparison_type, aarch64_multiply_add_p): New functions. 3557 (aarch64_sve_only_stmt_p, aarch64_in_loop_reduction_latency): Likewise. 3558 (aarch64_count_ops): Likewise. 3559 (aarch64_add_stmt_cost): Record whether see an SVE operation 3560 that cannot currently be implementing using Advanced SIMD. 3561 Record issue information about the scalar, Advanced SIMD 3562 and (where relevant) SVE versions of a loop. 3563 (aarch64_vec_op_count::dump): New function. 3564 (aarch64_sve_op_count::dump): Likewise. 3565 (aarch64_estimate_min_cycles_per_iter): Likewise. 3566 (aarch64_adjust_body_cost): If issue information is available, 3567 try to compare the issue rates of the various loop implementations 3568 and increase or decrease the vector body cost accordingly. 3569 35702021-03-26 Richard Sandiford <richard.sandiford@arm.com> 3571 3572 * config/aarch64/aarch64.c (aarch64_detect_vector_stmt_subtype): 3573 Assume a zero cost for induction phis. 3574 35752021-03-26 Richard Sandiford <richard.sandiford@arm.com> 3576 3577 * config/aarch64/aarch64.c (aarch64_embedded_comparison_type): New 3578 function. 3579 (aarch64_adjust_stmt_cost): Add the costs of embedded scalar and 3580 vector comparisons. 3581 35822021-03-26 Richard Sandiford <richard.sandiford@arm.com> 3583 3584 * config/aarch64/aarch64.c (aarch64_detect_scalar_stmt_subtype): 3585 New function. 3586 (aarch64_add_stmt_cost): Call it. 3587 35882021-03-26 Richard Sandiford <richard.sandiford@arm.com> 3589 3590 * config/aarch64/aarch64-tuning-flags.def (matched_vector_throughput): 3591 New tuning parameter. 3592 * config/aarch64/aarch64.c (neoversev1_tunings): Use it. 3593 (aarch64_estimated_sve_vq): New function. 3594 (aarch64_vector_costs::analyzed_vinfo): New member variable. 3595 (aarch64_vector_costs::is_loop): Likewise. 3596 (aarch64_vector_costs::unrolled_advsimd_niters): Likewise. 3597 (aarch64_vector_costs::unrolled_advsimd_stmts): Likewise. 3598 (aarch64_record_potential_advsimd_unrolling): New function. 3599 (aarch64_analyze_loop_vinfo, aarch64_analyze_bb_vinfo): Likewise. 3600 (aarch64_add_stmt_cost): Call aarch64_analyze_loop_vinfo or 3601 aarch64_analyze_bb_vinfo on the first use of a costs structure. 3602 Detect whether we're vectorizing a loop for SVE that might be 3603 completely unrolled if it used Advanced SIMD instead. 3604 (aarch64_adjust_body_cost_for_latency): New function. 3605 (aarch64_finish_cost): Call it. 3606 36072021-03-26 Richard Sandiford <richard.sandiford@arm.com> 3608 3609 * config/aarch64/aarch64.c (aarch64_vector_costs): New structure. 3610 (aarch64_init_cost): New function. 3611 (aarch64_add_stmt_cost): Use aarch64_vector_costs instead of 3612 the default unsigned[3]. 3613 (aarch64_finish_cost, aarch64_destroy_cost_data): New functions. 3614 (TARGET_VECTORIZE_INIT_COST): Override. 3615 (TARGET_VECTORIZE_FINISH_COST): Likewise. 3616 (TARGET_VECTORIZE_DESTROY_COST_DATA): Likewise. 3617 36182021-03-26 Richard Sandiford <richard.sandiford@arm.com> 3619 3620 * config/aarch64/aarch64.c (neoversev1_advsimd_vector_cost) 3621 (neoversev1_sve_vector_cost): New cost structures. 3622 (neoversev1_vector_cost): Likewise. 3623 (neoversev1_tunings): Use them. Enable use_new_vector_costs. 3624 36252021-03-26 Richard Sandiford <richard.sandiford@arm.com> 3626 3627 * config/aarch64/aarch64-protos.h 3628 (sve_vec_cost::scatter_store_elt_cost): New member variable. 3629 * config/aarch64/aarch64.c (generic_sve_vector_cost): Update 3630 accordingly, taking the cost from the cost of a scalar_store. 3631 (a64fx_sve_vector_cost): Likewise. 3632 (aarch64_detect_vector_stmt_subtype): Detect scatter stores. 3633 36342021-03-26 Richard Sandiford <richard.sandiford@arm.com> 3635 3636 * config/aarch64/aarch64-protos.h 3637 (simd_vec_cost::store_elt_extra_cost): New member variable. 3638 * config/aarch64/aarch64.c (generic_advsimd_vector_cost): Update 3639 accordingly, using the vec_to_scalar cost for the new field. 3640 (generic_sve_vector_cost, a64fx_advsimd_vector_cost): Likewise. 3641 (a64fx_sve_vector_cost, qdf24xx_advsimd_vector_cost): Likewise. 3642 (thunderx_advsimd_vector_cost, tsv110_advsimd_vector_cost): Likewise. 3643 (cortexa57_advsimd_vector_cost, exynosm1_advsimd_vector_cost) 3644 (xgene1_advsimd_vector_cost, thunderx2t99_advsimd_vector_cost) 3645 (thunderx3t110_advsimd_vector_cost): Likewise. 3646 (aarch64_detect_vector_stmt_subtype): Detect single-element stores. 3647 36482021-03-26 Richard Sandiford <richard.sandiford@arm.com> 3649 3650 * config/aarch64/aarch64-protos.h (simd_vec_cost::ld2_st2_permute_cost) 3651 (simd_vec_cost::ld3_st3_permute_cost): New member variables. 3652 (simd_vec_cost::ld4_st4_permute_cost): Likewise. 3653 * config/aarch64/aarch64.c (generic_advsimd_vector_cost): Update 3654 accordingly, using zero for the new costs. 3655 (generic_sve_vector_cost, a64fx_advsimd_vector_cost): Likewise. 3656 (a64fx_sve_vector_cost, qdf24xx_advsimd_vector_cost): Likewise. 3657 (thunderx_advsimd_vector_cost, tsv110_advsimd_vector_cost): Likewise. 3658 (cortexa57_advsimd_vector_cost, exynosm1_advsimd_vector_cost) 3659 (xgene1_advsimd_vector_cost, thunderx2t99_advsimd_vector_cost) 3660 (thunderx3t110_advsimd_vector_cost): Likewise. 3661 (aarch64_ld234_st234_vectors): New function. 3662 (aarch64_adjust_stmt_cost): Likewise. 3663 (aarch64_add_stmt_cost): Call aarch64_adjust_stmt_cost if using 3664 the new vector costs. 3665 36662021-03-26 Richard Sandiford <richard.sandiford@arm.com> 3667 3668 * config/aarch64/aarch64-protos.h (sve_vec_cost): Turn into a 3669 derived class of simd_vec_cost. Add information about CLAST[AB] 3670 and FADDA instructions. 3671 * config/aarch64/aarch64.c (generic_sve_vector_cost): Update 3672 accordingly, using the vec_to_scalar costs for the new fields. 3673 (a64fx_sve_vector_cost): Likewise. 3674 (aarch64_reduc_type): New function. 3675 (aarch64_sve_in_loop_reduction_latency): Likewise. 3676 (aarch64_detect_vector_stmt_subtype): Take a vinfo parameter. 3677 Use aarch64_sve_in_loop_reduction_latency to handle SVE reductions 3678 that occur in the loop body. 3679 (aarch64_add_stmt_cost): Update call accordingly. 3680 36812021-03-26 Richard Sandiford <richard.sandiford@arm.com> 3682 3683 * config/aarch64/aarch64-tuning-flags.def (use_new_vector_costs): 3684 New tuning flag. 3685 * config/aarch64/aarch64-protos.h (simd_vec_cost): Put comments 3686 above the fields rather than to the right. 3687 (simd_vec_cost::reduc_i8_cost): New member variable. 3688 (simd_vec_cost::reduc_i16_cost): Likewise. 3689 (simd_vec_cost::reduc_i32_cost): Likewise. 3690 (simd_vec_cost::reduc_i64_cost): Likewise. 3691 (simd_vec_cost::reduc_f16_cost): Likewise. 3692 (simd_vec_cost::reduc_f32_cost): Likewise. 3693 (simd_vec_cost::reduc_f64_cost): Likewise. 3694 * config/aarch64/aarch64.c (generic_advsimd_vector_cost): Update 3695 accordingly, using the vec_to_scalar_cost for the new fields. 3696 (generic_sve_vector_cost, a64fx_advsimd_vector_cost): Likewise. 3697 (a64fx_sve_vector_cost, qdf24xx_advsimd_vector_cost): Likewise. 3698 (thunderx_advsimd_vector_cost, tsv110_advsimd_vector_cost): Likewise. 3699 (cortexa57_advsimd_vector_cost, exynosm1_advsimd_vector_cost) 3700 (xgene1_advsimd_vector_cost, thunderx2t99_advsimd_vector_cost) 3701 (thunderx3t110_advsimd_vector_cost): Likewise. 3702 (aarch64_use_new_vector_costs_p): New function. 3703 (aarch64_simd_vec_costs): New function, split out from... 3704 (aarch64_builtin_vectorization_cost): ...here. 3705 (aarch64_is_reduction): New function. 3706 (aarch64_detect_vector_stmt_subtype): Likewise. 3707 (aarch64_add_stmt_cost): Call aarch64_detect_vector_stmt_subtype if 3708 using the new vector costs. 3709 37102021-03-26 Iain Buclaw <ibuclaw@gdcproject.org> 3711 3712 PR ipa/99466 3713 * tree-emutls.c (get_emutls_init_templ_addr): Mark initializer of weak 3714 TLS declarations as public. 3715 37162021-03-26 Iain Buclaw <ibuclaw@gdcproject.org> 3717 3718 * config/aarch64/aarch64-d.c (IN_TARGET_CODE): Define. 3719 * config/arm/arm-d.c (IN_TARGET_CODE): Likewise. 3720 * config/i386/i386-d.c (IN_TARGET_CODE): Likewise. 3721 * config/mips/mips-d.c (IN_TARGET_CODE): Likewise. 3722 * config/pa/pa-d.c (IN_TARGET_CODE): Likewise. 3723 * config/riscv/riscv-d.c (IN_TARGET_CODE): Likewise. 3724 * config/rs6000/rs6000-d.c (IN_TARGET_CODE): Likewise. 3725 * config/s390/s390-d.c (IN_TARGET_CODE): Likewise. 3726 * config/sparc/sparc-d.c (IN_TARGET_CODE): Likewise. 3727 37282021-03-26 Iain Buclaw <ibuclaw@gdcproject.org> 3729 3730 PR d/91595 3731 * config.gcc (*-*-cygwin*): Add winnt-d.o 3732 (*-*-mingw*): Likewise. 3733 * config/i386/cygwin.h (EXTRA_TARGET_D_OS_VERSIONS): New macro. 3734 * config/i386/mingw32.h (EXTRA_TARGET_D_OS_VERSIONS): Likewise. 3735 * config/i386/t-cygming: Add winnt-d.o. 3736 * config/i386/winnt-d.c: New file. 3737 37382021-03-26 Iain Buclaw <ibuclaw@gdcproject.org> 3739 3740 * config/freebsd-d.c: Include memmodel.h. 3741 37422021-03-26 Iain Buclaw <ibuclaw@gdcproject.org> 3743 3744 PR d/99691 3745 * config.gcc (*-*-openbsd*): Add openbsd-d.o. 3746 * config/t-openbsd: Add openbsd-d.o. 3747 * config/openbsd-d.c: New file. 3748 37492021-03-25 Stam Markianos-Wright <stam.markianos-wright@arm.com> 3750 3751 PR tree-optimization/96974 3752 * tree-vect-stmts.c (vect_get_vector_types_for_stmt): Replace assert 3753 with graceful exit. 3754 37552021-03-25 H.J. Lu <hjl.tools@gmail.com> 3756 3757 Revert: 3758 2021-03-25 H.J. Lu <hjl.tools@gmail.com> 3759 3760 PR target/98209 3761 PR target/99744 3762 * config/i386/i386.c (ix86_can_inline_p): Don't check ISA for 3763 always_inline in system headers. 3764 37652021-03-25 Kewen Lin <linkw@linux.ibm.com> 3766 3767 * tree-vect-loop.c (vect_model_reduction_cost): Init inside_cost. 3768 37692021-03-25 Jakub Jelinek <jakub@redhat.com> 3770 3771 PR c++/99565 3772 * tree-core.h (enum operand_equal_flag): Add OEP_ADDRESS_OF_SAME_FIELD. 3773 * fold-const.c (operand_compare::operand_equal_p): Don't compare 3774 field offsets if OEP_ADDRESS_OF_SAME_FIELD. 3775 37762021-03-25 H.J. Lu <hjl.tools@gmail.com> 3777 3778 PR target/98209 3779 PR target/99744 3780 * config/i386/i386.c (ix86_can_inline_p): Don't check ISA for 3781 always_inline in system headers. 3782 37832021-03-25 Richard Biener <rguenther@suse.de> 3784 3785 PR tree-optimization/99746 3786 * tree-vect-slp-patterns.c (complex_pattern::build): Do not mark 3787 the scalar stmt as patterned. Instead set up required things 3788 manually. 3789 37902021-03-25 Xionghu Luo <luoxhu@linux.ibm.com> 3791 3792 * config/rs6000/rs6000.c (power8_costs): Change l2 cache 3793 from 256 to 512. 3794 37952021-03-24 Martin Liska <mliska@suse.cz> 3796 3797 PR target/99753 3798 * common/config/i386/i386-common.c (ARRAY_SIZE): Fix off-by-one 3799 error. 3800 * config/i386/i386-options.c (ix86_option_override_internal): 3801 Add run-time assert. 3802 38032021-03-24 Martin Jambor <mjambor@suse.cz> 3804 3805 PR ipa/99122 3806 * ipa-cp.c (initialize_node_lattices): Mark as bottom all 3807 parameters with unknown type. 3808 (ipacp_value_safe_for_type): New function. 3809 (propagate_vals_across_arith_jfunc): Verify that the constant type 3810 can be used for a type of the formal parameter. 3811 (propagate_vals_across_ancestor): Likewise. 3812 (propagate_scalar_across_jump_function): Likewise. Pass the type 3813 also to propagate_vals_across_ancestor. 3814 38152021-03-24 Christophe Lyon <christophe.lyon@linaro.org> 3816 3817 PR target/99727 3818 * config/arm/mve.md (movmisalign<mode>_mve_store): Use Ux 3819 constraint. 3820 (movmisalign<mode>_mve_load): Likewise. 3821 38222021-03-24 Jakub Jelinek <jakub@redhat.com> 3823 3824 PR target/99724 3825 * config/arm/vec-common.md (one_cmpl<mode>2, neg<mode>2, 3826 movmisalign<mode>): Disable expanders for TARGET_REALLY_IWMMXT. 3827 38282021-03-24 Alexandre Oliva <oliva@adacore.com> 3829 3830 * doc/sourcebuild.texi (sysconf): New effective target. 3831 38322021-03-24 Alexandre Oliva <oliva@adacore.com> 3833 3834 * config/i386/predicates.md (reg_or_const_vec_operand): New. 3835 * config/i386/sse.md (ssse3_pshufbv8qi3): Add an expander for 3836 the now *-prefixed insn_and_split, turn the splitter const vec 3837 into an input for the insn, making it an ignored immediate for 3838 non-split cases, and loaded into the scratch register 3839 otherwise. 3840 38412021-03-23 Vladimir N. Makarov <vmakarov@redhat.com> 3842 3843 PR target/99581 3844 * config/aarch64/constraints.md (Utq, UOb, UOh, UOw, UOd, UOty): 3845 Use define_relaxed_memory_constraint for them. 3846 38472021-03-23 Iain Sandoe <iain@sandoe.co.uk> 3848 3849 PR target/99733 3850 * config/host-darwin.c (darwin_gt_pch_use_address): Add a 3851 colon to the diagnostic message. 3852 38532021-03-23 Ilya Leoshkevich <iii@linux.ibm.com> 3854 3855 * fwprop.c (fwprop_propagation::fwprop_propagation): Look at 3856 set_info's uses. 3857 (try_fwprop_subst_note): Use set_info instead of insn_info. 3858 (try_fwprop_subst_pattern): Likewise. 3859 (try_fwprop_subst_notes): Likewise. 3860 (try_fwprop_subst): Likewise. 3861 (forward_propagate_subreg): Likewise. 3862 (forward_propagate_and_simplify): Likewise. 3863 (forward_propagate_into): Likewise. 3864 * rtl-ssa/accesses.h (set_info::single_nondebug_use) New 3865 method. 3866 (set_info::single_nondebug_insn_use): Likewise. 3867 (set_info::single_phi_use): Likewise. 3868 * rtl-ssa/member-fns.inl (set_info::single_nondebug_use) New 3869 method. 3870 (set_info::single_nondebug_insn_use): Likewise. 3871 (set_info::single_phi_use): Likewise. 3872 38732021-03-23 Christophe Lyon <christophe.lyon@linaro.org> 3874 3875 * doc/sourcebuild.texi (arm_dsp_ok, arm_dsp): Document. 3876 38772021-03-23 Jakub Jelinek <jakub@redhat.com> 3878 3879 PR target/99540 3880 * config/aarch64/aarch64.c (aarch64_add_offset): Tell 3881 expand_mult to perform an unsigned rather than a signed 3882 multiplication. 3883 38842021-03-23 H.J. Lu <hjl.tools@gmail.com> 3885 3886 PR target/99704 3887 * config/i386/cpuid.h (__cpuid): Add __volatile__. 3888 (__cpuid_count): Likewise. 3889 38902021-03-23 Richard Biener <rguenther@suse.de> 3891 3892 PR tree-optimization/99721 3893 * tree-vect-slp.c (vect_slp_analyze_node_operations): 3894 Make sure we can schedule the node. 3895 38962021-03-23 Marcus Comstedt <marcus@mc.pp.se> 3897 3898 * config/riscv/riscv.c (riscv_subword): Take endianness into 3899 account when calculating the byte offset. 3900 39012021-03-23 Marcus Comstedt <marcus@mc.pp.se> 3902 3903 * config/riscv/predicates.md (subreg_lowpart_operator): New predicate 3904 * config/riscv/riscv.md (*addsi3_extended2, *subsi3_extended2) 3905 (*negsi2_extended2, *mulsi3_extended2, *<optab>si3_mask) 3906 (*<optab>si3_mask_1, *<optab>di3_mask, *<optab>di3_mask_1) 3907 (*<optab>si3_extend_mask, *<optab>si3_extend_mask_1): Use 3908 new predicate "subreg_lowpart_operator" 3909 39102021-03-23 Marcus Comstedt <marcus@mc.pp.se> 3911 3912 * config/riscv/riscv.c (riscv_swap_instruction): New function 3913 to byteswap an SImode rtx containing an instruction. 3914 (riscv_trampoline_init): Byteswap the generated instructions 3915 when needed. 3916 39172021-03-23 Marcus Comstedt <marcus@mc.pp.se> 3918 3919 * common/config/riscv/riscv-common.c 3920 (TARGET_DEFAULT_TARGET_FLAGS): Set default endianness. 3921 * config.gcc (riscv32be-*, riscv64be-*): Set 3922 TARGET_BIG_ENDIAN_DEFAULT to 1. 3923 * config/riscv/elf.h (LINK_SPEC): Change -melf* value 3924 depending on default endianness. 3925 * config/riscv/freebsd.h (LINK_SPEC): Likewise. 3926 * config/riscv/linux.h (LINK_SPEC): Likewise. 3927 * config/riscv/riscv.c (TARGET_DEFAULT_TARGET_FLAGS): Set 3928 default endianness. 3929 * config/riscv/riscv.h (DEFAULT_ENDIAN_SPEC): New macro. 3930 39312021-03-23 Marcus Comstedt <marcus@mc.pp.se> 3932 3933 * config/riscv/elf.h (LINK_SPEC): Pass linker endianness flag. 3934 * config/riscv/freebsd.h (LINK_SPEC): Likewise. 3935 * config/riscv/linux.h (LINK_SPEC): Likewise. 3936 * config/riscv/riscv.h (ASM_SPEC): Pass -mbig-endian and 3937 -mlittle-endian. 3938 (BYTES_BIG_ENDIAN): Handle big endian. 3939 (WORDS_BIG_ENDIAN): Define to BYTES_BIG_ENDIAN. 3940 * config/riscv/riscv.opt (-mbig-endian, -mlittle-endian): New 3941 options. 3942 * doc/invoke.texi (-mbig-endian, -mlittle-endian): Document. 3943 39442021-03-23 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> 3945 3946 * regcprop.c (find_oldest_value_reg): Ask target whether 3947 different mode is fine for replacement register. 3948 39492021-03-23 Aldy Hernandez <aldyh@redhat.com> 3950 3951 PR tree-optimization/99296 3952 * value-range.cc (irange::irange_set_1bit_anti_range): New. 3953 (irange::irange_set_anti_range): Call irange_set_1bit_anti_range 3954 * value-range.h (irange::irange_set_1bit_anti_range): New. 3955 39562021-03-22 Vladimir N. Makarov <vmakarov@redhat.com> 3957 3958 PR target/99581 3959 * config/aarch64/constraints.md (UtQ): Use 3960 define_relaxed_memory_constraint for it. 3961 * doc/md.texi (define_relaxed_memory_constraint): Describe it. 3962 * genoutput.c (main): Process DEFINE_RELAXED_MEMORY_CONSTRAINT. 3963 * genpreds.c (constraint_data): Add bitfield is_relaxed_memory. 3964 (have_relaxed_memory_constraints): New static var. 3965 (relaxed_memory_start, relaxed_memory_end): Ditto. 3966 (add_constraint): Add arg is_relaxed_memory. Check name for 3967 relaxed memory. Set up is_relaxed_memory in constraint_data and 3968 have_relaxed_memory_constraints. Adjust calls. 3969 (choose_enum_order): Process relaxed memory. 3970 (write_tm_preds_h): Ditto. 3971 (main): Process DEFINE_RELAXED_MEMORY_CONSTRAINT. 3972 * gensupport.c (process_rtx): Process DEFINE_RELAXED_MEMORY_CONSTRAINT. 3973 * ira-costs.c (record_reg_classes): Process CT_RELAXED_MEMORY. 3974 * ira-lives.c (single_reg_class): Use 3975 insn_extra_relaxed_memory_constraint. 3976 * ira.c (ira_setup_alts): CT_RELAXED_MEMORY. 3977 * lra-constraints.c (valid_address_p): Use 3978 insn_extra_relaxed_memory_constraint instead of other memory 3979 constraints. 3980 (process_alt_operands): Process CT_RELAXED_MEMORY. 3981 (curr_insn_transform): Use insn_extra_relaxed_memory_constraint. 3982 * recog.c (asm_operand_ok, preprocess_constraints): Process 3983 CT_RELAXED_MEMORY. 3984 * reload.c (find_reloads): Ditto. 3985 * rtl.def (DEFINE_RELAXED_MEMORY_CONSTRAINT): New. 3986 * stmt.c (parse_input_constraint): Use 3987 insn_extra_relaxed_memory_constraint. 3988 39892021-03-22 Segher Boessenkool <segher@kernel.crashing.org> 3990 3991 PR target/97926 3992 * ubsan.c (ubsan_instrument_float_cast): Don't test for unordered if 3993 there are no NaNs. 3994 39952021-03-22 Alex Coplan <alex.coplan@arm.com> 3996 3997 PR target/97252 3998 * config/arm/arm-protos.h (neon_make_constant): Add generate 3999 argument to guard emitting insns, default to true. 4000 * config/arm/arm.c (arm_legitimate_constant_p_1): Reject 4001 CONST_VECTORs which neon_make_constant can't handle. 4002 (neon_vdup_constant): Add generate argument, avoid emitting 4003 insns if it's not set. 4004 (neon_make_constant): Plumb new generate argument through. 4005 * config/arm/constraints.md (Ui): New. Use it... 4006 * config/arm/mve.md (*mve_mov<mode>): ... here. 4007 * config/arm/vec-common.md (movv8hf): Use neon_make_constant to 4008 synthesize constants. 4009 40102021-03-22 Richard Biener <rguenther@suse.de> 4011 4012 * debug.h: Add deprecation warning. 4013 40142021-03-22 Richard Biener <rguenther@suse.de> 4015 4016 PR tree-optimization/99694 4017 * tree-ssa-sccvn.c (visit_phi): Ignore edges with the 4018 PHI result. 4019 40202021-03-22 Kito Cheng <kito.cheng@sifive.com> 4021 4022 PR target/99702 4023 * config/riscv/riscv.c (riscv_expand_block_move): Get RTL value 4024 after type checking. 4025 40262021-03-22 Jakub Jelinek <jakub@redhat.com> 4027 4028 PR debug/99562 4029 PR debug/66728 4030 * dwarf2out.c (get_full_len): Use get_precision rather than 4031 min_precision. 4032 (add_const_value_attribute): Make sure add_AT_wide argument has 4033 precision prec rather than some very wide one. 4034 40352021-03-22 Kewen Lin <linkw@linux.ibm.com> 4036 4037 * config/rs6000/rs6000.md (*rotldi3_insert_sf, 4038 *mov<SFDF:mode><SFDF2:mode>cc_p9, floatsi<mode>2_lfiwax, 4039 floatsi<mode>2_lfiwax_mem, floatunssi<mode>2_lfiwzx, 4040 floatunssi<mode>2_lfiwzx_mem, *floatsidf2_internal, 4041 *floatunssidf2_internal, fix_trunc<mode>si2_stfiwx, 4042 fix_trunc<mode>si2_internal, fixuns_trunc<mode>si2_stfiwx, 4043 *round32<mode>2_fprs, *roundu32<mode>2_fprs, 4044 *fix_trunc<mode>si2_internal): Fix empty split condition. 4045 * config/rs6000/vsx.md (*vsx_le_undo_permute_<mode>, 4046 vsx_reduc_<VEC_reduc_name>_v2df, vsx_reduc_<VEC_reduc_name>_v4sf, 4047 *vsx_reduc_<VEC_reduc_name>_v2df_scalar, 4048 *vsx_reduc_<VEC_reduc_name>_v4sf_scalar): Likewise. 4049 40502021-03-22 Xionghu Luo <luoxhu@linux.ibm.com> 4051 4052 PR target/98914 4053 * config/rs6000/rs6000.c (rs6000_expand_vector_set_var_p9): 4054 Convert idx to DImode. 4055 (rs6000_expand_vector_set_var_p8): Likewise. 4056 40572021-03-21 Jakub Jelinek <jakub@redhat.com> 4058 4059 PR debug/99388 4060 * dwarf2out.c (insert_float): Change return type from void to 4061 unsigned, handle GET_MODE_SIZE (mode) == 2 and return element size. 4062 (mem_loc_descriptor, loc_descriptor, add_const_value_attribute): 4063 Adjust callers. 4064 40652021-03-20 H.J. Lu <hjl.tools@gmail.com> 4066 4067 PR target/99679 4068 * config/i386/i386.c (construct_container): Check cfun != NULL 4069 before accessing silent_p. 4070 40712021-03-20 Ahamed Husni <ahamedhusni73@gmail.com> 4072 4073 * asan.c: Fix typos in comments. 4074 40752021-03-20 Vladimir N. Makarov <vmakarov@redhat.com> 4076 4077 PR rtl-optimization/99680 4078 * lra-constraints.c (skip_contraint_modifiers): Rename to skip_constraint_modifiers. 4079 (process_address_1): Check empty constraint before using 4080 CONSTRAINT_LEN. 4081 40822021-03-19 Pat Haugen <pthaugen@linux.ibm.com> 4083 4084 * config/rs6000/rs6000.c (power10_cost): New. 4085 (rs6000_option_override_internal): Set Power10 costs. 4086 (rs6000_issue_rate): Set Power10 issue rate. 4087 * config/rs6000/power10.md: Rewrite for Power10. 4088 40892021-03-19 Vladimir N. Makarov <vmakarov@redhat.com> 4090 4091 PR target/99663 4092 * lra-constraints.c (process_address_1): Don't use unknown 4093 constraint for address constraint. 4094 40952021-03-19 Iain Sandoe <iain@sandoe.co.uk> 4096 4097 PR target/99661 4098 * config.gcc (powerpc-*-darwin8): Delete the reference to 4099 the now removed darwin8.h. 4100 41012021-03-19 Olivier Hainque <hainque@adacore.com> 4102 4103 PR target/99660 4104 * config/vxworksae.h (VX_CPU_PREFIX): Define. 4105 41062021-03-19 John David Anglin <danglin@gcc.gnu.org> 4107 4108 * config/pa/pa.c (import_milli): Use memcpy instead of strncpy. 4109 41102021-03-19 Tamar Christina <tamar.christina@arm.com> 4111 4112 PR tree-optimization/99656 4113 * tree-vect-slp-patterns.c (linear_loads_p, 4114 complex_add_pattern::matches, is_eq_or_top, 4115 vect_validate_multiplication, complex_mul_pattern::matches, 4116 complex_fms_pattern::matches): Remove complex_perm_kinds_t. 4117 * tree-vectorizer.h: (complex_load_perm_t): Removed. 4118 (slp_tree_to_load_perm_map_t): Use complex_perm_kinds_t instead of 4119 complex_load_perm_t. 4120 41212021-03-19 H.J. Lu <hjl.tools@gmail.com> 4122 4123 PR target/99652 4124 * config/i386/i386-options.c (ix86_init_machine_status): Set 4125 silent_p to true. 4126 * config/i386/i386.c (init_cumulative_args): Set silent_p to 4127 false. 4128 (construct_container): Return early for return and argument 4129 errors if silent_p is true. 4130 * config/i386/i386.h (machine_function): Add silent_p. 4131 41322021-03-19 Jakub Jelinek <jakub@redhat.com> 4133 4134 PR target/99593 4135 * config/arm/constraints.md (Ds): New constraint. 4136 * config/arm/vec-common.md (mve_vshlq_<supf><mode>): Use w,Ds 4137 constraint instead of w,Dm. 4138 41392021-03-19 Andrew Stubbs <ams@codesourcery.com> 4140 4141 * config/gcn/gcn.c (gcn_parse_amdgpu_hsa_kernel_attribute): Fix quotes 4142 in error message. 4143 41442021-03-19 Eric Botcazou <ebotcazou@adacore.com> 4145 4146 PR middle-end/99641 4147 * fold-const.c (native_encode_initializer) <CONSTRUCTOR>: For an 4148 array type, do the computation of the current position in sizetype. 4149 41502021-03-18 Vladimir N. Makarov <vmakarov@redhat.com> 4151 4152 PR target/99422 4153 * lra-constraints.c (process_address_1): Use lookup_constraint 4154 only for a single constraint. 4155 41562021-03-18 Martin Sebor <msebor@redhat.com> 4157 4158 PR middle-end/99502 4159 * gimple-array-bounds.cc (inbounds_vbase_memaccess_p): Rename... 4160 (inbounds_memaccess_p): ...to this. Check the ending offset of 4161 the accessed member. 4162 41632021-03-18 Andrew Stubbs <ams@codesourcery.com> 4164 4165 * config/gcn/gcn.c (gcn_parse_amdgpu_hsa_kernel_attribute): Add %< and 4166 %> quote markers to error messages. 4167 (gcn_goacc_validate_dims): Likewise. 4168 (gcn_conditional_register_usage): Remove exclaimation mark from error 4169 message. 4170 (gcn_vectorize_vec_perm_const): Ensure perm is fully uninitialized. 4171 41722021-03-18 Jan Hubicka <hubicka@ucw.cz> 4173 4174 * config/i386/x86-tune-costs.h (struct processor_costs): Fix costs of 4175 integer divides1. 4176 41772021-03-18 Sinan Lin <sinan@isrc.iscas.ac.cn> 4178 Kito Cheng <kito.cheng@sifive.com> 4179 4180 * config/riscv/riscv.c (riscv_block_move_straight): Change type 4181 to unsigned HOST_WIDE_INT for parameter and local variable with 4182 HOST_WIDE_INT type. 4183 (riscv_adjust_block_mem): Ditto. 4184 (riscv_block_move_loop): Ditto. 4185 (riscv_expand_block_move): Ditto. 4186 41872021-03-18 Nick Clifton <nickc@redhat.com> 4188 4189 * config/v850/v850.c (construct_restore_jr): Increase static 4190 buffer size. 4191 (construct_save_jarl): Likewise. 4192 * config/v850/v850.h (DWARF2_DEBUGGING_INFO): Define. 4193 41942021-03-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 4195 4196 * config/aarch64/aarch64.c (aarch64_adjust_generic_arch_tuning): Define. 4197 (aarch64_override_options_internal): Use it. 4198 (generic_tunings): Add AARCH64_EXTRA_TUNE_CSE_SVE_VL_CONSTANTS to 4199 tune_flags. 4200 42012021-03-17 Sandra Loosemore <sandra@codesourcery.com> 4202 4203 * config/nios2/nios2.c (nios2_custom_check_insns): Clean up 4204 error message format issues. 4205 (nios2_option_override): Likewise. 4206 (nios2_expand_fpu_builtin): Likewise. 4207 (nios2_init_custom_builtins): Adjust to avoid bogus strncpy 4208 truncation warning. 4209 (nios2_expand_custom_builtin): More error message format fixes. 4210 (nios2_expand_rdwrctl_builtin): Likewise. 4211 (nios2_expand_rdprs_builtin): Likewise. 4212 (nios2_expand_eni_builtin): Likewise. 4213 (nios2_expand_builtin): Likewise. 4214 (nios2_register_custom_code): Likewise. 4215 (nios2_valid_target_attribute_rec): Likewise. 4216 (nios2_add_insn_asm): Fix uninitialized variable warning. 4217 42182021-03-17 Jan Hubicka <jh@suse.cz> 4219 4220 * config/i386/x86-tune-costs.h (struct processor_costs): Update costs 4221 of gather to match reality. 4222 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER): Enable for znver3. 4223 42242021-03-17 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 4225 4226 * config/aarch64/aarch64-builtins.c (aarch64_expand_rng_builtin): Use EQ 4227 to compare against CC_REG rather than NE. 4228 42292021-03-17 H.J. Lu <hjl.tools@gmail.com> 4230 4231 PR target/99504 4232 * config/i386/i386.c (ix86_force_load_from_GOT_p): Support 4233 inline assembly statements. 4234 (ix86_print_operand): Update 'P' handling for -fno-plt. 4235 42362021-03-17 Tamar Christina <tamar.christina@arm.com> 4237 4238 PR target/99542 4239 * config/aarch64/aarch64.c 4240 (aarch64_simd_clone_compute_vecsize_and_simdlen): Remove unused var. 4241 42422021-03-16 Segher Boessenkool <segher@kernel.crashing.org> 4243 4244 PR target/98092 4245 * config/rs6000/predicates.md (branch_comparison_operator): Allow 4246 ordered and unordered for CCFPmode, if flag_finite_math_only. 4247 42482021-03-16 Jakub Jelinek <jakub@redhat.com> 4249 4250 PR target/99600 4251 * config/i386/i386-expand.c (ix86_split_lea_for_addr): Emit a MULT 4252 rather than ASHIFT. 4253 * config/i386/i386.md (mult by 1248 into ashift): New splitter. 4254 42552021-03-16 Martin Liska <mliska@suse.cz> 4256 4257 PR target/99592 4258 * optc-save-gen.awk: Add flag_ipa_ra to exceptions for 4259 cl_optimization_compare function. 4260 42612021-03-16 Ilya Leoshkevich <iii@linux.ibm.com> 4262 4263 * config/s390/s390.c (f_constraint_p): Treat "fv" constraints 4264 as "v". 4265 42662021-03-16 Jakub Jelinek <jakub@redhat.com> 4267 4268 PR target/99563 4269 * config/i386/i386.h (struct machine_function): Add 4270 has_explicit_vzeroupper bitfield. 4271 * config/i386/i386-expand.c (ix86_expand_builtin): Set 4272 cfun->machine->has_explicit_vzeroupper when expanding 4273 IX86_BUILTIN_VZEROUPPER. 4274 * config/i386/i386-features.c (rest_of_handle_insert_vzeroupper): 4275 Do the mode switching only when TARGET_VZEROUPPER, expensive 4276 optimizations turned on and not optimizing for size. 4277 (pass_insert_vzeroupper::gate): Enable even when 4278 cfun->machine->has_explicit_vzeroupper is set. 4279 42802021-03-16 Jakub Jelinek <jakub@redhat.com> 4281 4282 PR target/99542 4283 * config/aarch64/aarch64.c 4284 (aarch64_simd_clone_compute_vecsize_and_simdlen): If not a function 4285 definition, walk TYPE_ARG_TYPES list if non-NULL for argument types 4286 instead of DECL_ARGUMENTS. Ignore types for uniform arguments. 4287 42882021-03-15 Richard Biener <rguenther@suse.de> 4289 4290 PR tree-optimization/98834 4291 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle missing 4292 subsetting by truncating the access size. 4293 42942021-03-15 Jan Hubicka <hubicka@ucw.cz> 4295 4296 * config/i386/i386-options.c (processor_cost_table): Add znver3_cost. 4297 * config/i386/x86-tune-costs.h (znver3_cost): New gobal variable; copy 4298 of znver2_cost. 4299 43002021-03-15 Martin Liska <mliska@suse.cz> 4301 4302 * spellcheck.c: Add missing comma in initialization. 4303 43042021-03-14 Uroš Bizjak <ubizjak@gmail.com> 4305 4306 * config/i386/sse.md (*vec_extract<mode>): Merge alternative 0 with 4307 alternative 2 and alternative 1 with alternative 3 using 4308 YW register constraint. 4309 (*vec_extract<PEXTR_MODE12:mode>_zext): Merge alternatives 4310 using YW register constraint. 4311 (*vec_extractv16qi_zext): Ditto. 4312 (*vec_extractv4si): Merge alternatives 4 and 5 4313 using Yw register constraint. 4314 (*ssse3_palignr<mode>_perm): Use Yw instead of v for alternative 3. 4315 43162021-03-13 Martin Sebor <msebor@redhat.com> 4317 4318 PR tree-optimization/99489 4319 * builtins.c (gimple_call_alloc_size): Fail gracefully when argument 4320 is not a call statement. 4321 43222021-03-13 Jakub Jelinek <jakub@redhat.com> 4323 4324 PR tree-optimization/99544 4325 * match.pd (X + (X << C) -> X * (1 + (1 << C))): Don't simplify 4326 if for vector types multiplication can't be done in type's mode. 4327 43282021-03-12 Eric Botcazou <ebotcazou@adacore.com> 4329 4330 PR target/99422 4331 * config/sparc/constraints.md (w): Rename to... 4332 (W): ... this and ditch previous implementation. 4333 * config/sparc/sparc.md (*movdi_insn_sp64): Replace W with m. 4334 (*movdf_insn_sp64): Likewise. 4335 (*mov<VM64:mode>_insn_sp64): Likewise. 4336 * config/sparc/sync.md (*atomic_compare_and_swap<mode>_1): Replace 4337 w with W. 4338 (atomic_compare_and_swap_leon3_1): Likewise. 4339 (*atomic_compare_and_swapdi_v8plus): Likewise. 4340 * config/sparc/sparc.c (memory_ok_for_ldd): Remove useless test on 4341 architecture and add missing address validity check during LRA. 4342 43432021-03-12 Tobias Burnus <tobias@codesourcery.com> 4344 4345 PR fortran/98858 4346 * gimplify.c (omp_add_variable): Handle NULL_TREE as size 4347 occuring for assumed-size arrays in use_device_{ptr,addr}. 4348 43492021-03-12 Jakub Jelinek <jakub@redhat.com> 4350 4351 PR target/99321 4352 * config/i386/constraints.md (YW): New internal constraint. 4353 * config/i386/sse.md (v_Yw): Add V4TI, V2TI, V1TI and TI cases. 4354 (*<sse2_avx2>_<insn><mode>3<mask_name>, 4355 *<sse2_avx2>_uavg<mode>3<mask_name>, *abs<mode>2, 4356 *<s>mul<mode>3_highpart<mask_name>): Use <v_Yw> instead of v in 4357 constraints. 4358 (<sse2_avx2>_psadbw): Use YW instead of v in constraints. 4359 (*avx2_pmaddwd, *sse2_pmaddwd, *<code>v8hi3, *<code>v16qi3, 4360 avx2_pmaddubsw256, ssse3_pmaddubsw128): Merge last two alternatives 4361 into one, use Yw instead of former x,v. 4362 (ashr<mode>3, <insn><mode>3): Use <v_Yw> instead of x in constraints of 4363 the last alternative. 4364 (<sse2_avx2>_packsswb<mask_name>, <sse2_avx2>_packssdw<mask_name>, 4365 <sse2_avx2>_packuswb<mask_name>, <sse4_1_avx2>_packusdw<mask_name>, 4366 *<ssse3_avx2>_pmulhrsw<mode>3<mask_name>, <ssse3_avx2>_palignr<mode>, 4367 <ssse3_avx2>_pshufb<mode>3<mask_name>): Merge last two alternatives 4368 into one, use <v_Yw> instead of former x,v. 4369 (avx2_interleave_highv32qi<mask_name>, 4370 vec_interleave_highv16qi<mask_name>): Use Yw instead of v in 4371 constraints. Add && <mask_avx512bw_condition> to condition. 4372 (avx2_interleave_lowv32qi<mask_name>, 4373 vec_interleave_lowv16qi<mask_name>, 4374 avx2_interleave_highv16hi<mask_name>, 4375 vec_interleave_highv8hi<mask_name>, 4376 avx2_interleave_lowv16hi<mask_name>, vec_interleave_lowv8hi<mask_name>, 4377 avx2_pshuflw_1<mask_name>, sse2_pshuflw_1<mask_name>, 4378 avx2_pshufhw_1<mask_name>, sse2_pshufhw_1<mask_name>, 4379 avx2_<code>v16qiv16hi2<mask_name>, sse4_1_<code>v8qiv8hi2<mask_name>, 4380 *sse4_1_<code>v8qiv8hi2<mask_name>_1, <sse2_avx2>_<insn><mode>3): Use 4381 Yw instead of v in constraints. 4382 * config/i386/mmx.md (Yv_Yw): New define_mode_attr. 4383 (*mmx_<insn><mode>3, mmx_ashr<mode>3, mmx_<insn><mode>3): Use <Yv_Yw> 4384 instead of Yv in constraints. 4385 (*mmx_<insn><mode>3, *mmx_mulv4hi3, *mmx_smulv4hi3_highpart, 4386 *mmx_umulv4hi3_highpart, *mmx_pmaddwd, *mmx_<code>v4hi3, 4387 *mmx_<code>v8qi3, mmx_pack<s_trunsuffix>swb, mmx_packssdw, 4388 mmx_punpckhbw, mmx_punpcklbw, mmx_punpckhwd, mmx_punpcklwd, 4389 *mmx_uavgv8qi3, *mmx_uavgv4hi3, mmx_psadbw): Use Yw instead of Yv in 4390 constraints. 4391 (*mmx_pinsrw, *mmx_pinsrb, *mmx_pextrw, *mmx_pextrw_zext, *mmx_pextrb, 4392 *mmx_pextrb_zext): Use YW instead of Yv in constraints. 4393 (*mmx_eq<mode>3, mmx_gt<mode>3): Use x instead of Yv in constraints. 4394 (mmx_andnot<mode>3, *mmx_<code><mode>3): Split last alternative into 4395 two, one with just x, another isa avx512vl with v. 4396 43972021-03-12 Martin Liska <mliska@suse.cz> 4398 4399 * doc/invoke.texi: Add missing param documentation. 4400 44012021-03-11 David Malcolm <dmalcolm@redhat.com> 4402 4403 PR analyzer/96374 4404 * Makefile.in (ANALYZER_OBJS): Add analyzer/feasible-graph.o and 4405 analyzer/trimmed-graph.o. 4406 * doc/analyzer.texi (Analyzer Paths): Rewrite description of 4407 feasibility checking to reflect new implementation. 4408 * doc/invoke.texi (-fdump-analyzer-feasibility): Document new 4409 option. 4410 * shortest-paths.h (shortest_paths::get_shortest_distance): New. 4411 44122021-03-11 David Malcolm <dmalcolm@redhat.com> 4413 4414 * digraph.cc (selftest::test_shortest_paths): Update 4415 shortest_paths init for new param. Add test of 4416 SPS_TO_GIVEN_TARGET. 4417 * shortest-paths.h (enum shortest_path_sense): New. 4418 (shortest_paths::shortest_paths): Add "sense" param. 4419 Update for renamings. Generalize to use "sense" param. 4420 (shortest_paths::get_shortest_path): Rename param. 4421 (shortest_paths::m_sense): New field. 4422 (shortest_paths::m_prev): Rename... 4423 (shortest_paths::m_best_edge): ...to this. 4424 (shortest_paths::get_shortest_path): Update for renamings. 4425 Conditionalize flipping of path on sense of traversal. 4426 44272021-03-11 David Malcolm <dmalcolm@redhat.com> 4428 4429 * digraph.cc (selftest::test_shortest_paths): Add test coverage 4430 for paths from B and C. 4431 * shortest-paths.h (shortest_paths::shortest_paths): Handle 4432 unreachable nodes, rather than asserting. 4433 44342021-03-11 David Edelsohn <dje.gcc@gmail.com> 4435 4436 PR target/99094 4437 * config/rs6000/rs6000.c (rs6000_xcoff_file_start): Don't create 4438 xcoff_tbss_section_name. 4439 * config/rs6000/xcoff.h (ASM_OUTPUT_TLS_COMMON): Use .lcomm. 4440 * xcoffout.c (xcoff_tbss_section_name): Delete. 4441 * xcoffout.h (xcoff_tbss_section_name): Delete. 4442 44432021-03-11 Richard Biener <rguenther@suse.de> 4444 4445 PR tree-optimization/99523 4446 * tree-cfg.c (dump_function_to_file): Dump SSA names 4447 w/o identifier to the decls section as well, not only those 4448 without a VAR_DECL. 4449 44502021-03-11 Jakub Jelinek <jakub@redhat.com> 4451 4452 PR ipa/99517 4453 * ipa-icf-gimple.c (func_checker::compare_gimple_call): For internal 4454 function calls with lhs fail if the lhs don't have compatible types. 4455 44562021-03-11 Hans-Peter Nilsson <hp@axis.com> 4457 4458 * config/cris/cris.h (HARD_FRAME_POINTER_REGNUM): Define. 4459 Change FRAME_POINTER_REGNUM to correspond to a new faked 4460 register faked_fp, part of GENNONACR_REGS like faked_ap. 4461 (CRIS_FAKED_REGS_CONTENTS): New helper macro. 4462 (FIRST_PSEUDO_REGISTER, FIXED_REGISTERS, CALL_USED_REGISTERS): 4463 (REG_ALLOC_ORDER, REG_CLASS_CONTENTS, REGNO_OK_FOR_BASE_P) 4464 (ELIMINABLE_REGS, REGISTER_NAMES): Adjust accordingly. 4465 * config/cris/cris.md (CRIS_FP_REGNUM): Renumber to new faked 4466 register. 4467 (CRIS_REAL_FP_REGNUM): New constant. 4468 * config/cris/cris.c (cris_reg_saved_in_regsave_area): Check 4469 for HARD_FRAME_POINTER_REGNUM instead of FRAME_POINTER_REGNUM. 4470 (cris_initial_elimination_offset): Handle elimination changes 4471 to HARD_FRAME_POINTER_REGNUM instead of FRAME_POINTER_REGNUM 4472 and add one from FRAME_POINTER_REGNUM to 4473 HARD_FRAME_POINTER_REGNUM. 4474 (cris_expand_prologue, cris_expand_epilogue): Emit code for 4475 hard_frame_pointer_rtx instead of frame_pointer_rtx. 4476 44772021-03-10 David Edelsohn <dje.gcc@gmail.com> 4478 4479 PR target/99492 4480 * config/rs6000/aix.h (ADJUST_FIELD_ALIGN): Add check for DCmode. 4481 * config/rs6000/rs6000.c (rs6000_special_round_type_align): Same. 4482 44832021-03-10 Vladimir N. Makarov <vmakarov@redhat.com> 4484 4485 PR target/99422 4486 * lra-constraints.c (process_address_1): Don't check unknown 4487 constraint, use X for empty constraint. 4488 44892021-03-10 Alex Coplan <alex.coplan@arm.com> 4490 4491 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate): 4492 Fix typo in comment describing "is_ha" argument. 4493 44942021-03-10 John David Anglin <danglin@gcc.gnu.org> 4495 4496 * doc/sourcebuild.texi: Document LRA target selector. 4497 44982021-03-10 David Malcolm <dmalcolm@redhat.com> 4499 4500 * doc/ux.texi: Add subsection contrasting interactive versus 4501 batch usage of GCC. 4502 45032021-03-10 Joel Hutton <joel.hutton@arm.com> 4504 4505 PR target/99102 4506 * tree-vect-stmts.c (vectorizable_store): Fix scatter store mask 4507 check condition. 4508 (vectorizable_load): Fix gather load mask check condition. 4509 45102021-03-10 Richard Biener <rguenther@suse.de> 4511 4512 PR tree-optimization/99510 4513 * tree.c (check_aligned_type): Check that the candidate 4514 has TYPE_USER_ALIGN set instead of matching with the 4515 original type. 4516 45172021-03-10 Eric Botcazou <ebotcazou@adacore.com> 4518 4519 * config/sparc/sparc.c (sparc_regmode_natural_size): Return 4 for 4520 float and vector integer modes only if the mode is not larger. 4521 45222021-03-10 Hans-Peter Nilsson <hp@axis.com> 4523 4524 * config/cris/cris.h (DWARF_FRAME_REGISTERS): Define. 4525 45262021-03-09 Vladimir N. Makarov <vmakarov@redhat.com> 4527 4528 * ira.c (ira_setup_alts, ira_get_dup_out_num): Process digital 4529 constraints > 9. 4530 * ira-lives.c (single_reg_class): Ditto. 4531 45322021-03-09 Sebastian Huber <sebastian.huber@embedded-brains.de> 4533 4534 * config.gcc (aarch64-*-rtems*): Include general rtems.h after 4535 the architecture-specific rtems.h. 4536 (aarch64-*-rtems*): Likewise. 4537 (arm*-*-rtems*): Likewise. 4538 (epiphany-*-rtems*): Likewise. 4539 (riscv*-*-rtems*): Likewise. 4540 45412021-03-09 Jakub Jelinek <jakub@redhat.com> 4542 4543 PR tree-optimization/99305 4544 * tree-ssa-phiopt.c (conditional_replacement): Test integer_pow2p 4545 before integer_all_onesp instead of vice versa. 4546 45472021-03-09 Richard Earnshaw <rearnsha@arm.com> 4548 4549 * common/config/arm/arm-common.c (arm_config_default): Change type 4550 of 'i' to unsigned. 4551 45522021-03-09 Vladimir N. Makarov <vmakarov@redhat.com> 4553 4554 PR target/99454 4555 * lra-constraints.c (process_address_1): Process constraint 'g' 4556 separately and digital constraints containing more one digit. 4557 45582021-03-09 Nick Clifton <nickc@redhat.com> 4559 4560 * config/rx/rx.h (DBX_DEBUGGING_INFO): Define. 4561 (DWARF"_DEBUGGING_INFO): Define. 4562 45632021-03-09 Eric Botcazou <ebotcazou@adacore.com> 4564 4565 PR c++/90448 4566 * calls.c (initialize_argument_information): When the argument 4567 is passed by reference, do not make a copy in a thunk only if 4568 the argument is already in memory. Remove redundant test for 4569 the case of callee copy. 4570 45712021-03-09 Vladimir N. Makarov <vmakarov@redhat.com> 4572 4573 PR target/99454 4574 * lra-constraints.c (process_address_1): Process 0..9 constraints 4575 in process_address_1. 4576 45772021-03-09 Andreas Krebbel <krebbel@linux.ibm.com> 4578 4579 * config/s390/s390.c (struct s390_processor processor_table): 4580 Binutils name string must not be empty. 4581 45822021-03-09 Claudiu Zissulescu <claziss@synopsys.com> 4583 4584 * config/arc/arc.c (arc_attr_type): Remove function. 4585 45862021-03-09 Martin Liska <mliska@suse.cz> 4587 4588 PR target/99464 4589 * config/i386/i386-options.c (ix86_option_override_internal): 4590 Set isa_flags for OPTS argument and not for the global 4591 global_options. 4592 45932021-03-09 Aaron Sawdey <acsawdey@linux.ibm.com> 4594 4595 * config/rs6000/predicates.md (ds_form_mem_operand): Check 4596 in correct code. 4597 45982021-03-09 Aaron Sawdey <acsawdey@linux.ibm.com> 4599 4600 PR target/99070 4601 * config/rs6000/predicates.md (ds_form_mem_operand) New 4602 predicate. 4603 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10) Use 4604 ds_form_mem_operand in ld/lwa patterns. 4605 * config/rs6000/fusion.md: Regenerate file. 4606 46072021-03-08 Martin Sebor <msebor@redhat.com> 4608 4609 PR middle-end/98266 4610 * gimple-array-bounds.cc (inbounds_vbase_memaccess_p): New function. 4611 (array_bounds_checker::check_array_bounds): Call it. 4612 46132021-03-08 Martin Sebor <msebor@redhat.com> 4614 4615 PR middle-end/97631 4616 * tree-ssa-strlen.c (maybe_warn_overflow): Test rawmem. 4617 (handle_builtin_stxncpy_strncat): Rename locals. Determine 4618 destination size from allocation calls. Issue a more appropriate 4619 kind of warning. 4620 (handle_builtin_memcpy): Pass true as rawmem to maybe_warn_overflow. 4621 (handle_builtin_memset): Same. 4622 46232021-03-08 Peter Bergner <bergner@linux.ibm.com> 4624 4625 PR target/98959 4626 * config/rs6000/rs6000.c (rs6000_emit_le_vsx_permute): Add an assert 4627 to ensure we do not have an Altivec style address. 4628 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): Disable if passed 4629 an Altivec style address. 4630 (*vsx_le_perm_store_<mode>): Likewise. 4631 (splitters after *vsx_le_perm_store_<mode>): Likewise. 4632 (vsx_load_<mode>): Disable special expander if passed an Altivec 4633 style address. 4634 (vsx_store_<mode>): Likewise. 4635 46362021-03-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 4637 4638 PR target/99437 4639 * config/aarch64/predicates.md (aarch64_simd_shift_imm_vec_qi): Define. 4640 (aarch64_simd_shift_imm_vec_hi): Likewise. 4641 (aarch64_simd_shift_imm_vec_si): Likewise. 4642 (aarch64_simd_shift_imm_vec_di): Likewise. 4643 * config/aarch64/aarch64-simd.md (aarch64_shrn<mode>_insn_le): Use 4644 predicate from above. 4645 (aarch64_shrn<mode>_insn_be): Likewise. 4646 (aarch64_rshrn<mode>_insn_le): Likewise. 4647 (aarch64_rshrn<mode>_insn_be): Likewise. 4648 (aarch64_shrn2<mode>_insn_le): Likewise. 4649 (aarch64_shrn2<mode>_insn_be): Likewise. 4650 (aarch64_rshrn2<mode>_insn_le): Likewise. 4651 (aarch64_rshrn2<mode>_insn_be): Likewise. 4652 46532021-03-08 Vladimir N. Makarov <vmakarov@redhat.com> 4654 4655 PR target/99422 4656 * lra-constraints.c (skip_contraint_modifiers): New function. 4657 (process_address_1): Use it before lookup_constraint call. 4658 46592021-03-08 Martin Liska <mliska@suse.cz> 4660 4661 PR target/99463 4662 * config/i386/i386-options.c (ix86_option_override_internal): 4663 Enable UINTR and HRESET for -march that supports it. 4664 46652021-03-08 Ilya Leoshkevich <iii@linux.ibm.com> 4666 4667 * config/s390/s390.c (f_constraint_p): New function. 4668 (s390_md_asm_adjust): Implement TARGET_MD_ASM_ADJUST. 4669 (TARGET_MD_ASM_ADJUST): Likewise. 4670 46712021-03-08 Tobias Burnus <tobias@codesourcery.com> 4672 4673 PR fortran/97927 4674 * tree-nested.c (convert_local_reference_stmt): Avoid calling 4675 lookup_field_for_decl for Fortran module (= namespace context). 4676 46772021-03-08 Andreas Krebbel <krebbel@linux.ibm.com> 4678 4679 * config/s390/s390.c (s390_expand_vec_compare): Implement <0 4680 comparison with arithmetic right shift. 4681 (s390_expand_vcond): No need for a force_reg anymore. 4682 s390_vec_compare will do it. 4683 * config/s390/vector.md ("vec_cmp<mode><tointvec>"): Accept also 4684 immediate operands. 4685 46862021-03-07 Jakub Jelinek <jakub@redhat.com> 4687 4688 PR target/99321 4689 * config/i386/constraints.md (Yw): Use SSE_REGS if TARGET_SSE 4690 but TARGET_AVX512BW or TARGET_AVX512VL is not set. Adjust description 4691 and comment. 4692 * config/i386/sse.md (v_Yw): New define_mode_attr. 4693 (*<insn><mode>3, *mul<mode>3<mask_name>, *avx2_<code><mode>3, 4694 *sse4_1_<code><mode>3<mask_name>): Use <v_Yw> instead of v 4695 in constraints. 4696 * config/i386/mmx.md (mmx_pshufw_1, *vec_dupv4hi): Use Yw instead of 4697 xYw in constraints. 4698 46992021-03-06 Julian Brown <julian@codesourcery.com> 4700 4701 * tree-pretty-print.c (dump_generic_node): Emit non-generic 4702 address space info for aggregates. 4703 47042021-03-06 Hans-Peter Nilsson <hp@axis.com> 4705 4706 * config/cris/cris.h (MAX_FIXED_MODE_SIZE): Don't define. 4707 47082021-03-05 Jakub Jelinek <jakub@redhat.com> 4709 4710 PR middle-end/99322 4711 * tree-cfg.c (bb_to_omp_idx): New variable. 4712 (execute_build_cfg): Release the bb_to_omp_idx vector after 4713 cleanup_tree_cfg returns. 4714 (handle_abnormal_edges): Remove bb_to_omp_idx argument, adjust 4715 for bb_to_omp_idx being a vec<int> instead of pointer to array 4716 of ints. 4717 (make_edges): Remove bb_to_omp_idx local variable, don't pass 4718 it to handle_abnormal_edges, adjust for bb_to_omp_idx being a 4719 vec<int> instead of pointer to array of ints and don't free/release 4720 it at the end. 4721 (remove_bb): When removing a bb and placing forced label somewhere 4722 else, ensure it is put into the same OpenMP region during cfg 4723 pass if possible or to entry successor as fallback. Unregister 4724 bb from bb_to_omp_idx. 4725 47262021-03-05 Vladimir N. Makarov <vmakarov@redhat.com> 4727 4728 PR target/99378 4729 * lra-constraints.c (process_address_1): Skip decomposing address 4730 for asm insn operand with unknown constraint. 4731 47322021-03-05 Martin Jambor <mjambor@suse.cz> 4733 4734 PR ipa/98078 4735 * cgraph.c (cgraph_edge::set_call_stmt): Do not update all 4736 corresponding speculative edges if we are about to resolve 4737 sepculation. Make edge direct (and so resolve speculations) before 4738 removing it from call_site_hash. 4739 (cgraph_edge::make_direct): Relax the initial assert to allow calling 4740 the function on speculative direct edges. 4741 47422021-03-05 Eric Botcazou <ebotcazou@adacore.com> 4743 4744 PR rtl-optimization/99376 4745 * rtlanal.c (nonzero_bits1) <arithmetic operators>: If the number 4746 of low-order zero bits is too large, set the result to 0 directly. 4747 47482021-03-04 Jakub Jelinek <jakub@redhat.com> 4749 4750 PR middle-end/93235 4751 * expmed.c (store_bit_field_using_insv): Return false of xop0 is a 4752 SUBREG and a SUBREG to op_mode can't be created. 4753 47542021-03-04 Alex Coplan <alex.coplan@arm.com> 4755 4756 PR target/99381 4757 * config/aarch64/aarch64-sve-builtins.cc 4758 (function_resolver::require_vector_type): Handle error_mark_node. 4759 47602021-03-04 Ilya Leoshkevich <iii@linux.ibm.com> 4761 4762 * cfgexpand.c (expand_asm_loc): Pass new parameter. 4763 (expand_asm_stmt): Likewise. 4764 * config/arm/aarch-common-protos.h (arm_md_asm_adjust): Add new 4765 parameter. 4766 * config/arm/aarch-common.c (arm_md_asm_adjust): Likewise. 4767 * config/arm/arm.c (thumb1_md_asm_adjust): Likewise. 4768 * config/cris/cris.c (cris_md_asm_adjust): Likewise. 4769 * config/i386/i386.c (ix86_md_asm_adjust): Likewise. 4770 * config/mn10300/mn10300.c (mn10300_md_asm_adjust): Likewise. 4771 * config/nds32/nds32.c (nds32_md_asm_adjust): Likewise. 4772 * config/pdp11/pdp11.c (pdp11_md_asm_adjust): Likewise. 4773 * config/rs6000/rs6000.c (rs6000_md_asm_adjust): Likewise. 4774 * config/vax/vax.c (vax_md_asm_adjust): Likewise. 4775 * config/visium/visium.c (visium_md_asm_adjust): Likewise. 4776 * doc/tm.texi (md_asm_adjust): Likewise. 4777 * target.def (md_asm_adjust): Likewise. 4778 47792021-03-04 Richard Biener <rguenther@suse.de> 4780 4781 PR middle-end/97855 4782 * tree-pretty-print.c: Poison pp_printf. 4783 (dump_decl_name): Avoid use of pp_printf. 4784 (dump_block_node): Likewise. 4785 (dump_generic_node): Likewise. 4786 47872021-03-04 Martin Sebor <msebor@redhat.com> 4788 4789 PR middle-end/96963 4790 PR middle-end/94655 4791 * builtins.c (handle_array_ref): New helper. 4792 (handle_mem_ref): New helper. 4793 (compute_objsize_r): Factor out ARRAY_REF and MEM_REF handling 4794 into new helper functions. Correct a workaround for vectorized 4795 assignments. 4796 47972021-03-03 Pat Haugen <pthaugen@linux.ibm.com> 4798 4799 * config/rs6000/dfp.md (extendddtd2, trunctddd2, *cmp<mode>_internal1, 4800 floatditd2, ftrunc<mode>2, fix<mode>di2, dfp_ddedpd_<mode>, 4801 dfp_denbcd_<mode>, dfp_dxex_<mode>, dfp_diex_<mode>, 4802 *dfp_sgnfcnc_<mode>, dfp_dscli_<mode>, dfp_dscri_<mode>): Update size 4803 attribute for Power10. 4804 * config/rs6000/mma.md (*movoo): Likewise. 4805 * config/rs6000/rs6000.md (define_attr "size"): Add 256. 4806 (define_mode_attr bits): Add DD/TD modes. 4807 * config/rs6000/sync.md (load_quadpti, store_quadpti, load_lockedpti, 4808 store_conditionalpti): Update size attribute for Power10. 4809 48102021-03-03 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> 4811 4812 PR bootstrap/92002 4813 * config/sparc/t-sparc (tree-ssanames.o-warn): Don't error for 4814 -Wuninitialized, -Wmaybe-uninitialized. 4815 (wide-int.o-warn): Likewise. 4816 48172021-03-03 Richard Earnshaw <rearnsha@arm.com> 4818 4819 * common/config/arm/arm-common.c: Include configargs.h. 4820 (arm_config_default): New function. 4821 (arm_target_mode): Renamed from arm_target_thumb_only. Handle 4822 processors that do not support Thumb. Take into account the 4823 --with-mode configuration setting for selecting the default. 4824 * config/arm/arm.h (OPTION_DEFAULT_SPECS): Remove entry for 'mode'. 4825 (TARGET_MODE_SPEC_FUNCTIONS): Update for function name change. 4826 48272021-03-03 Martin Liska <mliska@suse.cz> 4828 4829 PR gcov-profile/97461 4830 * gcov-io.h (GCOV_PREALLOCATED_KVP): Remove. 4831 48322021-03-03 Eric Botcazou <ebotcazou@adacore.com> 4833 4834 PR target/99234 4835 * config/i386/i386.c (ix86_compute_frame_layout): For a SEH target, 4836 point back the hard frame pointer to its default location when the 4837 frame is larger than SEH_MAX_FRAME_SIZE. 4838 48392021-03-03 Jakub Jelinek <jakub@redhat.com> 4840 4841 PR target/99321 4842 * config/i386/predicates.md (logic_operator): New define_predicate. 4843 * config/i386/i386.md (mov + mem using comm arith peephole2): 4844 Punt if operands[1] is EXT_REX_SSE_REGNO_P, AVX512BW is not enabled 4845 and the inner mode is [QH]Imode. 4846 48472021-03-03 Jakub Jelinek <jakub@redhat.com> 4848 4849 PR debug/99090 4850 * dwarf2out.c (dw_loc_list_struct): Add end_entry member. 4851 (new_loc_list): Clear end_entry. 4852 (output_loc_list): Only use DW_LLE_startx_length for -gsplit-dwarf 4853 if HAVE_AS_LEB128, otherwise use DW_LLE_startx_endx. Fix comment 4854 typo. 4855 (index_location_lists): For dwarf_version >= 5 without HAVE_AS_LEB128, 4856 initialize also end_entry. 4857 48582021-03-03 Jakub Jelinek <jakub@redhat.com> 4859 4860 PR target/99085 4861 * cfgrtl.c (fixup_partitions): When changing some bbs from hot to cold 4862 partitions, if in non-layout mode after reorder_blocks also move 4863 affected blocks to ensure a single partition transition. 4864 48652021-03-03 Jason Merrill <jason@redhat.com> 4866 4867 PR c++/96078 4868 * cgraphunit.c (process_function_and_variable_attributes): Don't 4869 warn about flatten on an alias if the target also has it. 4870 * cgraph.h (symtab_node::get_alias_target_tree): New. 4871 48722021-03-02 David Edelsohn <dje.gcc@gmail.com> 4873 4874 * config/rs6000/rs6000.md (tls_get_tpointer_internal): Prepend 4875 period to symbol name. 4876 (tls_get_addr_internal<mode>): Same. 4877 48782021-03-02 David Malcolm <dmalcolm@redhat.com> 4879 4880 PR c/99323 4881 * diagnostic-show-locus.c 4882 (selftest::test_one_liner_many_fixits_2): Fix accidental usage of 4883 column 0. 4884 48852021-03-02 Martin Sebor <msebor@redhat.com> 4886 4887 PR middle-end/99276 4888 * builtins.c (warn_for_access): Remove stray warning text. 4889 48902021-03-02 Martin Sebor <msebor@redhat.com> 4891 4892 PR middle-end/99295 4893 * doc/extend.texi (attribute malloc): Reword and clarify nonaliasing 4894 property. 4895 48962021-03-02 Jakub Jelinek <jakub@redhat.com> 4897 4898 PR debug/99319 4899 * dwarf2out.c (output_macinfo_op): Use DW_MACRO_*_str* even with 4900 -gdwarf-5 -gstrict-dwarf. For -gsplit-dwarf -gdwarf-5 use 4901 DW_MACRO_*_strx instead of DW_MACRO_*_strp. Handle 4902 DW_MACRO_define_strx and DW_MACRO_undef_strx. 4903 (save_macinfo_strings): Use DW_MACRO_*_str* even with 4904 -gdwarf-5 -gstrict-dwarf. Handle DW_MACRO_define_strx and 4905 DW_MACRO_undef_strx. 4906 49072021-03-02 Andreas Krebbel <krebbel@linux.ibm.com> 4908 4909 * config/s390/s390-builtin-types.def (BT_FN_V4SF_V8HI_UINT): New 4910 builtin signature. 4911 (BT_FN_V8HI_V8HI_UINT): Likewise. 4912 (BT_FN_V8HI_V4SF_V4SF_UINT): Likewise. 4913 * config/s390/s390-builtins.def (B_NNPA): New macro definition. 4914 (s390_vclfnhs, s390_vclfnls, s390_vcrnfs, s390_vcfn, s390_vcnf): 4915 New builtin definitions. 4916 * config/s390/s390-c.c (s390_cpu_cpp_builtins_internal): Bump 4917 vector extension version. 4918 * config/s390/s390.c (s390_expand_builtin): Check if builtins are 4919 available with current -march level. 4920 * config/s390/s390.md (UNSPEC_NNPA_VCLFNHS_V8HI) 4921 (UNSPEC_NNPA_VCLFNLS_V8HI, UNSPEC_NNPA_VCRNFS_V8HI) 4922 (UNSPEC_NNPA_VCFN_V8HI, UNSPEC_NNPA_VCNF_V8HI): New constants. 4923 * config/s390/vecintrin.h (vec_extend_to_fp32_hi): New macro. 4924 (vec_extend_to_fp32_lo): Likewise. 4925 (vec_round_from_fp32): Likewise. 4926 (vec_convert_to_fp16): Likewise. 4927 (vec_convert_from_fp16): Likewise. 4928 * config/s390/vx-builtins.md (vclfnhs_v8hi): New insn pattern. 4929 (vclfnls_v8hi): Likewise. 4930 (vcrnfs_v8hi): Likewise. 4931 (vcfn_v8hi): Likewise. 4932 (vcnf_v8hi): Likewise. 4933 49342021-03-02 Andreas Krebbel <krebbel@linux.ibm.com> 4935 4936 * common/config/s390/s390-common.c (processor_flags_table): New entry. 4937 * config.gcc: Enable arch14 for --with-arch and --with-tune. 4938 * config/s390/driver-native.c (s390_host_detect_local_cpu): Pick 4939 arch14 for unknown CPU models. 4940 * config/s390/s390-opts.h (enum processor_type): Add PROCESSOR_ARCH14. 4941 * config/s390/s390.c (s390_issue_rate): Add case for PROCESSOR_ARCH14. 4942 (s390_get_sched_attrmask): Likewise. 4943 (s390_get_unit_mask): Likewise. 4944 * config/s390/s390.h (enum processor_flags): Add PF_NNPA and PF_ARCH14. 4945 (TARGET_CPU_ARCH14, TARGET_CPU_ARCH14_P, TARGET_CPU_NNPA) 4946 (TARGET_CPU_NNPA_P, TARGET_ARCH14, TARGET_ARCH14_P, TARGET_NNPA) 4947 (TARGET_NNPA_P): New macro definitions. 4948 * config/s390/s390.md ("cpu_facility", "enabled"): Add arch14 and nnpa. 4949 * config/s390/s390.opt: Add PROCESSOR_ARCH14. 4950 49512021-03-02 Jakub Jelinek <jakub@redhat.com> 4952 4953 PR middle-end/95757 4954 * tree-vrp.c (register_edge_assert_for): Remove superfluous ()s around 4955 condition. Call register_edge_assert_for_1 for == 0, != 0, == 1 and 4956 != 1 comparisons if name is lhs of a comparison. 4957 49582021-03-01 Iain Sandoe <iain@sandoe.co.uk> 4959 4960 PR target/44107 4961 PR target/48097 4962 * config/darwin-protos.h (darwin_should_restore_cfa_state): New. 4963 * config/darwin.c (darwin_should_restore_cfa_state): New. 4964 * config/darwin.h (TARGET_ASM_SHOULD_RESTORE_CFA_STATE): New. 4965 * doc/tm.texi: Regenerated. 4966 * doc/tm.texi.in: Document TARGET_ASM_SHOULD_RESTORE_CFA_STATE. 4967 * dwarf2cfi.c (connect_traces): If the target requests, restore 4968 the CFA expression after a DW_CFA_restore. 4969 * target.def (TARGET_ASM_SHOULD_RESTORE_CFA_STATE): New hook. 4970 49712021-03-01 Martin Liska <mliska@suse.cz> 4972 4973 PR target/99313 4974 * optc-save-gen.awk: Add 4 more exceptions. 4975 49762021-03-01 Nathan Sidwell <nathan@acm.org> 4977 4978 PR c++/99294 4979 * tree.h (TYPE_ALIGN_RAW): New accessor. 4980 (TYPE_ALIGN): Use it. 4981 49822021-03-01 Jan Hubicka <jh@suse.cz> 4983 4984 PR ipa/98338 4985 * ipa-fnsummary.c (compute_fn_summary): Fix sanity check. 4986 49872021-03-01 Eric Botcazou <ebotcazou@adacore.com> 4988 4989 PR target/99234 4990 * config/i386/i386.c (ix86_compute_frame_layout): For a SEH target, 4991 point the hard frame pointer to the SSE register save area instead 4992 of the general register save area. Perform only minimal adjustment 4993 for small frames if it is initially not correctly aligned. 4994 (ix86_expand_prologue): Remove early saves for a SEH target. 4995 * config/i386/winnt.c (struct seh_frame_state): Document constraint. 4996 49972021-02-28 Jakub Jelinek <jakub@redhat.com> 4998 4999 PR c/99304 5000 * ipa.c (symbol_table::remove_unreachable_nodes): Fix a comment 5001 typo - referneced -> referenced. 5002 * tree.c (component_ref_size): Fix comment typo - 5003 refernce -> reference. 5004 * tree-ssa-alias.c (access_path_may_continue_p): Fix comment typo - 5005 traling -> trailing. 5006 (aliasing_component_refs_p): Fix comment typos - 5007 refernce -> reference and refernece -> reference and 5008 traling -> trailing. 5009 (nonoverlapping_refs_since_match_p): Fix comment typo - 5010 referneces -> references. 5011 * doc/invoke.texi (--param modref-max-bases): Fix a typo - 5012 referneces -> references. 5013 50142021-02-27 Iain Sandoe <iain@sandoe.co.uk> 5015 5016 * config/host-darwin.c (darwin_gt_pch_use_address): Modify 5017 diagnostic message to avoid use of a contraction and format 5018 warning. 5019 50202021-02-27 Jakub Jelinek <jakub@redhat.com> 5021 5022 PR other/99288 5023 * gcse.c (gcse_or_cprop_is_too_expensive): Use %wu instead of 5024 HOST_WIDE_INT_PRINT_UNSIGNED in warning format string. 5025 * ipa-devirt.c (ipa_odr_read_section): Use %wd instead of 5026 HOST_WIDE_INT_PRINT_DEC in inform format string. Fix comment 5027 typos. 5028 50292021-02-26 Richard Biener <rguenther@suse.de> 5030 5031 PR middle-end/99281 5032 * expr.c (store_field): For calls with return-slot optimization 5033 and addressable return type expand the store directly. 5034 50352021-02-26 Richard Biener <rguenther@suse.de> 5036 5037 PR c/99275 5038 * builtins.c (warn_string_no_nul): Fix diagnostic formatting. 5039 50402021-02-26 Peter Bergner <bergner@linux.ibm.com> 5041 5042 PR target/99279 5043 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Replace assert 5044 with an "if" test. 5045 50462021-02-26 Aaron Sawdey <acsawdey@linux.ibm.com> 5047 5048 * config.gcc: Add rs6000-pcrel-opt.o. 5049 * config/rs6000/rs6000-pcrel-opt.c: New file. 5050 * config/rs6000/pcrel-opt.md: New file. 5051 * config/rs6000/predicates.md: Add d_form_memory predicate. 5052 * config/rs6000/rs6000-cpus.def: Add OPTION_MASK_PCREL_OPT. 5053 * config/rs6000/rs6000-passes.def: Add pass_pcrel_opt. 5054 * config/rs6000/rs6000-protos.h: Add reg_to_non_prefixed(), 5055 pcrel_opt_valid_mem_p(), output_pcrel_opt_reloc(), 5056 and make_pass_pcrel_opt(). 5057 * config/rs6000/rs6000.c (reg_to_non_prefixed): Make global. 5058 (rs6000_option_override_internal): Add pcrel-opt. 5059 (rs6000_delegitimize_address): Support pcrel-opt. 5060 (rs6000_opt_masks): Add pcrel-opt. 5061 (pcrel_opt_valid_mem_p): New function. 5062 (reg_to_non_prefixed): Make global. 5063 (rs6000_asm_output_opcode): Reset prepend_p_to_next_insn. 5064 (output_pcrel_opt_reloc): New function. 5065 * config/rs6000/rs6000.md (loads_extern_addr): New attr. 5066 (pcrel_extern_addr): Set loads_extern_addr. 5067 Add include for pcrel-opt.md. 5068 * config/rs6000/rs6000.opt: Add -mpcrel-opt. 5069 * config/rs6000/t-rs6000: Add rules for pcrel-opt.c and 5070 pcrel-opt.md. 5071 50722021-02-26 YunQiang Su <yunqiang.su@cipunited.com> 5073 5074 PR target/98996 5075 * config/mips/mips.c (mips_expand_ext_as_unaligned_load): 5076 If TARGET_64BIT and dest is SUBREG, we check the width, if it 5077 equal to SImode, we use SImode operation, just like what we are 5078 doing for REG one. 5079 50802021-02-26 Marek Polacek <polacek@redhat.com> 5081 5082 * builtins.c (warn_for_access): Fix typos. 5083 50842021-02-25 Iain Sandoe <iain@sandoe.co.uk> 5085 5086 * config/aarch64/aarch64.md (<optab>_rol<mode>3): Add a '#' 5087 mark in front of the immediate quantity. 5088 (<optab>_rolsi3_uxtw): Likewise. 5089 50902021-02-25 Richard Earnshaw <rearnsha@arm.com> 5091 5092 PR target/99271 5093 * config/arm/thumb2.md (nonsecure_call_reg_thumb2_fpcxt): New pattern. 5094 (nonsecure_call_value_reg_thumb2_fpcxt): Likewise. 5095 (nonsecure_call_reg_thumb2): Restrict to using r4 for the callee 5096 address and disable when the FPCXT is not available. 5097 (nonsecure_call_value_reg_thumb2): Likewise. 5098 50992021-02-25 Nathan Sidwell <nathan@acm.org> 5100 5101 PR c++/99166 5102 * doc/invoke.texi (flang-info-module-cmi): Renamed option. 5103 51042021-02-25 Tamar Christina <tamar.christina@arm.com> 5105 5106 * tree-vect-slp.c (optimize_load_redistribution_1): Abort on NULL nodes. 5107 51082021-02-25 Richard Biener <rguenther@suse.de> 5109 5110 PR tree-optimization/99253 5111 * tree-vect-loop.c (check_reduction_path): First compute 5112 code, then verify out-of-loop uses. 5113 51142021-02-25 Jakub Jelinek <jakub@redhat.com> 5115 5116 PR target/95798 5117 * match.pd ((T)(A) + CST -> (T)(A + CST)): Add :s to convert. 5118 51192021-02-25 Jakub Jelinek <jakub@redhat.com> 5120 5121 PR tree-optimization/80635 5122 * tree-vrp.c (vrp_simplify_cond_using_ranges): Also handle 5123 VIEW_CONVERT_EXPR if modes are the same, innerop is integral and 5124 has mode precision. 5125 51262021-02-25 Richard Biener <rguenther@suse.de> 5127 5128 * tree-vect-slp.c (optimize_load_redistribution_1): Delay 5129 load_map population. 5130 (vect_match_slp_patterns_2): Revert part of last change. 5131 (vect_analyze_slp): Do not interleave optimize_load_redistribution 5132 with pattern detection but do it afterwards. Dump the 5133 whole SLP graph after pattern recognition and load 5134 redistribution optimization finished. 5135 51362021-02-24 Jakub Jelinek <jakub@redhat.com> 5137 5138 PR fortran/99226 5139 * omp-low.c (struct omp_context): Add teams_nested_p and 5140 nonteams_nested_p members. 5141 (scan_omp_target): Diagnose teams nested inside of target with other 5142 directives strictly nested inside of the same target. 5143 (check_omp_nesting_restrictions): Set ctx->teams_nested_p or 5144 ctx->nonteams_nested_p as needed. 5145 51462021-02-24 Vladimir N. Makarov <vmakarov@redhat.com> 5147 5148 PR inline-asm/99123 5149 * lra-constraints.c (uses_hard_regs_p): Don't use decompose_mem_address. 5150 51512021-02-24 Hans-Peter Nilsson <hp@axis.com> 5152 5153 * config/cris/cris.c (cris_expand_prologue): Set 5154 current_function_static_stack_size, if flag_stack_usage_info. 5155 51562021-02-24 Pat Haugen <pthaugen@linux.ibm.com> 5157 5158 * config/rs6000/rs6000.c (next_insn_prefixed_p): Rename. 5159 (rs6000_final_prescan_insn): Adjust. 5160 (rs6000_asm_output_opcode): Likewise. 5161 51622021-02-24 Martin Sebor <msebor@redhat.com> 5163 5164 PR middle-end/97172 5165 * attribs.c (attr_access::free_lang_data): Clear attribute arg spec 5166 from function arguments. 5167 51682021-02-24 Tamar Christina <tamar.christina@arm.com> 5169 5170 PR tree-optimization/99220 5171 * tree-vect-slp.c (optimize_load_redistribution_1): Remove 5172 node from cache when it's about to be deleted. 5173 51742021-02-24 Jakub Jelinek <jakub@redhat.com> 5175 5176 PR tree-optimization/99225 5177 * fold-const.c (fold_binary_loc) <case NE_EXPR>: In (x & (1 << y)) != 0 5178 to ((x >> y) & 1) != 0 simplifications use build_one_cst instead of 5179 build_int_cst (..., 1). Formatting fixes. 5180 51812021-02-24 Tamar Christina <tamar.christina@arm.com> 5182 5183 PR tree-optimization/99149 5184 * tree-vect-slp-patterns.c (vect_detect_pair_op): Don't recreate the 5185 buffer. 5186 (vect_slp_reset_pattern): Remove. 5187 (complex_fma_pattern::matches): Remove call to vect_slp_reset_pattern. 5188 (complex_mul_pattern::build, complex_fma_pattern::build, 5189 complex_fms_pattern::build): Fix ref counts. 5190 * tree-vect-slp.c (vect_free_slp_tree): Undo SLP only pattern relevancy 5191 when node is being deleted. 5192 (vect_match_slp_patterns_2): Correct result of cache hit on patterns. 5193 (vect_schedule_slp): Invalidate SLP_TREE_REPRESENTATIVE of removed 5194 stores. 5195 * tree-vectorizer.c (vec_info::new_stmt_vec_info): Initialize value. 5196 51972021-02-24 Matthias Klose <doko@ubuntu.com> 5198 5199 Revert: 5200 2020-12-07 Matthias Klose <doko@ubuntu.com> 5201 5202 * genextract.c (print_header): Undefine ENABLE_RTL_CHECKING 5203 and ENABLE_RTL_FLAG_CHECKING. 5204 52052021-02-24 Richard Biener <rguenther@suse.de> 5206 5207 PR c/99224 5208 * builtins.c (fold_builtin_next_arg): Avoid NULL arg. 5209 52102021-02-23 Peter Bergner <bergner@linux.ibm.com> 5211 5212 * config/rs6000/mma.md (mma_assemble_pair): Rename from this... 5213 (vsx_assemble_pair): ...to this. 5214 (*mma_assemble_pair): Rename from this... 5215 (*vsx_assemble_pair): ...to this. 5216 (mma_disassemble_pair): Rename from this... 5217 (vsx_disassemble_pair): ...to this. 5218 (*mma_disassemble_pair): Rename from this... 5219 (*vsx_disassemble_pair): ...to this. 5220 * config/rs6000/rs6000-builtin.def (BU_MMA_V2, BU_MMA_V3, 5221 BU_COMPAT): New macros. 5222 (mma_assemble_pair): Rename from this... 5223 (vsx_assemble_pair): ...to this. 5224 (mma_disassemble_pair): Rename from this... 5225 (vsx_disassemble_pair): ...to this. 5226 (mma_assemble_pair): New compatibility built-in. 5227 (mma_disassemble_pair): Likewise. 5228 * config/rs6000/rs6000-call.c (struct builtin_compatibility): New. 5229 (RS6000_BUILTIN_COMPAT): Define. 5230 (bdesc_compat): New. 5231 (mma_expand_builtin): Use VSX_BUILTIN_DISASSEMBLE_PAIR_INTERNAL. 5232 (rs6000_gimple_fold_mma_builtin): Use MMA_BUILTIN_DISASSEMBLE_PAIR 5233 and VSX_BUILTIN_ASSEMBLE_PAIR. 5234 (rs6000_init_builtins): Register compatibility built-ins. 5235 (mma_init_builtins): Use VSX_BUILTIN_ASSEMBLE_PAIR, 5236 VSX_BUILTIN_ASSEMBLE_PAIR_INTERNAL, VSX_BUILTIN_DISASSEMBLE_PAIR and 5237 VSX_BUILTIN_DISASSEMBLE_PAIR_INTERNAL. 5238 * doc/extend.texi (__builtin_mma_assemble_pair): Rename from this... 5239 (__builtin_vsx_assemble_pair): ...to this. 5240 (__builtin_mma_disassemble_pair): Rename from this... 5241 (__builtin_vsx_disassemble_pair): ...to this. 5242 52432021-02-23 Martin Liska <mliska@suse.cz> 5244 5245 PR sanitizer/99168 5246 * ipa-icf.c (sem_variable::merge): Do not merge 2 variables 5247 with different alignment. That leads to an invalid red zone 5248 size allocated in runtime. 5249 52502021-02-23 Jakub Jelinek <jakub@redhat.com> 5251 5252 PR tree-optimization/99204 5253 * fold-const.c (fold_read_from_constant_string): Check that 5254 tree_fits_uhwi_p (index) rather than just that index is INTEGER_CST. 5255 52562021-02-23 Segher Boessenkool <segher@kernel.crashing.org> 5257 Kewen Lin <linkw@gcc.gnu.org> 5258 5259 * config/rs6000/rs6000.md (*rotl<mode>3_insert_3): Renamed to... 5260 (rotl<mode>3_insert_3): ...this. 5261 (plus_ior_xor): New code_iterator. 5262 (define_split for GPR rl*imi): New splitter. 5263 * config/rs6000/vsx.md (vsx_init_v4si): Use gen_rotldi3_insert_3 5264 for integer merging. 5265 52662021-02-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 5267 5268 * config/aarch64/aarch64-tuning-flags.def (cse_sve_vl_constants): 5269 Define. 5270 * config/aarch64/aarch64.md (add<mode>3): Force CONST_POLY_INT immediates 5271 into a register when the above is enabled. 5272 * config/aarch64/aarch64.c (neoversev1_tunings): 5273 AARCH64_EXTRA_TUNE_CSE_SVE_VL_CONSTANTS. 5274 (aarch64_rtx_costs): Use AARCH64_EXTRA_TUNE_CSE_SVE_VL_CONSTANTS. 5275 52762021-02-22 Hans-Peter Nilsson <hp@axis.com> 5277 5278 * config/cris/cris.c (cris_print_operand) <'T'>: Change 5279 valid operand from is now an addi mult-value to shift-value. 5280 * config/cris/cris.md (*addi): Change expression of scaled 5281 operand from mult to ashift. 5282 * config/cris/cris.md (*addi_reload): New insn_and_split. 5283 52842021-02-22 John David Anglin <danglin@gcc.gnu.org> 5285 5286 PR target/85074 5287 * config/pa/pa.c (TARGET_ASM_CAN_OUTPUT_MI_THUNK): Define as 5288 hook_bool_const_tree_hwi_hwi_const_tree_true. 5289 (pa_asm_output_mi_thunk): Add support for nonzero vcall_offset. 5290 52912021-02-22 Andre Vieira <andre.simoesdiasvieira@arm.com> 5292 5293 PR rtl-optimization/98791 5294 * ira-conflicts.c (process_regs_for_copy): Don't create allocno copies 5295 for unordered modes. 5296 52972021-02-22 Martin Liska <mliska@suse.cz> 5298 5299 * tree-inline.c (inline_forbidden_p): Set 5300 inline_forbidden_reason. 5301 53022021-02-22 Richard Biener <rguenther@suse.de> 5303 5304 * tree-vect-slp.c (vect_bb_vectorization_profitable_p): Dump 5305 costed subgraph. 5306 53072021-02-22 Richard Biener <rguenther@suse.de> 5308 5309 PR tree-optimization/99165 5310 * gimple-ssa-store-merging.c (pass_store_merging::process_store): 5311 Accumulate changed to ret. 5312 53132021-02-21 Uros Bizjak <ubizjak@gmail.com> 5314 5315 Revert: 5316 2020-12-09 Uroš Bizjak <ubizjak@gmail.com> 5317 5318 * config/i386/i386.h (REG_ALLOC_ORDER): Remove 5319 53202021-02-20 Ilya Leoshkevich <iii@linux.ibm.com> 5321 5322 PR target/99134 5323 * config/s390/vector.md (trunctf<DFP_ALL:mode>2_vr): New 5324 pattern. 5325 (trunctf<DFP_ALL:mode>2): Likewise. 5326 (trunctdtf2_vr): Likewise. 5327 (trunctdtf2): Likewise. 5328 (extend<DFP_ALL:mode>tf2_vr): Likewise. 5329 (extend<DFP_ALL:mode>tf2): Likewise. 5330 (extendtftd2_vr): Likewise. 5331 (extendtftd2): Likewise. 5332 53332021-02-20 Ilya Leoshkevich <iii@linux.ibm.com> 5334 5335 * config/s390/vector.md (*fprx2_to_tf): Rename to fprx2_to_tf, 5336 add memory alternative. 5337 (tf_to_fprx2): New pattern. 5338 53392021-02-19 Martin Sebor <msebor@redhat.com> 5340 5341 PR c/97172 5342 * attribs.c (init_attr_rdwr_indices): Guard vblist use. 5343 (attr_access::free_lang_data): Remove a spurious test. 5344 53452021-02-19 Nathan Sidwell <nathan@acm.org> 5346 5347 * doc/invoke.texi (flang-info-module-read): Document. 5348 53492021-02-19 Martin Liska <mliska@suse.cz> 5350 5351 PR translation/99167 5352 * params.opt: Fix typo. 5353 53542021-02-19 Richard Biener <rguenther@suse.de> 5355 5356 PR middle-end/99122 5357 * tree-inline.c (inline_forbidden_p): Do not inline functions 5358 with VLA arguments or return value. 5359 53602021-02-19 Jakub Jelinek <jakub@redhat.com> 5361 5362 PR target/98998 5363 * config/arm/arm.md (*stack_protect_combined_set_insn, 5364 *stack_protect_combined_test_insn): If force_const_mem result 5365 is not valid general operand, force its address into the destination 5366 register first. 5367 53682021-02-19 Jakub Jelinek <jakub@redhat.com> 5369 5370 PR ipa/99034 5371 * tree-cfg.c (gimple_merge_blocks): If bb a starts with eh landing 5372 pad or non-local label, put FORCED_LABELs from bb b after that label 5373 rather than before it. 5374 53752021-02-19 Andre Vieira <andre.simoesdiasvieira@arm.com> 5376 5377 PR target/98657 5378 * config/aarch64/aarch64-sve.md (<ASHIFT:optab><mode>3): Use 5379 expand_vector_broadcast' to emit the vec_duplicate operand. 5380 53812021-02-18 Vladimir N. Makarov <vmakarov@redhat.com> 5382 5383 PR rtl-optimization/96264 5384 * lra-remat.c (reg_overlap_for_remat_p): Check also output insn 5385 hard regs. 5386 53872021-02-18 H.J. Lu <hjl.tools@gmail.com> 5388 5389 PR target/99113 5390 * varasm.c (get_section): Replace SUPPORTS_SHF_GNU_RETAIN with 5391 looking up the retain attribute. 5392 (resolve_unique_section): Likewise. 5393 (get_variable_section): Likewise. 5394 (switch_to_section): Likewise. Warn when a symbol without the 5395 retain attribute and a symbol with the retain attribute are 5396 placed in the section with the same name, instead of the used 5397 attribute. 5398 * doc/extend.texi: Document the "retain" attribute. 5399 54002021-02-18 Nathan Sidwell <nathan@acm.org> 5401 5402 PR c++/99023 5403 * doc/invoke.texi (flang-info-include-translate): Document header 5404 lookup behaviour. 5405 54062021-02-18 Richard Biener <rguenther@suse.de> 5407 5408 PR middle-end/99122 5409 * ipa-fnsummary.c (analyze_function_body): Set 5410 CIF_FUNCTION_NOT_INLINABLE for VLA parameter calls. 5411 * tree-inline.c (insert_init_debug_bind): Pass NULL for 5412 error_mark_node values. 5413 (force_value_to_type): Do not build V_C_Es for WITH_SIZE_EXPR 5414 values. 5415 (setup_one_parameter): Delay force_value_to_type until when 5416 it's needed. 5417 54182021-02-18 Hans-Peter Nilsson <hp@axis.com> 5419 5420 PR tree-optimization/99142 5421 * match.pd (clz cmp 0): Gate replacement on single_use of clz result. 5422 54232021-02-18 Jakub Jelinek <jakub@redhat.com> 5424 5425 * wide-int-bitmask.h (wide_int_bitmask::wide_int_bitmask (), 5426 wide_int_bitmask::wide_int_bitmask (uint64_t), 5427 wide_int_bitmask::wide_int_bitmask (uint64_t, uint64_t), 5428 wide_int_bitmask::operator ~ () const, 5429 wide_int_bitmask::operator | (wide_int_bitmask) const, 5430 wide_int_bitmask::operator & (wide_int_bitmask) const): Use constexpr 5431 instead of inline. 5432 * config/i386/i386.h (PTA_3DNOW, PTA_3DNOW_A, PTA_64BIT, PTA_ABM, 5433 PTA_AES, PTA_AVX, PTA_BMI, PTA_CX16, PTA_F16C, PTA_FMA, PTA_FMA4, 5434 PTA_FSGSBASE, PTA_LWP, PTA_LZCNT, PTA_MMX, PTA_MOVBE, PTA_NO_SAHF, 5435 PTA_PCLMUL, PTA_POPCNT, PTA_PREFETCH_SSE, PTA_RDRND, PTA_SSE, PTA_SSE2, 5436 PTA_SSE3, PTA_SSE4_1, PTA_SSE4_2, PTA_SSE4A, PTA_SSSE3, PTA_TBM, 5437 PTA_XOP, PTA_AVX2, PTA_BMI2, PTA_RTM, PTA_HLE, PTA_PRFCHW, PTA_RDSEED, 5438 PTA_ADX, PTA_FXSR, PTA_XSAVE, PTA_XSAVEOPT, PTA_AVX512F, PTA_AVX512ER, 5439 PTA_AVX512PF, PTA_AVX512CD, PTA_NO_TUNE, PTA_SHA, PTA_PREFETCHWT1, 5440 PTA_CLFLUSHOPT, PTA_XSAVEC, PTA_XSAVES, PTA_AVX512DQ, PTA_AVX512BW, 5441 PTA_AVX512VL, PTA_AVX512IFMA, PTA_AVX512VBMI, PTA_CLWB, PTA_MWAITX, 5442 PTA_CLZERO, PTA_NO_80387, PTA_PKU, PTA_AVX5124VNNIW, PTA_AVX5124FMAPS, 5443 PTA_AVX512VPOPCNTDQ, PTA_SGX, PTA_AVX512VNNI, PTA_GFNI, PTA_VAES, 5444 PTA_AVX512VBMI2, PTA_VPCLMULQDQ, PTA_AVX512BITALG, PTA_RDPID, 5445 PTA_PCONFIG, PTA_WBNOINVD, PTA_AVX512VP2INTERSECT, PTA_PTWRITE, 5446 PTA_AVX512BF16, PTA_WAITPKG, PTA_MOVDIRI, PTA_MOVDIR64B, PTA_ENQCMD, 5447 PTA_CLDEMOTE, PTA_SERIALIZE, PTA_TSXLDTRK, PTA_AMX_TILE, PTA_AMX_INT8, 5448 PTA_AMX_BF16, PTA_UINTR, PTA_HRESET, PTA_KL, PTA_WIDEKL, PTA_AVXVNNI, 5449 PTA_X86_64_BASELINE, PTA_X86_64_V2, PTA_X86_64_V3, PTA_X86_64_V4, 5450 PTA_CORE2, PTA_NEHALEM, PTA_WESTMERE, PTA_SANDYBRIDGE, PTA_IVYBRIDGE, 5451 PTA_HASWELL, PTA_BROADWELL, PTA_SKYLAKE, PTA_SKYLAKE_AVX512, 5452 PTA_CASCADELAKE, PTA_COOPERLAKE, PTA_CANNONLAKE, PTA_ICELAKE_CLIENT, 5453 PTA_ICELAKE_SERVER, PTA_TIGERLAKE, PTA_SAPPHIRERAPIDS, PTA_ALDERLAKE, 5454 PTA_KNL, PTA_BONNELL, PTA_SILVERMONT, PTA_GOLDMONT, PTA_GOLDMONT_PLUS, 5455 PTA_TREMONT, PTA_KNM): Use constexpr instead of const. 5456 54572021-02-18 Jakub Jelinek <jakub@redhat.com> 5458 5459 PR middle-end/99109 5460 * gimple-array-bounds.cc (build_zero_elt_array_type): Rename to ... 5461 (build_printable_array_type): ... this. Add nelts argument. For 5462 overaligned eltype, use TYPE_MAIN_VARIANT (eltype) instead. If 5463 nelts, call build_array_type_nelts. 5464 (array_bounds_checker::check_mem_ref): Use build_printable_array_type 5465 instead of build_zero_elt_array_type and build_array_type_nelts. 5466 54672021-02-18 Jakub Jelinek <jakub@redhat.com> 5468 5469 PR target/99104 5470 * config/i386/i386.c (distance_non_agu_define): Don't call 5471 extract_insn_cached here. 5472 (ix86_lea_outperforms): Save and restore recog_data around call 5473 to distance_non_agu_define and distance_agu_use. 5474 (ix86_ok_to_clobber_flags): Remove. 5475 (ix86_avoid_lea_for_add): Don't call ix86_ok_to_clobber_flags. 5476 (ix86_avoid_lea_for_addr): Likewise. Adjust function comment. 5477 * config/i386/i386.md (*lea<mode>): Change from define_insn_and_split 5478 into define_insn. Move the splitting to define_peephole2 and 5479 check there using peep2_regno_dead_p if FLAGS_REG is dead. 5480 54812021-02-17 Julian Brown <julian@codesourcery.com> 5482 5483 * gimplify.c (gimplify_scan_omp_clauses): Handle ATTACH_DETACH 5484 for non-decls. 5485 54862021-02-17 Xi Ruoyao <xry111@mengyan1223.wang> 5487 5488 PR target/98491 5489 * config/mips/mips.c (mips_symbol_insns): Do not use 5490 MSA_SUPPORTED_MODE_P if mode is MAX_MACHINE_MODE. 5491 54922021-02-16 Vladimir N. Makarov <vmakarov@redhat.com> 5493 5494 PR inline-asm/98096 5495 * stmt.c (resolve_operand_name_1): Take inout operands into account 5496 for access to labels by names. 5497 * doc/extend.texi: Describe counting operands for accessing labels. 5498 54992021-02-16 Richard Biener <rguenther@suse.de> 5500 5501 PR tree-optimization/38474 5502 * tree-ssa-structalias.c (variable_info::address_taken): New. 5503 (new_var_info): Initialize address_taken. 5504 (process_constraint): Set address_taken. 5505 (solve_constraints): Use the new address_taken flag rather 5506 than is_reg_var for sorting variables. 5507 (dump_constraint): Dump the variable number if the name 5508 is just NULL. 5509 55102021-02-16 Jakub Jelinek <jakub@redhat.com> 5511 5512 PR target/99100 5513 * tree-vect-stmts.c (vectorizable_simd_clone_call): For num_calls != 1 5514 multiply by 4096 and for inbranch by 8192. 5515 * config/i386/i386.c (ix86_simd_clone_usable): For TARGET_AVX512F, 5516 return 3, 2 or 1 for mangle letters 'b', 'c' or 'd'. 5517 55182021-02-15 Maya Rashish <coypu@sdf.org> 5519 5520 * config/aarch64/aarch64.c (aarch64_init_builtins): 5521 Call SUBTARGET_INIT_BUILTINS. 5522 55232021-02-15 Peter Bergner <bergner@linux.ibm.com> 5524 5525 PR rtl-optimization/98872 5526 * init-regs.c (initialize_uninitialized_regs): Skip initialization 5527 if CONST0_RTX is NULL. 5528 55292021-02-15 Richard Sandiford <richard.sandiford@arm.com> 5530 5531 PR rtl-optimization/98863 5532 * rtl-ssa/functions.h (function_info::bb_live_out_info): Delete. 5533 (function_info::build_info): Turn into a declaration, moving the 5534 definition to internals.h. 5535 (function_info::bb_walker): Declare. 5536 (function_info::create_reg_use): Likewise. 5537 (function_info::calculate_potential_phi_regs): Take a build_info 5538 parameter. 5539 (function_info::place_phis, function_info::create_ebbs): Declare. 5540 (function_info::calculate_ebb_live_in_for_debug): Likewise. 5541 (function_info::populate_backedge_phis): Delete. 5542 (function_info::start_block, function_info::end_block): Declare. 5543 (function_info::populate_phi_inputs): Delete. 5544 (function_info::m_potential_phi_regs): Move information to build_info. 5545 * rtl-ssa/internals.h: New file. 5546 (function_info::bb_phi_info): New class. 5547 (function_info::build_info): Moved from functions.h. 5548 Add a constructor and destructor. 5549 (function_info::build_info::ebb_use): Delete. 5550 (function_info::build_info::ebb_def): Likewise. 5551 (function_info::build_info::bb_live_out): Likewise. 5552 (function_info::build_info::tmp_ebb_live_in_for_debug): New variable. 5553 (function_info::build_info::potential_phi_regs): Likewise. 5554 (function_info::build_info::potential_phi_regs_for_debug): Likewise. 5555 (function_info::build_info::ebb_def_regs): Likewise. 5556 (function_info::build_info::bb_phis): Likewise. 5557 (function_info::build_info::bb_mem_live_out): Likewise. 5558 (function_info::build_info::bb_to_rpo): Likewise. 5559 (function_info::build_info::def_stack): Likewise. 5560 (function_info::build_info::old_def_stack_limit): Likewise. 5561 * rtl-ssa/internals.inl (function_info::build_info::record_reg_def): 5562 Remove the regno argument. Push the previous definition onto the 5563 definition stack where necessary. 5564 * rtl-ssa/accesses.cc: Include internals.h. 5565 * rtl-ssa/changes.cc: Likewise. 5566 * rtl-ssa/blocks.cc: Likewise. 5567 (function_info::build_info::build_info): Define. 5568 (function_info::build_info::~build_info): Likewise. 5569 (function_info::bb_walker): New class. 5570 (function_info::bb_walker::bb_walker): Define. 5571 (function_info::add_live_out_use): Convert a logarithmic-complexity 5572 test into a linear one. Allow the same definition to be passed 5573 multiple times. 5574 (function_info::calculate_potential_phi_regs): Moved from 5575 functions.cc. Take a build_info parameter and store the 5576 information there instead. 5577 (function_info::place_phis): New function. 5578 (function_info::add_entry_block_defs): Update call to record_reg_def. 5579 (function_info::calculate_ebb_live_in_for_debug): New function. 5580 (function_info::add_phi_nodes): Use bb_phis to decide which 5581 registers need phi nodes and initialize ebb_def_regs accordingly. 5582 Do not add degenerate phis here. 5583 (function_info::add_artificial_accesses): Use create_reg_use. 5584 Assert that all definitions are listed in the DF LR sets. 5585 Update call to record_reg_def. 5586 (function_info::record_block_live_out): Record live-out register 5587 values in the phis of successor blocks. Use the live-out set 5588 when processing the last block in an EBB, instead of always 5589 using the live-in sets of successor blocks. AND the live sets 5590 with the set of registers that have been defined in the EBB, 5591 rather than with all potential phi registers. Cope correctly 5592 with branches back to the start of the current EBB. 5593 (function_info::start_block): New function. 5594 (function_info::end_block): Likewise. 5595 (function_info::populate_phi_inputs): Likewise. 5596 (function_info::create_ebbs): Likewise. 5597 (function_info::process_all_blocks): Rewrite into a multi-phase 5598 process. 5599 * rtl-ssa/functions.cc: Include internals.h. 5600 (function_info::calculate_potential_phi_regs): Move to blocks.cc. 5601 (function_info::init_function_data): Remove caller. 5602 * rtl-ssa/insns.cc: Include internals.h 5603 (function_info::create_reg_use): New function. Lazily any 5604 degenerate phis needed by the linear RPO view. 5605 (function_info::record_use): Use create_reg_use. When processing 5606 debug uses, use potential_phi_regs and test it before checking 5607 whether the register is live on entry to the current EBB. Lazily 5608 calculate ebb_live_in_for_debug. 5609 (function_info::record_call_clobbers): Update call to record_reg_def. 5610 (function_info::record_def): Likewise. 5611 56122021-02-15 Martin Liska <mliska@suse.cz> 5613 5614 * toplev.c (init_asm_output): Free output of 5615 gen_command_line_string function. 5616 (process_options): Likewise. 5617 56182021-02-15 Martin Liska <mliska@suse.cz> 5619 5620 * params.opt: Add 2 missing Param keywords. 5621 56222021-02-15 Eric Botcazou <ebotcazou@adacore.com> 5623 5624 * df-core.c (df_worklist_dataflow_doublequeue): Use proper cast. 5625 56262021-02-15 Jakub Jelinek <jakub@redhat.com> 5627 5628 PR tree-optimization/99079 5629 * match.pd (A % (pow2pcst << N) -> A & ((pow2pcst << N) - 1)): Remove 5630 useless tree_nop_conversion_p (type, TREE_TYPE (@3)) check. Instead 5631 require both type and TREE_TYPE (@1) to be integral types and either 5632 type having smaller or equal precision, or TREE_TYPE (@1) being 5633 unsigned type, or type being signed type. If TREE_TYPE (@1) 5634 doesn't have wrapping overflow, perform the subtraction of one in 5635 unsigned type. 5636 56372021-02-14 Jan Hubicka <hubicka@ucw.cz> 5638 Richard Biener <rguether@suse.de> 5639 5640 PR ipa/97346 5641 * ipa-reference.c (ipa_init): Only conditinally initialize 5642 reference_vars_to_consider. 5643 (propagate): Conditionally deninitialize reference_vars_to_consider. 5644 (ipa_reference_write_optimization_summary): Sanity check that 5645 reference_vars_to_consider is not allocated. 5646 56472021-02-13 Levy Hsu <admin@levyhsu.com> 5648 5649 PR target/97417 5650 * config/riscv/riscv-shorten-memrefs.c (pass_shorten_memrefs): Add 5651 extend parameter to get_si_mem_base_reg declaration. 5652 (get_si_mem_base_reg): Add extend parameter. Set it. 5653 (analyze): Pass extend arg to get_si_mem_base_reg. 5654 (transform): Likewise. Use it when rewriting mems. 5655 * config/riscv/riscv.c (riscv_legitimize_move): Check for subword 5656 loads and emit sign/zero extending load followed by subreg move. 5657 56582021-02-13 Jim Wilson <jimw@sifive.com> 5659 5660 PR target/97417 5661 * config/riscv/riscv.c (riscv_compressed_lw_address_p): Drop early 5662 exit when !reload_completed. Only perform check for compressed reg 5663 if reload_completed. 5664 (riscv_rtx_costs): In MEM case, when optimizing for size and 5665 shorten memrefs, if not compressible, then increase cost. 5666 56672021-02-13 Jakub Jelinek <jakub@redhat.com> 5668 5669 PR rtl-optimization/98439 5670 * recog.c (pass_split_before_regstack::gate): Enable even when 5671 pass_split_before_sched2 is enabled if -fselective-scheduling2 is 5672 on. 5673 56742021-02-13 Jakub Jelinek <jakub@redhat.com> 5675 5676 PR target/96166 5677 * config/i386/mmx.md (*mmx_pshufd_1): Add a combine splitter for 5678 swap of V2SImode elements in memory into DImode memory rotate by 32. 5679 56802021-02-12 Martin Sebor <msebor@redhat.com> 5681 5682 * tree-pretty-print.c (print_generic_expr_to_str): Update comment. 5683 56842021-02-12 Richard Sandiford <richard.sandiford@arm.com> 5685 5686 * rtl-ssa/accesses.cc (function_info::make_use_available): Use 5687 m_temp_obstack rather than m_obstack to allocate the temporary use. 5688 56892021-02-12 Richard Sandiford <richard.sandiford@arm.com> 5690 5691 * df-problems.c (df_lr_bb_local_compute): Treat partial definitions 5692 as read-modify operations. 5693 56942021-02-12 Richard Biener <rguenther@suse.de> 5695 5696 PR middle-end/38474 5697 * ipa-fnsummary.c (unmodified_parm_1): Only walk when 5698 fbi->aa_walk_budget is bigger than zero. Update 5699 fbi->aa_walk_budget. 5700 (param_change_prob): Likewise. 5701 * ipa-prop.c (detect_type_change_from_memory_writes): 5702 Properly account walk_aliased_vdefs. 5703 (parm_preserved_before_stmt_p): Canonicalize updates. 5704 (parm_ref_data_preserved_p): Likewise. 5705 (parm_ref_data_pass_through_p): Likewise. 5706 (determine_known_aggregate_parts): Account own alias queries. 5707 57082021-02-12 Martin Liska <mliska@suse.cz> 5709 5710 * opts-common.c (decode_cmdline_option): Release werror_arg. 5711 * opts.c (gen_producer_string): Release output of 5712 gen_command_line_string. 5713 57142021-02-12 Richard Biener <rguenther@suse.de> 5715 5716 PR tree-optimization/38474 5717 * params.opt (-param=max-store-chains-to-track=): New param. 5718 (-param=max-stores-to-track=): Likewise. 5719 * doc/invoke.texi (max-store-chains-to-track): Document. 5720 (max-stores-to-track): Likewise. 5721 * gimple-ssa-store-merging.c (pass_store_merging::m_n_chains): 5722 New. 5723 (pass_store_merging::m_n_stores): Likewise. 5724 (pass_store_merging::terminate_and_process_chain): Update 5725 m_n_stores and m_n_chains. 5726 (pass_store_merging::process_store): Likewise. Terminate 5727 oldest chains if the number of stores or chains get too large. 5728 (imm_store_chain_info::terminate_and_process_chain): Dump 5729 chain length. 5730 57312021-02-11 Eric Botcazou <ebotcazou@adacore.com> 5732 5733 * config/i386/winnt.c (i386_pe_seh_unwind_emit): When switching to 5734 the cold section, emit a nop before the directive if the previous 5735 active instruction can throw. 5736 57372021-02-11 Peter Bergner <bergner@linux.ibm.com> 5738 5739 PR target/99041 5740 * config/rs6000/predicates.md (mma_assemble_input_operand): Restrict 5741 memory addresses that are legal for quad word accesses. 5742 57432021-02-11 Andrea Corallo <andrea.corallo@arm.com> 5744 5745 PR target/98931 5746 * config/arm/thumb2.md (*doloop_end_internal): Generate 5747 alternative sequence to handle long range branches. 5748 57492021-02-11 Joel Hutton <joel.hutton@arm.com> 5750 5751 PR tree-optimization/98772 5752 * optabs-tree.c (supportable_half_widening_operation): New function 5753 to check for supportable V8QI->V8HI widening patterns. 5754 * optabs-tree.h (supportable_half_widening_operation): New function. 5755 * tree-vect-stmts.c (vect_create_half_widening_stmts): New function 5756 to create promotion stmts for V8QI->V8HI widening patterns. 5757 (vectorizable_conversion): Add case for V8QI->V8HI. 5758 57592021-02-11 Richard Biener <rguenther@suse.de> 5760 5761 * sparseset.h (SPARSESET_ELT_BITS): Remove. 5762 (SPARSESET_ELT_TYPE): Use unsigned int. 5763 * fwprop.c: Do not include sparseset.h. 5764 57652021-02-10 Jakub Jelinek <jakub@redhat.com> 5766 5767 PR c++/99035 5768 * varasm.c (declare_weak): For -fsyntax-only, allow even 5769 TREE_ASM_WRITTEN function decls. 5770 57712021-02-10 Jakub Jelinek <jakub@redhat.com> 5772 5773 PR target/99025 5774 * config/i386/sse.md (fix<fixunssuffix>_truncv2sfv2di2, 5775 <insn>v8qiv8hi2, <insn>v8qiv8si2, <insn>v4qiv4si2, <insn>v4hiv4si2, 5776 <insn>v8qiv8di2, <insn>v4qiv4di2, <insn>v2qiv2di2, <insn>v4hiv4di2, 5777 <insn>v2hiv2di2, <insn>v2siv2di2): Force operands[1] into REG before 5778 calling simplify_gen_subreg on it. 5779 57802021-02-10 Martin Liska <mliska@suse.cz> 5781 5782 * config/nvptx/nvptx.c (nvptx_option_override): Use 5783 flag_patchable_function_entry instead of the removed 5784 function_entry_patch_area_size. 5785 57862021-02-10 Martin Liska <mliska@suse.cz> 5787 5788 PR tree-optimization/99002 5789 PR tree-optimization/99026 5790 * gimple-if-to-switch.cc (if_chain::is_beneficial): Fix memory 5791 leak when adjacent cases are merged. 5792 * tree-switch-conversion.c (switch_decision_tree::analyze_switch_statement): Use 5793 release_clusters. 5794 (make_pass_lower_switch): Remove trailing whitespace. 5795 * tree-switch-conversion.h (release_clusters): New. 5796 57972021-02-10 Richard Biener <rguenther@suse.de> 5798 5799 PR rtl-optimization/99054 5800 * cfgrtl.c (rtl-optimization/99054): Return an auto_vec. 5801 (fixup_partitions): Adjust. 5802 (rtl_verify_edges): Likewise. 5803 58042021-02-10 Jakub Jelinek <jakub@redhat.com> 5805 5806 PR middle-end/99007 5807 * gimplify.c (gimplify_scan_omp_clauses): For MEM_REF on reductions, 5808 temporarily disable gimplify_ctxp->into_ssa around gimplify_expr 5809 calls. 5810 58112021-02-10 Richard Biener <rguenther@suse.de> 5812 5813 PR ipa/99029 5814 * ipa-pure-const.c (propagate_malloc): Use an auto_vec<> 5815 for callees. 5816 58172021-02-10 Richard Biener <rguenther@suse.de> 5818 5819 PR tree-optimization/99024 5820 * tree-vect-loop.c (_loop_vec_info::~_loop_vec_info): Only 5821 clear loop->aux if it is associated with the destroyed loop_vinfo. 5822 58232021-02-10 Martin Liska <mliska@suse.cz> 5824 5825 PR tree-optimization/99002 5826 * gimple-if-to-switch.cc (find_conditions): Fix memory leak 5827 in the function. 5828 58292021-02-10 Martin Liska <mliska@suse.cz> 5830 5831 PR ipa/99003 5832 * ipa-icf.c (sem_item::add_reference): Fix memory leak when 5833 a reference exists. 5834 58352021-02-10 Jakub Jelinek <jakub@redhat.com> 5836 5837 PR debug/98755 5838 * dwarf2out.c (prune_unused_types_walk): Mark DW_TAG_variable DIEs 5839 at class scope for DWARF5+. 5840 58412021-02-09 Eric Botcazou <ebotcazou@adacore.com> 5842 5843 PR rtl-optimization/96015 5844 * reorg.c (skip_consecutive_labels): Minor comment tweaks. 5845 (relax_delay_slots): When deleting a jump to the next active 5846 instruction over a barrier, first delete the barrier if the 5847 jump is the only way to reach the target label. 5848 58492021-02-09 Andre Vieira <andre.simoesdiasvieira@arm.com> 5850 5851 * config/aarch64/aarch64-cost-tables.h: Add entries for vect.mul. 5852 * config/aarch64/aarch64.c (aarch64_rtx_mult_cost): Use vect.mul for 5853 vector multiplies and vect.alu for SSRA. 5854 * config/arm/aarch-common-protos.h (struct vector_cost_table): Define 5855 vect.mul cost field. 5856 * config/arm/aarch-cost-tables.h: Add entries for vect.mul. 5857 * config/arm/arm.c: Likewise. 5858 58592021-02-09 Richard Biener <rguenther@suse.de> 5860 5861 PR tree-optimization/98863 5862 * tree-ssa-sccvn.h (vn_avail::next_undo): Add. 5863 * tree-ssa-sccvn.c (last_pushed_avail): New global. 5864 (rpo_elim::eliminate_push_avail): Chain pushed avails. 5865 (unwind_state::avail_top): Add. 5866 (do_unwind): Rewrite unwinding of avail entries. 5867 (do_rpo_vn): Initialize last_pushed_avail and 5868 avail_top of the undo state. 5869 58702021-02-09 Jakub Jelinek <jakub@redhat.com> 5871 5872 PR middle-end/99004 5873 * calls.c (maybe_warn_rdwr_sizes): Change s0 and s1 type from 5874 const char * to char * and free those pointers after use. 5875 58762021-02-09 Richard Biener <rguenther@suse.de> 5877 5878 PR tree-optimization/99017 5879 * tree-vect-slp.c (vect_bb_vectorization_profitable_p): Allow 5880 zero vector cost entries. 5881 58822021-02-08 Andre Vieira <andre.simoesdiasvieira@arm.com> 5883 5884 PR middle-end/98974 5885 * tree-vect-stmts.c (vectorizable_condition): Remove shadow vec_num 5886 parameter in vectorizable_condition. 5887 58882021-02-08 Richard Biener <rguenther@suse.de> 5889 5890 PR lto/96591 5891 * tree.c (walk_tree_1): Walk VECTOR_CST elements. 5892 58932021-02-08 Martin Liska <mliska@suse.cz> 5894 5895 PR lto/98971 5896 * cfgexpand.c (pass_expand::execute): Parse per-function option 5897 flag_patchable_function_entry and use it. 5898 * common.opt: Remove function_entry_patch_area_size and 5899 function_entry_patch_area_start global variables. 5900 * opts.c (parse_and_check_patch_area): New function. 5901 (common_handle_option): Use it. 5902 * opts.h (parse_and_check_patch_area): New function. 5903 * toplev.c (process_options): Parse and use 5904 function_entry_patch_area_size. 5905 59062021-02-08 Martin Sebor <msebor@redhat.com> 5907 5908 * doc/extend.texi (attribute malloc): Correct typos. 5909 59102021-02-05 Nathan Sidwell <nathan@acm.org> 5911 5912 PR driver/98943 5913 * gcc.c (driver::maybe_run_linker): Check for input file 5914 accessibility if not linking. 5915 59162021-02-05 Richard Biener <rguenther@suse.de> 5917 5918 PR tree-optimization/98855 5919 * tree-vectorizer.h (add_stmt_cost): New overload. 5920 * tree-vect-slp.c (li_cost_vec_cmp): New. 5921 (vect_bb_slp_scalar_cost): Cost individual loop regions 5922 separately. Account for the scalar instance root stmt. 5923 59242021-02-05 Tom de Vries <tdevries@suse.de> 5925 5926 PR debug/98656 5927 * tree-switch-conversion.c (jump_table_cluster::emit): Add loc 5928 argument. 5929 (bit_test_cluster::emit): Reuse location_t for newly created 5930 gswitch statement. 5931 (switch_decision_tree::try_switch_expansion): Preserve 5932 location_t. 5933 * tree-switch-conversion.h: Change function signatures. 5934 59352021-02-05 Jakub Jelinek <jakub@redhat.com> 5936 5937 PR target/98957 5938 * config/i386/i386-options.c (m_NONE, m_ALL): Define. 5939 * config/i386/x86-tune.def (X86_TUNE_BRANCH_PREDICTION_HINTS, 5940 X86_TUNE_PROMOTE_QI_REGS): Use m_NONE instead of 0U. 5941 (X86_TUNE_QIMODE_MATH): Use m_ALL instead of ~0U. 5942 59432021-02-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 5944 5945 * config/aarch64/aarch64-simd-builtins.def (get_high): Define builtin. 5946 * config/aarch64/aarch64-simd.md (aarch64_get_high<mode>): Define. 5947 * config/aarch64/arm_neon.h (__GET_HIGH): Delete. 5948 (vget_high_f16): Reimplement using new builtin. 5949 (vget_high_f32): Likewise. 5950 (vget_high_f64): Likewise. 5951 (vget_high_p8): Likewise. 5952 (vget_high_p16): Likewise. 5953 (vget_high_p64): Likewise. 5954 (vget_high_s8): Likewise. 5955 (vget_high_s16): Likewise. 5956 (vget_high_s32): Likewise. 5957 (vget_high_s64): Likewise. 5958 (vget_high_u8): Likewise. 5959 (vget_high_u16): Likewise. 5960 (vget_high_u32): Likewise. 5961 (vget_high_u64): Likewise. 5962 59632021-02-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 5964 5965 * config/aarch64/aarch64-simd-builtins.def (get_low): Define builtin. 5966 * config/aarch64/aarch64-simd.md (aarch64_get_low<mode>): Define. 5967 * config/aarch64/arm_neon.h (__GET_LOW): Delete. 5968 (vget_low_f16): Reimplement using new builtin. 5969 (vget_low_f32): Likewise. 5970 (vget_low_f64): Likewise. 5971 (vget_low_p8): Likewise. 5972 (vget_low_p16): Likewise. 5973 (vget_low_p64): Likewise. 5974 (vget_low_s8): Likewise. 5975 (vget_low_s16): Likewise. 5976 (vget_low_s32): Likewise. 5977 (vget_low_s64): Likewise. 5978 (vget_low_u8): Likewise. 5979 (vget_low_u16): Likewise. 5980 (vget_low_u32): Likewise. 5981 (vget_low_u64): Likewise. 5982 59832021-02-05 Kito Cheng <kito.cheng@sifive.com> 5984 5985 * gcc.c (print_multilib_info): Check all required argument is provided 5986 by default arg. 5987 59882021-02-05 liuhongt <hongtao.liu@intel.com> 5989 5990 PR target/98537 5991 * config/i386/i386-expand.c (ix86_expand_sse_cmp): Don't 5992 generate integer mask comparison for 128/256-bits vector when 5993 op_true/op_false is NULL_RTX or CONSTM1_RTX/CONST0_RTX. Also 5994 delete redundant !maskcmp condition. 5995 (ix86_expand_int_vec_cmp): Ditto but no redundant deletion 5996 here. 5997 (ix86_expand_sse_movcc): Delete definition of maskcmp, add the 5998 condition directly to if (maskcmp), add extra check for 5999 cmpmode, it should be MODE_INT. 6000 (ix86_expand_fp_vec_cmp): Pass NULL to ix86_expand_sse_cmp's 6001 parameters op_true/op_false. 6002 (ix86_use_mask_cmp_p): New. 6003 60042021-02-05 liuhongt <hongtao.liu@intel.com> 6005 6006 PR target/98172 6007 * config/i386/x86-tune.def (X86_TUNE_AVX256_UNALIGNED_LOAD_OPTIMAL): 6008 Remove m_GENERIC from ~list. 6009 (X86_TUNE_AVX256_UNALIGNED_STORE_OPTIMAL): Ditto. 6010 60112021-02-04 David Malcolm <dmalcolm@redhat.com> 6012 6013 PR c/97932 6014 * diagnostic-show-locus.c (compatible_locations_p): Require 6015 locations in the same macro map to be either both from the 6016 macro definition, or both from the macro arguments. 6017 60182021-02-04 Jonathan Wright <jonathan.wright@arm.com> 6019 6020 * config/aarch64/aarch64-simd-builtins.def: Add 6021 [su]mull_hi_lane[q] builtin generator macros. 6022 * config/aarch64/aarch64-simd.md 6023 (aarch64_<su>mull_hi_lane<mode>_insn): Define. 6024 (aarch64_<su>mull_hi_lane<mode>): Define. 6025 (aarch64_<su>mull_hi_laneq<mode>_insn): Define. 6026 (aarch64_<su>mull_hi_laneq<mode>): Define. 6027 * config/aarch64/arm_neon.h (vmull_high_lane_s16): Use RTL 6028 builtin instead of inline asm. 6029 (vmull_high_lane_s32): Likewise. 6030 (vmull_high_lane_u16): Likewise. 6031 (vmull_high_lane_u32): Likewise. 6032 (vmull_high_laneq_s16): Likewise. 6033 (vmull_high_laneq_s32): Likewise. 6034 (vmull_high_laneq_u16): Likewise. 6035 (vmull_high_laneq_u32): Liekwise. 6036 60372021-02-04 Jonathan Wright <jonathan.wright@arm.com> 6038 6039 * config/aarch64/aarch64-simd-builtins.def: Add [su]mull_hi_n 6040 builtin generator macros. 6041 * config/aarch64/aarch64-simd.md 6042 (aarch64_<su>mull_hi_n<mode>_insn): Define. 6043 (aarch64_<su>mull_hi_n<mode>): Define. 6044 * config/aarch64/arm_neon.h (vmull_high_n_s16): Use RTL builtin 6045 instead of inline asm. 6046 (vmull_high_n_s32): Likewise. 6047 (vmull_high_n_u16): Likewise. 6048 (vmull_high_n_u32): Likewise. 6049 60502021-02-04 Richard Biener <rguenther@suse.de> 6051 6052 PR tree-optimization/98855 6053 * tree-vect-loop.c (vectorizable_phi): Do not cost 6054 single-argument PHIs. 6055 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Likewise. 6056 * tree-vect-stmts.c (vectorizable_bswap): Also perform 6057 costing for SLP operation. 6058 60592021-02-04 Martin Liska <mliska@suse.cz> 6060 6061 * doc/extend.texi: Mention -mprefer-vector-width in target 6062 attributes. 6063 60642021-02-03 Martin Sebor <msebor@redhat.com> 6065 6066 PR tree-optimization/98937 6067 * tree-ssa-strlen.c (strlen_dom_walker::~strlen_dom_walker): Define. 6068 Flush pointer_query cache. 6069 60702021-02-03 Aaron Sawdey <acsawdey@linux.ibm.com> 6071 6072 * config/rs6000/genfusion.pl (gen_2logical): Add missing 6073 fixes based on patch review. 6074 * config/rs6000/fusion.md: Regenerate file. 6075 60762021-02-03 Aaron Sawdey <acsawdey@linux.ibm.com> 6077 6078 * config/rs6000/t-rs6000: Comment out auto generation of 6079 fusion.md for now. 6080 60812021-02-03 Andrew Stubbs <ams@codesourcery.com> 6082 6083 * config/gcn/gcn-opts.h (enum processor_type): Add PROCESSOR_GFX908. 6084 * config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): Add gfx908. 6085 (output_file_start): Add gfx908. 6086 * config/gcn/gcn.opt (gpu_type): Add gfx908. 6087 * config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Add march=gfx908. 6088 (MULTILIB_DIRNAMES): Add gfx908. 6089 * config/gcn/mkoffload.c (EF_AMDGPU_MACH_AMDGCN_GFX908): New define. 6090 (main): Recognize gfx908. 6091 * config/gcn/t-omp-device: Add gfx908. 6092 60932021-02-03 Jonathan Wright <jonathan.wright@arm.com> 6094 6095 * config/aarch64/aarch64-simd-builtins.def: Add 6096 [su]mlsl_hi_lane[q] builtin macro generators. 6097 * config/aarch64/aarch64-simd.md 6098 (aarch64_<su>mlsl_hi_lane<mode>_insn): Define. 6099 (aarch64_<su>mlsl_hi_lane<mode>): Define. 6100 (aarch64_<su>mlsl_hi_laneq<mode>_insn): Define. 6101 (aarch64_<su>mlsl_hi_laneq<mode>): Define. 6102 * config/aarch64/arm_neon.h (vmlsl_high_lane_s16): Use RTL 6103 builtin instead of inline asm. 6104 (vmlsl_high_lane_s32): Likewise. 6105 (vmlsl_high_lane_u16): Likewise. 6106 (vmlsl_high_lane_u32): Likewise. 6107 (vmlsl_high_laneq_s16): Likewise. 6108 (vmlsl_high_laneq_s32): Likewise. 6109 (vmlsl_high_laneq_u16): Likewise. 6110 (vmlsl_high_laneq_u32): Likewise. 6111 (vmlal_high_laneq_u32): Likewise. 6112 61132021-02-03 Jonathan Wright <jonathan.wright@arm.com> 6114 6115 * config/aarch64/aarch64-simd-builtins.def: Add 6116 [su]mlal_hi_lane[q] builtin generator macros. 6117 * config/aarch64/aarch64-simd.md 6118 (aarch64_<su>mlal_hi_lane<mode>_insn): Define. 6119 (aarch64_<su>mlal_hi_lane<mode>): Define. 6120 (aarch64_<su>mlal_hi_laneq<mode>_insn): Define. 6121 (aarch64_<su>mlal_hi_laneq<mode>): Define. 6122 * config/aarch64/arm_neon.h (vmlal_high_lane_s16): Use RTL 6123 builtin instead of inline asm. 6124 (vmlal_high_lane_s32): Likewise. 6125 (vmlal_high_lane_u16): Likewise. 6126 (vmlal_high_lane_u32): Likewise. 6127 (vmlal_high_laneq_s16): Likewise. 6128 (vmlal_high_laneq_s32): Likewise. 6129 (vmlal_high_laneq_u16): Likewise. 6130 (vmlal_high_laneq_u32): Likewise. 6131 61322021-02-03 Jonathan Wright <jonathan.wright@arm.com> 6133 6134 * config/aarch64/aarch64-simd-builtins.def: Add [su]mlsl_hi_n 6135 builtin generator macros. 6136 * config/aarch64/aarch64-simd.md (aarch64_<su>mlsl_hi_n<mode>_insn): 6137 Define. 6138 (aarch64_<su>mlsl_hi_n<mode>): Define. 6139 * config/aarch64/arm_neon.h (vmlsl_high_n_s16): Use RTL builtin 6140 instead of inline asm. 6141 (vmlsl_high_n_s32): Likewise. 6142 (vmlsl_high_n_u16): Likewise. 6143 (vmlsl_high_n_u32): Likewise. 6144 61452021-02-03 Jonathan Wright <jonathan.wright@arm.com> 6146 6147 * config/aarch64/aarch64-simd-builtins.def: Add [su]mlal_hi_n 6148 builtin generator macros. 6149 * config/aarch64/aarch64-simd.md (aarch64_<su>mlal_hi_n<mode>_insn): 6150 Define. 6151 (aarch64_<su>mlal_hi_n<mode>): Define. 6152 * config/aarch64/arm_neon.h (vmlal_high_n_s16): Use RTL builtin 6153 instead of inline asm. 6154 (vmlal_high_n_s32): Likewise. 6155 (vmlal_high_n_u16): Likewise. 6156 (vmlal_high_n_u32): Likewise. 6157 61582021-02-03 Jonathan Wright <jonathan.wright@arm.com> 6159 6160 * config/aarch64/aarch64-simd-builtins.def: Add RTL builtin 6161 generator macros. 6162 * config/aarch64/aarch64-simd.md (*aarch64_<su>mlal_hi<mode>): 6163 Rename to... 6164 (aarch64_<su>mlal_hi<mode>_insn): This. 6165 (aarch64_<su>mlal_hi<mode>): Define. 6166 * config/aarch64/arm_neon.h (vmlal_high_s8): Use RTL builtin 6167 instead of inline asm. 6168 (vmlal_high_s16): Likewise. 6169 (vmlal_high_s32): Likewise. 6170 (vmlal_high_u8): Likewise. 6171 (vmlal_high_u16): Likewise. 6172 (vmlal_high_u32): Likewise. 6173 61742021-02-03 Ilya Leoshkevich <iii@linux.ibm.com> 6175 6176 * lra-spills.c (remove_pseudos): Call lra_update_insn_recog_data() 6177 after calling alter_subreg() on a (mem). 6178 61792021-02-03 Martin Liska <mliska@suse.cz> 6180 6181 PR lto/98912 6182 * lto-streamer-out.c (produce_lto_section): Fill up missing 6183 padding. 6184 * lto-streamer.h (struct lto_section): Add _padding field. 6185 61862021-02-03 Richard Biener <rguenther@suse.de> 6187 6188 * lto-streamer.c (lto_get_section_name): Free temporary 6189 buffer. 6190 * tree-loop-distribution.c 6191 (loop_distribution::merge_dep_scc_partitions): Free edge data. 6192 61932021-02-03 Jakub Jelinek <jakub@redhat.com> 6194 6195 PR middle-end/97487 6196 * ifcvt.c (noce_can_force_operand): New function. 6197 (noce_emit_move_insn): Use it. 6198 (noce_try_sign_mask): Likewise. Formatting fix. 6199 62002021-02-03 Jakub Jelinek <jakub@redhat.com> 6201 6202 PR middle-end/97971 6203 * lra-constraints.c (process_alt_operands): For inline asm, don't call 6204 fatal_insn, but instead return false. 6205 62062021-02-03 Jakub Jelinek <jakub@redhat.com> 6207 6208 PR tree-optimization/98287 6209 * config/i386/mmx.md (<insn><mode>3): For shifts don't enable expander 6210 for V1DImode. 6211 62122021-02-03 Tamar Christina <tamar.christina@arm.com> 6213 6214 PR tree-optimization/98928 6215 * tree-vect-loop.c (vect_analyze_loop_2): Change 6216 STMT_VINFO_SLP_VECT_ONLY to STMT_VINFO_SLP_VECT_ONLY_PATTERN. 6217 * tree-vect-slp-patterns.c (complex_pattern::build): Likewise. 6218 * tree-vectorizer.h (STMT_VINFO_SLP_VECT_ONLY_PATTERN): New. 6219 (class _stmt_vec_info): Add slp_vect_pattern_only_p. 6220 62212021-02-02 Richard Biener <rguenther@suse.de> 6222 6223 * gimple-loop-interchange.cc (prepare_data_references): 6224 Release vectors. 6225 * gimple-loop-jam.c (tree_loop_unroll_and_jam): Likewise. 6226 * tree-ssa-loop-im.c (hoist_memory_references): Likewise. 6227 * tree-vect-stmts.c (vectorizable_condition): Do not 6228 allocate vectors. 6229 (vectorizable_comparison): Likewise. 6230 62312021-02-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 6232 6233 * config/aarch64/aarch64-simd-builtins.def (ursqrte): Define builtin. 6234 * config/aarch64/aarch64-simd.md (aarch64_ursqrte<mode>): New pattern. 6235 * config/aarch64/arm_neon.h (vrsqrte_u32): Reimplement using builtin. 6236 (vrsqrteq_u32): Likewise. 6237 62382021-02-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 6239 6240 * config/aarch64/aarch64-simd-builtins.def (sqxtun2): Define builtin. 6241 * config/aarch64/aarch64-simd.md (aarch64_sqxtun2<mode>_le): Define. 6242 (aarch64_sqxtun2<mode>_be): Likewise. 6243 (aarch64_sqxtun2<mode>): Likewise. 6244 * config/aarch64/arm_neon.h (vqmovun_high_s16): Reimplement using builtin. 6245 (vqmovun_high_s32): Likewise. 6246 (vqmovun_high_s64): Likewise. 6247 * config/aarch64/iterators.md (UNSPEC_SQXTUN2): Define. 6248 62492021-02-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 6250 6251 * config/aarch64/aarch64-simd-builtins.def (bfdot_lane, bfdot_laneq): Use 6252 AUTO_FP flags. 6253 (bfmlalb_lane, bfmlalt_lane, bfmlalb_lane_q, bfmlalt_lane_q): Use FP flags. 6254 62552021-02-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 6256 6257 * config/aarch64/aarch64-simd-builtins.def (fcmla_lane0, fcmla_lane90, 6258 fcmla_lane180, fcmla_lane270, fcmlaq_lane0, fcmlaq_lane90, fcmlaq_lane180, 6259 fcmlaq_lane270, scvtf, ucvtf, fcvtzs, fcvtzu, scvtfsi, scvtfdi, ucvtfsi, 6260 ucvtfdi, fcvtzshf, fcvtzuhf, fmlal_lane_low, fmlsl_lane_low, 6261 fmlal_laneq_low, fmlsl_laneq_low, fmlalq_lane_low, fmlslq_lane_low, 6262 fmlalq_laneq_low, fmlslq_laneq_low, fmlal_lane_high, fmlsl_lane_high, 6263 fmlal_laneq_high, fmlsl_laneq_high, fmlalq_lane_high, fmlslq_lane_high, 6264 fmlalq_laneq_high, fmlslq_laneq_high): Use FP flags. 6265 62662021-02-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 6267 6268 * config/aarch64/aarch64-builtins.c (FLAG_LOAD): Define. 6269 * config/aarch64/aarch64-simd-builtins.def (ld1x2, ld2, ld3, ld4, ld2r, 6270 ld3r, ld4r, ld1, ld1x3, ld1x4): Use LOAD flags. 6271 62722021-02-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 6273 6274 * config/aarch64/aarch64-simd-builtins.def (combine, zip1, zip2, 6275 uzp1, uzp2, trn1, trn2, simd_bsl): Use AUTO_FP flags. 6276 62772021-02-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 6278 6279 * config/aarch64/aarch64-simd-builtins.def (clrsb, clz, ctz, popcount, 6280 vec_smult_lane_, vec_smlal_lane_, vec_smult_laneq_, vec_smlal_laneq_, 6281 vec_umult_lane_, vec_umlal_lane_, vec_umult_laneq_, vec_umlal_laneq_, 6282 ashl, sshl, ushl, srshl, urshl, sdot_lane, udot_lane, sdot_laneq, 6283 udot_laneq, usdot_lane, usdot_laneq, sudot_lane, sudot_laneq, ashr, 6284 ashr_simd, lshr, lshr_simd, srshr_n, urshr_n, ssra_n, usra_n, srsra_n, 6285 ursra_n, sshll_n, ushll_n, sshll2_n, ushll2_n, ssri_n, usri_n, ssli_n, 6286 ssli_n, usli_n, bswap, rbit, simd_bsl, eor3q, rax1q, xarq, bcaxq): Use 6287 NONE builtin flags. 6288 62892021-02-02 Jakub Jelinek <jakub@redhat.com> 6290 6291 PR tree-optimization/98848 6292 * tree-vect-patterns.c (vect_recog_over_widening_pattern): Punt if 6293 STMT_VINFO_DEF_TYPE (last_stmt_info) is vect_reduction_def. 6294 62952021-02-02 Kito Cheng <kito.cheng@sifive.com> 6296 6297 PR target/98743 6298 * expr.c: Check mode before calling store_expr. 6299 63002021-02-02 Christophe Lyon <christophe.lyon@linaro.org> 6301 6302 * config/arm/iterators.md (supf): Remove VORNQ_S and VORNQ_U. 6303 (VORNQ): Remove. 6304 * config/arm/mve.md (mve_vornq_s<mode>): New entry for vorn 6305 instruction using expression ior. 6306 (mve_vornq_u<mode>): New expander. 6307 (mve_vornq_f<mode>): Use ior code instead of unspec. 6308 * config/arm/unspecs.md (VORNQ_S, VORNQ_U, VORNQ_F): Remove. 6309 63102021-02-02 Alexandre Oliva <oliva@adacore.com> 6311 6312 * tree-nested.c (convert_nonlocal_reference_op): Move 6313 current_function_decl restore after re-gimplification. 6314 (convert_local_reference_op): Likewise. 6315 63162021-02-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 6317 6318 * config/aarch64/aarch64-simd-builtins.def (rshrn, rshrn2): 6319 Define builtins. 6320 * config/aarch64/aarch64-simd.md (aarch64_rshrn<mode>_insn_le): 6321 Define. 6322 (aarch64_rshrn<mode>_insn_be): Likewise. 6323 (aarch64_rshrn<mode>): Likewise. 6324 (aarch64_rshrn2<mode>_insn_le): Likewise. 6325 (aarch64_rshrn2<mode>_insn_be): Likewise. 6326 (aarch64_rshrn2<mode>): Likewise. 6327 * config/aarch64/aarch64.md (unspec): Add UNSPEC_RSHRN. 6328 * config/aarch64/arm_neon.h (vrshrn_high_n_s16): Reimplement 6329 using builtin. 6330 (vrshrn_high_n_s32): Likewise. 6331 (vrshrn_high_n_s64): Likewise. 6332 (vrshrn_high_n_u16): Likewise. 6333 (vrshrn_high_n_u32): Likewise. 6334 (vrshrn_high_n_u64): Likewise. 6335 (vrshrn_n_s16): Likewise. 6336 (vrshrn_n_s32): Likewise. 6337 (vrshrn_n_s64): Likewise. 6338 (vrshrn_n_u16): Likewise. 6339 (vrshrn_n_u32): Likewise. 6340 (vrshrn_n_u64): Likewise. 6341 63422021-02-01 Sergei Trofimovich <siarheit@google.com> 6343 6344 PR tree-optimization/98499 6345 * ipa-modref.c (analyze_ssa_name_flags): treat RVO 6346 conservatively and assume all possible side-effects. 6347 63482021-02-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 6349 6350 * config/aarch64/aarch64-simd-builtins.def (vec_unpacks_hi, 6351 vec_unpacku_hi_): Define builtins. 6352 * config/aarch64/arm_neon.h (vmovl_high_s8): Reimplement using 6353 builtin. 6354 (vmovl_high_s16): Likewise. 6355 (vmovl_high_s32): Likewise. 6356 (vmovl_high_u8): Likewise. 6357 (vmovl_high_u16): Likewise. 6358 (vmovl_high_u32): Likewise. 6359 63602021-02-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 6361 6362 * config/aarch64/aarch64-simd-builtins.def (sabdl, uabdl): 6363 Define builtins. 6364 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl<mode>): New 6365 pattern. 6366 * config/aarch64/aarch64.md (unspec): Define UNSPEC_SABDL, 6367 UNSPEC_UABDL. 6368 * config/aarch64/arm_neon.h (vabdl_s8): Reimplemet using 6369 builtin. 6370 (vabdl_s16): Likewise. 6371 (vabdl_s32): Likewise. 6372 (vabdl_u8): Likewise. 6373 (vabdl_u16): Likewise. 6374 (vabdl_u32): Likewise. 6375 * config/aarch64/iterators.md (ABDL): New int iterator. 6376 (sur): Handle UNSPEC_SABDL, UNSPEC_UABDL. 6377 63782021-02-01 Martin Sebor <msebor@redhat.com> 6379 6380 * tree.h (BLOCK_VARS): Add comment. 6381 (BLOCK_SUBBLOCKS): Same. 6382 (BLOCK_SUPERCONTEXT): Same. 6383 (BLOCK_ABSTRACT_ORIGIN): Same. 6384 (inlined_function_outer_scope_p): Same. 6385 63862021-02-01 Martin Sebor <msebor@redhat.com> 6387 6388 PR middle-end/97172 6389 * attribs.c (attr_access::free_lang_data): Define new function. 6390 * attribs.h (attr_access::free_lang_data): Declare new function. 6391 63922021-02-01 Richard Biener <rguenther@suse.de> 6393 6394 * vec.h (auto_vec::auto_vec): Add memory stat parameters 6395 and pass them on. 6396 * bitmap.h (auto_bitmap::auto_bitmap): Likewise. 6397 63982021-02-01 Tamar Christina <tamar.christina@arm.com> 6399 6400 * config/aarch64/aarch64-simd.md (aarch64_<su>mlal_n<mode>, 6401 aarch64_<su>mlsl<mode>, aarch64_<su>mlsl_n<mode>): Flip mult operands. 6402 64032021-02-01 Richard Biener <rguenther@suse.de> 6404 6405 PR rtl-optimization/98863 6406 * config/i386/i386-features.c (convert_scalars_to_vector): 6407 Set DF_RD_PRUNE_DEAD_DEFS. 6408 64092021-01-31 Eric Botcazou <ebotcazou@adacore.com> 6410 6411 * system.h (SIZE_MAX): Define if not already defined. 6412 64132021-01-30 Aaron Sawdey <acsawdey@linux.ibm.com> 6414 6415 * config/rs6000/genfusion.pl (gen_2logical): New function to 6416 generate patterns for logical-logical fusion. 6417 * config/rs6000/fusion.md: Regenerated patterns. 6418 * config/rs6000/rs6000-cpus.def: Add 6419 OPTION_MASK_P10_FUSION_2LOGICAL. 6420 * config/rs6000/rs6000.c (rs6000_option_override_internal): 6421 Enable logical-logical fusion for p10. 6422 * config/rs6000/rs6000.opt: Add -mpower10-fusion-2logical. 6423 64242021-01-30 David Edelsohn <dje.gcc@gmail.com> 6425 6426 * config/rs6000/rs6000.opt: Add periods to new AIX options. 6427 64282021-01-30 David Edelsohn <dje.gcc@gmail.com> 6429 6430 * config/rs6000/rs6000.opt (mabi=vec-extabi): New. 6431 (mabi=vec-default): New. 6432 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define 6433 __EXTABI__ for AIX Vector extended ABI. 6434 * config/rs6000/rs6000.c (rs6000_debug_reg_global): Print AIX Vector 6435 extabi info. 6436 (conditional_register_usage): If AIX vec_extabi enabled, vs20-vs31 6437 are non-volatile. 6438 * doc/invoke.texi (PowerPC mabi): Add AIX vec-extabi and vec-default. 6439 64402021-01-30 Jakub Jelinek <jakub@redhat.com> 6441 6442 * config/i386/i386-features.c (remove_partial_avx_dependency): Clear 6443 DF_DEFER_INSN_RESCAN after calling df_process_deferred_rescans. 6444 64452021-01-29 Vladimir N. Makarov <vmakarov@redhat.com> 6446 6447 PR target/97701 6448 * lra-constraints.c (in_class_p): Don't narrow class only for REG 6449 or MEM. 6450 64512021-01-29 Will Schmidt <will_schmidt@vnet.ibm.com> 6452 6453 * config/rs6000/rs6000-call.c (rs6000_expand_binup_builtin): Add 6454 clauses for CODE_FOR_vsx_xvcvuxddp_scale and 6455 CODE_FOR_vsx_xvcvsxddp_scale to the parameter checking code. 6456 64572021-01-29 Andrew MacLeod <amacleod@redhat.com> 6458 6459 PR tree-optimization/98866 6460 * gimple-range-gori.h (gori_compute:set_range_invariant): New. 6461 * gimple-range-gori.cc (gori_map::set_range_invariant): New. 6462 (gori_map::m_maybe_invariant): Rename from all_outgoing. 6463 (gori_map::gori_map): Rename all_outgoing to m_maybe_invariant. 6464 (gori_map::is_export_p): Ditto. 6465 (gori_map::calculate_gori): Ditto. 6466 (gori_compute::set_range_invariant): New. 6467 * gimple-range.cc (gimple_ranger::range_of_stmt): Set range 6468 invariant for pointers evaluating to [1, +INF]. 6469 64702021-01-29 Richard Biener <rguenther@suse.de> 6471 6472 PR rtl-optimization/98863 6473 * config/i386/i386-features.c (remove_partial_avx_dependency): 6474 Do not perform DF analysis. 6475 (pass_data_remove_partial_avx_dependency): Remove 6476 TODO_df_finish. 6477 64782021-01-29 Jonathan Wright <jonathan.wright@arm.com> 6479 6480 * config/aarch64/aarch64-simd-builtins.def: Add [su]mull_n 6481 builtin generator macros. 6482 * config/aarch64/aarch64-simd.md (aarch64_<su>mull_n<mode>): 6483 Define. 6484 * config/aarch64/arm_neon.h (vmull_n_s16): Use RTL builtin 6485 instead of inline asm. 6486 (vmull_n_s32): Likewise. 6487 (vmull_n_u16): Likewise. 6488 (vmull_n_u32): Likewise. 6489 64902021-01-29 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 6491 6492 * config/aarch64/aarch64-simd-builtins.def (sabdl2, uabdl2): 6493 Define builtins. 6494 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl2<mode>_3): 6495 Rename to... 6496 (aarch64_<sur>abdl2<mode>): ... This. 6497 (<sur>sadv16qi): Adjust use of above. 6498 * config/aarch64/arm_neon.h (vabdl_high_s8): Reimplement using 6499 builtin. 6500 (vabdl_high_s16): Likewise. 6501 (vabdl_high_s32): Likewise. 6502 (vabdl_high_u8): Likewise. 6503 (vabdl_high_u16): Likewise. 6504 (vabdl_high_u32): Likewise. 6505 65062021-01-29 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 6507 6508 * config/aarch64/aarch64-simd-builtins.def (sabal2): Define 6509 builtin. 6510 (uabal2): Likewise. 6511 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal2<mode>): New 6512 pattern. 6513 * config/aarch64/aarch64.md (unspec): Add UNSPEC_SABAL2 and 6514 UNSPEC_UABAL2. 6515 * config/aarch64/arm_neon.h (vabal_high_s8): Reimplement using 6516 builtin. 6517 (vabal_high_s16): Likewise. 6518 (vabal_high_s32): Likewise. 6519 (vabal_high_u8): Likewise. 6520 (vabal_high_u16): Likewise. 6521 (vabal_high_u32): Likewise. 6522 * config/aarch64/iterators.md (ABAL2): New mode iterator. 6523 (sur): Handle UNSPEC_SABAL2, UNSPEC_UABAL2. 6524 65252021-01-29 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 6526 6527 * config/aarch64/aarch64-simd-builtins.def (sabal): Define 6528 builtin. 6529 (uabal): Likewise. 6530 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal<mode>_4): 6531 Rename to... 6532 (aarch64_<sur>abal<mode>): ... This 6533 (<sur>sadv16qi): Adust use of the above. 6534 * config/aarch64/arm_neon.h (vabal_s8): Reimplement using 6535 builtin. 6536 (vabal_s16): Likewise. 6537 (vabal_s32): Likewise. 6538 (vabal_u8): Likewise. 6539 (vabal_u16): Likewise. 6540 (vabal_u32): Likewise. 6541 65422021-01-29 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 6543 6544 * config/aarch64/aarch64-simd-builtins.def (saddlv, uaddlv): 6545 Define builtins. 6546 * config/aarch64/aarch64-simd.md (aarch64_<su>addlv<mode>): 6547 Define. 6548 * config/aarch64/arm_neon.h (vaddlv_s8): Reimplement using 6549 builtin. 6550 (vaddlv_s16): Likewise. 6551 (vaddlv_u8): Likewise. 6552 (vaddlv_u16): Likewise. 6553 (vaddlvq_s8): Likewise. 6554 (vaddlvq_s16): Likewise. 6555 (vaddlvq_s32): Likewise. 6556 (vaddlvq_u8): Likewise. 6557 (vaddlvq_u16): Likewise. 6558 (vaddlvq_u32): Likewise. 6559 (vaddlv_s32): Likewise. 6560 (vaddlv_u32): Likewise. 6561 * config/aarch64/iterators.md (VDQV_L): New mode iterator. 6562 (unspec): Add UNSPEC_SADDLV, UNSPEC_UADDLV. 6563 (Vwstype): New mode attribute. 6564 (Vwsuf): Likewise. 6565 (VWIDE_S): Likewise. 6566 (USADDLV): New int iterator. 6567 (su): Handle UNSPEC_SADDLV, UNSPEC_UADDLV. 6568 65692021-01-29 Jonathan Wright <jonathan.wright@arm.com> 6570 6571 * config/aarch64/aarch64-simd-builtins.def: Add [su]mlsl_lane[q] 6572 builtin generator macros. 6573 * config/aarch64/aarch64-simd.md (aarch64_vec_<su>mlsl_lane<Qlane>): 6574 Define. 6575 * config/aarch64/arm_neon.h (vmlsl_lane_s16): Use RTL builtin 6576 instead of inline asm. 6577 (vmlsl_lane_s32): Likewise. 6578 (vmlsl_lane_u16): Likewise. 6579 (vmlsl_lane_u32): Likewise. 6580 (vmlsl_laneq_s16): Likewise. 6581 (vmlsl_laneq_s32): Likewise. 6582 (vmlsl_laneq_u16): Likewise. 6583 (vmlsl_laneq_u32): Likewise. 6584 65852021-01-29 Richard Biener <rguenther@suse.de> 6586 6587 * doc/invoke.texi (--param max-gcse-memory): Document unit 6588 of size. 6589 * gcse.c (gcse_or_cprop_is_too_expensive): Adjust. 6590 * params.opt (--param max-gcse-memory): Adjust default and 6591 document unit of size. 6592 65932021-01-29 Richard Biener <rguenther@suse.de> 6594 6595 PR rtl-optimization/98863 6596 * gcse.c (gcse_or_cprop_is_too_expensive): Use unsigned 6597 HOST_WIDE_INT for the memory estimate. 6598 65992021-01-29 Bin Cheng <bin.cheng@linux.alibaba.com> 6600 Richard Biener <rguenther@suse.de> 6601 6602 PR tree-optimization/97627 6603 * tree-ssa-loop-niter.c (number_of_iterations_exit_assumptions): 6604 Do not analyze fake edges. 6605 66062021-01-29 Richard Biener <rguenther@suse.de> 6607 6608 PR rtl-optimization/98144 6609 * df.h (df_mir_bb_info): Add con_visited member. 6610 * df-problems.c (df_mir_alloc): Initialize con_visited, 6611 do not fully populate IN and OUT. 6612 (df_mir_reset): Likewise. 6613 (df_mir_confluence_0): Set con_visited. 6614 (df_mir_confluence_n): Properly handle implicitely 6615 fully populated IN and OUT as designated by con_visited 6616 and update con_visited accordingly. 6617 66182021-01-29 Jakub Jelinek <jakub@redhat.com> 6619 6620 PR target/98849 6621 * config/arm/vec-common.md (mve_vshlq_<supf><mode>, 6622 vashl<mode>3, vashr<mode>3, vlshr<mode>3): Add 6623 && !TARGET_REALLY_IWMMXT to conditions. 6624 66252021-01-29 Jakub Jelinek <jakub@redhat.com> 6626 6627 PR debug/98331 6628 * cfgbuild.c (find_bb_boundaries): Reset debug_insn when seeing 6629 a BARRIER. 6630 66312021-01-28 Marek Polacek <polacek@redhat.com> 6632 6633 PR c++/94775 6634 * stor-layout.c (finalize_type_size): If we reset TYPE_USER_ALIGN in 6635 the main variant, maybe reset it in its variants too. 6636 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match. 6637 (check_aligned_type): Check if TYPE_USER_ALIGN match. 6638 66392021-01-28 Christophe Lyon <christophe.lyon@linaro.org> 6640 6641 PR target/98730 6642 * config/arm/arm.c (arm_rtx_costs_internal): Adjust cost of vector 6643 of constant zero for comparisons. 6644 66452021-01-28 Michael Meissner <meissner@linux.ibm.com> 6646 6647 * config/rs6000/rs6000.c (rs6000_mangle_decl_assembler_name): Add 6648 support for mapping built-in function names for long double 6649 built-in functions if long double is IEEE 128-bit. 6650 66512021-01-28 Jonathan Wright <jonathan.wright@arm.com> 6652 6653 * config/aarch64/aarch64-simd-builtins.def: Add [su]mlsl_n 6654 builtin generator macros. 6655 * config/aarch64/aarch64-simd.md (aarch64_<su>mlsl_n<mode>): 6656 Define. 6657 * config/aarch64/arm_neon.h (vmlsl_n_s16): Use RTL builtin 6658 instead of inline asm. 6659 (vmlsl_n_s32): Likewise. 6660 (vmlsl_n_u16): Likewise. 6661 (vmlsl_n_u32): Likewise. 6662 66632021-01-28 Jonathan Wright <jonathan.wright@arm.com> 6664 6665 * config/aarch64/aarch64-simd-builtins.def: Add [su]mlal_n 6666 builtin generator macros. 6667 * config/aarch64/aarch64-simd.md (aarch64_<su>mlal_n<mode>): 6668 Define. 6669 * config/aarch64/arm_neon.h (vmlal_n_s16): Use RTL builtin 6670 instead of inline asm. 6671 (vmlal_n_s32): Likewise. 6672 (vmlal_n_u16): Likewise. 6673 (vmlal_n_u32): Likewise. 6674 66752021-01-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 6676 6677 * config/aarch64/aarch64-simd-builtins.def (shrn2): Define 6678 builtin. 6679 * config/aarch64/aarch64-simd.md (aarch64_shrn2<mode>_insn_le): 6680 Define. 6681 (aarch64_shrn2<mode>_insn_be): Likewise. 6682 (aarch64_shrn2<mode>): Likewise. 6683 * config/aarch64/arm_neon.h (vshrn_high_n_s16): Reimlplement 6684 using builtins. 6685 (vshrn_high_n_s32): Likewise. 6686 (vshrn_high_n_s64): Likewise. 6687 (vshrn_high_n_u16): Likewise. 6688 (vshrn_high_n_u32): Likewise. 6689 (vshrn_high_n_u64): Likewise. 6690 66912021-01-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 6692 6693 * config/aarch64/aarch64-simd-builtins.def (shrn): Define 6694 builtin. 6695 * config/aarch64/aarch64-simd.md (aarch64_shrn<mode>_insn_le): 6696 Define. 6697 (aarch64_shrn<mode>_insn_be): Likewise. 6698 (aarch64_shrn<mode>): Likewise. 6699 * config/aarch64/arm_neon.h (vshrn_n_s16): Reimplement using 6700 builtins. 6701 (vshrn_n_s32): Likewise. 6702 (vshrn_n_s64): Likewise. 6703 (vshrn_n_u16): Likewise. 6704 (vshrn_n_u32): Likewise. 6705 (vshrn_n_u64): Likewise. 6706 * config/aarch64/iterators.md (vn_mode): New mode attribute. 6707 67082021-01-28 Richard Biener <rguenther@suse.de> 6709 6710 PR rtl-optimization/80960 6711 * dse.c (check_mem_read_rtx): Call get_addr on the 6712 offsetted address. 6713 67142021-01-28 Xionghu Luo <luoxhu@linux.ibm.com> 6715 David Edelsohn <dje.gcc@gmail.com> 6716 6717 PR target/98799 6718 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): 6719 Don't generate VIEW_CONVERT_EXPR for fcode ALTIVEC_BUILTIN_VEC_INSERT 6720 when -m32. 6721 * config/rs6000/rs6000-protos.h (rs6000_expand_vector_set_var): 6722 Delete. 6723 * config/rs6000/rs6000.c (rs6000_expand_vector_set): Remove the 6724 wrapper call rs6000_expand_vector_set_var for cleanup. Call 6725 rs6000_expand_vector_set_var_p9 and rs6000_expand_vector_set_var_p8 6726 directly. 6727 (rs6000_expand_vector_set_var): Delete. 6728 (rs6000_expand_vector_set_var_p9): Make static. 6729 (rs6000_expand_vector_set_var_p8): Make static. 6730 67312021-01-28 Xing GUO <higuoxing@gmail.com> 6732 6733 * common/config/riscv/riscv-common.c 6734 (riscv_subset_list::parsing_subset_version): Fix -march option parsing 6735 when `p` extension exists. 6736 67372021-01-27 Vladimir N. Makarov <vmakarov@redhat.com> 6738 6739 PR rtl-optimization/97684 6740 * ira.c (ira): Call ira_set_pseudo_classes before 6741 update_equiv_regs when it is necessary. 6742 67432021-01-27 Jakub Jelinek <jakub@redhat.com> 6744 6745 PR target/98853 6746 * config/aarch64/aarch64.md (*aarch64_bfxilsi_uxtw): Use 6747 %w0, %w1 and %2 instead of %0, %1 and %2. 6748 67492021-01-27 Aaron Sawdey <acsawdey@linux.ibm.com> 6750 6751 * config/rs6000/genfusion.pl: New script to generate 6752 define_insn_and_split patterns so combine can arrange fused 6753 instructions next to each other. 6754 * config/rs6000/fusion.md: New file, generated fused instruction 6755 patterns for combine. 6756 * config/rs6000/predicates.md (const_m1_to_1_operand): New predicate. 6757 (non_update_memory_operand): New predicate. 6758 * config/rs6000/rs6000-cpus.def: Add OPTION_MASK_P10_FUSION and 6759 OPTION_MASK_P10_FUSION_LD_CMPI to ISA_3_1_MASKS_SERVER and 6760 POWERPC_MASKS. 6761 * config/rs6000/rs6000-protos.h (address_is_non_pfx_d_or_x): Add 6762 prototype. 6763 * config/rs6000/rs6000.c (rs6000_option_override_internal): 6764 Automatically set OPTION_MASK_P10_FUSION and 6765 OPTION_MASK_P10_FUSION_LD_CMPI if target is power10. 6766 (rs600_opt_masks): Allow -mpower10-fusion 6767 in function attributes. 6768 (address_is_non_pfx_d_or_x): New function. 6769 * config/rs6000/rs6000.h: Add MASK_P10_FUSION. 6770 * config/rs6000/rs6000.md: Include fusion.md. 6771 * config/rs6000/rs6000.opt: Add -mpower10-fusion 6772 and -mpower10-fusion-ld-cmpi. 6773 * config/rs6000/t-rs6000: Add dependencies involving fusion.md. 6774 67752021-01-27 Jonathan Wright <jonathan.wright@arm.com> 6776 6777 * config/aarch64/aarch64-simd-builtins.def: Add [su]mlal 6778 builtin generator macros. 6779 * config/aarch64/aarch64-simd.md (*aarch64_<su>mlal<mode>): 6780 Rename to... 6781 (aarch64_<su>mlal<mode>): This. 6782 * config/aarch64/arm_neon.h (vmlal_s8): Use RTL builtin 6783 instead of inline asm. 6784 (vmlal_s16): Likewise. 6785 (vmlal_s32): Likewise. 6786 (vmlal_u8): Likewise. 6787 (vmlal_u16): Likewise. 6788 (vmlal_u32): Likewise. 6789 67902021-01-27 Richard Biener <rguenther@suse.de> 6791 6792 PR tree-optimization/98854 6793 * tree-vect-slp.c (vect_build_slp_tree_2): Also build 6794 PHIs from scalars when the number of CTORs matches the 6795 number of children. 6796 67972021-01-27 Jonathan Wright <jonathan.wright@arm.com> 6798 6799 * config/aarch64/aarch64-simd-builtins.def: Add mls_n builtin 6800 generator macro. 6801 * config/aarch64/aarch64-simd.md (*aarch64_mls_elt_merge<mode>): 6802 Rename to... 6803 (aarch64_mls_n<mode>): This. 6804 * config/aarch64/arm_neon.h (vmls_n_s16): Use RTL builtin 6805 instead of asm. 6806 (vmls_n_s32): Likewise. 6807 (vmls_n_u16): Likewise. 6808 (vmls_n_u32): Likewise. 6809 (vmlsq_n_s16): Likewise. 6810 (vmlsq_n_s32): Likewise. 6811 (vmlsq_n_u16): Likewise. 6812 (vmlsq_n_u32): Likewise. 6813 68142021-01-27 Jonathan Wright <jonathan.wright@arm.com> 6815 6816 * config/aarch64/aarch64-simd-builtins.def: Add mls builtin 6817 generator macro. 6818 * config/aarch64/arm_neon.h (vmls_s8): Use RTL builtin rather 6819 than asm. 6820 (vmls_s16): Likewise. 6821 (vmls_s32): Likewise. 6822 (vmls_u8): Likewise. 6823 (vmls_u16): Likewise. 6824 (vmls_u32): Likewise. 6825 (vmlsq_s8): Likewise. 6826 (vmlsq_s16): Likewise. 6827 (vmlsq_s32): Likewise. 6828 (vmlsq_u8): Likewise. 6829 (vmlsq_u16): Likewise. 6830 (vmlsq_u32): Likewise. 6831 68322021-01-27 Jonathan Wright <jonathan.wright@arm.com> 6833 6834 * config/aarch64/aarch64-simd-builtins.def: Add mla_n builtin 6835 generator macro. 6836 * config/aarch64/aarch64-simd.md (*aarch64_mla_elt_merge<mode>): 6837 Rename to... 6838 (aarch64_mla_n<mode>): This. 6839 * config/aarch64/arm_neon.h (vmla_n_s16): Use RTL builtin 6840 instead of asm. 6841 (vmla_n_s32): Likewise. 6842 (vmla_n_u16): Likewise. 6843 (vmla_n_u32): Likewise. 6844 (vmlaq_n_s16): Likewise. 6845 (vmlaq_n_s32): Likewise. 6846 (vmlaq_n_u16): Likewise. 6847 (vmlaq_n_u32): Likewise. 6848 68492021-01-27 liuhongt <hongtao.liu@intel.com> 6850 6851 PR target/98833 6852 * config/i386/sse.md (sse2_gt<mode>3): Drop !TARGET_XOP in condition. 6853 (*sse2_eq<mode>3): Ditto. 6854 68552021-01-27 Jakub Jelinek <jakub@redhat.com> 6856 6857 * tree-pass.h (PROP_trees): Rename to ... 6858 (PROP_gimple): ... this. 6859 * cfgexpand.c (pass_data_expand): Replace PROP_trees with PROP_gimple. 6860 * passes.c (execute_function_dump, execute_function_todo, 6861 execute_one_ipa_transform_pass, execute_one_pass): Likewise. 6862 * varpool.c (ctor_for_folding): Likewise. 6863 68642021-01-27 Jakub Jelinek <jakub@redhat.com> 6865 6866 PR tree-optimization/97260 6867 * varpool.c: Include tree-pass.h. 6868 (ctor_for_folding): In GENERIC return DECL_INITIAL for TREE_READONLY 6869 non-TREE_SIDE_EFFECTS automatic variables. 6870 68712021-01-26 Paul Fee <paul.f.fee@gmail.com> 6872 6873 * doc/cpp.texi (__cplusplus): Document value for -std=c++23 6874 or -std=gnu++23. 6875 * doc/invoke.texi: Document -std=c++23 and -std=gnu++23. 6876 * dwarf2out.c (highest_c_language): Recognise C++20 and C++23. 6877 (gen_compile_unit_die): Recognise C++23. 6878 68792021-01-26 Jakub Jelinek <jakub@redhat.com> 6880 6881 PR bootstrap/98839 6882 * dwarf2asm.c (dw2_assemble_integer): Cast DWARF2_ADDR_SIZE to int 6883 in comparison. 6884 68852021-01-26 Jakub Jelinek <jakub@redhat.com> 6886 6887 PR target/98681 6888 * config/aarch64/aarch64.c (aarch64_mask_and_shift_for_ubfiz_p): 6889 Use UINTVAL (shft_amnt) and UINTVAL (mask) instead of INTVAL (shft_amnt) 6890 and INTVAL (mask). Add && INTVAL (mask) > 0 condition. 6891 68922021-01-26 Richard Biener <rguenther@suse.de> 6893 6894 * gimple-pretty-print.c (dump_binary_rhs): Handle 6895 VEC_WIDEN_{PLUS,MINUS}_{LO,HI}_EXPR. 6896 68972021-01-26 Richard Biener <rguenther@suse.de> 6898 6899 PR middle-end/98726 6900 * tree.h (vector_cst_int_elt): Remove. 6901 * tree.c (vector_cst_int_elt): Use poly_wide_int for computations, 6902 make static. 6903 69042021-01-26 Andrew Stubbs <ams@codesourcery.com> 6905 6906 * config/gcn/gcn.c (gcn_expand_reduc_scalar): Use move instructions 6907 for V64DFmode min/max reductions. 6908 69092021-01-26 Jakub Jelinek <jakub@redhat.com> 6910 6911 * dwarf2asm.c (dw2_assemble_integer): Handle size twice as large 6912 as DWARF2_ADDR_SIZE if x is not a scalar int by emitting it as 6913 two halves, one with x and the other with const0_rtx, ordered 6914 depending on endianity. 6915 69162021-01-26 Alexandre Oliva <oliva@adacore.com> 6917 6918 * gimplify.c (gimplify_decl_expr): Skip asan marking calls for 6919 temporaries not seen in binding block, and not about to be 6920 added as gimple variables. 6921 69222021-01-25 Martin Sebor <msebor@redhat.com> 6923 6924 PR c++/98646 6925 * tree-ssa-ccp.c (pass_post_ipa_warn::execute): Adjust warning text. 6926 69272021-01-25 Martin Liska <mliska@suse.cz> 6928 6929 * value-prof.c (get_nth_most_common_value): Use %s instead 6930 of %qs string. 6931 69322021-01-25 Jakub Jelinek <jakub@redhat.com> 6933 6934 PR debug/98811 6935 * configure.ac (HAVE_AS_GDWARF_5_DEBUG_FLAG): Only define if 6936 readelf -wi is able to read the emitted .debug_info back. 6937 * configure: Regenerated. 6938 69392021-01-25 Martin Liska <mliska@suse.cz> 6940 6941 PR gcov-profile/98739 6942 * common.opt: Add missing sign symbol. 6943 * value-prof.c (get_nth_most_common_value): Restore handling 6944 of PROFILE_REPRODUCIBILITY_PARALLEL_RUNS and 6945 PROFILE_REPRODUCIBILITY_MULTITHREADED. 6946 69472021-01-25 Richard Biener <rguenther@suse.de> 6948 6949 PR middle-end/98807 6950 * tree.c (vector_element_bits): Always use precision of 6951 the element type for boolean vectors. 6952 69532021-01-25 Sebastian Huber <sebastian.huber@embedded-brains.de> 6954 6955 * config/rtems.h (STARTFILE_SPEC): Remove qnolinkcmds. 6956 (ENDFILE_SPEC): Evaluate qnolinkcmds. 6957 69582021-01-25 Sebastian Huber <sebastian.huber@embedded-brains.de> 6959 6960 * config/rtems.h (STARTFILE_SPEC): Remove nostdlib and 6961 nostartfiles handling since this is already done by 6962 LINK_COMMAND_SPEC. Evaluate qnolinkcmds. 6963 (ENDFILE_SPEC): Remove nostdlib and nostartfiles handling since this 6964 is already done by LINK_COMMAND_SPEC. 6965 (LIB_SPECS): Remove nostdlib and nodefaultlibs handling since 6966 this is already done by LINK_COMMAND_SPEC. Remove qnolinkcmds 6967 evaluation. 6968 69692021-01-25 Jakub Jelinek <jakub@redhat.com> 6970 6971 PR testsuite/98771 6972 * fold-const-call.c (host_size_t_cst_p): Renamed to ... 6973 (size_t_cst_p): ... this. Check and store unsigned HOST_WIDE_INT 6974 value rather than host size_t. 6975 (fold_const_call): Change type of s2 from size_t to 6976 unsigned HOST_WIDE_INT. Use size_t_cst_p instead of 6977 host_size_t_cst_p. For strncmp calls, pass MIN (s2, SIZE_MAX) 6978 instead of s2 as last argument. 6979 69802021-01-25 Tamar Christina <tamar.christina@arm.com> 6981 6982 * config/arm/iterators.md (rotsplit1, rotsplit2, conj_op, fcmac1, 6983 VCMLA_OP, VCMUL_OP): New. 6984 * config/arm/mve.md (mve_vcmlaq<mve_rot><mode>): Support vec_dup 0. 6985 * config/arm/neon.md (cmul<conj_op><mode>3): New. 6986 * config/arm/unspecs.md (UNSPEC_VCMLA_CONJ, UNSPEC_VCMLA180_CONJ, 6987 UNSPEC_VCMUL_CONJ): New. 6988 * config/arm/vec-common.md (cmul<conj_op><mode>3, arm_vcmla<rot><mode>, 6989 cml<fcmac1><conj_op><mode>4): New. 6990 69912021-01-23 Jakub Jelinek <jakub@redhat.com> 6992 6993 PR testsuite/97301 6994 * config/rs6000/mmintrin.h (__m64): Add __may_alias__ attribute. 6995 69962021-01-22 Jonathan Wright <jonathan.wright@arm.com> 6997 6998 * config/aarch64/aarch64-simd-builtins.def: Add mla builtin 6999 generator macro. 7000 * config/aarch64/arm_neon.h (vmla_s8): Use RTL builtin rather 7001 than asm. 7002 (vmla_s16): Likewise. 7003 (vmla_s32): Likewise. 7004 (vmla_u8): Likewise. 7005 (vmla_u16): Likewise. 7006 (vmla_u32): Likewise. 7007 (vmlaq_s8): Likewise. 7008 (vmlaq_s16): Likewise. 7009 (vmlaq_s32): Likewise. 7010 (vmlaq_u8): Likewise. 7011 (vmlaq_u16): Likewise. 7012 (vmlaq_u32): Likewise. 7013 70142021-01-22 David Malcolm <dmalcolm@redhat.com> 7015 7016 * doc/invoke.texi (GCC_EXTRA_DIAGNOSTIC_OUTPUT): Add @findex 7017 directive. 7018 70192021-01-22 Jakub Jelinek <jakub@redhat.com> 7020 7021 PR debug/98796 7022 * dwarf2out.c (output_file_names): For -gdwarf-5, if there are no 7023 filenames to emit, still emit the required 0 index directory and 7024 filename entries that match DW_AT_comp_dir and DW_AT_name of the 7025 compilation unit. 7026 70272021-01-22 Marek Polacek <polacek@redhat.com> 7028 7029 PR c++/98545 7030 * doc/invoke.texi: Update C++ ABI Version 15 description. 7031 70322021-01-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 7033 7034 PR tree-optimization/98766 7035 * tree-ssa-math-opts.c (convert_mult_to_fma): Use maybe_le when 7036 comparing against type size with param_avoid_fma_max_bits. 7037 70382021-01-22 Richard Biener <rguenther@suse.de> 7039 7040 PR middle-end/98793 7041 * tree.c (vector_element_bits): Key single-bit bool vector on 7042 integer mode rather than not vector mode. 7043 70442021-01-22 Xionghu Luo <luoxhu@linux.ibm.com> 7045 7046 PR target/98093 7047 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): 7048 Generate ARRAY_REF(VIEW_CONVERT_EXPR) for P8 and later 7049 platforms. 7050 * config/rs6000/rs6000.c (rs6000_expand_vector_set_var): Update 7051 to call different path for P8 and P9. 7052 (rs6000_expand_vector_set_var_p9): New function. 7053 (rs6000_expand_vector_set_var_p8): New function. 7054 70552021-01-22 Xionghu Luo <luoxhu@linux.ibm.com> 7056 7057 PR target/79251 7058 PR target/98065 7059 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): 7060 Ajdust variable index vec_insert from address dereference to 7061 ARRAY_REF(VIEW_CONVERT_EXPR) tree expression. 7062 * config/rs6000/rs6000-protos.h (rs6000_expand_vector_set_var): 7063 New declaration. 7064 * config/rs6000/rs6000.c (rs6000_expand_vector_set_var): New function. 7065 70662021-01-22 Martin Liska <mliska@suse.cz> 7067 7068 PR gcov-profile/98739 7069 * profile.c (compute_value_histograms): Drop time profile for 7070 -fprofile-reproducible=multithreaded. 7071 70722021-01-22 Nathan Sidwell <nathan@acm.org> 7073 7074 * gcc.c (process_command): Don't check OPT_SPECIAL_input_file 7075 existence here. 7076 70772021-01-22 Richard Biener <rguenther@suse.de> 7078 7079 PR middle-end/98773 7080 * tree-data-ref.c (initalize_matrix_A): Revert previous 7081 change, retaining failing on HOST_WIDE_INT_MIN CHREC_RIGHT. 7082 70832021-01-22 Jakub Jelinek <jakub@redhat.com> 7084 7085 PR tree-optimization/90248 7086 * match.pd (X cmp 0.0 ? 1.0 : -1.0 -> copysign(1, +-X), 7087 X cmp 0.0 ? -1.0 : +1.0 -> copysign(1, -+X)): Remove 7088 simplifications. 7089 (X * (X cmp 0.0 ? 1.0 : -1.0) -> +-abs(X), 7090 X * (X cmp 0.0 ? -1.0 : 1.0) -> +-abs(X)): New simplifications. 7091 70922021-01-22 Jakub Jelinek <jakub@redhat.com> 7093 7094 PR tree-optimization/98255 7095 * tree-dfa.c (get_ref_base_and_extent): For ARRAY_REFs, sign 7096 extend index - low_bound from sizetype's precision rather than index 7097 precision. 7098 (get_addr_base_and_unit_offset_1): Likewise. 7099 * tree-ssa-sccvn.c (ao_ref_init_from_vn_reference): Likewise. 7100 * gimple-fold.c (fold_const_aggregate_ref_1): Likewise. 7101 71022021-01-22 Richard Biener <rguenther@suse.de> 7103 7104 PR tree-optimization/98786 7105 * tree-ssa-phiopt.c (factor_out_conditional_conversion): Avoid 7106 adding new uses of abnormals. Verify we deal with a conditional 7107 conversion. 7108 71092021-01-22 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> 7110 7111 PR target/98636 7112 * optc-save-gen.awk: Add arm_fp16_format to checked_options. 7113 71142021-01-22 liuhongt <hongtao.liu@intel.com> 7115 7116 PR target/96891 7117 PR target/98348 7118 * config/i386/sse.md (VI_128_256): New mode iterator. 7119 (*avx_cmp<mode>3_1, *avx_cmp<mode>3_2, *avx_cmp<mode>3_3, 7120 *avx_cmp<mode>3_4, *avx2_eq<mode>3, *avx2_pcmp<mode>3_1, 7121 *avx2_pcmp<mode>3_2, *avx2_gt<mode>3): New 7122 define_insn_and_split to lower avx512 vector comparison to avx 7123 version when dest is vector. 7124 (*<avx512>_cmp<mode>3,*<avx512>_cmp<mode>3,*<avx512>_ucmp<mode>3): 7125 define_insn_and_split for negating the comparison result. 7126 * config/i386/predicates.md (float_vector_all_ones_operand): 7127 New predicate. 7128 * config/i386/i386-expand.c (ix86_expand_sse_movcc): Use 7129 general NOT operator without UNSPEC_MASKOP. 7130 71312021-01-21 Vladimir N. Makarov <vmakarov@redhat.com> 7132 7133 PR rtl-optimization/98777 7134 * lra-int.h (lra_pmode_pseudo): New extern. 7135 * lra.c (lra_pmode_pseudo): New global. 7136 (lra): Set it up. 7137 * lra-eliminations.c (eliminate_regs_in_insn): Use it. 7138 71392021-01-21 Ilya Leoshkevich <iii@linux.ibm.com> 7140 7141 * fwprop.c (fwprop_propagation::classify_result): Allow 7142 (subreg (mem)) simplifications. 7143 71442021-01-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 7145 7146 * config/aarch64/aarch64-simd.md (aarch64_sqdml<SBINQOPS:as>l<mode>): 7147 Split into... 7148 (aarch64_sqdmlal<mode>): ... This... 7149 (aarch64_sqdmlsl<mode>): ... And this. 7150 (aarch64_sqdml<SBINQOPS:as>l_lane<mode>): Split into... 7151 (aarch64_sqdmlal_lane<mode>): ... This... 7152 (aarch64_sqdmlsl_lane<mode>): ... And this. 7153 (aarch64_sqdml<SBINQOPS:as>l_laneq<mode>): Split into... 7154 (aarch64_sqdmlsl_laneq<mode>): ... This... 7155 (aarch64_sqdmlal_laneq<mode>): ... And this. 7156 (aarch64_sqdml<SBINQOPS:as>l_n<mode>): Split into... 7157 (aarch64_sqdmlsl_n<mode>): ... This... 7158 (aarch64_sqdmlal_n<mode>): ... And this. 7159 (aarch64_sqdml<SBINQOPS:as>l2<mode>_internal): Split into... 7160 (aarch64_sqdmlal2<mode>_internal): ... This... 7161 (aarch64_sqdmlsl2<mode>_internal): ... And this. 7162 71632021-01-21 Christophe Lyon <christophe.lyon@linaro.org> 7164 7165 * config/arm/arm_mve.h (__arm_vcmpneq_s8): Fix return type. 7166 71672021-01-21 Andrea Corallo <andrea.corallo@arm.com> 7168 7169 PR target/96372 7170 * doc/sourcebuild.texi (arm_thumb2_no_arm_v8_1_lob): Document. 7171 71722021-01-21 liuhongt <hongtao.liu@intel.com> 7173 7174 PR rtl-optimization/98694 7175 * regcprop.c (copy_value): If SRC had been assigned a mode 7176 narrower than the copy, we can't link DEST into the chain even 7177 they have same hard_regno_nregs(i.e. HImode/SImode in i386 7178 backend). 7179 71802021-01-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 7181 7182 * config/aarch64/aarch64-simd.md (aarch64_get_lane<mode>): 7183 Convert to define_insn_and_split. Split into simple move when moving 7184 bottom element. 7185 71862021-01-20 Segher Boessenkool <segher@kernel.crashing.org> 7187 7188 * config/rs6000/rs6000.c (rs6000_emit_le_vsx_store): Change assert. 7189 Adjust comment. Simplify code. 7190 71912021-01-20 Jakub Jelinek <jakub@redhat.com> 7192 7193 PR debug/98765 7194 * dwarf2out.c (reset_indirect_string): Also reset indirect strings 7195 with DW_FORM_line_strp form. 7196 (prune_unused_types_update_strings): Don't add into debug_str_hash 7197 indirect strings with DW_FORM_line_strp form. 7198 (adjust_name_comp_dir): New function. 7199 (dwarf2out_finish): Call it on CU DIEs after resetting 7200 debug_line_str_hash. 7201 72022021-01-20 Vladimir N. Makarov <vmakarov@redhat.com> 7203 7204 PR rtl-optimization/98722 7205 * lra-eliminations.c (eliminate_regs_in_insn): Check that target 7206 has no 3-op add insn to transform insns containing two pluses. 7207 72082021-01-20 Richard Biener <rguenther@suse.de> 7209 7210 * hwint.h (add_hwi): New function. 7211 (mul_hwi): Likewise. 7212 * tree-data-ref.c (initialize_matrix_A): Properly translate 7213 tree constants and avoid HOST_WIDE_INT_MIN. 7214 (lambda_matrix_row_add): Avoid undefined integer overflow 7215 and return true on such overflow. 7216 (lambda_matrix_right_hermite): Handle overflow from 7217 lambda_matrix_row_add gracefully. Simplify previous fix. 7218 (analyze_subscript_affine_affine): Likewise. 7219 72202021-01-20 Eugene Rozenfeld <erozen@microsoft.com> 7221 7222 PR tree-optimization/96674 7223 * match.pd: New patterns: x < y || y == XXX_MIN --> x <= y - 1 7224 x >= y && y != XXX_MIN --> x > y - 1 7225 72262021-01-20 Richard Sandiford <richard.sandiford@arm.com> 7227 7228 PR tree-optimization/98535 7229 * tree-vect-slp.c (duplicate_and_interleave): Use quick_grow_cleared. 7230 If the high and low permutes are the same, remove the high permutes 7231 from the working set and only continue with the low ones. 7232 72332021-01-20 Jakub Jelinek <jakub@redhat.com> 7234 7235 PR tree-optimization/98721 7236 * builtins.c (access_ref::inform_access): Don't assume 7237 SSA_NAME_IDENTIFIER must be non-NULL. Print messages about 7238 object whenever allocfn is NULL, rather than only when DECL_P 7239 is true. Use %qE instead of %qD for that. Formatting fixes. 7240 72412021-01-20 Richard Biener <rguenther@suse.de> 7242 7243 PR tree-optimization/98758 7244 * tree-data-ref.c (int_divides_p): Use lambda_int arguments. 7245 (lambda_matrix_right_hermite): Avoid undefinedness with 7246 signed integer abs and multiplication. 7247 (analyze_subscript_affine_affine): Use lambda_int. 7248 72492021-01-20 David Malcolm <dmalcolm@redhat.com> 7250 7251 PR debug/98751 7252 * dwarf2out.c (output_line_info): Rename static variable 7253 "generation", moving it out of the function to... 7254 (output_line_info_generation): New. 7255 (init_sections_and_labels): Likewise, renaming the variable to... 7256 (init_sections_and_labels_generation): New. 7257 (dwarf2out_c_finalize): Reset the new variables. 7258 72592021-01-19 Martin Sebor <msebor@redhat.com> 7260 7261 PR middle-end/98664 7262 * tree-ssa-live.c (remove_unused_scope_block_p): Keep scopes for 7263 all functions, even if they're not declared artificial or inline. 7264 * tree.c (tree_inlined_location): Use macro expansion location 7265 only if scope traversal fails to expose one. 7266 72672021-01-19 Richard Sandiford <richard.sandiford@arm.com> 7268 7269 PR rtl-optimization/92294 7270 * alias.c (compare_base_symbol_refs): Take an extra parameter 7271 and add the distance between two symbols to it. Enshrine in 7272 comments that -1 means "either 0 or 1, but we can't tell 7273 which at compile time". 7274 (memrefs_conflict_p): Update call accordingly. 7275 (rtx_equal_for_memref_p): Likewise. Take the distance between symbols 7276 into account. 7277 72782021-01-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 7279 7280 * config/aarch64/aarch64-simd-builtins.def (sqshl, uqshl, 7281 sqrshl, uqrshl, sqadd, uqadd, sqsub, uqsub, suqadd, usqadd, sqmovn, 7282 uqmovn, sqxtn2, uqxtn2, sqabs, sqneg, sqdmlal, sqdmlsl, sqdmlal_lane, 7283 sqdmlsl_lane, sqdmlal_laneq, sqdmlsl_laneq, sqdmlal_n, sqdmlsl_n, 7284 sqdmlal2, sqdmlsl2, sqdmlal2_lane, sqdmlsl2_lane, sqdmlal2_laneq, 7285 sqdmlsl2_laneq, sqdmlal2_n, sqdmlsl2_n, sqdmull, sqdmull_lane, 7286 sqdmull_laneq, sqdmull_n, sqdmull2, sqdmull2_lane, sqdmull2_laneq, 7287 sqdmull2_n, sqdmulh, sqrdmulh, sqdmulh_lane, sqdmulh_laneq, 7288 sqrdmulh_lane, sqrdmulh_laneq, sqshrun_n, sqrshrun_n, sqshrn_n, 7289 uqshrn_n, sqrshrn_n, uqrshrn_n, sqshlu_n, sqshl_n, uqshl_n, sqrdmlah, 7290 sqrdmlsh, sqrdmlah_lane, sqrdmlsh_lane, sqrdmlah_laneq, sqrdmlsh_laneq, 7291 sqmovun): Use NONE flags. 7292 72932021-01-19 Richard Biener <rguenther@suse.de> 7294 7295 PR ipa/98330 7296 * ipa-modref.c (analyze_stmt): Only record a summary for a 7297 direct call. 7298 72992021-01-19 Richard Biener <rguenther@suse.de> 7300 7301 PR middle-end/98638 7302 * tree-ssanames.c (fini_ssanames): Zero SSA_NAME_DEF_STMT. 7303 73042021-01-19 Daniel Hellstrom <daniel@gaisler.com> 7305 7306 * config/sparc/rtemself.h (TARGET_OS_CPP_BUILTINS): Add 7307 built-in define __FIX_LEON3FT_TN0018. 7308 73092021-01-19 Richard Biener <rguenther@suse.de> 7310 7311 PR ipa/97673 7312 * tree-inline.c (tree_function_versioning): Set input_location 7313 to UNKNOWN_LOCATION throughout the function. 7314 73152021-01-19 Tobias Burnus <tobias@codesourcery.com> 7316 7317 PR fortran/98476 7318 * omp-low.c (lower_omp_target): Handle nonpointer is_device_ptr. 7319 73202021-01-19 Martin Jambor <mjambor@suse.cz> 7321 7322 PR ipa/98690 7323 * ipa-sra.c (ssa_name_only_returned_p): New parameter fun. Check 7324 whether non-call exceptions allow removal of a statement. 7325 (isra_analyze_call): Pass the appropriate function to 7326 ssa_name_only_returned_p. 7327 73282021-01-19 Geng Qi <gengqi@linux.alibaba.com> 7329 7330 * config/riscv/arch-canonicalize (longext_sort): New function for 7331 sorting 'multi-letter'. 7332 * config/riscv/multilib-generator: Adjusting the loop of 'alt' in 7333 'alts'. The 'arch' may not be the first of 'alts'. 7334 (_expand_combination): Add underline for the 'ext' without '*'. 7335 This is because, a single-letter extension can always be treated well 7336 with a '_' prefix, but it cannot be separated out if it is appended 7337 to a multi-letter. 7338 73392021-01-18 Vladimir N. Makarov <vmakarov@redhat.com> 7340 7341 PR target/97847 7342 * ira.c (ira): Skip abnormal critical edge splitting. 7343 73442021-01-18 Jakub Jelinek <jakub@redhat.com> 7345 7346 PR tree-optimization/98727 7347 * tree-ssa-math-opts.c (match_arith_overflow): Fix up computation of 7348 second .MUL_OVERFLOW operand for signed multiplication with overflow 7349 checking if the second operand of multiplication is not constant. 7350 73512021-01-18 David Edelsohn <dje.gcc@gmail.com> 7352 7353 * doc/invoke.texi (-gdwarf): TPF defaults to version 2 and AIX 7354 defaults to version 4. 7355 73562021-01-18 David Malcolm <dmalcolm@redhat.com> 7357 7358 * attribs.h (fndecl_dealloc_argno): New decl. 7359 * builtins.c (call_dealloc_argno): Split out second half of 7360 function into... 7361 (fndecl_dealloc_argno): New. 7362 * doc/extend.texi (Common Function Attributes): Document the 7363 interaction between the analyzer and the malloc attribute. 7364 * doc/invoke.texi (Static Analyzer Options): Likewise. 7365 73662021-01-17 David Edelsohn <dje.gcc@gmail.com> 7367 7368 * config/rs6000/aix71.h (SUBTARGET_OVERRIDE_OPTIONS): Override 7369 dwarf_version to 4. 7370 * config/rs6000/aix72.h (SUBTARGET_OVERRIDE_OPTIONS): Same. 7371 73722021-01-17 Martin Jambor <mjambor@suse.cz> 7373 7374 PR ipa/98222 7375 * cgraph.c (clone_of_p): Check also former_clone_of as we climb 7376 the clone tree. 7377 73782021-01-17 Mark Wielaard <mark@klomp.org> 7379 7380 * common.opt (gdwarf-): Init(5). 7381 * doc/invoke.texi (-gdwarf): Document default to 5. 7382 73832021-01-16 Kwok Cheung Yeung <kcy@codesourcery.com> 7384 7385 * builtin-types.def 7386 (BT_FN_VOID_OMPFN_PTR_OMPCPYFN_LONG_LONG_BOOL_UINT_PTR_INT): Rename 7387 to... 7388 (BT_FN_VOID_OMPFN_PTR_OMPCPYFN_LONG_LONG_BOOL_UINT_PTR_INT_PTR): 7389 ...this. Add extra argument. 7390 * gimplify.c (omp_default_clause): Ensure that event handle is 7391 firstprivate in a task region. 7392 (gimplify_scan_omp_clauses): Handle OMP_CLAUSE_DETACH. 7393 (gimplify_adjust_omp_clauses): Likewise. 7394 * omp-builtins.def (BUILT_IN_GOMP_TASK): Change function type to 7395 BT_FN_VOID_OMPFN_PTR_OMPCPYFN_LONG_LONG_BOOL_UINT_PTR_INT_PTR. 7396 * omp-expand.c (expand_task_call): Add GOMP_TASK_FLAG_DETACH to flags 7397 if detach clause specified. Add detach argument when generating 7398 call to GOMP_task. 7399 * omp-low.c (scan_sharing_clauses): Setup data environment for detach 7400 clause. 7401 (finish_taskreg_scan): Move field for variable containing the event 7402 handle to the front of the struct. 7403 * tree-core.h (enum omp_clause_code): Add OMP_CLAUSE_DETACH. Fix 7404 ordering. 7405 * tree-nested.c (convert_nonlocal_omp_clauses): Handle 7406 OMP_CLAUSE_DETACH clause. 7407 (convert_local_omp_clauses): Handle OMP_CLAUSE_DETACH clause. 7408 * tree-pretty-print.c (dump_omp_clause): Handle OMP_CLAUSE_DETACH. 7409 * tree.c (omp_clause_num_ops): Add entry for OMP_CLAUSE_DETACH. 7410 Fix ordering. 7411 (omp_clause_code_name): Add entry for OMP_CLAUSE_DETACH. Fix 7412 ordering. 7413 (walk_tree_1): Handle OMP_CLAUSE_DETACH. 7414 74152021-01-16 Sebastian Huber <sebastian.huber@embedded-brains.de> 7416 7417 * config/nios2/t-rtems: Reset all MULTILIB_* variables. Shorten 7418 multilib directory names. Use MULTILIB_REQUIRED instead of 7419 MULTILIB_EXCEPTIONS. Add -mhw-mul -mhw-mulx -mhw-div 7420 -mcustom-fpu-cfg=fph2 multilib. 7421 74222021-01-16 Sebastian Huber <sebastian.huber@embedded-brains.de> 7423 7424 * config/nios2/nios2.c (NIOS2_FPU_CONFIG_NUM): Adjust value. 7425 (nios2_init_fpu_configs): Provide register values for new 7426 -mcustom-fpu-cfg=fph2 option variant. 7427 * doc/invoke.texi (-mcustom-fpu-cfg=fph2): Document new option 7428 variant. 7429 74302021-01-16 Sebastian Huber <sebastian.huber@embedded-brains.de> 7431 7432 * config/nios2/nios2.c (nios2_custom_check_insns): Remove 7433 custom instruction warnings. 7434 74352021-01-16 Jakub Jelinek <jakub@redhat.com> 7436 7437 PR tree-optimization/96669 7438 * match.pd ((CST << x) & 1 -> x == 0): New simplification. 7439 74402021-01-16 Jakub Jelinek <jakub@redhat.com> 7441 7442 PR tree-optimization/96271 7443 * passes.def: Pass false argument to first two pass_cd_dce 7444 instances and true to last instance. Add comment that 7445 last instance rewrites no longer addressed locals. 7446 * tree-ssa-dce.c (pass_cd_dce): Add update_address_taken_p member and 7447 initialize it. 7448 (pass_cd_dce::set_pass_param): New method. 7449 (pass_cd_dce::execute): Return TODO_update_address_taken from 7450 last cd_dce instance. 7451 74522021-01-15 Carl Love <cel@us.ibm.com> 7453 7454 * config/rs6000/altivec.h (vec_mulh, vec_div, vec_dive, vec_mod): 7455 New defines. 7456 * config/rs6000/altivec.md (VIlong): Move define to file vsx.md. 7457 * config/rs6000/rs6000-builtin.def (DIVES_V4SI, DIVES_V2DI, 7458 DIVEU_V4SI, DIVEU_V2DI, DIVS_V4SI, DIVS_V2DI, DIVU_V4SI, 7459 DIVU_V2DI, MODS_V2DI, MODS_V4SI, MODU_V2DI, MODU_V4SI, 7460 MULHS_V2DI, MULHS_V4SI, MULHU_V2DI, MULHU_V4SI, MULLD_V2DI): 7461 Add builtin define. 7462 (MULH, DIVE, MOD): Add new BU_P10_OVERLOAD_2 definitions. 7463 * config/rs6000/rs6000-call.c (VSX_BUILTIN_VEC_DIV, 7464 VSX_BUILTIN_VEC_DIVE, P10_BUILTIN_VEC_MOD, P10_BUILTIN_VEC_MULH): 7465 New overloaded definitions. 7466 (builtin_function_type) [P10V_BUILTIN_DIVEU_V4SI, 7467 P10V_BUILTIN_DIVEU_V2DI, P10V_BUILTIN_DIVU_V4SI, 7468 P10V_BUILTIN_DIVU_V2DI, P10V_BUILTIN_MODU_V2DI, 7469 P10V_BUILTIN_MODU_V4SI, P10V_BUILTIN_MULHU_V2DI, 7470 P10V_BUILTIN_MULHU_V4SI]: Add case 7471 statement for builtins. 7472 * config/rs6000/rs6000.md (bits): Add new attribute sizes V4SI, V2DI. 7473 * config/rs6000/vsx.md (VIlong): Moved from config/rs6000/altivec.md. 7474 (UNSPEC_VDIVES, UNSPEC_VDIVEU): New unspec definitions. 7475 (vsx_mul_v2di): Add if TARGET_POWER10 statement. 7476 (vsx_udiv_v2di): Add if TARGET_POWER10 statement. 7477 (dives_<mode>, diveu_<mode>, div<mode>3, uvdiv<mode>3, 7478 mods_<mode>, modu_<mode>, mulhs_<mode>, mulhu_<mode>, mulv2di3): 7479 Add define_insn, mode is VIlong. 7480 * doc/extend.texi (vec_mulh, vec_mul, vec_div, vec_dive, vec_mod): 7481 Add builtin descriptions. 7482 74832021-01-15 Eric Botcazou <ebotcazou@adacore.com> 7484 7485 * final.c (final_start_function_1): Reset force_source_line. 7486 74872021-01-15 Jakub Jelinek <jakub@redhat.com> 7488 7489 PR tree-optimization/96669 7490 * match.pd (((1 << A) & 1) != 0 -> A == 0, 7491 ((1 << A) & 1) == 0 -> A != 0): Generalize for 1s replaced by 7492 possibly different power of two constants and to right shift too. 7493 74942021-01-15 Jakub Jelinek <jakub@redhat.com> 7495 7496 PR tree-optimization/96681 7497 * match.pd ((x < 0) ^ (y < 0) to (x ^ y) < 0): New simplification. 7498 ((x >= 0) ^ (y >= 0) to (x ^ y) < 0): Likewise. 7499 ((x < 0) ^ (y >= 0) to (x ^ y) >= 0): Likewise. 7500 ((x >= 0) ^ (y < 0) to (x ^ y) >= 0): Likewise. 7501 75022021-01-15 Alexandre Oliva <oliva@adacore.com> 7503 7504 * opts.c (gen_command_line_string): Exclude -dumpbase-ext. 7505 75062021-01-15 Tamar Christina <tamar.christina@arm.com> 7507 7508 * config/aarch64/aarch64-simd.md (cml<fcmac1><conj_op><mode>4, 7509 cmul<conj_op><mode>3): New. 7510 * config/aarch64/iterators.md (UNSPEC_FCMUL, 7511 UNSPEC_FCMUL180, UNSPEC_FCMLA_CONJ, UNSPEC_FCMLA180_CONJ, 7512 UNSPEC_CMLA_CONJ, UNSPEC_CMLA180_CONJ, UNSPEC_CMUL, UNSPEC_CMUL180, 7513 FCMLA_OP, FCMUL_OP, conj_op, rotsplit1, rotsplit2, fcmac1, sve_rot1, 7514 sve_rot2, SVE2_INT_CMLA_OP, SVE2_INT_CMUL_OP, SVE2_INT_CADD_OP): New. 7515 (rot): Add UNSPEC_FCMUL, UNSPEC_FCMUL180. 7516 (rot_op): Renamed to conj_op. 7517 * config/aarch64/aarch64-sve.md (cml<fcmac1><conj_op><mode>4, 7518 cmul<conj_op><mode>3): New. 7519 * config/aarch64/aarch64-sve2.md (cml<fcmac1><conj_op><mode>4, 7520 cmul<conj_op><mode>3): New. 7521 75222021-01-15 David Malcolm <dmalcolm@redhat.com> 7523 7524 PR bootstrap/98696 7525 * diagnostic.c 7526 (selftest::test_print_parseable_fixits_bytes_vs_display_columns): 7527 Escape the tempfile name when constructing the expected output. 7528 75292021-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 7530 7531 * config/aarch64/aarch64-simd.md (*aarch64_<su>mlsl_hi<mode>): 7532 Rename to... 7533 (aarch64_<su>mlsl_hi<mode>): ... This. 7534 (aarch64_<su>mlsl_hi<mode>): Define. 7535 (*aarch64_<su>mlsl<mode): Rename to... 7536 (aarch64_<su>mlsl<mode): ... This. 7537 * config/aarch64/aarch64-simd-builtins.def (smlsl, umlsl, 7538 smlsl_hi, umlsl_hi): Define builtins. 7539 * config/aarch64/arm_neon.h (vmlsl_high_s8, vmlsl_high_s16, 7540 vmlsl_high_s32, vmlsl_high_u8, vmlsl_high_u16, vmlsl_high_u32, 7541 vmlsl_s8, vmlsl_s16, vmlsl_s32, vmlsl_u8, 7542 vmlsl_u16, vmlsl_u32): Reimplement with builtins. 7543 75442021-01-15 Uroš Bizjak <ubizjak@gmail.com> 7545 7546 * config/i386/i386-c.c (ix86_target_macros): 7547 Use cpp_define_formatted for __SIZEOF_FLOAT80__ definition. 7548 75492021-01-15 Richard Sandiford <richard.sandiford@arm.com> 7550 7551 PR target/88836 7552 * config.gcc (aarch64*-*-*): Add aarch64-cc-fusion.o to extra_objs. 7553 * Makefile.in (RTL_SSA_H): New variable. 7554 * config/aarch64/t-aarch64 (aarch64-cc-fusion.o): New rule. 7555 * config/aarch64/aarch64-protos.h (make_pass_cc_fusion): Declare. 7556 * config/aarch64/aarch64-passes.def: Add pass_cc_fusion after 7557 pass_combine. 7558 * config/aarch64/aarch64-cc-fusion.cc: New file. 7559 75602021-01-15 Richard Sandiford <richard.sandiford@arm.com> 7561 7562 * recog.h (insn_change_watermark::~insn_change_watermark): Avoid 7563 calling cancel_changes for changes that no longer exist. 7564 75652021-01-15 Richard Sandiford <richard.sandiford@arm.com> 7566 7567 * rtl-ssa/functions.h (function_info::ref_defs): Rename to... 7568 (function_info::reg_defs): ...this. 7569 * rtl-ssa/member-fns.inl (function_info::ref_defs): Rename to... 7570 (function_info::reg_defs): ...this. 7571 75722021-01-15 Christophe Lyon <christophe.lyon@linaro.org> 7573 7574 PR target/71233 7575 * config/arm/arm_neon.h (vceqz_p64, vceqq_p64, vceqzq_p64): New. 7576 75772021-01-15 Christophe Lyon <christophe.lyon@linaro.org> 7578 7579 Revert: 7580 2021-01-15 Christophe Lyon <christophe.lyon@linaro.org> 7581 7582 PR target/71233 7583 * config/arm/arm_neon.h (vceqz_p64, vceqq_p64, vceqzq_p64): New. 7584 75852021-01-15 Richard Biener <rguenther@suse.de> 7586 7587 PR tree-optimization/96376 7588 * tree-vect-stmts.c (get_load_store_type): Disregard alignment 7589 for VMAT_INVARIANT. 7590 75912021-01-15 Martin Liska <mliska@suse.cz> 7592 7593 * doc/install.texi: Document that some tests need pytest module. 7594 * doc/sourcebuild.texi: Likewise. 7595 75962021-01-15 Christophe Lyon <christophe.lyon@linaro.org> 7597 7598 PR target/71233 7599 * config/arm/arm_neon.h (vceqz_p64, vceqq_p64, vceqzq_p64): New. 7600 76012021-01-15 Christophe Lyon <christophe.lyon@linaro.org> 7602 7603 * config/arm/mve.md (mve_vshrq_n_s<mode>_imm): New entry. 7604 (mve_vshrq_n_u<mode>_imm): Likewise. 7605 * config/arm/neon.md (vashr<mode>3, vlshr<mode>3): Move to ... 7606 * config/arm/vec-common.md: ... here. 7607 76082021-01-15 Christophe Lyon <christophe.lyon@linaro.org> 7609 7610 * config/arm/mve.md (mve_vshlq_<supf><mode>): Move to 7611 vec-commond.md. 7612 * config/arm/neon.md (vashl<mode>3): Delete. 7613 * config/arm/vec-common.md (mve_vshlq_<supf><mode>): New. 7614 (vasl<mode>3): New expander. 7615 76162021-01-15 Richard Biener <rguenther@suse.de> 7617 7618 PR tree-optimization/98685 7619 * tree-vect-slp.c (vect_schedule_slp_node): Refactor handling 7620 of vector extern defs. 7621 76222021-01-14 David Malcolm <dmalcolm@redhat.com> 7623 7624 PR jit/98586 7625 * diagnostic.c (diagnostic_kind_text): Break out this array 7626 from... 7627 (diagnostic_build_prefix): ...here. 7628 (fancy_abort): Detect when diagnostic_initialize has not yet been 7629 called and fall back to a minimal implementation of printing the 7630 ICE, rather than segfaulting in internal_error. 7631 76322021-01-14 David Malcolm <dmalcolm@redhat.com> 7633 7634 * diagnostic.c (diagnostic_initialize): Eliminate 7635 parseable_fixits_p in favor of initializing extra_output_kind from 7636 GCC_EXTRA_DIAGNOSTIC_OUTPUT. 7637 (convert_column_unit): New function, split out from... 7638 (diagnostic_converted_column): ...this. 7639 (print_parseable_fixits): Add "column_unit" and "tabstop" params. 7640 Use them to call convert_column_unit on the column values. 7641 (diagnostic_report_diagnostic): Eliminate conditional on 7642 parseable_fixits_p in favor of a switch statement on 7643 extra_output_kind, passing the appropriate values to the new 7644 params of print_parseable_fixits. 7645 (selftest::test_print_parseable_fixits_none): Update for new 7646 params of print_parseable_fixits. 7647 (selftest::test_print_parseable_fixits_insert): Likewise. 7648 (selftest::test_print_parseable_fixits_remove): Likewise. 7649 (selftest::test_print_parseable_fixits_replace): Likewise. 7650 (selftest::test_print_parseable_fixits_bytes_vs_display_columns): 7651 New. 7652 (selftest::diagnostic_c_tests): Call it. 7653 * diagnostic.h (enum diagnostics_extra_output_kind): New. 7654 (diagnostic_context::parseable_fixits_p): Delete field in favor 7655 of... 7656 (diagnostic_context::extra_output_kind): ...this new field. 7657 * doc/invoke.texi (Environment Variables): Add 7658 GCC_EXTRA_DIAGNOSTIC_OUTPUT. 7659 * opts.c (common_handle_option): Update handling of 7660 OPT_fdiagnostics_parseable_fixits for change to diagnostic_context 7661 fields. 7662 76632021-01-14 Tamar Christina <tamar.christina@arm.com> 7664 7665 * tree-vect-slp-patterns.c (class complex_operations_pattern, 7666 complex_operations_pattern::matches, 7667 complex_operations_pattern::recognize, 7668 complex_operations_pattern::build): New. 7669 (slp_patterns): Use it. 7670 76712021-01-14 Tamar Christina <tamar.christina@arm.com> 7672 7673 * internal-fn.def (COMPLEX_FMS, COMPLEX_FMS_CONJ): New. 7674 * optabs.def (cmls_optab, cmls_conj_optab): New. 7675 * doc/md.texi: Document them. 7676 * tree-vect-slp-patterns.c (class complex_fms_pattern, 7677 complex_fms_pattern::matches, complex_fms_pattern::recognize, 7678 complex_fms_pattern::build): New. 7679 76802021-01-14 Tamar Christina <tamar.christina@arm.com> 7681 7682 * internal-fn.def (COMPLEX_FMA, COMPLEX_FMA_CONJ): New. 7683 * optabs.def (cmla_optab, cmla_conj_optab): New. 7684 * doc/md.texi: Document them. 7685 * tree-vect-slp-patterns.c (vect_match_call_p, 7686 class complex_fma_pattern, vect_slp_reset_pattern, 7687 complex_fma_pattern::matches, complex_fma_pattern::recognize, 7688 complex_fma_pattern::build): New. 7689 76902021-01-14 Tamar Christina <tamar.christina@arm.com> 7691 7692 * internal-fn.def (COMPLEX_MUL, COMPLEX_MUL_CONJ): New. 7693 * optabs.def (cmul_optab, cmul_conj_optab): New. 7694 * doc/md.texi: Document them. 7695 * tree-vect-slp-patterns.c (vect_match_call_complex_mla, 7696 vect_normalize_conj_loc, is_eq_or_top, vect_validate_multiplication, 7697 vect_build_combine_node, class complex_mul_pattern, 7698 complex_mul_pattern::matches, complex_mul_pattern::recognize, 7699 complex_mul_pattern::build): New. 7700 77012021-01-14 Tamar Christina <tamar.christina@arm.com> 7702 7703 * tree-vect-slp.c (optimize_load_redistribution_1): New. 7704 (optimize_load_redistribution, vect_is_slp_load_node): New. 7705 (vect_match_slp_patterns): Use it. 7706 77072021-01-14 Tamar Christina <tamar.christina@arm.com> 7708 7709 * tree-vect-slp-patterns.c (complex_add_pattern::build): 7710 Elide nodes. 7711 77122021-01-14 Thomas Schwinge <thomas@codesourcery.com> 7713 7714 * config/gcn/mkoffload.c (main): Create an offload image only in 7715 64-bit configurations. 7716 77172021-01-14 H.J. Lu <hjl.tools@gmail.com> 7718 7719 PR target/98667 7720 * config/i386/i386-options.c (ix86_option_override_internal): 7721 Issue an error for -fcf-protection with CF_BRANCH when compiling 7722 for 32-bit non-TARGET_CMOV targets. 7723 77242021-01-14 Uroš Bizjak <ubizjak@gmail.com> 7725 7726 PR target/98671 7727 * config/i386/i386-options.c (ix86_valid_target_attribute_inner_p): 7728 Remove declaration and initialization of shadow variable "ret". 7729 (ix86_option_override_internal): Remove delcaration of 7730 shadow variable "i". Redeclare shadowed variable to unsigned. 7731 * common/config/i386/i386-common.c (pta_size): Redeclare to unsigned. 7732 * config/i386/i386-builtins.c (get_builtin_code_for_version): 7733 Update for redeclaration. 7734 * config/i386/i386.h (pta_size): Ditto. 7735 77362021-01-14 Richard Biener <rguenther@suse.de> 7737 7738 PR tree-optimization/98674 7739 * tree-data-ref.c (base_supports_access_fn_components_p): New. 7740 (initialize_data_dependence_relation): For two bases without 7741 possible access fns resort to type size equality when determining 7742 shape compatibility. 7743 77442021-01-14 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> 7745 7746 PR target/66791 7747 * config/arm/arm_neon.h: Replace calls to __builtin_vcge* by 7748 <=, >= operators in vcle and vcge intrinsics respectively. 7749 * config/arm/arm_neon_builtins.def: Remove entry for 7750 vcge and vcgeu. 7751 77522021-01-14 Uroš Bizjak <ubizjak@gmail.com> 7753 7754 PR target/98671 7755 * config/i386/i386-options.c (ix86_function_specific_save): 7756 Remove redundant assignment to opts->x_ix86_branch_cost. 7757 * config/i386/i386.c (ix86_prefetch_sse): 7758 Rename from x86_prefetch_sse. Update all uses. 7759 * config/i386/i386.h: Update for rename. 7760 * config/i386/i386-options.h: Ditto. 7761 77622021-01-14 Jakub Jelinek <jakub@redhat.com> 7763 7764 PR target/98670 7765 * config/i386/sse.md (*sse4_1_zero_extendv8qiv8hi2_3, 7766 *sse4_1_zero_extendv4hiv4si2_3, *sse4_1_zero_extendv2siv2di2_3): 7767 Use Bm instead of m for non-avx. Add isa attribute. 7768 77692021-01-14 Jakub Jelinek <jakub@redhat.com> 7770 7771 PR tree-optimization/96688 7772 * match.pd (~(X >> Y) -> ~X >> Y): New simplification if 7773 ~X can be simplified. 7774 77752021-01-14 Richard Sandiford <richard.sandiford@arm.com> 7776 7777 * tree-vect-stmts.c (vect_model_load_cost): Account for unused 7778 IFN_LOAD_LANES results. 7779 77802021-01-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 7781 7782 * config/aarch64/aarch64-simd.md (aarch64_<su>xtl<mode>): 7783 Define. 7784 (aarch64_xtn<mode>): Likewise. 7785 * config/aarch64/aarch64-simd-builtins.def (sxtl, uxtl, xtn): 7786 Define 7787 builtins. 7788 * config/aarch64/arm_neon.h (vmovl_s8): Reimplement using 7789 builtin. 7790 (vmovl_s16): Likewise. 7791 (vmovl_s32): Likewise. 7792 (vmovl_u8): Likewise. 7793 (vmovl_u16): Likewise. 7794 (vmovl_u32): Likewise. 7795 (vmovn_s16): Likewise. 7796 (vmovn_s32): Likewise. 7797 (vmovn_s64): Likewise. 7798 (vmovn_u16): Likewise. 7799 (vmovn_u32): Likewise. 7800 (vmovn_u64): Likewise. 7801 78022021-01-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 7803 7804 * config/aarch64/aarch64-simd.md (aarch64_<su>qxtn2<mode>_le): 7805 Define. 7806 (aarch64_<su>qxtn2<mode>_be): Likewise. 7807 (aarch64_<su>qxtn2<mode>): Likewise. 7808 * config/aarch64/aarch64-simd-builtins.def (sqxtn2, uqxtn2): 7809 Define builtins. 7810 * config/aarch64/iterators.md (SAT_TRUNC): Define code_iterator. 7811 (su): Handle ss_truncate and us_truncate. 7812 * config/aarch64/arm_neon.h (vqmovn_high_s16): Reimplement using 7813 builtin. 7814 (vqmovn_high_s32): Likewise. 7815 (vqmovn_high_s64): Likewise. 7816 (vqmovn_high_u16): Likewise. 7817 (vqmovn_high_u32): Likewise. 7818 (vqmovn_high_u64): Likewise. 7819 78202021-01-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 7821 7822 * config/aarch64/aarch64-simd.md (aarch64_xtn2<mode>_le): 7823 Define. 7824 (aarch64_xtn2<mode>_be): Likewise. 7825 (aarch64_xtn2<mode>): Likewise. 7826 * config/aarch64/aarch64-simd-builtins.def (xtn2): Define 7827 builtins. 7828 * config/aarch64/arm_neon.h (vmovn_high_s16): Reimplement using 7829 builtins. 7830 (vmovn_high_s32): Likewise. 7831 (vmovn_high_s64): Likewise. 7832 (vmovn_high_u16): Likewise. 7833 (vmovn_high_u32): Likewise. 7834 (vmovn_high_u64): Likewise. 7835 78362021-01-13 Stafford Horne <shorne@gmail.com> 7837 7838 * config/or1k/or1k.h (ASM_PREFERRED_EH_DATA_FORMAT): New macro. 7839 78402021-01-13 Stafford Horne <shorne@gmail.com> 7841 7842 * config/or1k/linux.h (TARGET_ASM_FILE_END): Define macro. 7843 78442021-01-13 Stafford Horne <shorne@gmail.com> 7845 7846 * config/or1k/or1k.h (TARGET_CPU_CPP_BUILTINS): Add builtin 7847 define for __or1k_hard_float__. 7848 78492021-01-13 Stafford Horne <shorne@gmail.com> 7850 7851 * config/or1k/or1k.h (NO_PROFILE_COUNTERS): Define as 1. 7852 (PROFILE_HOOK): Define to call _mcount. 7853 (FUNCTION_PROFILER): Change from abort to no-op. 7854 78552021-01-13 Jakub Jelinek <jakub@redhat.com> 7856 7857 PR tree-optimization/96691 7858 * match.pd ((~X | C) ^ D -> (X | C) ^ (~D ^ C), 7859 (~X & C) ^ D -> (X & C) ^ (D ^ C)): New simplifications if 7860 (~D ^ C) or (D ^ C) can be simplified. 7861 78622021-01-13 Richard Biener <rguenther@suse.de> 7863 7864 PR tree-optimization/92645 7865 * match.pd (BIT_FIELD_REF to conversion): Delay canonicalization 7866 until after vector lowering. 7867 78682021-01-13 Richard Sandiford <richard.sandiford@arm.com> 7869 7870 * config/aarch64/aarch64-sve.md (fnma<mode>4): Extend from SVE_FULL_I 7871 to SVE_I. 7872 (@aarch64_pred_fnma<mode>, cond_fnma<mode>, *cond_fnma<mode>_2) 7873 (*cond_fnma<mode>_4, *cond_fnma<mode>_any): Likewise. 7874 78752021-01-13 Richard Sandiford <richard.sandiford@arm.com> 7876 7877 * config/aarch64/aarch64-sve.md (fma<mode>4): Extend from SVE_FULL_I 7878 to SVE_I. 7879 (@aarch64_pred_fma<mode>, cond_fma<mode>, *cond_fma<mode>_2) 7880 (*cond_fma<mode>_4, *cond_fma<mode>_any): Likewise. 7881 78822021-01-13 Richard Biener <rguenther@suse.de> 7883 7884 PR tree-optimization/92645 7885 * tree-vect-slp.c (vect_build_slp_tree_1): Relax supported 7886 BIT_FIELD_REF argument. 7887 (vect_build_slp_tree_2): Record the desired vector type 7888 on the external vector def. 7889 (vectorizable_slp_permutation): Handle required punning 7890 of existing vector defs. 7891 78922021-01-13 Richard Sandiford <richard.sandiford@arm.com> 7893 7894 * rtl-ssa/accesses.h (def_lookup): Fix order of comparison results. 7895 78962021-01-13 Richard Sandiford <richard.sandiford@arm.com> 7897 7898 * config/sh/sh.md (movsf_ie): Remove operands[2] test. 7899 79002021-01-13 Samuel Thibault <samuel.thibault@ens-lyon.org> 7901 7902 * config.gcc [$target == *-*-gnu*]: Enable 7903 'default_gnu_indirect_function'. 7904 79052021-01-13 Jakub Jelinek <jakub@redhat.com> 7906 7907 PR target/95905 7908 * optabs.c (expand_vec_perm_const): Don't force v0 and v1 into 7909 registers before calling targetm.vectorize.vec_perm_const, only after 7910 that. 7911 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const): Handle 7912 two argument permutation when one operand is zero vector and only 7913 after that force operands into registers. 7914 * config/i386/sse.md (*avx2_zero_extendv16qiv16hi2_1): New 7915 define_insn_and_split pattern. 7916 (*avx512bw_zero_extendv32qiv32hi2_1): Likewise. 7917 (*avx512f_zero_extendv16hiv16si2_1): Likewise. 7918 (*avx2_zero_extendv8hiv8si2_1): Likewise. 7919 (*avx512f_zero_extendv8siv8di2_1): Likewise. 7920 (*avx2_zero_extendv4siv4di2_1): Likewise. 7921 * config/mips/mips.c (mips_vectorize_vec_perm_const): Force operands 7922 into registers. 7923 * config/arm/arm.c (arm_vectorize_vec_perm_const): Likewise. 7924 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Likewise. 7925 * config/ia64/ia64.c (ia64_vectorize_vec_perm_const): Likewise. 7926 * config/aarch64/aarch64.c (aarch64_vectorize_vec_perm_const): Likewise. 7927 * config/rs6000/rs6000.c (rs6000_vectorize_vec_perm_const): Likewise. 7928 * config/gcn/gcn.c (gcn_vectorize_vec_perm_const): Likewise. Use std::swap. 7929 79302021-01-13 Martin Liska <mliska@suse.cz> 7931 7932 PR tree-optimization/98455 7933 * gimple-if-to-switch.cc (condition_info::record_phi_mapping): 7934 Record also virtual PHIs. 7935 (pass_if_to_switch::execute): Return TODO_cleanup_cfg only 7936 conditionally. 7937 79382021-01-13 Jonathan Wakely <jwakely@redhat.com> 7939 7940 * doc/invoke.texi (C++ Modules): Fix typos. 7941 79422021-01-13 Richard Biener <rguenther@suse.de> 7943 7944 PR tree-optimization/98640 7945 * tree-ssa-sccvn.c (visit_nary_op): Do not try to 7946 handle plus or minus from a truncated operand to be 7947 sign-extended. 7948 79492021-01-13 Jakub Jelinek <jakub@redhat.com> 7950 7951 PR target/96938 7952 * config/i386/i386.md (*btr<mode>_1, *btr<mode>_2): New 7953 define_insn_and_split patterns. 7954 (splitter after *btr<mode>_2): New splitter. 7955 79562021-01-13 Martin Liska <mliska@suse.cz> 7957 7958 PR ipa/98652 7959 * cgraphunit.c (analyze_functions): Remove dead code. 7960 79612021-01-13 Qian Jianhua <qianjh@cn.fujitsu.com> 7962 7963 * config/aarch64/aarch64-cost-tables.h (a64fx_extra_costs): New. 7964 * config/aarch64/aarch64.c (a64fx_addrcost_table): New. 7965 (a64fx_regmove_cost, a64fx_vector_cost): New. 7966 (a64fx_tunings): Use the new added cost tables. 7967 79682021-01-13 Jakub Jelinek <jakub@redhat.com> 7969 7970 PR target/95905 7971 * config/i386/predicates.md (pmovzx_parallel): New predicate. 7972 * config/i386/sse.md (*sse4_1_zero_extendv8qiv8hi2_3): New 7973 define_insn_and_split pattern. 7974 (*sse4_1_zero_extendv4hiv4si2_3): Likewise. 7975 (*sse4_1_zero_extendv2siv2di2_3): Likewise. 7976 79772021-01-13 Julian Brown <julian@codesourcery.com> 7978 7979 * config/gcn/gcn.c (gcn_conditional_register_usage): Remove dead code 7980 to fix v0 register. 7981 79822021-01-13 Julian Brown <julian@codesourcery.com> 7983 7984 * config/gcn/gcn.c (gcn_md_reorg): Fix case where EXEC reg is live 7985 on entry to a BB. 7986 79872021-01-13 Julian Brown <julian@codesourcery.com> 7988 7989 * config/gcn/gcn-valu.md (recip<mode>2<exec>, recip<mode>2): Use unspec 7990 for reciprocal-approximation instructions. 7991 (div<mode>3): Use fused multiply-accumulate operations for reciprocal 7992 refinement and division result. 7993 * config/gcn/gcn.md (UNSPEC_RCP): New unspec constant. 7994 79952021-01-13 Julian Brown <julian@codesourcery.com> 7996 7997 * config/gcn/gcn-valu.md (subdf): Rename to... 7998 (subdf3): This. 7999 80002021-01-12 Martin Liska <mliska@suse.cz> 8001 8002 * gcov.c (source_info::debug): Fix printf format for 32-bit hosts. 8003 80042021-01-12 Andrea Corallo <andrea.corallo@arm.com> 8005 8006 * function-abi.h: Fix typo. 8007 80082021-01-12 Christophe Lyon <christophe.lyon@linaro.org> 8009 8010 PR target/97875 8011 PR target/97875 8012 * config/arm/arm.h (ARM_HAVE_NEON_V8QI_LDST): New macro. 8013 (ARM_HAVE_NEON_V16QI_LDST, ARM_HAVE_NEON_V4HI_LDST): Likewise. 8014 (ARM_HAVE_NEON_V8HI_LDST, ARM_HAVE_NEON_V2SI_LDST): Likewise. 8015 (ARM_HAVE_NEON_V4SI_LDST, ARM_HAVE_NEON_V4HF_LDST): Likewise. 8016 (ARM_HAVE_NEON_V8HF_LDST, ARM_HAVE_NEON_V4BF_LDST): Likewise. 8017 (ARM_HAVE_NEON_V8BF_LDST, ARM_HAVE_NEON_V2SF_LDST): Likewise. 8018 (ARM_HAVE_NEON_V4SF_LDST, ARM_HAVE_NEON_DI_LDST): Likewise. 8019 (ARM_HAVE_NEON_V2DI_LDST): Likewise. 8020 (ARM_HAVE_V8QI_LDST, ARM_HAVE_V16QI_LDST): Likewise. 8021 (ARM_HAVE_V4HI_LDST, ARM_HAVE_V8HI_LDST): Likewise. 8022 (ARM_HAVE_V2SI_LDST, ARM_HAVE_V4SI_LDST, ARM_HAVE_V4HF_LDST): Likewise. 8023 (ARM_HAVE_V8HF_LDST, ARM_HAVE_V4BF_LDST, ARM_HAVE_V8BF_LDST): Likewise. 8024 (ARM_HAVE_V2SF_LDST, ARM_HAVE_V4SF_LDST, ARM_HAVE_DI_LDST): Likewise. 8025 (ARM_HAVE_V2DI_LDST): Likewise. 8026 * config/arm/mve.md (*movmisalign<mode>_mve_store): New pattern. 8027 (*movmisalign<mode>_mve_load): New pattern. 8028 * config/arm/neon.md (movmisalign<mode>): Move to ... 8029 * config/arm/vec-common.md: ... here. 8030 80312021-01-12 Vladimir N. Makarov <vmakarov@redhat.com> 8032 8033 PR target/97969 8034 * lra-eliminations.c (eliminate_regs_in_insn): Add transformation 8035 of pattern 'plus (plus (hard reg, const), pseudo)'. 8036 80372021-01-12 Richard Biener <rguenther@suse.de> 8038 8039 PR tree-optimization/98550 8040 * tree-vect-slp.c (vect_record_max_nunits): Check whether 8041 the group size is a multiple of the vector element count. 8042 (vect_build_slp_tree_1): When we need to fail because 8043 the vector type choosen causes unrolling do so lazily 8044 without affecting matches only at the end to guide group splitting. 8045 80462021-01-12 Martin Liska <mliska@suse.cz> 8047 8048 PR c++/97284 8049 * optc-save-gen.awk: Compare also n_target_save vars with 8050 strcmp. 8051 80522021-01-12 Martin Liska <mliska@suse.cz> 8053 8054 * gcov.c (source_info::debug): New. 8055 (print_usage): Add --debug (-D) option. 8056 (process_args): Likewise. 8057 (generate_results): Call src->debug after 8058 accumulate_line_counts. 8059 (read_graph_file): Properly assign id for EXIT_BLOCK. 8060 * profile.c (branch_prob): Dump function body before it is 8061 instrumented. 8062 80632021-01-12 Jakub Jelinek <jakub@redhat.com> 8064 8065 PR tree-optimization/98629 8066 * tree-ssa-math-opts.c (arith_overflow_check_p): Don't update use_stmt 8067 unless returning non-zero. 8068 80692021-01-12 Jakub Jelinek <jakub@redhat.com> 8070 8071 PR tree-optimization/95731 8072 * tree-ssa-reassoc.c (optimize_range_tests_cmp_bitwise): Also optimize 8073 x < 0 && y < 0 && z < 0 into (x | y | z) < 0 for signed x, y, z. 8074 (optimize_range_tests): Call optimize_range_tests_cmp_bitwise 8075 only after optimize_range_tests_var_bound. 8076 80772021-01-12 Jakub Jelinek <jakub@redhat.com> 8078 8079 * configure.ac: Ensure c/Make-lang.in comes first in @all_lang_makefrags@. 8080 * configure: Regenerated. 8081 80822021-01-12 liuhongt <hongtao.liu@intel.com> 8083 8084 PR target/98612 8085 * config/i386/i386-builtins.h (BUILTIN_DESC_SWAP_OPERANDS): 8086 Deleted. 8087 * config/i386/i386-expand.c (ix86_expand_sse_comi): Delete 8088 dead code. 8089 80902021-01-12 Alexandre Oliva <oliva@adacore.com> 8091 8092 * ssa-iterators.h (end_imm_use_stmt_traverse): Forward 8093 declare. 8094 (auto_end_imm_use_stmt_traverse): New struct. 8095 (FOR_EACH_IMM_USE_STMT): Use it. 8096 (BREAK_FROM_IMM_USE_STMT, RETURN_FROM_IMM_USE_STMT): Remove, 8097 along with uses... 8098 * gimple-ssa-strength-reduction.c: ... here, ... 8099 * graphite-scop-detection.c: ... here, ... 8100 * ipa-modref.c, ipa-pure-const.c, ipa-sra.c: ... here, ... 8101 * tree-predcom.c, tree-ssa-ccp.c: ... here, ... 8102 * tree-ssa-dce.c, tree-ssa-dse.c: ... here, ... 8103 * tree-ssa-loop-ivopts.c, tree-ssa-math-opts.c: ... here, ... 8104 * tree-ssa-phiprop.c, tree-ssa.c: ... here, ... 8105 * tree-vect-slp.c: ... and here, ... 8106 * doc/tree-ssa.texi: ... and the example here. 8107 81082021-01-11 Richard Sandiford <richard.sandiford@arm.com> 8109 8110 * config/aarch64/aarch64-sve.md (sdiv_pow2<mode>3): Extend from 8111 SVE_FULL_I to SVE_I. Generate an UNSPEC_PRED_X. 8112 (*sdiv_pow2<mode>3): New pattern. 8113 (@cond_<sve_int_op><mode>): Extend from SVE_FULL_I to SVE_I. 8114 Wrap the ASRD in an UNSPEC_PRED_X. 8115 (*cond_<sve_int_op><mode>_2): Likewise. Replace the UNSPEC_PRED_X 8116 predicate with a constant PTRUE, if it isn't already. 8117 (*cond_<sve_int_op><mode>_z): Replace with... 8118 (*cond_<sve_int_op><mode>_any): ...this new pattern. 8119 81202021-01-11 Richard Sandiford <richard.sandiford@arm.com> 8121 8122 * config/aarch64/aarch64-sve.md (*cond_bic<mode>_2): Extend from 8123 SVE_FULL_I to SVE_I. 8124 (*cond_bic<mode>_any): Likewise. 8125 81262021-01-11 Richard Sandiford <richard.sandiford@arm.com> 8127 8128 * config/aarch64/aarch64-sve.md (<su>mul<mode>3_highpart) 8129 (@aarch64_pred_<MUL_HIGHPART:optab><mode>): Extend from SVE_FULL_I 8130 to SVE_I. 8131 81322021-01-11 Richard Sandiford <richard.sandiford@arm.com> 8133 8134 * config/aarch64/aarch64-sve.md (<su>abd<mode>_3): Extend from 8135 SVE_FULL_I to SVE_I. 8136 (*aarch64_cond_<su>abd<mode>_2): Likewise. 8137 (*aarch64_cond_<su>abd<mode>_any): Likewise. 8138 (@aarch64_pred_<su>abd<mode>): Likewise. Use UNSPEC_PRED_X 8139 for the max and min but not for the minus. 8140 (*aarch64_cond_<su>abd<mode>_3): New pattern. 8141 81422021-01-11 Richard Sandiford <richard.sandiford@arm.com> 8143 8144 * config/aarch64/iterators.md (SVE_24I): New iterator. 8145 * config/aarch64/aarch64-sve.md (*aarch64_adr<mode>_shift): Extend from 8146 SVE_FULL_SDI to SVE_24I. Use containers rather than elements. 8147 81482021-01-11 Richard Sandiford <richard.sandiford@arm.com> 8149 8150 * config/aarch64/aarch64-sve.md (@cond_<SVE_INT_BINARY:optab><mode>) 8151 (*cond_<SVE_INT_BINARY:optab><mode>_2): Extend from SVE_FULL_I 8152 to SVE_I. 8153 (*cond_<SVE_INT_BINARY:optab><mode>_3): Likewise. 8154 (*cond_<SVE_INT_BINARY:optab><mode>_any): Likewise. 8155 (*cond_<SVE_INT_BINARY:optab><mode>_2_const): Likewise. 8156 (*cond_<SVE_INT_BINARY:optab><mode>_any_const): Likewise. 8157 81582021-01-11 Richard Sandiford <richard.sandiford@arm.com> 8159 8160 * config/aarch64/aarch64-sve.md (<SVE_INT_BINARY_IMM:optab><mode>3) 8161 (@aarch64_pred_<SVE_INT_BINARY_IMM:optab><mode>) 8162 (*post_ra_<SVE_INT_BINARY_IMM:optab><mode>3): Extend from SVE_FULL_I 8163 to SVE_I. 8164 81652021-01-11 Richard Sandiford <richard.sandiford@arm.com> 8166 8167 * config/aarch64/aarch64-sve.md (<ASHIFT:optab><mode>3) 8168 (v<ASHIFT:optab><mode>3, @aarch64_pred_<optab><mode>) 8169 (*post_ra_v<ASHIFT:optab><mode>3): Extend from SVE_FULL_I to SVE_I. 8170 81712021-01-11 Martin Liska <mliska@suse.cz> 8172 8173 PR jit/98615 8174 * symtab-clones.h (clone_info::release): Release 8175 symtab::m_clones with ggc_delete as it's a GGC memory. 8176 81772021-01-11 Matthias Klose <doko@ubuntu.com> 8178 8179 * Makefile.in (LINK_PROGRESS): Show the link target. 8180 81812021-01-11 Richard Biener <rguenther@suse.de> 8182 8183 PR tree-optimization/91403 8184 * tree-vect-data-refs.c (vect_analyze_group_access_1): Cap 8185 single-element interleaving group size at 4096 elements. 8186 81872021-01-11 Richard Biener <rguenther@suse.de> 8188 8189 PR tree-optimization/98526 8190 * tree-vect-loop.c (vect_model_reduction_cost): Remove costing 8191 of the actual reduction op for the regular case. 8192 (vectorizable_reduction): Cost the stmts 8193 vect_transform_reduction produces here. 8194 81952021-01-11 Andreas Krebbel <krebbel@linux.ibm.com> 8196 8197 * tree-ssa-forwprop.c (simplify_vector_constructor): For 8198 big-endian, use UNPACK[_FLOAT]_HI. 8199 82002021-01-11 Tamar Christina <tamar.christina@arm.com> 8201 8202 * tree-vect-slp-patterns.c (class complex_pattern, 8203 class complex_add_pattern): Add parameters to matches. 8204 (complex_add_pattern::build): Free memory. 8205 (complex_add_pattern::matches): Move validation end of match. 8206 (complex_add_pattern::recognize): Likewise. 8207 82082021-01-11 Tamar Christina <tamar.christina@arm.com> 8209 8210 * tree-vect-slp-patterns.c (linear_loads_p): Fix externals. 8211 82122021-01-11 Tamar Christina <tamar.christina@arm.com> 8213 8214 * tree-vect-slp-patterns.c (is_linear_load_p): Fix ambiguity. 8215 82162021-01-11 Jakub Jelinek <jakub@redhat.com> 8217 8218 PR tree-optimization/95867 8219 * tree-ssa-math-opts.h: New header. 8220 * tree-ssa-math-opts.c: Include tree-ssa-math-opts.h. 8221 (powi_as_mults): No longer static. Use build_one_cst instead of 8222 build_real. Formatting fix. 8223 * tree-ssa-reassoc.c: Include tree-ssa-math-opts.h. 8224 (attempt_builtin_powi): Handle multiplication reassociation without 8225 powi_fndecl using powi_as_mults. 8226 (reassociate_bb): For integral types don't require 8227 -funsafe-math-optimizations to call attempt_builtin_powi. 8228 82292021-01-11 Jakub Jelinek <jakub@redhat.com> 8230 8231 PR tree-optimization/95852 8232 * tree-ssa-math-opts.c (maybe_optimize_guarding_check): Change 8233 mul_stmts parameter type to vec<gimple *> &. Before cond_stmt 8234 allow in the bb any of the stmts in that vector, div_stmt and 8235 up to 3 cast stmts. 8236 (arith_cast_equal_p): New function. 8237 (arith_overflow_check_p): Add cast_stmt argument, handle signed 8238 multiply overflow checks. 8239 (match_arith_overflow): Adjust caller. Handle signed multiply 8240 overflow checks. 8241 82422021-01-11 Jakub Jelinek <jakub@redhat.com> 8243 8244 PR tree-optimization/95852 8245 * tree-ssa-math-opts.c (maybe_optimize_guarding_check): New function. 8246 (uaddsub_overflow_check_p): Renamed to ... 8247 (arith_overflow_check_p): ... this. Handle also multiplication 8248 with overflow check. 8249 (match_uaddsub_overflow): Renamed to ... 8250 (match_arith_overflow): ... this. Add cfg_changed argument. Handle 8251 also multiplication with overflow check. Adjust function comment. 8252 (math_opts_dom_walker::after_dom_children): Adjust callers. Call 8253 match_arith_overflow also for MULT_EXPR. 8254 82552021-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 8256 8257 * config/aarch64/arm_neon.h (vmovl_s8): Reimplement using 8258 __builtin_convertvector. 8259 (vmovl_s16): Likewise. 8260 (vmovl_s32): Likewise. 8261 (vmovl_u8): Likewise. 8262 (vmovl_u16): Likewise. 8263 (vmovl_u32): Likewise. 8264 (vmovn_s16): Likewise. 8265 (vmovn_s32): Likewise. 8266 (vmovn_s64): Likewise. 8267 (vmovn_u16): Likewise. 8268 (vmovn_u32): Likewise. 8269 (vmovn_u64): Likewise. 8270 82712021-01-11 Martin Liska <mliska@suse.cz> 8272 8273 * gimple-if-to-switch.cc (struct condition_info): Use auto_var. 8274 (if_chain::is_beneficial): Delete clusters 8275 (find_conditions): Make second argument of conditions_in_bbs a 8276 pointer so that we control over it's lifetime. 8277 (pass_if_to_switch::execute): Delete them. 8278 82792021-01-11 Kewen Lin <linkw@linux.ibm.com> 8280 8281 * ira.c (move_unallocated_pseudos): Check other_reg and skip if 8282 it isn't set. 8283 82842021-01-09 Maciej W. Rozycki <macro@linux-mips.org> 8285 8286 * config/vax/vax.md (cc): Remove mode attribute. 8287 (subst_<cc>, subst_f<cc>): Rename to... 8288 (subst_<mode>, subst_f<VAXccnz:mode>): ... these respectively. 8289 (*cbranch<VAXint:mode>4_<VAXcc:mode>): Update for `cc' removal. 8290 (*cbranch<VAXfp:mode>4_<VAXccnz:mode>): Likewise. 8291 (*branch_<mode>, *branch_<mode>_reversed): Likewise. 8292 82932021-01-09 Maciej W. Rozycki <macro@linux-mips.org> 8294 8295 * config/vax/vax.md (subst_f<cc>): Add mode to operands and 8296 `const_double_zero'. 8297 82982021-01-09 Maciej W. Rozycki <macro@linux-mips.org> 8299 8300 * config/pdp11/pdp11.md (PDPfp): New mode iterator. 8301 (fcc_cc, fcc_ccnz): Use it. Add mode to `const_double_zero' and 8302 operands. 8303 83042021-01-09 Maciej W. Rozycki <macro@linux-mips.org> 8305 8306 * genemit.c (gen_exp) <CONST_DOUBLE>: Handle `const_double_zero' 8307 rtx. 8308 * read-rtl.c (rtx_reader::read_rtx_code): Handle machine mode 8309 with `const_double_zero'. 8310 * doc/rtl.texi (Constant Expression Types): Document it. 8311 83122021-01-09 Jakub Jelinek <jakub@redhat.com> 8313 8314 PR c++/98556 8315 * tree-cfg.c (verify_gimple_assign_binary): Allow lhs of 8316 POINTER_DIFF_EXPR to be any integral type. 8317 83182021-01-09 Jakub Jelinek <jakub@redhat.com> 8319 8320 PR rtl-optimization/98603 8321 * function.c (instantiate_virtual_regs_in_insn): For asm goto 8322 with impossible constraints, drop all SETs, CLOBBERs, drop PARALLEL 8323 if any, set ASM_OPERANDS mode to VOIDmode and change 8324 ASM_OPERANDS_OUTPUT_CONSTRAINT and ASM_OPERANDS_OUTPUT_IDX. 8325 83262021-01-09 Alexandre Oliva <oliva@gnu.org> 8327 8328 PR debug/97714 8329 * final.c (notice_source_line): Narrow down the condition to 8330 skip a line-0 marker. 8331 83322021-01-08 Sergei Trofimovich <siarheit@google.com> 8333 8334 * ipa-modref.c (merge_call_side_effects): Fix 8335 linebreak split by reordering two print calls. 8336 83372021-01-08 Ilya Leoshkevich <iii@linux.ibm.com> 8338 8339 * config/s390/vector.md (*tf_to_fprx2_0): Rename from 8340 "*mov_tf_to_fprx2_0" for consistency, fix constraint. 8341 (*tf_to_fprx2_1): Rename from "*mov_tf_to_fprx2_1" for 8342 consistency, fix constraint. 8343 83442021-01-08 Ilya Leoshkevich <iii@linux.ibm.com> 8345 8346 * config/s390/s390-c.c (s390_def_or_undef_macro): Accept 8347 callables instead of mask values. 8348 (struct target_flag_set_p): New predicate. 8349 (s390_cpu_cpp_builtins_internal): Define or undefine 8350 __LONG_DOUBLE_VX__ macro. 8351 83522021-01-08 H.J. Lu <hjl.tools@gmail.com> 8353 8354 PR target/98482 8355 * config/i386/i386.c (x86_function_profiler): Use R10 and R11 8356 to call mcount in large model with PIC for NO_PROFILE_COUNTERS 8357 targets. 8358 83592021-01-08 Richard Biener <rguenther@suse.de> 8360 8361 * tree-ssa-sccvn.c (pass_fre::execute): Reset the SCEV hash table. 8362 83632021-01-08 Richard Biener <rguenther@suse.de> 8364 8365 * tree-vect-slp.c (scalar_stmts_to_slp_tree_map_t): Fix. 8366 (vect_build_slp_tree): On cache hit release the matched 8367 scalar stmts vector. 8368 * tree-vect-stmts.c (vectorizable_store): Properly free 8369 vec_oprnds before possibly gathering them again. 8370 83712021-01-08 Richard Biener <rguenther@suse.de> 8372 8373 PR tree-optimization/98544 8374 * tree-vect-slp.c (vect_optimize_slp): Always materialize 8375 permutes at a permute node. 8376 83772021-01-08 H.J. Lu <hjl.tools@gmail.com> 8378 8379 PR target/98482 8380 * config/i386/i386.c (x86_function_profiler): Use R10 to call 8381 mcount in large model. Sorry for large model with PIC. 8382 83832021-01-08 Jakub Jelinek <jakub@redhat.com> 8384 8385 PR target/98585 8386 * config/i386/i386.opt (ix86_cmodel, ix86_incoming_stack_boundary_arg, 8387 ix86_pmode, ix86_preferred_stack_boundary_arg, ix86_regparm, 8388 ix86_veclibabi_type): Remove x_ prefix, use TargetVariable instead of 8389 TargetSave and initialize for variables with enum types. 8390 (mfentry, mstack-protector-guard-reg=, mstack-protector-guard-offset=, 8391 mstack-protector-guard-symbol=): Add Save. 8392 * config/i386/i386-options.c (ix86_function_specific_save, 8393 ix86_function_specific_restore): Don't save or restore x_ix86_cmodel, 8394 x_ix86_incoming_stack_boundary_arg, x_ix86_pmode, 8395 x_ix86_preferred_stack_boundary_arg, x_ix86_regparm, 8396 x_ix86_veclibabi_type. 8397 83982021-01-08 Richard Sandiford <richard.sandiford@arm.com> 8399 8400 * config/aarch64/aarch64-sve.md (*cnot<mode>): Extend from 8401 SVE_FULL_I to SVE_I. 8402 (*cond_cnot<mode>_2, *cond_cnot<mode>_any): Likewise. 8403 84042021-01-08 Richard Sandiford <richard.sandiford@arm.com> 8405 8406 * config/aarch64/aarch64-sve.md (*cond_uxt<mode>_2): Extend from 8407 SVE_FULL_I to SVE_I. 8408 (*cond_uxt<mode>_any): Likewise. 8409 84102021-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 8411 8412 * config/aarch64/iterators.md (Vwhalf): New iterator. 8413 * config/aarch64/aarch64-simd.md (aarch64_<sur>adalp<mode>_3): 8414 Rename to... 8415 (aarch64_<sur>adalp<mode>): ... This. Make more 8416 builtin-friendly. 8417 (<sur>sadv16qi): Adjust callsite of the above. 8418 * config/aarch64/aarch64-simd-builtins.def (sadalp, uadalp): New 8419 builtins. 8420 * config/aarch64/arm_neon.h (vpadal_s8): Reimplement using 8421 builtins. 8422 (vpadal_s16): Likewise. 8423 (vpadal_u8): Likewise. 8424 (vpadal_u16): Likewise. 8425 (vpadalq_s8): Likewise. 8426 (vpadalq_s16): Likewise. 8427 (vpadalq_s32): Likewise. 8428 (vpadalq_u8): Likewise. 8429 (vpadalq_u16): Likewise. 8430 (vpadalq_u32): Likewise. 8431 84322021-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 8433 8434 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>_3): 8435 Rename to... 8436 (aarch64_<su>abd<mode>): ... This. 8437 (<sur>sadv16qi): Adjust callsite of the above. 8438 * config/aarch64/aarch64-simd-builtins.def (sabd, uabd): Define 8439 builtins. 8440 * config/aarch64/arm_neon.h (vabd_s8): Reimplement using 8441 builtin. 8442 (vabd_s16): Likewise. 8443 (vabd_s32): Likewise. 8444 (vabd_u8): Likewise. 8445 (vabd_u16): Likewise. 8446 (vabd_u32): Likewise. 8447 (vabdq_s8): Likewise. 8448 (vabdq_s16): Likewise. 8449 (vabdq_s32): Likewise. 8450 (vabdq_u8): Likewise. 8451 (vabdq_u16): Likewise. 8452 (vabdq_u32): Likewise. 8453 84542021-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 8455 8456 * config/aarch64/aarch64-simd-builtins.def (saba, uaba): Define 8457 builtins. 8458 * config/aarch64/arm_neon.h (vaba_s8): Implement using builtin. 8459 (vaba_s16): Likewise. 8460 (vaba_s32): Likewise. 8461 (vaba_u8): Likewise. 8462 (vaba_u16): Likewise. 8463 (vaba_u32): Likewise. 8464 (vabaq_s8): Likewise. 8465 (vabaq_s16): Likewise. 8466 (vabaq_s32): Likewise. 8467 (vabaq_u8): Likewise. 8468 (vabaq_u16): Likewise. 8469 (vabaq_u32): Likewise. 8470 84712021-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 8472 8473 * config/aarch64/aarch64-simd.md (aba<mode>_3): Rename to... 8474 (aarch64_<su>aba<mode>): ... This. Handle uaba as well. 8475 Change RTL pattern to match. 8476 84772021-01-08 Kito Cheng <kito.cheng@sifive.com> 8478 8479 * common/config/riscv/riscv-common.c (riscv_current_subset_list): New. 8480 * config/riscv/riscv-c.c (riscv-subset.h): New. 8481 (INCLUDE_STRING): Define. 8482 (riscv_cpu_cpp_builtins): Add new style architecture extension 8483 test macros. 8484 * config/riscv/riscv-subset.h (riscv_subset_list::begin): New. 8485 (riscv_subset_list::end): New. 8486 (riscv_current_subset_list): New. 8487 84882021-01-08 Kito Cheng <kito.cheng@sifive.com> 8489 8490 * common/config/riscv/riscv-common.c (RISCV_DONT_CARE_VERSION): 8491 Move to riscv-subset.h. 8492 (struct riscv_subset_t): Ditto. 8493 (class riscv_subset_list): Ditto. 8494 * config/riscv/riscv-subset.h (RISCV_DONT_CARE_VERSION): Move 8495 from riscv-common.c. 8496 (struct riscv_subset_t): Ditto. 8497 (class riscv_subset_list): Ditto. 8498 * config/riscv/t-riscv ($(common_out_file)): Add file 8499 dependency. 8500 85012021-01-07 Jakub Jelinek <jakub@redhat.com> 8502 8503 PR target/98567 8504 * config/i386/i386.md (*bmi_blsi_<mode>_cmp, *bmi_blsi_<mode>_ccno): 8505 New define_insn patterns. 8506 85072021-01-07 Richard Sandiford <richard.sandiford@arm.com> 8508 8509 * config/aarch64/aarch64-sve.md (@cond_<SVE_INT_UNARY:optab><mode>) 8510 (*cond_<SVE_INT_UNARY:optab><mode>_2): Extend from SVE_FULL_I to SVE_I. 8511 (*cond_<SVE_INT_UNARY:optab><mode>_any): Likewise. 8512 85132021-01-07 Richard Sandiford <richard.sandiford@arm.com> 8514 8515 PR tree-optimization/98560 8516 * internal-fn.def (IFN_VCONDU, IFN_VCONDEQ): Use type vec_cond. 8517 * internal-fn.c (vec_cond_mask_direct): Get the data mode from 8518 argument 1. 8519 (vec_cond_direct): Likewise argument 2. 8520 (vec_condu_direct, vec_condeq_direct): Delete. 8521 (expand_vect_cond_optab_fn): Rename to... 8522 (expand_vec_cond_optab_fn): ...this, replacing old macro. 8523 (expand_vec_condu_optab_fn, expand_vec_condeq_optab_fn): Delete. 8524 (expand_vect_cond_mask_optab_fn): Rename to... 8525 (expand_vec_cond_mask_optab_fn): ...this, replacing old macro. 8526 (direct_vec_cond_mask_optab_supported_p): Treat the optab as a 8527 convert optab. 8528 (direct_vec_cond_optab_supported_p): Likewise. 8529 (direct_vec_condu_optab_supported_p): Delete. 8530 (direct_vec_condeq_optab_supported_p): Delete. 8531 * gimple-isel.cc: Include internal-fn.h. 8532 (gimple_expand_vec_cond_expr): Check that IFN_VCONDEQ is supported 8533 before using it. 8534 85352021-01-07 Richard Sandiford <richard.sandiford@arm.com> 8536 8537 PR tree-optimization/98560 8538 * gimple-isel.cc (gimple_expand_vec_cond_expr): If we fail to use 8539 IFN_VCOND{,U,EQ}, fall back on IFN_VCOND_MASK. 8540 85412021-01-07 Uroš Bizjak <ubizjak@gmail.com> 8542 8543 * config/i386/i386.md (insn): Merge from plusminus_insn, shift_insn, 8544 rotate_insn and optab code attributes. 8545 Update all uses to merged code attribute. 8546 * config/i386/sse.md: Update all uses to merged code attribute. 8547 * config/i386/mmx.md: Update all uses to merged code attribute. 8548 85492021-01-07 Jakub Jelinek <jakub@redhat.com> 8550 8551 PR tree-optimization/98568 8552 * gimple-ssa-store-merging.c (bswap_view_convert): New function. 8553 (bswap_replace): Use it. 8554 85552021-01-06 Vladimir N. Makarov <vmakarov@redhat.com> 8556 8557 PR rtl-optimization/97978 8558 * lra-int.h (lra_hard_reg_split_p): New external. 8559 * lra.c (lra_hard_reg_split_p): New global. 8560 (lra): Set up lra_hard_reg_split_p after splitting a hard reg. 8561 * lra-assigns.c (lra_assign): Don't check allocation correctness 8562 after hard reg splitting. 8563 85642021-01-06 Martin Sebor <msebor@redhat.com> 8565 8566 PR c++/98305 8567 * builtins.c (new_delete_mismatch_p): New overload. 8568 (new_delete_mismatch_p (tree, tree)): Call it. 8569 85702021-01-06 Alexandre Oliva <oliva@adacore.com> 8571 8572 * Makefile.in (T_GLIMITS_H): New. 8573 (stmp-int-hdrs): Depend on it, use it. 8574 * config/t-vxworks (T_GLIMITS_H): Override it. 8575 (vxw-glimits.h): New. 8576 85772021-01-06 Richard Biener <rguenther@suse.de> 8578 8579 PR tree-optimization/98513 8580 * value-range.cc (intersect_ranges): Compare the upper bounds 8581 for the expected relation. 8582 85832021-01-06 Gerald Pfeifer <gerald@pfeifer.com> 8584 8585 Revert: 8586 2020-12-28 Gerald Pfeifer <gerald@pfeifer.com> 8587 8588 * doc/standards.texi (HSAIL): Remove section. 8589 85902021-01-05 Samuel Thibault <samuel.thibault@ens-lyon.org> 8591 8592 * configure: Re-generate. 8593 85942021-01-05 Jakub Jelinek <jakub@redhat.com> 8595 8596 * doc/invoke.texi (-std=c++20): Adjust for the publication of 8597 ISO 14882:2020 standard. 8598 * doc/standards.texi: Likewise. 8599 86002021-01-05 Jakub Jelinek <jakub@redhat.com> 8601 8602 PR tree-optimization/94802 8603 * expr.h (maybe_optimize_sub_cmp_0): Declare. 8604 * expr.c: Include tree-pretty-print.h and flags.h. 8605 (maybe_optimize_sub_cmp_0): New function. 8606 (do_store_flag): Use it. 8607 * cfgexpand.c (expand_gimple_cond): Likewise. 8608 86092021-01-05 Richard Sandiford <richard.sandiford@arm.com> 8610 8611 * mux-utils.h (pointer_mux::m_ptr): Tweak description of contents. 8612 * rtlanal.c (simple_regno_set): Tweak description to clarify the 8613 RMW condition. 8614 86152021-01-05 Richard Biener <rguenther@suse.de> 8616 8617 PR tree-optimization/98516 8618 * tree-vect-slp.c (vect_optimize_slp): Permute the incoming 8619 lanes when materializing on a VEC_PERM node. 8620 (vectorizable_slp_permutation): Dump the permute properly. 8621 86222021-01-05 Richard Biener <rguenther@suse.de> 8623 8624 * tree-vect-slp.c (vect_slp_region): Move debug counter 8625 to cover individual subgraphs. 8626 86272021-01-05 Richard Biener <rguenther@suse.de> 8628 8629 PR tree-optimization/98428 8630 * tree-vect-slp.c (vect_build_slp_tree_1): Properly reject 8631 vector lane extracts for loop vectorization. 8632 86332021-01-05 Jakub Jelinek <jakub@redhat.com> 8634 8635 PR tree-optimization/98514 8636 * tree-ssa-reassoc.c (bb_rank): Change type from long * to 8637 int64_t *. 8638 (operand_rank): Change type from hash_map<tree, long> to 8639 hash_map<tree, int64_t>. 8640 (phi_rank): Change return type from long to int64_t. 8641 (loop_carried_phi): Change block_rank variable type from long to 8642 int64_t. 8643 (propagate_rank): Change return type, rank parameter type and 8644 op_rank variable type from long to int64_t. 8645 (find_operand_rank): Change return type from long to int64_t 8646 and change slot variable type from long * to int64_t *. 8647 (insert_operand_rank): Change rank parameter type from long to 8648 int64_t. 8649 (get_rank): Change return type and rank variable type from long to 8650 int64_t. Use PRId64 instead of ld to print the rank. 8651 (init_reassoc): Change rank variable type from long to int64_t 8652 and adjust correspondingly bb_rank and operand_rank initialization. 8653 86542021-01-05 Jakub Jelinek <jakub@redhat.com> 8655 8656 PR tree-optimization/96928 8657 * tree-ssa-phiopt.c (xor_replacement): New function. 8658 (tree_ssa_phiopt_worker): Call it. 8659 86602021-01-05 Jakub Jelinek <jakub@redhat.com> 8661 8662 PR tree-optimization/96930 8663 * match.pd ((A / (1 << B)) -> (A >> B)): If A is extended 8664 from narrower value which has the same type as 1 << B, perform 8665 the right shift on the narrower value followed by extension. 8666 86672021-01-05 Jakub Jelinek <jakub@redhat.com> 8668 8669 PR tree-optimization/96239 8670 * gimple-ssa-store-merging.c (maybe_optimize_vector_constructor): New 8671 function. 8672 (get_status_for_store_merging): Don't return BB_INVALID for blocks 8673 with potential bswap optimizable CONSTRUCTORs. 8674 (pass_store_merging::execute): Optimize vector CONSTRUCTORs with bswap 8675 if possible. 8676 86772021-01-05 Richard Biener <rguenther@suse.de> 8678 8679 PR tree-optimization/98381 8680 * tree.c (vector_element_bits): Properly compute bool vector 8681 element size. 8682 * tree-vect-loop.c (vectorizable_live_operation): Properly 8683 compute the last lane bit offset. 8684 86852021-01-05 Uroš Bizjak <ubizjak@gmail.com> 8686 8687 PR target/98522 8688 * config/i386/sse.md (sse_cvtps2pi): Redefine as define_insn_and_split. 8689 Clear the top 64 bytes of the input XMM register. 8690 (sse_cvttps2pi): Ditto. 8691 86922021-01-05 Uroš Bizjak <ubizjak@gmail.com> 8693 8694 PR target/98521 8695 * config/i386/xopintrin.h (_mm256_cmov_si256): New. 8696 86972021-01-05 H.J. Lu <hjl.tools@gmail.com> 8698 8699 PR target/98495 8700 * config/i386/xmmintrin.h (_mm_extract_pi16): Cast to unsigned 8701 short first. 8702 87032021-01-05 Claudiu Zissulescu <claziss@synopsys.com> 8704 8705 * config/arc/arc.md (maddsidi4_split): Use ACC_REG_FIRST. 8706 (umaddsidi4_split): Likewise. 8707 87082021-01-05 liuhongt <hongtao.liu@intel.com> 8709 8710 PR target/98461 8711 * config/i386/sse.md (*sse2_pmovskb_zexthisi): New 8712 define_insn_and_split for zero_extend of subreg HI of pmovskb 8713 result. 8714 (*sse2_pmovskb_zexthisi): Add new combine splitters for 8715 zero_extend of not of subreg HI of pmovskb result. 8716 87172021-01-05 Richard Sandiford <richard.sandiford@arm.com> 8718 8719 PR target/97269 8720 * explow.c (convert_memory_address_addr_space_1): Handle UNSPECs 8721 nested in CONSTs. 8722 * config/aarch64/aarch64.c (aarch64_expand_mov_immediate): Use 8723 convert_memory_address to convert symbolic immediates to ptr_mode 8724 before forcing them to memory. 8725 87262021-01-05 Richard Sandiford <richard.sandiford@arm.com> 8727 8728 PR rtl-optimization/97144 8729 * recog.c (constrain_operands): Initialize matching_operand 8730 for each alternative, rather than only doing it once. 8731 87322021-01-05 Richard Sandiford <richard.sandiford@arm.com> 8733 8734 PR rtl-optimization/98403 8735 * rtl-ssa/changes.cc (function_info::finalize_new_accesses): Explain 8736 why we don't remove call clobbers. 8737 (function_info::apply_changes_to_insn): Don't attempt to add 8738 call clobbers here. 8739 87402021-01-05 Richard Sandiford <richard.sandiford@arm.com> 8741 8742 PR tree-optimization/98371 8743 * tree-vect-loop.c (vect_reanalyze_as_main_loop): New function. 8744 (vect_analyze_loop): If an epilogue loop appears to be cheaper 8745 than the main loop, re-analyze it as a main loop before adopting 8746 it as a main loop. 8747 87482021-01-05 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> 8749 8750 PR c++/98316 8751 * configure.ac (NETLIBS): Determine using AX_LIB_SOCKET_NSL. 8752 * aclocal.m4, configure: Regenerate. 8753 * Makefile.in (NETLIBS): Define. 8754 (BACKEND): Remove $(CODYLIB). 8755 87562021-01-05 Jakub Jelinek <jakub@redhat.com> 8757 8758 PR rtl-optimization/98334 8759 * simplify-rtx.c (simplify_context::simplify_binary_operation_1): 8760 Optimize (X - 1) * Y + Y to X * Y or (X + 1) * Y - Y to X * Y. 8761 87622021-01-05 Bernd Edlinger <bernd.edlinger@hotmail.de> 8763 8764 * tree-inline.c (expand_call_inline): Restore input_location. 8765 Return result from recursive call. 8766 87672021-01-04 Richard Sandiford <richard.sandiford@arm.com> 8768 8769 PR tree-optimization/95401 8770 * config/aarch64/aarch64-sve-builtins.cc 8771 (gimple_folder::load_store_cookie): Use bits rather than bytes 8772 for the alignment argument to IFN_MASK_LOAD and IFN_MASK_STORE. 8773 * gimple-fold.c (gimple_fold_mask_load_store_mem_ref): Likewise. 8774 * tree-vect-stmts.c (vectorizable_store): Likewise. 8775 (vectorizable_load): Likewise. 8776 87772021-01-04 Richard Biener <rguenther@suse.de> 8778 8779 PR tree-optimization/98308 8780 * tree-vect-stmts.c (vectorizable_load): Set invariant mask 8781 SLP vectype. 8782 87832021-01-04 Jakub Jelinek <jakub@redhat.com> 8784 8785 PR tree-optimization/95771 8786 * tree-ssa-loop-niter.c (number_of_iterations_popcount): Handle types 8787 with precision smaller than int's precision and types with precision 8788 twice as large as long long. Formatting fixes. 8789 87902021-01-04 Richard Biener <rguenther@suse.de> 8791 8792 PR tree-optimization/98464 8793 * tree-ssa-sccvn.c (vn_valueize_for_srt): Rename from ... 8794 (vn_valueize_wrapper): ... this. Temporarily adjust vn_context_bb. 8795 (process_bb): Adjust. 8796 87972021-01-04 Matthew Malcomson <matthew.malcomson@arm.com> 8798 8799 PR other/98437 8800 * doc/invoke.texi (-fsanitize=address): Fix wording describing 8801 clash with -fsanitize=hwaddress. 8802 88032021-01-04 Richard Biener <rguenther@suse.de> 8804 8805 PR tree-optimization/98282 8806 * tree-ssa-sccvn.c (vn_get_stmt_kind): Classify tcc_reference on 8807 invariants as VN_NARY. 8808 88092021-01-04 Richard Sandiford <richard.sandiford@arm.com> 8810 8811 PR target/89057 8812 * config/aarch64/aarch64-simd.md (aarch64_combine<mode>): Accept 8813 aarch64_simd_reg_or_zero for operand 2. Use the combinez patterns 8814 to handle zero operands. 8815 88162021-01-04 Richard Sandiford <richard.sandiford@arm.com> 8817 8818 * config/aarch64/aarch64.c (offset_6bit_signed_scaled_p): New function. 8819 (offset_6bit_unsigned_scaled_p): Fix typo in comment. 8820 (aarch64_sve_prefetch_operand_p): Accept MUL VLs in the range 8821 [-32, 31]. 8822 88232021-01-04 Richard Biener <rguenther@suse.de> 8824 8825 PR tree-optimization/98393 8826 * tree-vect-slp.c (vect_build_slp_tree): Properly zero matches 8827 when hitting the limit. 8828 88292021-01-04 Richard Biener <rguenther@suse.de> 8830 8831 PR tree-optimization/98291 8832 * tree-vect-loop.c (vectorizable_reduction): Bypass 8833 associativity check for SLP reductions with VF 1. 8834 88352021-01-04 Jakub Jelinek <jakub@redhat.com> 8836 8837 PR tree-optimization/96782 8838 * match.pd (x == ~x -> false, x != ~x -> true): New simplifications. 8839 88402021-01-04 Bernd Edlinger <bernd.edlinger@hotmail.de> 8841 8842 * collect-utils.c (collect_execute): Check dumppfx. 8843 * collect2.c (maybe_run_lto_and_relink, do_link): Pass atsuffix 8844 to collect_execute. 8845 (do_link): Add new parameter atsuffix. 8846 (main): Handle -dumpdir option. Skip one argument for 8847 -o, -isystem and -B options. 8848 * gcc.c (make_at_file): New helper function. 8849 (close_at_file): Use it. 8850 88512021-01-02 Iain Sandoe <iain@sandoe.co.uk> 8852 8853 * config/darwin.h (MIN_LD64_NO_COAL_SECTS): Adjust. 8854 Amend handling for LD64_VERSION fallback defaults. 8855 88562021-01-02 Iain Sandoe <iain@sandoe.co.uk> 8857 8858 * config.gcc: Compute default version information 8859 from the configured target. Likewise defaults for 8860 ld64. 8861 * config/darwin10.h: Removed. 8862 * config/darwin12.h: Removed. 8863 * config/darwin9.h: Removed. 8864 * config/rs6000/darwin8.h: Removed. 8865 88662021-01-02 Iain Sandoe <iain@sandoe.co.uk> 8867 8868 * config/darwin9.h (ASM_OUTPUT_ALIGNED_COMMON): Delete. 8869 88702021-01-02 Iain Sandoe <iain@sandoe.co.uk> 8871 8872 * config/darwin9.h (STACK_CHECK_STATIC_BUILTIN): Move from here.. 8873 * config/darwin.h (STACK_CHECK_STATIC_BUILTIN): .. to here. 8874 88752021-01-02 Iain Sandoe <iain@sandoe.co.uk> 8876 8877 * config/darwin10.h (LINK_GCC_C_SEQUENCE_SPEC): Move from 8878 here... 8879 * config/darwin.h (LINK_GCC_C_SEQUENCE_SPEC): ... to here. 8880 88812021-01-02 Iain Sandoe <iain@sandoe.co.uk> 8882 8883 * config/darwin10.h (LINK_GCC_C_SEQUENCE_SPEC): Move the spec 8884 for the Darwin10 unwinder stub from here ... 8885 * config/darwin.h (LINK_COMMAND_SPEC_A): ... to here. 8886 88872021-01-02 Iain Sandoe <iain@sandoe.co.uk> 8888 8889 * config/darwin.h (DSYMUTIL_SPEC): Default to DWARF 8890 (ASM_DEBUG_SPEC):Only define if the assembler supports 8891 stabs. 8892 (PREFERRED_DEBUGGING_TYPE): Default to DWARF. 8893 (DARWIN_PREFER_DWARF): Define. 8894 * config/darwin9.h (PREFERRED_DEBUGGING_TYPE): Remove. 8895 (DARWIN_PREFER_DWARF): Likewise 8896 (DSYMUTIL_SPEC): Likewise. 8897 (COLLECT_RUN_DSYMUTIL): Likewise. 8898 (ASM_DEBUG_SPEC): Likewise. 8899 (ASM_DEBUG_OPTION_SPEC): Likewise. 8900 89012021-01-02 Jan Hubicka <jh@suse.cz> 8902 8903 * cfg.c (free_block): ggc_free bb. 8904 89052021-01-01 Jakub Jelinek <jakub@redhat.com> 8906 8907 * gcc.c (process_command): Update copyright notice dates. 8908 * gcov-dump.c (print_version): Ditto. 8909 * gcov.c (print_version): Ditto. 8910 * gcov-tool.c (print_version): Ditto. 8911 * gengtype.c (create_file): Ditto. 8912 * doc/cpp.texi: Bump @copying's copyright year. 8913 * doc/cppinternals.texi: Ditto. 8914 * doc/gcc.texi: Ditto. 8915 * doc/gccint.texi: Ditto. 8916 * doc/gcov.texi: Ditto. 8917 * doc/install.texi: Ditto. 8918 * doc/invoke.texi: Ditto. 8919 89202021-01-01 Jakub Jelinek <jakub@redhat.com> 8921 8922 * ChangeLog-2020: Rotate ChangeLog. New file. 8923 8924 8925Copyright (C) 2021 Free Software Foundation, Inc. 8926 8927Copying and distribution of this file, with or without modification, 8928are permitted in any medium without royalty provided the copyright 8929notice and this notice are preserved. 8930