1 /* Prototypes for exported functions defined in arm.c and pe.c
2    Copyright (C) 1999-2021 Free Software Foundation, Inc.
3    Contributed by Richard Earnshaw (rearnsha@arm.com)
4    Minor hacks by Nick Clifton (nickc@cygnus.com)
5 
6    This file is part of GCC.
7 
8    GCC is free software; you can redistribute it and/or modify
9    it under the terms of the GNU General Public License as published by
10    the Free Software Foundation; either version 3, or (at your option)
11    any later version.
12 
13    GCC is distributed in the hope that it will be useful,
14    but WITHOUT ANY WARRANTY; without even the implied warranty of
15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16    GNU General Public License for more details.
17 
18    You should have received a copy of the GNU General Public License
19    along with GCC; see the file COPYING3.  If not see
20    <http://www.gnu.org/licenses/>.  */
21 
22 #ifndef GCC_ARM_PROTOS_H
23 #define GCC_ARM_PROTOS_H
24 
25 #include "sbitmap.h"
26 
27 extern enum unwind_info_type arm_except_unwind_info (struct gcc_options *);
28 extern int use_return_insn (int, rtx);
29 extern bool use_simple_return_p (void);
30 extern enum reg_class arm_regno_class (int);
31 extern bool arm_check_builtin_call (location_t , vec<location_t> , tree,
32 				    tree, unsigned int, tree *);
33 extern void arm_load_pic_register (unsigned long, rtx);
34 extern int arm_volatile_func (void);
35 extern void arm_expand_prologue (void);
36 extern void arm_expand_epilogue (bool);
37 extern void arm_declare_function_name (FILE *, const char *, tree);
38 extern void arm_asm_declare_function_name (FILE *, const char *, tree);
39 extern void thumb2_expand_return (bool);
40 extern const char *arm_strip_name_encoding (const char *);
41 extern void arm_asm_output_labelref (FILE *, const char *);
42 extern void thumb2_asm_output_opcode (FILE *);
43 extern unsigned long arm_current_func_type (void);
44 extern HOST_WIDE_INT arm_compute_initial_elimination_offset (unsigned int,
45 							     unsigned int);
46 extern HOST_WIDE_INT thumb_compute_initial_elimination_offset (unsigned int,
47 							       unsigned int);
48 extern unsigned int arm_dbx_register_number (unsigned int);
49 extern void arm_output_fn_unwind (FILE *, bool);
50 
51 extern rtx arm_expand_builtin (tree exp, rtx target, rtx subtarget
52 			       ATTRIBUTE_UNUSED, machine_mode mode
53 			       ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED);
54 extern tree arm_builtin_decl (unsigned code, bool initialize_p
55 			      ATTRIBUTE_UNUSED);
56 extern void arm_init_builtins (void);
57 extern void arm_atomic_assign_expand_fenv (tree *hold, tree *clear, tree *update);
58 extern rtx arm_simd_vect_par_cnst_half (machine_mode mode, bool high);
59 extern bool arm_simd_check_vect_par_cnst_half_p (rtx op, machine_mode mode,
60 						 bool high);
61 extern void arm_emit_speculation_barrier_function (void);
62 extern void arm_decompose_di_binop (rtx, rtx, rtx *, rtx *, rtx *, rtx *);
63 extern bool arm_q_bit_access (void);
64 extern bool arm_ge_bits_access (void);
65 extern bool arm_target_insn_ok_for_lob (rtx);
66 
67 #ifdef RTX_CODE
68 enum reg_class
69 arm_mode_base_reg_class (machine_mode);
70 extern void arm_gen_unlikely_cbranch (enum rtx_code, machine_mode cc_mode,
71 				      rtx label_ref);
72 extern bool arm_vector_mode_supported_p (machine_mode);
73 extern bool arm_small_register_classes_for_mode_p (machine_mode);
74 extern int const_ok_for_arm (HOST_WIDE_INT);
75 extern int const_ok_for_op (HOST_WIDE_INT, enum rtx_code);
76 extern int const_ok_for_dimode_op (HOST_WIDE_INT, enum rtx_code);
77 extern void thumb1_gen_const_int_rtl (rtx, HOST_WIDE_INT);
78 extern void thumb1_gen_const_int_print (rtx, HOST_WIDE_INT);
79 extern int arm_split_constant (RTX_CODE, machine_mode, rtx,
80 			       HOST_WIDE_INT, rtx, rtx, int);
81 extern int legitimate_pic_operand_p (rtx);
82 extern rtx legitimize_pic_address (rtx, machine_mode, rtx, rtx, bool);
83 extern rtx legitimize_tls_address (rtx, rtx);
84 extern bool arm_legitimate_address_p (machine_mode, rtx, bool);
85 extern int arm_legitimate_address_outer_p (machine_mode, rtx, RTX_CODE, int);
86 extern int thumb_legitimate_offset_p (machine_mode, HOST_WIDE_INT);
87 extern int thumb1_legitimate_address_p (machine_mode, rtx, int);
88 extern bool ldm_stm_operation_p (rtx, bool, machine_mode mode,
89                                  bool, bool);
90 extern bool clear_operation_p (rtx, bool);
91 extern int arm_const_double_rtx (rtx);
92 extern int vfp3_const_double_rtx (rtx);
93 extern int simd_immediate_valid_for_move (rtx, machine_mode, rtx *, int *);
94 extern int neon_immediate_valid_for_logic (rtx, machine_mode, int, rtx *,
95 					   int *);
96 extern int neon_immediate_valid_for_shift (rtx, machine_mode, rtx *,
97 					   int *, bool);
98 extern char *neon_output_logic_immediate (const char *, rtx *,
99 					  machine_mode, int, int);
100 extern char *neon_output_shift_immediate (const char *, char, rtx *,
101 					  machine_mode, int, bool);
102 extern void neon_pairwise_reduce (rtx, rtx, machine_mode,
103 				  rtx (*) (rtx, rtx, rtx));
104 extern rtx neon_make_constant (rtx, bool generate = true);
105 extern tree arm_builtin_vectorized_function (unsigned int, tree, tree);
106 extern void neon_expand_vector_init (rtx, rtx);
107 extern void neon_lane_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT, const_tree);
108 extern void arm_const_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT);
109 extern HOST_WIDE_INT neon_element_bits (machine_mode);
110 extern void neon_emit_pair_result_insn (machine_mode,
111 					rtx (*) (rtx, rtx, rtx, rtx),
112 					rtx, rtx, rtx);
113 extern void neon_disambiguate_copy (rtx *, rtx *, rtx *, unsigned int);
114 extern void neon_split_vcombine (rtx op[3]);
115 extern enum reg_class coproc_secondary_reload_class (machine_mode, rtx,
116 						     bool);
117 extern bool arm_tls_referenced_p (rtx);
118 
119 extern int arm_coproc_mem_operand (rtx, bool);
120 extern int arm_coproc_mem_operand_no_writeback (rtx);
121 extern int arm_coproc_mem_operand_wb (rtx, int);
122 extern int neon_vector_mem_operand (rtx, int, bool);
123 extern int mve_vector_mem_operand (machine_mode, rtx, bool);
124 extern int neon_struct_mem_operand (rtx);
125 
126 extern rtx *neon_vcmla_lane_prepare_operands (rtx *);
127 
128 extern int tls_mentioned_p (rtx);
129 extern int symbol_mentioned_p (rtx);
130 extern int label_mentioned_p (rtx);
131 extern RTX_CODE minmax_code (rtx);
132 extern bool arm_sat_operator_match (rtx, rtx, int *, bool *);
133 extern int adjacent_mem_locations (rtx, rtx);
134 extern bool gen_ldm_seq (rtx *, int, bool);
135 extern bool gen_stm_seq (rtx *, int);
136 extern bool gen_const_stm_seq (rtx *, int);
137 extern rtx arm_gen_load_multiple (int *, int, rtx, int, rtx, HOST_WIDE_INT *);
138 extern rtx arm_gen_store_multiple (int *, int, rtx, int, rtx, HOST_WIDE_INT *);
139 extern bool offset_ok_for_ldrd_strd (HOST_WIDE_INT);
140 extern bool operands_ok_ldrd_strd (rtx, rtx, rtx, HOST_WIDE_INT, bool, bool);
141 extern bool gen_operands_ldrd_strd (rtx *, bool, bool, bool);
142 extern bool valid_operands_ldrd_strd (rtx *, bool);
143 extern int arm_gen_cpymemqi (rtx *);
144 extern bool gen_cpymem_ldrd_strd (rtx *);
145 extern machine_mode arm_select_cc_mode (RTX_CODE, rtx, rtx);
146 extern machine_mode arm_select_dominance_cc_mode (rtx, rtx,
147 						       HOST_WIDE_INT);
148 extern rtx arm_gen_compare_reg (RTX_CODE, rtx, rtx, rtx);
149 extern rtx arm_gen_return_addr_mask (void);
150 extern void arm_reload_in_hi (rtx *);
151 extern void arm_reload_out_hi (rtx *);
152 extern int arm_max_const_double_inline_cost (void);
153 extern int arm_const_double_inline_cost (rtx);
154 extern bool arm_const_double_by_parts (rtx);
155 extern bool arm_const_double_by_immediates (rtx);
156 extern rtx arm_load_function_descriptor (rtx funcdesc);
157 extern void arm_emit_call_insn (rtx, rtx, bool);
158 bool detect_cmse_nonsecure_call (tree);
159 extern const char *output_call (rtx *);
160 void arm_emit_movpair (rtx, rtx);
161 extern const char *output_mov_long_double_arm_from_arm (rtx *);
162 extern const char *output_move_double (rtx *, bool, int *count);
163 extern const char *output_move_quad (rtx *);
164 extern int arm_count_output_move_double_insns (rtx *);
165 extern int arm_count_ldrdstrd_insns (rtx *, bool);
166 extern const char *output_move_vfp (rtx *operands);
167 extern const char *output_move_neon (rtx *operands);
168 extern int arm_attr_length_move_neon (rtx_insn *);
169 extern int arm_address_offset_is_imm (rtx_insn *);
170 extern const char *output_add_immediate (rtx *);
171 extern const char *arithmetic_instr (rtx, int);
172 extern void output_ascii_pseudo_op (FILE *, const unsigned char *, int);
173 extern const char *output_return_instruction (rtx, bool, bool, bool);
174 extern const char *output_probe_stack_range (rtx, rtx);
175 extern void arm_poke_function_name (FILE *, const char *);
176 extern void arm_final_prescan_insn (rtx_insn *);
177 extern int arm_debugger_arg_offset (int, rtx);
178 extern bool arm_is_long_call_p (tree);
179 extern int    arm_emit_vector_const (FILE *, rtx);
180 extern void arm_emit_fp16_const (rtx c);
181 extern const char * arm_output_load_gr (rtx *);
182 extern const char *vfp_output_vstmd (rtx *);
183 extern void arm_output_multireg_pop (rtx *, bool, rtx, bool, bool);
184 extern void arm_set_return_address (rtx, rtx);
185 extern int arm_eliminable_register (rtx);
186 extern const char *arm_output_shift(rtx *, int);
187 extern const char *arm_output_iwmmxt_shift_immediate (const char *, rtx *, bool);
188 extern const char *arm_output_iwmmxt_tinsr (rtx *);
189 extern unsigned int arm_sync_loop_insns (rtx , rtx *);
190 extern int arm_attr_length_push_multi(rtx, rtx);
191 extern int arm_attr_length_pop_multi(rtx *, bool, bool);
192 extern void arm_expand_compare_and_swap (rtx op[]);
193 extern void arm_split_compare_and_swap (rtx op[]);
194 extern void arm_split_atomic_op (enum rtx_code, rtx, rtx, rtx, rtx, rtx, rtx);
195 extern rtx arm_load_tp (rtx);
196 extern bool arm_coproc_builtin_available (enum unspecv);
197 extern bool arm_coproc_ldc_stc_legitimate_address (rtx);
198 
199 #if defined TREE_CODE
200 extern void arm_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree);
201 extern bool arm_pad_reg_upward (machine_mode, tree, int);
202 #endif
203 extern int arm_apply_result_size (void);
204 
205 #endif /* RTX_CODE */
206 
207 /* Thumb functions.  */
208 extern void arm_init_expanders (void);
209 extern const char *thumb1_unexpanded_epilogue (void);
210 extern void thumb1_expand_prologue (void);
211 extern void thumb1_expand_epilogue (void);
212 extern const char *thumb1_output_interwork (void);
213 extern int thumb_shiftable_const (unsigned HOST_WIDE_INT);
214 #ifdef RTX_CODE
215 extern enum arm_cond_code maybe_get_arm_condition_code (rtx);
216 extern void thumb1_final_prescan_insn (rtx_insn *);
217 extern void thumb2_final_prescan_insn (rtx_insn *);
218 extern const char *thumb_load_double_from_address (rtx *);
219 extern const char *thumb_output_move_mem_multiple (int, rtx *);
220 extern const char *thumb_call_via_reg (rtx);
221 extern void thumb_expand_cpymemqi (rtx *);
222 extern rtx arm_return_addr (int, rtx);
223 extern void thumb_reload_out_hi (rtx *);
224 extern void thumb_set_return_address (rtx, rtx);
225 extern const char *thumb1_output_casesi (rtx *);
226 extern const char *thumb2_output_casesi (rtx *);
227 #endif
228 
229 /* Defined in pe.c.  */
230 extern int arm_dllexport_name_p (const char *);
231 extern int arm_dllimport_name_p (const char *);
232 
233 #ifdef TREE_CODE
234 extern void arm_pe_unique_section (tree, int);
235 extern void arm_pe_encode_section_info (tree, rtx, int);
236 extern int arm_dllexport_p (tree);
237 extern int arm_dllimport_p (tree);
238 extern void arm_mark_dllexport (tree);
239 extern void arm_mark_dllimport (tree);
240 extern bool arm_change_mode_p (tree);
241 #endif
242 
243 extern tree arm_valid_target_attribute_tree (tree, struct gcc_options *,
244 					     struct gcc_options *);
245 extern void arm_configure_build_target (struct arm_build_target *,
246 					struct cl_target_option *, bool);
247 extern void arm_option_reconfigure_globals (void);
248 extern void arm_options_perform_arch_sanity_checks (void);
249 extern void arm_pr_long_calls (struct cpp_reader *);
250 extern void arm_pr_no_long_calls (struct cpp_reader *);
251 extern void arm_pr_long_calls_off (struct cpp_reader *);
252 
253 extern const char *arm_mangle_type (const_tree);
254 extern const char *arm_mangle_builtin_type (const_tree);
255 
256 extern void arm_order_regs_for_local_alloc (void);
257 
258 extern int arm_max_conditional_execute ();
259 
260 /* Vectorizer cost model implementation.  */
261 struct cpu_vec_costs {
262   const int scalar_stmt_cost;   /* Cost of any scalar operation, excluding
263 				   load and store.  */
264   const int scalar_load_cost;   /* Cost of scalar load.  */
265   const int scalar_store_cost;  /* Cost of scalar store.  */
266   const int vec_stmt_cost;      /* Cost of any vector operation, excluding
267                                    load, store, vector-to-scalar and
268                                    scalar-to-vector operation.  */
269   const int vec_to_scalar_cost;    /* Cost of vect-to-scalar operation.  */
270   const int scalar_to_vec_cost;    /* Cost of scalar-to-vector operation.  */
271   const int vec_align_load_cost;   /* Cost of aligned vector load.  */
272   const int vec_unalign_load_cost; /* Cost of unaligned vector load.  */
273   const int vec_unalign_store_cost; /* Cost of unaligned vector load.  */
274   const int vec_store_cost;        /* Cost of vector store.  */
275   const int cond_taken_branch_cost;    /* Cost of taken branch for vectorizer
276 					  cost model.  */
277   const int cond_not_taken_branch_cost;/* Cost of not taken branch for
278 					  vectorizer cost model.  */
279 };
280 
281 #ifdef RTX_CODE
282 /* This needs to be here because we need RTX_CODE and similar.  */
283 
284 struct cpu_cost_table;
285 
286 /* Addressing mode operations.  Used to index tables in struct
287    addr_mode_cost_table.  */
288 enum arm_addr_mode_op
289 {
290    AMO_DEFAULT,
291    AMO_NO_WB,	/* Offset with no writeback.  */
292    AMO_WB,	/* Offset with writeback.  */
293    AMO_MAX	/* For array size.  */
294 };
295 
296 /* Table of additional costs in units of COSTS_N_INSNS() when using
297    addressing modes for each access type.  */
298 struct addr_mode_cost_table
299 {
300    const int integer[AMO_MAX];
301    const int fp[AMO_MAX];
302    const int vector[AMO_MAX];
303 };
304 
305 /* Dump function ARM_PRINT_TUNE_INFO should be updated whenever this
306    structure is modified.  */
307 
308 struct tune_params
309 {
310   const struct cpu_cost_table *insn_extra_cost;
311   const struct addr_mode_cost_table *addr_mode_costs;
312   bool (*sched_adjust_cost) (rtx_insn *, int, rtx_insn *, int *);
313   int (*branch_cost) (bool, bool);
314   /* Vectorizer costs.  */
315   const struct cpu_vec_costs* vec_costs;
316   int constant_limit;
317   /* Maximum number of instructions to conditionalise.  */
318   int max_insns_skipped;
319   /* Maximum number of instructions to inline calls to memset.  */
320   int max_insns_inline_memset;
321   /* Issue rate of the processor.  */
322   unsigned int issue_rate;
323   /* Explicit prefetch data.  */
324   struct
325     {
326       int num_slots;
327       int l1_cache_size;
328       int l1_cache_line_size;
329     } prefetch;
330   enum {PREF_CONST_POOL_FALSE, PREF_CONST_POOL_TRUE}
331     prefer_constant_pool: 1;
332   /* Prefer STRD/LDRD instructions over PUSH/POP/LDM/STM.  */
333   enum {PREF_LDRD_FALSE, PREF_LDRD_TRUE} prefer_ldrd_strd: 1;
334   /* The preference for non short cirtcuit operation when optimizing for
335      performance. The first element covers Thumb state and the second one
336      is for ARM state.  */
337   enum log_op_non_short_circuit {LOG_OP_NON_SHORT_CIRCUIT_FALSE,
338 				 LOG_OP_NON_SHORT_CIRCUIT_TRUE};
339   log_op_non_short_circuit logical_op_non_short_circuit_thumb: 1;
340   log_op_non_short_circuit logical_op_non_short_circuit_arm: 1;
341   /* Prefer 32-bit encoding instead of flag-setting 16-bit encoding.  */
342   enum {DISPARAGE_FLAGS_NEITHER, DISPARAGE_FLAGS_PARTIAL, DISPARAGE_FLAGS_ALL}
343     disparage_flag_setting_t16_encodings: 2;
344   /* Prefer to inline string operations like memset by using Neon.  */
345   enum {PREF_NEON_STRINGOPS_FALSE, PREF_NEON_STRINGOPS_TRUE}
346     string_ops_prefer_neon: 1;
347   /* Bitfield encoding the fusible pairs of instructions.  Use FUSE_OPS
348      in an initializer if multiple fusion operations are supported on a
349      target.  */
350   enum fuse_ops
351   {
352     FUSE_NOTHING   = 0,
353     FUSE_MOVW_MOVT = 1 << 0,
354     FUSE_AES_AESMC = 1 << 1
355   } fusible_ops: 2;
356   /* Depth of scheduling queue to check for L2 autoprefetcher.  */
357   enum {SCHED_AUTOPREF_OFF, SCHED_AUTOPREF_RANK, SCHED_AUTOPREF_FULL}
358     sched_autopref: 2;
359 };
360 
361 /* Smash multiple fusion operations into a type that can be used for an
362    initializer.  */
363 #define FUSE_OPS(x) ((tune_params::fuse_ops) (x))
364 
365 extern const struct tune_params *current_tune;
366 extern int vfp3_const_double_for_fract_bits (rtx);
367 /* return power of two from operand, otherwise 0.  */
368 extern int vfp3_const_double_for_bits (rtx);
369 
370 extern void arm_emit_coreregs_64bit_shift (enum rtx_code, rtx, rtx, rtx, rtx,
371 					   rtx);
372 extern bool arm_fusion_enabled_p (tune_params::fuse_ops);
373 extern bool arm_valid_symbolic_address_p (rtx);
374 extern bool arm_validize_comparison (rtx *, rtx *, rtx *);
375 extern bool arm_expand_vector_compare (rtx, rtx_code, rtx, rtx, bool);
376 #endif /* RTX_CODE */
377 
378 extern bool arm_gen_setmem (rtx *);
379 extern void arm_expand_vcond (rtx *, machine_mode);
380 extern void arm_expand_vec_perm (rtx target, rtx op0, rtx op1, rtx sel);
381 
382 extern bool arm_autoinc_modes_ok_p (machine_mode, enum arm_auto_incmodes);
383 
384 extern void arm_emit_eabi_attribute (const char *, int, int);
385 
386 extern void arm_reset_previous_fndecl (void);
387 extern void save_restore_target_globals (tree);
388 
389 /* Defined in gcc/common/config/arm-common.c.  */
390 extern const char *arm_rewrite_selected_cpu (const char *name);
391 
392 /* Defined in gcc/common/config/arm-c.c.  */
393 extern void arm_lang_object_attributes_init (void);
394 extern void arm_register_target_pragmas (void);
395 extern void arm_cpu_cpp_builtins (struct cpp_reader *);
396 
397 /* Defined in arm-d.c  */
398 extern void arm_d_target_versions (void);
399 extern void arm_d_register_target_info (void);
400 
401 extern bool arm_is_constant_pool_ref (rtx);
402 
403 /* The bits in this mask specify which instruction scheduling options should
404    be used.  */
405 extern unsigned int tune_flags;
406 
407 /* Nonzero if this chip supports the ARM Architecture 4 extensions.  */
408 extern int arm_arch4;
409 
410 /* Nonzero if this chip supports the ARM Architecture 4t extensions.  */
411 extern int arm_arch4t;
412 
413 /* Nonzero if this chip supports the ARM Architecture 5t extensions.  */
414 extern int arm_arch5t;
415 
416 /* Nonzero if this chip supports the ARM Architecture 5te extensions.  */
417 extern int arm_arch5te;
418 
419 /* Nonzero if this chip supports the ARM Architecture 6 extensions.  */
420 extern int arm_arch6;
421 
422 /* Nonzero if this chip supports the ARM 6K extensions.  */
423 extern int arm_arch6k;
424 
425 /* Nonzero if this chip supports the ARM 6KZ extensions.  */
426 extern int arm_arch6kz;
427 
428 /* Nonzero if instructions present in ARMv6-M can be used.  */
429 extern int arm_arch6m;
430 
431 /* Nonzero if this chip supports the ARM 7 extensions.  */
432 extern int arm_arch7;
433 
434 /* Nonzero if this chip supports the Large Physical Address Extension.  */
435 extern int arm_arch_lpae;
436 
437 /* Nonzero if instructions not present in the 'M' profile can be used.  */
438 extern int arm_arch_notm;
439 
440 /* Nonzero if instructions present in ARMv7E-M can be used.  */
441 extern int arm_arch7em;
442 
443 /* Nonzero if instructions present in ARMv8 can be used.  */
444 extern int arm_arch8;
445 
446 /* Nonzero if this chip can benefit from load scheduling.  */
447 extern int arm_ld_sched;
448 
449 /* Nonzero if this chip is a StrongARM.  */
450 extern int arm_tune_strongarm;
451 
452 /* Nonzero if this chip supports Intel Wireless MMX technology.  */
453 extern int arm_arch_iwmmxt;
454 
455 /* Nonzero if this chip supports Intel Wireless MMX2 technology.  */
456 extern int arm_arch_iwmmxt2;
457 
458 /* Nonzero if this chip is an XScale.  */
459 extern int arm_arch_xscale;
460 
461 /* Nonzero if tuning for XScale  */
462 extern int arm_tune_xscale;
463 
464 /* Nonzero if we want to tune for stores that access the write-buffer.
465    This typically means an ARM6 or ARM7 with MMU or MPU.  */
466 extern int arm_tune_wbuf;
467 
468 /* Nonzero if tuning for Cortex-A9.  */
469 extern int arm_tune_cortex_a9;
470 
471 /* Nonzero if we should define __THUMB_INTERWORK__ in the
472    preprocessor.
473    XXX This is a bit of a hack, it's intended to help work around
474    problems in GLD which doesn't understand that armv5t code is
475    interworking clean.  */
476 extern int arm_cpp_interwork;
477 
478 /* Nonzero if chip supports Thumb 1.  */
479 extern int arm_arch_thumb1;
480 
481 /* Nonzero if chip supports Thumb 2.  */
482 extern int arm_arch_thumb2;
483 
484 /* Nonzero if chip supports integer division instruction.  */
485 extern int arm_arch_arm_hwdiv;
486 extern int arm_arch_thumb_hwdiv;
487 
488 /* Nonzero if chip disallows volatile memory access in IT block.  */
489 extern int arm_arch_no_volatile_ce;
490 
491 /* Structure defining the current overall architectural target and tuning.  */
492 struct arm_build_target
493 {
494   /* Name of the target CPU, if known, or NULL if the target CPU was not
495      specified by the user (and inferred from the -march option).  */
496   const char *core_name;
497   /* Name of the target ARCH.  NULL if there is a selected CPU.  */
498   const char *arch_name;
499   /* Preprocessor substring (never NULL).  */
500   const char *arch_pp_name;
501   /* The base architecture value.  */
502   enum base_architecture base_arch;
503   /* The profile letter for the architecture, upper case by convention.  */
504   char profile;
505   /* Bitmap encapsulating the isa_bits for the target environment.  */
506   sbitmap isa;
507   /* Flags used for tuning.  Long term, these move into tune_params.  */
508   unsigned int tune_flags;
509   /* Tables with more detailed tuning information.  */
510   const struct tune_params *tune;
511   /* CPU identifier for the tuning target.  */
512   enum processor_type tune_core;
513 };
514 
515 extern struct arm_build_target arm_active_target;
516 
517 /* Table entry for a CPU alias.  */
518 struct cpu_alias
519 {
520   /* The alias name.  */
521   const char *const name;
522   /* True if the name should be displayed in help text listing cpu names.  */
523   bool visible;
524 };
525 
526 /* Table entry for an architectural feature extension.  */
527 struct cpu_arch_extension
528 {
529   /* Feature name.  */
530   const char *const name;
531   /* True if the option is negative (removes extensions).  */
532   bool remove;
533   /* True if the option is an alias for another option with identical effect;
534      the option will be ignored for canonicalization.  */
535   bool alias;
536   /* The modifier bits.  */
537   const enum isa_feature isa_bits[isa_num_bits];
538 };
539 
540 /* Common elements of both CPU and architectural options.  */
541 struct cpu_arch_option
542 {
543   /* Name for this option.  */
544   const char *name;
545   /* List of feature extensions permitted.  */
546   const struct cpu_arch_extension *extensions;
547   /* Standard feature bits.  */
548   enum isa_feature isa_bits[isa_num_bits];
549 };
550 
551 /* Table entry for an architecture entry.  */
552 struct arch_option
553 {
554   /* Common option fields.  */
555   cpu_arch_option common;
556   /* Short string for this architecture.  */
557   const char *arch;
558   /* Base architecture, from which this specific architecture is derived.  */
559   enum base_architecture base_arch;
560   /* The profile letter for the architecture, upper case by convention.  */
561   const char profile;
562   /* Default tune target (in the absence of any more specific data).  */
563   enum processor_type tune_id;
564 };
565 
566 /* Table entry for a CPU entry.  */
567 struct cpu_option
568 {
569   /* Common option fields.  */
570   cpu_arch_option common;
571   /* List of aliases for this CPU.  */
572   const struct cpu_alias *aliases;
573   /* Architecture upon which this CPU is based.  */
574   enum arch_type arch;
575 };
576 
577 extern const arch_option all_architectures[];
578 extern const cpu_option all_cores[];
579 
580 const cpu_option *arm_parse_cpu_option_name (const cpu_option *, const char *,
581 					     const char *, bool = true);
582 const arch_option *arm_parse_arch_option_name (const arch_option *,
583 					       const char *, const char *, bool = true);
584 void arm_parse_option_features (sbitmap, const cpu_arch_option *,
585 				const char *);
586 
587 void arm_initialize_isa (sbitmap, const enum isa_feature *);
588 
589 const char * arm_gen_far_branch (rtx *, int, const char * , const char *);
590 
591 bool arm_mve_immediate_check(rtx, machine_mode, bool);
592 #endif /* ! GCC_ARM_PROTOS_H */
593