1 /* Declarations for the C-SKY back end. 2 Copyright (C) 2018-2021 Free Software Foundation, Inc. 3 Contributed by C-SKY Microsystems and Mentor Graphics. 4 5 This file is part of GCC. 6 7 GCC is free software; you can redistribute it and/or modify it 8 under the terms of the GNU General Public License as published 9 by the Free Software Foundation; either version 3, or (at your 10 option) any later version. 11 12 GCC is distributed in the hope that it will be useful, but WITHOUT 13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 15 License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with GCC; see the file COPYING3. If not see 19 <http://www.gnu.org/licenses/>. */ 20 21 22 #ifndef GCC_CSKY_H 23 #define GCC_CSKY_H 24 25 /* In some places e.g. csky_secondary_reload, we use -1 to indicate an 26 invalid register. In other places where N is unsigned the comparison 27 to zero would give an error, so explicitly cast to int here. */ 28 #define CSKY_GENERAL_REGNO_P(N) \ 29 ((N) < CSKY_NGPR_REGS && (int)(N) >= 0) 30 31 #define CSKY_VREG_P(N) \ 32 ((N) >= CSKY_FIRST_VFP_REGNUM && (N) <= CSKY_LAST_VFP_REGNUM) 33 34 #define CSKY_HILO_REG_P(N) \ 35 ((N) == CSKY_HI_REGNUM || (N) == CSKY_LO_REGNUM) 36 37 /* Helper macros for constant constraints and predicates. */ 38 #define CSKY_VALUE_BETWEEN(VALUE, LOW, HIGH) \ 39 ((VALUE) >= (LOW) && (VALUE) <= (HIGH)) 40 41 #define CSKY_CONST_OK_FOR_I(VALUE) \ 42 CSKY_VALUE_BETWEEN (VALUE, 0, 65535) 43 44 #define CSKY_CONST_OK_FOR_J(VALUE) \ 45 CSKY_VALUE_BETWEEN (VALUE, 1, 32) 46 47 #define CSKY_CONST_OK_FOR_K(VALUE) \ 48 CSKY_VALUE_BETWEEN (VALUE, 0, 31) 49 50 #define CSKY_CONST_OK_FOR_L(VALUE) \ 51 CSKY_VALUE_BETWEEN (VALUE, 1, 8) 52 53 #define CSKY_CONST_OK_FOR_M(VALUE) \ 54 CSKY_VALUE_BETWEEN (VALUE, 1, 4096) 55 56 #define CSKY_CONST_OK_FOR_N(VALUE) \ 57 CSKY_VALUE_BETWEEN (VALUE, 1, 256) 58 59 #define CSKY_CONST_OK_FOR_O(VALUE) \ 60 CSKY_VALUE_BETWEEN (VALUE, 0, 4095) 61 62 #define CSKY_CONST_OK_FOR_P(VALUE) \ 63 (((VALUE) & 0x3) == 0 && CSKY_VALUE_BETWEEN (VALUE, 4, 508)) 64 65 #define CSKY_CONST_OK_FOR_T(VALUE) \ 66 CSKY_VALUE_BETWEEN (VALUE, -256, -1) 67 68 #define CSKY_CONST_OK_FOR_Ub(VALUE) \ 69 (exact_log2 (VALUE & 0xFFFFFFFF) >= 0) 70 71 #define CSKY_CONST_OK_FOR_Uc(VALUE) \ 72 ((VALUE) == (HOST_WIDE_INT) -1 \ 73 || (exact_log2 ((VALUE) + 1) >= 0 \ 74 && exact_log2 ((VALUE) + 1) <= 31)) 75 76 #define CSKY_CONST_OK_FOR_Ud(VALUE) \ 77 ((CSKY_CONST_OK_FOR_I ((VALUE) & 0xffffffff) \ 78 || CSKY_CONST_OK_FOR_Ub ((VALUE)) \ 79 || CSKY_CONST_OK_FOR_Uc (((VALUE) << 32) >> 32)) \ 80 && (CSKY_CONST_OK_FOR_I ((VALUE) >> 32) \ 81 || CSKY_CONST_OK_FOR_Ub ((VALUE) >> 32) \ 82 || CSKY_CONST_OK_FOR_Uc ((VALUE) >> 32))) \ 83 84 #define CSKY_CONST_OK_FOR_Ug(VALUE) \ 85 (((VALUE) & 0x3) == 0 && CSKY_VALUE_BETWEEN (VALUE, -508, -4)) 86 87 #define CSKY_CONST_OK_FOR_Uh(VALUE) \ 88 CSKY_VALUE_BETWEEN (VALUE, -31, 0) 89 90 #define CSKY_CONST_OK_FOR_Uj(VALUE) \ 91 (((VALUE) & 0x3) == 0 && CSKY_VALUE_BETWEEN (VALUE, 1, 1024)) 92 93 #define CSKY_CONST_OK_FOR_Uk(VALUE) \ 94 CSKY_VALUE_BETWEEN (VALUE, 1, 65536) 95 96 #define CSKY_CONST_OK_FOR_Ul(VALUE) \ 97 (((VALUE) & 0x3) == 0 && CSKY_VALUE_BETWEEN (VALUE, -1024, -4)) 98 99 #define CSKY_CONST_OK_FOR_Um(VALUE) \ 100 CSKY_VALUE_BETWEEN (VALUE, -4096, -1) 101 102 #define CSKY_CONST_OK_FOR_US(VALUE) \ 103 CSKY_VALUE_BETWEEN (VALUE, -8, -1) 104 105 #define CSKY_CONST_OK_FOR_MOVIH(VALUE) \ 106 (((VALUE) & 0xFFFF) == 0) 107 108 #ifndef TARGET_CPU_DEFAULT 109 #define TARGET_CPU_DEFAULT CSKY_TARGET_CORE_GET(ck810f) 110 #endif 111 112 /* Options that are enabled by default are specified as such in the 113 .opt file. */ 114 #define TARGET_DEFAULT 0 115 116 /* The highest CSKY architecture version supported by the target. */ 117 #define CSKY_TARGET_ARCH(arch) \ 118 (csky_base_arch == CSKY_TARGET_ARCH_GET (arch)) 119 120 /* Define some macros for target code generation options. */ 121 #define TARGET_SOFT_FPU \ 122 (csky_fpu_index == TARGET_FPU_fpv2_sf) 123 #define TARGET_CASESI \ 124 (optimize_size && TARGET_CONSTANT_POOL \ 125 && (CSKY_TARGET_ARCH (CK801) || CSKY_TARGET_ARCH (CK802))) 126 #define TARGET_TLS \ 127 (CSKY_TARGET_ARCH (CK807) || CSKY_TARGET_ARCH (CK810)) 128 129 /* Run-time Target Specification. */ 130 #define TARGET_SOFT_FLOAT (csky_float_abi == CSKY_FLOAT_ABI_SOFT) 131 /* Use hardware floating point instructions. */ 132 #define TARGET_HARD_FLOAT (csky_float_abi != CSKY_FLOAT_ABI_SOFT) 133 /* Use hardware floating point calling convention. */ 134 #define TARGET_HARD_FLOAT_ABI (csky_float_abi == CSKY_FLOAT_ABI_HARD) 135 136 #define TARGET_SINGLE_FPU (csky_fpu_index == TARGET_FPU_fpv2_sf) 137 #define TARGET_DOUBLE_FPU (TARGET_HARD_FLOAT && !TARGET_SINGLE_FPU) 138 139 #define FUNCTION_VARG_REGNO_P(REGNO) \ 140 (TARGET_HARD_FLOAT_ABI \ 141 && IN_RANGE ((REGNO), CSKY_FIRST_VFP_REGNUM, \ 142 CSKY_FIRST_VFP_REGNUM + CSKY_NPARM_FREGS - 1)) 143 144 #define CSKY_VREG_MODE_P(mode) \ 145 ((mode) == SFmode || (mode) == DFmode) 146 147 #define FUNCTION_VARG_MODE_P(mode) \ 148 (TARGET_HARD_FLOAT_ABI \ 149 && CSKY_VREG_MODE_P(mode) \ 150 && !(mode == DFmode && TARGET_SINGLE_FPU)) 151 152 /* Number of loads/stores handled by ldm/stm. */ 153 #define CSKY_MIN_MULTIPLE_STLD 3 154 #define CSKY_MAX_MULTIPLE_STLD 12 155 156 /* Pull in enums and defines for processor/arch variants. This makes 157 it possible to use CSKY_TARGET_ARCH in macros defined in this file. */ 158 #include "csky_opts.h" 159 extern enum csky_base_architecture csky_base_arch; 160 161 /* Pull in enums and defines for ISA features. Likewise required to 162 support use of CSKY_ISA_FEATURE in this file. 163 Note that the CSKY_ISA_FEATURE macro tests properties of the 164 particular processor we're compiling for, not code generation 165 options that may have dependencies on those features. The latter 166 are handled by TARGET_xxxx macros/variables instead. See csky.opt. */ 167 #include "csky_isa.h" 168 extern int csky_arch_isa_features[]; 169 #define CSKY_ISA_FEATURE(IDENT) \ 170 csky_arch_isa_features[CSKY_ISA_FEATURE_GET (IDENT)] 171 172 /****************************************************************** 173 * Storage Layout * 174 ******************************************************************/ 175 176 177 /* Define this if most significant bit is lowest numbered 178 in instructions that operate on numbered bit-fields. */ 179 #define BITS_BIG_ENDIAN 0 180 181 /* If the most significant byte of a word is the lowest numbered. */ 182 #define BYTES_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0) 183 184 /* If the most significant word of a multiword number is the lowest. */ 185 #define WORDS_BIG_ENDIAN (BYTES_BIG_ENDIAN) 186 187 /* Width of a word, in units (bytes). */ 188 #define UNITS_PER_WORD 4 189 190 /* Define this macro if it is advisable to hold scalars in registers 191 in a wider mode than that declared by the program. In such cases, 192 the value is constrained to be within the bounds of the declared 193 type, but kept valid in the wider mode. The signedness of the 194 extension may differ from that of the type. */ 195 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \ 196 if (GET_MODE_CLASS (MODE) == MODE_INT \ 197 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \ 198 (MODE) = SImode; 199 200 201 /* Allocation boundary (in *bits*) for storing arguments in argument list. */ 202 #define PARM_BOUNDARY 32 203 204 /* Boundary (in *bits*) on which stack pointer should be aligned. 205 Per C-SKY, the published V2 ABI document is incorrect and the proper 206 alignment is on a 4-byte boundary rather than 8 bytes. */ 207 #define STACK_BOUNDARY 32 208 209 /* Align definitions of arrays, unions and structures so that 210 initializations and copies can be made more efficient. This is not 211 ABI-changing, so it only affects places where we can see the 212 definition. Increasing the alignment tends to introduce padding, 213 so don't do this when optimizing for size/conserving stack space. */ 214 #define CSKY_EXPAND_ALIGNMENT(COND, EXP, ALIGN) \ 215 (((COND) && ((ALIGN) < BITS_PER_WORD) \ 216 && (TREE_CODE (EXP) == ARRAY_TYPE \ 217 || TREE_CODE (EXP) == UNION_TYPE \ 218 || TREE_CODE (EXP) == RECORD_TYPE)) \ 219 ? BITS_PER_WORD : (ALIGN)) 220 221 /* Align global data. */ 222 #define DATA_ALIGNMENT(EXP, ALIGN) \ 223 CSKY_EXPAND_ALIGNMENT (!optimize_size, EXP, ALIGN) 224 225 /* Similarly, make sure that objects on the stack are sensibly aligned. */ 226 #define LOCAL_ALIGNMENT(EXP, ALIGN) \ 227 CSKY_EXPAND_ALIGNMENT (!flag_conserve_stack, EXP, ALIGN) 228 229 /* No data type wants to be aligned rounder than this. */ 230 #define BIGGEST_ALIGNMENT 32 231 232 /* Every structures size must be a multiple of 8 bits. */ 233 #define STRUCTURE_SIZE_BOUNDARY 8 234 235 /* Look at the fundamental type that is used for a bit-field and use 236 that to impose alignment on the enclosing structure. 237 struct s {int a:8}; should have same alignment as "int", not "char". */ 238 #define PCC_BITFIELD_TYPE_MATTERS 1 239 240 /* Largest integer machine mode for structures. If undefined, the default 241 is GET_MODE_SIZE(DImode). */ 242 #define MAX_FIXED_MODE_SIZE 64 243 244 /* Allocation boundary (in *bits*) for the code of a function. 245 Optimize ck801 and ck802 a little harder for size. */ 246 #define FUNCTION_BOUNDARY \ 247 (((CSKY_TARGET_ARCH (CK801) || CSKY_TARGET_ARCH (CK802)) \ 248 && optimize_size) \ 249 ? 16 : 32) 250 251 /* C-SKY does not support unaligned access. */ 252 #define STRICT_ALIGNMENT 1 253 254 #undef SIZE_TYPE 255 #define SIZE_TYPE "unsigned int" 256 257 #undef PTRDIFF_TYPE 258 #define PTRDIFF_TYPE "int" 259 260 #undef WCHAR_TYPE 261 #define WCHAR_TYPE "long int" 262 263 #undef UINT_LEAST32_TYPE 264 #define UINT_LEAST32_TYPE "unsigned int" 265 266 #undef INT_LEAST32_TYPE 267 #define INT_LEAST32_TYPE "int" 268 269 #undef WCHAR_TYPE_SIZE 270 #define WCHAR_TYPE_SIZE BITS_PER_WORD 271 272 /****************************************************************** 273 * Layout of Source Language Data Types * 274 ******************************************************************/ 275 276 277 /* 'char' is unsigned by default for backward compatibility. */ 278 #define DEFAULT_SIGNED_CHAR 0 279 280 281 /****************************************************************** 282 * Stack Layout and Calling Conventions * 283 ******************************************************************/ 284 285 286 /* Basic Stack Layout */ 287 288 289 /* Define this if pushing a word on the stack 290 makes the stack pointer a smaller address. */ 291 #define STACK_GROWS_DOWNWARD 1 292 293 /* Define this to nonzero if the nominal address of the stack frame 294 is at the high-address end of the local variables; 295 that is, each additional local variable allocated 296 goes at a more negative offset in the frame. */ 297 #define FRAME_GROWS_DOWNWARD 1 298 299 /* Offset of first parameter from the argument pointer register value. */ 300 #define FIRST_PARM_OFFSET(FNDECL) 0 301 302 /* A C expression whose value is RTL representing the value of the return 303 address for the frame COUNT steps up from the current frame. */ 304 #define RETURN_ADDR_RTX(COUNT, FRAME) \ 305 csky_return_addr (COUNT, FRAME) 306 307 /* Pick up the return address upon entry to a procedure. Used for 308 dwarf2 unwind information. This also enables the table driven 309 mechanism. */ 310 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, CSKY_LR_REGNUM) 311 312 313 /* Exception Handling Support */ 314 315 /* The register that holds the return address in exception handlers. */ 316 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (SImode, CSKY_EH_STACKADJ_REGNUM) 317 318 /* Select a format to encode pointers in exception handling data. */ 319 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \ 320 (((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4) 321 322 /* Registers That Address the Stack Frame */ 323 324 325 /* Register to use for pushing function arguments. */ 326 #define STACK_POINTER_REGNUM CSKY_SP_REGNUM 327 328 /* Base register for access to local variables of the function. */ 329 #define FRAME_POINTER_REGNUM 8 330 331 /* Base register for access to arguments of the function. This is a fake 332 register that is always eliminated. */ 333 #define ARG_POINTER_REGNUM 32 334 335 /* Static chain register. 336 Register use is more restricted on CK801. */ 337 #define STATIC_CHAIN_REGNUM (CSKY_TARGET_ARCH (CK801) ? 13 : 12) 338 339 340 /* Eliminating Frame Pointer and Arg Pointer */ 341 342 343 /* Definitions for register eliminations. 344 345 This is an array of structures. Each structure initializes one pair 346 of eliminable registers. The "from" register number is given first, 347 followed by "to". Eliminations of the same "from" register are listed 348 in order of preference. 349 350 We have two registers that can be eliminated on the CSKY. First, the 351 arg pointer register can often be eliminated in favor of the stack 352 pointer register. Secondly, the pseudo frame pointer register can always 353 be eliminated; it is replaced with the stack pointer. */ 354 #define ELIMINABLE_REGS \ 355 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM },\ 356 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM },\ 357 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }} 358 359 /* Define the offset between two registers, one to be eliminated, and the 360 other its replacement, at the start of a routine. */ 361 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 362 (OFFSET) = csky_initial_elimination_offset (FROM, TO) 363 364 365 /* Passing Function Arguments on the Stack */ 366 367 368 /* Define this if the maximum size of all the outgoing args is to be 369 accumulated and pushed during the prologue. The amount can be 370 found in the variable crtl->outgoing_args_size. */ 371 #define ACCUMULATE_OUTGOING_ARGS 1 372 373 374 /* Passing Arguments in Registers */ 375 376 377 /* A C type for declaring a variable that is used as the first argument of 378 TARGET_ FUNCTION_ARG and other related values. */ 379 #if !defined (USED_FOR_TARGET) 380 typedef struct 381 { 382 int reg; 383 int freg; 384 bool is_stdarg; 385 } CUMULATIVE_ARGS; 386 #endif 387 388 /* Initialize a variable CUM of type CUMULATIVE_ARGS 389 for a call to a function whose data type is FNTYPE. 390 For a library call, FNTYPE is 0. 391 392 On CSKY, the offset always starts at 0: the first parm reg is always 393 the same reg. */ 394 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ 395 csky_init_cumulative_args (&(CUM), (FNTYPE), (LIBNAME), (INDIRECT)) 396 397 /* True if N is a possible register number for function argument passing. 398 On the CSKY, r0-r3 are used to pass args. 399 The int cast is to prevent a complaint about unsigned comparison to 400 zero, since CSKY_FIRST_PARM_REGNUM is zero. */ 401 #define FUNCTION_ARG_REGNO_P(REGNO) \ 402 (((REGNO) >= CSKY_FIRST_PARM_REGNUM \ 403 && (REGNO) < (CSKY_NPARM_REGS + CSKY_FIRST_PARM_REGNUM)) \ 404 || FUNCTION_VARG_REGNO_P(REGNO)) 405 406 /* How Large Values Are Returned */ 407 408 409 /* Define DEFAULT_PCC_STRUCT_RETURN to 1 if all structure and union return 410 values must be in memory. On the CSKY, small 411 structures (eight bytes or fewer) are returned in 412 the register pair r0/r1. */ 413 #define DEFAULT_PCC_STRUCT_RETURN 0 414 415 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 416 the stack pointer does not matter. The value is tested only in 417 functions that have frame pointers. 418 No definition is equivalent to always zero. 419 420 On the CSKY, the function epilogue recovers the stack pointer from the 421 frame. */ 422 #define EXIT_IGNORE_STACK 1 423 424 425 /****************************************************************** 426 * Register Usage & Register Classes * 427 ******************************************************************/ 428 429 430 #define FIRST_PSEUDO_REGISTER 71 431 432 /* 1 for registers that have pervasive standard uses 433 and are not available for the register allocator. 434 On C-SKY, r14 is SP, r26 is used by linker, 435 r27 is used by assembler, r28 is data base address, 436 r29 is GOT base address, r30 is handler base address, 437 r31 is TLS register. */ 438 #define FIXED_REGISTERS \ 439 /* r0 r1 r2 r3 r4 r5 r6 r7 */ \ 440 { 0, 0, 0, 0, 0, 0, 0, 0, \ 441 /* r8 r9 r10 r11 r12 r13 r14 r15 */ \ 442 0, 0, 0, 0, 0, 0, 1, 0, \ 443 /* r16 r17 r18 r19 r20 r21 r22 r23 */ \ 444 0, 0, 0, 0, 0, 0, 0, 0, \ 445 /* r24 r25 r26 r27 r28 r29 r30 tls */ \ 446 0, 0, 1, 1, 1, 1, 1, 1, \ 447 /* reserved c hi lo */ \ 448 1, 1, 0, 0, \ 449 /* reserved */ \ 450 1, 1, 1, 1, 1, 1, 1, 1, \ 451 1, 1, 1, 1, 1, 1, 1, 1, \ 452 /* vr0 vr1 vr2 vr3 vr4 vr5 vr6 vr7 */ \ 453 0, 0, 0, 0, 0, 0, 0, 0, \ 454 /* vr8 vr9 vr10 vr11 vr12 vr13 vr14 vr15 */ \ 455 0, 0, 0, 0, 0, 0, 0, 0 , \ 456 /* reserved */ \ 457 1, 1, \ 458 /* epc */ \ 459 1 \ 460 } 461 462 /* Like `CALL_USED_REGISTERS' but used to overcome a historical 463 problem which makes CALL_USED_REGISTERS *always* include 464 all the FIXED_REGISTERS. Until this problem has been 465 resolved this macro can be used to overcome this situation. 466 In particular, block_propagate() requires this list 467 be accurate, or we can remove registers which should be live. 468 This macro is used in get_csky_live_regs(). */ 469 #define CALL_REALLY_USED_REGISTERS \ 470 /* r0 r1 r2 r3 r4 r5 r6 r7 */ \ 471 { 1, 1, 1, 1, 0, 0, 0, 0, \ 472 /* r8 r9 r10 r11 r12 r13 r14 r15 */ \ 473 0, 0, 0, 0, 1, 1, 1, 0, \ 474 /* r16 r17 r18 r19 r20 r21 r22 r23 */ \ 475 0, 0, 1, 1, 1, 1, 1, 1, \ 476 /* r24 r25 r26 r27 r28 r29 r30 r31 */ \ 477 1, 1, 1, 1, 1, 1, 1, 1, \ 478 /* reserved c hi lo */ \ 479 1, 1, 1, 1, \ 480 /* reserved */ \ 481 1, 1, 1, 1, 1, 1, 1, 1, \ 482 1, 1, 1, 1, 1, 1, 1, 1, \ 483 /* vr0 vr1 vr2 vr3 vr4 vr5 vr6 vr7 */ \ 484 1, 1, 1, 1, 1, 1, 1, 1, \ 485 /* vr8 vr9 vr10 vr11 vr12 vr13 vr14 vr15 */ \ 486 1, 1, 1, 1, 1, 1, 1, 1, \ 487 /* reserved */ \ 488 1, 1, \ 489 /* epc */ \ 490 1 \ 491 } 492 493 #define REGISTER_NAMES \ 494 { \ 495 "a0", "a1", "a2", "a3", "l0", "l1", "l2", "l3", \ 496 "l4", "l5", "l6", "l7", "t0", "t1", "sp", "lr", \ 497 "l8", "l9", "t2", "t3", "t4", "t5", "t6", "t7", \ 498 "t8", "t9", "r26", "r27", "gb", "r29", "svbr", "r31", \ 499 /* reserved */ \ 500 "reserved", \ 501 /* CC register: 33 */ \ 502 "c", \ 503 /* DSP instruction register: 34, 35 */ \ 504 "hi", "lo", \ 505 "reserved", "reserved", "reserved", "reserved", "reserved", \ 506 "reserved", "reserved", "reserved", "reserved", "reserved", \ 507 "reserved", "reserved", "reserved", "reserved", "reserved", \ 508 "reserved", \ 509 /* V registers: 52~67 */ \ 510 "vr0", "vr1", "vr2", "vr3", "vr4", "vr5", "vr6", "vr7", \ 511 "vr8", "vr9", "vr10", "vr11", "vr12", "vr13", "vr14", "vr15", \ 512 "reserved", "reserved", \ 513 "epc" \ 514 } 515 516 /* Table of additional register names to use in user input. */ 517 #define ADDITIONAL_REGISTER_NAMES \ 518 { \ 519 {"r0", 0}, \ 520 {"r1", 1}, \ 521 {"r2", 2}, \ 522 {"r3", 3}, \ 523 {"r4", 4}, \ 524 {"r5", 5}, \ 525 {"r6", 6}, \ 526 {"r7", 7}, \ 527 {"r8", 8}, \ 528 {"r9", 9}, \ 529 {"r10", 10}, \ 530 {"r11", 11}, \ 531 {"r12", 12}, \ 532 {"r13", 13}, \ 533 {"r14", 14}, \ 534 {"r15", 15}, \ 535 {"r16", 16}, \ 536 {"r17", 17}, \ 537 {"r18", 18}, \ 538 {"r19", 19}, \ 539 {"r20", 20}, \ 540 {"r21", 21}, \ 541 {"r22", 22}, \ 542 {"r23", 23}, \ 543 {"r24", 24}, \ 544 {"r25", 25}, \ 545 {"r26", 26}, \ 546 {"r27", 27}, \ 547 {"r28", 28}, \ 548 {"r29", 29}, \ 549 {"r30", 30}, \ 550 {"r31", 31}, \ 551 } 552 553 /* The order in which registers should be allocated. 554 It is better to use the registers the caller need not save. 555 Allocate r0 through r3 in reverse order since r3 is least likely 556 to contain a function parameter; in addition results are returned 557 in r0. It is quite good to use lr since other calls may clobber 558 it anyway. */ 559 #define REG_ALLOC_ORDER \ 560 /* r3 r2 r1 r0 r12 r13 r18 r19 */ \ 561 { 3, 2, 1, 0, 12, 13, 18, 19, \ 562 /* r20 r21 r22 r23 r24 r25 */ \ 563 20, 21, 22, 23, 24, 25, \ 564 /* r15 r4 r5 r6 r7 r8 r9 r10 r11 */ \ 565 15, 4, 5, 6, 7, 8, 9, 10, 11, \ 566 /* r16 r17 r26 r27 r28 r29 r30 hi lo */ \ 567 16, 17, 26, 27, 28, 29, 30, 34, 35, \ 568 /* vr0 vr1 vr2 vr3 vr4 vr5 vr6 vr7 */ \ 569 52, 53, 54, 55, 56, 57, 58, 59, \ 570 /* vr8 vr9 vr10 vr11 vr12 vr13 vr14 vr15 */ \ 571 60, 61, 62, 63, 64, 65, 66, 67, \ 572 /* reserved */ \ 573 36, 37, 38, 39, 40, 41, 42, 43, \ 574 44, 45, 46, 47, 48, 49, 50, 51, \ 575 /* sp tls reserved c reserved epc */ \ 576 14, 31, 32, 33, 68, 69, 70 } 577 578 /* Register classes. */ 579 enum reg_class 580 { 581 NO_REGS, 582 MINI_REGS, 583 SP_REGS, 584 LOW_REGS, 585 GENERAL_REGS, 586 C_REGS, 587 HI_REGS, 588 LO_REGS, 589 HILO_REGS, 590 V_REGS, 591 OTHER_REGS, 592 RESERVE_REGS, 593 ALL_REGS, 594 LIM_REG_CLASSES 595 }; 596 597 #define N_REG_CLASSES (int) LIM_REG_CLASSES 598 599 /* Give names of register classes as strings for dump file. */ 600 #define REG_CLASS_NAMES \ 601 { \ 602 "NO_REGS", \ 603 "MINI_REGS", \ 604 "SP_REGS", \ 605 "LOW_REGS", \ 606 "GENERAL_REGS", \ 607 "C_REGS", \ 608 "HI_REGS", \ 609 "LO_REGS", \ 610 "HILO_REGS", \ 611 "V_REGS", \ 612 "OTHER_REGS", \ 613 "RESERVE_REGS", \ 614 "ALL_REGS", \ 615 } 616 617 /* Define which registers fit in which classes. This is an initializer 618 for a vector of HARD_REG_SET of length N_REG_CLASSES. */ 619 #define REG_CLASS_CONTENTS \ 620 { \ 621 {0x00000000, 0x00000000, 0x00000000 }, /* NO_REGS */ \ 622 {0x000000FF, 0x00000000, 0x00000000 }, /* MINI_REGS */ \ 623 {0x00004000, 0x00000000, 0x00000000 }, /* SP_REGS */ \ 624 {0x0000FFFF, 0x00000000, 0x00000000 }, /* LOW_REGS */ \ 625 {0xFFFFFFFF, 0x00000000, 0x00000000 }, /* GENERAL_REGS */ \ 626 {0x00000000, 0x00000002, 0x00000000 }, /* C_REGS */ \ 627 {0x00000000, 0x00000004, 0x00000000 }, /* HI_REG */ \ 628 {0x00000000, 0x00000008, 0x00000000 }, /* LO_REG */ \ 629 {0x00000000, 0x0000000c, 0x00000000 }, /* HILO_REGS */ \ 630 {0x00000000, 0xFFF00000, 0x0000000F }, /* V_REGS */ \ 631 {0x00000000, 0x00000000, 0x00000040 }, /* OTHER_REGS */ \ 632 {0x00000000, 0x0FF00001, 0x00000030 }, /* RESERVE_REGS */ \ 633 {0xFFFFFFFF, 0xFFFFFFFF, 0x0000007F }, /* ALL_REGS */ \ 634 } 635 636 /* Return register class from regno. */ 637 extern enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER]; 638 #define REGNO_REG_CLASS(REGNO) regno_reg_class[REGNO] 639 640 /* The class value for index registers, and the one for base regs. */ 641 #define INDEX_REG_CLASS (CSKY_ISA_FEATURE (2E3) ? GENERAL_REGS : NO_REGS) 642 #define BASE_REG_CLASS GENERAL_REGS 643 644 /* TODO is it necessary to set it to MINI_REGS to emit more 16-bit 645 instructions? */ 646 #define MODE_BASE_REG_CLASS(MODE) GENERAL_REGS 647 648 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 649 and check its validity for a certain class. 650 We have two alternate definitions for each of them. 651 The usual definition accepts all pseudo regs; the other rejects 652 them unless they have been allocated suitable hard regs. 653 The symbol REG_OK_STRICT causes the latter definition to be used. 654 655 Most source files want to accept pseudo regs in the hope that 656 they will get allocated to the class that the insn wants them to be in. 657 Source files for reload pass need to be strict. 658 After reload, it makes no difference, since pseudo regs have 659 been eliminated by then. 660 661 The reg_renumber is used to map pseudo regs into hardware 662 regs, it is set up as a result of register allocation. */ 663 #ifdef REG_OK_STRICT 664 #define REGNO_OK_FOR_BASE_P(REGNO) \ 665 (CSKY_GENERAL_REGNO_P (REGNO) \ 666 || CSKY_GENERAL_REGNO_P (reg_renumber[(REGNO)]) ) 667 #else 668 #define REGNO_OK_FOR_BASE_P(REGNO) \ 669 (CSKY_GENERAL_REGNO_P (REGNO) \ 670 || (REGNO) >= FIRST_PSEUDO_REGISTER) 671 #endif 672 673 674 #ifdef REG_OK_STRICT 675 #define REGNO_OK_FOR_INDEX_P(REGNO) \ 676 (CSKY_GENERAL_REGNO_P (REGNO) \ 677 || CSKY_GENERAL_REGNO_P (reg_renumber[(REGNO)]) ) 678 #else 679 #define REGNO_OK_FOR_INDEX_P(REGNO) \ 680 (CSKY_GENERAL_REGNO_P (REGNO) \ 681 || (REGNO) >= FIRST_PSEUDO_REGISTER) 682 #endif 683 684 685 /****************************************************************** 686 * Addressing Modes * 687 ******************************************************************/ 688 689 690 /* Recognize any constant value that is a valid address. */ 691 #define CONSTANT_ADDRESS_P(X) \ 692 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF) 693 694 /* Maximum number of registers that can appear in a valid memory address. 695 Shifts in addresses can't be by a register. */ 696 #define MAX_REGS_PER_ADDRESS 2 697 698 699 /****************************************************************** 700 * Run-time Target * 701 ******************************************************************/ 702 703 704 #define TARGET_CPU_CPP_BUILTINS() \ 705 csky_cpu_cpp_builtins (pfile) 706 707 /****************************************************************** 708 * Per-function Data * 709 ******************************************************************/ 710 711 712 /* Initialize data used by insn expanders. This is called from insn_emit, 713 once for every function before code is generated. */ 714 #define INIT_EXPANDERS csky_init_expanders () 715 716 717 /****************************************************************** 718 * Dividing the Output into Sections (Texts, Data, . . . ) * 719 ******************************************************************/ 720 721 722 /* Switch to the text or data segment. */ 723 #define TEXT_SECTION_ASM_OP "\t.text" 724 #define DATA_SECTION_ASM_OP "\t.data" 725 726 /* The subroutine calls in the .init and .fini sections create literal 727 pools which must be jumped around... */ 728 #define FORCE_CODE_SECTION_ALIGN \ 729 asm ("br 1f ; .literals ; .align 2 ; 1:"); 730 731 /* Define this macro to be an expression with a nonzero value if 732 jump tables (for tablejump insns) should be output in the text section, 733 along with the assembler instructions. */ 734 #define JUMP_TABLES_IN_TEXT_SECTION TARGET_CASESI 735 736 737 /****************************************************************** 738 * Assembler Format * 739 ******************************************************************/ 740 741 742 /* A C string constant for text to be output before(after) each asm 743 statement or group of consecutive ones. */ 744 #undef ASM_APP_ON 745 #define ASM_APP_ON "// inline asm begin\n" 746 #undef ASM_APP_OFF 747 #define ASM_APP_OFF "// inline asm end\n" 748 749 /* A C string constant describing how to begin a comment in the target 750 assembler language. */ 751 #define ASM_COMMENT_START "\t//" 752 753 /* This says how to output an assembler line 754 to define a global common symbol, with alignment information. */ 755 #undef ASM_OUTPUT_ALIGNED_COMMON 756 #define ASM_OUTPUT_ALIGNED_COMMON(STREAM, NAME, SIZE, ALIGN) \ 757 do \ 758 { \ 759 fputs ("\t.comm\t", STREAM); \ 760 assemble_name (STREAM, NAME); \ 761 fprintf (STREAM, ",%lu, %u\n", (unsigned long)(SIZE), \ 762 (ALIGN) / BITS_PER_UNIT); \ 763 } \ 764 while (0) 765 766 /* Define a local common symbol whose alignment we wish to specify. 767 ALIGN comes in as bits, we have to turn it into bytes. */ 768 #undef ASM_OUTPUT_ALIGNED_LOCAL 769 #define ASM_OUTPUT_ALIGNED_LOCAL(STREAM, NAME, SIZE, ALIGN) \ 770 do \ 771 { \ 772 fputs ("\t.bss\t", (STREAM)); \ 773 assemble_name ((STREAM), (NAME)); \ 774 fprintf ((STREAM), ",%d, %d\n", (int)(SIZE), \ 775 (ALIGN) / BITS_PER_UNIT); \ 776 } \ 777 while (0) 778 779 /* Globalizing directive for a label. */ 780 #define GLOBAL_ASM_OP "\t.global\t" 781 782 /* Output a reference to a label. */ 783 #undef ASM_OUTPUT_LABELREF 784 #define ASM_OUTPUT_LABELREF(STREAM, NAME) \ 785 fprintf (STREAM, "%s%s", user_label_prefix, \ 786 (* targetm.strip_name_encoding) (NAME)) 787 788 /* Make an internal label into a string. */ 789 #undef ASM_GENERATE_INTERNAL_LABEL 790 #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \ 791 sprintf (STRING, "*.%s%ld", PREFIX, (long) NUM) 792 793 /* This is how to output an insn to push a register on the stack. 794 It need not be very fast code. */ 795 #define ASM_OUTPUT_REG_PUSH(STREAM,REGNO) \ 796 fprintf (STREAM, "\tsubi\t %s,%d\n\tst.w\t %s,(%s)\n", \ 797 reg_names[STACK_POINTER_REGNUM], \ 798 (STACK_BOUNDARY / BITS_PER_UNIT), \ 799 reg_names[REGNO], \ 800 reg_names[STACK_POINTER_REGNUM]) 801 802 /* This is how to output an insn to pop a register from the stack. */ 803 #define ASM_OUTPUT_REG_POP(STREAM,REGNO) \ 804 fprintf (STREAM, "\tld.w\t %s,(%s)\n\taddi\t %s,%d\n", \ 805 reg_names[REGNO], \ 806 reg_names[STACK_POINTER_REGNUM], \ 807 reg_names[STACK_POINTER_REGNUM], \ 808 (STACK_BOUNDARY / BITS_PER_UNIT)) 809 810 /* Output an element of a dispatch table. */ 811 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM,VALUE) \ 812 fprintf (STREAM, "\t.long\t.L%d\n", VALUE) 813 814 /* This is how to output an assembler line 815 that says to advance the location counter by SIZE bytes. */ 816 #undef ASM_OUTPUT_SKIP 817 #define ASM_OUTPUT_SKIP(STREAM,SIZE) \ 818 fprintf (STREAM, "\t.fill %d, 1\n", (int)(SIZE)) 819 820 /* Align output to a power of two. Note ".align 0" is redundant, 821 and also GAS will treat it as ".align 2" which we do not want. */ 822 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \ 823 do \ 824 { \ 825 if ((POWER) > 0) \ 826 fprintf (STREAM, "\t.align\t%d\n", POWER); \ 827 } \ 828 while (0) 829 830 831 /****************************************************************** 832 * Controlling the Compilation Driver * 833 ******************************************************************/ 834 835 836 /* Define this macro as a C expression for the initializer of an 837 array of string to tell the driver program which options are 838 defaults for this target and thus do not need to be handled 839 specially when using MULTILIB_OPTIONS. */ 840 #undef MULTILIB_DEFAULTS 841 #define MULTILIB_DEFAULTS \ 842 {"mlittle-endian", "mcpu=ck810f", "msoft-float"} 843 844 /* Support for a compile-time default CPU, et cetera. The rules are: 845 --with-arch is ignored if -march or -mcpu are specified. 846 --with-cpu is ignored if -march or -mcpu are specified, and is overridden 847 by --with-arch. */ 848 #define OPTION_DEFAULT_SPECS \ 849 {"arch", "%{!march=*:%{!mcpu=*:-march=%(VALUE)}}" }, \ 850 {"cpu", "%{!march=*:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \ 851 {"endian", "%{!mbig-endian:%{!mlittle-endian:-m%(VALUE)-endian}}" }, \ 852 {"float", "%{!mfloat-abi=*:-mfloat-abi=%(VALUE)}" }, 853 854 855 /****************************************************************** 856 * Position Independent Code * 857 ******************************************************************/ 858 859 /* Define the global table register. */ 860 #define PIC_OFFSET_TABLE_REGNUM (flag_pic ? CSKY_GB_REGNUM : INVALID_REGNUM) 861 862 /* Nonzero if x is a legitimate immediate operand on the target machine 863 when generating position-independent code. */ 864 #define LEGITIMATE_PIC_OPERAND_P(X) \ 865 csky_legitimate_pic_operand_p (X) 866 867 868 /****************************************************************** 869 * Controlling Debugging Information Format * 870 ******************************************************************/ 871 872 873 /* Define this macro if GCC should produce dwarf version 2 format debugging 874 output in response to the `-g' option. */ 875 #define DWARF2_DEBUGGING_INFO 1 876 877 /* Define this macro to 0 if your target supports DWARF 2 frame unwind 878 information, but it does not yet work with exception handling. */ 879 #define DWARF2_UNWIND_INFO 1 880 881 /* Define this if you have arranged for GCC to support 882 more than one format of debugging output. 883 The value of this macro only affects the default debugging output. */ 884 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG 885 886 /* Define this macro if the target’s representation 887 for dwarf registers used in .eh_frame or .debug_frame 888 is different from that used in other debug info sections. 889 Given a GCC hard register number, 890 this macro should return the .eh_frame register number.*/ 891 #define DWARF_FRAME_REGNUM(REG) DBX_REGISTER_NUMBER (REG) 892 893 /* If INCOMING_RETURN_ADDR_RTX is defined & the RTL is REG, 894 define DWARF_FRAME_RETURN_COLUMN to DWARF_FRAME_REGNUM. */ 895 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (CSKY_LR_REGNUM) 896 897 /* Use r0 and r1 to pass exception handling information. */ 898 #define EH_RETURN_DATA_REGNO(N) ((N) < 2 ? N : INVALID_REGNUM) 899 900 /* How to renumber registers for dbx and gdb. */ 901 extern const int csky_dbx_regno[]; 902 #define DBX_REGISTER_NUMBER(REGNO) ((unsigned int) csky_dbx_regno[REGNO]) 903 904 905 /****************************************************************** 906 * Miscellaneous Parameters * 907 ******************************************************************/ 908 909 910 /* Specify the machine mode that this machine uses 911 for the index in the tablejump instruction. */ 912 #define CASE_VECTOR_MODE SImode 913 914 /* Define if operations between registers always perform the operation 915 on the full register even if a narrower mode is specified. */ 916 #define WORD_REGISTER_OPERATIONS 1 917 918 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD 919 will either zero-extend or sign-extend. The value of this macro should 920 be the code that says which one of the two operations is implicitly 921 done, UNKNOWN if none. */ 922 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND 923 924 /* Max number of bytes we can move from memory to memory 925 in one reasonably fast instruction. */ 926 #define MOVE_MAX 4 927 928 /* Shift counts are truncated to 6-bits (0 to 63) instead of the expected 929 5-bits, so we cannot define SHIFT_COUNT_TRUNCATED to true for this 930 target. */ 931 #define SHIFT_COUNT_TRUNCATED 0 932 933 #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 32, 1) 934 935 /* The machine modes of pointers and functions. */ 936 #define Pmode SImode 937 #define FUNCTION_MODE Pmode 938 939 /* Define this macro to be a C expression to indicate when jump-tables 940 should contain relative addresses. */ 941 #define CASE_VECTOR_PC_RELATIVE \ 942 (optimize_size && TARGET_CONSTANT_POOL \ 943 && (CSKY_TARGET_ARCH (CK802) || CSKY_TARGET_ARCH (CK801))) 944 945 /* Return the preferred mode for an addr_diff_vec when the minimum 946 and maximum offset are known. */ 947 #define CASE_VECTOR_SHORTEN_MODE(min, max, body) \ 948 (min >= 0 && max < 512 \ 949 ? (ADDR_DIFF_VEC_FLAGS (body).offset_unsigned = 1, QImode) \ 950 : min >= -256 && max < 256 \ 951 ? (ADDR_DIFF_VEC_FLAGS (body).offset_unsigned = 0, QImode) \ 952 : min >= 0 && max < 8192 \ 953 ? (ADDR_DIFF_VEC_FLAGS (body).offset_unsigned = 1, HImode) \ 954 : min >= -4096 && max < 4096 \ 955 ? (ADDR_DIFF_VEC_FLAGS (body).offset_unsigned = 0, HImode) \ 956 : SImode) 957 958 /* This is how to output an element of a case-vector that is relative. */ 959 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \ 960 do \ 961 { \ 962 if (optimize_size && TARGET_CONSTANT_POOL \ 963 && (CSKY_TARGET_ARCH (CK802) || CSKY_TARGET_ARCH (CK801))) \ 964 { \ 965 switch (GET_MODE (BODY)) \ 966 { \ 967 case E_QImode: \ 968 asm_fprintf (STREAM, "\t.byte\t(.L%d-.L%d)/2\n", \ 969 VALUE, REL); \ 970 break; \ 971 case E_HImode: /* TBH */ \ 972 asm_fprintf (STREAM, "\t.short\t(.L%d-.L%d)/2\n", \ 973 VALUE, REL); \ 974 break; \ 975 case E_SImode: \ 976 asm_fprintf (STREAM, "\t.long\t.L%d-.L%d\n", \ 977 VALUE, REL); \ 978 break; \ 979 default: \ 980 gcc_unreachable (); \ 981 } \ 982 } \ 983 else \ 984 asm_fprintf (STREAM, "\t.long\t.L%d@GOTOFF\n", VALUE); \ 985 } while (0) 986 987 /* This macro is not documented yet. 988 But we do need it to make jump table vector aligned. */ 989 #define ADDR_VEC_ALIGN(JUMPTABLE) 0 990 991 /* We have to undef this first to override the version from elfos.h. */ 992 #undef ASM_OUTPUT_CASE_LABEL 993 #define ASM_OUTPUT_CASE_LABEL(stream, prefix, num, table) \ 994 do \ 995 { \ 996 if (GET_MODE (PATTERN (table)) == SImode) \ 997 ASM_OUTPUT_ALIGN (stream, 2); \ 998 (*targetm.asm_out.internal_label) (stream, prefix, num); \ 999 } while (0) 1000 1001 /* Make sure subsequent insns are aligned after a byte-sized jump offset 1002 table. */ 1003 #define ASM_OUTPUT_CASE_END(stream, num, table) \ 1004 do \ 1005 { \ 1006 if (GET_MODE (PATTERN (table)) == QImode) \ 1007 ASM_OUTPUT_ALIGN (stream, 1); \ 1008 } while (0) 1009 1010 1011 1012 1013 /****************************************************************** 1014 * Trampolines for Nested Functions * 1015 ******************************************************************/ 1016 1017 1018 /* Length in units of the trampoline for entering a nested function. */ 1019 #define TRAMPOLINE_SIZE (CSKY_ISA_FEATURE (2E3) ? 16 : 20) 1020 1021 /* Alignment required for a trampoline in bits. */ 1022 #define TRAMPOLINE_ALIGNMENT 32 1023 1024 1025 /****************************************************************** 1026 * Describing Relative Costs of Operations * 1027 ******************************************************************/ 1028 1029 1030 /* Nonzero if access to memory by bytes is slow and undesirable. 1031 For RISC chips, it means that access to memory by bytes is no 1032 better than access by words when possible, so grab a whole word 1033 and maybe make use of that. */ 1034 #define SLOW_BYTE_ACCESS 0 1035 1036 /* On C-SKY, function CSE would allow use of 16-bit jsr instructions 1037 instead of normal 32-bit calls. But it also needs a separate constant 1038 pool entry for the function address and an instruction to load it, and 1039 may cause additional spills due to increased register pressure, etc. 1040 It doesn't seem like a good idea overall. */ 1041 #define NO_FUNCTION_CSE 1 1042 1043 /* Try to generate sequences that don't involve branches, we can then use 1044 conditional instructions. */ 1045 #define BRANCH_COST(speed_p, predictable_p) \ 1046 csky_default_branch_cost (speed_p, predictable_p) 1047 1048 /* False if short circuit operation is preferred. */ 1049 #define LOGICAL_OP_NON_SHORT_CIRCUIT \ 1050 (csky_default_logical_op_non_short_circuit ()) 1051 1052 1053 /****************************************************************** 1054 * Generating Code for Profiling * 1055 ******************************************************************/ 1056 1057 1058 #define FUNCTION_PROFILER(FILE, LABELNO) 1059 1060 #endif /* GCC_CSKY_H */ 1061