1 /* PR target/95355 */
2 /* { dg-do assemble { target avx512dq } } */
3 /* { dg-require-effective-target int128 } */
4 /* { dg-require-effective-target masm_intel } */
5 /* { dg-options "-O -fno-tree-dominator-opts -fno-tree-fre -ftree-slp-vectorize -fno-tree-ter -mavx512dq -masm=intel" } */
6 
7 typedef int __attribute__((__vector_size__(64))) U;
8 typedef __int128 __attribute__((__vector_size__(32))) V;
9 
10 U i;
11 V j;
12 
13 int
foo(unsigned char l)14 foo(unsigned char l)
15 {
16   V m = j % 999;
17   U n = l <= i;
18   V o = ((union { U a; V b[2]; }) n).b[0] + m;
19   return o[0];
20 }
21