1 /* Verify that overloaded built-ins for vec_st* with short
2 inputs produce the right code. */
3
4 /* { dg-do compile } */
5 /* { dg-require-effective-target powerpc_altivec_ok } */
6 /* { dg-options "-maltivec -O2" } */
7
8 #include <altivec.h>
9 // vector signed short vec_ld (int, const vector signed short *);
10 // void vec_st (vector signed short, int, vector signed short *);
11
12 void
testst_1(vector signed short vss1,int i1,vector signed short * vssp)13 testst_1 (vector signed short vss1, int i1, vector signed short * vssp)
14 {
15 return vec_st(vss1, i1, vssp);
16 }
17 void
testst_2(vector signed short vss1,int i1,signed short * ssp)18 testst_2 (vector signed short vss1, int i1, signed short * ssp)
19 {
20 return vec_st(vss1, i1, ssp);
21 }
22 void
testst_3(vector unsigned short vus1,int i1,vector unsigned short * vusp)23 testst_3 (vector unsigned short vus1, int i1, vector unsigned short * vusp)
24 {
25 return vec_st(vus1, i1, vusp);
26 }
27 void
testst_4(vector unsigned short vus1,int i1,unsigned short * usp)28 testst_4 (vector unsigned short vus1, int i1, unsigned short * usp)
29 {
30 return vec_st(vus1, i1, usp);
31 }
32 void
testst_5(vector bool short vbs1,int i1,vector bool short * vbsp)33 testst_5 (vector bool short vbs1, int i1, vector bool short * vbsp)
34 {
35 return vec_st(vbs1, i1, vbsp);
36 }
37 void
testst_6(vector bool short vbs1,int i1,unsigned short * vusp)38 testst_6 (vector bool short vbs1, int i1, unsigned short * vusp)
39 {
40 return vec_st(vbs1, i1, vusp);
41 }
42 void
testst_7(vector bool short vbs1,int i1,signed short * vssp)43 testst_7 (vector bool short vbs1, int i1, signed short * vssp)
44 {
45 return vec_st(vbs1, i1, vssp);
46 }
47 void
testst_cst1(vector signed short vss1,int i1,vector signed short * vssp)48 testst_cst1 (vector signed short vss1, int i1, vector signed short * vssp)
49 {
50 return vec_st(vss1, 12, vssp);
51 }
52 void
testst_cst2(vector signed short vss1,int i1,signed short * ssp)53 testst_cst2 (vector signed short vss1, int i1, signed short * ssp)
54 {
55 return vec_st(vss1, 16, ssp);
56 }
57 void
testst_cst3(vector unsigned short vus1,int i1,vector unsigned short * vusp)58 testst_cst3 (vector unsigned short vus1, int i1, vector unsigned short * vusp)
59 {
60 return vec_st(vus1, 20, vusp);
61 }
62 void
testst_cst4(vector unsigned short vus1,int i1,unsigned short * usp)63 testst_cst4 (vector unsigned short vus1, int i1, unsigned short * usp)
64 {
65 return vec_st(vus1, 24, usp);
66 }
67 void
testst_cst5(vector bool short vbs1,int i1,vector bool short * vbsp)68 testst_cst5 (vector bool short vbs1, int i1, vector bool short * vbsp)
69 {
70 return vec_st(vbs1, 28, vbsp);
71 }
72 void
testst_cst6(vector bool short vbs1,int i1,unsigned short * vusp)73 testst_cst6 (vector bool short vbs1, int i1, unsigned short * vusp)
74 {
75 return vec_st(vbs1, 32, vusp);
76 }
77 void
testst_cst7(vector bool short vbs1,int i1,signed short * vssp)78 testst_cst7 (vector bool short vbs1, int i1, signed short * vssp)
79 {
80 return vec_st(vbs1, 36, vssp);
81 }
82
83 /* { dg-final { scan-assembler-times {\m(?:stvx|stxv|stxvx)\M} 14} } */
84