1; Command line options for the Renesas RL78 port of GCC. 2; Copyright (C) 2011-2021 Free Software Foundation, Inc. 3; Contributed by Red Hat. 4; 5; This file is part of GCC. 6; 7; GCC is free software; you can redistribute it and/or modify it under 8; the terms of the GNU General Public License as published by the Free 9; Software Foundation; either version 3, or (at your option) any later 10; version. 11; 12; GCC is distributed in the hope that it will be useful, but WITHOUT ANY 13; WARRANTY; without even the implied warranty of MERCHANTABILITY or 14; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 15; for more details. 16; 17; You should have received a copy of the GNU General Public License 18; along with GCC; see the file COPYING3. If not see 19; <http://www.gnu.org/licenses/>. 20;--------------------------------------------------- 21 22HeaderInclude 23config/rl78/rl78-opts.h 24 25msim 26Target 27Use the simulator runtime. 28 29mmul= 30Target RejectNegative Joined Var(rl78_mul_type) Tolower Enum(rl78_mul_types) Init(MUL_UNINIT) 31Selects the type of hardware multiplication and division to use (none/g13/g14). 32 33Enum 34Name(rl78_mul_types) Type(enum rl78_mul_types) 35 36EnumValue 37Enum(rl78_mul_types) String(g10) Value(MUL_NONE) 38 39EnumValue 40Enum(rl78_mul_types) String(g13) Value(MUL_G13) 41 42EnumValue 43Enum(rl78_mul_types) String(g14) Value(MUL_G14) 44 45EnumValue 46Enum(rl78_mul_types) String(rl78) Value(MUL_G14) 47 48mallregs 49Target Mask(ALLREGS) Optimization 50Use all registers, reserving none for interrupt handlers. 51 52mrelax 53Target Optimization 54Enable assembler and linker relaxation. Enabled by default at -Os. 55 56mcpu= 57Target RejectNegative Joined Var(rl78_cpu_type) ToLower Enum(rl78_cpu_types) Init(CPU_UNINIT) 58Selects the type of RL78 core being targeted (g10/g13/g14). The default is the G14. If set, also selects the hardware multiply support to be used. 59 60Enum 61Name(rl78_cpu_types) Type(enum rl78_cpu_types) 62 63EnumValue 64Enum(rl78_cpu_types) String(g10) Value(CPU_G10) 65 66EnumValue 67Enum(rl78_cpu_types) String(g13) Value(CPU_G13) 68 69EnumValue 70Enum(rl78_cpu_types) String(g14) Value(CPU_G14) 71 72EnumValue 73Enum(rl78_cpu_types) String(rl78) Value(CPU_G14) 74 75mg10 76Target RejectNegative Alias(mcpu=, g10) 77Alias for -mcpu=g10. 78 79mg13 80Target RejectNegative Alias(mcpu=, g13) 81Alias for -mcpu=g13. 82 83mg14 84Target RejectNegative Alias(mcpu=, g14) 85Alias for -mcpu=g14. 86 87mrl78 88Target RejectNegative Alias(mcpu=, g14) 89Alias for -mcpu=g14. 90 91mes0 92Target Mask(ES0) 93Assume ES is zero throughout program execution, use ES: for read-only data. 94 95msave-mduc-in-interrupts 96Target Mask(SAVE_MDUC_REGISTERS) 97Stores the MDUC registers in interrupt handlers for G13 target. 98