1 /* { dg-do assemble { target aarch64_asm_sve_ok } } */ 2 /* { dg-options "-O3 -msve-vector-bits=256 --save-temps" } */ 3 4 #include <stdint.h> 5 6 #define DUP4(X) X, X, X, X 7 #define DUP8(X) DUP4 (X), DUP4 (X) 8 #define DUP16(X) DUP8 (X), DUP8 (X) 9 #define DUP32(X) DUP16 (X), DUP16 (X) 10 11 typedef uint8_t vuint8_t __attribute__ ((vector_size (32))); 12 typedef uint16_t vuint16_t __attribute__ ((vector_size (32))); 13 typedef uint32_t vuint32_t __attribute__ ((vector_size (32))); 14 typedef uint64_t vuint64_t __attribute__ ((vector_size (32))); 15 16 #define TEST(TYPE, NAME, INIT) \ 17 void \ 18 NAME##_##TYPE (TYPE *dest, __typeof__(dest[0][0]) *ptr) \ 19 { \ 20 TYPE x = { INIT }; \ 21 *dest = x; \ 22 } 23 24 #define TEST_GROUP(TYPE, NAME, DUP) \ 25 TEST (TYPE, NAME_##m1, DUP (ptr[-1])) \ 26 TEST (TYPE, NAME_##0, DUP (ptr[0])) \ 27 TEST (TYPE, NAME_##63, DUP (ptr[63])) \ 28 TEST (TYPE, NAME_##64, DUP (ptr[64])) 29 30 TEST_GROUP (vuint8_t, t8, DUP32) 31 TEST_GROUP (vuint16_t, t16, DUP16) 32 TEST_GROUP (vuint32_t, t16, DUP8) 33 TEST_GROUP (vuint64_t, t16, DUP4) 34 35 /* { dg-final { scan-assembler-not {\tld1rb\tz[0-9]+\.b, p[0-7]/z, \[x1, -1\]\n} } } */ 36 /* { dg-final { scan-assembler {\tld1rb\tz[0-9]+\.b, p[0-7]/z, \[x1\]\n} } } */ 37 /* { dg-final { scan-assembler {\tld1rb\tz[0-9]+\.b, p[0-7]/z, \[x1, 63\]\n} } } */ 38 /* { dg-final { scan-assembler-not {\tld1rb\tz[0-9]+\.b, p[0-7]/z, \[x1, 64\]\n} } } */ 39 40 /* { dg-final { scan-assembler-not {\tld1rh\tz[0-9]+\.h, p[0-7]/z, \[x1, -1\]\n} } } */ 41 /* { dg-final { scan-assembler {\tld1rh\tz[0-9]+\.h, p[0-7]/z, \[x1\]\n} } } */ 42 /* { dg-final { scan-assembler {\tld1rh\tz[0-9]+\.h, p[0-7]/z, \[x1, 126\]\n} } } */ 43 /* { dg-final { scan-assembler-not {\tld1rh\tz[0-9]+\.h, p[0-7]/z, \[x1, 128\]\n} } } */ 44 45 /* { dg-final { scan-assembler-not {\tld1rw\tz[0-9]+\.s, p[0-7]/z, \[x1, -1\]\n} } } */ 46 /* { dg-final { scan-assembler {\tld1rw\tz[0-9]+\.s, p[0-7]/z, \[x1\]\n} } } */ 47 /* { dg-final { scan-assembler {\tld1rw\tz[0-9]+\.s, p[0-7]/z, \[x1, 252\]\n} } } */ 48 /* { dg-final { scan-assembler-not {\tld1rw\tz[0-9]+\.s, p[0-7]/z, \[x1, 256\]\n} } } */ 49 50 /* { dg-final { scan-assembler-not {\tld1rd\tz[0-9]+\.d, p[0-7]/z, \[x1, -1\]\n} } } */ 51 /* { dg-final { scan-assembler {\tld1rd\tz[0-9]+\.d, p[0-7]/z, \[x1\]\n} } } */ 52 /* { dg-final { scan-assembler {\tld1rd\tz[0-9]+\.d, p[0-7]/z, \[x1, 504\]\n} } } */ 53 /* { dg-final { scan-assembler-not {\tld1rd\tz[0-9]+\.d, p[0-7]/z, \[x1, 512\]\n} } } */ 54