1 /* { dg-do run } */
2 /* { dg-options "-O3 -march=z13 -mzarch --save-temps" } */
3
4 #include <stddef.h>
5 #include <limits.h>
6
7 int __attribute__((noinline,noclone))
sadd(int a,int * res)8 sadd (int a, int *res)
9 {
10 return __builtin_sadd_overflow(a, -1, res);
11 }
12
13 int __attribute__((noinline,noclone))
ssub(int a,int * res)14 ssub (int a, int *res)
15 {
16 return __builtin_ssub_overflow(a, -1, res);
17 }
18
19
20 int __attribute__((noinline,noclone))
saddl(long a,long * res)21 saddl (long a, long *res)
22 {
23 return __builtin_saddl_overflow(a, -1, res);
24 }
25
26 int __attribute__((noinline,noclone))
ssubl(long a,long * res)27 ssubl (long a, long *res)
28 {
29 return __builtin_ssubl_overflow(a, -1, res);
30 }
31
32
33 int __attribute__((noinline,noclone))
saddll(long long a,long long * res)34 saddll (long long a, long long *res)
35 {
36 return __builtin_saddll_overflow(a, -1, res);
37 }
38
39 int __attribute__((noinline,noclone))
ssubll(long long a,long long * res)40 ssubll (long long a, long long *res)
41 {
42 return __builtin_ssubll_overflow(a, -1, res);
43 }
44
45 /* With the attribute at least main always uses the same instructions
46 regardless of the -march setting. This is necessary for the
47 scan-assembler-times directive below. */
48 int __attribute__ ((target("arch=z10")))
main()49 main ()
50 {
51 int ret = 0;
52 int result;
53 long lresult;
54 long long llresult;
55
56 ret += !!sadd (INT_MIN, &result);
57 ret += !!ssub (INT_MIN, &result);
58 ret += !!saddl (LONG_MIN, &lresult);
59 ret += !!ssubl (LONG_MIN, &lresult);
60 ret += !!saddll (LLONG_MIN, &llresult);
61 ret += !!ssubll (LLONG_MIN, &llresult);
62
63 if (ret != 3)
64 __builtin_abort ();
65
66 return 0;
67 }
68
69 /* Check that no compare or bitop instructions are emitted. */
70 /* { dg-final { scan-assembler-not "\tcr" } } */
71 /* { dg-final { scan-assembler-not "\txr" } } */
72 /* { dg-final { scan-assembler-not "\tnr" } } */
73 /* { dg-final { scan-assembler-not "\tcgr" } } */
74 /* { dg-final { scan-assembler-not "\txgr" } } */
75 /* { dg-final { scan-assembler-not "\tngr" } } */
76 /* On 31 bit the long long variants use risbgn to merge the 32 bit
77 regs into a 64 bit reg. */
78 /* { dg-final { scan-assembler-not "\trisbg" { target { lp64 } } } } */
79 /* Just one for the ret != 3 comparison. */
80 /* { dg-final { scan-assembler-times "ci" 1 } } */
81 /* { dg-final { scan-assembler-times "\tlochio\t" 6 { target { ! lp64 } } } } */
82 /* { dg-final { scan-assembler-times "\tlocghio\t" 6 { target lp64 } } } */
83