1 /* Definitions of target machine for GCC, for SPARC running Solaris 2 2 Copyright (C) 1992-2013 Free Software Foundation, Inc. 3 Contributed by Ron Guilmette (rfg@netcom.com). 4 Additional changes by David V. Henkel-Wallace (gumby@cygnus.com). 5 6 This file is part of GCC. 7 8 GCC is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 3, or (at your option) 11 any later version. 12 13 GCC is distributed in the hope that it will be useful, 14 but WITHOUT ANY WARRANTY; without even the implied warranty of 15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 GNU General Public License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with GCC; see the file COPYING3. If not see 20 <http://www.gnu.org/licenses/>. */ 21 22 /* Solaris allows 64-bit out and global registers to be used in 32-bit mode. 23 sparc_override_options will disable V8+ if either not generating V9 code 24 or generating 64-bit code. */ 25 #undef TARGET_DEFAULT 26 #ifdef TARGET_64BIT_DEFAULT 27 #define TARGET_DEFAULT \ 28 (MASK_V9 + MASK_64BIT + MASK_PTR64 + MASK_STACK_BIAS + \ 29 MASK_V8PLUS + MASK_APP_REGS + MASK_FPU + MASK_LONG_DOUBLE_128) 30 #else 31 #define TARGET_DEFAULT \ 32 (MASK_V8PLUS + MASK_APP_REGS + MASK_FPU + MASK_LONG_DOUBLE_128) 33 #endif 34 35 /* The default code model used to be CM_MEDANY on Solaris 36 but even Sun eventually found it to be quite wasteful 37 and changed it to CM_MEDMID in the Studio 9 compiler. */ 38 #undef SPARC_DEFAULT_CMODEL 39 #define SPARC_DEFAULT_CMODEL CM_MEDMID 40 41 /* Select a format to encode pointers in exception handling data. CODE 42 is 0 for data, 1 for code labels, 2 for function pointers. GLOBAL is 43 true if the symbol may be affected by dynamic relocations. 44 45 Some Solaris dynamic linkers don't handle unaligned section relative 46 relocs properly, so force them to be aligned. */ 47 #ifndef HAVE_AS_SPARC_UA_PCREL 48 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \ 49 ((flag_pic || GLOBAL) ? DW_EH_PE_aligned : DW_EH_PE_absptr) 50 #endif 51 52 53 54 /* Supposedly the same as vanilla sparc svr4, except for the stuff below: */ 55 56 /* If the assembler supports -xarch=sparc4, we switch to the explicit 57 word size selection mechanism available both in GNU as and Sun as, 58 for the Niagara4 and above configurations. */ 59 #ifdef HAVE_AS_SPARC4 60 61 #define AS_SPARC32_FLAG "" 62 #define AS_SPARC64_FLAG "" 63 64 #ifndef USE_GAS 65 #undef ASM_ARCH32_SPEC 66 #define ASM_ARCH32_SPEC "-m32" 67 #undef ASM_ARCH64_SPEC 68 #define ASM_ARCH64_SPEC "-m64" 69 #endif 70 71 /* Both Sun as and GNU as understand -K PIC. */ 72 #undef ASM_SPEC 73 #define ASM_SPEC ASM_SPEC_BASE " %(asm_arch)" ASM_PIC_SPEC 74 75 #else /* HAVE_AS_SPARC4 */ 76 77 #define AS_SPARC32_FLAG "-xarch=v8plus" 78 #define AS_SPARC64_FLAG "-xarch=v9" 79 80 #undef AS_NIAGARA4_FLAG 81 #define AS_NIAGARA4_FLAG AS_NIAGARA3_FLAG 82 83 #undef ASM_ARCH32_SPEC 84 #define ASM_ARCH32_SPEC "" 85 86 #undef ASM_ARCH64_SPEC 87 #define ASM_ARCH64_SPEC "" 88 89 #undef ASM_ARCH_DEFAULT_SPEC 90 #define ASM_ARCH_DEFAULT_SPEC "" 91 92 #undef ASM_ARCH_SPEC 93 #define ASM_ARCH_SPEC "" 94 95 /* Both Sun as and GNU as understand -K PIC. */ 96 #undef ASM_SPEC 97 #define ASM_SPEC ASM_SPEC_BASE ASM_PIC_SPEC 98 99 #endif /* HAVE_AS_SPARC4 */ 100 101 102 #undef ASM_CPU32_DEFAULT_SPEC 103 #define ASM_CPU32_DEFAULT_SPEC "" 104 #undef ASM_CPU64_DEFAULT_SPEC 105 #define ASM_CPU64_DEFAULT_SPEC "-xarch=v9" 106 107 #if TARGET_CPU_DEFAULT == TARGET_CPU_v9 108 #undef CPP_CPU64_DEFAULT_SPEC 109 #define CPP_CPU64_DEFAULT_SPEC "" 110 #undef ASM_CPU32_DEFAULT_SPEC 111 #define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plus" 112 #undef ASM_CPU_DEFAULT_SPEC 113 #define ASM_CPU_DEFAULT_SPEC ASM_CPU32_DEFAULT_SPEC 114 #endif 115 116 #if TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc 117 #undef CPP_CPU64_DEFAULT_SPEC 118 #define CPP_CPU64_DEFAULT_SPEC "" 119 #undef ASM_CPU32_DEFAULT_SPEC 120 #define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusa" 121 #undef ASM_CPU64_DEFAULT_SPEC 122 #define ASM_CPU64_DEFAULT_SPEC "-xarch=v9a" 123 #undef ASM_CPU_DEFAULT_SPEC 124 #define ASM_CPU_DEFAULT_SPEC ASM_CPU32_DEFAULT_SPEC 125 #endif 126 127 #if TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc3 128 #undef CPP_CPU64_DEFAULT_SPEC 129 #define CPP_CPU64_DEFAULT_SPEC "" 130 #undef ASM_CPU32_DEFAULT_SPEC 131 #define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusb" 132 #undef ASM_CPU64_DEFAULT_SPEC 133 #define ASM_CPU64_DEFAULT_SPEC "-xarch=v9b" 134 #undef ASM_CPU_DEFAULT_SPEC 135 #define ASM_CPU_DEFAULT_SPEC ASM_CPU32_DEFAULT_SPEC 136 #endif 137 138 #if TARGET_CPU_DEFAULT == TARGET_CPU_niagara 139 #undef CPP_CPU64_DEFAULT_SPEC 140 #define CPP_CPU64_DEFAULT_SPEC "" 141 #undef ASM_CPU32_DEFAULT_SPEC 142 #define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusb" 143 #undef ASM_CPU64_DEFAULT_SPEC 144 #define ASM_CPU64_DEFAULT_SPEC "-xarch=v9b" 145 #undef ASM_CPU_DEFAULT_SPEC 146 #define ASM_CPU_DEFAULT_SPEC ASM_CPU32_DEFAULT_SPEC 147 #endif 148 149 #if TARGET_CPU_DEFAULT == TARGET_CPU_niagara2 150 #undef CPP_CPU64_DEFAULT_SPEC 151 #define CPP_CPU64_DEFAULT_SPEC "" 152 #undef ASM_CPU32_DEFAULT_SPEC 153 #define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plusb" 154 #undef ASM_CPU64_DEFAULT_SPEC 155 #define ASM_CPU64_DEFAULT_SPEC "-xarch=v9b" 156 #undef ASM_CPU_DEFAULT_SPEC 157 #define ASM_CPU_DEFAULT_SPEC ASM_CPU32_DEFAULT_SPEC 158 #endif 159 160 #if TARGET_CPU_DEFAULT == TARGET_CPU_niagara3 161 #undef CPP_CPU64_DEFAULT_SPEC 162 #define CPP_CPU64_DEFAULT_SPEC "" 163 #undef ASM_CPU32_DEFAULT_SPEC 164 #define ASM_CPU32_DEFAULT_SPEC "-xarch=v8plus" AS_NIAGARA3_FLAG 165 #undef ASM_CPU64_DEFAULT_SPEC 166 #define ASM_CPU64_DEFAULT_SPEC "-xarch=v9" AS_NIAGARA3_FLAG 167 #undef ASM_CPU_DEFAULT_SPEC 168 #define ASM_CPU_DEFAULT_SPEC ASM_CPU32_DEFAULT_SPEC 169 #endif 170 171 #if TARGET_CPU_DEFAULT == TARGET_CPU_niagara4 172 #undef CPP_CPU64_DEFAULT_SPEC 173 #define CPP_CPU64_DEFAULT_SPEC "" 174 #undef ASM_CPU32_DEFAULT_SPEC 175 #define ASM_CPU32_DEFAULT_SPEC AS_SPARC32_FLAG AS_NIAGARA4_FLAG 176 #undef ASM_CPU64_DEFAULT_SPEC 177 #define ASM_CPU64_DEFAULT_SPEC AS_SPARC64_FLAG AS_NIAGARA4_FLAG 178 #undef ASM_CPU_DEFAULT_SPEC 179 #define ASM_CPU_DEFAULT_SPEC ASM_CPU32_DEFAULT_SPEC 180 #endif 181 182 #undef CPP_CPU_SPEC 183 #define CPP_CPU_SPEC "\ 184 %{mcpu=sparclet|mcpu=tsc701:-D__sparclet__} \ 185 %{mcpu=sparclite|mcpu-f930|mcpu=f934:-D__sparclite__} \ 186 %{mcpu=v8:" DEF_ARCH32_SPEC("-D__sparcv8") "} \ 187 %{mcpu=supersparc:-D__supersparc__ " DEF_ARCH32_SPEC("-D__sparcv8") "} \ 188 %{mcpu=v9|mcpu=ultrasparc|mcpu=ultrasparc3|mcpu=niagara|mcpu=niagara2|mcpu=niagara3|mcpu=niagara4:" DEF_ARCH32_SPEC("-D__sparcv8") "} \ 189 %{!mcpu*:%(cpp_cpu_default)} \ 190 " 191 192 #undef CPP_CPU_DEFAULT_SPEC 193 #define CPP_CPU_DEFAULT_SPEC \ 194 (DEFAULT_ARCH32_P ? "\ 195 %{m64:" CPP_CPU64_DEFAULT_SPEC "} \ 196 %{!m64:" CPP_CPU32_DEFAULT_SPEC "} \ 197 " : "\ 198 %{m32:" CPP_CPU32_DEFAULT_SPEC "} \ 199 %{!m32:" CPP_CPU64_DEFAULT_SPEC "} \ 200 ") 201 202 #undef CPP_ARCH32_SPEC 203 #define CPP_ARCH32_SPEC "" 204 #undef CPP_ARCH64_SPEC 205 #define CPP_ARCH64_SPEC "-D__arch64__ -D__sparcv9" 206 207 #undef CPP_ARCH_SPEC 208 #define CPP_ARCH_SPEC "\ 209 %{m32:%(cpp_arch32)} \ 210 %{m64:%(cpp_arch64)} \ 211 %{!m32:%{!m64:%(cpp_arch_default)}} \ 212 " 213 214 /* -mcpu=native handling only makes sense with compiler running on 215 a SPARC chip. */ 216 #if defined(__sparc__) && defined(__SVR4) 217 extern const char *host_detect_local_cpu (int argc, const char **argv); 218 # define EXTRA_SPEC_FUNCTIONS \ 219 { "local_cpu_detect", host_detect_local_cpu }, 220 221 # define MCPU_MTUNE_NATIVE_SPECS \ 222 " %{mcpu=native:%<mcpu=native %:local_cpu_detect(cpu)}" \ 223 " %{mtune=native:%<mtune=native %:local_cpu_detect(tune)}" 224 #else 225 # define MCPU_MTUNE_NATIVE_SPECS "" 226 #endif 227 228 #define DRIVER_SELF_SPECS MCPU_MTUNE_NATIVE_SPECS 229 230 #undef CC1_SPEC 231 #if DEFAULT_ARCH32_P 232 #define CC1_SPEC "\ 233 %{m64:%{m32:%emay not use both -m32 and -m64}} \ 234 %{m64:-mptr64 -mstack-bias -mno-v8plus \ 235 %{!mcpu*:-%{!mv8plus:mcpu=v9}}} \ 236 " 237 #else 238 #define CC1_SPEC "\ 239 %{m32:%{m64:%emay not use both -m32 and -m64}} \ 240 %{m32:-mptr32 -mno-stack-bias \ 241 %{!mcpu*:%{!mv8plus:-mcpu=v9}}} \ 242 %{mv8plus:-m32 -mptr32 -mno-stack-bias \ 243 %{!mcpu*:-mcpu=v9}} \ 244 " 245 #endif 246 247 /* Support for a compile-time default CPU, et cetera. The rules are: 248 --with-cpu is ignored if -mcpu is specified. 249 --with-tune is ignored if -mtune is specified. 250 --with-float is ignored if -mhard-float, -msoft-float, -mfpu, or -mno-fpu 251 are specified. 252 In the SPARC_BI_ARCH compiler we cannot pass %{!mcpu=*:-mcpu=%(VALUE)} 253 here, otherwise say -mcpu=v7 would be passed even when -m64. 254 CC1_SPEC above takes care of this instead. */ 255 #undef OPTION_DEFAULT_SPECS 256 #if DEFAULT_ARCH32_P 257 #define OPTION_DEFAULT_SPECS \ 258 {"cpu", "%{!m64:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \ 259 {"tune", "%{!mtune=*:-mtune=%(VALUE)}" }, \ 260 {"float", "%{!msoft-float:%{!mhard-float:%{!mfpu:%{!mno-fpu:-m%(VALUE)-float}}}}" } 261 #else 262 #define OPTION_DEFAULT_SPECS \ 263 {"cpu", "%{!m32:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \ 264 {"tune", "%{!mtune=*:-mtune=%(VALUE)}" }, \ 265 {"float", "%{!msoft-float:%{!mhard-float:%{!mfpu:%{!mno-fpu:-m%(VALUE)-float}}}}" } 266 #endif 267 268 #undef ASM_CPU_SPEC 269 #define ASM_CPU_SPEC "\ 270 %{mcpu=v9:" DEF_ARCH32_SPEC("-xarch=v8plus") DEF_ARCH64_SPEC("-xarch=v9") "} \ 271 %{mcpu=ultrasparc:" DEF_ARCH32_SPEC("-xarch=v8plusa") DEF_ARCH64_SPEC("-xarch=v9a") "} \ 272 %{mcpu=ultrasparc3:" DEF_ARCH32_SPEC("-xarch=v8plusb") DEF_ARCH64_SPEC("-xarch=v9b") "} \ 273 %{mcpu=niagara:" DEF_ARCH32_SPEC("-xarch=v8plusb") DEF_ARCH64_SPEC("-xarch=v9b") "} \ 274 %{mcpu=niagara2:" DEF_ARCH32_SPEC("-xarch=v8plusb") DEF_ARCH64_SPEC("-xarch=v9b") "} \ 275 %{mcpu=niagara3:" DEF_ARCH32_SPEC("-xarch=v8plus" AS_NIAGARA3_FLAG) DEF_ARCH64_SPEC("-xarch=v9" AS_NIAGARA3_FLAG) "} \ 276 %{mcpu=niagara4:" DEF_ARCH32_SPEC(AS_SPARC32_FLAG AS_NIAGARA4_FLAG) DEF_ARCH64_SPEC(AS_SPARC64_FLAG AS_NIAGARA4_FLAG) "} \ 277 %{!mcpu=niagara4:%{!mcpu=niagara3:%{!mcpu=niagara2:%{!mcpu=niagara:%{!mcpu=ultrasparc3:%{!mcpu=ultrasparc:%{!mcpu=v9:%{mcpu*:" DEF_ARCH32_SPEC("-xarch=v8") DEF_ARCH64_SPEC("-xarch=v9") "}}}}}}}} \ 278 %{!mcpu*:%(asm_cpu_default)} \ 279 " 280 281 #ifdef USE_GLD 282 /* Since binutils 2.21, GNU ld supports new *_sol2 emulations to strictly 283 follow the Solaris 2 ABI. Prefer them if present. */ 284 #ifdef HAVE_LD_SOL2_EMULATION 285 #define ARCH32_EMULATION "elf32_sparc_sol2" 286 #define ARCH64_EMULATION "elf64_sparc_sol2" 287 #else 288 #define ARCH32_EMULATION "elf32_sparc" 289 #define ARCH64_EMULATION "elf64_sparc" 290 #endif 291 #endif 292 293 #define ARCH64_SUBDIR "sparcv9" 294 295 #define SUBTARGET_CPU_EXTRA_SPECS 296 297 298 299 /* Register the Solaris-specific #pragma directives. */ 300 #define REGISTER_TARGET_PRAGMAS() solaris_register_pragmas () 301 302 #if defined(USE_GAS) && defined(HAVE_AS_TLS) 303 /* Use GNU extensions to TLS support. */ 304 #undef TARGET_SUN_TLS 305 #undef TARGET_GNU_TLS 306 #define TARGET_SUN_TLS 0 307 #define TARGET_GNU_TLS 1 308 #endif 309 310 #undef LOCAL_LABEL_PREFIX 311 #define LOCAL_LABEL_PREFIX "." 312 313 /* The Solaris 2 assembler uses .skip, not .zero, so put this back. */ 314 #undef ASM_OUTPUT_SKIP 315 #define ASM_OUTPUT_SKIP(FILE,SIZE) \ 316 fprintf (FILE, "\t.skip %u\n", (int)(SIZE)) 317 318 /* This is how to store into the string LABEL 319 the symbol_ref name of an internal numbered label where 320 PREFIX is the class of label and NUM is the number within the class. 321 This is suitable for output with `assemble_name'. */ 322 323 #undef ASM_GENERATE_INTERNAL_LABEL 324 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ 325 sprintf ((LABEL), "*.L%s%lu", (PREFIX), (unsigned long)(NUM)) 326 327 /* The native TLS-enabled assembler requires the directive #tls_object 328 to be put on objects in TLS sections (as of v7.1). This is not 329 required by GNU as but supported on SPARC. */ 330 #undef ASM_DECLARE_OBJECT_NAME 331 #define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \ 332 do \ 333 { \ 334 HOST_WIDE_INT size; \ 335 \ 336 if (targetm.have_tls && DECL_THREAD_LOCAL_P (DECL)) \ 337 ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "tls_object"); \ 338 else \ 339 ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object"); \ 340 \ 341 size_directive_output = 0; \ 342 if (!flag_inhibit_size_directive \ 343 && (DECL) && DECL_SIZE (DECL)) \ 344 { \ 345 size_directive_output = 1; \ 346 size = int_size_in_bytes (TREE_TYPE (DECL)); \ 347 ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, size); \ 348 } \ 349 \ 350 ASM_OUTPUT_LABEL (FILE, NAME); \ 351 } \ 352 while (0) 353 354 /* Output a simple call for .init/.fini. */ 355 #define ASM_OUTPUT_CALL(FILE, FN) \ 356 do \ 357 { \ 358 fprintf (FILE, "\tcall\t"); \ 359 targetm.asm_out.print_operand (FILE, XEXP (DECL_RTL (FN), 0), 0); \ 360 fprintf (FILE, "\n\tnop\n"); \ 361 } \ 362 while (0) 363 364 #ifndef USE_GAS 365 /* This is how to output an assembler line that says to advance 366 the location counter to a multiple of 2**LOG bytes using the 367 NOP instruction as padding. The filler pattern doesn't work 368 with GNU as. */ 369 #define ASM_OUTPUT_ALIGN_WITH_NOP(FILE,LOG) \ 370 if ((LOG) != 0) \ 371 fprintf (FILE, "\t.align %d,0x1000000\n", (1<<(LOG))) 372 373 /* Use Solaris ELF section syntax with Sun as. */ 374 #undef TARGET_ASM_NAMED_SECTION 375 #define TARGET_ASM_NAMED_SECTION sparc_solaris_elf_asm_named_section 376 377 /* Sun as requires doublequoted section names on SPARC. While GNU as 378 supports that, too, we prefer the standard variant. */ 379 #undef SECTION_NAME_FORMAT 380 #define SECTION_NAME_FORMAT "\"%s\"" 381 #endif /* !USE_GAS */ 382 383 /* Undefine this so that attribute((init_priority)) works with GNU ld. */ 384 #ifdef USE_GLD 385 #undef CTORS_SECTION_ASM_OP 386 #undef DTORS_SECTION_ASM_OP 387 #endif 388 389 390 391 /* Define for support of TFmode long double. 392 SPARC ABI says that long double is 4 words. */ 393 #define LONG_DOUBLE_TYPE_SIZE 128 394 395 /* Solaris's _Qp_* library routine implementation clobbers the output 396 memory before the inputs are fully consumed. */ 397 398 #undef TARGET_BUGGY_QP_LIB 399 #define TARGET_BUGGY_QP_LIB 1 400 401 #undef SUN_CONVERSION_LIBFUNCS 402 #define SUN_CONVERSION_LIBFUNCS 1 403 404 #undef DITF_CONVERSION_LIBFUNCS 405 #define DITF_CONVERSION_LIBFUNCS 1 406 407 #undef SUN_INTEGER_MULTIPLY_64 408 #define SUN_INTEGER_MULTIPLY_64 1 409