1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2013 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 #include "config.h"
21 #include "system.h"
22 #include "coretypes.h"
23 #include "tm.h"
24 #include "machmode.h"
25 #include "rtl.h"
26 #include "tree.h"
27 #include "flags.h"
28 #include "regs.h"
29 #include "hard-reg-set.h"
30 #include "except.h"
31 #include "function.h"
32 #include "insn-config.h"
33 #include "insn-attr.h"
34 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
35 #include "expr.h"
36 #include "optabs.h"
37 #include "libfuncs.h"
38 #include "recog.h"
39 #include "reload.h"
40 #include "typeclass.h"
41 #include "toplev.h"
42 #include "langhooks.h"
43 #include "intl.h"
44 #include "tm_p.h"
45 #include "tree-iterator.h"
46 #include "tree-flow.h"
47 #include "target.h"
48 #include "common/common-target.h"
49 #include "timevar.h"
50 #include "df.h"
51 #include "diagnostic.h"
52 #include "ssaexpand.h"
53 #include "target-globals.h"
54 #include "params.h"
55
56 /* Decide whether a function's arguments should be processed
57 from first to last or from last to first.
58
59 They should if the stack and args grow in opposite directions, but
60 only if we have push insns. */
61
62 #ifdef PUSH_ROUNDING
63
64 #ifndef PUSH_ARGS_REVERSED
65 #if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD)
66 #define PUSH_ARGS_REVERSED /* If it's last to first. */
67 #endif
68 #endif
69
70 #endif
71
72 #ifndef STACK_PUSH_CODE
73 #ifdef STACK_GROWS_DOWNWARD
74 #define STACK_PUSH_CODE PRE_DEC
75 #else
76 #define STACK_PUSH_CODE PRE_INC
77 #endif
78 #endif
79
80
81 /* If this is nonzero, we do not bother generating VOLATILE
82 around volatile memory references, and we are willing to
83 output indirect addresses. If cse is to follow, we reject
84 indirect addresses so a useful potential cse is generated;
85 if it is used only once, instruction combination will produce
86 the same indirect address eventually. */
87 int cse_not_expected;
88
89 /* This structure is used by move_by_pieces to describe the move to
90 be performed. */
91 struct move_by_pieces_d
92 {
93 rtx to;
94 rtx to_addr;
95 int autinc_to;
96 int explicit_inc_to;
97 rtx from;
98 rtx from_addr;
99 int autinc_from;
100 int explicit_inc_from;
101 unsigned HOST_WIDE_INT len;
102 HOST_WIDE_INT offset;
103 int reverse;
104 };
105
106 /* This structure is used by store_by_pieces to describe the clear to
107 be performed. */
108
109 struct store_by_pieces_d
110 {
111 rtx to;
112 rtx to_addr;
113 int autinc_to;
114 int explicit_inc_to;
115 unsigned HOST_WIDE_INT len;
116 HOST_WIDE_INT offset;
117 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode);
118 void *constfundata;
119 int reverse;
120 };
121
122 static void move_by_pieces_1 (insn_gen_fn, machine_mode,
123 struct move_by_pieces_d *);
124 static bool block_move_libcall_safe_for_call_parm (void);
125 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT);
126 static tree emit_block_move_libcall_fn (int);
127 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
128 static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, enum machine_mode);
129 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
130 static void store_by_pieces_1 (struct store_by_pieces_d *, unsigned int);
131 static void store_by_pieces_2 (insn_gen_fn, machine_mode,
132 struct store_by_pieces_d *);
133 static tree clear_storage_libcall_fn (int);
134 static rtx compress_float_constant (rtx, rtx);
135 static rtx get_subtarget (rtx);
136 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
137 HOST_WIDE_INT, enum machine_mode,
138 tree, int, alias_set_type);
139 static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
140 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT,
141 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
142 enum machine_mode, tree, alias_set_type, bool);
143
144 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
145
146 static int is_aligning_offset (const_tree, const_tree);
147 static void expand_operands (tree, tree, rtx, rtx*, rtx*,
148 enum expand_modifier);
149 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
150 static rtx do_store_flag (sepops, rtx, enum machine_mode);
151 #ifdef PUSH_ROUNDING
152 static void emit_single_push_insn (enum machine_mode, rtx, tree);
153 #endif
154 static void do_tablejump (rtx, enum machine_mode, rtx, rtx, rtx, int);
155 static rtx const_vector_from_tree (tree);
156 static void write_complex_part (rtx, rtx, bool);
157
158 /* This macro is used to determine whether move_by_pieces should be called
159 to perform a structure copy. */
160 #ifndef MOVE_BY_PIECES_P
161 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
162 (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \
163 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
164 #endif
165
166 /* This macro is used to determine whether clear_by_pieces should be
167 called to clear storage. */
168 #ifndef CLEAR_BY_PIECES_P
169 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
170 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
171 < (unsigned int) CLEAR_RATIO (optimize_insn_for_speed_p ()))
172 #endif
173
174 /* This macro is used to determine whether store_by_pieces should be
175 called to "memset" storage with byte values other than zero. */
176 #ifndef SET_BY_PIECES_P
177 #define SET_BY_PIECES_P(SIZE, ALIGN) \
178 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
179 < (unsigned int) SET_RATIO (optimize_insn_for_speed_p ()))
180 #endif
181
182 /* This macro is used to determine whether store_by_pieces should be
183 called to "memcpy" storage when the source is a constant string. */
184 #ifndef STORE_BY_PIECES_P
185 #define STORE_BY_PIECES_P(SIZE, ALIGN) \
186 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
187 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
188 #endif
189
190 /* This is run to set up which modes can be used
191 directly in memory and to initialize the block move optab. It is run
192 at the beginning of compilation and when the target is reinitialized. */
193
194 void
init_expr_target(void)195 init_expr_target (void)
196 {
197 rtx insn, pat;
198 enum machine_mode mode;
199 int num_clobbers;
200 rtx mem, mem1;
201 rtx reg;
202
203 /* Try indexing by frame ptr and try by stack ptr.
204 It is known that on the Convex the stack ptr isn't a valid index.
205 With luck, one or the other is valid on any machine. */
206 mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx);
207 mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx);
208
209 /* A scratch register we can modify in-place below to avoid
210 useless RTL allocations. */
211 reg = gen_rtx_REG (VOIDmode, -1);
212
213 insn = rtx_alloc (INSN);
214 pat = gen_rtx_SET (VOIDmode, NULL_RTX, NULL_RTX);
215 PATTERN (insn) = pat;
216
217 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
218 mode = (enum machine_mode) ((int) mode + 1))
219 {
220 int regno;
221
222 direct_load[(int) mode] = direct_store[(int) mode] = 0;
223 PUT_MODE (mem, mode);
224 PUT_MODE (mem1, mode);
225 PUT_MODE (reg, mode);
226
227 /* See if there is some register that can be used in this mode and
228 directly loaded or stored from memory. */
229
230 if (mode != VOIDmode && mode != BLKmode)
231 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
232 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
233 regno++)
234 {
235 if (! HARD_REGNO_MODE_OK (regno, mode))
236 continue;
237
238 SET_REGNO (reg, regno);
239
240 SET_SRC (pat) = mem;
241 SET_DEST (pat) = reg;
242 if (recog (pat, insn, &num_clobbers) >= 0)
243 direct_load[(int) mode] = 1;
244
245 SET_SRC (pat) = mem1;
246 SET_DEST (pat) = reg;
247 if (recog (pat, insn, &num_clobbers) >= 0)
248 direct_load[(int) mode] = 1;
249
250 SET_SRC (pat) = reg;
251 SET_DEST (pat) = mem;
252 if (recog (pat, insn, &num_clobbers) >= 0)
253 direct_store[(int) mode] = 1;
254
255 SET_SRC (pat) = reg;
256 SET_DEST (pat) = mem1;
257 if (recog (pat, insn, &num_clobbers) >= 0)
258 direct_store[(int) mode] = 1;
259 }
260 }
261
262 mem = gen_rtx_MEM (VOIDmode, gen_rtx_raw_REG (Pmode, 10000));
263
264 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
265 mode = GET_MODE_WIDER_MODE (mode))
266 {
267 enum machine_mode srcmode;
268 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
269 srcmode = GET_MODE_WIDER_MODE (srcmode))
270 {
271 enum insn_code ic;
272
273 ic = can_extend_p (mode, srcmode, 0);
274 if (ic == CODE_FOR_nothing)
275 continue;
276
277 PUT_MODE (mem, srcmode);
278
279 if (insn_operand_matches (ic, 1, mem))
280 float_extend_from_mem[mode][srcmode] = true;
281 }
282 }
283 }
284
285 /* This is run at the start of compiling a function. */
286
287 void
init_expr(void)288 init_expr (void)
289 {
290 memset (&crtl->expr, 0, sizeof (crtl->expr));
291 }
292
293 /* Copy data from FROM to TO, where the machine modes are not the same.
294 Both modes may be integer, or both may be floating, or both may be
295 fixed-point.
296 UNSIGNEDP should be nonzero if FROM is an unsigned type.
297 This causes zero-extension instead of sign-extension. */
298
299 void
convert_move(rtx to,rtx from,int unsignedp)300 convert_move (rtx to, rtx from, int unsignedp)
301 {
302 enum machine_mode to_mode = GET_MODE (to);
303 enum machine_mode from_mode = GET_MODE (from);
304 int to_real = SCALAR_FLOAT_MODE_P (to_mode);
305 int from_real = SCALAR_FLOAT_MODE_P (from_mode);
306 enum insn_code code;
307 rtx libcall;
308
309 /* rtx code for making an equivalent value. */
310 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
311 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
312
313
314 gcc_assert (to_real == from_real);
315 gcc_assert (to_mode != BLKmode);
316 gcc_assert (from_mode != BLKmode);
317
318 /* If the source and destination are already the same, then there's
319 nothing to do. */
320 if (to == from)
321 return;
322
323 /* If FROM is a SUBREG that indicates that we have already done at least
324 the required extension, strip it. We don't handle such SUBREGs as
325 TO here. */
326
327 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
328 && (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (from)))
329 >= GET_MODE_PRECISION (to_mode))
330 && SUBREG_PROMOTED_UNSIGNED_P (from) == unsignedp)
331 from = gen_lowpart (to_mode, from), from_mode = to_mode;
332
333 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
334
335 if (to_mode == from_mode
336 || (from_mode == VOIDmode && CONSTANT_P (from)))
337 {
338 emit_move_insn (to, from);
339 return;
340 }
341
342 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
343 {
344 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
345
346 if (VECTOR_MODE_P (to_mode))
347 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
348 else
349 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
350
351 emit_move_insn (to, from);
352 return;
353 }
354
355 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
356 {
357 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
358 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
359 return;
360 }
361
362 if (to_real)
363 {
364 rtx value, insns;
365 convert_optab tab;
366
367 gcc_assert ((GET_MODE_PRECISION (from_mode)
368 != GET_MODE_PRECISION (to_mode))
369 || (DECIMAL_FLOAT_MODE_P (from_mode)
370 != DECIMAL_FLOAT_MODE_P (to_mode)));
371
372 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
373 /* Conversion between decimal float and binary float, same size. */
374 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
375 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
376 tab = sext_optab;
377 else
378 tab = trunc_optab;
379
380 /* Try converting directly if the insn is supported. */
381
382 code = convert_optab_handler (tab, to_mode, from_mode);
383 if (code != CODE_FOR_nothing)
384 {
385 emit_unop_insn (code, to, from,
386 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
387 return;
388 }
389
390 /* Otherwise use a libcall. */
391 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
392
393 /* Is this conversion implemented yet? */
394 gcc_assert (libcall);
395
396 start_sequence ();
397 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
398 1, from, from_mode);
399 insns = get_insns ();
400 end_sequence ();
401 emit_libcall_block (insns, to, value,
402 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
403 from)
404 : gen_rtx_FLOAT_EXTEND (to_mode, from));
405 return;
406 }
407
408 /* Handle pointer conversion. */ /* SPEE 900220. */
409 /* Targets are expected to provide conversion insns between PxImode and
410 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
411 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
412 {
413 enum machine_mode full_mode
414 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
415
416 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
417 != CODE_FOR_nothing);
418
419 if (full_mode != from_mode)
420 from = convert_to_mode (full_mode, from, unsignedp);
421 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
422 to, from, UNKNOWN);
423 return;
424 }
425 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
426 {
427 rtx new_from;
428 enum machine_mode full_mode
429 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
430 convert_optab ctab = unsignedp ? zext_optab : sext_optab;
431 enum insn_code icode;
432
433 icode = convert_optab_handler (ctab, full_mode, from_mode);
434 gcc_assert (icode != CODE_FOR_nothing);
435
436 if (to_mode == full_mode)
437 {
438 emit_unop_insn (icode, to, from, UNKNOWN);
439 return;
440 }
441
442 new_from = gen_reg_rtx (full_mode);
443 emit_unop_insn (icode, new_from, from, UNKNOWN);
444
445 /* else proceed to integer conversions below. */
446 from_mode = full_mode;
447 from = new_from;
448 }
449
450 /* Make sure both are fixed-point modes or both are not. */
451 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
452 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
453 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
454 {
455 /* If we widen from_mode to to_mode and they are in the same class,
456 we won't saturate the result.
457 Otherwise, always saturate the result to play safe. */
458 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
459 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
460 expand_fixed_convert (to, from, 0, 0);
461 else
462 expand_fixed_convert (to, from, 0, 1);
463 return;
464 }
465
466 /* Now both modes are integers. */
467
468 /* Handle expanding beyond a word. */
469 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)
470 && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD)
471 {
472 rtx insns;
473 rtx lowpart;
474 rtx fill_value;
475 rtx lowfrom;
476 int i;
477 enum machine_mode lowpart_mode;
478 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
479
480 /* Try converting directly if the insn is supported. */
481 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
482 != CODE_FOR_nothing)
483 {
484 /* If FROM is a SUBREG, put it into a register. Do this
485 so that we always generate the same set of insns for
486 better cse'ing; if an intermediate assignment occurred,
487 we won't be doing the operation directly on the SUBREG. */
488 if (optimize > 0 && GET_CODE (from) == SUBREG)
489 from = force_reg (from_mode, from);
490 emit_unop_insn (code, to, from, equiv_code);
491 return;
492 }
493 /* Next, try converting via full word. */
494 else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD
495 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
496 != CODE_FOR_nothing))
497 {
498 rtx word_to = gen_reg_rtx (word_mode);
499 if (REG_P (to))
500 {
501 if (reg_overlap_mentioned_p (to, from))
502 from = force_reg (from_mode, from);
503 emit_clobber (to);
504 }
505 convert_move (word_to, from, unsignedp);
506 emit_unop_insn (code, to, word_to, equiv_code);
507 return;
508 }
509
510 /* No special multiword conversion insn; do it by hand. */
511 start_sequence ();
512
513 /* Since we will turn this into a no conflict block, we must ensure the
514 the source does not overlap the target so force it into an isolated
515 register when maybe so. Likewise for any MEM input, since the
516 conversion sequence might require several references to it and we
517 must ensure we're getting the same value every time. */
518
519 if (MEM_P (from) || reg_overlap_mentioned_p (to, from))
520 from = force_reg (from_mode, from);
521
522 /* Get a copy of FROM widened to a word, if necessary. */
523 if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD)
524 lowpart_mode = word_mode;
525 else
526 lowpart_mode = from_mode;
527
528 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
529
530 lowpart = gen_lowpart (lowpart_mode, to);
531 emit_move_insn (lowpart, lowfrom);
532
533 /* Compute the value to put in each remaining word. */
534 if (unsignedp)
535 fill_value = const0_rtx;
536 else
537 fill_value = emit_store_flag (gen_reg_rtx (word_mode),
538 LT, lowfrom, const0_rtx,
539 VOIDmode, 0, -1);
540
541 /* Fill the remaining words. */
542 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
543 {
544 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
545 rtx subword = operand_subword (to, index, 1, to_mode);
546
547 gcc_assert (subword);
548
549 if (fill_value != subword)
550 emit_move_insn (subword, fill_value);
551 }
552
553 insns = get_insns ();
554 end_sequence ();
555
556 emit_insn (insns);
557 return;
558 }
559
560 /* Truncating multi-word to a word or less. */
561 if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD
562 && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD)
563 {
564 if (!((MEM_P (from)
565 && ! MEM_VOLATILE_P (from)
566 && direct_load[(int) to_mode]
567 && ! mode_dependent_address_p (XEXP (from, 0),
568 MEM_ADDR_SPACE (from)))
569 || REG_P (from)
570 || GET_CODE (from) == SUBREG))
571 from = force_reg (from_mode, from);
572 convert_move (to, gen_lowpart (word_mode, from), 0);
573 return;
574 }
575
576 /* Now follow all the conversions between integers
577 no more than a word long. */
578
579 /* For truncation, usually we can just refer to FROM in a narrower mode. */
580 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
581 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode))
582 {
583 if (!((MEM_P (from)
584 && ! MEM_VOLATILE_P (from)
585 && direct_load[(int) to_mode]
586 && ! mode_dependent_address_p (XEXP (from, 0),
587 MEM_ADDR_SPACE (from)))
588 || REG_P (from)
589 || GET_CODE (from) == SUBREG))
590 from = force_reg (from_mode, from);
591 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
592 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
593 from = copy_to_reg (from);
594 emit_move_insn (to, gen_lowpart (to_mode, from));
595 return;
596 }
597
598 /* Handle extension. */
599 if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode))
600 {
601 /* Convert directly if that works. */
602 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
603 != CODE_FOR_nothing)
604 {
605 emit_unop_insn (code, to, from, equiv_code);
606 return;
607 }
608 else
609 {
610 enum machine_mode intermediate;
611 rtx tmp;
612 int shift_amount;
613
614 /* Search for a mode to convert via. */
615 for (intermediate = from_mode; intermediate != VOIDmode;
616 intermediate = GET_MODE_WIDER_MODE (intermediate))
617 if (((can_extend_p (to_mode, intermediate, unsignedp)
618 != CODE_FOR_nothing)
619 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
620 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, intermediate)))
621 && (can_extend_p (intermediate, from_mode, unsignedp)
622 != CODE_FOR_nothing))
623 {
624 convert_move (to, convert_to_mode (intermediate, from,
625 unsignedp), unsignedp);
626 return;
627 }
628
629 /* No suitable intermediate mode.
630 Generate what we need with shifts. */
631 shift_amount = (GET_MODE_PRECISION (to_mode)
632 - GET_MODE_PRECISION (from_mode));
633 from = gen_lowpart (to_mode, force_reg (from_mode, from));
634 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
635 to, unsignedp);
636 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
637 to, unsignedp);
638 if (tmp != to)
639 emit_move_insn (to, tmp);
640 return;
641 }
642 }
643
644 /* Support special truncate insns for certain modes. */
645 if (convert_optab_handler (trunc_optab, to_mode,
646 from_mode) != CODE_FOR_nothing)
647 {
648 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
649 to, from, UNKNOWN);
650 return;
651 }
652
653 /* Handle truncation of volatile memrefs, and so on;
654 the things that couldn't be truncated directly,
655 and for which there was no special instruction.
656
657 ??? Code above formerly short-circuited this, for most integer
658 mode pairs, with a force_reg in from_mode followed by a recursive
659 call to this routine. Appears always to have been wrong. */
660 if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode))
661 {
662 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
663 emit_move_insn (to, temp);
664 return;
665 }
666
667 /* Mode combination is not recognized. */
668 gcc_unreachable ();
669 }
670
671 /* Return an rtx for a value that would result
672 from converting X to mode MODE.
673 Both X and MODE may be floating, or both integer.
674 UNSIGNEDP is nonzero if X is an unsigned value.
675 This can be done by referring to a part of X in place
676 or by copying to a new temporary with conversion. */
677
678 rtx
convert_to_mode(enum machine_mode mode,rtx x,int unsignedp)679 convert_to_mode (enum machine_mode mode, rtx x, int unsignedp)
680 {
681 return convert_modes (mode, VOIDmode, x, unsignedp);
682 }
683
684 /* Return an rtx for a value that would result
685 from converting X from mode OLDMODE to mode MODE.
686 Both modes may be floating, or both integer.
687 UNSIGNEDP is nonzero if X is an unsigned value.
688
689 This can be done by referring to a part of X in place
690 or by copying to a new temporary with conversion.
691
692 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
693
694 rtx
convert_modes(enum machine_mode mode,enum machine_mode oldmode,rtx x,int unsignedp)695 convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int unsignedp)
696 {
697 rtx temp;
698
699 /* If FROM is a SUBREG that indicates that we have already done at least
700 the required extension, strip it. */
701
702 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
703 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
704 && SUBREG_PROMOTED_UNSIGNED_P (x) == unsignedp)
705 x = gen_lowpart (mode, x);
706
707 if (GET_MODE (x) != VOIDmode)
708 oldmode = GET_MODE (x);
709
710 if (mode == oldmode)
711 return x;
712
713 /* There is one case that we must handle specially: If we are converting
714 a CONST_INT into a mode whose size is twice HOST_BITS_PER_WIDE_INT and
715 we are to interpret the constant as unsigned, gen_lowpart will do
716 the wrong if the constant appears negative. What we want to do is
717 make the high-order word of the constant zero, not all ones. */
718
719 if (unsignedp && GET_MODE_CLASS (mode) == MODE_INT
720 && GET_MODE_BITSIZE (mode) == HOST_BITS_PER_DOUBLE_INT
721 && CONST_INT_P (x) && INTVAL (x) < 0)
722 {
723 double_int val = double_int::from_uhwi (INTVAL (x));
724
725 /* We need to zero extend VAL. */
726 if (oldmode != VOIDmode)
727 val = val.zext (GET_MODE_BITSIZE (oldmode));
728
729 return immed_double_int_const (val, mode);
730 }
731
732 /* We can do this with a gen_lowpart if both desired and current modes
733 are integer, and this is either a constant integer, a register, or a
734 non-volatile MEM. Except for the constant case where MODE is no
735 wider than HOST_BITS_PER_WIDE_INT, we must be narrowing the operand. */
736
737 if ((CONST_INT_P (x)
738 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT)
739 || (GET_MODE_CLASS (mode) == MODE_INT
740 && GET_MODE_CLASS (oldmode) == MODE_INT
741 && (CONST_DOUBLE_AS_INT_P (x)
742 || (GET_MODE_PRECISION (mode) <= GET_MODE_PRECISION (oldmode)
743 && ((MEM_P (x) && ! MEM_VOLATILE_P (x)
744 && direct_load[(int) mode])
745 || (REG_P (x)
746 && (! HARD_REGISTER_P (x)
747 || HARD_REGNO_MODE_OK (REGNO (x), mode))
748 && TRULY_NOOP_TRUNCATION_MODES_P (mode,
749 GET_MODE (x))))))))
750 {
751 /* ?? If we don't know OLDMODE, we have to assume here that
752 X does not need sign- or zero-extension. This may not be
753 the case, but it's the best we can do. */
754 if (CONST_INT_P (x) && oldmode != VOIDmode
755 && GET_MODE_PRECISION (mode) > GET_MODE_PRECISION (oldmode))
756 {
757 HOST_WIDE_INT val = INTVAL (x);
758
759 /* We must sign or zero-extend in this case. Start by
760 zero-extending, then sign extend if we need to. */
761 val &= GET_MODE_MASK (oldmode);
762 if (! unsignedp
763 && val_signbit_known_set_p (oldmode, val))
764 val |= ~GET_MODE_MASK (oldmode);
765
766 return gen_int_mode (val, mode);
767 }
768
769 return gen_lowpart (mode, x);
770 }
771
772 /* Converting from integer constant into mode is always equivalent to an
773 subreg operation. */
774 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
775 {
776 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
777 return simplify_gen_subreg (mode, x, oldmode, 0);
778 }
779
780 temp = gen_reg_rtx (mode);
781 convert_move (temp, x, unsignedp);
782 return temp;
783 }
784
785 /* Return the largest alignment we can use for doing a move (or store)
786 of MAX_PIECES. ALIGN is the largest alignment we could use. */
787
788 static unsigned int
alignment_for_piecewise_move(unsigned int max_pieces,unsigned int align)789 alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align)
790 {
791 enum machine_mode tmode;
792
793 tmode = mode_for_size (max_pieces * BITS_PER_UNIT, MODE_INT, 1);
794 if (align >= GET_MODE_ALIGNMENT (tmode))
795 align = GET_MODE_ALIGNMENT (tmode);
796 else
797 {
798 enum machine_mode tmode, xmode;
799
800 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
801 tmode != VOIDmode;
802 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
803 if (GET_MODE_SIZE (tmode) > max_pieces
804 || SLOW_UNALIGNED_ACCESS (tmode, align))
805 break;
806
807 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
808 }
809
810 return align;
811 }
812
813 /* Return the widest integer mode no wider than SIZE. If no such mode
814 can be found, return VOIDmode. */
815
816 static enum machine_mode
widest_int_mode_for_size(unsigned int size)817 widest_int_mode_for_size (unsigned int size)
818 {
819 enum machine_mode tmode, mode = VOIDmode;
820
821 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
822 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
823 if (GET_MODE_SIZE (tmode) < size)
824 mode = tmode;
825
826 return mode;
827 }
828
829 /* STORE_MAX_PIECES is the number of bytes at a time that we can
830 store efficiently. Due to internal GCC limitations, this is
831 MOVE_MAX_PIECES limited by the number of bytes GCC can represent
832 for an immediate constant. */
833
834 #define STORE_MAX_PIECES MIN (MOVE_MAX_PIECES, 2 * sizeof (HOST_WIDE_INT))
835
836 /* Determine whether the LEN bytes can be moved by using several move
837 instructions. Return nonzero if a call to move_by_pieces should
838 succeed. */
839
840 int
can_move_by_pieces(unsigned HOST_WIDE_INT len ATTRIBUTE_UNUSED,unsigned int align ATTRIBUTE_UNUSED)841 can_move_by_pieces (unsigned HOST_WIDE_INT len ATTRIBUTE_UNUSED,
842 unsigned int align ATTRIBUTE_UNUSED)
843 {
844 return MOVE_BY_PIECES_P (len, align);
845 }
846
847 /* Generate several move instructions to copy LEN bytes from block FROM to
848 block TO. (These are MEM rtx's with BLKmode).
849
850 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
851 used to push FROM to the stack.
852
853 ALIGN is maximum stack alignment we can assume.
854
855 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
856 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
857 stpcpy. */
858
859 rtx
move_by_pieces(rtx to,rtx from,unsigned HOST_WIDE_INT len,unsigned int align,int endp)860 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
861 unsigned int align, int endp)
862 {
863 struct move_by_pieces_d data;
864 enum machine_mode to_addr_mode;
865 enum machine_mode from_addr_mode = get_address_mode (from);
866 rtx to_addr, from_addr = XEXP (from, 0);
867 unsigned int max_size = MOVE_MAX_PIECES + 1;
868 enum insn_code icode;
869
870 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
871
872 data.offset = 0;
873 data.from_addr = from_addr;
874 if (to)
875 {
876 to_addr_mode = get_address_mode (to);
877 to_addr = XEXP (to, 0);
878 data.to = to;
879 data.autinc_to
880 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
881 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
882 data.reverse
883 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
884 }
885 else
886 {
887 to_addr_mode = VOIDmode;
888 to_addr = NULL_RTX;
889 data.to = NULL_RTX;
890 data.autinc_to = 1;
891 #ifdef STACK_GROWS_DOWNWARD
892 data.reverse = 1;
893 #else
894 data.reverse = 0;
895 #endif
896 }
897 data.to_addr = to_addr;
898 data.from = from;
899 data.autinc_from
900 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
901 || GET_CODE (from_addr) == POST_INC
902 || GET_CODE (from_addr) == POST_DEC);
903
904 data.explicit_inc_from = 0;
905 data.explicit_inc_to = 0;
906 if (data.reverse) data.offset = len;
907 data.len = len;
908
909 /* If copying requires more than two move insns,
910 copy addresses to registers (to make displacements shorter)
911 and use post-increment if available. */
912 if (!(data.autinc_from && data.autinc_to)
913 && move_by_pieces_ninsns (len, align, max_size) > 2)
914 {
915 /* Find the mode of the largest move...
916 MODE might not be used depending on the definitions of the
917 USE_* macros below. */
918 enum machine_mode mode ATTRIBUTE_UNUSED
919 = widest_int_mode_for_size (max_size);
920
921 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
922 {
923 data.from_addr = copy_to_mode_reg (from_addr_mode,
924 plus_constant (from_addr_mode,
925 from_addr, len));
926 data.autinc_from = 1;
927 data.explicit_inc_from = -1;
928 }
929 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
930 {
931 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
932 data.autinc_from = 1;
933 data.explicit_inc_from = 1;
934 }
935 if (!data.autinc_from && CONSTANT_P (from_addr))
936 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
937 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
938 {
939 data.to_addr = copy_to_mode_reg (to_addr_mode,
940 plus_constant (to_addr_mode,
941 to_addr, len));
942 data.autinc_to = 1;
943 data.explicit_inc_to = -1;
944 }
945 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
946 {
947 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
948 data.autinc_to = 1;
949 data.explicit_inc_to = 1;
950 }
951 if (!data.autinc_to && CONSTANT_P (to_addr))
952 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
953 }
954
955 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
956
957 /* First move what we can in the largest integer mode, then go to
958 successively smaller modes. */
959
960 while (max_size > 1 && data.len > 0)
961 {
962 enum machine_mode mode = widest_int_mode_for_size (max_size);
963
964 if (mode == VOIDmode)
965 break;
966
967 icode = optab_handler (mov_optab, mode);
968 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
969 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
970
971 max_size = GET_MODE_SIZE (mode);
972 }
973
974 /* The code above should have handled everything. */
975 gcc_assert (!data.len);
976
977 if (endp)
978 {
979 rtx to1;
980
981 gcc_assert (!data.reverse);
982 if (data.autinc_to)
983 {
984 if (endp == 2)
985 {
986 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
987 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
988 else
989 data.to_addr = copy_to_mode_reg (to_addr_mode,
990 plus_constant (to_addr_mode,
991 data.to_addr,
992 -1));
993 }
994 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
995 data.offset);
996 }
997 else
998 {
999 if (endp == 2)
1000 --data.offset;
1001 to1 = adjust_address (data.to, QImode, data.offset);
1002 }
1003 return to1;
1004 }
1005 else
1006 return data.to;
1007 }
1008
1009 /* Return number of insns required to move L bytes by pieces.
1010 ALIGN (in bits) is maximum alignment we can assume. */
1011
1012 unsigned HOST_WIDE_INT
move_by_pieces_ninsns(unsigned HOST_WIDE_INT l,unsigned int align,unsigned int max_size)1013 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
1014 unsigned int max_size)
1015 {
1016 unsigned HOST_WIDE_INT n_insns = 0;
1017
1018 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
1019
1020 while (max_size > 1 && l > 0)
1021 {
1022 enum machine_mode mode;
1023 enum insn_code icode;
1024
1025 mode = widest_int_mode_for_size (max_size);
1026
1027 if (mode == VOIDmode)
1028 break;
1029
1030 icode = optab_handler (mov_optab, mode);
1031 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1032 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1033
1034 max_size = GET_MODE_SIZE (mode);
1035 }
1036
1037 gcc_assert (!l);
1038 return n_insns;
1039 }
1040
1041 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1042 with move instructions for mode MODE. GENFUN is the gen_... function
1043 to make a move insn for that mode. DATA has all the other info. */
1044
1045 static void
move_by_pieces_1(insn_gen_fn genfun,machine_mode mode,struct move_by_pieces_d * data)1046 move_by_pieces_1 (insn_gen_fn genfun, machine_mode mode,
1047 struct move_by_pieces_d *data)
1048 {
1049 unsigned int size = GET_MODE_SIZE (mode);
1050 rtx to1 = NULL_RTX, from1;
1051
1052 while (data->len >= size)
1053 {
1054 if (data->reverse)
1055 data->offset -= size;
1056
1057 if (data->to)
1058 {
1059 if (data->autinc_to)
1060 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1061 data->offset);
1062 else
1063 to1 = adjust_address (data->to, mode, data->offset);
1064 }
1065
1066 if (data->autinc_from)
1067 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1068 data->offset);
1069 else
1070 from1 = adjust_address (data->from, mode, data->offset);
1071
1072 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1073 emit_insn (gen_add2_insn (data->to_addr,
1074 GEN_INT (-(HOST_WIDE_INT)size)));
1075 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1076 emit_insn (gen_add2_insn (data->from_addr,
1077 GEN_INT (-(HOST_WIDE_INT)size)));
1078
1079 if (data->to)
1080 emit_insn ((*genfun) (to1, from1));
1081 else
1082 {
1083 #ifdef PUSH_ROUNDING
1084 emit_single_push_insn (mode, from1, NULL);
1085 #else
1086 gcc_unreachable ();
1087 #endif
1088 }
1089
1090 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1091 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
1092 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1093 emit_insn (gen_add2_insn (data->from_addr, GEN_INT (size)));
1094
1095 if (! data->reverse)
1096 data->offset += size;
1097
1098 data->len -= size;
1099 }
1100 }
1101
1102 /* Emit code to move a block Y to a block X. This may be done with
1103 string-move instructions, with multiple scalar move instructions,
1104 or with a library call.
1105
1106 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1107 SIZE is an rtx that says how long they are.
1108 ALIGN is the maximum alignment we can assume they have.
1109 METHOD describes what kind of copy this is, and what mechanisms may be used.
1110
1111 Return the address of the new block, if memcpy is called and returns it,
1112 0 otherwise. */
1113
1114 rtx
emit_block_move_hints(rtx x,rtx y,rtx size,enum block_op_methods method,unsigned int expected_align,HOST_WIDE_INT expected_size)1115 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1116 unsigned int expected_align, HOST_WIDE_INT expected_size)
1117 {
1118 bool may_use_call;
1119 rtx retval = 0;
1120 unsigned int align;
1121
1122 gcc_assert (size);
1123 if (CONST_INT_P (size)
1124 && INTVAL (size) == 0)
1125 return 0;
1126
1127 switch (method)
1128 {
1129 case BLOCK_OP_NORMAL:
1130 case BLOCK_OP_TAILCALL:
1131 may_use_call = true;
1132 break;
1133
1134 case BLOCK_OP_CALL_PARM:
1135 may_use_call = block_move_libcall_safe_for_call_parm ();
1136
1137 /* Make inhibit_defer_pop nonzero around the library call
1138 to force it to pop the arguments right away. */
1139 NO_DEFER_POP;
1140 break;
1141
1142 case BLOCK_OP_NO_LIBCALL:
1143 may_use_call = false;
1144 break;
1145
1146 default:
1147 gcc_unreachable ();
1148 }
1149
1150 gcc_assert (MEM_P (x) && MEM_P (y));
1151 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1152 gcc_assert (align >= BITS_PER_UNIT);
1153
1154 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1155 block copy is more efficient for other large modes, e.g. DCmode. */
1156 x = adjust_address (x, BLKmode, 0);
1157 y = adjust_address (y, BLKmode, 0);
1158
1159 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1160 can be incorrect is coming from __builtin_memcpy. */
1161 if (CONST_INT_P (size))
1162 {
1163 x = shallow_copy_rtx (x);
1164 y = shallow_copy_rtx (y);
1165 set_mem_size (x, INTVAL (size));
1166 set_mem_size (y, INTVAL (size));
1167 }
1168
1169 if (CONST_INT_P (size) && MOVE_BY_PIECES_P (INTVAL (size), align))
1170 move_by_pieces (x, y, INTVAL (size), align, 0);
1171 else if (emit_block_move_via_movmem (x, y, size, align,
1172 expected_align, expected_size))
1173 ;
1174 else if (may_use_call
1175 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
1176 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y)))
1177 {
1178 /* Since x and y are passed to a libcall, mark the corresponding
1179 tree EXPR as addressable. */
1180 tree y_expr = MEM_EXPR (y);
1181 tree x_expr = MEM_EXPR (x);
1182 if (y_expr)
1183 mark_addressable (y_expr);
1184 if (x_expr)
1185 mark_addressable (x_expr);
1186 retval = emit_block_move_via_libcall (x, y, size,
1187 method == BLOCK_OP_TAILCALL);
1188 }
1189
1190 else
1191 emit_block_move_via_loop (x, y, size, align);
1192
1193 if (method == BLOCK_OP_CALL_PARM)
1194 OK_DEFER_POP;
1195
1196 return retval;
1197 }
1198
1199 rtx
emit_block_move(rtx x,rtx y,rtx size,enum block_op_methods method)1200 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1201 {
1202 return emit_block_move_hints (x, y, size, method, 0, -1);
1203 }
1204
1205 /* A subroutine of emit_block_move. Returns true if calling the
1206 block move libcall will not clobber any parameters which may have
1207 already been placed on the stack. */
1208
1209 static bool
block_move_libcall_safe_for_call_parm(void)1210 block_move_libcall_safe_for_call_parm (void)
1211 {
1212 #if defined (REG_PARM_STACK_SPACE)
1213 tree fn;
1214 #endif
1215
1216 /* If arguments are pushed on the stack, then they're safe. */
1217 if (PUSH_ARGS)
1218 return true;
1219
1220 /* If registers go on the stack anyway, any argument is sure to clobber
1221 an outgoing argument. */
1222 #if defined (REG_PARM_STACK_SPACE)
1223 fn = emit_block_move_libcall_fn (false);
1224 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1225 depend on its argument. */
1226 (void) fn;
1227 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1228 && REG_PARM_STACK_SPACE (fn) != 0)
1229 return false;
1230 #endif
1231
1232 /* If any argument goes in memory, then it might clobber an outgoing
1233 argument. */
1234 {
1235 CUMULATIVE_ARGS args_so_far_v;
1236 cumulative_args_t args_so_far;
1237 tree fn, arg;
1238
1239 fn = emit_block_move_libcall_fn (false);
1240 INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3);
1241 args_so_far = pack_cumulative_args (&args_so_far_v);
1242
1243 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1244 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1245 {
1246 enum machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1247 rtx tmp = targetm.calls.function_arg (args_so_far, mode,
1248 NULL_TREE, true);
1249 if (!tmp || !REG_P (tmp))
1250 return false;
1251 if (targetm.calls.arg_partial_bytes (args_so_far, mode, NULL, 1))
1252 return false;
1253 targetm.calls.function_arg_advance (args_so_far, mode,
1254 NULL_TREE, true);
1255 }
1256 }
1257 return true;
1258 }
1259
1260 /* A subroutine of emit_block_move. Expand a movmem pattern;
1261 return true if successful. */
1262
1263 static bool
emit_block_move_via_movmem(rtx x,rtx y,rtx size,unsigned int align,unsigned int expected_align,HOST_WIDE_INT expected_size)1264 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1265 unsigned int expected_align, HOST_WIDE_INT expected_size)
1266 {
1267 int save_volatile_ok = volatile_ok;
1268 enum machine_mode mode;
1269
1270 if (expected_align < align)
1271 expected_align = align;
1272
1273 /* Since this is a move insn, we don't care about volatility. */
1274 volatile_ok = 1;
1275
1276 /* Try the most limited insn first, because there's no point
1277 including more than one in the machine description unless
1278 the more limited one has some advantage. */
1279
1280 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1281 mode = GET_MODE_WIDER_MODE (mode))
1282 {
1283 enum insn_code code = direct_optab_handler (movmem_optab, mode);
1284
1285 if (code != CODE_FOR_nothing
1286 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1287 here because if SIZE is less than the mode mask, as it is
1288 returned by the macro, it will definitely be less than the
1289 actual mode mask. */
1290 && ((CONST_INT_P (size)
1291 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1292 <= (GET_MODE_MASK (mode) >> 1)))
1293 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
1294 {
1295 struct expand_operand ops[6];
1296 unsigned int nops;
1297
1298 /* ??? When called via emit_block_move_for_call, it'd be
1299 nice if there were some way to inform the backend, so
1300 that it doesn't fail the expansion because it thinks
1301 emitting the libcall would be more efficient. */
1302 nops = insn_data[(int) code].n_generator_args;
1303 gcc_assert (nops == 4 || nops == 6);
1304
1305 create_fixed_operand (&ops[0], x);
1306 create_fixed_operand (&ops[1], y);
1307 /* The check above guarantees that this size conversion is valid. */
1308 create_convert_operand_to (&ops[2], size, mode, true);
1309 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
1310 if (nops == 6)
1311 {
1312 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
1313 create_integer_operand (&ops[5], expected_size);
1314 }
1315 if (maybe_expand_insn (code, nops, ops))
1316 {
1317 volatile_ok = save_volatile_ok;
1318 return true;
1319 }
1320 }
1321 }
1322
1323 volatile_ok = save_volatile_ok;
1324 return false;
1325 }
1326
1327 /* A subroutine of emit_block_move. Expand a call to memcpy.
1328 Return the return value from memcpy, 0 otherwise. */
1329
1330 rtx
emit_block_move_via_libcall(rtx dst,rtx src,rtx size,bool tailcall)1331 emit_block_move_via_libcall (rtx dst, rtx src, rtx size, bool tailcall)
1332 {
1333 rtx dst_addr, src_addr;
1334 tree call_expr, fn, src_tree, dst_tree, size_tree;
1335 enum machine_mode size_mode;
1336 rtx retval;
1337
1338 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1339 pseudos. We can then place those new pseudos into a VAR_DECL and
1340 use them later. */
1341
1342 dst_addr = copy_addr_to_reg (XEXP (dst, 0));
1343 src_addr = copy_addr_to_reg (XEXP (src, 0));
1344
1345 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1346 src_addr = convert_memory_address (ptr_mode, src_addr);
1347
1348 dst_tree = make_tree (ptr_type_node, dst_addr);
1349 src_tree = make_tree (ptr_type_node, src_addr);
1350
1351 size_mode = TYPE_MODE (sizetype);
1352
1353 size = convert_to_mode (size_mode, size, 1);
1354 size = copy_to_mode_reg (size_mode, size);
1355
1356 /* It is incorrect to use the libcall calling conventions to call
1357 memcpy in this context. This could be a user call to memcpy and
1358 the user may wish to examine the return value from memcpy. For
1359 targets where libcalls and normal calls have different conventions
1360 for returning pointers, we could end up generating incorrect code. */
1361
1362 size_tree = make_tree (sizetype, size);
1363
1364 fn = emit_block_move_libcall_fn (true);
1365 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1366 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1367
1368 retval = expand_normal (call_expr);
1369
1370 return retval;
1371 }
1372
1373 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1374 for the function we use for block copies. */
1375
1376 static GTY(()) tree block_move_fn;
1377
1378 void
init_block_move_fn(const char * asmspec)1379 init_block_move_fn (const char *asmspec)
1380 {
1381 if (!block_move_fn)
1382 {
1383 tree args, fn, attrs, attr_args;
1384
1385 fn = get_identifier ("memcpy");
1386 args = build_function_type_list (ptr_type_node, ptr_type_node,
1387 const_ptr_type_node, sizetype,
1388 NULL_TREE);
1389
1390 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
1391 DECL_EXTERNAL (fn) = 1;
1392 TREE_PUBLIC (fn) = 1;
1393 DECL_ARTIFICIAL (fn) = 1;
1394 TREE_NOTHROW (fn) = 1;
1395 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
1396 DECL_VISIBILITY_SPECIFIED (fn) = 1;
1397
1398 attr_args = build_tree_list (NULL_TREE, build_string (1, "1"));
1399 attrs = tree_cons (get_identifier ("fn spec"), attr_args, NULL);
1400
1401 decl_attributes (&fn, attrs, ATTR_FLAG_BUILT_IN);
1402
1403 block_move_fn = fn;
1404 }
1405
1406 if (asmspec)
1407 set_user_assembler_name (block_move_fn, asmspec);
1408 }
1409
1410 static tree
emit_block_move_libcall_fn(int for_call)1411 emit_block_move_libcall_fn (int for_call)
1412 {
1413 static bool emitted_extern;
1414
1415 if (!block_move_fn)
1416 init_block_move_fn (NULL);
1417
1418 if (for_call && !emitted_extern)
1419 {
1420 emitted_extern = true;
1421 make_decl_rtl (block_move_fn);
1422 }
1423
1424 return block_move_fn;
1425 }
1426
1427 /* A subroutine of emit_block_move. Copy the data via an explicit
1428 loop. This is used only when libcalls are forbidden. */
1429 /* ??? It'd be nice to copy in hunks larger than QImode. */
1430
1431 static void
emit_block_move_via_loop(rtx x,rtx y,rtx size,unsigned int align ATTRIBUTE_UNUSED)1432 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1433 unsigned int align ATTRIBUTE_UNUSED)
1434 {
1435 rtx cmp_label, top_label, iter, x_addr, y_addr, tmp;
1436 enum machine_mode x_addr_mode = get_address_mode (x);
1437 enum machine_mode y_addr_mode = get_address_mode (y);
1438 enum machine_mode iter_mode;
1439
1440 iter_mode = GET_MODE (size);
1441 if (iter_mode == VOIDmode)
1442 iter_mode = word_mode;
1443
1444 top_label = gen_label_rtx ();
1445 cmp_label = gen_label_rtx ();
1446 iter = gen_reg_rtx (iter_mode);
1447
1448 emit_move_insn (iter, const0_rtx);
1449
1450 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1451 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1452 do_pending_stack_adjust ();
1453
1454 emit_jump (cmp_label);
1455 emit_label (top_label);
1456
1457 tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
1458 x_addr = simplify_gen_binary (PLUS, x_addr_mode, x_addr, tmp);
1459
1460 if (x_addr_mode != y_addr_mode)
1461 tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
1462 y_addr = simplify_gen_binary (PLUS, y_addr_mode, y_addr, tmp);
1463
1464 x = change_address (x, QImode, x_addr);
1465 y = change_address (y, QImode, y_addr);
1466
1467 emit_move_insn (x, y);
1468
1469 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1470 true, OPTAB_LIB_WIDEN);
1471 if (tmp != iter)
1472 emit_move_insn (iter, tmp);
1473
1474 emit_label (cmp_label);
1475
1476 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1477 true, top_label, REG_BR_PROB_BASE * 90 / 100);
1478 }
1479
1480 /* Copy all or part of a value X into registers starting at REGNO.
1481 The number of registers to be filled is NREGS. */
1482
1483 void
move_block_to_reg(int regno,rtx x,int nregs,enum machine_mode mode)1484 move_block_to_reg (int regno, rtx x, int nregs, enum machine_mode mode)
1485 {
1486 int i;
1487 #ifdef HAVE_load_multiple
1488 rtx pat;
1489 rtx last;
1490 #endif
1491
1492 if (nregs == 0)
1493 return;
1494
1495 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
1496 x = validize_mem (force_const_mem (mode, x));
1497
1498 /* See if the machine can do this with a load multiple insn. */
1499 #ifdef HAVE_load_multiple
1500 if (HAVE_load_multiple)
1501 {
1502 last = get_last_insn ();
1503 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1504 GEN_INT (nregs));
1505 if (pat)
1506 {
1507 emit_insn (pat);
1508 return;
1509 }
1510 else
1511 delete_insns_since (last);
1512 }
1513 #endif
1514
1515 for (i = 0; i < nregs; i++)
1516 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1517 operand_subword_force (x, i, mode));
1518 }
1519
1520 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1521 The number of registers to be filled is NREGS. */
1522
1523 void
move_block_from_reg(int regno,rtx x,int nregs)1524 move_block_from_reg (int regno, rtx x, int nregs)
1525 {
1526 int i;
1527
1528 if (nregs == 0)
1529 return;
1530
1531 /* See if the machine can do this with a store multiple insn. */
1532 #ifdef HAVE_store_multiple
1533 if (HAVE_store_multiple)
1534 {
1535 rtx last = get_last_insn ();
1536 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1537 GEN_INT (nregs));
1538 if (pat)
1539 {
1540 emit_insn (pat);
1541 return;
1542 }
1543 else
1544 delete_insns_since (last);
1545 }
1546 #endif
1547
1548 for (i = 0; i < nregs; i++)
1549 {
1550 rtx tem = operand_subword (x, i, 1, BLKmode);
1551
1552 gcc_assert (tem);
1553
1554 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1555 }
1556 }
1557
1558 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1559 ORIG, where ORIG is a non-consecutive group of registers represented by
1560 a PARALLEL. The clone is identical to the original except in that the
1561 original set of registers is replaced by a new set of pseudo registers.
1562 The new set has the same modes as the original set. */
1563
1564 rtx
gen_group_rtx(rtx orig)1565 gen_group_rtx (rtx orig)
1566 {
1567 int i, length;
1568 rtx *tmps;
1569
1570 gcc_assert (GET_CODE (orig) == PARALLEL);
1571
1572 length = XVECLEN (orig, 0);
1573 tmps = XALLOCAVEC (rtx, length);
1574
1575 /* Skip a NULL entry in first slot. */
1576 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1577
1578 if (i)
1579 tmps[0] = 0;
1580
1581 for (; i < length; i++)
1582 {
1583 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1584 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1585
1586 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1587 }
1588
1589 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1590 }
1591
1592 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1593 except that values are placed in TMPS[i], and must later be moved
1594 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1595
1596 static void
emit_group_load_1(rtx * tmps,rtx dst,rtx orig_src,tree type,int ssize)1597 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1598 {
1599 rtx src;
1600 int start, i;
1601 enum machine_mode m = GET_MODE (orig_src);
1602
1603 gcc_assert (GET_CODE (dst) == PARALLEL);
1604
1605 if (m != VOIDmode
1606 && !SCALAR_INT_MODE_P (m)
1607 && !MEM_P (orig_src)
1608 && GET_CODE (orig_src) != CONCAT)
1609 {
1610 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1611 if (imode == BLKmode)
1612 src = assign_stack_temp (GET_MODE (orig_src), ssize);
1613 else
1614 src = gen_reg_rtx (imode);
1615 if (imode != BLKmode)
1616 src = gen_lowpart (GET_MODE (orig_src), src);
1617 emit_move_insn (src, orig_src);
1618 /* ...and back again. */
1619 if (imode != BLKmode)
1620 src = gen_lowpart (imode, src);
1621 emit_group_load_1 (tmps, dst, src, type, ssize);
1622 return;
1623 }
1624
1625 /* Check for a NULL entry, used to indicate that the parameter goes
1626 both on the stack and in registers. */
1627 if (XEXP (XVECEXP (dst, 0, 0), 0))
1628 start = 0;
1629 else
1630 start = 1;
1631
1632 /* Process the pieces. */
1633 for (i = start; i < XVECLEN (dst, 0); i++)
1634 {
1635 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1636 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1637 unsigned int bytelen = GET_MODE_SIZE (mode);
1638 int shift = 0;
1639
1640 /* Handle trailing fragments that run over the size of the struct. */
1641 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1642 {
1643 /* Arrange to shift the fragment to where it belongs.
1644 extract_bit_field loads to the lsb of the reg. */
1645 if (
1646 #ifdef BLOCK_REG_PADDING
1647 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1648 == (BYTES_BIG_ENDIAN ? upward : downward)
1649 #else
1650 BYTES_BIG_ENDIAN
1651 #endif
1652 )
1653 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1654 bytelen = ssize - bytepos;
1655 gcc_assert (bytelen > 0);
1656 }
1657
1658 /* If we won't be loading directly from memory, protect the real source
1659 from strange tricks we might play; but make sure that the source can
1660 be loaded directly into the destination. */
1661 src = orig_src;
1662 if (!MEM_P (orig_src)
1663 && (!CONSTANT_P (orig_src)
1664 || (GET_MODE (orig_src) != mode
1665 && GET_MODE (orig_src) != VOIDmode)))
1666 {
1667 if (GET_MODE (orig_src) == VOIDmode)
1668 src = gen_reg_rtx (mode);
1669 else
1670 src = gen_reg_rtx (GET_MODE (orig_src));
1671
1672 emit_move_insn (src, orig_src);
1673 }
1674
1675 /* Optimize the access just a bit. */
1676 if (MEM_P (src)
1677 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1678 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1679 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1680 && bytelen == GET_MODE_SIZE (mode))
1681 {
1682 tmps[i] = gen_reg_rtx (mode);
1683 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1684 }
1685 else if (COMPLEX_MODE_P (mode)
1686 && GET_MODE (src) == mode
1687 && bytelen == GET_MODE_SIZE (mode))
1688 /* Let emit_move_complex do the bulk of the work. */
1689 tmps[i] = src;
1690 else if (GET_CODE (src) == CONCAT)
1691 {
1692 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1693 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1694
1695 if ((bytepos == 0 && bytelen == slen0)
1696 || (bytepos != 0 && bytepos + bytelen <= slen))
1697 {
1698 /* The following assumes that the concatenated objects all
1699 have the same size. In this case, a simple calculation
1700 can be used to determine the object and the bit field
1701 to be extracted. */
1702 tmps[i] = XEXP (src, bytepos / slen0);
1703 if (! CONSTANT_P (tmps[i])
1704 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1705 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1706 (bytepos % slen0) * BITS_PER_UNIT,
1707 1, false, NULL_RTX, mode, mode);
1708 }
1709 else
1710 {
1711 rtx mem;
1712
1713 gcc_assert (!bytepos);
1714 mem = assign_stack_temp (GET_MODE (src), slen);
1715 emit_move_insn (mem, src);
1716 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1717 0, 1, false, NULL_RTX, mode, mode);
1718 }
1719 }
1720 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1721 SIMD register, which is currently broken. While we get GCC
1722 to emit proper RTL for these cases, let's dump to memory. */
1723 else if (VECTOR_MODE_P (GET_MODE (dst))
1724 && REG_P (src))
1725 {
1726 int slen = GET_MODE_SIZE (GET_MODE (src));
1727 rtx mem;
1728
1729 mem = assign_stack_temp (GET_MODE (src), slen);
1730 emit_move_insn (mem, src);
1731 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1732 }
1733 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1734 && XVECLEN (dst, 0) > 1)
1735 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE(dst), bytepos);
1736 else if (CONSTANT_P (src))
1737 {
1738 HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen;
1739
1740 if (len == ssize)
1741 tmps[i] = src;
1742 else
1743 {
1744 rtx first, second;
1745
1746 gcc_assert (2 * len == ssize);
1747 split_double (src, &first, &second);
1748 if (i)
1749 tmps[i] = second;
1750 else
1751 tmps[i] = first;
1752 }
1753 }
1754 else if (REG_P (src) && GET_MODE (src) == mode)
1755 tmps[i] = src;
1756 else
1757 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1758 bytepos * BITS_PER_UNIT, 1, false, NULL_RTX,
1759 mode, mode);
1760
1761 if (shift)
1762 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1763 shift, tmps[i], 0);
1764 }
1765 }
1766
1767 /* Emit code to move a block SRC of type TYPE to a block DST,
1768 where DST is non-consecutive registers represented by a PARALLEL.
1769 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1770 if not known. */
1771
1772 void
emit_group_load(rtx dst,rtx src,tree type,int ssize)1773 emit_group_load (rtx dst, rtx src, tree type, int ssize)
1774 {
1775 rtx *tmps;
1776 int i;
1777
1778 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
1779 emit_group_load_1 (tmps, dst, src, type, ssize);
1780
1781 /* Copy the extracted pieces into the proper (probable) hard regs. */
1782 for (i = 0; i < XVECLEN (dst, 0); i++)
1783 {
1784 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1785 if (d == NULL)
1786 continue;
1787 emit_move_insn (d, tmps[i]);
1788 }
1789 }
1790
1791 /* Similar, but load SRC into new pseudos in a format that looks like
1792 PARALLEL. This can later be fed to emit_group_move to get things
1793 in the right place. */
1794
1795 rtx
emit_group_load_into_temps(rtx parallel,rtx src,tree type,int ssize)1796 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1797 {
1798 rtvec vec;
1799 int i;
1800
1801 vec = rtvec_alloc (XVECLEN (parallel, 0));
1802 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1803
1804 /* Convert the vector to look just like the original PARALLEL, except
1805 with the computed values. */
1806 for (i = 0; i < XVECLEN (parallel, 0); i++)
1807 {
1808 rtx e = XVECEXP (parallel, 0, i);
1809 rtx d = XEXP (e, 0);
1810
1811 if (d)
1812 {
1813 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1814 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1815 }
1816 RTVEC_ELT (vec, i) = e;
1817 }
1818
1819 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1820 }
1821
1822 /* Emit code to move a block SRC to block DST, where SRC and DST are
1823 non-consecutive groups of registers, each represented by a PARALLEL. */
1824
1825 void
emit_group_move(rtx dst,rtx src)1826 emit_group_move (rtx dst, rtx src)
1827 {
1828 int i;
1829
1830 gcc_assert (GET_CODE (src) == PARALLEL
1831 && GET_CODE (dst) == PARALLEL
1832 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1833
1834 /* Skip first entry if NULL. */
1835 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1836 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1837 XEXP (XVECEXP (src, 0, i), 0));
1838 }
1839
1840 /* Move a group of registers represented by a PARALLEL into pseudos. */
1841
1842 rtx
emit_group_move_into_temps(rtx src)1843 emit_group_move_into_temps (rtx src)
1844 {
1845 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1846 int i;
1847
1848 for (i = 0; i < XVECLEN (src, 0); i++)
1849 {
1850 rtx e = XVECEXP (src, 0, i);
1851 rtx d = XEXP (e, 0);
1852
1853 if (d)
1854 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1855 RTVEC_ELT (vec, i) = e;
1856 }
1857
1858 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1859 }
1860
1861 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1862 where SRC is non-consecutive registers represented by a PARALLEL.
1863 SSIZE represents the total size of block ORIG_DST, or -1 if not
1864 known. */
1865
1866 void
emit_group_store(rtx orig_dst,rtx src,tree type ATTRIBUTE_UNUSED,int ssize)1867 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1868 {
1869 rtx *tmps, dst;
1870 int start, finish, i;
1871 enum machine_mode m = GET_MODE (orig_dst);
1872
1873 gcc_assert (GET_CODE (src) == PARALLEL);
1874
1875 if (!SCALAR_INT_MODE_P (m)
1876 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1877 {
1878 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1879 if (imode == BLKmode)
1880 dst = assign_stack_temp (GET_MODE (orig_dst), ssize);
1881 else
1882 dst = gen_reg_rtx (imode);
1883 emit_group_store (dst, src, type, ssize);
1884 if (imode != BLKmode)
1885 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1886 emit_move_insn (orig_dst, dst);
1887 return;
1888 }
1889
1890 /* Check for a NULL entry, used to indicate that the parameter goes
1891 both on the stack and in registers. */
1892 if (XEXP (XVECEXP (src, 0, 0), 0))
1893 start = 0;
1894 else
1895 start = 1;
1896 finish = XVECLEN (src, 0);
1897
1898 tmps = XALLOCAVEC (rtx, finish);
1899
1900 /* Copy the (probable) hard regs into pseudos. */
1901 for (i = start; i < finish; i++)
1902 {
1903 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1904 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
1905 {
1906 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1907 emit_move_insn (tmps[i], reg);
1908 }
1909 else
1910 tmps[i] = reg;
1911 }
1912
1913 /* If we won't be storing directly into memory, protect the real destination
1914 from strange tricks we might play. */
1915 dst = orig_dst;
1916 if (GET_CODE (dst) == PARALLEL)
1917 {
1918 rtx temp;
1919
1920 /* We can get a PARALLEL dst if there is a conditional expression in
1921 a return statement. In that case, the dst and src are the same,
1922 so no action is necessary. */
1923 if (rtx_equal_p (dst, src))
1924 return;
1925
1926 /* It is unclear if we can ever reach here, but we may as well handle
1927 it. Allocate a temporary, and split this into a store/load to/from
1928 the temporary. */
1929
1930 temp = assign_stack_temp (GET_MODE (dst), ssize);
1931 emit_group_store (temp, src, type, ssize);
1932 emit_group_load (dst, temp, type, ssize);
1933 return;
1934 }
1935 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
1936 {
1937 enum machine_mode outer = GET_MODE (dst);
1938 enum machine_mode inner;
1939 HOST_WIDE_INT bytepos;
1940 bool done = false;
1941 rtx temp;
1942
1943 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1944 dst = gen_reg_rtx (outer);
1945
1946 /* Make life a bit easier for combine. */
1947 /* If the first element of the vector is the low part
1948 of the destination mode, use a paradoxical subreg to
1949 initialize the destination. */
1950 if (start < finish)
1951 {
1952 inner = GET_MODE (tmps[start]);
1953 bytepos = subreg_lowpart_offset (inner, outer);
1954 if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos)
1955 {
1956 temp = simplify_gen_subreg (outer, tmps[start],
1957 inner, 0);
1958 if (temp)
1959 {
1960 emit_move_insn (dst, temp);
1961 done = true;
1962 start++;
1963 }
1964 }
1965 }
1966
1967 /* If the first element wasn't the low part, try the last. */
1968 if (!done
1969 && start < finish - 1)
1970 {
1971 inner = GET_MODE (tmps[finish - 1]);
1972 bytepos = subreg_lowpart_offset (inner, outer);
1973 if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos)
1974 {
1975 temp = simplify_gen_subreg (outer, tmps[finish - 1],
1976 inner, 0);
1977 if (temp)
1978 {
1979 emit_move_insn (dst, temp);
1980 done = true;
1981 finish--;
1982 }
1983 }
1984 }
1985
1986 /* Otherwise, simply initialize the result to zero. */
1987 if (!done)
1988 emit_move_insn (dst, CONST0_RTX (outer));
1989 }
1990
1991 /* Process the pieces. */
1992 for (i = start; i < finish; i++)
1993 {
1994 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
1995 enum machine_mode mode = GET_MODE (tmps[i]);
1996 unsigned int bytelen = GET_MODE_SIZE (mode);
1997 unsigned int adj_bytelen;
1998 rtx dest = dst;
1999
2000 /* Handle trailing fragments that run over the size of the struct. */
2001 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2002 adj_bytelen = ssize - bytepos;
2003 else
2004 adj_bytelen = bytelen;
2005
2006 if (GET_CODE (dst) == CONCAT)
2007 {
2008 if (bytepos + adj_bytelen
2009 <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2010 dest = XEXP (dst, 0);
2011 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2012 {
2013 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2014 dest = XEXP (dst, 1);
2015 }
2016 else
2017 {
2018 enum machine_mode dest_mode = GET_MODE (dest);
2019 enum machine_mode tmp_mode = GET_MODE (tmps[i]);
2020
2021 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
2022
2023 if (GET_MODE_ALIGNMENT (dest_mode)
2024 >= GET_MODE_ALIGNMENT (tmp_mode))
2025 {
2026 dest = assign_stack_temp (dest_mode,
2027 GET_MODE_SIZE (dest_mode));
2028 emit_move_insn (adjust_address (dest,
2029 tmp_mode,
2030 bytepos),
2031 tmps[i]);
2032 dst = dest;
2033 }
2034 else
2035 {
2036 dest = assign_stack_temp (tmp_mode,
2037 GET_MODE_SIZE (tmp_mode));
2038 emit_move_insn (dest, tmps[i]);
2039 dst = adjust_address (dest, dest_mode, bytepos);
2040 }
2041 break;
2042 }
2043 }
2044
2045 /* Handle trailing fragments that run over the size of the struct. */
2046 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2047 {
2048 /* store_bit_field always takes its value from the lsb.
2049 Move the fragment to the lsb if it's not already there. */
2050 if (
2051 #ifdef BLOCK_REG_PADDING
2052 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2053 == (BYTES_BIG_ENDIAN ? upward : downward)
2054 #else
2055 BYTES_BIG_ENDIAN
2056 #endif
2057 )
2058 {
2059 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2060 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2061 shift, tmps[i], 0);
2062 }
2063
2064 /* Make sure not to write past the end of the struct. */
2065 store_bit_field (dest,
2066 adj_bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2067 bytepos * BITS_PER_UNIT, ssize * BITS_PER_UNIT - 1,
2068 VOIDmode, tmps[i]);
2069 }
2070
2071 /* Optimize the access just a bit. */
2072 else if (MEM_P (dest)
2073 && (!SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
2074 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2075 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
2076 && bytelen == GET_MODE_SIZE (mode))
2077 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2078
2079 else
2080 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2081 0, 0, mode, tmps[i]);
2082 }
2083
2084 /* Copy from the pseudo into the (probable) hard reg. */
2085 if (orig_dst != dst)
2086 emit_move_insn (orig_dst, dst);
2087 }
2088
2089 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2090 of the value stored in X. */
2091
2092 rtx
maybe_emit_group_store(rtx x,tree type)2093 maybe_emit_group_store (rtx x, tree type)
2094 {
2095 enum machine_mode mode = TYPE_MODE (type);
2096 gcc_checking_assert (GET_MODE (x) == VOIDmode || GET_MODE (x) == mode);
2097 if (GET_CODE (x) == PARALLEL)
2098 {
2099 rtx result = gen_reg_rtx (mode);
2100 emit_group_store (result, x, type, int_size_in_bytes (type));
2101 return result;
2102 }
2103 return x;
2104 }
2105
2106 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2107
2108 This is used on targets that return BLKmode values in registers. */
2109
2110 void
copy_blkmode_from_reg(rtx target,rtx srcreg,tree type)2111 copy_blkmode_from_reg (rtx target, rtx srcreg, tree type)
2112 {
2113 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2114 rtx src = NULL, dst = NULL;
2115 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2116 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2117 enum machine_mode mode = GET_MODE (srcreg);
2118 enum machine_mode tmode = GET_MODE (target);
2119 enum machine_mode copy_mode;
2120
2121 /* BLKmode registers created in the back-end shouldn't have survived. */
2122 gcc_assert (mode != BLKmode);
2123
2124 /* If the structure doesn't take up a whole number of words, see whether
2125 SRCREG is padded on the left or on the right. If it's on the left,
2126 set PADDING_CORRECTION to the number of bits to skip.
2127
2128 In most ABIs, the structure will be returned at the least end of
2129 the register, which translates to right padding on little-endian
2130 targets and left padding on big-endian targets. The opposite
2131 holds if the structure is returned at the most significant
2132 end of the register. */
2133 if (bytes % UNITS_PER_WORD != 0
2134 && (targetm.calls.return_in_msb (type)
2135 ? !BYTES_BIG_ENDIAN
2136 : BYTES_BIG_ENDIAN))
2137 padding_correction
2138 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2139
2140 /* We can use a single move if we have an exact mode for the size. */
2141 else if (MEM_P (target)
2142 && (!SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target))
2143 || MEM_ALIGN (target) >= GET_MODE_ALIGNMENT (mode))
2144 && bytes == GET_MODE_SIZE (mode))
2145 {
2146 emit_move_insn (adjust_address (target, mode, 0), srcreg);
2147 return;
2148 }
2149
2150 /* And if we additionally have the same mode for a register. */
2151 else if (REG_P (target)
2152 && GET_MODE (target) == mode
2153 && bytes == GET_MODE_SIZE (mode))
2154 {
2155 emit_move_insn (target, srcreg);
2156 return;
2157 }
2158
2159 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2160 into a new pseudo which is a full word. */
2161 if (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
2162 {
2163 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2164 mode = word_mode;
2165 }
2166
2167 /* Copy the structure BITSIZE bits at a time. If the target lives in
2168 memory, take care of not reading/writing past its end by selecting
2169 a copy mode suited to BITSIZE. This should always be possible given
2170 how it is computed.
2171
2172 If the target lives in register, make sure not to select a copy mode
2173 larger than the mode of the register.
2174
2175 We could probably emit more efficient code for machines which do not use
2176 strict alignment, but it doesn't seem worth the effort at the current
2177 time. */
2178
2179 copy_mode = word_mode;
2180 if (MEM_P (target))
2181 {
2182 enum machine_mode mem_mode = mode_for_size (bitsize, MODE_INT, 1);
2183 if (mem_mode != BLKmode)
2184 copy_mode = mem_mode;
2185 }
2186 else if (REG_P (target) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD)
2187 copy_mode = tmode;
2188
2189 for (bitpos = 0, xbitpos = padding_correction;
2190 bitpos < bytes * BITS_PER_UNIT;
2191 bitpos += bitsize, xbitpos += bitsize)
2192 {
2193 /* We need a new source operand each time xbitpos is on a
2194 word boundary and when xbitpos == padding_correction
2195 (the first time through). */
2196 if (xbitpos % BITS_PER_WORD == 0 || xbitpos == padding_correction)
2197 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD, mode);
2198
2199 /* We need a new destination operand each time bitpos is on
2200 a word boundary. */
2201 if (REG_P (target) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD)
2202 dst = target;
2203 else if (bitpos % BITS_PER_WORD == 0)
2204 dst = operand_subword (target, bitpos / BITS_PER_WORD, 1, tmode);
2205
2206 /* Use xbitpos for the source extraction (right justified) and
2207 bitpos for the destination store (left justified). */
2208 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode,
2209 extract_bit_field (src, bitsize,
2210 xbitpos % BITS_PER_WORD, 1, false,
2211 NULL_RTX, copy_mode, copy_mode));
2212 }
2213 }
2214
2215 /* Copy BLKmode value SRC into a register of mode MODE. Return the
2216 register if it contains any data, otherwise return null.
2217
2218 This is used on targets that return BLKmode values in registers. */
2219
2220 rtx
copy_blkmode_to_reg(enum machine_mode mode,tree src)2221 copy_blkmode_to_reg (enum machine_mode mode, tree src)
2222 {
2223 int i, n_regs;
2224 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0, bytes;
2225 unsigned int bitsize;
2226 rtx *dst_words, dst, x, src_word = NULL_RTX, dst_word = NULL_RTX;
2227 enum machine_mode dst_mode;
2228
2229 gcc_assert (TYPE_MODE (TREE_TYPE (src)) == BLKmode);
2230
2231 x = expand_normal (src);
2232
2233 bytes = int_size_in_bytes (TREE_TYPE (src));
2234 if (bytes == 0)
2235 return NULL_RTX;
2236
2237 /* If the structure doesn't take up a whole number of words, see
2238 whether the register value should be padded on the left or on
2239 the right. Set PADDING_CORRECTION to the number of padding
2240 bits needed on the left side.
2241
2242 In most ABIs, the structure will be returned at the least end of
2243 the register, which translates to right padding on little-endian
2244 targets and left padding on big-endian targets. The opposite
2245 holds if the structure is returned at the most significant
2246 end of the register. */
2247 if (bytes % UNITS_PER_WORD != 0
2248 && (targetm.calls.return_in_msb (TREE_TYPE (src))
2249 ? !BYTES_BIG_ENDIAN
2250 : BYTES_BIG_ENDIAN))
2251 padding_correction = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD)
2252 * BITS_PER_UNIT));
2253
2254 n_regs = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
2255 dst_words = XALLOCAVEC (rtx, n_regs);
2256 bitsize = MIN (TYPE_ALIGN (TREE_TYPE (src)), BITS_PER_WORD);
2257
2258 /* Copy the structure BITSIZE bits at a time. */
2259 for (bitpos = 0, xbitpos = padding_correction;
2260 bitpos < bytes * BITS_PER_UNIT;
2261 bitpos += bitsize, xbitpos += bitsize)
2262 {
2263 /* We need a new destination pseudo each time xbitpos is
2264 on a word boundary and when xbitpos == padding_correction
2265 (the first time through). */
2266 if (xbitpos % BITS_PER_WORD == 0
2267 || xbitpos == padding_correction)
2268 {
2269 /* Generate an appropriate register. */
2270 dst_word = gen_reg_rtx (word_mode);
2271 dst_words[xbitpos / BITS_PER_WORD] = dst_word;
2272
2273 /* Clear the destination before we move anything into it. */
2274 emit_move_insn (dst_word, CONST0_RTX (word_mode));
2275 }
2276
2277 /* We need a new source operand each time bitpos is on a word
2278 boundary. */
2279 if (bitpos % BITS_PER_WORD == 0)
2280 src_word = operand_subword_force (x, bitpos / BITS_PER_WORD, BLKmode);
2281
2282 /* Use bitpos for the source extraction (left justified) and
2283 xbitpos for the destination store (right justified). */
2284 store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD,
2285 0, 0, word_mode,
2286 extract_bit_field (src_word, bitsize,
2287 bitpos % BITS_PER_WORD, 1, false,
2288 NULL_RTX, word_mode, word_mode));
2289 }
2290
2291 if (mode == BLKmode)
2292 {
2293 /* Find the smallest integer mode large enough to hold the
2294 entire structure. */
2295 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2296 mode != VOIDmode;
2297 mode = GET_MODE_WIDER_MODE (mode))
2298 /* Have we found a large enough mode? */
2299 if (GET_MODE_SIZE (mode) >= bytes)
2300 break;
2301
2302 /* A suitable mode should have been found. */
2303 gcc_assert (mode != VOIDmode);
2304 }
2305
2306 if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode))
2307 dst_mode = word_mode;
2308 else
2309 dst_mode = mode;
2310 dst = gen_reg_rtx (dst_mode);
2311
2312 for (i = 0; i < n_regs; i++)
2313 emit_move_insn (operand_subword (dst, i, 0, dst_mode), dst_words[i]);
2314
2315 if (mode != dst_mode)
2316 dst = gen_lowpart (mode, dst);
2317
2318 return dst;
2319 }
2320
2321 /* Add a USE expression for REG to the (possibly empty) list pointed
2322 to by CALL_FUSAGE. REG must denote a hard register. */
2323
2324 void
use_reg_mode(rtx * call_fusage,rtx reg,enum machine_mode mode)2325 use_reg_mode (rtx *call_fusage, rtx reg, enum machine_mode mode)
2326 {
2327 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2328
2329 *call_fusage
2330 = gen_rtx_EXPR_LIST (mode, gen_rtx_USE (VOIDmode, reg), *call_fusage);
2331 }
2332
2333 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2334 starting at REGNO. All of these registers must be hard registers. */
2335
2336 void
use_regs(rtx * call_fusage,int regno,int nregs)2337 use_regs (rtx *call_fusage, int regno, int nregs)
2338 {
2339 int i;
2340
2341 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2342
2343 for (i = 0; i < nregs; i++)
2344 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2345 }
2346
2347 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2348 PARALLEL REGS. This is for calls that pass values in multiple
2349 non-contiguous locations. The Irix 6 ABI has examples of this. */
2350
2351 void
use_group_regs(rtx * call_fusage,rtx regs)2352 use_group_regs (rtx *call_fusage, rtx regs)
2353 {
2354 int i;
2355
2356 for (i = 0; i < XVECLEN (regs, 0); i++)
2357 {
2358 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2359
2360 /* A NULL entry means the parameter goes both on the stack and in
2361 registers. This can also be a MEM for targets that pass values
2362 partially on the stack and partially in registers. */
2363 if (reg != 0 && REG_P (reg))
2364 use_reg (call_fusage, reg);
2365 }
2366 }
2367
2368 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2369 assigment and the code of the expresion on the RHS is CODE. Return
2370 NULL otherwise. */
2371
2372 static gimple
get_def_for_expr(tree name,enum tree_code code)2373 get_def_for_expr (tree name, enum tree_code code)
2374 {
2375 gimple def_stmt;
2376
2377 if (TREE_CODE (name) != SSA_NAME)
2378 return NULL;
2379
2380 def_stmt = get_gimple_for_ssa_name (name);
2381 if (!def_stmt
2382 || gimple_assign_rhs_code (def_stmt) != code)
2383 return NULL;
2384
2385 return def_stmt;
2386 }
2387
2388 #ifdef HAVE_conditional_move
2389 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2390 assigment and the class of the expresion on the RHS is CLASS. Return
2391 NULL otherwise. */
2392
2393 static gimple
get_def_for_expr_class(tree name,enum tree_code_class tclass)2394 get_def_for_expr_class (tree name, enum tree_code_class tclass)
2395 {
2396 gimple def_stmt;
2397
2398 if (TREE_CODE (name) != SSA_NAME)
2399 return NULL;
2400
2401 def_stmt = get_gimple_for_ssa_name (name);
2402 if (!def_stmt
2403 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt)) != tclass)
2404 return NULL;
2405
2406 return def_stmt;
2407 }
2408 #endif
2409
2410
2411 /* Determine whether the LEN bytes generated by CONSTFUN can be
2412 stored to memory using several move instructions. CONSTFUNDATA is
2413 a pointer which will be passed as argument in every CONSTFUN call.
2414 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2415 a memset operation and false if it's a copy of a constant string.
2416 Return nonzero if a call to store_by_pieces should succeed. */
2417
2418 int
can_store_by_pieces(unsigned HOST_WIDE_INT len,rtx (* constfun)(void *,HOST_WIDE_INT,enum machine_mode),void * constfundata,unsigned int align,bool memsetp)2419 can_store_by_pieces (unsigned HOST_WIDE_INT len,
2420 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2421 void *constfundata, unsigned int align, bool memsetp)
2422 {
2423 unsigned HOST_WIDE_INT l;
2424 unsigned int max_size;
2425 HOST_WIDE_INT offset = 0;
2426 enum machine_mode mode;
2427 enum insn_code icode;
2428 int reverse;
2429 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
2430 rtx cst ATTRIBUTE_UNUSED;
2431
2432 if (len == 0)
2433 return 1;
2434
2435 if (! (memsetp
2436 ? SET_BY_PIECES_P (len, align)
2437 : STORE_BY_PIECES_P (len, align)))
2438 return 0;
2439
2440 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2441
2442 /* We would first store what we can in the largest integer mode, then go to
2443 successively smaller modes. */
2444
2445 for (reverse = 0;
2446 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2447 reverse++)
2448 {
2449 l = len;
2450 max_size = STORE_MAX_PIECES + 1;
2451 while (max_size > 1 && l > 0)
2452 {
2453 mode = widest_int_mode_for_size (max_size);
2454
2455 if (mode == VOIDmode)
2456 break;
2457
2458 icode = optab_handler (mov_optab, mode);
2459 if (icode != CODE_FOR_nothing
2460 && align >= GET_MODE_ALIGNMENT (mode))
2461 {
2462 unsigned int size = GET_MODE_SIZE (mode);
2463
2464 while (l >= size)
2465 {
2466 if (reverse)
2467 offset -= size;
2468
2469 cst = (*constfun) (constfundata, offset, mode);
2470 if (!targetm.legitimate_constant_p (mode, cst))
2471 return 0;
2472
2473 if (!reverse)
2474 offset += size;
2475
2476 l -= size;
2477 }
2478 }
2479
2480 max_size = GET_MODE_SIZE (mode);
2481 }
2482
2483 /* The code above should have handled everything. */
2484 gcc_assert (!l);
2485 }
2486
2487 return 1;
2488 }
2489
2490 /* Generate several move instructions to store LEN bytes generated by
2491 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2492 pointer which will be passed as argument in every CONSTFUN call.
2493 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2494 a memset operation and false if it's a copy of a constant string.
2495 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2496 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2497 stpcpy. */
2498
2499 rtx
store_by_pieces(rtx to,unsigned HOST_WIDE_INT len,rtx (* constfun)(void *,HOST_WIDE_INT,enum machine_mode),void * constfundata,unsigned int align,bool memsetp,int endp)2500 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2501 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2502 void *constfundata, unsigned int align, bool memsetp, int endp)
2503 {
2504 enum machine_mode to_addr_mode = get_address_mode (to);
2505 struct store_by_pieces_d data;
2506
2507 if (len == 0)
2508 {
2509 gcc_assert (endp != 2);
2510 return to;
2511 }
2512
2513 gcc_assert (memsetp
2514 ? SET_BY_PIECES_P (len, align)
2515 : STORE_BY_PIECES_P (len, align));
2516 data.constfun = constfun;
2517 data.constfundata = constfundata;
2518 data.len = len;
2519 data.to = to;
2520 store_by_pieces_1 (&data, align);
2521 if (endp)
2522 {
2523 rtx to1;
2524
2525 gcc_assert (!data.reverse);
2526 if (data.autinc_to)
2527 {
2528 if (endp == 2)
2529 {
2530 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2531 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2532 else
2533 data.to_addr = copy_to_mode_reg (to_addr_mode,
2534 plus_constant (to_addr_mode,
2535 data.to_addr,
2536 -1));
2537 }
2538 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2539 data.offset);
2540 }
2541 else
2542 {
2543 if (endp == 2)
2544 --data.offset;
2545 to1 = adjust_address (data.to, QImode, data.offset);
2546 }
2547 return to1;
2548 }
2549 else
2550 return data.to;
2551 }
2552
2553 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2554 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2555
2556 static void
clear_by_pieces(rtx to,unsigned HOST_WIDE_INT len,unsigned int align)2557 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2558 {
2559 struct store_by_pieces_d data;
2560
2561 if (len == 0)
2562 return;
2563
2564 data.constfun = clear_by_pieces_1;
2565 data.constfundata = NULL;
2566 data.len = len;
2567 data.to = to;
2568 store_by_pieces_1 (&data, align);
2569 }
2570
2571 /* Callback routine for clear_by_pieces.
2572 Return const0_rtx unconditionally. */
2573
2574 static rtx
clear_by_pieces_1(void * data ATTRIBUTE_UNUSED,HOST_WIDE_INT offset ATTRIBUTE_UNUSED,enum machine_mode mode ATTRIBUTE_UNUSED)2575 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2576 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2577 enum machine_mode mode ATTRIBUTE_UNUSED)
2578 {
2579 return const0_rtx;
2580 }
2581
2582 /* Subroutine of clear_by_pieces and store_by_pieces.
2583 Generate several move instructions to store LEN bytes of block TO. (A MEM
2584 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2585
2586 static void
store_by_pieces_1(struct store_by_pieces_d * data ATTRIBUTE_UNUSED,unsigned int align ATTRIBUTE_UNUSED)2587 store_by_pieces_1 (struct store_by_pieces_d *data ATTRIBUTE_UNUSED,
2588 unsigned int align ATTRIBUTE_UNUSED)
2589 {
2590 enum machine_mode to_addr_mode = get_address_mode (data->to);
2591 rtx to_addr = XEXP (data->to, 0);
2592 unsigned int max_size = STORE_MAX_PIECES + 1;
2593 enum insn_code icode;
2594
2595 data->offset = 0;
2596 data->to_addr = to_addr;
2597 data->autinc_to
2598 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2599 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2600
2601 data->explicit_inc_to = 0;
2602 data->reverse
2603 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2604 if (data->reverse)
2605 data->offset = data->len;
2606
2607 /* If storing requires more than two move insns,
2608 copy addresses to registers (to make displacements shorter)
2609 and use post-increment if available. */
2610 if (!data->autinc_to
2611 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2612 {
2613 /* Determine the main mode we'll be using.
2614 MODE might not be used depending on the definitions of the
2615 USE_* macros below. */
2616 enum machine_mode mode ATTRIBUTE_UNUSED
2617 = widest_int_mode_for_size (max_size);
2618
2619 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2620 {
2621 data->to_addr = copy_to_mode_reg (to_addr_mode,
2622 plus_constant (to_addr_mode,
2623 to_addr,
2624 data->len));
2625 data->autinc_to = 1;
2626 data->explicit_inc_to = -1;
2627 }
2628
2629 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2630 && ! data->autinc_to)
2631 {
2632 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2633 data->autinc_to = 1;
2634 data->explicit_inc_to = 1;
2635 }
2636
2637 if ( !data->autinc_to && CONSTANT_P (to_addr))
2638 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2639 }
2640
2641 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2642
2643 /* First store what we can in the largest integer mode, then go to
2644 successively smaller modes. */
2645
2646 while (max_size > 1 && data->len > 0)
2647 {
2648 enum machine_mode mode = widest_int_mode_for_size (max_size);
2649
2650 if (mode == VOIDmode)
2651 break;
2652
2653 icode = optab_handler (mov_optab, mode);
2654 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2655 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2656
2657 max_size = GET_MODE_SIZE (mode);
2658 }
2659
2660 /* The code above should have handled everything. */
2661 gcc_assert (!data->len);
2662 }
2663
2664 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2665 with move instructions for mode MODE. GENFUN is the gen_... function
2666 to make a move insn for that mode. DATA has all the other info. */
2667
2668 static void
store_by_pieces_2(insn_gen_fn genfun,machine_mode mode,struct store_by_pieces_d * data)2669 store_by_pieces_2 (insn_gen_fn genfun, machine_mode mode,
2670 struct store_by_pieces_d *data)
2671 {
2672 unsigned int size = GET_MODE_SIZE (mode);
2673 rtx to1, cst;
2674
2675 while (data->len >= size)
2676 {
2677 if (data->reverse)
2678 data->offset -= size;
2679
2680 if (data->autinc_to)
2681 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2682 data->offset);
2683 else
2684 to1 = adjust_address (data->to, mode, data->offset);
2685
2686 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2687 emit_insn (gen_add2_insn (data->to_addr,
2688 GEN_INT (-(HOST_WIDE_INT) size)));
2689
2690 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2691 emit_insn ((*genfun) (to1, cst));
2692
2693 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2694 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
2695
2696 if (! data->reverse)
2697 data->offset += size;
2698
2699 data->len -= size;
2700 }
2701 }
2702
2703 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2704 its length in bytes. */
2705
2706 rtx
clear_storage_hints(rtx object,rtx size,enum block_op_methods method,unsigned int expected_align,HOST_WIDE_INT expected_size)2707 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2708 unsigned int expected_align, HOST_WIDE_INT expected_size)
2709 {
2710 enum machine_mode mode = GET_MODE (object);
2711 unsigned int align;
2712
2713 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2714
2715 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2716 just move a zero. Otherwise, do this a piece at a time. */
2717 if (mode != BLKmode
2718 && CONST_INT_P (size)
2719 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2720 {
2721 rtx zero = CONST0_RTX (mode);
2722 if (zero != NULL)
2723 {
2724 emit_move_insn (object, zero);
2725 return NULL;
2726 }
2727
2728 if (COMPLEX_MODE_P (mode))
2729 {
2730 zero = CONST0_RTX (GET_MODE_INNER (mode));
2731 if (zero != NULL)
2732 {
2733 write_complex_part (object, zero, 0);
2734 write_complex_part (object, zero, 1);
2735 return NULL;
2736 }
2737 }
2738 }
2739
2740 if (size == const0_rtx)
2741 return NULL;
2742
2743 align = MEM_ALIGN (object);
2744
2745 if (CONST_INT_P (size)
2746 && CLEAR_BY_PIECES_P (INTVAL (size), align))
2747 clear_by_pieces (object, INTVAL (size), align);
2748 else if (set_storage_via_setmem (object, size, const0_rtx, align,
2749 expected_align, expected_size))
2750 ;
2751 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object)))
2752 return set_storage_via_libcall (object, size, const0_rtx,
2753 method == BLOCK_OP_TAILCALL);
2754 else
2755 gcc_unreachable ();
2756
2757 return NULL;
2758 }
2759
2760 rtx
clear_storage(rtx object,rtx size,enum block_op_methods method)2761 clear_storage (rtx object, rtx size, enum block_op_methods method)
2762 {
2763 return clear_storage_hints (object, size, method, 0, -1);
2764 }
2765
2766
2767 /* A subroutine of clear_storage. Expand a call to memset.
2768 Return the return value of memset, 0 otherwise. */
2769
2770 rtx
set_storage_via_libcall(rtx object,rtx size,rtx val,bool tailcall)2771 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
2772 {
2773 tree call_expr, fn, object_tree, size_tree, val_tree;
2774 enum machine_mode size_mode;
2775 rtx retval;
2776
2777 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2778 place those into new pseudos into a VAR_DECL and use them later. */
2779
2780 object = copy_addr_to_reg (XEXP (object, 0));
2781
2782 size_mode = TYPE_MODE (sizetype);
2783 size = convert_to_mode (size_mode, size, 1);
2784 size = copy_to_mode_reg (size_mode, size);
2785
2786 /* It is incorrect to use the libcall calling conventions to call
2787 memset in this context. This could be a user call to memset and
2788 the user may wish to examine the return value from memset. For
2789 targets where libcalls and normal calls have different conventions
2790 for returning pointers, we could end up generating incorrect code. */
2791
2792 object_tree = make_tree (ptr_type_node, object);
2793 if (!CONST_INT_P (val))
2794 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
2795 size_tree = make_tree (sizetype, size);
2796 val_tree = make_tree (integer_type_node, val);
2797
2798 fn = clear_storage_libcall_fn (true);
2799 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
2800 CALL_EXPR_TAILCALL (call_expr) = tailcall;
2801
2802 retval = expand_normal (call_expr);
2803
2804 return retval;
2805 }
2806
2807 /* A subroutine of set_storage_via_libcall. Create the tree node
2808 for the function we use for block clears. */
2809
2810 tree block_clear_fn;
2811
2812 void
init_block_clear_fn(const char * asmspec)2813 init_block_clear_fn (const char *asmspec)
2814 {
2815 if (!block_clear_fn)
2816 {
2817 tree fn, args;
2818
2819 fn = get_identifier ("memset");
2820 args = build_function_type_list (ptr_type_node, ptr_type_node,
2821 integer_type_node, sizetype,
2822 NULL_TREE);
2823
2824 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
2825 DECL_EXTERNAL (fn) = 1;
2826 TREE_PUBLIC (fn) = 1;
2827 DECL_ARTIFICIAL (fn) = 1;
2828 TREE_NOTHROW (fn) = 1;
2829 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
2830 DECL_VISIBILITY_SPECIFIED (fn) = 1;
2831
2832 block_clear_fn = fn;
2833 }
2834
2835 if (asmspec)
2836 set_user_assembler_name (block_clear_fn, asmspec);
2837 }
2838
2839 static tree
clear_storage_libcall_fn(int for_call)2840 clear_storage_libcall_fn (int for_call)
2841 {
2842 static bool emitted_extern;
2843
2844 if (!block_clear_fn)
2845 init_block_clear_fn (NULL);
2846
2847 if (for_call && !emitted_extern)
2848 {
2849 emitted_extern = true;
2850 make_decl_rtl (block_clear_fn);
2851 }
2852
2853 return block_clear_fn;
2854 }
2855
2856 /* Expand a setmem pattern; return true if successful. */
2857
2858 bool
set_storage_via_setmem(rtx object,rtx size,rtx val,unsigned int align,unsigned int expected_align,HOST_WIDE_INT expected_size)2859 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
2860 unsigned int expected_align, HOST_WIDE_INT expected_size)
2861 {
2862 /* Try the most limited insn first, because there's no point
2863 including more than one in the machine description unless
2864 the more limited one has some advantage. */
2865
2866 enum machine_mode mode;
2867
2868 if (expected_align < align)
2869 expected_align = align;
2870
2871 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2872 mode = GET_MODE_WIDER_MODE (mode))
2873 {
2874 enum insn_code code = direct_optab_handler (setmem_optab, mode);
2875
2876 if (code != CODE_FOR_nothing
2877 /* We don't need MODE to be narrower than
2878 BITS_PER_HOST_WIDE_INT here because if SIZE is less than
2879 the mode mask, as it is returned by the macro, it will
2880 definitely be less than the actual mode mask. */
2881 && ((CONST_INT_P (size)
2882 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2883 <= (GET_MODE_MASK (mode) >> 1)))
2884 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
2885 {
2886 struct expand_operand ops[6];
2887 unsigned int nops;
2888
2889 nops = insn_data[(int) code].n_generator_args;
2890 gcc_assert (nops == 4 || nops == 6);
2891
2892 create_fixed_operand (&ops[0], object);
2893 /* The check above guarantees that this size conversion is valid. */
2894 create_convert_operand_to (&ops[1], size, mode, true);
2895 create_convert_operand_from (&ops[2], val, byte_mode, true);
2896 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
2897 if (nops == 6)
2898 {
2899 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
2900 create_integer_operand (&ops[5], expected_size);
2901 }
2902 if (maybe_expand_insn (code, nops, ops))
2903 return true;
2904 }
2905 }
2906
2907 return false;
2908 }
2909
2910
2911 /* Write to one of the components of the complex value CPLX. Write VAL to
2912 the real part if IMAG_P is false, and the imaginary part if its true. */
2913
2914 static void
write_complex_part(rtx cplx,rtx val,bool imag_p)2915 write_complex_part (rtx cplx, rtx val, bool imag_p)
2916 {
2917 enum machine_mode cmode;
2918 enum machine_mode imode;
2919 unsigned ibitsize;
2920
2921 if (GET_CODE (cplx) == CONCAT)
2922 {
2923 emit_move_insn (XEXP (cplx, imag_p), val);
2924 return;
2925 }
2926
2927 cmode = GET_MODE (cplx);
2928 imode = GET_MODE_INNER (cmode);
2929 ibitsize = GET_MODE_BITSIZE (imode);
2930
2931 /* For MEMs simplify_gen_subreg may generate an invalid new address
2932 because, e.g., the original address is considered mode-dependent
2933 by the target, which restricts simplify_subreg from invoking
2934 adjust_address_nv. Instead of preparing fallback support for an
2935 invalid address, we call adjust_address_nv directly. */
2936 if (MEM_P (cplx))
2937 {
2938 emit_move_insn (adjust_address_nv (cplx, imode,
2939 imag_p ? GET_MODE_SIZE (imode) : 0),
2940 val);
2941 return;
2942 }
2943
2944 /* If the sub-object is at least word sized, then we know that subregging
2945 will work. This special case is important, since store_bit_field
2946 wants to operate on integer modes, and there's rarely an OImode to
2947 correspond to TCmode. */
2948 if (ibitsize >= BITS_PER_WORD
2949 /* For hard regs we have exact predicates. Assume we can split
2950 the original object if it spans an even number of hard regs.
2951 This special case is important for SCmode on 64-bit platforms
2952 where the natural size of floating-point regs is 32-bit. */
2953 || (REG_P (cplx)
2954 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2955 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2956 {
2957 rtx part = simplify_gen_subreg (imode, cplx, cmode,
2958 imag_p ? GET_MODE_SIZE (imode) : 0);
2959 if (part)
2960 {
2961 emit_move_insn (part, val);
2962 return;
2963 }
2964 else
2965 /* simplify_gen_subreg may fail for sub-word MEMs. */
2966 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2967 }
2968
2969 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val);
2970 }
2971
2972 /* Extract one of the components of the complex value CPLX. Extract the
2973 real part if IMAG_P is false, and the imaginary part if it's true. */
2974
2975 static rtx
read_complex_part(rtx cplx,bool imag_p)2976 read_complex_part (rtx cplx, bool imag_p)
2977 {
2978 enum machine_mode cmode, imode;
2979 unsigned ibitsize;
2980
2981 if (GET_CODE (cplx) == CONCAT)
2982 return XEXP (cplx, imag_p);
2983
2984 cmode = GET_MODE (cplx);
2985 imode = GET_MODE_INNER (cmode);
2986 ibitsize = GET_MODE_BITSIZE (imode);
2987
2988 /* Special case reads from complex constants that got spilled to memory. */
2989 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
2990 {
2991 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
2992 if (decl && TREE_CODE (decl) == COMPLEX_CST)
2993 {
2994 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
2995 if (CONSTANT_CLASS_P (part))
2996 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
2997 }
2998 }
2999
3000 /* For MEMs simplify_gen_subreg may generate an invalid new address
3001 because, e.g., the original address is considered mode-dependent
3002 by the target, which restricts simplify_subreg from invoking
3003 adjust_address_nv. Instead of preparing fallback support for an
3004 invalid address, we call adjust_address_nv directly. */
3005 if (MEM_P (cplx))
3006 return adjust_address_nv (cplx, imode,
3007 imag_p ? GET_MODE_SIZE (imode) : 0);
3008
3009 /* If the sub-object is at least word sized, then we know that subregging
3010 will work. This special case is important, since extract_bit_field
3011 wants to operate on integer modes, and there's rarely an OImode to
3012 correspond to TCmode. */
3013 if (ibitsize >= BITS_PER_WORD
3014 /* For hard regs we have exact predicates. Assume we can split
3015 the original object if it spans an even number of hard regs.
3016 This special case is important for SCmode on 64-bit platforms
3017 where the natural size of floating-point regs is 32-bit. */
3018 || (REG_P (cplx)
3019 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
3020 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
3021 {
3022 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
3023 imag_p ? GET_MODE_SIZE (imode) : 0);
3024 if (ret)
3025 return ret;
3026 else
3027 /* simplify_gen_subreg may fail for sub-word MEMs. */
3028 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
3029 }
3030
3031 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
3032 true, false, NULL_RTX, imode, imode);
3033 }
3034
3035 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3036 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3037 represented in NEW_MODE. If FORCE is true, this will never happen, as
3038 we'll force-create a SUBREG if needed. */
3039
3040 static rtx
emit_move_change_mode(enum machine_mode new_mode,enum machine_mode old_mode,rtx x,bool force)3041 emit_move_change_mode (enum machine_mode new_mode,
3042 enum machine_mode old_mode, rtx x, bool force)
3043 {
3044 rtx ret;
3045
3046 if (push_operand (x, GET_MODE (x)))
3047 {
3048 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
3049 MEM_COPY_ATTRIBUTES (ret, x);
3050 }
3051 else if (MEM_P (x))
3052 {
3053 /* We don't have to worry about changing the address since the
3054 size in bytes is supposed to be the same. */
3055 if (reload_in_progress)
3056 {
3057 /* Copy the MEM to change the mode and move any
3058 substitutions from the old MEM to the new one. */
3059 ret = adjust_address_nv (x, new_mode, 0);
3060 copy_replacements (x, ret);
3061 }
3062 else
3063 ret = adjust_address (x, new_mode, 0);
3064 }
3065 else
3066 {
3067 /* Note that we do want simplify_subreg's behavior of validating
3068 that the new mode is ok for a hard register. If we were to use
3069 simplify_gen_subreg, we would create the subreg, but would
3070 probably run into the target not being able to implement it. */
3071 /* Except, of course, when FORCE is true, when this is exactly what
3072 we want. Which is needed for CCmodes on some targets. */
3073 if (force)
3074 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
3075 else
3076 ret = simplify_subreg (new_mode, x, old_mode, 0);
3077 }
3078
3079 return ret;
3080 }
3081
3082 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3083 an integer mode of the same size as MODE. Returns the instruction
3084 emitted, or NULL if such a move could not be generated. */
3085
3086 static rtx
emit_move_via_integer(enum machine_mode mode,rtx x,rtx y,bool force)3087 emit_move_via_integer (enum machine_mode mode, rtx x, rtx y, bool force)
3088 {
3089 enum machine_mode imode;
3090 enum insn_code code;
3091
3092 /* There must exist a mode of the exact size we require. */
3093 imode = int_mode_for_mode (mode);
3094 if (imode == BLKmode)
3095 return NULL_RTX;
3096
3097 /* The target must support moves in this mode. */
3098 code = optab_handler (mov_optab, imode);
3099 if (code == CODE_FOR_nothing)
3100 return NULL_RTX;
3101
3102 x = emit_move_change_mode (imode, mode, x, force);
3103 if (x == NULL_RTX)
3104 return NULL_RTX;
3105 y = emit_move_change_mode (imode, mode, y, force);
3106 if (y == NULL_RTX)
3107 return NULL_RTX;
3108 return emit_insn (GEN_FCN (code) (x, y));
3109 }
3110
3111 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3112 Return an equivalent MEM that does not use an auto-increment. */
3113
3114 static rtx
emit_move_resolve_push(enum machine_mode mode,rtx x)3115 emit_move_resolve_push (enum machine_mode mode, rtx x)
3116 {
3117 enum rtx_code code = GET_CODE (XEXP (x, 0));
3118 HOST_WIDE_INT adjust;
3119 rtx temp;
3120
3121 adjust = GET_MODE_SIZE (mode);
3122 #ifdef PUSH_ROUNDING
3123 adjust = PUSH_ROUNDING (adjust);
3124 #endif
3125 if (code == PRE_DEC || code == POST_DEC)
3126 adjust = -adjust;
3127 else if (code == PRE_MODIFY || code == POST_MODIFY)
3128 {
3129 rtx expr = XEXP (XEXP (x, 0), 1);
3130 HOST_WIDE_INT val;
3131
3132 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
3133 gcc_assert (CONST_INT_P (XEXP (expr, 1)));
3134 val = INTVAL (XEXP (expr, 1));
3135 if (GET_CODE (expr) == MINUS)
3136 val = -val;
3137 gcc_assert (adjust == val || adjust == -val);
3138 adjust = val;
3139 }
3140
3141 /* Do not use anti_adjust_stack, since we don't want to update
3142 stack_pointer_delta. */
3143 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
3144 GEN_INT (adjust), stack_pointer_rtx,
3145 0, OPTAB_LIB_WIDEN);
3146 if (temp != stack_pointer_rtx)
3147 emit_move_insn (stack_pointer_rtx, temp);
3148
3149 switch (code)
3150 {
3151 case PRE_INC:
3152 case PRE_DEC:
3153 case PRE_MODIFY:
3154 temp = stack_pointer_rtx;
3155 break;
3156 case POST_INC:
3157 case POST_DEC:
3158 case POST_MODIFY:
3159 temp = plus_constant (Pmode, stack_pointer_rtx, -adjust);
3160 break;
3161 default:
3162 gcc_unreachable ();
3163 }
3164
3165 return replace_equiv_address (x, temp);
3166 }
3167
3168 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3169 X is known to satisfy push_operand, and MODE is known to be complex.
3170 Returns the last instruction emitted. */
3171
3172 rtx
emit_move_complex_push(enum machine_mode mode,rtx x,rtx y)3173 emit_move_complex_push (enum machine_mode mode, rtx x, rtx y)
3174 {
3175 enum machine_mode submode = GET_MODE_INNER (mode);
3176 bool imag_first;
3177
3178 #ifdef PUSH_ROUNDING
3179 unsigned int submodesize = GET_MODE_SIZE (submode);
3180
3181 /* In case we output to the stack, but the size is smaller than the
3182 machine can push exactly, we need to use move instructions. */
3183 if (PUSH_ROUNDING (submodesize) != submodesize)
3184 {
3185 x = emit_move_resolve_push (mode, x);
3186 return emit_move_insn (x, y);
3187 }
3188 #endif
3189
3190 /* Note that the real part always precedes the imag part in memory
3191 regardless of machine's endianness. */
3192 switch (GET_CODE (XEXP (x, 0)))
3193 {
3194 case PRE_DEC:
3195 case POST_DEC:
3196 imag_first = true;
3197 break;
3198 case PRE_INC:
3199 case POST_INC:
3200 imag_first = false;
3201 break;
3202 default:
3203 gcc_unreachable ();
3204 }
3205
3206 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3207 read_complex_part (y, imag_first));
3208 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3209 read_complex_part (y, !imag_first));
3210 }
3211
3212 /* A subroutine of emit_move_complex. Perform the move from Y to X
3213 via two moves of the parts. Returns the last instruction emitted. */
3214
3215 rtx
emit_move_complex_parts(rtx x,rtx y)3216 emit_move_complex_parts (rtx x, rtx y)
3217 {
3218 /* Show the output dies here. This is necessary for SUBREGs
3219 of pseudos since we cannot track their lifetimes correctly;
3220 hard regs shouldn't appear here except as return values. */
3221 if (!reload_completed && !reload_in_progress
3222 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3223 emit_clobber (x);
3224
3225 write_complex_part (x, read_complex_part (y, false), false);
3226 write_complex_part (x, read_complex_part (y, true), true);
3227
3228 return get_last_insn ();
3229 }
3230
3231 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3232 MODE is known to be complex. Returns the last instruction emitted. */
3233
3234 static rtx
emit_move_complex(enum machine_mode mode,rtx x,rtx y)3235 emit_move_complex (enum machine_mode mode, rtx x, rtx y)
3236 {
3237 bool try_int;
3238
3239 /* Need to take special care for pushes, to maintain proper ordering
3240 of the data, and possibly extra padding. */
3241 if (push_operand (x, mode))
3242 return emit_move_complex_push (mode, x, y);
3243
3244 /* See if we can coerce the target into moving both values at once. */
3245
3246 /* Move floating point as parts. */
3247 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3248 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing)
3249 try_int = false;
3250 /* Not possible if the values are inherently not adjacent. */
3251 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3252 try_int = false;
3253 /* Is possible if both are registers (or subregs of registers). */
3254 else if (register_operand (x, mode) && register_operand (y, mode))
3255 try_int = true;
3256 /* If one of the operands is a memory, and alignment constraints
3257 are friendly enough, we may be able to do combined memory operations.
3258 We do not attempt this if Y is a constant because that combination is
3259 usually better with the by-parts thing below. */
3260 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3261 && (!STRICT_ALIGNMENT
3262 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3263 try_int = true;
3264 else
3265 try_int = false;
3266
3267 if (try_int)
3268 {
3269 rtx ret;
3270
3271 /* For memory to memory moves, optimal behavior can be had with the
3272 existing block move logic. */
3273 if (MEM_P (x) && MEM_P (y))
3274 {
3275 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
3276 BLOCK_OP_NO_LIBCALL);
3277 return get_last_insn ();
3278 }
3279
3280 ret = emit_move_via_integer (mode, x, y, true);
3281 if (ret)
3282 return ret;
3283 }
3284
3285 return emit_move_complex_parts (x, y);
3286 }
3287
3288 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3289 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3290
3291 static rtx
emit_move_ccmode(enum machine_mode mode,rtx x,rtx y)3292 emit_move_ccmode (enum machine_mode mode, rtx x, rtx y)
3293 {
3294 rtx ret;
3295
3296 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3297 if (mode != CCmode)
3298 {
3299 enum insn_code code = optab_handler (mov_optab, CCmode);
3300 if (code != CODE_FOR_nothing)
3301 {
3302 x = emit_move_change_mode (CCmode, mode, x, true);
3303 y = emit_move_change_mode (CCmode, mode, y, true);
3304 return emit_insn (GEN_FCN (code) (x, y));
3305 }
3306 }
3307
3308 /* Otherwise, find the MODE_INT mode of the same width. */
3309 ret = emit_move_via_integer (mode, x, y, false);
3310 gcc_assert (ret != NULL);
3311 return ret;
3312 }
3313
3314 /* Return true if word I of OP lies entirely in the
3315 undefined bits of a paradoxical subreg. */
3316
3317 static bool
undefined_operand_subword_p(const_rtx op,int i)3318 undefined_operand_subword_p (const_rtx op, int i)
3319 {
3320 enum machine_mode innermode, innermostmode;
3321 int offset;
3322 if (GET_CODE (op) != SUBREG)
3323 return false;
3324 innermode = GET_MODE (op);
3325 innermostmode = GET_MODE (SUBREG_REG (op));
3326 offset = i * UNITS_PER_WORD + SUBREG_BYTE (op);
3327 /* The SUBREG_BYTE represents offset, as if the value were stored in
3328 memory, except for a paradoxical subreg where we define
3329 SUBREG_BYTE to be 0; undo this exception as in
3330 simplify_subreg. */
3331 if (SUBREG_BYTE (op) == 0
3332 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
3333 {
3334 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
3335 if (WORDS_BIG_ENDIAN)
3336 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3337 if (BYTES_BIG_ENDIAN)
3338 offset += difference % UNITS_PER_WORD;
3339 }
3340 if (offset >= GET_MODE_SIZE (innermostmode)
3341 || offset <= -GET_MODE_SIZE (word_mode))
3342 return true;
3343 return false;
3344 }
3345
3346 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3347 MODE is any multi-word or full-word mode that lacks a move_insn
3348 pattern. Note that you will get better code if you define such
3349 patterns, even if they must turn into multiple assembler instructions. */
3350
3351 static rtx
emit_move_multi_word(enum machine_mode mode,rtx x,rtx y)3352 emit_move_multi_word (enum machine_mode mode, rtx x, rtx y)
3353 {
3354 rtx last_insn = 0;
3355 rtx seq, inner;
3356 bool need_clobber;
3357 int i;
3358
3359 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
3360
3361 /* If X is a push on the stack, do the push now and replace
3362 X with a reference to the stack pointer. */
3363 if (push_operand (x, mode))
3364 x = emit_move_resolve_push (mode, x);
3365
3366 /* If we are in reload, see if either operand is a MEM whose address
3367 is scheduled for replacement. */
3368 if (reload_in_progress && MEM_P (x)
3369 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3370 x = replace_equiv_address_nv (x, inner);
3371 if (reload_in_progress && MEM_P (y)
3372 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3373 y = replace_equiv_address_nv (y, inner);
3374
3375 start_sequence ();
3376
3377 need_clobber = false;
3378 for (i = 0;
3379 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
3380 i++)
3381 {
3382 rtx xpart = operand_subword (x, i, 1, mode);
3383 rtx ypart;
3384
3385 /* Do not generate code for a move if it would come entirely
3386 from the undefined bits of a paradoxical subreg. */
3387 if (undefined_operand_subword_p (y, i))
3388 continue;
3389
3390 ypart = operand_subword (y, i, 1, mode);
3391
3392 /* If we can't get a part of Y, put Y into memory if it is a
3393 constant. Otherwise, force it into a register. Then we must
3394 be able to get a part of Y. */
3395 if (ypart == 0 && CONSTANT_P (y))
3396 {
3397 y = use_anchored_address (force_const_mem (mode, y));
3398 ypart = operand_subword (y, i, 1, mode);
3399 }
3400 else if (ypart == 0)
3401 ypart = operand_subword_force (y, i, mode);
3402
3403 gcc_assert (xpart && ypart);
3404
3405 need_clobber |= (GET_CODE (xpart) == SUBREG);
3406
3407 last_insn = emit_move_insn (xpart, ypart);
3408 }
3409
3410 seq = get_insns ();
3411 end_sequence ();
3412
3413 /* Show the output dies here. This is necessary for SUBREGs
3414 of pseudos since we cannot track their lifetimes correctly;
3415 hard regs shouldn't appear here except as return values.
3416 We never want to emit such a clobber after reload. */
3417 if (x != y
3418 && ! (reload_in_progress || reload_completed)
3419 && need_clobber != 0)
3420 emit_clobber (x);
3421
3422 emit_insn (seq);
3423
3424 return last_insn;
3425 }
3426
3427 /* Low level part of emit_move_insn.
3428 Called just like emit_move_insn, but assumes X and Y
3429 are basically valid. */
3430
3431 rtx
emit_move_insn_1(rtx x,rtx y)3432 emit_move_insn_1 (rtx x, rtx y)
3433 {
3434 enum machine_mode mode = GET_MODE (x);
3435 enum insn_code code;
3436
3437 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3438
3439 code = optab_handler (mov_optab, mode);
3440 if (code != CODE_FOR_nothing)
3441 return emit_insn (GEN_FCN (code) (x, y));
3442
3443 /* Expand complex moves by moving real part and imag part. */
3444 if (COMPLEX_MODE_P (mode))
3445 return emit_move_complex (mode, x, y);
3446
3447 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3448 || ALL_FIXED_POINT_MODE_P (mode))
3449 {
3450 rtx result = emit_move_via_integer (mode, x, y, true);
3451
3452 /* If we can't find an integer mode, use multi words. */
3453 if (result)
3454 return result;
3455 else
3456 return emit_move_multi_word (mode, x, y);
3457 }
3458
3459 if (GET_MODE_CLASS (mode) == MODE_CC)
3460 return emit_move_ccmode (mode, x, y);
3461
3462 /* Try using a move pattern for the corresponding integer mode. This is
3463 only safe when simplify_subreg can convert MODE constants into integer
3464 constants. At present, it can only do this reliably if the value
3465 fits within a HOST_WIDE_INT. */
3466 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3467 {
3468 rtx ret = emit_move_via_integer (mode, x, y, lra_in_progress);
3469
3470 if (ret)
3471 {
3472 if (! lra_in_progress || recog (PATTERN (ret), ret, 0) >= 0)
3473 return ret;
3474 }
3475 }
3476
3477 return emit_move_multi_word (mode, x, y);
3478 }
3479
3480 /* Generate code to copy Y into X.
3481 Both Y and X must have the same mode, except that
3482 Y can be a constant with VOIDmode.
3483 This mode cannot be BLKmode; use emit_block_move for that.
3484
3485 Return the last instruction emitted. */
3486
3487 rtx
emit_move_insn(rtx x,rtx y)3488 emit_move_insn (rtx x, rtx y)
3489 {
3490 enum machine_mode mode = GET_MODE (x);
3491 rtx y_cst = NULL_RTX;
3492 rtx last_insn, set;
3493
3494 gcc_assert (mode != BLKmode
3495 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3496
3497 if (CONSTANT_P (y))
3498 {
3499 if (optimize
3500 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3501 && (last_insn = compress_float_constant (x, y)))
3502 return last_insn;
3503
3504 y_cst = y;
3505
3506 if (!targetm.legitimate_constant_p (mode, y))
3507 {
3508 y = force_const_mem (mode, y);
3509
3510 /* If the target's cannot_force_const_mem prevented the spill,
3511 assume that the target's move expanders will also take care
3512 of the non-legitimate constant. */
3513 if (!y)
3514 y = y_cst;
3515 else
3516 y = use_anchored_address (y);
3517 }
3518 }
3519
3520 /* If X or Y are memory references, verify that their addresses are valid
3521 for the machine. */
3522 if (MEM_P (x)
3523 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
3524 MEM_ADDR_SPACE (x))
3525 && ! push_operand (x, GET_MODE (x))))
3526 x = validize_mem (x);
3527
3528 if (MEM_P (y)
3529 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0),
3530 MEM_ADDR_SPACE (y)))
3531 y = validize_mem (y);
3532
3533 gcc_assert (mode != BLKmode);
3534
3535 last_insn = emit_move_insn_1 (x, y);
3536
3537 if (y_cst && REG_P (x)
3538 && (set = single_set (last_insn)) != NULL_RTX
3539 && SET_DEST (set) == x
3540 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3541 set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst));
3542
3543 return last_insn;
3544 }
3545
3546 /* If Y is representable exactly in a narrower mode, and the target can
3547 perform the extension directly from constant or memory, then emit the
3548 move as an extension. */
3549
3550 static rtx
compress_float_constant(rtx x,rtx y)3551 compress_float_constant (rtx x, rtx y)
3552 {
3553 enum machine_mode dstmode = GET_MODE (x);
3554 enum machine_mode orig_srcmode = GET_MODE (y);
3555 enum machine_mode srcmode;
3556 REAL_VALUE_TYPE r;
3557 int oldcost, newcost;
3558 bool speed = optimize_insn_for_speed_p ();
3559
3560 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3561
3562 if (targetm.legitimate_constant_p (dstmode, y))
3563 oldcost = set_src_cost (y, speed);
3564 else
3565 oldcost = set_src_cost (force_const_mem (dstmode, y), speed);
3566
3567 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3568 srcmode != orig_srcmode;
3569 srcmode = GET_MODE_WIDER_MODE (srcmode))
3570 {
3571 enum insn_code ic;
3572 rtx trunc_y, last_insn;
3573
3574 /* Skip if the target can't extend this way. */
3575 ic = can_extend_p (dstmode, srcmode, 0);
3576 if (ic == CODE_FOR_nothing)
3577 continue;
3578
3579 /* Skip if the narrowed value isn't exact. */
3580 if (! exact_real_truncate (srcmode, &r))
3581 continue;
3582
3583 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3584
3585 if (targetm.legitimate_constant_p (srcmode, trunc_y))
3586 {
3587 /* Skip if the target needs extra instructions to perform
3588 the extension. */
3589 if (!insn_operand_matches (ic, 1, trunc_y))
3590 continue;
3591 /* This is valid, but may not be cheaper than the original. */
3592 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3593 speed);
3594 if (oldcost < newcost)
3595 continue;
3596 }
3597 else if (float_extend_from_mem[dstmode][srcmode])
3598 {
3599 trunc_y = force_const_mem (srcmode, trunc_y);
3600 /* This is valid, but may not be cheaper than the original. */
3601 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3602 speed);
3603 if (oldcost < newcost)
3604 continue;
3605 trunc_y = validize_mem (trunc_y);
3606 }
3607 else
3608 continue;
3609
3610 /* For CSE's benefit, force the compressed constant pool entry
3611 into a new pseudo. This constant may be used in different modes,
3612 and if not, combine will put things back together for us. */
3613 trunc_y = force_reg (srcmode, trunc_y);
3614
3615 /* If x is a hard register, perform the extension into a pseudo,
3616 so that e.g. stack realignment code is aware of it. */
3617 rtx target = x;
3618 if (REG_P (x) && HARD_REGISTER_P (x))
3619 target = gen_reg_rtx (dstmode);
3620
3621 emit_unop_insn (ic, target, trunc_y, UNKNOWN);
3622 last_insn = get_last_insn ();
3623
3624 if (REG_P (target))
3625 set_unique_reg_note (last_insn, REG_EQUAL, y);
3626
3627 if (target != x)
3628 return emit_move_insn (x, target);
3629 return last_insn;
3630 }
3631
3632 return NULL_RTX;
3633 }
3634
3635 /* Pushing data onto the stack. */
3636
3637 /* Push a block of length SIZE (perhaps variable)
3638 and return an rtx to address the beginning of the block.
3639 The value may be virtual_outgoing_args_rtx.
3640
3641 EXTRA is the number of bytes of padding to push in addition to SIZE.
3642 BELOW nonzero means this padding comes at low addresses;
3643 otherwise, the padding comes at high addresses. */
3644
3645 rtx
push_block(rtx size,int extra,int below)3646 push_block (rtx size, int extra, int below)
3647 {
3648 rtx temp;
3649
3650 size = convert_modes (Pmode, ptr_mode, size, 1);
3651 if (CONSTANT_P (size))
3652 anti_adjust_stack (plus_constant (Pmode, size, extra));
3653 else if (REG_P (size) && extra == 0)
3654 anti_adjust_stack (size);
3655 else
3656 {
3657 temp = copy_to_mode_reg (Pmode, size);
3658 if (extra != 0)
3659 temp = expand_binop (Pmode, add_optab, temp, GEN_INT (extra),
3660 temp, 0, OPTAB_LIB_WIDEN);
3661 anti_adjust_stack (temp);
3662 }
3663
3664 #ifndef STACK_GROWS_DOWNWARD
3665 if (0)
3666 #else
3667 if (1)
3668 #endif
3669 {
3670 temp = virtual_outgoing_args_rtx;
3671 if (extra != 0 && below)
3672 temp = plus_constant (Pmode, temp, extra);
3673 }
3674 else
3675 {
3676 if (CONST_INT_P (size))
3677 temp = plus_constant (Pmode, virtual_outgoing_args_rtx,
3678 -INTVAL (size) - (below ? 0 : extra));
3679 else if (extra != 0 && !below)
3680 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3681 negate_rtx (Pmode, plus_constant (Pmode, size,
3682 extra)));
3683 else
3684 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3685 negate_rtx (Pmode, size));
3686 }
3687
3688 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3689 }
3690
3691 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3692
3693 static rtx
mem_autoinc_base(rtx mem)3694 mem_autoinc_base (rtx mem)
3695 {
3696 if (MEM_P (mem))
3697 {
3698 rtx addr = XEXP (mem, 0);
3699 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
3700 return XEXP (addr, 0);
3701 }
3702 return NULL;
3703 }
3704
3705 /* A utility routine used here, in reload, and in try_split. The insns
3706 after PREV up to and including LAST are known to adjust the stack,
3707 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3708 placing notes as appropriate. PREV may be NULL, indicating the
3709 entire insn sequence prior to LAST should be scanned.
3710
3711 The set of allowed stack pointer modifications is small:
3712 (1) One or more auto-inc style memory references (aka pushes),
3713 (2) One or more addition/subtraction with the SP as destination,
3714 (3) A single move insn with the SP as destination,
3715 (4) A call_pop insn,
3716 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3717
3718 Insns in the sequence that do not modify the SP are ignored,
3719 except for noreturn calls.
3720
3721 The return value is the amount of adjustment that can be trivially
3722 verified, via immediate operand or auto-inc. If the adjustment
3723 cannot be trivially extracted, the return value is INT_MIN. */
3724
3725 HOST_WIDE_INT
find_args_size_adjust(rtx insn)3726 find_args_size_adjust (rtx insn)
3727 {
3728 rtx dest, set, pat;
3729 int i;
3730
3731 pat = PATTERN (insn);
3732 set = NULL;
3733
3734 /* Look for a call_pop pattern. */
3735 if (CALL_P (insn))
3736 {
3737 /* We have to allow non-call_pop patterns for the case
3738 of emit_single_push_insn of a TLS address. */
3739 if (GET_CODE (pat) != PARALLEL)
3740 return 0;
3741
3742 /* All call_pop have a stack pointer adjust in the parallel.
3743 The call itself is always first, and the stack adjust is
3744 usually last, so search from the end. */
3745 for (i = XVECLEN (pat, 0) - 1; i > 0; --i)
3746 {
3747 set = XVECEXP (pat, 0, i);
3748 if (GET_CODE (set) != SET)
3749 continue;
3750 dest = SET_DEST (set);
3751 if (dest == stack_pointer_rtx)
3752 break;
3753 }
3754 /* We'd better have found the stack pointer adjust. */
3755 if (i == 0)
3756 return 0;
3757 /* Fall through to process the extracted SET and DEST
3758 as if it was a standalone insn. */
3759 }
3760 else if (GET_CODE (pat) == SET)
3761 set = pat;
3762 else if ((set = single_set (insn)) != NULL)
3763 ;
3764 else if (GET_CODE (pat) == PARALLEL)
3765 {
3766 /* ??? Some older ports use a parallel with a stack adjust
3767 and a store for a PUSH_ROUNDING pattern, rather than a
3768 PRE/POST_MODIFY rtx. Don't force them to update yet... */
3769 /* ??? See h8300 and m68k, pushqi1. */
3770 for (i = XVECLEN (pat, 0) - 1; i >= 0; --i)
3771 {
3772 set = XVECEXP (pat, 0, i);
3773 if (GET_CODE (set) != SET)
3774 continue;
3775 dest = SET_DEST (set);
3776 if (dest == stack_pointer_rtx)
3777 break;
3778
3779 /* We do not expect an auto-inc of the sp in the parallel. */
3780 gcc_checking_assert (mem_autoinc_base (dest) != stack_pointer_rtx);
3781 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3782 != stack_pointer_rtx);
3783 }
3784 if (i < 0)
3785 return 0;
3786 }
3787 else
3788 return 0;
3789
3790 dest = SET_DEST (set);
3791
3792 /* Look for direct modifications of the stack pointer. */
3793 if (REG_P (dest) && REGNO (dest) == STACK_POINTER_REGNUM)
3794 {
3795 /* Look for a trivial adjustment, otherwise assume nothing. */
3796 /* Note that the SPU restore_stack_block pattern refers to
3797 the stack pointer in V4SImode. Consider that non-trivial. */
3798 if (SCALAR_INT_MODE_P (GET_MODE (dest))
3799 && GET_CODE (SET_SRC (set)) == PLUS
3800 && XEXP (SET_SRC (set), 0) == stack_pointer_rtx
3801 && CONST_INT_P (XEXP (SET_SRC (set), 1)))
3802 return INTVAL (XEXP (SET_SRC (set), 1));
3803 /* ??? Reload can generate no-op moves, which will be cleaned
3804 up later. Recognize it and continue searching. */
3805 else if (rtx_equal_p (dest, SET_SRC (set)))
3806 return 0;
3807 else
3808 return HOST_WIDE_INT_MIN;
3809 }
3810 else
3811 {
3812 rtx mem, addr;
3813
3814 /* Otherwise only think about autoinc patterns. */
3815 if (mem_autoinc_base (dest) == stack_pointer_rtx)
3816 {
3817 mem = dest;
3818 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3819 != stack_pointer_rtx);
3820 }
3821 else if (mem_autoinc_base (SET_SRC (set)) == stack_pointer_rtx)
3822 mem = SET_SRC (set);
3823 else
3824 return 0;
3825
3826 addr = XEXP (mem, 0);
3827 switch (GET_CODE (addr))
3828 {
3829 case PRE_INC:
3830 case POST_INC:
3831 return GET_MODE_SIZE (GET_MODE (mem));
3832 case PRE_DEC:
3833 case POST_DEC:
3834 return -GET_MODE_SIZE (GET_MODE (mem));
3835 case PRE_MODIFY:
3836 case POST_MODIFY:
3837 addr = XEXP (addr, 1);
3838 gcc_assert (GET_CODE (addr) == PLUS);
3839 gcc_assert (XEXP (addr, 0) == stack_pointer_rtx);
3840 gcc_assert (CONST_INT_P (XEXP (addr, 1)));
3841 return INTVAL (XEXP (addr, 1));
3842 default:
3843 gcc_unreachable ();
3844 }
3845 }
3846 }
3847
3848 int
fixup_args_size_notes(rtx prev,rtx last,int end_args_size)3849 fixup_args_size_notes (rtx prev, rtx last, int end_args_size)
3850 {
3851 int args_size = end_args_size;
3852 bool saw_unknown = false;
3853 rtx insn;
3854
3855 for (insn = last; insn != prev; insn = PREV_INSN (insn))
3856 {
3857 HOST_WIDE_INT this_delta;
3858
3859 if (!NONDEBUG_INSN_P (insn))
3860 continue;
3861
3862 this_delta = find_args_size_adjust (insn);
3863 if (this_delta == 0)
3864 {
3865 if (!CALL_P (insn)
3866 || ACCUMULATE_OUTGOING_ARGS
3867 || find_reg_note (insn, REG_NORETURN, NULL_RTX) == NULL_RTX)
3868 continue;
3869 }
3870
3871 gcc_assert (!saw_unknown);
3872 if (this_delta == HOST_WIDE_INT_MIN)
3873 saw_unknown = true;
3874
3875 add_reg_note (insn, REG_ARGS_SIZE, GEN_INT (args_size));
3876 #ifdef STACK_GROWS_DOWNWARD
3877 this_delta = -(unsigned HOST_WIDE_INT) this_delta;
3878 #endif
3879 args_size -= this_delta;
3880 }
3881
3882 return saw_unknown ? INT_MIN : args_size;
3883 }
3884
3885 #ifdef PUSH_ROUNDING
3886 /* Emit single push insn. */
3887
3888 static void
emit_single_push_insn_1(enum machine_mode mode,rtx x,tree type)3889 emit_single_push_insn_1 (enum machine_mode mode, rtx x, tree type)
3890 {
3891 rtx dest_addr;
3892 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
3893 rtx dest;
3894 enum insn_code icode;
3895
3896 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
3897 /* If there is push pattern, use it. Otherwise try old way of throwing
3898 MEM representing push operation to move expander. */
3899 icode = optab_handler (push_optab, mode);
3900 if (icode != CODE_FOR_nothing)
3901 {
3902 struct expand_operand ops[1];
3903
3904 create_input_operand (&ops[0], x, mode);
3905 if (maybe_expand_insn (icode, 1, ops))
3906 return;
3907 }
3908 if (GET_MODE_SIZE (mode) == rounded_size)
3909 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
3910 /* If we are to pad downward, adjust the stack pointer first and
3911 then store X into the stack location using an offset. This is
3912 because emit_move_insn does not know how to pad; it does not have
3913 access to type. */
3914 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
3915 {
3916 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
3917 HOST_WIDE_INT offset;
3918
3919 emit_move_insn (stack_pointer_rtx,
3920 expand_binop (Pmode,
3921 #ifdef STACK_GROWS_DOWNWARD
3922 sub_optab,
3923 #else
3924 add_optab,
3925 #endif
3926 stack_pointer_rtx,
3927 GEN_INT (rounded_size),
3928 NULL_RTX, 0, OPTAB_LIB_WIDEN));
3929
3930 offset = (HOST_WIDE_INT) padding_size;
3931 #ifdef STACK_GROWS_DOWNWARD
3932 if (STACK_PUSH_CODE == POST_DEC)
3933 /* We have already decremented the stack pointer, so get the
3934 previous value. */
3935 offset += (HOST_WIDE_INT) rounded_size;
3936 #else
3937 if (STACK_PUSH_CODE == POST_INC)
3938 /* We have already incremented the stack pointer, so get the
3939 previous value. */
3940 offset -= (HOST_WIDE_INT) rounded_size;
3941 #endif
3942 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset));
3943 }
3944 else
3945 {
3946 #ifdef STACK_GROWS_DOWNWARD
3947 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
3948 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3949 GEN_INT (-(HOST_WIDE_INT) rounded_size));
3950 #else
3951 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
3952 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3953 GEN_INT (rounded_size));
3954 #endif
3955 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
3956 }
3957
3958 dest = gen_rtx_MEM (mode, dest_addr);
3959
3960 if (type != 0)
3961 {
3962 set_mem_attributes (dest, type, 1);
3963
3964 if (flag_optimize_sibling_calls)
3965 /* Function incoming arguments may overlap with sibling call
3966 outgoing arguments and we cannot allow reordering of reads
3967 from function arguments with stores to outgoing arguments
3968 of sibling calls. */
3969 set_mem_alias_set (dest, 0);
3970 }
3971 emit_move_insn (dest, x);
3972 }
3973
3974 /* Emit and annotate a single push insn. */
3975
3976 static void
emit_single_push_insn(enum machine_mode mode,rtx x,tree type)3977 emit_single_push_insn (enum machine_mode mode, rtx x, tree type)
3978 {
3979 int delta, old_delta = stack_pointer_delta;
3980 rtx prev = get_last_insn ();
3981 rtx last;
3982
3983 emit_single_push_insn_1 (mode, x, type);
3984
3985 last = get_last_insn ();
3986
3987 /* Notice the common case where we emitted exactly one insn. */
3988 if (PREV_INSN (last) == prev)
3989 {
3990 add_reg_note (last, REG_ARGS_SIZE, GEN_INT (stack_pointer_delta));
3991 return;
3992 }
3993
3994 delta = fixup_args_size_notes (prev, last, stack_pointer_delta);
3995 gcc_assert (delta == INT_MIN || delta == old_delta);
3996 }
3997 #endif
3998
3999 /* Generate code to push X onto the stack, assuming it has mode MODE and
4000 type TYPE.
4001 MODE is redundant except when X is a CONST_INT (since they don't
4002 carry mode info).
4003 SIZE is an rtx for the size of data to be copied (in bytes),
4004 needed only if X is BLKmode.
4005
4006 ALIGN (in bits) is maximum alignment we can assume.
4007
4008 If PARTIAL and REG are both nonzero, then copy that many of the first
4009 bytes of X into registers starting with REG, and push the rest of X.
4010 The amount of space pushed is decreased by PARTIAL bytes.
4011 REG must be a hard register in this case.
4012 If REG is zero but PARTIAL is not, take any all others actions for an
4013 argument partially in registers, but do not actually load any
4014 registers.
4015
4016 EXTRA is the amount in bytes of extra space to leave next to this arg.
4017 This is ignored if an argument block has already been allocated.
4018
4019 On a machine that lacks real push insns, ARGS_ADDR is the address of
4020 the bottom of the argument block for this call. We use indexing off there
4021 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4022 argument block has not been preallocated.
4023
4024 ARGS_SO_FAR is the size of args previously pushed for this call.
4025
4026 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4027 for arguments passed in registers. If nonzero, it will be the number
4028 of bytes required. */
4029
4030 void
emit_push_insn(rtx x,enum machine_mode mode,tree type,rtx size,unsigned int align,int partial,rtx reg,int extra,rtx args_addr,rtx args_so_far,int reg_parm_stack_space,rtx alignment_pad)4031 emit_push_insn (rtx x, enum machine_mode mode, tree type, rtx size,
4032 unsigned int align, int partial, rtx reg, int extra,
4033 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
4034 rtx alignment_pad)
4035 {
4036 rtx xinner;
4037 enum direction stack_direction
4038 #ifdef STACK_GROWS_DOWNWARD
4039 = downward;
4040 #else
4041 = upward;
4042 #endif
4043
4044 /* Decide where to pad the argument: `downward' for below,
4045 `upward' for above, or `none' for don't pad it.
4046 Default is below for small data on big-endian machines; else above. */
4047 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
4048
4049 /* Invert direction if stack is post-decrement.
4050 FIXME: why? */
4051 if (STACK_PUSH_CODE == POST_DEC)
4052 if (where_pad != none)
4053 where_pad = (where_pad == downward ? upward : downward);
4054
4055 xinner = x;
4056
4057 if (mode == BLKmode
4058 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
4059 {
4060 /* Copy a block into the stack, entirely or partially. */
4061
4062 rtx temp;
4063 int used;
4064 int offset;
4065 int skip;
4066
4067 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4068 used = partial - offset;
4069
4070 if (mode != BLKmode)
4071 {
4072 /* A value is to be stored in an insufficiently aligned
4073 stack slot; copy via a suitably aligned slot if
4074 necessary. */
4075 size = GEN_INT (GET_MODE_SIZE (mode));
4076 if (!MEM_P (xinner))
4077 {
4078 temp = assign_temp (type, 1, 1);
4079 emit_move_insn (temp, xinner);
4080 xinner = temp;
4081 }
4082 }
4083
4084 gcc_assert (size);
4085
4086 /* USED is now the # of bytes we need not copy to the stack
4087 because registers will take care of them. */
4088
4089 if (partial != 0)
4090 xinner = adjust_address (xinner, BLKmode, used);
4091
4092 /* If the partial register-part of the arg counts in its stack size,
4093 skip the part of stack space corresponding to the registers.
4094 Otherwise, start copying to the beginning of the stack space,
4095 by setting SKIP to 0. */
4096 skip = (reg_parm_stack_space == 0) ? 0 : used;
4097
4098 #ifdef PUSH_ROUNDING
4099 /* Do it with several push insns if that doesn't take lots of insns
4100 and if there is no difficulty with push insns that skip bytes
4101 on the stack for alignment purposes. */
4102 if (args_addr == 0
4103 && PUSH_ARGS
4104 && CONST_INT_P (size)
4105 && skip == 0
4106 && MEM_ALIGN (xinner) >= align
4107 && (MOVE_BY_PIECES_P ((unsigned) INTVAL (size) - used, align))
4108 /* Here we avoid the case of a structure whose weak alignment
4109 forces many pushes of a small amount of data,
4110 and such small pushes do rounding that causes trouble. */
4111 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
4112 || align >= BIGGEST_ALIGNMENT
4113 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
4114 == (align / BITS_PER_UNIT)))
4115 && (HOST_WIDE_INT) PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
4116 {
4117 /* Push padding now if padding above and stack grows down,
4118 or if padding below and stack grows up.
4119 But if space already allocated, this has already been done. */
4120 if (extra && args_addr == 0
4121 && where_pad != none && where_pad != stack_direction)
4122 anti_adjust_stack (GEN_INT (extra));
4123
4124 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
4125 }
4126 else
4127 #endif /* PUSH_ROUNDING */
4128 {
4129 rtx target;
4130
4131 /* Otherwise make space on the stack and copy the data
4132 to the address of that space. */
4133
4134 /* Deduct words put into registers from the size we must copy. */
4135 if (partial != 0)
4136 {
4137 if (CONST_INT_P (size))
4138 size = GEN_INT (INTVAL (size) - used);
4139 else
4140 size = expand_binop (GET_MODE (size), sub_optab, size,
4141 GEN_INT (used), NULL_RTX, 0,
4142 OPTAB_LIB_WIDEN);
4143 }
4144
4145 /* Get the address of the stack space.
4146 In this case, we do not deal with EXTRA separately.
4147 A single stack adjust will do. */
4148 if (! args_addr)
4149 {
4150 temp = push_block (size, extra, where_pad == downward);
4151 extra = 0;
4152 }
4153 else if (CONST_INT_P (args_so_far))
4154 temp = memory_address (BLKmode,
4155 plus_constant (Pmode, args_addr,
4156 skip + INTVAL (args_so_far)));
4157 else
4158 temp = memory_address (BLKmode,
4159 plus_constant (Pmode,
4160 gen_rtx_PLUS (Pmode,
4161 args_addr,
4162 args_so_far),
4163 skip));
4164
4165 if (!ACCUMULATE_OUTGOING_ARGS)
4166 {
4167 /* If the source is referenced relative to the stack pointer,
4168 copy it to another register to stabilize it. We do not need
4169 to do this if we know that we won't be changing sp. */
4170
4171 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
4172 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
4173 temp = copy_to_reg (temp);
4174 }
4175
4176 target = gen_rtx_MEM (BLKmode, temp);
4177
4178 /* We do *not* set_mem_attributes here, because incoming arguments
4179 may overlap with sibling call outgoing arguments and we cannot
4180 allow reordering of reads from function arguments with stores
4181 to outgoing arguments of sibling calls. We do, however, want
4182 to record the alignment of the stack slot. */
4183 /* ALIGN may well be better aligned than TYPE, e.g. due to
4184 PARM_BOUNDARY. Assume the caller isn't lying. */
4185 set_mem_align (target, align);
4186
4187 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
4188 }
4189 }
4190 else if (partial > 0)
4191 {
4192 /* Scalar partly in registers. */
4193
4194 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
4195 int i;
4196 int not_stack;
4197 /* # bytes of start of argument
4198 that we must make space for but need not store. */
4199 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4200 int args_offset = INTVAL (args_so_far);
4201 int skip;
4202
4203 /* Push padding now if padding above and stack grows down,
4204 or if padding below and stack grows up.
4205 But if space already allocated, this has already been done. */
4206 if (extra && args_addr == 0
4207 && where_pad != none && where_pad != stack_direction)
4208 anti_adjust_stack (GEN_INT (extra));
4209
4210 /* If we make space by pushing it, we might as well push
4211 the real data. Otherwise, we can leave OFFSET nonzero
4212 and leave the space uninitialized. */
4213 if (args_addr == 0)
4214 offset = 0;
4215
4216 /* Now NOT_STACK gets the number of words that we don't need to
4217 allocate on the stack. Convert OFFSET to words too. */
4218 not_stack = (partial - offset) / UNITS_PER_WORD;
4219 offset /= UNITS_PER_WORD;
4220
4221 /* If the partial register-part of the arg counts in its stack size,
4222 skip the part of stack space corresponding to the registers.
4223 Otherwise, start copying to the beginning of the stack space,
4224 by setting SKIP to 0. */
4225 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
4226
4227 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
4228 x = validize_mem (force_const_mem (mode, x));
4229
4230 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4231 SUBREGs of such registers are not allowed. */
4232 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
4233 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
4234 x = copy_to_reg (x);
4235
4236 /* Loop over all the words allocated on the stack for this arg. */
4237 /* We can do it by words, because any scalar bigger than a word
4238 has a size a multiple of a word. */
4239 #ifndef PUSH_ARGS_REVERSED
4240 for (i = not_stack; i < size; i++)
4241 #else
4242 for (i = size - 1; i >= not_stack; i--)
4243 #endif
4244 if (i >= not_stack + offset)
4245 emit_push_insn (operand_subword_force (x, i, mode),
4246 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
4247 0, args_addr,
4248 GEN_INT (args_offset + ((i - not_stack + skip)
4249 * UNITS_PER_WORD)),
4250 reg_parm_stack_space, alignment_pad);
4251 }
4252 else
4253 {
4254 rtx addr;
4255 rtx dest;
4256
4257 /* Push padding now if padding above and stack grows down,
4258 or if padding below and stack grows up.
4259 But if space already allocated, this has already been done. */
4260 if (extra && args_addr == 0
4261 && where_pad != none && where_pad != stack_direction)
4262 anti_adjust_stack (GEN_INT (extra));
4263
4264 #ifdef PUSH_ROUNDING
4265 if (args_addr == 0 && PUSH_ARGS)
4266 emit_single_push_insn (mode, x, type);
4267 else
4268 #endif
4269 {
4270 if (CONST_INT_P (args_so_far))
4271 addr
4272 = memory_address (mode,
4273 plus_constant (Pmode, args_addr,
4274 INTVAL (args_so_far)));
4275 else
4276 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
4277 args_so_far));
4278 dest = gen_rtx_MEM (mode, addr);
4279
4280 /* We do *not* set_mem_attributes here, because incoming arguments
4281 may overlap with sibling call outgoing arguments and we cannot
4282 allow reordering of reads from function arguments with stores
4283 to outgoing arguments of sibling calls. We do, however, want
4284 to record the alignment of the stack slot. */
4285 /* ALIGN may well be better aligned than TYPE, e.g. due to
4286 PARM_BOUNDARY. Assume the caller isn't lying. */
4287 set_mem_align (dest, align);
4288
4289 emit_move_insn (dest, x);
4290 }
4291 }
4292
4293 /* If part should go in registers, copy that part
4294 into the appropriate registers. Do this now, at the end,
4295 since mem-to-mem copies above may do function calls. */
4296 if (partial > 0 && reg != 0)
4297 {
4298 /* Handle calls that pass values in multiple non-contiguous locations.
4299 The Irix 6 ABI has examples of this. */
4300 if (GET_CODE (reg) == PARALLEL)
4301 emit_group_load (reg, x, type, -1);
4302 else
4303 {
4304 gcc_assert (partial % UNITS_PER_WORD == 0);
4305 move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode);
4306 }
4307 }
4308
4309 if (extra && args_addr == 0 && where_pad == stack_direction)
4310 anti_adjust_stack (GEN_INT (extra));
4311
4312 if (alignment_pad && args_addr == 0)
4313 anti_adjust_stack (alignment_pad);
4314 }
4315
4316 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4317 operations. */
4318
4319 static rtx
get_subtarget(rtx x)4320 get_subtarget (rtx x)
4321 {
4322 return (optimize
4323 || x == 0
4324 /* Only registers can be subtargets. */
4325 || !REG_P (x)
4326 /* Don't use hard regs to avoid extending their life. */
4327 || REGNO (x) < FIRST_PSEUDO_REGISTER
4328 ? 0 : x);
4329 }
4330
4331 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4332 FIELD is a bitfield. Returns true if the optimization was successful,
4333 and there's nothing else to do. */
4334
4335 static bool
optimize_bitfield_assignment_op(unsigned HOST_WIDE_INT bitsize,unsigned HOST_WIDE_INT bitpos,unsigned HOST_WIDE_INT bitregion_start,unsigned HOST_WIDE_INT bitregion_end,enum machine_mode mode1,rtx str_rtx,tree to,tree src)4336 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
4337 unsigned HOST_WIDE_INT bitpos,
4338 unsigned HOST_WIDE_INT bitregion_start,
4339 unsigned HOST_WIDE_INT bitregion_end,
4340 enum machine_mode mode1, rtx str_rtx,
4341 tree to, tree src)
4342 {
4343 enum machine_mode str_mode = GET_MODE (str_rtx);
4344 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
4345 tree op0, op1;
4346 rtx value, result;
4347 optab binop;
4348 gimple srcstmt;
4349 enum tree_code code;
4350
4351 if (mode1 != VOIDmode
4352 || bitsize >= BITS_PER_WORD
4353 || str_bitsize > BITS_PER_WORD
4354 || TREE_SIDE_EFFECTS (to)
4355 || TREE_THIS_VOLATILE (to))
4356 return false;
4357
4358 STRIP_NOPS (src);
4359 if (TREE_CODE (src) != SSA_NAME)
4360 return false;
4361 if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
4362 return false;
4363
4364 srcstmt = get_gimple_for_ssa_name (src);
4365 if (!srcstmt
4366 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary)
4367 return false;
4368
4369 code = gimple_assign_rhs_code (srcstmt);
4370
4371 op0 = gimple_assign_rhs1 (srcstmt);
4372
4373 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4374 to find its initialization. Hopefully the initialization will
4375 be from a bitfield load. */
4376 if (TREE_CODE (op0) == SSA_NAME)
4377 {
4378 gimple op0stmt = get_gimple_for_ssa_name (op0);
4379
4380 /* We want to eventually have OP0 be the same as TO, which
4381 should be a bitfield. */
4382 if (!op0stmt
4383 || !is_gimple_assign (op0stmt)
4384 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to))
4385 return false;
4386 op0 = gimple_assign_rhs1 (op0stmt);
4387 }
4388
4389 op1 = gimple_assign_rhs2 (srcstmt);
4390
4391 if (!operand_equal_p (to, op0, 0))
4392 return false;
4393
4394 if (MEM_P (str_rtx))
4395 {
4396 unsigned HOST_WIDE_INT offset1;
4397
4398 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4399 str_mode = word_mode;
4400 str_mode = get_best_mode (bitsize, bitpos,
4401 bitregion_start, bitregion_end,
4402 MEM_ALIGN (str_rtx), str_mode, 0);
4403 if (str_mode == VOIDmode)
4404 return false;
4405 str_bitsize = GET_MODE_BITSIZE (str_mode);
4406
4407 offset1 = bitpos;
4408 bitpos %= str_bitsize;
4409 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4410 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4411 }
4412 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4413 return false;
4414
4415 /* If the bit field covers the whole REG/MEM, store_field
4416 will likely generate better code. */
4417 if (bitsize >= str_bitsize)
4418 return false;
4419
4420 /* We can't handle fields split across multiple entities. */
4421 if (bitpos + bitsize > str_bitsize)
4422 return false;
4423
4424 if (BYTES_BIG_ENDIAN)
4425 bitpos = str_bitsize - bitpos - bitsize;
4426
4427 switch (code)
4428 {
4429 case PLUS_EXPR:
4430 case MINUS_EXPR:
4431 /* For now, just optimize the case of the topmost bitfield
4432 where we don't need to do any masking and also
4433 1 bit bitfields where xor can be used.
4434 We might win by one instruction for the other bitfields
4435 too if insv/extv instructions aren't used, so that
4436 can be added later. */
4437 if (bitpos + bitsize != str_bitsize
4438 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4439 break;
4440
4441 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4442 value = convert_modes (str_mode,
4443 TYPE_MODE (TREE_TYPE (op1)), value,
4444 TYPE_UNSIGNED (TREE_TYPE (op1)));
4445
4446 /* We may be accessing data outside the field, which means
4447 we can alias adjacent data. */
4448 if (MEM_P (str_rtx))
4449 {
4450 str_rtx = shallow_copy_rtx (str_rtx);
4451 set_mem_alias_set (str_rtx, 0);
4452 set_mem_expr (str_rtx, 0);
4453 }
4454
4455 binop = code == PLUS_EXPR ? add_optab : sub_optab;
4456 if (bitsize == 1 && bitpos + bitsize != str_bitsize)
4457 {
4458 value = expand_and (str_mode, value, const1_rtx, NULL);
4459 binop = xor_optab;
4460 }
4461 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4462 result = expand_binop (str_mode, binop, str_rtx,
4463 value, str_rtx, 1, OPTAB_WIDEN);
4464 if (result != str_rtx)
4465 emit_move_insn (str_rtx, result);
4466 return true;
4467
4468 case BIT_IOR_EXPR:
4469 case BIT_XOR_EXPR:
4470 if (TREE_CODE (op1) != INTEGER_CST)
4471 break;
4472 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4473 value = convert_modes (str_mode,
4474 TYPE_MODE (TREE_TYPE (op1)), value,
4475 TYPE_UNSIGNED (TREE_TYPE (op1)));
4476
4477 /* We may be accessing data outside the field, which means
4478 we can alias adjacent data. */
4479 if (MEM_P (str_rtx))
4480 {
4481 str_rtx = shallow_copy_rtx (str_rtx);
4482 set_mem_alias_set (str_rtx, 0);
4483 set_mem_expr (str_rtx, 0);
4484 }
4485
4486 binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab;
4487 if (bitpos + bitsize != str_bitsize)
4488 {
4489 rtx mask = GEN_INT (((unsigned HOST_WIDE_INT) 1 << bitsize) - 1);
4490 value = expand_and (str_mode, value, mask, NULL_RTX);
4491 }
4492 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4493 result = expand_binop (str_mode, binop, str_rtx,
4494 value, str_rtx, 1, OPTAB_WIDEN);
4495 if (result != str_rtx)
4496 emit_move_insn (str_rtx, result);
4497 return true;
4498
4499 default:
4500 break;
4501 }
4502
4503 return false;
4504 }
4505
4506 /* In the C++ memory model, consecutive bit fields in a structure are
4507 considered one memory location.
4508
4509 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4510 returns the bit range of consecutive bits in which this COMPONENT_REF
4511 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4512 and *OFFSET may be adjusted in the process.
4513
4514 If the access does not need to be restricted, 0 is returned in both
4515 *BITSTART and *BITEND. */
4516
4517 static void
get_bit_range(unsigned HOST_WIDE_INT * bitstart,unsigned HOST_WIDE_INT * bitend,tree exp,HOST_WIDE_INT * bitpos,tree * offset)4518 get_bit_range (unsigned HOST_WIDE_INT *bitstart,
4519 unsigned HOST_WIDE_INT *bitend,
4520 tree exp,
4521 HOST_WIDE_INT *bitpos,
4522 tree *offset)
4523 {
4524 HOST_WIDE_INT bitoffset;
4525 tree field, repr;
4526
4527 gcc_assert (TREE_CODE (exp) == COMPONENT_REF);
4528
4529 field = TREE_OPERAND (exp, 1);
4530 repr = DECL_BIT_FIELD_REPRESENTATIVE (field);
4531 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4532 need to limit the range we can access. */
4533 if (!repr)
4534 {
4535 *bitstart = *bitend = 0;
4536 return;
4537 }
4538
4539 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4540 part of a larger bit field, then the representative does not serve any
4541 useful purpose. This can occur in Ada. */
4542 if (handled_component_p (TREE_OPERAND (exp, 0)))
4543 {
4544 enum machine_mode rmode;
4545 HOST_WIDE_INT rbitsize, rbitpos;
4546 tree roffset;
4547 int unsignedp;
4548 int volatilep = 0;
4549 get_inner_reference (TREE_OPERAND (exp, 0), &rbitsize, &rbitpos,
4550 &roffset, &rmode, &unsignedp, &volatilep, false);
4551 if ((rbitpos % BITS_PER_UNIT) != 0)
4552 {
4553 *bitstart = *bitend = 0;
4554 return;
4555 }
4556 }
4557
4558 /* Compute the adjustment to bitpos from the offset of the field
4559 relative to the representative. DECL_FIELD_OFFSET of field and
4560 repr are the same by construction if they are not constants,
4561 see finish_bitfield_layout. */
4562 if (host_integerp (DECL_FIELD_OFFSET (field), 1)
4563 && host_integerp (DECL_FIELD_OFFSET (repr), 1))
4564 bitoffset = (tree_low_cst (DECL_FIELD_OFFSET (field), 1)
4565 - tree_low_cst (DECL_FIELD_OFFSET (repr), 1)) * BITS_PER_UNIT;
4566 else
4567 bitoffset = 0;
4568 bitoffset += (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
4569 - tree_low_cst (DECL_FIELD_BIT_OFFSET (repr), 1));
4570
4571 /* If the adjustment is larger than bitpos, we would have a negative bit
4572 position for the lower bound and this may wreak havoc later. Adjust
4573 offset and bitpos to make the lower bound non-negative in that case. */
4574 if (bitoffset > *bitpos)
4575 {
4576 HOST_WIDE_INT adjust = bitoffset - *bitpos;
4577 gcc_assert ((adjust % BITS_PER_UNIT) == 0);
4578
4579 *bitpos += adjust;
4580 if (*offset == NULL_TREE)
4581 *offset = size_int (-adjust / BITS_PER_UNIT);
4582 else
4583 *offset
4584 = size_binop (MINUS_EXPR, *offset, size_int (adjust / BITS_PER_UNIT));
4585 *bitstart = 0;
4586 }
4587 else
4588 *bitstart = *bitpos - bitoffset;
4589
4590 *bitend = *bitstart + tree_low_cst (DECL_SIZE (repr), 1) - 1;
4591 }
4592
4593 /* Returns true if ADDR is an ADDR_EXPR of a DECL that does not reside
4594 in memory and has non-BLKmode. DECL_RTL must not be a MEM; if
4595 DECL_RTL was not set yet, return NORTL. */
4596
4597 static inline bool
addr_expr_of_non_mem_decl_p_1(tree addr,bool nortl)4598 addr_expr_of_non_mem_decl_p_1 (tree addr, bool nortl)
4599 {
4600 if (TREE_CODE (addr) != ADDR_EXPR)
4601 return false;
4602
4603 tree base = TREE_OPERAND (addr, 0);
4604
4605 if (!DECL_P (base)
4606 || TREE_ADDRESSABLE (base)
4607 || DECL_MODE (base) == BLKmode)
4608 return false;
4609
4610 if (!DECL_RTL_SET_P (base))
4611 return nortl;
4612
4613 return (!MEM_P (DECL_RTL (base)));
4614 }
4615
4616 /* Returns true if the MEM_REF REF refers to an object that does not
4617 reside in memory and has non-BLKmode. */
4618
4619 static inline bool
mem_ref_refers_to_non_mem_p(tree ref)4620 mem_ref_refers_to_non_mem_p (tree ref)
4621 {
4622 tree base = TREE_OPERAND (ref, 0);
4623 return addr_expr_of_non_mem_decl_p_1 (base, false);
4624 }
4625
4626 /* Return TRUE iff OP is an ADDR_EXPR of a DECL that's not
4627 addressable. This is very much like mem_ref_refers_to_non_mem_p,
4628 but instead of the MEM_REF, it takes its base, and it doesn't
4629 assume a DECL is in memory just because its RTL is not set yet. */
4630
4631 bool
addr_expr_of_non_mem_decl_p(tree op)4632 addr_expr_of_non_mem_decl_p (tree op)
4633 {
4634 return addr_expr_of_non_mem_decl_p_1 (op, true);
4635 }
4636
4637 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4638 is true, try generating a nontemporal store. */
4639
4640 void
expand_assignment(tree to,tree from,bool nontemporal)4641 expand_assignment (tree to, tree from, bool nontemporal)
4642 {
4643 rtx to_rtx = 0;
4644 rtx result;
4645 enum machine_mode mode;
4646 unsigned int align;
4647 enum insn_code icode;
4648
4649 /* Don't crash if the lhs of the assignment was erroneous. */
4650 if (TREE_CODE (to) == ERROR_MARK)
4651 {
4652 expand_normal (from);
4653 return;
4654 }
4655
4656 /* Optimize away no-op moves without side-effects. */
4657 if (operand_equal_p (to, from, 0))
4658 return;
4659
4660 /* Handle misaligned stores. */
4661 mode = TYPE_MODE (TREE_TYPE (to));
4662 if ((TREE_CODE (to) == MEM_REF
4663 || TREE_CODE (to) == TARGET_MEM_REF)
4664 && mode != BLKmode
4665 && !mem_ref_refers_to_non_mem_p (to)
4666 && ((align = get_object_alignment (to))
4667 < GET_MODE_ALIGNMENT (mode))
4668 && (((icode = optab_handler (movmisalign_optab, mode))
4669 != CODE_FOR_nothing)
4670 || SLOW_UNALIGNED_ACCESS (mode, align)))
4671 {
4672 rtx reg, mem;
4673
4674 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4675 reg = force_not_mem (reg);
4676 mem = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4677
4678 if (icode != CODE_FOR_nothing)
4679 {
4680 struct expand_operand ops[2];
4681
4682 create_fixed_operand (&ops[0], mem);
4683 create_input_operand (&ops[1], reg, mode);
4684 /* The movmisalign<mode> pattern cannot fail, else the assignment
4685 would silently be omitted. */
4686 expand_insn (icode, 2, ops);
4687 }
4688 else
4689 store_bit_field (mem, GET_MODE_BITSIZE (mode), 0, 0, 0, mode, reg);
4690 return;
4691 }
4692
4693 /* Assignment of a structure component needs special treatment
4694 if the structure component's rtx is not simply a MEM.
4695 Assignment of an array element at a constant index, and assignment of
4696 an array element in an unaligned packed structure field, has the same
4697 problem. Same for (partially) storing into a non-memory object. */
4698 if (handled_component_p (to)
4699 || (TREE_CODE (to) == MEM_REF
4700 && mem_ref_refers_to_non_mem_p (to))
4701 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
4702 {
4703 enum machine_mode mode1;
4704 HOST_WIDE_INT bitsize, bitpos;
4705 unsigned HOST_WIDE_INT bitregion_start = 0;
4706 unsigned HOST_WIDE_INT bitregion_end = 0;
4707 tree offset;
4708 int unsignedp;
4709 int volatilep = 0;
4710 tree tem;
4711
4712 push_temp_slots ();
4713 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
4714 &unsignedp, &volatilep, true);
4715
4716 /* Make sure bitpos is not negative, it can wreak havoc later. */
4717 if (bitpos < 0)
4718 {
4719 gcc_assert (offset == NULL_TREE);
4720 offset = size_int (bitpos >> (BITS_PER_UNIT == 8
4721 ? 3 : exact_log2 (BITS_PER_UNIT)));
4722 bitpos &= BITS_PER_UNIT - 1;
4723 }
4724
4725 if (TREE_CODE (to) == COMPONENT_REF
4726 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1)))
4727 get_bit_range (&bitregion_start, &bitregion_end, to, &bitpos, &offset);
4728
4729 to_rtx = expand_expr (tem, NULL_RTX, VOIDmode, EXPAND_WRITE);
4730
4731 /* If the bitfield is volatile, we want to access it in the
4732 field's mode, not the computed mode.
4733 If a MEM has VOIDmode (external with incomplete type),
4734 use BLKmode for it instead. */
4735 if (MEM_P (to_rtx))
4736 {
4737 if (volatilep && flag_strict_volatile_bitfields > 0)
4738 to_rtx = adjust_address (to_rtx, mode1, 0);
4739 else if (GET_MODE (to_rtx) == VOIDmode)
4740 to_rtx = adjust_address (to_rtx, BLKmode, 0);
4741 }
4742
4743 if (offset != 0)
4744 {
4745 enum machine_mode address_mode;
4746 rtx offset_rtx;
4747
4748 if (!MEM_P (to_rtx))
4749 {
4750 /* We can get constant negative offsets into arrays with broken
4751 user code. Translate this to a trap instead of ICEing. */
4752 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
4753 expand_builtin_trap ();
4754 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
4755 }
4756
4757 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
4758 address_mode = get_address_mode (to_rtx);
4759 if (GET_MODE (offset_rtx) != address_mode)
4760 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
4761
4762 /* A constant address in TO_RTX can have VOIDmode, we must not try
4763 to call force_reg for that case. Avoid that case. */
4764 if (MEM_P (to_rtx)
4765 && GET_MODE (to_rtx) == BLKmode
4766 && GET_MODE (XEXP (to_rtx, 0)) != VOIDmode
4767 && bitsize > 0
4768 && (bitpos % bitsize) == 0
4769 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
4770 && MEM_ALIGN (to_rtx) == GET_MODE_ALIGNMENT (mode1))
4771 {
4772 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
4773 bitpos = 0;
4774 }
4775
4776 to_rtx = offset_address (to_rtx, offset_rtx,
4777 highest_pow2_factor_for_target (to,
4778 offset));
4779 }
4780
4781 /* No action is needed if the target is not a memory and the field
4782 lies completely outside that target. This can occur if the source
4783 code contains an out-of-bounds access to a small array. */
4784 if (!MEM_P (to_rtx)
4785 && GET_MODE (to_rtx) != BLKmode
4786 && (unsigned HOST_WIDE_INT) bitpos
4787 >= GET_MODE_PRECISION (GET_MODE (to_rtx)))
4788 {
4789 expand_normal (from);
4790 result = NULL;
4791 }
4792 /* Handle expand_expr of a complex value returning a CONCAT. */
4793 else if (GET_CODE (to_rtx) == CONCAT)
4794 {
4795 unsigned short mode_bitsize = GET_MODE_BITSIZE (GET_MODE (to_rtx));
4796 if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from)))
4797 && bitpos == 0
4798 && bitsize == mode_bitsize)
4799 result = store_expr (from, to_rtx, false, nontemporal);
4800 else if (bitsize == mode_bitsize / 2
4801 && (bitpos == 0 || bitpos == mode_bitsize / 2))
4802 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false,
4803 nontemporal);
4804 else if (bitpos + bitsize <= mode_bitsize / 2)
4805 result = store_field (XEXP (to_rtx, 0), bitsize, bitpos,
4806 bitregion_start, bitregion_end,
4807 mode1, from,
4808 get_alias_set (to), nontemporal);
4809 else if (bitpos >= mode_bitsize / 2)
4810 result = store_field (XEXP (to_rtx, 1), bitsize,
4811 bitpos - mode_bitsize / 2,
4812 bitregion_start, bitregion_end,
4813 mode1, from,
4814 get_alias_set (to), nontemporal);
4815 else if (bitpos == 0 && bitsize == mode_bitsize)
4816 {
4817 rtx from_rtx;
4818 result = expand_normal (from);
4819 from_rtx = simplify_gen_subreg (GET_MODE (to_rtx), result,
4820 TYPE_MODE (TREE_TYPE (from)), 0);
4821 emit_move_insn (XEXP (to_rtx, 0),
4822 read_complex_part (from_rtx, false));
4823 emit_move_insn (XEXP (to_rtx, 1),
4824 read_complex_part (from_rtx, true));
4825 }
4826 else
4827 {
4828 rtx temp = assign_stack_temp (GET_MODE (to_rtx),
4829 GET_MODE_SIZE (GET_MODE (to_rtx)));
4830 write_complex_part (temp, XEXP (to_rtx, 0), false);
4831 write_complex_part (temp, XEXP (to_rtx, 1), true);
4832 result = store_field (temp, bitsize, bitpos,
4833 bitregion_start, bitregion_end,
4834 mode1, from,
4835 get_alias_set (to), nontemporal);
4836 emit_move_insn (XEXP (to_rtx, 0), read_complex_part (temp, false));
4837 emit_move_insn (XEXP (to_rtx, 1), read_complex_part (temp, true));
4838 }
4839 }
4840 else
4841 {
4842 if (MEM_P (to_rtx))
4843 {
4844 /* If the field is at offset zero, we could have been given the
4845 DECL_RTX of the parent struct. Don't munge it. */
4846 to_rtx = shallow_copy_rtx (to_rtx);
4847
4848 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
4849
4850 /* Deal with volatile and readonly fields. The former is only
4851 done for MEM. Also set MEM_KEEP_ALIAS_SET_P if needed. */
4852 if (volatilep)
4853 MEM_VOLATILE_P (to_rtx) = 1;
4854 }
4855
4856 if (optimize_bitfield_assignment_op (bitsize, bitpos,
4857 bitregion_start, bitregion_end,
4858 mode1,
4859 to_rtx, to, from))
4860 result = NULL;
4861 else
4862 result = store_field (to_rtx, bitsize, bitpos,
4863 bitregion_start, bitregion_end,
4864 mode1, from,
4865 get_alias_set (to), nontemporal);
4866 }
4867
4868 if (result)
4869 preserve_temp_slots (result);
4870 pop_temp_slots ();
4871 return;
4872 }
4873
4874 /* If the rhs is a function call and its value is not an aggregate,
4875 call the function before we start to compute the lhs.
4876 This is needed for correct code for cases such as
4877 val = setjmp (buf) on machines where reference to val
4878 requires loading up part of an address in a separate insn.
4879
4880 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
4881 since it might be a promoted variable where the zero- or sign- extension
4882 needs to be done. Handling this in the normal way is safe because no
4883 computation is done before the call. The same is true for SSA names. */
4884 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
4885 && COMPLETE_TYPE_P (TREE_TYPE (from))
4886 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
4887 && ! (((TREE_CODE (to) == VAR_DECL
4888 || TREE_CODE (to) == PARM_DECL
4889 || TREE_CODE (to) == RESULT_DECL)
4890 && REG_P (DECL_RTL (to)))
4891 || TREE_CODE (to) == SSA_NAME))
4892 {
4893 rtx value;
4894
4895 push_temp_slots ();
4896 value = expand_normal (from);
4897 if (to_rtx == 0)
4898 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4899
4900 /* Handle calls that return values in multiple non-contiguous locations.
4901 The Irix 6 ABI has examples of this. */
4902 if (GET_CODE (to_rtx) == PARALLEL)
4903 {
4904 if (GET_CODE (value) == PARALLEL)
4905 emit_group_move (to_rtx, value);
4906 else
4907 emit_group_load (to_rtx, value, TREE_TYPE (from),
4908 int_size_in_bytes (TREE_TYPE (from)));
4909 }
4910 else if (GET_CODE (value) == PARALLEL)
4911 emit_group_store (to_rtx, value, TREE_TYPE (from),
4912 int_size_in_bytes (TREE_TYPE (from)));
4913 else if (GET_MODE (to_rtx) == BLKmode)
4914 {
4915 /* Handle calls that return BLKmode values in registers. */
4916 if (REG_P (value))
4917 copy_blkmode_from_reg (to_rtx, value, TREE_TYPE (from));
4918 else
4919 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
4920 }
4921 else
4922 {
4923 if (POINTER_TYPE_P (TREE_TYPE (to)))
4924 value = convert_memory_address_addr_space
4925 (GET_MODE (to_rtx), value,
4926 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to))));
4927
4928 emit_move_insn (to_rtx, value);
4929 }
4930 preserve_temp_slots (to_rtx);
4931 pop_temp_slots ();
4932 return;
4933 }
4934
4935 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
4936 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4937
4938 /* Don't move directly into a return register. */
4939 if (TREE_CODE (to) == RESULT_DECL
4940 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
4941 {
4942 rtx temp;
4943
4944 push_temp_slots ();
4945
4946 /* If the source is itself a return value, it still is in a pseudo at
4947 this point so we can move it back to the return register directly. */
4948 if (REG_P (to_rtx)
4949 && TYPE_MODE (TREE_TYPE (from)) == BLKmode
4950 && TREE_CODE (from) != CALL_EXPR)
4951 temp = copy_blkmode_to_reg (GET_MODE (to_rtx), from);
4952 else
4953 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
4954
4955 /* Handle calls that return values in multiple non-contiguous locations.
4956 The Irix 6 ABI has examples of this. */
4957 if (GET_CODE (to_rtx) == PARALLEL)
4958 {
4959 if (GET_CODE (temp) == PARALLEL)
4960 emit_group_move (to_rtx, temp);
4961 else
4962 emit_group_load (to_rtx, temp, TREE_TYPE (from),
4963 int_size_in_bytes (TREE_TYPE (from)));
4964 }
4965 else if (temp)
4966 emit_move_insn (to_rtx, temp);
4967
4968 preserve_temp_slots (to_rtx);
4969 pop_temp_slots ();
4970 return;
4971 }
4972
4973 /* In case we are returning the contents of an object which overlaps
4974 the place the value is being stored, use a safe function when copying
4975 a value through a pointer into a structure value return block. */
4976 if (TREE_CODE (to) == RESULT_DECL
4977 && TREE_CODE (from) == INDIRECT_REF
4978 && ADDR_SPACE_GENERIC_P
4979 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0)))))
4980 && refs_may_alias_p (to, from)
4981 && cfun->returns_struct
4982 && !cfun->returns_pcc_struct)
4983 {
4984 rtx from_rtx, size;
4985
4986 push_temp_slots ();
4987 size = expr_size (from);
4988 from_rtx = expand_normal (from);
4989
4990 emit_library_call (memmove_libfunc, LCT_NORMAL,
4991 VOIDmode, 3, XEXP (to_rtx, 0), Pmode,
4992 XEXP (from_rtx, 0), Pmode,
4993 convert_to_mode (TYPE_MODE (sizetype),
4994 size, TYPE_UNSIGNED (sizetype)),
4995 TYPE_MODE (sizetype));
4996
4997 preserve_temp_slots (to_rtx);
4998 pop_temp_slots ();
4999 return;
5000 }
5001
5002 /* Compute FROM and store the value in the rtx we got. */
5003
5004 push_temp_slots ();
5005 result = store_expr (from, to_rtx, 0, nontemporal);
5006 preserve_temp_slots (result);
5007 pop_temp_slots ();
5008 return;
5009 }
5010
5011 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5012 succeeded, false otherwise. */
5013
5014 bool
emit_storent_insn(rtx to,rtx from)5015 emit_storent_insn (rtx to, rtx from)
5016 {
5017 struct expand_operand ops[2];
5018 enum machine_mode mode = GET_MODE (to);
5019 enum insn_code code = optab_handler (storent_optab, mode);
5020
5021 if (code == CODE_FOR_nothing)
5022 return false;
5023
5024 create_fixed_operand (&ops[0], to);
5025 create_input_operand (&ops[1], from, mode);
5026 return maybe_expand_insn (code, 2, ops);
5027 }
5028
5029 /* Generate code for computing expression EXP,
5030 and storing the value into TARGET.
5031
5032 If the mode is BLKmode then we may return TARGET itself.
5033 It turns out that in BLKmode it doesn't cause a problem.
5034 because C has no operators that could combine two different
5035 assignments into the same BLKmode object with different values
5036 with no sequence point. Will other languages need this to
5037 be more thorough?
5038
5039 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5040 stack, and block moves may need to be treated specially.
5041
5042 If NONTEMPORAL is true, try using a nontemporal store instruction. */
5043
5044 rtx
store_expr(tree exp,rtx target,int call_param_p,bool nontemporal)5045 store_expr (tree exp, rtx target, int call_param_p, bool nontemporal)
5046 {
5047 rtx temp;
5048 rtx alt_rtl = NULL_RTX;
5049 location_t loc = curr_insn_location ();
5050
5051 if (VOID_TYPE_P (TREE_TYPE (exp)))
5052 {
5053 /* C++ can generate ?: expressions with a throw expression in one
5054 branch and an rvalue in the other. Here, we resolve attempts to
5055 store the throw expression's nonexistent result. */
5056 gcc_assert (!call_param_p);
5057 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
5058 return NULL_RTX;
5059 }
5060 if (TREE_CODE (exp) == COMPOUND_EXPR)
5061 {
5062 /* Perform first part of compound expression, then assign from second
5063 part. */
5064 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
5065 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5066 return store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
5067 nontemporal);
5068 }
5069 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
5070 {
5071 /* For conditional expression, get safe form of the target. Then
5072 test the condition, doing the appropriate assignment on either
5073 side. This avoids the creation of unnecessary temporaries.
5074 For non-BLKmode, it is more efficient not to do this. */
5075
5076 rtx lab1 = gen_label_rtx (), lab2 = gen_label_rtx ();
5077
5078 do_pending_stack_adjust ();
5079 NO_DEFER_POP;
5080 jumpifnot (TREE_OPERAND (exp, 0), lab1, -1);
5081 store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
5082 nontemporal);
5083 emit_jump_insn (gen_jump (lab2));
5084 emit_barrier ();
5085 emit_label (lab1);
5086 store_expr (TREE_OPERAND (exp, 2), target, call_param_p,
5087 nontemporal);
5088 emit_label (lab2);
5089 OK_DEFER_POP;
5090
5091 return NULL_RTX;
5092 }
5093 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
5094 /* If this is a scalar in a register that is stored in a wider mode
5095 than the declared mode, compute the result into its declared mode
5096 and then convert to the wider mode. Our value is the computed
5097 expression. */
5098 {
5099 rtx inner_target = 0;
5100
5101 /* We can do the conversion inside EXP, which will often result
5102 in some optimizations. Do the conversion in two steps: first
5103 change the signedness, if needed, then the extend. But don't
5104 do this if the type of EXP is a subtype of something else
5105 since then the conversion might involve more than just
5106 converting modes. */
5107 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
5108 && TREE_TYPE (TREE_TYPE (exp)) == 0
5109 && GET_MODE_PRECISION (GET_MODE (target))
5110 == TYPE_PRECISION (TREE_TYPE (exp)))
5111 {
5112 if (TYPE_UNSIGNED (TREE_TYPE (exp))
5113 != SUBREG_PROMOTED_UNSIGNED_P (target))
5114 {
5115 /* Some types, e.g. Fortran's logical*4, won't have a signed
5116 version, so use the mode instead. */
5117 tree ntype
5118 = (signed_or_unsigned_type_for
5119 (SUBREG_PROMOTED_UNSIGNED_P (target), TREE_TYPE (exp)));
5120 if (ntype == NULL)
5121 ntype = lang_hooks.types.type_for_mode
5122 (TYPE_MODE (TREE_TYPE (exp)),
5123 SUBREG_PROMOTED_UNSIGNED_P (target));
5124
5125 exp = fold_convert_loc (loc, ntype, exp);
5126 }
5127
5128 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode
5129 (GET_MODE (SUBREG_REG (target)),
5130 SUBREG_PROMOTED_UNSIGNED_P (target)),
5131 exp);
5132
5133 inner_target = SUBREG_REG (target);
5134 }
5135
5136 temp = expand_expr (exp, inner_target, VOIDmode,
5137 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5138
5139 /* If TEMP is a VOIDmode constant, use convert_modes to make
5140 sure that we properly convert it. */
5141 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
5142 {
5143 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5144 temp, SUBREG_PROMOTED_UNSIGNED_P (target));
5145 temp = convert_modes (GET_MODE (SUBREG_REG (target)),
5146 GET_MODE (target), temp,
5147 SUBREG_PROMOTED_UNSIGNED_P (target));
5148 }
5149
5150 convert_move (SUBREG_REG (target), temp,
5151 SUBREG_PROMOTED_UNSIGNED_P (target));
5152
5153 return NULL_RTX;
5154 }
5155 else if ((TREE_CODE (exp) == STRING_CST
5156 || (TREE_CODE (exp) == MEM_REF
5157 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
5158 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
5159 == STRING_CST
5160 && integer_zerop (TREE_OPERAND (exp, 1))))
5161 && !nontemporal && !call_param_p
5162 && MEM_P (target))
5163 {
5164 /* Optimize initialization of an array with a STRING_CST. */
5165 HOST_WIDE_INT exp_len, str_copy_len;
5166 rtx dest_mem;
5167 tree str = TREE_CODE (exp) == STRING_CST
5168 ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
5169
5170 exp_len = int_expr_size (exp);
5171 if (exp_len <= 0)
5172 goto normal_expr;
5173
5174 if (TREE_STRING_LENGTH (str) <= 0)
5175 goto normal_expr;
5176
5177 str_copy_len = strlen (TREE_STRING_POINTER (str));
5178 if (str_copy_len < TREE_STRING_LENGTH (str) - 1)
5179 goto normal_expr;
5180
5181 str_copy_len = TREE_STRING_LENGTH (str);
5182 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0
5183 && TREE_STRING_POINTER (str)[TREE_STRING_LENGTH (str) - 1] == '\0')
5184 {
5185 str_copy_len += STORE_MAX_PIECES - 1;
5186 str_copy_len &= ~(STORE_MAX_PIECES - 1);
5187 }
5188 str_copy_len = MIN (str_copy_len, exp_len);
5189 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
5190 CONST_CAST (char *, TREE_STRING_POINTER (str)),
5191 MEM_ALIGN (target), false))
5192 goto normal_expr;
5193
5194 dest_mem = target;
5195
5196 dest_mem = store_by_pieces (dest_mem,
5197 str_copy_len, builtin_strncpy_read_str,
5198 CONST_CAST (char *,
5199 TREE_STRING_POINTER (str)),
5200 MEM_ALIGN (target), false,
5201 exp_len > str_copy_len ? 1 : 0);
5202 if (exp_len > str_copy_len)
5203 clear_storage (adjust_address (dest_mem, BLKmode, 0),
5204 GEN_INT (exp_len - str_copy_len),
5205 BLOCK_OP_NORMAL);
5206 return NULL_RTX;
5207 }
5208 else
5209 {
5210 rtx tmp_target;
5211
5212 normal_expr:
5213 /* If we want to use a nontemporal store, force the value to
5214 register first. */
5215 tmp_target = nontemporal ? NULL_RTX : target;
5216 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
5217 (call_param_p
5218 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
5219 &alt_rtl, false);
5220 }
5221
5222 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5223 the same as that of TARGET, adjust the constant. This is needed, for
5224 example, in case it is a CONST_DOUBLE and we want only a word-sized
5225 value. */
5226 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
5227 && TREE_CODE (exp) != ERROR_MARK
5228 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
5229 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5230 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5231
5232 /* If value was not generated in the target, store it there.
5233 Convert the value to TARGET's type first if necessary and emit the
5234 pending incrementations that have been queued when expanding EXP.
5235 Note that we cannot emit the whole queue blindly because this will
5236 effectively disable the POST_INC optimization later.
5237
5238 If TEMP and TARGET compare equal according to rtx_equal_p, but
5239 one or both of them are volatile memory refs, we have to distinguish
5240 two cases:
5241 - expand_expr has used TARGET. In this case, we must not generate
5242 another copy. This can be detected by TARGET being equal according
5243 to == .
5244 - expand_expr has not used TARGET - that means that the source just
5245 happens to have the same RTX form. Since temp will have been created
5246 by expand_expr, it will compare unequal according to == .
5247 We must generate a copy in this case, to reach the correct number
5248 of volatile memory references. */
5249
5250 if ((! rtx_equal_p (temp, target)
5251 || (temp != target && (side_effects_p (temp)
5252 || side_effects_p (target))))
5253 && TREE_CODE (exp) != ERROR_MARK
5254 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5255 but TARGET is not valid memory reference, TEMP will differ
5256 from TARGET although it is really the same location. */
5257 && !(alt_rtl
5258 && rtx_equal_p (alt_rtl, target)
5259 && !side_effects_p (alt_rtl)
5260 && !side_effects_p (target))
5261 /* If there's nothing to copy, don't bother. Don't call
5262 expr_size unless necessary, because some front-ends (C++)
5263 expr_size-hook must not be given objects that are not
5264 supposed to be bit-copied or bit-initialized. */
5265 && expr_size (exp) != const0_rtx)
5266 {
5267 if (GET_MODE (temp) != GET_MODE (target) && GET_MODE (temp) != VOIDmode)
5268 {
5269 if (GET_MODE (target) == BLKmode)
5270 {
5271 /* Handle calls that return BLKmode values in registers. */
5272 if (REG_P (temp) && TREE_CODE (exp) == CALL_EXPR)
5273 copy_blkmode_from_reg (target, temp, TREE_TYPE (exp));
5274 else
5275 store_bit_field (target,
5276 INTVAL (expr_size (exp)) * BITS_PER_UNIT,
5277 0, 0, 0, GET_MODE (temp), temp);
5278 }
5279 else
5280 convert_move (target, temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5281 }
5282
5283 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
5284 {
5285 /* Handle copying a string constant into an array. The string
5286 constant may be shorter than the array. So copy just the string's
5287 actual length, and clear the rest. First get the size of the data
5288 type of the string, which is actually the size of the target. */
5289 rtx size = expr_size (exp);
5290
5291 if (CONST_INT_P (size)
5292 && INTVAL (size) < TREE_STRING_LENGTH (exp))
5293 emit_block_move (target, temp, size,
5294 (call_param_p
5295 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5296 else
5297 {
5298 enum machine_mode pointer_mode
5299 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target));
5300 enum machine_mode address_mode = get_address_mode (target);
5301
5302 /* Compute the size of the data to copy from the string. */
5303 tree copy_size
5304 = size_binop_loc (loc, MIN_EXPR,
5305 make_tree (sizetype, size),
5306 size_int (TREE_STRING_LENGTH (exp)));
5307 rtx copy_size_rtx
5308 = expand_expr (copy_size, NULL_RTX, VOIDmode,
5309 (call_param_p
5310 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
5311 rtx label = 0;
5312
5313 /* Copy that much. */
5314 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
5315 TYPE_UNSIGNED (sizetype));
5316 emit_block_move (target, temp, copy_size_rtx,
5317 (call_param_p
5318 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5319
5320 /* Figure out how much is left in TARGET that we have to clear.
5321 Do all calculations in pointer_mode. */
5322 if (CONST_INT_P (copy_size_rtx))
5323 {
5324 size = plus_constant (address_mode, size,
5325 -INTVAL (copy_size_rtx));
5326 target = adjust_address (target, BLKmode,
5327 INTVAL (copy_size_rtx));
5328 }
5329 else
5330 {
5331 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
5332 copy_size_rtx, NULL_RTX, 0,
5333 OPTAB_LIB_WIDEN);
5334
5335 if (GET_MODE (copy_size_rtx) != address_mode)
5336 copy_size_rtx = convert_to_mode (address_mode,
5337 copy_size_rtx,
5338 TYPE_UNSIGNED (sizetype));
5339
5340 target = offset_address (target, copy_size_rtx,
5341 highest_pow2_factor (copy_size));
5342 label = gen_label_rtx ();
5343 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
5344 GET_MODE (size), 0, label);
5345 }
5346
5347 if (size != const0_rtx)
5348 clear_storage (target, size, BLOCK_OP_NORMAL);
5349
5350 if (label)
5351 emit_label (label);
5352 }
5353 }
5354 /* Handle calls that return values in multiple non-contiguous locations.
5355 The Irix 6 ABI has examples of this. */
5356 else if (GET_CODE (target) == PARALLEL)
5357 {
5358 if (GET_CODE (temp) == PARALLEL)
5359 emit_group_move (target, temp);
5360 else
5361 emit_group_load (target, temp, TREE_TYPE (exp),
5362 int_size_in_bytes (TREE_TYPE (exp)));
5363 }
5364 else if (GET_CODE (temp) == PARALLEL)
5365 emit_group_store (target, temp, TREE_TYPE (exp),
5366 int_size_in_bytes (TREE_TYPE (exp)));
5367 else if (GET_MODE (temp) == BLKmode)
5368 emit_block_move (target, temp, expr_size (exp),
5369 (call_param_p
5370 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5371 /* If we emit a nontemporal store, there is nothing else to do. */
5372 else if (nontemporal && emit_storent_insn (target, temp))
5373 ;
5374 else
5375 {
5376 temp = force_operand (temp, target);
5377 if (temp != target)
5378 emit_move_insn (target, temp);
5379 }
5380 }
5381
5382 return NULL_RTX;
5383 }
5384
5385 /* Return true if field F of structure TYPE is a flexible array. */
5386
5387 static bool
flexible_array_member_p(const_tree f,const_tree type)5388 flexible_array_member_p (const_tree f, const_tree type)
5389 {
5390 const_tree tf;
5391
5392 tf = TREE_TYPE (f);
5393 return (DECL_CHAIN (f) == NULL
5394 && TREE_CODE (tf) == ARRAY_TYPE
5395 && TYPE_DOMAIN (tf)
5396 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
5397 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
5398 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
5399 && int_size_in_bytes (type) >= 0);
5400 }
5401
5402 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5403 must have in order for it to completely initialize a value of type TYPE.
5404 Return -1 if the number isn't known.
5405
5406 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5407
5408 static HOST_WIDE_INT
count_type_elements(const_tree type,bool for_ctor_p)5409 count_type_elements (const_tree type, bool for_ctor_p)
5410 {
5411 switch (TREE_CODE (type))
5412 {
5413 case ARRAY_TYPE:
5414 {
5415 tree nelts;
5416
5417 nelts = array_type_nelts (type);
5418 if (nelts && host_integerp (nelts, 1))
5419 {
5420 unsigned HOST_WIDE_INT n;
5421
5422 n = tree_low_cst (nelts, 1) + 1;
5423 if (n == 0 || for_ctor_p)
5424 return n;
5425 else
5426 return n * count_type_elements (TREE_TYPE (type), false);
5427 }
5428 return for_ctor_p ? -1 : 1;
5429 }
5430
5431 case RECORD_TYPE:
5432 {
5433 unsigned HOST_WIDE_INT n;
5434 tree f;
5435
5436 n = 0;
5437 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5438 if (TREE_CODE (f) == FIELD_DECL)
5439 {
5440 if (!for_ctor_p)
5441 n += count_type_elements (TREE_TYPE (f), false);
5442 else if (!flexible_array_member_p (f, type))
5443 /* Don't count flexible arrays, which are not supposed
5444 to be initialized. */
5445 n += 1;
5446 }
5447
5448 return n;
5449 }
5450
5451 case UNION_TYPE:
5452 case QUAL_UNION_TYPE:
5453 {
5454 tree f;
5455 HOST_WIDE_INT n, m;
5456
5457 gcc_assert (!for_ctor_p);
5458 /* Estimate the number of scalars in each field and pick the
5459 maximum. Other estimates would do instead; the idea is simply
5460 to make sure that the estimate is not sensitive to the ordering
5461 of the fields. */
5462 n = 1;
5463 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5464 if (TREE_CODE (f) == FIELD_DECL)
5465 {
5466 m = count_type_elements (TREE_TYPE (f), false);
5467 /* If the field doesn't span the whole union, add an extra
5468 scalar for the rest. */
5469 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)),
5470 TYPE_SIZE (type)) != 1)
5471 m++;
5472 if (n < m)
5473 n = m;
5474 }
5475 return n;
5476 }
5477
5478 case COMPLEX_TYPE:
5479 return 2;
5480
5481 case VECTOR_TYPE:
5482 return TYPE_VECTOR_SUBPARTS (type);
5483
5484 case INTEGER_TYPE:
5485 case REAL_TYPE:
5486 case FIXED_POINT_TYPE:
5487 case ENUMERAL_TYPE:
5488 case BOOLEAN_TYPE:
5489 case POINTER_TYPE:
5490 case OFFSET_TYPE:
5491 case REFERENCE_TYPE:
5492 case NULLPTR_TYPE:
5493 return 1;
5494
5495 case ERROR_MARK:
5496 return 0;
5497
5498 case VOID_TYPE:
5499 case METHOD_TYPE:
5500 case FUNCTION_TYPE:
5501 case LANG_TYPE:
5502 default:
5503 gcc_unreachable ();
5504 }
5505 }
5506
5507 /* Helper for categorize_ctor_elements. Identical interface. */
5508
5509 static bool
categorize_ctor_elements_1(const_tree ctor,HOST_WIDE_INT * p_nz_elts,HOST_WIDE_INT * p_init_elts,bool * p_complete)5510 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5511 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5512 {
5513 unsigned HOST_WIDE_INT idx;
5514 HOST_WIDE_INT nz_elts, init_elts, num_fields;
5515 tree value, purpose, elt_type;
5516
5517 /* Whether CTOR is a valid constant initializer, in accordance with what
5518 initializer_constant_valid_p does. If inferred from the constructor
5519 elements, true until proven otherwise. */
5520 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
5521 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
5522
5523 nz_elts = 0;
5524 init_elts = 0;
5525 num_fields = 0;
5526 elt_type = NULL_TREE;
5527
5528 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
5529 {
5530 HOST_WIDE_INT mult = 1;
5531
5532 if (purpose && TREE_CODE (purpose) == RANGE_EXPR)
5533 {
5534 tree lo_index = TREE_OPERAND (purpose, 0);
5535 tree hi_index = TREE_OPERAND (purpose, 1);
5536
5537 if (host_integerp (lo_index, 1) && host_integerp (hi_index, 1))
5538 mult = (tree_low_cst (hi_index, 1)
5539 - tree_low_cst (lo_index, 1) + 1);
5540 }
5541 num_fields += mult;
5542 elt_type = TREE_TYPE (value);
5543
5544 switch (TREE_CODE (value))
5545 {
5546 case CONSTRUCTOR:
5547 {
5548 HOST_WIDE_INT nz = 0, ic = 0;
5549
5550 bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &ic,
5551 p_complete);
5552
5553 nz_elts += mult * nz;
5554 init_elts += mult * ic;
5555
5556 if (const_from_elts_p && const_p)
5557 const_p = const_elt_p;
5558 }
5559 break;
5560
5561 case INTEGER_CST:
5562 case REAL_CST:
5563 case FIXED_CST:
5564 if (!initializer_zerop (value))
5565 nz_elts += mult;
5566 init_elts += mult;
5567 break;
5568
5569 case STRING_CST:
5570 nz_elts += mult * TREE_STRING_LENGTH (value);
5571 init_elts += mult * TREE_STRING_LENGTH (value);
5572 break;
5573
5574 case COMPLEX_CST:
5575 if (!initializer_zerop (TREE_REALPART (value)))
5576 nz_elts += mult;
5577 if (!initializer_zerop (TREE_IMAGPART (value)))
5578 nz_elts += mult;
5579 init_elts += mult;
5580 break;
5581
5582 case VECTOR_CST:
5583 {
5584 unsigned i;
5585 for (i = 0; i < VECTOR_CST_NELTS (value); ++i)
5586 {
5587 tree v = VECTOR_CST_ELT (value, i);
5588 if (!initializer_zerop (v))
5589 nz_elts += mult;
5590 init_elts += mult;
5591 }
5592 }
5593 break;
5594
5595 default:
5596 {
5597 HOST_WIDE_INT tc = count_type_elements (elt_type, false);
5598 nz_elts += mult * tc;
5599 init_elts += mult * tc;
5600
5601 if (const_from_elts_p && const_p)
5602 const_p = initializer_constant_valid_p (value, elt_type)
5603 != NULL_TREE;
5604 }
5605 break;
5606 }
5607 }
5608
5609 if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor),
5610 num_fields, elt_type))
5611 *p_complete = false;
5612
5613 *p_nz_elts += nz_elts;
5614 *p_init_elts += init_elts;
5615
5616 return const_p;
5617 }
5618
5619 /* Examine CTOR to discover:
5620 * how many scalar fields are set to nonzero values,
5621 and place it in *P_NZ_ELTS;
5622 * how many scalar fields in total are in CTOR,
5623 and place it in *P_ELT_COUNT.
5624 * whether the constructor is complete -- in the sense that every
5625 meaningful byte is explicitly given a value --
5626 and place it in *P_COMPLETE.
5627
5628 Return whether or not CTOR is a valid static constant initializer, the same
5629 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
5630
5631 bool
categorize_ctor_elements(const_tree ctor,HOST_WIDE_INT * p_nz_elts,HOST_WIDE_INT * p_init_elts,bool * p_complete)5632 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5633 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5634 {
5635 *p_nz_elts = 0;
5636 *p_init_elts = 0;
5637 *p_complete = true;
5638
5639 return categorize_ctor_elements_1 (ctor, p_nz_elts, p_init_elts, p_complete);
5640 }
5641
5642 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
5643 of which had type LAST_TYPE. Each element was itself a complete
5644 initializer, in the sense that every meaningful byte was explicitly
5645 given a value. Return true if the same is true for the constructor
5646 as a whole. */
5647
5648 bool
complete_ctor_at_level_p(const_tree type,HOST_WIDE_INT num_elts,const_tree last_type)5649 complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts,
5650 const_tree last_type)
5651 {
5652 if (TREE_CODE (type) == UNION_TYPE
5653 || TREE_CODE (type) == QUAL_UNION_TYPE)
5654 {
5655 if (num_elts == 0)
5656 return false;
5657
5658 gcc_assert (num_elts == 1 && last_type);
5659
5660 /* ??? We could look at each element of the union, and find the
5661 largest element. Which would avoid comparing the size of the
5662 initialized element against any tail padding in the union.
5663 Doesn't seem worth the effort... */
5664 return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1;
5665 }
5666
5667 return count_type_elements (type, true) == num_elts;
5668 }
5669
5670 /* Return 1 if EXP contains mostly (3/4) zeros. */
5671
5672 static int
mostly_zeros_p(const_tree exp)5673 mostly_zeros_p (const_tree exp)
5674 {
5675 if (TREE_CODE (exp) == CONSTRUCTOR)
5676 {
5677 HOST_WIDE_INT nz_elts, init_elts;
5678 bool complete_p;
5679
5680 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5681 return !complete_p || nz_elts < init_elts / 4;
5682 }
5683
5684 return initializer_zerop (exp);
5685 }
5686
5687 /* Return 1 if EXP contains all zeros. */
5688
5689 static int
all_zeros_p(const_tree exp)5690 all_zeros_p (const_tree exp)
5691 {
5692 if (TREE_CODE (exp) == CONSTRUCTOR)
5693 {
5694 HOST_WIDE_INT nz_elts, init_elts;
5695 bool complete_p;
5696
5697 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5698 return nz_elts == 0;
5699 }
5700
5701 return initializer_zerop (exp);
5702 }
5703
5704 /* Helper function for store_constructor.
5705 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
5706 CLEARED is as for store_constructor.
5707 ALIAS_SET is the alias set to use for any stores.
5708
5709 This provides a recursive shortcut back to store_constructor when it isn't
5710 necessary to go through store_field. This is so that we can pass through
5711 the cleared field to let store_constructor know that we may not have to
5712 clear a substructure if the outer structure has already been cleared. */
5713
5714 static void
store_constructor_field(rtx target,unsigned HOST_WIDE_INT bitsize,HOST_WIDE_INT bitpos,enum machine_mode mode,tree exp,int cleared,alias_set_type alias_set)5715 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
5716 HOST_WIDE_INT bitpos, enum machine_mode mode,
5717 tree exp, int cleared, alias_set_type alias_set)
5718 {
5719 if (TREE_CODE (exp) == CONSTRUCTOR
5720 /* We can only call store_constructor recursively if the size and
5721 bit position are on a byte boundary. */
5722 && bitpos % BITS_PER_UNIT == 0
5723 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
5724 /* If we have a nonzero bitpos for a register target, then we just
5725 let store_field do the bitfield handling. This is unlikely to
5726 generate unnecessary clear instructions anyways. */
5727 && (bitpos == 0 || MEM_P (target)))
5728 {
5729 if (MEM_P (target))
5730 target
5731 = adjust_address (target,
5732 GET_MODE (target) == BLKmode
5733 || 0 != (bitpos
5734 % GET_MODE_ALIGNMENT (GET_MODE (target)))
5735 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
5736
5737
5738 /* Update the alias set, if required. */
5739 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
5740 && MEM_ALIAS_SET (target) != 0)
5741 {
5742 target = copy_rtx (target);
5743 set_mem_alias_set (target, alias_set);
5744 }
5745
5746 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT);
5747 }
5748 else
5749 store_field (target, bitsize, bitpos, 0, 0, mode, exp, alias_set, false);
5750 }
5751
5752 /* Store the value of constructor EXP into the rtx TARGET.
5753 TARGET is either a REG or a MEM; we know it cannot conflict, since
5754 safe_from_p has been called.
5755 CLEARED is true if TARGET is known to have been zero'd.
5756 SIZE is the number of bytes of TARGET we are allowed to modify: this
5757 may not be the same as the size of EXP if we are assigning to a field
5758 which has been packed to exclude padding bits. */
5759
5760 static void
store_constructor(tree exp,rtx target,int cleared,HOST_WIDE_INT size)5761 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
5762 {
5763 tree type = TREE_TYPE (exp);
5764 #ifdef WORD_REGISTER_OPERATIONS
5765 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
5766 #endif
5767
5768 switch (TREE_CODE (type))
5769 {
5770 case RECORD_TYPE:
5771 case UNION_TYPE:
5772 case QUAL_UNION_TYPE:
5773 {
5774 unsigned HOST_WIDE_INT idx;
5775 tree field, value;
5776
5777 /* If size is zero or the target is already cleared, do nothing. */
5778 if (size == 0 || cleared)
5779 cleared = 1;
5780 /* We either clear the aggregate or indicate the value is dead. */
5781 else if ((TREE_CODE (type) == UNION_TYPE
5782 || TREE_CODE (type) == QUAL_UNION_TYPE)
5783 && ! CONSTRUCTOR_ELTS (exp))
5784 /* If the constructor is empty, clear the union. */
5785 {
5786 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
5787 cleared = 1;
5788 }
5789
5790 /* If we are building a static constructor into a register,
5791 set the initial value as zero so we can fold the value into
5792 a constant. But if more than one register is involved,
5793 this probably loses. */
5794 else if (REG_P (target) && TREE_STATIC (exp)
5795 && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD)
5796 {
5797 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5798 cleared = 1;
5799 }
5800
5801 /* If the constructor has fewer fields than the structure or
5802 if we are initializing the structure to mostly zeros, clear
5803 the whole structure first. Don't do this if TARGET is a
5804 register whose mode size isn't equal to SIZE since
5805 clear_storage can't handle this case. */
5806 else if (size > 0
5807 && (((int)vec_safe_length (CONSTRUCTOR_ELTS (exp))
5808 != fields_length (type))
5809 || mostly_zeros_p (exp))
5810 && (!REG_P (target)
5811 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
5812 == size)))
5813 {
5814 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5815 cleared = 1;
5816 }
5817
5818 if (REG_P (target) && !cleared)
5819 emit_clobber (target);
5820
5821 /* Store each element of the constructor into the
5822 corresponding field of TARGET. */
5823 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
5824 {
5825 enum machine_mode mode;
5826 HOST_WIDE_INT bitsize;
5827 HOST_WIDE_INT bitpos = 0;
5828 tree offset;
5829 rtx to_rtx = target;
5830
5831 /* Just ignore missing fields. We cleared the whole
5832 structure, above, if any fields are missing. */
5833 if (field == 0)
5834 continue;
5835
5836 if (cleared && initializer_zerop (value))
5837 continue;
5838
5839 if (host_integerp (DECL_SIZE (field), 1))
5840 bitsize = tree_low_cst (DECL_SIZE (field), 1);
5841 else
5842 bitsize = -1;
5843
5844 mode = DECL_MODE (field);
5845 if (DECL_BIT_FIELD (field))
5846 mode = VOIDmode;
5847
5848 offset = DECL_FIELD_OFFSET (field);
5849 if (host_integerp (offset, 0)
5850 && host_integerp (bit_position (field), 0))
5851 {
5852 bitpos = int_bit_position (field);
5853 offset = 0;
5854 }
5855 else
5856 bitpos = tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 0);
5857
5858 if (offset)
5859 {
5860 enum machine_mode address_mode;
5861 rtx offset_rtx;
5862
5863 offset
5864 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset,
5865 make_tree (TREE_TYPE (exp),
5866 target));
5867
5868 offset_rtx = expand_normal (offset);
5869 gcc_assert (MEM_P (to_rtx));
5870
5871 address_mode = get_address_mode (to_rtx);
5872 if (GET_MODE (offset_rtx) != address_mode)
5873 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
5874
5875 to_rtx = offset_address (to_rtx, offset_rtx,
5876 highest_pow2_factor (offset));
5877 }
5878
5879 #ifdef WORD_REGISTER_OPERATIONS
5880 /* If this initializes a field that is smaller than a
5881 word, at the start of a word, try to widen it to a full
5882 word. This special case allows us to output C++ member
5883 function initializations in a form that the optimizers
5884 can understand. */
5885 if (REG_P (target)
5886 && bitsize < BITS_PER_WORD
5887 && bitpos % BITS_PER_WORD == 0
5888 && GET_MODE_CLASS (mode) == MODE_INT
5889 && TREE_CODE (value) == INTEGER_CST
5890 && exp_size >= 0
5891 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
5892 {
5893 tree type = TREE_TYPE (value);
5894
5895 if (TYPE_PRECISION (type) < BITS_PER_WORD)
5896 {
5897 type = lang_hooks.types.type_for_mode
5898 (word_mode, TYPE_UNSIGNED (type));
5899 value = fold_convert (type, value);
5900 }
5901
5902 if (BYTES_BIG_ENDIAN)
5903 value
5904 = fold_build2 (LSHIFT_EXPR, type, value,
5905 build_int_cst (type,
5906 BITS_PER_WORD - bitsize));
5907 bitsize = BITS_PER_WORD;
5908 mode = word_mode;
5909 }
5910 #endif
5911
5912 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
5913 && DECL_NONADDRESSABLE_P (field))
5914 {
5915 to_rtx = copy_rtx (to_rtx);
5916 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
5917 }
5918
5919 store_constructor_field (to_rtx, bitsize, bitpos, mode,
5920 value, cleared,
5921 get_alias_set (TREE_TYPE (field)));
5922 }
5923 break;
5924 }
5925 case ARRAY_TYPE:
5926 {
5927 tree value, index;
5928 unsigned HOST_WIDE_INT i;
5929 int need_to_clear;
5930 tree domain;
5931 tree elttype = TREE_TYPE (type);
5932 int const_bounds_p;
5933 HOST_WIDE_INT minelt = 0;
5934 HOST_WIDE_INT maxelt = 0;
5935
5936 domain = TYPE_DOMAIN (type);
5937 const_bounds_p = (TYPE_MIN_VALUE (domain)
5938 && TYPE_MAX_VALUE (domain)
5939 && host_integerp (TYPE_MIN_VALUE (domain), 0)
5940 && host_integerp (TYPE_MAX_VALUE (domain), 0));
5941
5942 /* If we have constant bounds for the range of the type, get them. */
5943 if (const_bounds_p)
5944 {
5945 minelt = tree_low_cst (TYPE_MIN_VALUE (domain), 0);
5946 maxelt = tree_low_cst (TYPE_MAX_VALUE (domain), 0);
5947 }
5948
5949 /* If the constructor has fewer elements than the array, clear
5950 the whole array first. Similarly if this is static
5951 constructor of a non-BLKmode object. */
5952 if (cleared)
5953 need_to_clear = 0;
5954 else if (REG_P (target) && TREE_STATIC (exp))
5955 need_to_clear = 1;
5956 else
5957 {
5958 unsigned HOST_WIDE_INT idx;
5959 tree index, value;
5960 HOST_WIDE_INT count = 0, zero_count = 0;
5961 need_to_clear = ! const_bounds_p;
5962
5963 /* This loop is a more accurate version of the loop in
5964 mostly_zeros_p (it handles RANGE_EXPR in an index). It
5965 is also needed to check for missing elements. */
5966 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
5967 {
5968 HOST_WIDE_INT this_node_count;
5969
5970 if (need_to_clear)
5971 break;
5972
5973 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5974 {
5975 tree lo_index = TREE_OPERAND (index, 0);
5976 tree hi_index = TREE_OPERAND (index, 1);
5977
5978 if (! host_integerp (lo_index, 1)
5979 || ! host_integerp (hi_index, 1))
5980 {
5981 need_to_clear = 1;
5982 break;
5983 }
5984
5985 this_node_count = (tree_low_cst (hi_index, 1)
5986 - tree_low_cst (lo_index, 1) + 1);
5987 }
5988 else
5989 this_node_count = 1;
5990
5991 count += this_node_count;
5992 if (mostly_zeros_p (value))
5993 zero_count += this_node_count;
5994 }
5995
5996 /* Clear the entire array first if there are any missing
5997 elements, or if the incidence of zero elements is >=
5998 75%. */
5999 if (! need_to_clear
6000 && (count < maxelt - minelt + 1
6001 || 4 * zero_count >= 3 * count))
6002 need_to_clear = 1;
6003 }
6004
6005 if (need_to_clear && size > 0)
6006 {
6007 if (REG_P (target))
6008 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6009 else
6010 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6011 cleared = 1;
6012 }
6013
6014 if (!cleared && REG_P (target))
6015 /* Inform later passes that the old value is dead. */
6016 emit_clobber (target);
6017
6018 /* Store each element of the constructor into the
6019 corresponding element of TARGET, determined by counting the
6020 elements. */
6021 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
6022 {
6023 enum machine_mode mode;
6024 HOST_WIDE_INT bitsize;
6025 HOST_WIDE_INT bitpos;
6026 rtx xtarget = target;
6027
6028 if (cleared && initializer_zerop (value))
6029 continue;
6030
6031 mode = TYPE_MODE (elttype);
6032 if (mode == BLKmode)
6033 bitsize = (host_integerp (TYPE_SIZE (elttype), 1)
6034 ? tree_low_cst (TYPE_SIZE (elttype), 1)
6035 : -1);
6036 else
6037 bitsize = GET_MODE_BITSIZE (mode);
6038
6039 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
6040 {
6041 tree lo_index = TREE_OPERAND (index, 0);
6042 tree hi_index = TREE_OPERAND (index, 1);
6043 rtx index_r, pos_rtx;
6044 HOST_WIDE_INT lo, hi, count;
6045 tree position;
6046
6047 /* If the range is constant and "small", unroll the loop. */
6048 if (const_bounds_p
6049 && host_integerp (lo_index, 0)
6050 && host_integerp (hi_index, 0)
6051 && (lo = tree_low_cst (lo_index, 0),
6052 hi = tree_low_cst (hi_index, 0),
6053 count = hi - lo + 1,
6054 (!MEM_P (target)
6055 || count <= 2
6056 || (host_integerp (TYPE_SIZE (elttype), 1)
6057 && (tree_low_cst (TYPE_SIZE (elttype), 1) * count
6058 <= 40 * 8)))))
6059 {
6060 lo -= minelt; hi -= minelt;
6061 for (; lo <= hi; lo++)
6062 {
6063 bitpos = lo * tree_low_cst (TYPE_SIZE (elttype), 0);
6064
6065 if (MEM_P (target)
6066 && !MEM_KEEP_ALIAS_SET_P (target)
6067 && TREE_CODE (type) == ARRAY_TYPE
6068 && TYPE_NONALIASED_COMPONENT (type))
6069 {
6070 target = copy_rtx (target);
6071 MEM_KEEP_ALIAS_SET_P (target) = 1;
6072 }
6073
6074 store_constructor_field
6075 (target, bitsize, bitpos, mode, value, cleared,
6076 get_alias_set (elttype));
6077 }
6078 }
6079 else
6080 {
6081 rtx loop_start = gen_label_rtx ();
6082 rtx loop_end = gen_label_rtx ();
6083 tree exit_cond;
6084
6085 expand_normal (hi_index);
6086
6087 index = build_decl (EXPR_LOCATION (exp),
6088 VAR_DECL, NULL_TREE, domain);
6089 index_r = gen_reg_rtx (promote_decl_mode (index, NULL));
6090 SET_DECL_RTL (index, index_r);
6091 store_expr (lo_index, index_r, 0, false);
6092
6093 /* Build the head of the loop. */
6094 do_pending_stack_adjust ();
6095 emit_label (loop_start);
6096
6097 /* Assign value to element index. */
6098 position =
6099 fold_convert (ssizetype,
6100 fold_build2 (MINUS_EXPR,
6101 TREE_TYPE (index),
6102 index,
6103 TYPE_MIN_VALUE (domain)));
6104
6105 position =
6106 size_binop (MULT_EXPR, position,
6107 fold_convert (ssizetype,
6108 TYPE_SIZE_UNIT (elttype)));
6109
6110 pos_rtx = expand_normal (position);
6111 xtarget = offset_address (target, pos_rtx,
6112 highest_pow2_factor (position));
6113 xtarget = adjust_address (xtarget, mode, 0);
6114 if (TREE_CODE (value) == CONSTRUCTOR)
6115 store_constructor (value, xtarget, cleared,
6116 bitsize / BITS_PER_UNIT);
6117 else
6118 store_expr (value, xtarget, 0, false);
6119
6120 /* Generate a conditional jump to exit the loop. */
6121 exit_cond = build2 (LT_EXPR, integer_type_node,
6122 index, hi_index);
6123 jumpif (exit_cond, loop_end, -1);
6124
6125 /* Update the loop counter, and jump to the head of
6126 the loop. */
6127 expand_assignment (index,
6128 build2 (PLUS_EXPR, TREE_TYPE (index),
6129 index, integer_one_node),
6130 false);
6131
6132 emit_jump (loop_start);
6133
6134 /* Build the end of the loop. */
6135 emit_label (loop_end);
6136 }
6137 }
6138 else if ((index != 0 && ! host_integerp (index, 0))
6139 || ! host_integerp (TYPE_SIZE (elttype), 1))
6140 {
6141 tree position;
6142
6143 if (index == 0)
6144 index = ssize_int (1);
6145
6146 if (minelt)
6147 index = fold_convert (ssizetype,
6148 fold_build2 (MINUS_EXPR,
6149 TREE_TYPE (index),
6150 index,
6151 TYPE_MIN_VALUE (domain)));
6152
6153 position =
6154 size_binop (MULT_EXPR, index,
6155 fold_convert (ssizetype,
6156 TYPE_SIZE_UNIT (elttype)));
6157 xtarget = offset_address (target,
6158 expand_normal (position),
6159 highest_pow2_factor (position));
6160 xtarget = adjust_address (xtarget, mode, 0);
6161 store_expr (value, xtarget, 0, false);
6162 }
6163 else
6164 {
6165 if (index != 0)
6166 bitpos = ((tree_low_cst (index, 0) - minelt)
6167 * tree_low_cst (TYPE_SIZE (elttype), 1));
6168 else
6169 bitpos = (i * tree_low_cst (TYPE_SIZE (elttype), 1));
6170
6171 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
6172 && TREE_CODE (type) == ARRAY_TYPE
6173 && TYPE_NONALIASED_COMPONENT (type))
6174 {
6175 target = copy_rtx (target);
6176 MEM_KEEP_ALIAS_SET_P (target) = 1;
6177 }
6178 store_constructor_field (target, bitsize, bitpos, mode, value,
6179 cleared, get_alias_set (elttype));
6180 }
6181 }
6182 break;
6183 }
6184
6185 case VECTOR_TYPE:
6186 {
6187 unsigned HOST_WIDE_INT idx;
6188 constructor_elt *ce;
6189 int i;
6190 int need_to_clear;
6191 int icode = CODE_FOR_nothing;
6192 tree elttype = TREE_TYPE (type);
6193 int elt_size = tree_low_cst (TYPE_SIZE (elttype), 1);
6194 enum machine_mode eltmode = TYPE_MODE (elttype);
6195 HOST_WIDE_INT bitsize;
6196 HOST_WIDE_INT bitpos;
6197 rtvec vector = NULL;
6198 unsigned n_elts;
6199 alias_set_type alias;
6200
6201 gcc_assert (eltmode != BLKmode);
6202
6203 n_elts = TYPE_VECTOR_SUBPARTS (type);
6204 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
6205 {
6206 enum machine_mode mode = GET_MODE (target);
6207
6208 icode = (int) optab_handler (vec_init_optab, mode);
6209 if (icode != CODE_FOR_nothing)
6210 {
6211 unsigned int i;
6212
6213 vector = rtvec_alloc (n_elts);
6214 for (i = 0; i < n_elts; i++)
6215 RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode));
6216 }
6217 }
6218
6219 /* If the constructor has fewer elements than the vector,
6220 clear the whole array first. Similarly if this is static
6221 constructor of a non-BLKmode object. */
6222 if (cleared)
6223 need_to_clear = 0;
6224 else if (REG_P (target) && TREE_STATIC (exp))
6225 need_to_clear = 1;
6226 else
6227 {
6228 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
6229 tree value;
6230
6231 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6232 {
6233 int n_elts_here = tree_low_cst
6234 (int_const_binop (TRUNC_DIV_EXPR,
6235 TYPE_SIZE (TREE_TYPE (value)),
6236 TYPE_SIZE (elttype)), 1);
6237
6238 count += n_elts_here;
6239 if (mostly_zeros_p (value))
6240 zero_count += n_elts_here;
6241 }
6242
6243 /* Clear the entire vector first if there are any missing elements,
6244 or if the incidence of zero elements is >= 75%. */
6245 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
6246 }
6247
6248 if (need_to_clear && size > 0 && !vector)
6249 {
6250 if (REG_P (target))
6251 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6252 else
6253 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6254 cleared = 1;
6255 }
6256
6257 /* Inform later passes that the old value is dead. */
6258 if (!cleared && !vector && REG_P (target))
6259 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6260
6261 if (MEM_P (target))
6262 alias = MEM_ALIAS_SET (target);
6263 else
6264 alias = get_alias_set (elttype);
6265
6266 /* Store each element of the constructor into the corresponding
6267 element of TARGET, determined by counting the elements. */
6268 for (idx = 0, i = 0;
6269 vec_safe_iterate (CONSTRUCTOR_ELTS (exp), idx, &ce);
6270 idx++, i += bitsize / elt_size)
6271 {
6272 HOST_WIDE_INT eltpos;
6273 tree value = ce->value;
6274
6275 bitsize = tree_low_cst (TYPE_SIZE (TREE_TYPE (value)), 1);
6276 if (cleared && initializer_zerop (value))
6277 continue;
6278
6279 if (ce->index)
6280 eltpos = tree_low_cst (ce->index, 1);
6281 else
6282 eltpos = i;
6283
6284 if (vector)
6285 {
6286 /* Vector CONSTRUCTORs should only be built from smaller
6287 vectors in the case of BLKmode vectors. */
6288 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
6289 RTVEC_ELT (vector, eltpos)
6290 = expand_normal (value);
6291 }
6292 else
6293 {
6294 enum machine_mode value_mode =
6295 TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
6296 ? TYPE_MODE (TREE_TYPE (value))
6297 : eltmode;
6298 bitpos = eltpos * elt_size;
6299 store_constructor_field (target, bitsize, bitpos, value_mode,
6300 value, cleared, alias);
6301 }
6302 }
6303
6304 if (vector)
6305 emit_insn (GEN_FCN (icode)
6306 (target,
6307 gen_rtx_PARALLEL (GET_MODE (target), vector)));
6308 break;
6309 }
6310
6311 default:
6312 gcc_unreachable ();
6313 }
6314 }
6315
6316 /* Store the value of EXP (an expression tree)
6317 into a subfield of TARGET which has mode MODE and occupies
6318 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6319 If MODE is VOIDmode, it means that we are storing into a bit-field.
6320
6321 BITREGION_START is bitpos of the first bitfield in this region.
6322 BITREGION_END is the bitpos of the ending bitfield in this region.
6323 These two fields are 0, if the C++ memory model does not apply,
6324 or we are not interested in keeping track of bitfield regions.
6325
6326 Always return const0_rtx unless we have something particular to
6327 return.
6328
6329 ALIAS_SET is the alias set for the destination. This value will
6330 (in general) be different from that for TARGET, since TARGET is a
6331 reference to the containing structure.
6332
6333 If NONTEMPORAL is true, try generating a nontemporal store. */
6334
6335 static rtx
store_field(rtx target,HOST_WIDE_INT bitsize,HOST_WIDE_INT bitpos,unsigned HOST_WIDE_INT bitregion_start,unsigned HOST_WIDE_INT bitregion_end,enum machine_mode mode,tree exp,alias_set_type alias_set,bool nontemporal)6336 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
6337 unsigned HOST_WIDE_INT bitregion_start,
6338 unsigned HOST_WIDE_INT bitregion_end,
6339 enum machine_mode mode, tree exp,
6340 alias_set_type alias_set, bool nontemporal)
6341 {
6342 if (TREE_CODE (exp) == ERROR_MARK)
6343 return const0_rtx;
6344
6345 /* If we have nothing to store, do nothing unless the expression has
6346 side-effects. */
6347 if (bitsize == 0)
6348 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
6349
6350 if (GET_CODE (target) == CONCAT)
6351 {
6352 /* We're storing into a struct containing a single __complex. */
6353
6354 gcc_assert (!bitpos);
6355 return store_expr (exp, target, 0, nontemporal);
6356 }
6357
6358 /* If the structure is in a register or if the component
6359 is a bit field, we cannot use addressing to access it.
6360 Use bit-field techniques or SUBREG to store in it. */
6361
6362 if (mode == VOIDmode
6363 || (mode != BLKmode && ! direct_store[(int) mode]
6364 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
6365 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
6366 || REG_P (target)
6367 || GET_CODE (target) == SUBREG
6368 /* If the field isn't aligned enough to store as an ordinary memref,
6369 store it as a bit field. */
6370 || (mode != BLKmode
6371 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
6372 || bitpos % GET_MODE_ALIGNMENT (mode))
6373 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
6374 || (bitpos % BITS_PER_UNIT != 0)))
6375 || (bitsize >= 0 && mode != BLKmode
6376 && GET_MODE_BITSIZE (mode) > bitsize)
6377 /* If the RHS and field are a constant size and the size of the
6378 RHS isn't the same size as the bitfield, we must use bitfield
6379 operations. */
6380 || (bitsize >= 0
6381 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
6382 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0)
6383 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6384 decl we must use bitfield operations. */
6385 || (bitsize >= 0
6386 && TREE_CODE (exp) == MEM_REF
6387 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
6388 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
6389 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0),0 ))
6390 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode))
6391 {
6392 rtx temp;
6393 gimple nop_def;
6394
6395 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6396 implies a mask operation. If the precision is the same size as
6397 the field we're storing into, that mask is redundant. This is
6398 particularly common with bit field assignments generated by the
6399 C front end. */
6400 nop_def = get_def_for_expr (exp, NOP_EXPR);
6401 if (nop_def)
6402 {
6403 tree type = TREE_TYPE (exp);
6404 if (INTEGRAL_TYPE_P (type)
6405 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
6406 && bitsize == TYPE_PRECISION (type))
6407 {
6408 tree op = gimple_assign_rhs1 (nop_def);
6409 type = TREE_TYPE (op);
6410 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
6411 exp = op;
6412 }
6413 }
6414
6415 temp = expand_normal (exp);
6416
6417 /* If BITSIZE is narrower than the size of the type of EXP
6418 we will be narrowing TEMP. Normally, what's wanted are the
6419 low-order bits. However, if EXP's type is a record and this is
6420 big-endian machine, we want the upper BITSIZE bits. */
6421 if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT
6422 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp))
6423 && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE)
6424 temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
6425 GET_MODE_BITSIZE (GET_MODE (temp)) - bitsize,
6426 NULL_RTX, 1);
6427
6428 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
6429 if (mode != VOIDmode && mode != BLKmode
6430 && mode != TYPE_MODE (TREE_TYPE (exp)))
6431 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
6432
6433 /* If TEMP is not a PARALLEL (see below) and its mode and that of TARGET
6434 are both BLKmode, both must be in memory and BITPOS must be aligned
6435 on a byte boundary. If so, we simply do a block copy. Likewise for
6436 a BLKmode-like TARGET. */
6437 if (GET_CODE (temp) != PARALLEL
6438 && GET_MODE (temp) == BLKmode
6439 && (GET_MODE (target) == BLKmode
6440 || (MEM_P (target)
6441 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
6442 && (bitpos % BITS_PER_UNIT) == 0
6443 && (bitsize % BITS_PER_UNIT) == 0)))
6444 {
6445 gcc_assert (MEM_P (target) && MEM_P (temp)
6446 && (bitpos % BITS_PER_UNIT) == 0);
6447
6448 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
6449 emit_block_move (target, temp,
6450 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
6451 / BITS_PER_UNIT),
6452 BLOCK_OP_NORMAL);
6453
6454 return const0_rtx;
6455 }
6456
6457 /* Handle calls that return values in multiple non-contiguous locations.
6458 The Irix 6 ABI has examples of this. */
6459 if (GET_CODE (temp) == PARALLEL)
6460 {
6461 HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp));
6462 rtx temp_target;
6463 if (mode == BLKmode)
6464 mode = smallest_mode_for_size (size * BITS_PER_UNIT, MODE_INT);
6465 temp_target = gen_reg_rtx (mode);
6466 emit_group_store (temp_target, temp, TREE_TYPE (exp), size);
6467 temp = temp_target;
6468 }
6469 else if (mode == BLKmode)
6470 {
6471 /* Handle calls that return BLKmode values in registers. */
6472 if (REG_P (temp) && TREE_CODE (exp) == CALL_EXPR)
6473 {
6474 rtx temp_target = gen_reg_rtx (GET_MODE (temp));
6475 copy_blkmode_from_reg (temp_target, temp, TREE_TYPE (exp));
6476 temp = temp_target;
6477 }
6478 else
6479 {
6480 HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp));
6481 rtx temp_target;
6482 mode = smallest_mode_for_size (size * BITS_PER_UNIT, MODE_INT);
6483 temp_target = gen_reg_rtx (mode);
6484 temp_target
6485 = extract_bit_field (temp, size * BITS_PER_UNIT, 0, 1,
6486 false, temp_target, mode, mode);
6487 temp = temp_target;
6488 }
6489 }
6490
6491 /* Store the value in the bitfield. */
6492 store_bit_field (target, bitsize, bitpos,
6493 bitregion_start, bitregion_end,
6494 mode, temp);
6495
6496 return const0_rtx;
6497 }
6498 else
6499 {
6500 /* Now build a reference to just the desired component. */
6501 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
6502
6503 if (to_rtx == target)
6504 to_rtx = copy_rtx (to_rtx);
6505
6506 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
6507 set_mem_alias_set (to_rtx, alias_set);
6508
6509 return store_expr (exp, to_rtx, 0, nontemporal);
6510 }
6511 }
6512
6513 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
6514 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
6515 codes and find the ultimate containing object, which we return.
6516
6517 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
6518 bit position, and *PUNSIGNEDP to the signedness of the field.
6519 If the position of the field is variable, we store a tree
6520 giving the variable offset (in units) in *POFFSET.
6521 This offset is in addition to the bit position.
6522 If the position is not variable, we store 0 in *POFFSET.
6523
6524 If any of the extraction expressions is volatile,
6525 we store 1 in *PVOLATILEP. Otherwise we don't change that.
6526
6527 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
6528 Otherwise, it is a mode that can be used to access the field.
6529
6530 If the field describes a variable-sized object, *PMODE is set to
6531 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
6532 this case, but the address of the object can be found.
6533
6534 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
6535 look through nodes that serve as markers of a greater alignment than
6536 the one that can be deduced from the expression. These nodes make it
6537 possible for front-ends to prevent temporaries from being created by
6538 the middle-end on alignment considerations. For that purpose, the
6539 normal operating mode at high-level is to always pass FALSE so that
6540 the ultimate containing object is really returned; moreover, the
6541 associated predicate handled_component_p will always return TRUE
6542 on these nodes, thus indicating that they are essentially handled
6543 by get_inner_reference. TRUE should only be passed when the caller
6544 is scanning the expression in order to build another representation
6545 and specifically knows how to handle these nodes; as such, this is
6546 the normal operating mode in the RTL expanders. */
6547
6548 tree
get_inner_reference(tree exp,HOST_WIDE_INT * pbitsize,HOST_WIDE_INT * pbitpos,tree * poffset,enum machine_mode * pmode,int * punsignedp,int * pvolatilep,bool keep_aligning)6549 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
6550 HOST_WIDE_INT *pbitpos, tree *poffset,
6551 enum machine_mode *pmode, int *punsignedp,
6552 int *pvolatilep, bool keep_aligning)
6553 {
6554 tree size_tree = 0;
6555 enum machine_mode mode = VOIDmode;
6556 bool blkmode_bitfield = false;
6557 tree offset = size_zero_node;
6558 double_int bit_offset = double_int_zero;
6559
6560 /* First get the mode, signedness, and size. We do this from just the
6561 outermost expression. */
6562 *pbitsize = -1;
6563 if (TREE_CODE (exp) == COMPONENT_REF)
6564 {
6565 tree field = TREE_OPERAND (exp, 1);
6566 size_tree = DECL_SIZE (field);
6567 if (!DECL_BIT_FIELD (field))
6568 mode = DECL_MODE (field);
6569 else if (DECL_MODE (field) == BLKmode)
6570 blkmode_bitfield = true;
6571 else if (TREE_THIS_VOLATILE (exp)
6572 && flag_strict_volatile_bitfields > 0)
6573 /* Volatile bitfields should be accessed in the mode of the
6574 field's type, not the mode computed based on the bit
6575 size. */
6576 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
6577
6578 *punsignedp = DECL_UNSIGNED (field);
6579 }
6580 else if (TREE_CODE (exp) == BIT_FIELD_REF)
6581 {
6582 size_tree = TREE_OPERAND (exp, 1);
6583 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
6584 || TYPE_UNSIGNED (TREE_TYPE (exp)));
6585
6586 /* For vector types, with the correct size of access, use the mode of
6587 inner type. */
6588 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
6589 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
6590 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
6591 mode = TYPE_MODE (TREE_TYPE (exp));
6592 }
6593 else
6594 {
6595 mode = TYPE_MODE (TREE_TYPE (exp));
6596 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
6597
6598 if (mode == BLKmode)
6599 size_tree = TYPE_SIZE (TREE_TYPE (exp));
6600 else
6601 *pbitsize = GET_MODE_BITSIZE (mode);
6602 }
6603
6604 if (size_tree != 0)
6605 {
6606 if (! host_integerp (size_tree, 1))
6607 mode = BLKmode, *pbitsize = -1;
6608 else
6609 *pbitsize = tree_low_cst (size_tree, 1);
6610 }
6611
6612 /* Compute cumulative bit-offset for nested component-refs and array-refs,
6613 and find the ultimate containing object. */
6614 while (1)
6615 {
6616 switch (TREE_CODE (exp))
6617 {
6618 case BIT_FIELD_REF:
6619 bit_offset += tree_to_double_int (TREE_OPERAND (exp, 2));
6620 break;
6621
6622 case COMPONENT_REF:
6623 {
6624 tree field = TREE_OPERAND (exp, 1);
6625 tree this_offset = component_ref_field_offset (exp);
6626
6627 /* If this field hasn't been filled in yet, don't go past it.
6628 This should only happen when folding expressions made during
6629 type construction. */
6630 if (this_offset == 0)
6631 break;
6632
6633 offset = size_binop (PLUS_EXPR, offset, this_offset);
6634 bit_offset += tree_to_double_int (DECL_FIELD_BIT_OFFSET (field));
6635
6636 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
6637 }
6638 break;
6639
6640 case ARRAY_REF:
6641 case ARRAY_RANGE_REF:
6642 {
6643 tree index = TREE_OPERAND (exp, 1);
6644 tree low_bound = array_ref_low_bound (exp);
6645 tree unit_size = array_ref_element_size (exp);
6646
6647 /* We assume all arrays have sizes that are a multiple of a byte.
6648 First subtract the lower bound, if any, in the type of the
6649 index, then convert to sizetype and multiply by the size of
6650 the array element. */
6651 if (! integer_zerop (low_bound))
6652 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
6653 index, low_bound);
6654
6655 offset = size_binop (PLUS_EXPR, offset,
6656 size_binop (MULT_EXPR,
6657 fold_convert (sizetype, index),
6658 unit_size));
6659 }
6660 break;
6661
6662 case REALPART_EXPR:
6663 break;
6664
6665 case IMAGPART_EXPR:
6666 bit_offset += double_int::from_uhwi (*pbitsize);
6667 break;
6668
6669 case VIEW_CONVERT_EXPR:
6670 if (keep_aligning && STRICT_ALIGNMENT
6671 && (TYPE_ALIGN (TREE_TYPE (exp))
6672 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))))
6673 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))
6674 < BIGGEST_ALIGNMENT)
6675 && (TYPE_ALIGN_OK (TREE_TYPE (exp))
6676 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0)))))
6677 goto done;
6678 break;
6679
6680 case MEM_REF:
6681 /* Hand back the decl for MEM[&decl, off]. */
6682 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)
6683 {
6684 tree off = TREE_OPERAND (exp, 1);
6685 if (!integer_zerop (off))
6686 {
6687 double_int boff, coff = mem_ref_offset (exp);
6688 boff = coff.alshift (BITS_PER_UNIT == 8
6689 ? 3 : exact_log2 (BITS_PER_UNIT),
6690 HOST_BITS_PER_DOUBLE_INT);
6691 bit_offset += boff;
6692 }
6693 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6694 }
6695 goto done;
6696
6697 default:
6698 goto done;
6699 }
6700
6701 /* If any reference in the chain is volatile, the effect is volatile. */
6702 if (TREE_THIS_VOLATILE (exp))
6703 *pvolatilep = 1;
6704
6705 exp = TREE_OPERAND (exp, 0);
6706 }
6707 done:
6708
6709 /* If OFFSET is constant, see if we can return the whole thing as a
6710 constant bit position. Make sure to handle overflow during
6711 this conversion. */
6712 if (TREE_CODE (offset) == INTEGER_CST)
6713 {
6714 double_int tem = tree_to_double_int (offset);
6715 tem = tem.sext (TYPE_PRECISION (sizetype));
6716 tem = tem.alshift (BITS_PER_UNIT == 8 ? 3 : exact_log2 (BITS_PER_UNIT),
6717 HOST_BITS_PER_DOUBLE_INT);
6718 tem += bit_offset;
6719 if (tem.fits_shwi ())
6720 {
6721 *pbitpos = tem.to_shwi ();
6722 *poffset = offset = NULL_TREE;
6723 }
6724 }
6725
6726 /* Otherwise, split it up. */
6727 if (offset)
6728 {
6729 /* Avoid returning a negative bitpos as this may wreak havoc later. */
6730 if (bit_offset.is_negative () || !bit_offset.fits_shwi ())
6731 {
6732 double_int mask
6733 = double_int::mask (BITS_PER_UNIT == 8
6734 ? 3 : exact_log2 (BITS_PER_UNIT));
6735 double_int tem = bit_offset.and_not (mask);
6736 /* TEM is the bitpos rounded to BITS_PER_UNIT towards -Inf.
6737 Subtract it to BIT_OFFSET and add it (scaled) to OFFSET. */
6738 bit_offset -= tem;
6739 tem = tem.arshift (BITS_PER_UNIT == 8
6740 ? 3 : exact_log2 (BITS_PER_UNIT),
6741 HOST_BITS_PER_DOUBLE_INT);
6742 offset = size_binop (PLUS_EXPR, offset,
6743 double_int_to_tree (sizetype, tem));
6744 }
6745
6746 *pbitpos = bit_offset.to_shwi ();
6747 *poffset = offset;
6748 }
6749
6750 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
6751 if (mode == VOIDmode
6752 && blkmode_bitfield
6753 && (*pbitpos % BITS_PER_UNIT) == 0
6754 && (*pbitsize % BITS_PER_UNIT) == 0)
6755 *pmode = BLKmode;
6756 else
6757 *pmode = mode;
6758
6759 return exp;
6760 }
6761
6762 /* Return a tree of sizetype representing the size, in bytes, of the element
6763 of EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6764
6765 tree
array_ref_element_size(tree exp)6766 array_ref_element_size (tree exp)
6767 {
6768 tree aligned_size = TREE_OPERAND (exp, 3);
6769 tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)));
6770 location_t loc = EXPR_LOCATION (exp);
6771
6772 /* If a size was specified in the ARRAY_REF, it's the size measured
6773 in alignment units of the element type. So multiply by that value. */
6774 if (aligned_size)
6775 {
6776 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6777 sizetype from another type of the same width and signedness. */
6778 if (TREE_TYPE (aligned_size) != sizetype)
6779 aligned_size = fold_convert_loc (loc, sizetype, aligned_size);
6780 return size_binop_loc (loc, MULT_EXPR, aligned_size,
6781 size_int (TYPE_ALIGN_UNIT (elmt_type)));
6782 }
6783
6784 /* Otherwise, take the size from that of the element type. Substitute
6785 any PLACEHOLDER_EXPR that we have. */
6786 else
6787 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp);
6788 }
6789
6790 /* Return a tree representing the lower bound of the array mentioned in
6791 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6792
6793 tree
array_ref_low_bound(tree exp)6794 array_ref_low_bound (tree exp)
6795 {
6796 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6797
6798 /* If a lower bound is specified in EXP, use it. */
6799 if (TREE_OPERAND (exp, 2))
6800 return TREE_OPERAND (exp, 2);
6801
6802 /* Otherwise, if there is a domain type and it has a lower bound, use it,
6803 substituting for a PLACEHOLDER_EXPR as needed. */
6804 if (domain_type && TYPE_MIN_VALUE (domain_type))
6805 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp);
6806
6807 /* Otherwise, return a zero of the appropriate type. */
6808 return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0);
6809 }
6810
6811 /* Returns true if REF is an array reference to an array at the end of
6812 a structure. If this is the case, the array may be allocated larger
6813 than its upper bound implies. */
6814
6815 bool
array_at_struct_end_p(tree ref)6816 array_at_struct_end_p (tree ref)
6817 {
6818 if (TREE_CODE (ref) != ARRAY_REF
6819 && TREE_CODE (ref) != ARRAY_RANGE_REF)
6820 return false;
6821
6822 while (handled_component_p (ref))
6823 {
6824 /* If the reference chain contains a component reference to a
6825 non-union type and there follows another field the reference
6826 is not at the end of a structure. */
6827 if (TREE_CODE (ref) == COMPONENT_REF
6828 && TREE_CODE (TREE_TYPE (TREE_OPERAND (ref, 0))) == RECORD_TYPE)
6829 {
6830 tree nextf = DECL_CHAIN (TREE_OPERAND (ref, 1));
6831 while (nextf && TREE_CODE (nextf) != FIELD_DECL)
6832 nextf = DECL_CHAIN (nextf);
6833 if (nextf)
6834 return false;
6835 }
6836
6837 ref = TREE_OPERAND (ref, 0);
6838 }
6839
6840 /* If the reference is based on a declared entity, the size of the array
6841 is constrained by its given domain. */
6842 if (DECL_P (ref))
6843 return false;
6844
6845 return true;
6846 }
6847
6848 /* Return a tree representing the upper bound of the array mentioned in
6849 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6850
6851 tree
array_ref_up_bound(tree exp)6852 array_ref_up_bound (tree exp)
6853 {
6854 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6855
6856 /* If there is a domain type and it has an upper bound, use it, substituting
6857 for a PLACEHOLDER_EXPR as needed. */
6858 if (domain_type && TYPE_MAX_VALUE (domain_type))
6859 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp);
6860
6861 /* Otherwise fail. */
6862 return NULL_TREE;
6863 }
6864
6865 /* Return a tree representing the offset, in bytes, of the field referenced
6866 by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
6867
6868 tree
component_ref_field_offset(tree exp)6869 component_ref_field_offset (tree exp)
6870 {
6871 tree aligned_offset = TREE_OPERAND (exp, 2);
6872 tree field = TREE_OPERAND (exp, 1);
6873 location_t loc = EXPR_LOCATION (exp);
6874
6875 /* If an offset was specified in the COMPONENT_REF, it's the offset measured
6876 in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that
6877 value. */
6878 if (aligned_offset)
6879 {
6880 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6881 sizetype from another type of the same width and signedness. */
6882 if (TREE_TYPE (aligned_offset) != sizetype)
6883 aligned_offset = fold_convert_loc (loc, sizetype, aligned_offset);
6884 return size_binop_loc (loc, MULT_EXPR, aligned_offset,
6885 size_int (DECL_OFFSET_ALIGN (field)
6886 / BITS_PER_UNIT));
6887 }
6888
6889 /* Otherwise, take the offset from that of the field. Substitute
6890 any PLACEHOLDER_EXPR that we have. */
6891 else
6892 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp);
6893 }
6894
6895 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
6896
6897 static unsigned HOST_WIDE_INT
target_align(const_tree target)6898 target_align (const_tree target)
6899 {
6900 /* We might have a chain of nested references with intermediate misaligning
6901 bitfields components, so need to recurse to find out. */
6902
6903 unsigned HOST_WIDE_INT this_align, outer_align;
6904
6905 switch (TREE_CODE (target))
6906 {
6907 case BIT_FIELD_REF:
6908 return 1;
6909
6910 case COMPONENT_REF:
6911 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
6912 outer_align = target_align (TREE_OPERAND (target, 0));
6913 return MIN (this_align, outer_align);
6914
6915 case ARRAY_REF:
6916 case ARRAY_RANGE_REF:
6917 this_align = TYPE_ALIGN (TREE_TYPE (target));
6918 outer_align = target_align (TREE_OPERAND (target, 0));
6919 return MIN (this_align, outer_align);
6920
6921 CASE_CONVERT:
6922 case NON_LVALUE_EXPR:
6923 case VIEW_CONVERT_EXPR:
6924 this_align = TYPE_ALIGN (TREE_TYPE (target));
6925 outer_align = target_align (TREE_OPERAND (target, 0));
6926 return MAX (this_align, outer_align);
6927
6928 default:
6929 return TYPE_ALIGN (TREE_TYPE (target));
6930 }
6931 }
6932
6933
6934 /* Given an rtx VALUE that may contain additions and multiplications, return
6935 an equivalent value that just refers to a register, memory, or constant.
6936 This is done by generating instructions to perform the arithmetic and
6937 returning a pseudo-register containing the value.
6938
6939 The returned value may be a REG, SUBREG, MEM or constant. */
6940
6941 rtx
force_operand(rtx value,rtx target)6942 force_operand (rtx value, rtx target)
6943 {
6944 rtx op1, op2;
6945 /* Use subtarget as the target for operand 0 of a binary operation. */
6946 rtx subtarget = get_subtarget (target);
6947 enum rtx_code code = GET_CODE (value);
6948
6949 /* Check for subreg applied to an expression produced by loop optimizer. */
6950 if (code == SUBREG
6951 && !REG_P (SUBREG_REG (value))
6952 && !MEM_P (SUBREG_REG (value)))
6953 {
6954 value
6955 = simplify_gen_subreg (GET_MODE (value),
6956 force_reg (GET_MODE (SUBREG_REG (value)),
6957 force_operand (SUBREG_REG (value),
6958 NULL_RTX)),
6959 GET_MODE (SUBREG_REG (value)),
6960 SUBREG_BYTE (value));
6961 code = GET_CODE (value);
6962 }
6963
6964 /* Check for a PIC address load. */
6965 if ((code == PLUS || code == MINUS)
6966 && XEXP (value, 0) == pic_offset_table_rtx
6967 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
6968 || GET_CODE (XEXP (value, 1)) == LABEL_REF
6969 || GET_CODE (XEXP (value, 1)) == CONST))
6970 {
6971 if (!subtarget)
6972 subtarget = gen_reg_rtx (GET_MODE (value));
6973 emit_move_insn (subtarget, value);
6974 return subtarget;
6975 }
6976
6977 if (ARITHMETIC_P (value))
6978 {
6979 op2 = XEXP (value, 1);
6980 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
6981 subtarget = 0;
6982 if (code == MINUS && CONST_INT_P (op2))
6983 {
6984 code = PLUS;
6985 op2 = negate_rtx (GET_MODE (value), op2);
6986 }
6987
6988 /* Check for an addition with OP2 a constant integer and our first
6989 operand a PLUS of a virtual register and something else. In that
6990 case, we want to emit the sum of the virtual register and the
6991 constant first and then add the other value. This allows virtual
6992 register instantiation to simply modify the constant rather than
6993 creating another one around this addition. */
6994 if (code == PLUS && CONST_INT_P (op2)
6995 && GET_CODE (XEXP (value, 0)) == PLUS
6996 && REG_P (XEXP (XEXP (value, 0), 0))
6997 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
6998 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
6999 {
7000 rtx temp = expand_simple_binop (GET_MODE (value), code,
7001 XEXP (XEXP (value, 0), 0), op2,
7002 subtarget, 0, OPTAB_LIB_WIDEN);
7003 return expand_simple_binop (GET_MODE (value), code, temp,
7004 force_operand (XEXP (XEXP (value,
7005 0), 1), 0),
7006 target, 0, OPTAB_LIB_WIDEN);
7007 }
7008
7009 op1 = force_operand (XEXP (value, 0), subtarget);
7010 op2 = force_operand (op2, NULL_RTX);
7011 switch (code)
7012 {
7013 case MULT:
7014 return expand_mult (GET_MODE (value), op1, op2, target, 1);
7015 case DIV:
7016 if (!INTEGRAL_MODE_P (GET_MODE (value)))
7017 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7018 target, 1, OPTAB_LIB_WIDEN);
7019 else
7020 return expand_divmod (0,
7021 FLOAT_MODE_P (GET_MODE (value))
7022 ? RDIV_EXPR : TRUNC_DIV_EXPR,
7023 GET_MODE (value), op1, op2, target, 0);
7024 case MOD:
7025 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7026 target, 0);
7027 case UDIV:
7028 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
7029 target, 1);
7030 case UMOD:
7031 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7032 target, 1);
7033 case ASHIFTRT:
7034 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7035 target, 0, OPTAB_LIB_WIDEN);
7036 default:
7037 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7038 target, 1, OPTAB_LIB_WIDEN);
7039 }
7040 }
7041 if (UNARY_P (value))
7042 {
7043 if (!target)
7044 target = gen_reg_rtx (GET_MODE (value));
7045 op1 = force_operand (XEXP (value, 0), NULL_RTX);
7046 switch (code)
7047 {
7048 case ZERO_EXTEND:
7049 case SIGN_EXTEND:
7050 case TRUNCATE:
7051 case FLOAT_EXTEND:
7052 case FLOAT_TRUNCATE:
7053 convert_move (target, op1, code == ZERO_EXTEND);
7054 return target;
7055
7056 case FIX:
7057 case UNSIGNED_FIX:
7058 expand_fix (target, op1, code == UNSIGNED_FIX);
7059 return target;
7060
7061 case FLOAT:
7062 case UNSIGNED_FLOAT:
7063 expand_float (target, op1, code == UNSIGNED_FLOAT);
7064 return target;
7065
7066 default:
7067 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
7068 }
7069 }
7070
7071 #ifdef INSN_SCHEDULING
7072 /* On machines that have insn scheduling, we want all memory reference to be
7073 explicit, so we need to deal with such paradoxical SUBREGs. */
7074 if (paradoxical_subreg_p (value) && MEM_P (SUBREG_REG (value)))
7075 value
7076 = simplify_gen_subreg (GET_MODE (value),
7077 force_reg (GET_MODE (SUBREG_REG (value)),
7078 force_operand (SUBREG_REG (value),
7079 NULL_RTX)),
7080 GET_MODE (SUBREG_REG (value)),
7081 SUBREG_BYTE (value));
7082 #endif
7083
7084 return value;
7085 }
7086
7087 /* Subroutine of expand_expr: return nonzero iff there is no way that
7088 EXP can reference X, which is being modified. TOP_P is nonzero if this
7089 call is going to be used to determine whether we need a temporary
7090 for EXP, as opposed to a recursive call to this function.
7091
7092 It is always safe for this routine to return zero since it merely
7093 searches for optimization opportunities. */
7094
7095 int
safe_from_p(const_rtx x,tree exp,int top_p)7096 safe_from_p (const_rtx x, tree exp, int top_p)
7097 {
7098 rtx exp_rtl = 0;
7099 int i, nops;
7100
7101 if (x == 0
7102 /* If EXP has varying size, we MUST use a target since we currently
7103 have no way of allocating temporaries of variable size
7104 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7105 So we assume here that something at a higher level has prevented a
7106 clash. This is somewhat bogus, but the best we can do. Only
7107 do this when X is BLKmode and when we are at the top level. */
7108 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
7109 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
7110 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
7111 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
7112 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
7113 != INTEGER_CST)
7114 && GET_MODE (x) == BLKmode)
7115 /* If X is in the outgoing argument area, it is always safe. */
7116 || (MEM_P (x)
7117 && (XEXP (x, 0) == virtual_outgoing_args_rtx
7118 || (GET_CODE (XEXP (x, 0)) == PLUS
7119 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
7120 return 1;
7121
7122 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7123 find the underlying pseudo. */
7124 if (GET_CODE (x) == SUBREG)
7125 {
7126 x = SUBREG_REG (x);
7127 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7128 return 0;
7129 }
7130
7131 /* Now look at our tree code and possibly recurse. */
7132 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
7133 {
7134 case tcc_declaration:
7135 exp_rtl = DECL_RTL_IF_SET (exp);
7136 break;
7137
7138 case tcc_constant:
7139 return 1;
7140
7141 case tcc_exceptional:
7142 if (TREE_CODE (exp) == TREE_LIST)
7143 {
7144 while (1)
7145 {
7146 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
7147 return 0;
7148 exp = TREE_CHAIN (exp);
7149 if (!exp)
7150 return 1;
7151 if (TREE_CODE (exp) != TREE_LIST)
7152 return safe_from_p (x, exp, 0);
7153 }
7154 }
7155 else if (TREE_CODE (exp) == CONSTRUCTOR)
7156 {
7157 constructor_elt *ce;
7158 unsigned HOST_WIDE_INT idx;
7159
7160 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp), idx, ce)
7161 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
7162 || !safe_from_p (x, ce->value, 0))
7163 return 0;
7164 return 1;
7165 }
7166 else if (TREE_CODE (exp) == ERROR_MARK)
7167 return 1; /* An already-visited SAVE_EXPR? */
7168 else
7169 return 0;
7170
7171 case tcc_statement:
7172 /* The only case we look at here is the DECL_INITIAL inside a
7173 DECL_EXPR. */
7174 return (TREE_CODE (exp) != DECL_EXPR
7175 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
7176 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
7177 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
7178
7179 case tcc_binary:
7180 case tcc_comparison:
7181 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
7182 return 0;
7183 /* Fall through. */
7184
7185 case tcc_unary:
7186 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7187
7188 case tcc_expression:
7189 case tcc_reference:
7190 case tcc_vl_exp:
7191 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7192 the expression. If it is set, we conflict iff we are that rtx or
7193 both are in memory. Otherwise, we check all operands of the
7194 expression recursively. */
7195
7196 switch (TREE_CODE (exp))
7197 {
7198 case ADDR_EXPR:
7199 /* If the operand is static or we are static, we can't conflict.
7200 Likewise if we don't conflict with the operand at all. */
7201 if (staticp (TREE_OPERAND (exp, 0))
7202 || TREE_STATIC (exp)
7203 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
7204 return 1;
7205
7206 /* Otherwise, the only way this can conflict is if we are taking
7207 the address of a DECL a that address if part of X, which is
7208 very rare. */
7209 exp = TREE_OPERAND (exp, 0);
7210 if (DECL_P (exp))
7211 {
7212 if (!DECL_RTL_SET_P (exp)
7213 || !MEM_P (DECL_RTL (exp)))
7214 return 0;
7215 else
7216 exp_rtl = XEXP (DECL_RTL (exp), 0);
7217 }
7218 break;
7219
7220 case MEM_REF:
7221 if (MEM_P (x)
7222 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
7223 get_alias_set (exp)))
7224 return 0;
7225 break;
7226
7227 case CALL_EXPR:
7228 /* Assume that the call will clobber all hard registers and
7229 all of memory. */
7230 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7231 || MEM_P (x))
7232 return 0;
7233 break;
7234
7235 case WITH_CLEANUP_EXPR:
7236 case CLEANUP_POINT_EXPR:
7237 /* Lowered by gimplify.c. */
7238 gcc_unreachable ();
7239
7240 case SAVE_EXPR:
7241 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7242
7243 default:
7244 break;
7245 }
7246
7247 /* If we have an rtx, we do not need to scan our operands. */
7248 if (exp_rtl)
7249 break;
7250
7251 nops = TREE_OPERAND_LENGTH (exp);
7252 for (i = 0; i < nops; i++)
7253 if (TREE_OPERAND (exp, i) != 0
7254 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
7255 return 0;
7256
7257 break;
7258
7259 case tcc_type:
7260 /* Should never get a type here. */
7261 gcc_unreachable ();
7262 }
7263
7264 /* If we have an rtl, find any enclosed object. Then see if we conflict
7265 with it. */
7266 if (exp_rtl)
7267 {
7268 if (GET_CODE (exp_rtl) == SUBREG)
7269 {
7270 exp_rtl = SUBREG_REG (exp_rtl);
7271 if (REG_P (exp_rtl)
7272 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
7273 return 0;
7274 }
7275
7276 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7277 are memory and they conflict. */
7278 return ! (rtx_equal_p (x, exp_rtl)
7279 || (MEM_P (x) && MEM_P (exp_rtl)
7280 && true_dependence (exp_rtl, VOIDmode, x)));
7281 }
7282
7283 /* If we reach here, it is safe. */
7284 return 1;
7285 }
7286
7287
7288 /* Return the highest power of two that EXP is known to be a multiple of.
7289 This is used in updating alignment of MEMs in array references. */
7290
7291 unsigned HOST_WIDE_INT
highest_pow2_factor(const_tree exp)7292 highest_pow2_factor (const_tree exp)
7293 {
7294 unsigned HOST_WIDE_INT c0, c1;
7295
7296 switch (TREE_CODE (exp))
7297 {
7298 case INTEGER_CST:
7299 /* We can find the lowest bit that's a one. If the low
7300 HOST_BITS_PER_WIDE_INT bits are zero, return BIGGEST_ALIGNMENT.
7301 We need to handle this case since we can find it in a COND_EXPR,
7302 a MIN_EXPR, or a MAX_EXPR. If the constant overflows, we have an
7303 erroneous program, so return BIGGEST_ALIGNMENT to avoid any
7304 later ICE. */
7305 if (TREE_OVERFLOW (exp))
7306 return BIGGEST_ALIGNMENT;
7307 else
7308 {
7309 /* Note: tree_low_cst is intentionally not used here,
7310 we don't care about the upper bits. */
7311 c0 = TREE_INT_CST_LOW (exp);
7312 c0 &= -c0;
7313 return c0 ? c0 : BIGGEST_ALIGNMENT;
7314 }
7315 break;
7316
7317 case PLUS_EXPR: case MINUS_EXPR: case MIN_EXPR: case MAX_EXPR:
7318 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7319 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7320 return MIN (c0, c1);
7321
7322 case MULT_EXPR:
7323 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7324 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7325 return c0 * c1;
7326
7327 case ROUND_DIV_EXPR: case TRUNC_DIV_EXPR: case FLOOR_DIV_EXPR:
7328 case CEIL_DIV_EXPR:
7329 if (integer_pow2p (TREE_OPERAND (exp, 1))
7330 && host_integerp (TREE_OPERAND (exp, 1), 1))
7331 {
7332 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7333 c1 = tree_low_cst (TREE_OPERAND (exp, 1), 1);
7334 return MAX (1, c0 / c1);
7335 }
7336 break;
7337
7338 case BIT_AND_EXPR:
7339 /* The highest power of two of a bit-and expression is the maximum of
7340 that of its operands. We typically get here for a complex LHS and
7341 a constant negative power of two on the RHS to force an explicit
7342 alignment, so don't bother looking at the LHS. */
7343 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7344
7345 CASE_CONVERT:
7346 case SAVE_EXPR:
7347 return highest_pow2_factor (TREE_OPERAND (exp, 0));
7348
7349 case COMPOUND_EXPR:
7350 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7351
7352 case COND_EXPR:
7353 c0 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7354 c1 = highest_pow2_factor (TREE_OPERAND (exp, 2));
7355 return MIN (c0, c1);
7356
7357 default:
7358 break;
7359 }
7360
7361 return 1;
7362 }
7363
7364 /* Similar, except that the alignment requirements of TARGET are
7365 taken into account. Assume it is at least as aligned as its
7366 type, unless it is a COMPONENT_REF in which case the layout of
7367 the structure gives the alignment. */
7368
7369 static unsigned HOST_WIDE_INT
highest_pow2_factor_for_target(const_tree target,const_tree exp)7370 highest_pow2_factor_for_target (const_tree target, const_tree exp)
7371 {
7372 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
7373 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
7374
7375 return MAX (factor, talign);
7376 }
7377
7378 #ifdef HAVE_conditional_move
7379 /* Convert the tree comparison code TCODE to the rtl one where the
7380 signedness is UNSIGNEDP. */
7381
7382 static enum rtx_code
convert_tree_comp_to_rtx(enum tree_code tcode,int unsignedp)7383 convert_tree_comp_to_rtx (enum tree_code tcode, int unsignedp)
7384 {
7385 enum rtx_code code;
7386 switch (tcode)
7387 {
7388 case EQ_EXPR:
7389 code = EQ;
7390 break;
7391 case NE_EXPR:
7392 code = NE;
7393 break;
7394 case LT_EXPR:
7395 code = unsignedp ? LTU : LT;
7396 break;
7397 case LE_EXPR:
7398 code = unsignedp ? LEU : LE;
7399 break;
7400 case GT_EXPR:
7401 code = unsignedp ? GTU : GT;
7402 break;
7403 case GE_EXPR:
7404 code = unsignedp ? GEU : GE;
7405 break;
7406 case UNORDERED_EXPR:
7407 code = UNORDERED;
7408 break;
7409 case ORDERED_EXPR:
7410 code = ORDERED;
7411 break;
7412 case UNLT_EXPR:
7413 code = UNLT;
7414 break;
7415 case UNLE_EXPR:
7416 code = UNLE;
7417 break;
7418 case UNGT_EXPR:
7419 code = UNGT;
7420 break;
7421 case UNGE_EXPR:
7422 code = UNGE;
7423 break;
7424 case UNEQ_EXPR:
7425 code = UNEQ;
7426 break;
7427 case LTGT_EXPR:
7428 code = LTGT;
7429 break;
7430
7431 default:
7432 gcc_unreachable ();
7433 }
7434 return code;
7435 }
7436 #endif
7437
7438 /* Subroutine of expand_expr. Expand the two operands of a binary
7439 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7440 The value may be stored in TARGET if TARGET is nonzero. The
7441 MODIFIER argument is as documented by expand_expr. */
7442
7443 static void
expand_operands(tree exp0,tree exp1,rtx target,rtx * op0,rtx * op1,enum expand_modifier modifier)7444 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
7445 enum expand_modifier modifier)
7446 {
7447 if (! safe_from_p (target, exp1, 1))
7448 target = 0;
7449 if (operand_equal_p (exp0, exp1, 0))
7450 {
7451 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7452 *op1 = copy_rtx (*op0);
7453 }
7454 else
7455 {
7456 /* If we need to preserve evaluation order, copy exp0 into its own
7457 temporary variable so that it can't be clobbered by exp1. */
7458 if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1))
7459 exp0 = save_expr (exp0);
7460 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7461 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
7462 }
7463 }
7464
7465
7466 /* Return a MEM that contains constant EXP. DEFER is as for
7467 output_constant_def and MODIFIER is as for expand_expr. */
7468
7469 static rtx
expand_expr_constant(tree exp,int defer,enum expand_modifier modifier)7470 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
7471 {
7472 rtx mem;
7473
7474 mem = output_constant_def (exp, defer);
7475 if (modifier != EXPAND_INITIALIZER)
7476 mem = use_anchored_address (mem);
7477 return mem;
7478 }
7479
7480 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7481 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7482
7483 static rtx
expand_expr_addr_expr_1(tree exp,rtx target,enum machine_mode tmode,enum expand_modifier modifier,addr_space_t as)7484 expand_expr_addr_expr_1 (tree exp, rtx target, enum machine_mode tmode,
7485 enum expand_modifier modifier, addr_space_t as)
7486 {
7487 rtx result, subtarget;
7488 tree inner, offset;
7489 HOST_WIDE_INT bitsize, bitpos;
7490 int volatilep, unsignedp;
7491 enum machine_mode mode1;
7492
7493 /* If we are taking the address of a constant and are at the top level,
7494 we have to use output_constant_def since we can't call force_const_mem
7495 at top level. */
7496 /* ??? This should be considered a front-end bug. We should not be
7497 generating ADDR_EXPR of something that isn't an LVALUE. The only
7498 exception here is STRING_CST. */
7499 if (CONSTANT_CLASS_P (exp))
7500 {
7501 result = XEXP (expand_expr_constant (exp, 0, modifier), 0);
7502 if (modifier < EXPAND_SUM)
7503 result = force_operand (result, target);
7504 return result;
7505 }
7506
7507 /* Everything must be something allowed by is_gimple_addressable. */
7508 switch (TREE_CODE (exp))
7509 {
7510 case INDIRECT_REF:
7511 /* This case will happen via recursion for &a->b. */
7512 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
7513
7514 case MEM_REF:
7515 {
7516 tree tem = TREE_OPERAND (exp, 0);
7517 if (!integer_zerop (TREE_OPERAND (exp, 1)))
7518 tem = fold_build_pointer_plus (tem, TREE_OPERAND (exp, 1));
7519 return expand_expr (tem, target, tmode, modifier);
7520 }
7521
7522 case CONST_DECL:
7523 /* Expand the initializer like constants above. */
7524 result = XEXP (expand_expr_constant (DECL_INITIAL (exp),
7525 0, modifier), 0);
7526 if (modifier < EXPAND_SUM)
7527 result = force_operand (result, target);
7528 return result;
7529
7530 case REALPART_EXPR:
7531 /* The real part of the complex number is always first, therefore
7532 the address is the same as the address of the parent object. */
7533 offset = 0;
7534 bitpos = 0;
7535 inner = TREE_OPERAND (exp, 0);
7536 break;
7537
7538 case IMAGPART_EXPR:
7539 /* The imaginary part of the complex number is always second.
7540 The expression is therefore always offset by the size of the
7541 scalar type. */
7542 offset = 0;
7543 bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)));
7544 inner = TREE_OPERAND (exp, 0);
7545 break;
7546
7547 case COMPOUND_LITERAL_EXPR:
7548 /* Allow COMPOUND_LITERAL_EXPR in initializers or coming from
7549 initializers, if e.g. rtl_for_decl_init is called on DECL_INITIAL
7550 with COMPOUND_LITERAL_EXPRs in it, or ARRAY_REF on a const static
7551 array with address of COMPOUND_LITERAL_EXPR in DECL_INITIAL;
7552 the initializers aren't gimplified. */
7553 if (COMPOUND_LITERAL_EXPR_DECL (exp)
7554 && TREE_STATIC (COMPOUND_LITERAL_EXPR_DECL (exp)))
7555 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp),
7556 target, tmode, modifier, as);
7557 /* FALLTHRU */
7558 default:
7559 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7560 expand_expr, as that can have various side effects; LABEL_DECLs for
7561 example, may not have their DECL_RTL set yet. Expand the rtl of
7562 CONSTRUCTORs too, which should yield a memory reference for the
7563 constructor's contents. Assume language specific tree nodes can
7564 be expanded in some interesting way. */
7565 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
7566 if (DECL_P (exp)
7567 || TREE_CODE (exp) == CONSTRUCTOR
7568 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
7569 {
7570 result = expand_expr (exp, target, tmode,
7571 modifier == EXPAND_INITIALIZER
7572 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
7573
7574 /* If the DECL isn't in memory, then the DECL wasn't properly
7575 marked TREE_ADDRESSABLE, which will be either a front-end
7576 or a tree optimizer bug. */
7577
7578 if (TREE_ADDRESSABLE (exp)
7579 && ! MEM_P (result)
7580 && ! targetm.calls.allocate_stack_slots_for_args())
7581 {
7582 error ("local frame unavailable (naked function?)");
7583 return result;
7584 }
7585 else
7586 gcc_assert (MEM_P (result));
7587 result = XEXP (result, 0);
7588
7589 /* ??? Is this needed anymore? */
7590 if (DECL_P (exp))
7591 TREE_USED (exp) = 1;
7592
7593 if (modifier != EXPAND_INITIALIZER
7594 && modifier != EXPAND_CONST_ADDRESS
7595 && modifier != EXPAND_SUM)
7596 result = force_operand (result, target);
7597 return result;
7598 }
7599
7600 /* Pass FALSE as the last argument to get_inner_reference although
7601 we are expanding to RTL. The rationale is that we know how to
7602 handle "aligning nodes" here: we can just bypass them because
7603 they won't change the final object whose address will be returned
7604 (they actually exist only for that purpose). */
7605 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset,
7606 &mode1, &unsignedp, &volatilep, false);
7607 break;
7608 }
7609
7610 /* We must have made progress. */
7611 gcc_assert (inner != exp);
7612
7613 subtarget = offset || bitpos ? NULL_RTX : target;
7614 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7615 inner alignment, force the inner to be sufficiently aligned. */
7616 if (CONSTANT_CLASS_P (inner)
7617 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
7618 {
7619 inner = copy_node (inner);
7620 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
7621 TYPE_ALIGN (TREE_TYPE (inner)) = TYPE_ALIGN (TREE_TYPE (exp));
7622 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
7623 }
7624 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as);
7625
7626 if (offset)
7627 {
7628 rtx tmp;
7629
7630 if (modifier != EXPAND_NORMAL)
7631 result = force_operand (result, NULL);
7632 tmp = expand_expr (offset, NULL_RTX, tmode,
7633 modifier == EXPAND_INITIALIZER
7634 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
7635
7636 result = convert_memory_address_addr_space (tmode, result, as);
7637 tmp = convert_memory_address_addr_space (tmode, tmp, as);
7638
7639 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7640 result = simplify_gen_binary (PLUS, tmode, result, tmp);
7641 else
7642 {
7643 subtarget = bitpos ? NULL_RTX : target;
7644 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
7645 1, OPTAB_LIB_WIDEN);
7646 }
7647 }
7648
7649 if (bitpos)
7650 {
7651 /* Someone beforehand should have rejected taking the address
7652 of such an object. */
7653 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
7654
7655 result = convert_memory_address_addr_space (tmode, result, as);
7656 result = plus_constant (tmode, result, bitpos / BITS_PER_UNIT);
7657 if (modifier < EXPAND_SUM)
7658 result = force_operand (result, target);
7659 }
7660
7661 return result;
7662 }
7663
7664 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7665 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7666
7667 static rtx
expand_expr_addr_expr(tree exp,rtx target,enum machine_mode tmode,enum expand_modifier modifier)7668 expand_expr_addr_expr (tree exp, rtx target, enum machine_mode tmode,
7669 enum expand_modifier modifier)
7670 {
7671 addr_space_t as = ADDR_SPACE_GENERIC;
7672 enum machine_mode address_mode = Pmode;
7673 enum machine_mode pointer_mode = ptr_mode;
7674 enum machine_mode rmode;
7675 rtx result;
7676
7677 /* Target mode of VOIDmode says "whatever's natural". */
7678 if (tmode == VOIDmode)
7679 tmode = TYPE_MODE (TREE_TYPE (exp));
7680
7681 if (POINTER_TYPE_P (TREE_TYPE (exp)))
7682 {
7683 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp)));
7684 address_mode = targetm.addr_space.address_mode (as);
7685 pointer_mode = targetm.addr_space.pointer_mode (as);
7686 }
7687
7688 /* We can get called with some Weird Things if the user does silliness
7689 like "(short) &a". In that case, convert_memory_address won't do
7690 the right thing, so ignore the given target mode. */
7691 if (tmode != address_mode && tmode != pointer_mode)
7692 tmode = address_mode;
7693
7694 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
7695 tmode, modifier, as);
7696
7697 /* Despite expand_expr claims concerning ignoring TMODE when not
7698 strictly convenient, stuff breaks if we don't honor it. Note
7699 that combined with the above, we only do this for pointer modes. */
7700 rmode = GET_MODE (result);
7701 if (rmode == VOIDmode)
7702 rmode = tmode;
7703 if (rmode != tmode)
7704 result = convert_memory_address_addr_space (tmode, result, as);
7705
7706 return result;
7707 }
7708
7709 /* Generate code for computing CONSTRUCTOR EXP.
7710 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7711 is TRUE, instead of creating a temporary variable in memory
7712 NULL is returned and the caller needs to handle it differently. */
7713
7714 static rtx
expand_constructor(tree exp,rtx target,enum expand_modifier modifier,bool avoid_temp_mem)7715 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
7716 bool avoid_temp_mem)
7717 {
7718 tree type = TREE_TYPE (exp);
7719 enum machine_mode mode = TYPE_MODE (type);
7720
7721 /* Try to avoid creating a temporary at all. This is possible
7722 if all of the initializer is zero.
7723 FIXME: try to handle all [0..255] initializers we can handle
7724 with memset. */
7725 if (TREE_STATIC (exp)
7726 && !TREE_ADDRESSABLE (exp)
7727 && target != 0 && mode == BLKmode
7728 && all_zeros_p (exp))
7729 {
7730 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
7731 return target;
7732 }
7733
7734 /* All elts simple constants => refer to a constant in memory. But
7735 if this is a non-BLKmode mode, let it store a field at a time
7736 since that should make a CONST_INT or CONST_DOUBLE when we
7737 fold. Likewise, if we have a target we can use, it is best to
7738 store directly into the target unless the type is large enough
7739 that memcpy will be used. If we are making an initializer and
7740 all operands are constant, put it in memory as well.
7741
7742 FIXME: Avoid trying to fill vector constructors piece-meal.
7743 Output them with output_constant_def below unless we're sure
7744 they're zeros. This should go away when vector initializers
7745 are treated like VECTOR_CST instead of arrays. */
7746 if ((TREE_STATIC (exp)
7747 && ((mode == BLKmode
7748 && ! (target != 0 && safe_from_p (target, exp, 1)))
7749 || TREE_ADDRESSABLE (exp)
7750 || (host_integerp (TYPE_SIZE_UNIT (type), 1)
7751 && (! MOVE_BY_PIECES_P
7752 (tree_low_cst (TYPE_SIZE_UNIT (type), 1),
7753 TYPE_ALIGN (type)))
7754 && ! mostly_zeros_p (exp))))
7755 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
7756 && TREE_CONSTANT (exp)))
7757 {
7758 rtx constructor;
7759
7760 if (avoid_temp_mem)
7761 return NULL_RTX;
7762
7763 constructor = expand_expr_constant (exp, 1, modifier);
7764
7765 if (modifier != EXPAND_CONST_ADDRESS
7766 && modifier != EXPAND_INITIALIZER
7767 && modifier != EXPAND_SUM)
7768 constructor = validize_mem (constructor);
7769
7770 return constructor;
7771 }
7772
7773 /* Handle calls that pass values in multiple non-contiguous
7774 locations. The Irix 6 ABI has examples of this. */
7775 if (target == 0 || ! safe_from_p (target, exp, 1)
7776 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
7777 {
7778 if (avoid_temp_mem)
7779 return NULL_RTX;
7780
7781 target
7782 = assign_temp (build_qualified_type (type, (TYPE_QUALS (type)
7783 | (TREE_READONLY (exp)
7784 * TYPE_QUAL_CONST))),
7785 TREE_ADDRESSABLE (exp), 1);
7786 }
7787
7788 store_constructor (exp, target, 0, int_expr_size (exp));
7789 return target;
7790 }
7791
7792
7793 /* expand_expr: generate code for computing expression EXP.
7794 An rtx for the computed value is returned. The value is never null.
7795 In the case of a void EXP, const0_rtx is returned.
7796
7797 The value may be stored in TARGET if TARGET is nonzero.
7798 TARGET is just a suggestion; callers must assume that
7799 the rtx returned may not be the same as TARGET.
7800
7801 If TARGET is CONST0_RTX, it means that the value will be ignored.
7802
7803 If TMODE is not VOIDmode, it suggests generating the
7804 result in mode TMODE. But this is done only when convenient.
7805 Otherwise, TMODE is ignored and the value generated in its natural mode.
7806 TMODE is just a suggestion; callers must assume that
7807 the rtx returned may not have mode TMODE.
7808
7809 Note that TARGET may have neither TMODE nor MODE. In that case, it
7810 probably will not be used.
7811
7812 If MODIFIER is EXPAND_SUM then when EXP is an addition
7813 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
7814 or a nest of (PLUS ...) and (MINUS ...) where the terms are
7815 products as above, or REG or MEM, or constant.
7816 Ordinarily in such cases we would output mul or add instructions
7817 and then return a pseudo reg containing the sum.
7818
7819 EXPAND_INITIALIZER is much like EXPAND_SUM except that
7820 it also marks a label as absolutely required (it can't be dead).
7821 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
7822 This is used for outputting expressions used in initializers.
7823
7824 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
7825 with a constant address even if that address is not normally legitimate.
7826 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
7827
7828 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
7829 a call parameter. Such targets require special care as we haven't yet
7830 marked TARGET so that it's safe from being trashed by libcalls. We
7831 don't want to use TARGET for anything but the final result;
7832 Intermediate values must go elsewhere. Additionally, calls to
7833 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
7834
7835 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
7836 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
7837 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
7838 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
7839 recursively.
7840
7841 If INNER_REFERENCE_P is true, we are expanding an inner reference.
7842 In this case, we don't adjust a returned MEM rtx that wouldn't be
7843 sufficiently aligned for its mode; instead, it's up to the caller
7844 to deal with it afterwards. This is used to make sure that unaligned
7845 base objects for which out-of-bounds accesses are supported, for
7846 example record types with trailing arrays, aren't realigned behind
7847 the back of the caller.
7848 The normal operating mode is to pass FALSE for this parameter. */
7849
7850 rtx
expand_expr_real(tree exp,rtx target,enum machine_mode tmode,enum expand_modifier modifier,rtx * alt_rtl,bool inner_reference_p)7851 expand_expr_real (tree exp, rtx target, enum machine_mode tmode,
7852 enum expand_modifier modifier, rtx *alt_rtl,
7853 bool inner_reference_p)
7854 {
7855 rtx ret;
7856
7857 /* Handle ERROR_MARK before anybody tries to access its type. */
7858 if (TREE_CODE (exp) == ERROR_MARK
7859 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
7860 {
7861 ret = CONST0_RTX (tmode);
7862 return ret ? ret : const0_rtx;
7863 }
7864
7865 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl,
7866 inner_reference_p);
7867 return ret;
7868 }
7869
7870 /* Try to expand the conditional expression which is represented by
7871 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If succeseds
7872 return the rtl reg which repsents the result. Otherwise return
7873 NULL_RTL. */
7874
7875 static rtx
expand_cond_expr_using_cmove(tree treeop0 ATTRIBUTE_UNUSED,tree treeop1 ATTRIBUTE_UNUSED,tree treeop2 ATTRIBUTE_UNUSED)7876 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED,
7877 tree treeop1 ATTRIBUTE_UNUSED,
7878 tree treeop2 ATTRIBUTE_UNUSED)
7879 {
7880 #ifdef HAVE_conditional_move
7881 rtx insn;
7882 rtx op00, op01, op1, op2;
7883 enum rtx_code comparison_code;
7884 enum machine_mode comparison_mode;
7885 gimple srcstmt;
7886 rtx temp;
7887 tree type = TREE_TYPE (treeop1);
7888 int unsignedp = TYPE_UNSIGNED (type);
7889 enum machine_mode mode = TYPE_MODE (type);
7890 enum machine_mode orig_mode = mode;
7891
7892 /* If we cannot do a conditional move on the mode, try doing it
7893 with the promoted mode. */
7894 if (!can_conditionally_move_p (mode))
7895 {
7896 mode = promote_mode (type, mode, &unsignedp);
7897 if (!can_conditionally_move_p (mode))
7898 return NULL_RTX;
7899 temp = assign_temp (type, 0, 0); /* Use promoted mode for temp. */
7900 }
7901 else
7902 temp = assign_temp (type, 0, 1);
7903
7904 start_sequence ();
7905 expand_operands (treeop1, treeop2,
7906 temp, &op1, &op2, EXPAND_NORMAL);
7907
7908 if (TREE_CODE (treeop0) == SSA_NAME
7909 && (srcstmt = get_def_for_expr_class (treeop0, tcc_comparison)))
7910 {
7911 tree type = TREE_TYPE (gimple_assign_rhs1 (srcstmt));
7912 enum tree_code cmpcode = gimple_assign_rhs_code (srcstmt);
7913 op00 = expand_normal (gimple_assign_rhs1 (srcstmt));
7914 op01 = expand_normal (gimple_assign_rhs2 (srcstmt));
7915 comparison_mode = TYPE_MODE (type);
7916 unsignedp = TYPE_UNSIGNED (type);
7917 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
7918 }
7919 else if (TREE_CODE_CLASS (TREE_CODE (treeop0)) == tcc_comparison)
7920 {
7921 tree type = TREE_TYPE (TREE_OPERAND (treeop0, 0));
7922 enum tree_code cmpcode = TREE_CODE (treeop0);
7923 op00 = expand_normal (TREE_OPERAND (treeop0, 0));
7924 op01 = expand_normal (TREE_OPERAND (treeop0, 1));
7925 unsignedp = TYPE_UNSIGNED (type);
7926 comparison_mode = TYPE_MODE (type);
7927 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
7928 }
7929 else
7930 {
7931 op00 = expand_normal (treeop0);
7932 op01 = const0_rtx;
7933 comparison_code = NE;
7934 comparison_mode = TYPE_MODE (TREE_TYPE (treeop0));
7935 }
7936
7937 if (GET_MODE (op1) != mode)
7938 op1 = gen_lowpart (mode, op1);
7939
7940 if (GET_MODE (op2) != mode)
7941 op2 = gen_lowpart (mode, op2);
7942
7943 /* Try to emit the conditional move. */
7944 insn = emit_conditional_move (temp, comparison_code,
7945 op00, op01, comparison_mode,
7946 op1, op2, mode,
7947 unsignedp);
7948
7949 /* If we could do the conditional move, emit the sequence,
7950 and return. */
7951 if (insn)
7952 {
7953 rtx seq = get_insns ();
7954 end_sequence ();
7955 emit_insn (seq);
7956 return convert_modes (orig_mode, mode, temp, 0);
7957 }
7958
7959 /* Otherwise discard the sequence and fall back to code with
7960 branches. */
7961 end_sequence ();
7962 #endif
7963 return NULL_RTX;
7964 }
7965
7966 rtx
expand_expr_real_2(sepops ops,rtx target,enum machine_mode tmode,enum expand_modifier modifier)7967 expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode,
7968 enum expand_modifier modifier)
7969 {
7970 rtx op0, op1, op2, temp;
7971 tree type;
7972 int unsignedp;
7973 enum machine_mode mode;
7974 enum tree_code code = ops->code;
7975 optab this_optab;
7976 rtx subtarget, original_target;
7977 int ignore;
7978 bool reduce_bit_field;
7979 location_t loc = ops->location;
7980 tree treeop0, treeop1, treeop2;
7981 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
7982 ? reduce_to_bit_field_precision ((expr), \
7983 target, \
7984 type) \
7985 : (expr))
7986
7987 type = ops->type;
7988 mode = TYPE_MODE (type);
7989 unsignedp = TYPE_UNSIGNED (type);
7990
7991 treeop0 = ops->op0;
7992 treeop1 = ops->op1;
7993 treeop2 = ops->op2;
7994
7995 /* We should be called only on simple (binary or unary) expressions,
7996 exactly those that are valid in gimple expressions that aren't
7997 GIMPLE_SINGLE_RHS (or invalid). */
7998 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
7999 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
8000 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
8001
8002 ignore = (target == const0_rtx
8003 || ((CONVERT_EXPR_CODE_P (code)
8004 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
8005 && TREE_CODE (type) == VOID_TYPE));
8006
8007 /* We should be called only if we need the result. */
8008 gcc_assert (!ignore);
8009
8010 /* An operation in what may be a bit-field type needs the
8011 result to be reduced to the precision of the bit-field type,
8012 which is narrower than that of the type's mode. */
8013 reduce_bit_field = (INTEGRAL_TYPE_P (type)
8014 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
8015
8016 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
8017 target = 0;
8018
8019 /* Use subtarget as the target for operand 0 of a binary operation. */
8020 subtarget = get_subtarget (target);
8021 original_target = target;
8022
8023 switch (code)
8024 {
8025 case NON_LVALUE_EXPR:
8026 case PAREN_EXPR:
8027 CASE_CONVERT:
8028 if (treeop0 == error_mark_node)
8029 return const0_rtx;
8030
8031 if (TREE_CODE (type) == UNION_TYPE)
8032 {
8033 tree valtype = TREE_TYPE (treeop0);
8034
8035 /* If both input and output are BLKmode, this conversion isn't doing
8036 anything except possibly changing memory attribute. */
8037 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
8038 {
8039 rtx result = expand_expr (treeop0, target, tmode,
8040 modifier);
8041
8042 result = copy_rtx (result);
8043 set_mem_attributes (result, type, 0);
8044 return result;
8045 }
8046
8047 if (target == 0)
8048 {
8049 if (TYPE_MODE (type) != BLKmode)
8050 target = gen_reg_rtx (TYPE_MODE (type));
8051 else
8052 target = assign_temp (type, 1, 1);
8053 }
8054
8055 if (MEM_P (target))
8056 /* Store data into beginning of memory target. */
8057 store_expr (treeop0,
8058 adjust_address (target, TYPE_MODE (valtype), 0),
8059 modifier == EXPAND_STACK_PARM,
8060 false);
8061
8062 else
8063 {
8064 gcc_assert (REG_P (target));
8065
8066 /* Store this field into a union of the proper type. */
8067 store_field (target,
8068 MIN ((int_size_in_bytes (TREE_TYPE
8069 (treeop0))
8070 * BITS_PER_UNIT),
8071 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
8072 0, 0, 0, TYPE_MODE (valtype), treeop0, 0, false);
8073 }
8074
8075 /* Return the entire union. */
8076 return target;
8077 }
8078
8079 if (mode == TYPE_MODE (TREE_TYPE (treeop0)))
8080 {
8081 op0 = expand_expr (treeop0, target, VOIDmode,
8082 modifier);
8083
8084 /* If the signedness of the conversion differs and OP0 is
8085 a promoted SUBREG, clear that indication since we now
8086 have to do the proper extension. */
8087 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp
8088 && GET_CODE (op0) == SUBREG)
8089 SUBREG_PROMOTED_VAR_P (op0) = 0;
8090
8091 return REDUCE_BIT_FIELD (op0);
8092 }
8093
8094 op0 = expand_expr (treeop0, NULL_RTX, mode,
8095 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
8096 if (GET_MODE (op0) == mode)
8097 ;
8098
8099 /* If OP0 is a constant, just convert it into the proper mode. */
8100 else if (CONSTANT_P (op0))
8101 {
8102 tree inner_type = TREE_TYPE (treeop0);
8103 enum machine_mode inner_mode = GET_MODE (op0);
8104
8105 if (inner_mode == VOIDmode)
8106 inner_mode = TYPE_MODE (inner_type);
8107
8108 if (modifier == EXPAND_INITIALIZER)
8109 op0 = simplify_gen_subreg (mode, op0, inner_mode,
8110 subreg_lowpart_offset (mode,
8111 inner_mode));
8112 else
8113 op0= convert_modes (mode, inner_mode, op0,
8114 TYPE_UNSIGNED (inner_type));
8115 }
8116
8117 else if (modifier == EXPAND_INITIALIZER)
8118 op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
8119
8120 else if (target == 0)
8121 op0 = convert_to_mode (mode, op0,
8122 TYPE_UNSIGNED (TREE_TYPE
8123 (treeop0)));
8124 else
8125 {
8126 convert_move (target, op0,
8127 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8128 op0 = target;
8129 }
8130
8131 return REDUCE_BIT_FIELD (op0);
8132
8133 case ADDR_SPACE_CONVERT_EXPR:
8134 {
8135 tree treeop0_type = TREE_TYPE (treeop0);
8136 addr_space_t as_to;
8137 addr_space_t as_from;
8138
8139 gcc_assert (POINTER_TYPE_P (type));
8140 gcc_assert (POINTER_TYPE_P (treeop0_type));
8141
8142 as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
8143 as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
8144
8145 /* Conversions between pointers to the same address space should
8146 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8147 gcc_assert (as_to != as_from);
8148
8149 /* Ask target code to handle conversion between pointers
8150 to overlapping address spaces. */
8151 if (targetm.addr_space.subset_p (as_to, as_from)
8152 || targetm.addr_space.subset_p (as_from, as_to))
8153 {
8154 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
8155 op0 = targetm.addr_space.convert (op0, treeop0_type, type);
8156 gcc_assert (op0);
8157 return op0;
8158 }
8159
8160 /* For disjoint address spaces, converting anything but
8161 a null pointer invokes undefined behaviour. We simply
8162 always return a null pointer here. */
8163 return CONST0_RTX (mode);
8164 }
8165
8166 case POINTER_PLUS_EXPR:
8167 /* Even though the sizetype mode and the pointer's mode can be different
8168 expand is able to handle this correctly and get the correct result out
8169 of the PLUS_EXPR code. */
8170 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8171 if sizetype precision is smaller than pointer precision. */
8172 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
8173 treeop1 = fold_convert_loc (loc, type,
8174 fold_convert_loc (loc, ssizetype,
8175 treeop1));
8176 /* If sizetype precision is larger than pointer precision, truncate the
8177 offset to have matching modes. */
8178 else if (TYPE_PRECISION (sizetype) > TYPE_PRECISION (type))
8179 treeop1 = fold_convert_loc (loc, type, treeop1);
8180
8181 case PLUS_EXPR:
8182 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8183 something else, make sure we add the register to the constant and
8184 then to the other thing. This case can occur during strength
8185 reduction and doing it this way will produce better code if the
8186 frame pointer or argument pointer is eliminated.
8187
8188 fold-const.c will ensure that the constant is always in the inner
8189 PLUS_EXPR, so the only case we need to do anything about is if
8190 sp, ap, or fp is our second argument, in which case we must swap
8191 the innermost first argument and our second argument. */
8192
8193 if (TREE_CODE (treeop0) == PLUS_EXPR
8194 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST
8195 && TREE_CODE (treeop1) == VAR_DECL
8196 && (DECL_RTL (treeop1) == frame_pointer_rtx
8197 || DECL_RTL (treeop1) == stack_pointer_rtx
8198 || DECL_RTL (treeop1) == arg_pointer_rtx))
8199 {
8200 gcc_unreachable ();
8201 }
8202
8203 /* If the result is to be ptr_mode and we are adding an integer to
8204 something, we might be forming a constant. So try to use
8205 plus_constant. If it produces a sum and we can't accept it,
8206 use force_operand. This allows P = &ARR[const] to generate
8207 efficient code on machines where a SYMBOL_REF is not a valid
8208 address.
8209
8210 If this is an EXPAND_SUM call, always return the sum. */
8211 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
8212 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
8213 {
8214 if (modifier == EXPAND_STACK_PARM)
8215 target = 0;
8216 if (TREE_CODE (treeop0) == INTEGER_CST
8217 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8218 && TREE_CONSTANT (treeop1))
8219 {
8220 rtx constant_part;
8221
8222 op1 = expand_expr (treeop1, subtarget, VOIDmode,
8223 EXPAND_SUM);
8224 /* Use immed_double_const to ensure that the constant is
8225 truncated according to the mode of OP1, then sign extended
8226 to a HOST_WIDE_INT. Using the constant directly can result
8227 in non-canonical RTL in a 64x32 cross compile. */
8228 constant_part
8229 = immed_double_const (TREE_INT_CST_LOW (treeop0),
8230 (HOST_WIDE_INT) 0,
8231 TYPE_MODE (TREE_TYPE (treeop1)));
8232 op1 = plus_constant (mode, op1, INTVAL (constant_part));
8233 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8234 op1 = force_operand (op1, target);
8235 return REDUCE_BIT_FIELD (op1);
8236 }
8237
8238 else if (TREE_CODE (treeop1) == INTEGER_CST
8239 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8240 && TREE_CONSTANT (treeop0))
8241 {
8242 rtx constant_part;
8243
8244 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8245 (modifier == EXPAND_INITIALIZER
8246 ? EXPAND_INITIALIZER : EXPAND_SUM));
8247 if (! CONSTANT_P (op0))
8248 {
8249 op1 = expand_expr (treeop1, NULL_RTX,
8250 VOIDmode, modifier);
8251 /* Return a PLUS if modifier says it's OK. */
8252 if (modifier == EXPAND_SUM
8253 || modifier == EXPAND_INITIALIZER)
8254 return simplify_gen_binary (PLUS, mode, op0, op1);
8255 goto binop2;
8256 }
8257 /* Use immed_double_const to ensure that the constant is
8258 truncated according to the mode of OP1, then sign extended
8259 to a HOST_WIDE_INT. Using the constant directly can result
8260 in non-canonical RTL in a 64x32 cross compile. */
8261 constant_part
8262 = immed_double_const (TREE_INT_CST_LOW (treeop1),
8263 (HOST_WIDE_INT) 0,
8264 TYPE_MODE (TREE_TYPE (treeop0)));
8265 op0 = plus_constant (mode, op0, INTVAL (constant_part));
8266 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8267 op0 = force_operand (op0, target);
8268 return REDUCE_BIT_FIELD (op0);
8269 }
8270 }
8271
8272 /* Use TER to expand pointer addition of a negated value
8273 as pointer subtraction. */
8274 if ((POINTER_TYPE_P (TREE_TYPE (treeop0))
8275 || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE
8276 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0)))))
8277 && TREE_CODE (treeop1) == SSA_NAME
8278 && TYPE_MODE (TREE_TYPE (treeop0))
8279 == TYPE_MODE (TREE_TYPE (treeop1)))
8280 {
8281 gimple def = get_def_for_expr (treeop1, NEGATE_EXPR);
8282 if (def)
8283 {
8284 treeop1 = gimple_assign_rhs1 (def);
8285 code = MINUS_EXPR;
8286 goto do_minus;
8287 }
8288 }
8289
8290 /* No sense saving up arithmetic to be done
8291 if it's all in the wrong mode to form part of an address.
8292 And force_operand won't know whether to sign-extend or
8293 zero-extend. */
8294 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8295 || mode != ptr_mode)
8296 {
8297 expand_operands (treeop0, treeop1,
8298 subtarget, &op0, &op1, EXPAND_NORMAL);
8299 if (op0 == const0_rtx)
8300 return op1;
8301 if (op1 == const0_rtx)
8302 return op0;
8303 goto binop2;
8304 }
8305
8306 expand_operands (treeop0, treeop1,
8307 subtarget, &op0, &op1, modifier);
8308 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8309
8310 case MINUS_EXPR:
8311 do_minus:
8312 /* For initializers, we are allowed to return a MINUS of two
8313 symbolic constants. Here we handle all cases when both operands
8314 are constant. */
8315 /* Handle difference of two symbolic constants,
8316 for the sake of an initializer. */
8317 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
8318 && really_constant_p (treeop0)
8319 && really_constant_p (treeop1))
8320 {
8321 expand_operands (treeop0, treeop1,
8322 NULL_RTX, &op0, &op1, modifier);
8323
8324 /* If the last operand is a CONST_INT, use plus_constant of
8325 the negated constant. Else make the MINUS. */
8326 if (CONST_INT_P (op1))
8327 return REDUCE_BIT_FIELD (plus_constant (mode, op0,
8328 -INTVAL (op1)));
8329 else
8330 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1));
8331 }
8332
8333 /* No sense saving up arithmetic to be done
8334 if it's all in the wrong mode to form part of an address.
8335 And force_operand won't know whether to sign-extend or
8336 zero-extend. */
8337 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8338 || mode != ptr_mode)
8339 goto binop;
8340
8341 expand_operands (treeop0, treeop1,
8342 subtarget, &op0, &op1, modifier);
8343
8344 /* Convert A - const to A + (-const). */
8345 if (CONST_INT_P (op1))
8346 {
8347 op1 = negate_rtx (mode, op1);
8348 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8349 }
8350
8351 goto binop2;
8352
8353 case WIDEN_MULT_PLUS_EXPR:
8354 case WIDEN_MULT_MINUS_EXPR:
8355 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8356 op2 = expand_normal (treeop2);
8357 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8358 target, unsignedp);
8359 return target;
8360
8361 case WIDEN_MULT_EXPR:
8362 /* If first operand is constant, swap them.
8363 Thus the following special case checks need only
8364 check the second operand. */
8365 if (TREE_CODE (treeop0) == INTEGER_CST)
8366 {
8367 tree t1 = treeop0;
8368 treeop0 = treeop1;
8369 treeop1 = t1;
8370 }
8371
8372 /* First, check if we have a multiplication of one signed and one
8373 unsigned operand. */
8374 if (TREE_CODE (treeop1) != INTEGER_CST
8375 && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
8376 != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
8377 {
8378 enum machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
8379 this_optab = usmul_widen_optab;
8380 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8381 != CODE_FOR_nothing)
8382 {
8383 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8384 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8385 EXPAND_NORMAL);
8386 else
8387 expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0,
8388 EXPAND_NORMAL);
8389 /* op0 and op1 might still be constant, despite the above
8390 != INTEGER_CST check. Handle it. */
8391 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8392 {
8393 op0 = convert_modes (innermode, mode, op0, true);
8394 op1 = convert_modes (innermode, mode, op1, false);
8395 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1,
8396 target, unsignedp));
8397 }
8398 goto binop3;
8399 }
8400 }
8401 /* Check for a multiplication with matching signedness. */
8402 else if ((TREE_CODE (treeop1) == INTEGER_CST
8403 && int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
8404 || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
8405 == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
8406 {
8407 tree op0type = TREE_TYPE (treeop0);
8408 enum machine_mode innermode = TYPE_MODE (op0type);
8409 bool zextend_p = TYPE_UNSIGNED (op0type);
8410 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
8411 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
8412
8413 if (TREE_CODE (treeop0) != INTEGER_CST)
8414 {
8415 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8416 != CODE_FOR_nothing)
8417 {
8418 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8419 EXPAND_NORMAL);
8420 /* op0 and op1 might still be constant, despite the above
8421 != INTEGER_CST check. Handle it. */
8422 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8423 {
8424 widen_mult_const:
8425 op0 = convert_modes (innermode, mode, op0, zextend_p);
8426 op1
8427 = convert_modes (innermode, mode, op1,
8428 TYPE_UNSIGNED (TREE_TYPE (treeop1)));
8429 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1,
8430 target,
8431 unsignedp));
8432 }
8433 temp = expand_widening_mult (mode, op0, op1, target,
8434 unsignedp, this_optab);
8435 return REDUCE_BIT_FIELD (temp);
8436 }
8437 if (find_widening_optab_handler (other_optab, mode, innermode, 0)
8438 != CODE_FOR_nothing
8439 && innermode == word_mode)
8440 {
8441 rtx htem, hipart;
8442 op0 = expand_normal (treeop0);
8443 if (TREE_CODE (treeop1) == INTEGER_CST)
8444 op1 = convert_modes (innermode, mode,
8445 expand_normal (treeop1),
8446 TYPE_UNSIGNED (TREE_TYPE (treeop1)));
8447 else
8448 op1 = expand_normal (treeop1);
8449 /* op0 and op1 might still be constant, despite the above
8450 != INTEGER_CST check. Handle it. */
8451 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8452 goto widen_mult_const;
8453 temp = expand_binop (mode, other_optab, op0, op1, target,
8454 unsignedp, OPTAB_LIB_WIDEN);
8455 hipart = gen_highpart (innermode, temp);
8456 htem = expand_mult_highpart_adjust (innermode, hipart,
8457 op0, op1, hipart,
8458 zextend_p);
8459 if (htem != hipart)
8460 emit_move_insn (hipart, htem);
8461 return REDUCE_BIT_FIELD (temp);
8462 }
8463 }
8464 }
8465 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
8466 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
8467 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8468 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8469
8470 case FMA_EXPR:
8471 {
8472 optab opt = fma_optab;
8473 gimple def0, def2;
8474
8475 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8476 call. */
8477 if (optab_handler (fma_optab, mode) == CODE_FOR_nothing)
8478 {
8479 tree fn = mathfn_built_in (TREE_TYPE (treeop0), BUILT_IN_FMA);
8480 tree call_expr;
8481
8482 gcc_assert (fn != NULL_TREE);
8483 call_expr = build_call_expr (fn, 3, treeop0, treeop1, treeop2);
8484 return expand_builtin (call_expr, target, subtarget, mode, false);
8485 }
8486
8487 def0 = get_def_for_expr (treeop0, NEGATE_EXPR);
8488 def2 = get_def_for_expr (treeop2, NEGATE_EXPR);
8489
8490 op0 = op2 = NULL;
8491
8492 if (def0 && def2
8493 && optab_handler (fnms_optab, mode) != CODE_FOR_nothing)
8494 {
8495 opt = fnms_optab;
8496 op0 = expand_normal (gimple_assign_rhs1 (def0));
8497 op2 = expand_normal (gimple_assign_rhs1 (def2));
8498 }
8499 else if (def0
8500 && optab_handler (fnma_optab, mode) != CODE_FOR_nothing)
8501 {
8502 opt = fnma_optab;
8503 op0 = expand_normal (gimple_assign_rhs1 (def0));
8504 }
8505 else if (def2
8506 && optab_handler (fms_optab, mode) != CODE_FOR_nothing)
8507 {
8508 opt = fms_optab;
8509 op2 = expand_normal (gimple_assign_rhs1 (def2));
8510 }
8511
8512 if (op0 == NULL)
8513 op0 = expand_expr (treeop0, subtarget, VOIDmode, EXPAND_NORMAL);
8514 if (op2 == NULL)
8515 op2 = expand_normal (treeop2);
8516 op1 = expand_normal (treeop1);
8517
8518 return expand_ternary_op (TYPE_MODE (type), opt,
8519 op0, op1, op2, target, 0);
8520 }
8521
8522 case MULT_EXPR:
8523 /* If this is a fixed-point operation, then we cannot use the code
8524 below because "expand_mult" doesn't support sat/no-sat fixed-point
8525 multiplications. */
8526 if (ALL_FIXED_POINT_MODE_P (mode))
8527 goto binop;
8528
8529 /* If first operand is constant, swap them.
8530 Thus the following special case checks need only
8531 check the second operand. */
8532 if (TREE_CODE (treeop0) == INTEGER_CST)
8533 {
8534 tree t1 = treeop0;
8535 treeop0 = treeop1;
8536 treeop1 = t1;
8537 }
8538
8539 /* Attempt to return something suitable for generating an
8540 indexed address, for machines that support that. */
8541
8542 if (modifier == EXPAND_SUM && mode == ptr_mode
8543 && host_integerp (treeop1, 0))
8544 {
8545 tree exp1 = treeop1;
8546
8547 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8548 EXPAND_SUM);
8549
8550 if (!REG_P (op0))
8551 op0 = force_operand (op0, NULL_RTX);
8552 if (!REG_P (op0))
8553 op0 = copy_to_mode_reg (mode, op0);
8554
8555 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
8556 gen_int_mode (tree_low_cst (exp1, 0),
8557 TYPE_MODE (TREE_TYPE (exp1)))));
8558 }
8559
8560 if (modifier == EXPAND_STACK_PARM)
8561 target = 0;
8562
8563 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8564 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8565
8566 case TRUNC_DIV_EXPR:
8567 case FLOOR_DIV_EXPR:
8568 case CEIL_DIV_EXPR:
8569 case ROUND_DIV_EXPR:
8570 case EXACT_DIV_EXPR:
8571 /* If this is a fixed-point operation, then we cannot use the code
8572 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8573 divisions. */
8574 if (ALL_FIXED_POINT_MODE_P (mode))
8575 goto binop;
8576
8577 if (modifier == EXPAND_STACK_PARM)
8578 target = 0;
8579 /* Possible optimization: compute the dividend with EXPAND_SUM
8580 then if the divisor is constant can optimize the case
8581 where some terms of the dividend have coeffs divisible by it. */
8582 expand_operands (treeop0, treeop1,
8583 subtarget, &op0, &op1, EXPAND_NORMAL);
8584 return expand_divmod (0, code, mode, op0, op1, target, unsignedp);
8585
8586 case RDIV_EXPR:
8587 goto binop;
8588
8589 case MULT_HIGHPART_EXPR:
8590 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8591 temp = expand_mult_highpart (mode, op0, op1, target, unsignedp);
8592 gcc_assert (temp);
8593 return temp;
8594
8595 case TRUNC_MOD_EXPR:
8596 case FLOOR_MOD_EXPR:
8597 case CEIL_MOD_EXPR:
8598 case ROUND_MOD_EXPR:
8599 if (modifier == EXPAND_STACK_PARM)
8600 target = 0;
8601 expand_operands (treeop0, treeop1,
8602 subtarget, &op0, &op1, EXPAND_NORMAL);
8603 return expand_divmod (1, code, mode, op0, op1, target, unsignedp);
8604
8605 case FIXED_CONVERT_EXPR:
8606 op0 = expand_normal (treeop0);
8607 if (target == 0 || modifier == EXPAND_STACK_PARM)
8608 target = gen_reg_rtx (mode);
8609
8610 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE
8611 && TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8612 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
8613 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
8614 else
8615 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
8616 return target;
8617
8618 case FIX_TRUNC_EXPR:
8619 op0 = expand_normal (treeop0);
8620 if (target == 0 || modifier == EXPAND_STACK_PARM)
8621 target = gen_reg_rtx (mode);
8622 expand_fix (target, op0, unsignedp);
8623 return target;
8624
8625 case FLOAT_EXPR:
8626 op0 = expand_normal (treeop0);
8627 if (target == 0 || modifier == EXPAND_STACK_PARM)
8628 target = gen_reg_rtx (mode);
8629 /* expand_float can't figure out what to do if FROM has VOIDmode.
8630 So give it the correct mode. With -O, cse will optimize this. */
8631 if (GET_MODE (op0) == VOIDmode)
8632 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)),
8633 op0);
8634 expand_float (target, op0,
8635 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8636 return target;
8637
8638 case NEGATE_EXPR:
8639 op0 = expand_expr (treeop0, subtarget,
8640 VOIDmode, EXPAND_NORMAL);
8641 if (modifier == EXPAND_STACK_PARM)
8642 target = 0;
8643 temp = expand_unop (mode,
8644 optab_for_tree_code (NEGATE_EXPR, type,
8645 optab_default),
8646 op0, target, 0);
8647 gcc_assert (temp);
8648 return REDUCE_BIT_FIELD (temp);
8649
8650 case ABS_EXPR:
8651 op0 = expand_expr (treeop0, subtarget,
8652 VOIDmode, EXPAND_NORMAL);
8653 if (modifier == EXPAND_STACK_PARM)
8654 target = 0;
8655
8656 /* ABS_EXPR is not valid for complex arguments. */
8657 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
8658 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
8659
8660 /* Unsigned abs is simply the operand. Testing here means we don't
8661 risk generating incorrect code below. */
8662 if (TYPE_UNSIGNED (type))
8663 return op0;
8664
8665 return expand_abs (mode, op0, target, unsignedp,
8666 safe_from_p (target, treeop0, 1));
8667
8668 case MAX_EXPR:
8669 case MIN_EXPR:
8670 target = original_target;
8671 if (target == 0
8672 || modifier == EXPAND_STACK_PARM
8673 || (MEM_P (target) && MEM_VOLATILE_P (target))
8674 || GET_MODE (target) != mode
8675 || (REG_P (target)
8676 && REGNO (target) < FIRST_PSEUDO_REGISTER))
8677 target = gen_reg_rtx (mode);
8678 expand_operands (treeop0, treeop1,
8679 target, &op0, &op1, EXPAND_NORMAL);
8680
8681 /* First try to do it with a special MIN or MAX instruction.
8682 If that does not win, use a conditional jump to select the proper
8683 value. */
8684 this_optab = optab_for_tree_code (code, type, optab_default);
8685 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8686 OPTAB_WIDEN);
8687 if (temp != 0)
8688 return temp;
8689
8690 /* At this point, a MEM target is no longer useful; we will get better
8691 code without it. */
8692
8693 if (! REG_P (target))
8694 target = gen_reg_rtx (mode);
8695
8696 /* If op1 was placed in target, swap op0 and op1. */
8697 if (target != op0 && target == op1)
8698 {
8699 temp = op0;
8700 op0 = op1;
8701 op1 = temp;
8702 }
8703
8704 /* We generate better code and avoid problems with op1 mentioning
8705 target by forcing op1 into a pseudo if it isn't a constant. */
8706 if (! CONSTANT_P (op1))
8707 op1 = force_reg (mode, op1);
8708
8709 {
8710 enum rtx_code comparison_code;
8711 rtx cmpop1 = op1;
8712
8713 if (code == MAX_EXPR)
8714 comparison_code = unsignedp ? GEU : GE;
8715 else
8716 comparison_code = unsignedp ? LEU : LE;
8717
8718 /* Canonicalize to comparisons against 0. */
8719 if (op1 == const1_rtx)
8720 {
8721 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
8722 or (a != 0 ? a : 1) for unsigned.
8723 For MIN we are safe converting (a <= 1 ? a : 1)
8724 into (a <= 0 ? a : 1) */
8725 cmpop1 = const0_rtx;
8726 if (code == MAX_EXPR)
8727 comparison_code = unsignedp ? NE : GT;
8728 }
8729 if (op1 == constm1_rtx && !unsignedp)
8730 {
8731 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
8732 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
8733 cmpop1 = const0_rtx;
8734 if (code == MIN_EXPR)
8735 comparison_code = LT;
8736 }
8737 #ifdef HAVE_conditional_move
8738 /* Use a conditional move if possible. */
8739 if (can_conditionally_move_p (mode))
8740 {
8741 rtx insn;
8742
8743 /* ??? Same problem as in expmed.c: emit_conditional_move
8744 forces a stack adjustment via compare_from_rtx, and we
8745 lose the stack adjustment if the sequence we are about
8746 to create is discarded. */
8747 do_pending_stack_adjust ();
8748
8749 start_sequence ();
8750
8751 /* Try to emit the conditional move. */
8752 insn = emit_conditional_move (target, comparison_code,
8753 op0, cmpop1, mode,
8754 op0, op1, mode,
8755 unsignedp);
8756
8757 /* If we could do the conditional move, emit the sequence,
8758 and return. */
8759 if (insn)
8760 {
8761 rtx seq = get_insns ();
8762 end_sequence ();
8763 emit_insn (seq);
8764 return target;
8765 }
8766
8767 /* Otherwise discard the sequence and fall back to code with
8768 branches. */
8769 end_sequence ();
8770 }
8771 #endif
8772 if (target != op0)
8773 emit_move_insn (target, op0);
8774
8775 temp = gen_label_rtx ();
8776 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
8777 unsignedp, mode, NULL_RTX, NULL_RTX, temp,
8778 -1);
8779 }
8780 emit_move_insn (target, op1);
8781 emit_label (temp);
8782 return target;
8783
8784 case BIT_NOT_EXPR:
8785 op0 = expand_expr (treeop0, subtarget,
8786 VOIDmode, EXPAND_NORMAL);
8787 if (modifier == EXPAND_STACK_PARM)
8788 target = 0;
8789 /* In case we have to reduce the result to bitfield precision
8790 for unsigned bitfield expand this as XOR with a proper constant
8791 instead. */
8792 if (reduce_bit_field && TYPE_UNSIGNED (type))
8793 temp = expand_binop (mode, xor_optab, op0,
8794 immed_double_int_const
8795 (double_int::mask (TYPE_PRECISION (type)), mode),
8796 target, 1, OPTAB_LIB_WIDEN);
8797 else
8798 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
8799 gcc_assert (temp);
8800 return temp;
8801
8802 /* ??? Can optimize bitwise operations with one arg constant.
8803 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
8804 and (a bitwise1 b) bitwise2 b (etc)
8805 but that is probably not worth while. */
8806
8807 case BIT_AND_EXPR:
8808 case BIT_IOR_EXPR:
8809 case BIT_XOR_EXPR:
8810 goto binop;
8811
8812 case LROTATE_EXPR:
8813 case RROTATE_EXPR:
8814 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
8815 || (GET_MODE_PRECISION (TYPE_MODE (type))
8816 == TYPE_PRECISION (type)));
8817 /* fall through */
8818
8819 case LSHIFT_EXPR:
8820 case RSHIFT_EXPR:
8821 /* If this is a fixed-point operation, then we cannot use the code
8822 below because "expand_shift" doesn't support sat/no-sat fixed-point
8823 shifts. */
8824 if (ALL_FIXED_POINT_MODE_P (mode))
8825 goto binop;
8826
8827 if (! safe_from_p (subtarget, treeop1, 1))
8828 subtarget = 0;
8829 if (modifier == EXPAND_STACK_PARM)
8830 target = 0;
8831 op0 = expand_expr (treeop0, subtarget,
8832 VOIDmode, EXPAND_NORMAL);
8833 temp = expand_variable_shift (code, mode, op0, treeop1, target,
8834 unsignedp);
8835 if (code == LSHIFT_EXPR)
8836 temp = REDUCE_BIT_FIELD (temp);
8837 return temp;
8838
8839 /* Could determine the answer when only additive constants differ. Also,
8840 the addition of one can be handled by changing the condition. */
8841 case LT_EXPR:
8842 case LE_EXPR:
8843 case GT_EXPR:
8844 case GE_EXPR:
8845 case EQ_EXPR:
8846 case NE_EXPR:
8847 case UNORDERED_EXPR:
8848 case ORDERED_EXPR:
8849 case UNLT_EXPR:
8850 case UNLE_EXPR:
8851 case UNGT_EXPR:
8852 case UNGE_EXPR:
8853 case UNEQ_EXPR:
8854 case LTGT_EXPR:
8855 temp = do_store_flag (ops,
8856 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
8857 tmode != VOIDmode ? tmode : mode);
8858 if (temp)
8859 return temp;
8860
8861 /* Use a compare and a jump for BLKmode comparisons, or for function
8862 type comparisons is HAVE_canonicalize_funcptr_for_compare. */
8863
8864 if ((target == 0
8865 || modifier == EXPAND_STACK_PARM
8866 || ! safe_from_p (target, treeop0, 1)
8867 || ! safe_from_p (target, treeop1, 1)
8868 /* Make sure we don't have a hard reg (such as function's return
8869 value) live across basic blocks, if not optimizing. */
8870 || (!optimize && REG_P (target)
8871 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
8872 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
8873
8874 emit_move_insn (target, const0_rtx);
8875
8876 op1 = gen_label_rtx ();
8877 jumpifnot_1 (code, treeop0, treeop1, op1, -1);
8878
8879 if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type))
8880 emit_move_insn (target, constm1_rtx);
8881 else
8882 emit_move_insn (target, const1_rtx);
8883
8884 emit_label (op1);
8885 return target;
8886
8887 case COMPLEX_EXPR:
8888 /* Get the rtx code of the operands. */
8889 op0 = expand_normal (treeop0);
8890 op1 = expand_normal (treeop1);
8891
8892 if (!target)
8893 target = gen_reg_rtx (TYPE_MODE (type));
8894 else
8895 /* If target overlaps with op1, then either we need to force
8896 op1 into a pseudo (if target also overlaps with op0),
8897 or write the complex parts in reverse order. */
8898 switch (GET_CODE (target))
8899 {
8900 case CONCAT:
8901 if (reg_overlap_mentioned_p (XEXP (target, 0), op1))
8902 {
8903 if (reg_overlap_mentioned_p (XEXP (target, 1), op0))
8904 {
8905 complex_expr_force_op1:
8906 temp = gen_reg_rtx (GET_MODE_INNER (GET_MODE (target)));
8907 emit_move_insn (temp, op1);
8908 op1 = temp;
8909 break;
8910 }
8911 complex_expr_swap_order:
8912 /* Move the imaginary (op1) and real (op0) parts to their
8913 location. */
8914 write_complex_part (target, op1, true);
8915 write_complex_part (target, op0, false);
8916
8917 return target;
8918 }
8919 break;
8920 case MEM:
8921 temp = adjust_address_nv (target,
8922 GET_MODE_INNER (GET_MODE (target)), 0);
8923 if (reg_overlap_mentioned_p (temp, op1))
8924 {
8925 enum machine_mode imode = GET_MODE_INNER (GET_MODE (target));
8926 temp = adjust_address_nv (target, imode,
8927 GET_MODE_SIZE (imode));
8928 if (reg_overlap_mentioned_p (temp, op0))
8929 goto complex_expr_force_op1;
8930 goto complex_expr_swap_order;
8931 }
8932 break;
8933 default:
8934 if (reg_overlap_mentioned_p (target, op1))
8935 {
8936 if (reg_overlap_mentioned_p (target, op0))
8937 goto complex_expr_force_op1;
8938 goto complex_expr_swap_order;
8939 }
8940 break;
8941 }
8942
8943 /* Move the real (op0) and imaginary (op1) parts to their location. */
8944 write_complex_part (target, op0, false);
8945 write_complex_part (target, op1, true);
8946
8947 return target;
8948
8949 case WIDEN_SUM_EXPR:
8950 {
8951 tree oprnd0 = treeop0;
8952 tree oprnd1 = treeop1;
8953
8954 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8955 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1,
8956 target, unsignedp);
8957 return target;
8958 }
8959
8960 case REDUC_MAX_EXPR:
8961 case REDUC_MIN_EXPR:
8962 case REDUC_PLUS_EXPR:
8963 {
8964 op0 = expand_normal (treeop0);
8965 this_optab = optab_for_tree_code (code, type, optab_default);
8966 temp = expand_unop (mode, this_optab, op0, target, unsignedp);
8967 gcc_assert (temp);
8968 return temp;
8969 }
8970
8971 case VEC_LSHIFT_EXPR:
8972 case VEC_RSHIFT_EXPR:
8973 {
8974 target = expand_vec_shift_expr (ops, target);
8975 return target;
8976 }
8977
8978 case VEC_UNPACK_HI_EXPR:
8979 case VEC_UNPACK_LO_EXPR:
8980 {
8981 op0 = expand_normal (treeop0);
8982 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX,
8983 target, unsignedp);
8984 gcc_assert (temp);
8985 return temp;
8986 }
8987
8988 case VEC_UNPACK_FLOAT_HI_EXPR:
8989 case VEC_UNPACK_FLOAT_LO_EXPR:
8990 {
8991 op0 = expand_normal (treeop0);
8992 /* The signedness is determined from input operand. */
8993 temp = expand_widen_pattern_expr
8994 (ops, op0, NULL_RTX, NULL_RTX,
8995 target, TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8996
8997 gcc_assert (temp);
8998 return temp;
8999 }
9000
9001 case VEC_WIDEN_MULT_HI_EXPR:
9002 case VEC_WIDEN_MULT_LO_EXPR:
9003 case VEC_WIDEN_MULT_EVEN_EXPR:
9004 case VEC_WIDEN_MULT_ODD_EXPR:
9005 case VEC_WIDEN_LSHIFT_HI_EXPR:
9006 case VEC_WIDEN_LSHIFT_LO_EXPR:
9007 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9008 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
9009 target, unsignedp);
9010 gcc_assert (target);
9011 return target;
9012
9013 case VEC_PACK_TRUNC_EXPR:
9014 case VEC_PACK_SAT_EXPR:
9015 case VEC_PACK_FIX_TRUNC_EXPR:
9016 mode = TYPE_MODE (TREE_TYPE (treeop0));
9017 goto binop;
9018
9019 case VEC_PERM_EXPR:
9020 expand_operands (treeop0, treeop1, target, &op0, &op1, EXPAND_NORMAL);
9021 op2 = expand_normal (treeop2);
9022
9023 /* Careful here: if the target doesn't support integral vector modes,
9024 a constant selection vector could wind up smooshed into a normal
9025 integral constant. */
9026 if (CONSTANT_P (op2) && GET_CODE (op2) != CONST_VECTOR)
9027 {
9028 tree sel_type = TREE_TYPE (treeop2);
9029 enum machine_mode vmode
9030 = mode_for_vector (TYPE_MODE (TREE_TYPE (sel_type)),
9031 TYPE_VECTOR_SUBPARTS (sel_type));
9032 gcc_assert (GET_MODE_CLASS (vmode) == MODE_VECTOR_INT);
9033 op2 = simplify_subreg (vmode, op2, TYPE_MODE (sel_type), 0);
9034 gcc_assert (op2 && GET_CODE (op2) == CONST_VECTOR);
9035 }
9036 else
9037 gcc_assert (GET_MODE_CLASS (GET_MODE (op2)) == MODE_VECTOR_INT);
9038
9039 temp = expand_vec_perm (mode, op0, op1, op2, target);
9040 gcc_assert (temp);
9041 return temp;
9042
9043 case DOT_PROD_EXPR:
9044 {
9045 tree oprnd0 = treeop0;
9046 tree oprnd1 = treeop1;
9047 tree oprnd2 = treeop2;
9048 rtx op2;
9049
9050 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9051 op2 = expand_normal (oprnd2);
9052 target = expand_widen_pattern_expr (ops, op0, op1, op2,
9053 target, unsignedp);
9054 return target;
9055 }
9056
9057 case REALIGN_LOAD_EXPR:
9058 {
9059 tree oprnd0 = treeop0;
9060 tree oprnd1 = treeop1;
9061 tree oprnd2 = treeop2;
9062 rtx op2;
9063
9064 this_optab = optab_for_tree_code (code, type, optab_default);
9065 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9066 op2 = expand_normal (oprnd2);
9067 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
9068 target, unsignedp);
9069 gcc_assert (temp);
9070 return temp;
9071 }
9072
9073 case COND_EXPR:
9074 /* A COND_EXPR with its type being VOID_TYPE represents a
9075 conditional jump and is handled in
9076 expand_gimple_cond_expr. */
9077 gcc_assert (!VOID_TYPE_P (type));
9078
9079 /* Note that COND_EXPRs whose type is a structure or union
9080 are required to be constructed to contain assignments of
9081 a temporary variable, so that we can evaluate them here
9082 for side effect only. If type is void, we must do likewise. */
9083
9084 gcc_assert (!TREE_ADDRESSABLE (type)
9085 && !ignore
9086 && TREE_TYPE (treeop1) != void_type_node
9087 && TREE_TYPE (treeop2) != void_type_node);
9088
9089 temp = expand_cond_expr_using_cmove (treeop0, treeop1, treeop2);
9090 if (temp)
9091 return temp;
9092
9093 /* If we are not to produce a result, we have no target. Otherwise,
9094 if a target was specified use it; it will not be used as an
9095 intermediate target unless it is safe. If no target, use a
9096 temporary. */
9097
9098 if (modifier != EXPAND_STACK_PARM
9099 && original_target
9100 && safe_from_p (original_target, treeop0, 1)
9101 && GET_MODE (original_target) == mode
9102 && !MEM_P (original_target))
9103 temp = original_target;
9104 else
9105 temp = assign_temp (type, 0, 1);
9106
9107 do_pending_stack_adjust ();
9108 NO_DEFER_POP;
9109 op0 = gen_label_rtx ();
9110 op1 = gen_label_rtx ();
9111 jumpifnot (treeop0, op0, -1);
9112 store_expr (treeop1, temp,
9113 modifier == EXPAND_STACK_PARM,
9114 false);
9115
9116 emit_jump_insn (gen_jump (op1));
9117 emit_barrier ();
9118 emit_label (op0);
9119 store_expr (treeop2, temp,
9120 modifier == EXPAND_STACK_PARM,
9121 false);
9122
9123 emit_label (op1);
9124 OK_DEFER_POP;
9125 return temp;
9126
9127 case VEC_COND_EXPR:
9128 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target);
9129 return target;
9130
9131 default:
9132 gcc_unreachable ();
9133 }
9134
9135 /* Here to do an ordinary binary operator. */
9136 binop:
9137 expand_operands (treeop0, treeop1,
9138 subtarget, &op0, &op1, EXPAND_NORMAL);
9139 binop2:
9140 this_optab = optab_for_tree_code (code, type, optab_default);
9141 binop3:
9142 if (modifier == EXPAND_STACK_PARM)
9143 target = 0;
9144 temp = expand_binop (mode, this_optab, op0, op1, target,
9145 unsignedp, OPTAB_LIB_WIDEN);
9146 gcc_assert (temp);
9147 /* Bitwise operations do not need bitfield reduction as we expect their
9148 operands being properly truncated. */
9149 if (code == BIT_XOR_EXPR
9150 || code == BIT_AND_EXPR
9151 || code == BIT_IOR_EXPR)
9152 return temp;
9153 return REDUCE_BIT_FIELD (temp);
9154 }
9155 #undef REDUCE_BIT_FIELD
9156
9157 rtx
expand_expr_real_1(tree exp,rtx target,enum machine_mode tmode,enum expand_modifier modifier,rtx * alt_rtl,bool inner_reference_p)9158 expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
9159 enum expand_modifier modifier, rtx *alt_rtl,
9160 bool inner_reference_p)
9161 {
9162 rtx op0, op1, temp, decl_rtl;
9163 tree type;
9164 int unsignedp;
9165 enum machine_mode mode;
9166 enum tree_code code = TREE_CODE (exp);
9167 rtx subtarget, original_target;
9168 int ignore;
9169 tree context;
9170 bool reduce_bit_field;
9171 location_t loc = EXPR_LOCATION (exp);
9172 struct separate_ops ops;
9173 tree treeop0, treeop1, treeop2;
9174 tree ssa_name = NULL_TREE;
9175 gimple g;
9176
9177 type = TREE_TYPE (exp);
9178 mode = TYPE_MODE (type);
9179 unsignedp = TYPE_UNSIGNED (type);
9180
9181 treeop0 = treeop1 = treeop2 = NULL_TREE;
9182 if (!VL_EXP_CLASS_P (exp))
9183 switch (TREE_CODE_LENGTH (code))
9184 {
9185 default:
9186 case 3: treeop2 = TREE_OPERAND (exp, 2);
9187 case 2: treeop1 = TREE_OPERAND (exp, 1);
9188 case 1: treeop0 = TREE_OPERAND (exp, 0);
9189 case 0: break;
9190 }
9191 ops.code = code;
9192 ops.type = type;
9193 ops.op0 = treeop0;
9194 ops.op1 = treeop1;
9195 ops.op2 = treeop2;
9196 ops.location = loc;
9197
9198 ignore = (target == const0_rtx
9199 || ((CONVERT_EXPR_CODE_P (code)
9200 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
9201 && TREE_CODE (type) == VOID_TYPE));
9202
9203 /* An operation in what may be a bit-field type needs the
9204 result to be reduced to the precision of the bit-field type,
9205 which is narrower than that of the type's mode. */
9206 reduce_bit_field = (!ignore
9207 && INTEGRAL_TYPE_P (type)
9208 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
9209
9210 /* If we are going to ignore this result, we need only do something
9211 if there is a side-effect somewhere in the expression. If there
9212 is, short-circuit the most common cases here. Note that we must
9213 not call expand_expr with anything but const0_rtx in case this
9214 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
9215
9216 if (ignore)
9217 {
9218 if (! TREE_SIDE_EFFECTS (exp))
9219 return const0_rtx;
9220
9221 /* Ensure we reference a volatile object even if value is ignored, but
9222 don't do this if all we are doing is taking its address. */
9223 if (TREE_THIS_VOLATILE (exp)
9224 && TREE_CODE (exp) != FUNCTION_DECL
9225 && mode != VOIDmode && mode != BLKmode
9226 && modifier != EXPAND_CONST_ADDRESS)
9227 {
9228 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
9229 if (MEM_P (temp))
9230 copy_to_reg (temp);
9231 return const0_rtx;
9232 }
9233
9234 if (TREE_CODE_CLASS (code) == tcc_unary
9235 || code == BIT_FIELD_REF
9236 || code == COMPONENT_REF
9237 || code == INDIRECT_REF)
9238 return expand_expr (treeop0, const0_rtx, VOIDmode,
9239 modifier);
9240
9241 else if (TREE_CODE_CLASS (code) == tcc_binary
9242 || TREE_CODE_CLASS (code) == tcc_comparison
9243 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
9244 {
9245 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
9246 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
9247 return const0_rtx;
9248 }
9249
9250 target = 0;
9251 }
9252
9253 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
9254 target = 0;
9255
9256 /* Use subtarget as the target for operand 0 of a binary operation. */
9257 subtarget = get_subtarget (target);
9258 original_target = target;
9259
9260 switch (code)
9261 {
9262 case LABEL_DECL:
9263 {
9264 tree function = decl_function_context (exp);
9265
9266 temp = label_rtx (exp);
9267 temp = gen_rtx_LABEL_REF (Pmode, temp);
9268
9269 if (function != current_function_decl
9270 && function != 0)
9271 LABEL_REF_NONLOCAL_P (temp) = 1;
9272
9273 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
9274 return temp;
9275 }
9276
9277 case SSA_NAME:
9278 /* ??? ivopts calls expander, without any preparation from
9279 out-of-ssa. So fake instructions as if this was an access to the
9280 base variable. This unnecessarily allocates a pseudo, see how we can
9281 reuse it, if partition base vars have it set already. */
9282 if (!currently_expanding_to_rtl)
9283 {
9284 tree var = SSA_NAME_VAR (exp);
9285 if (var && DECL_RTL_SET_P (var))
9286 return DECL_RTL (var);
9287 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp)),
9288 LAST_VIRTUAL_REGISTER + 1);
9289 }
9290
9291 g = get_gimple_for_ssa_name (exp);
9292 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9293 if (g == NULL
9294 && modifier == EXPAND_INITIALIZER
9295 && !SSA_NAME_IS_DEFAULT_DEF (exp)
9296 && (optimize || DECL_IGNORED_P (SSA_NAME_VAR (exp)))
9297 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp)))
9298 g = SSA_NAME_DEF_STMT (exp);
9299 if (g)
9300 {
9301 rtx r;
9302 location_t saved_loc = curr_insn_location ();
9303
9304 set_curr_insn_location (gimple_location (g));
9305 r = expand_expr_real (gimple_assign_rhs_to_tree (g), target,
9306 tmode, modifier, NULL, inner_reference_p);
9307 set_curr_insn_location (saved_loc);
9308 if (REG_P (r) && !REG_EXPR (r))
9309 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp), r);
9310 return r;
9311 }
9312
9313 ssa_name = exp;
9314 decl_rtl = get_rtx_for_ssa_name (ssa_name);
9315 exp = SSA_NAME_VAR (ssa_name);
9316 goto expand_decl_rtl;
9317
9318 case PARM_DECL:
9319 case VAR_DECL:
9320 /* If a static var's type was incomplete when the decl was written,
9321 but the type is complete now, lay out the decl now. */
9322 if (DECL_SIZE (exp) == 0
9323 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
9324 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
9325 layout_decl (exp, 0);
9326
9327 /* ... fall through ... */
9328
9329 case FUNCTION_DECL:
9330 case RESULT_DECL:
9331 decl_rtl = DECL_RTL (exp);
9332 expand_decl_rtl:
9333 gcc_assert (decl_rtl);
9334 decl_rtl = copy_rtx (decl_rtl);
9335 /* Record writes to register variables. */
9336 if (modifier == EXPAND_WRITE
9337 && REG_P (decl_rtl)
9338 && HARD_REGISTER_P (decl_rtl))
9339 add_to_hard_reg_set (&crtl->asm_clobbers,
9340 GET_MODE (decl_rtl), REGNO (decl_rtl));
9341
9342 /* Ensure variable marked as used even if it doesn't go through
9343 a parser. If it hasn't be used yet, write out an external
9344 definition. */
9345 TREE_USED (exp) = 1;
9346
9347 /* Show we haven't gotten RTL for this yet. */
9348 temp = 0;
9349
9350 /* Variables inherited from containing functions should have
9351 been lowered by this point. */
9352 context = decl_function_context (exp);
9353 gcc_assert (!context
9354 || context == current_function_decl
9355 || TREE_STATIC (exp)
9356 || DECL_EXTERNAL (exp)
9357 /* ??? C++ creates functions that are not TREE_STATIC. */
9358 || TREE_CODE (exp) == FUNCTION_DECL);
9359
9360 /* This is the case of an array whose size is to be determined
9361 from its initializer, while the initializer is still being parsed.
9362 ??? We aren't parsing while expanding anymore. */
9363
9364 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
9365 temp = validize_mem (decl_rtl);
9366
9367 /* If DECL_RTL is memory, we are in the normal case and the
9368 address is not valid, get the address into a register. */
9369
9370 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
9371 {
9372 if (alt_rtl)
9373 *alt_rtl = decl_rtl;
9374 decl_rtl = use_anchored_address (decl_rtl);
9375 if (modifier != EXPAND_CONST_ADDRESS
9376 && modifier != EXPAND_SUM
9377 && !memory_address_addr_space_p (DECL_MODE (exp),
9378 XEXP (decl_rtl, 0),
9379 MEM_ADDR_SPACE (decl_rtl)))
9380 temp = replace_equiv_address (decl_rtl,
9381 copy_rtx (XEXP (decl_rtl, 0)));
9382 }
9383
9384 /* If we got something, return it. But first, set the alignment
9385 if the address is a register. */
9386 if (temp != 0)
9387 {
9388 if (MEM_P (temp) && REG_P (XEXP (temp, 0)))
9389 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
9390
9391 return temp;
9392 }
9393
9394 /* If the mode of DECL_RTL does not match that of the decl,
9395 there are two cases: we are dealing with a BLKmode value
9396 that is returned in a register, or we are dealing with
9397 a promoted value. In the latter case, return a SUBREG
9398 of the wanted mode, but mark it so that we know that it
9399 was already extended. */
9400 if (REG_P (decl_rtl)
9401 && DECL_MODE (exp) != BLKmode
9402 && GET_MODE (decl_rtl) != DECL_MODE (exp))
9403 {
9404 enum machine_mode pmode;
9405
9406 /* Get the signedness to be used for this variable. Ensure we get
9407 the same mode we got when the variable was declared. */
9408 if (code == SSA_NAME
9409 && (g = SSA_NAME_DEF_STMT (ssa_name))
9410 && gimple_code (g) == GIMPLE_CALL)
9411 {
9412 gcc_assert (!gimple_call_internal_p (g));
9413 pmode = promote_function_mode (type, mode, &unsignedp,
9414 gimple_call_fntype (g),
9415 2);
9416 }
9417 else
9418 pmode = promote_decl_mode (exp, &unsignedp);
9419 gcc_assert (GET_MODE (decl_rtl) == pmode);
9420
9421 temp = gen_lowpart_SUBREG (mode, decl_rtl);
9422 SUBREG_PROMOTED_VAR_P (temp) = 1;
9423 SUBREG_PROMOTED_UNSIGNED_SET (temp, unsignedp);
9424 return temp;
9425 }
9426
9427 return decl_rtl;
9428
9429 case INTEGER_CST:
9430 temp = immed_double_const (TREE_INT_CST_LOW (exp),
9431 TREE_INT_CST_HIGH (exp), mode);
9432
9433 return temp;
9434
9435 case VECTOR_CST:
9436 {
9437 tree tmp = NULL_TREE;
9438 if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
9439 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
9440 || GET_MODE_CLASS (mode) == MODE_VECTOR_FRACT
9441 || GET_MODE_CLASS (mode) == MODE_VECTOR_UFRACT
9442 || GET_MODE_CLASS (mode) == MODE_VECTOR_ACCUM
9443 || GET_MODE_CLASS (mode) == MODE_VECTOR_UACCUM)
9444 return const_vector_from_tree (exp);
9445 if (GET_MODE_CLASS (mode) == MODE_INT)
9446 {
9447 tree type_for_mode = lang_hooks.types.type_for_mode (mode, 1);
9448 if (type_for_mode)
9449 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR, type_for_mode, exp);
9450 }
9451 if (!tmp)
9452 {
9453 vec<constructor_elt, va_gc> *v;
9454 unsigned i;
9455 vec_alloc (v, VECTOR_CST_NELTS (exp));
9456 for (i = 0; i < VECTOR_CST_NELTS (exp); ++i)
9457 CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, VECTOR_CST_ELT (exp, i));
9458 tmp = build_constructor (type, v);
9459 }
9460 return expand_expr (tmp, ignore ? const0_rtx : target,
9461 tmode, modifier);
9462 }
9463
9464 case CONST_DECL:
9465 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
9466
9467 case REAL_CST:
9468 /* If optimized, generate immediate CONST_DOUBLE
9469 which will be turned into memory by reload if necessary.
9470
9471 We used to force a register so that loop.c could see it. But
9472 this does not allow gen_* patterns to perform optimizations with
9473 the constants. It also produces two insns in cases like "x = 1.0;".
9474 On most machines, floating-point constants are not permitted in
9475 many insns, so we'd end up copying it to a register in any case.
9476
9477 Now, we do the copying in expand_binop, if appropriate. */
9478 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp),
9479 TYPE_MODE (TREE_TYPE (exp)));
9480
9481 case FIXED_CST:
9482 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
9483 TYPE_MODE (TREE_TYPE (exp)));
9484
9485 case COMPLEX_CST:
9486 /* Handle evaluating a complex constant in a CONCAT target. */
9487 if (original_target && GET_CODE (original_target) == CONCAT)
9488 {
9489 enum machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
9490 rtx rtarg, itarg;
9491
9492 rtarg = XEXP (original_target, 0);
9493 itarg = XEXP (original_target, 1);
9494
9495 /* Move the real and imaginary parts separately. */
9496 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
9497 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
9498
9499 if (op0 != rtarg)
9500 emit_move_insn (rtarg, op0);
9501 if (op1 != itarg)
9502 emit_move_insn (itarg, op1);
9503
9504 return original_target;
9505 }
9506
9507 /* ... fall through ... */
9508
9509 case STRING_CST:
9510 temp = expand_expr_constant (exp, 1, modifier);
9511
9512 /* temp contains a constant address.
9513 On RISC machines where a constant address isn't valid,
9514 make some insns to get that address into a register. */
9515 if (modifier != EXPAND_CONST_ADDRESS
9516 && modifier != EXPAND_INITIALIZER
9517 && modifier != EXPAND_SUM
9518 && ! memory_address_addr_space_p (mode, XEXP (temp, 0),
9519 MEM_ADDR_SPACE (temp)))
9520 return replace_equiv_address (temp,
9521 copy_rtx (XEXP (temp, 0)));
9522 return temp;
9523
9524 case SAVE_EXPR:
9525 {
9526 tree val = treeop0;
9527 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl,
9528 inner_reference_p);
9529
9530 if (!SAVE_EXPR_RESOLVED_P (exp))
9531 {
9532 /* We can indeed still hit this case, typically via builtin
9533 expanders calling save_expr immediately before expanding
9534 something. Assume this means that we only have to deal
9535 with non-BLKmode values. */
9536 gcc_assert (GET_MODE (ret) != BLKmode);
9537
9538 val = build_decl (curr_insn_location (),
9539 VAR_DECL, NULL, TREE_TYPE (exp));
9540 DECL_ARTIFICIAL (val) = 1;
9541 DECL_IGNORED_P (val) = 1;
9542 treeop0 = val;
9543 TREE_OPERAND (exp, 0) = treeop0;
9544 SAVE_EXPR_RESOLVED_P (exp) = 1;
9545
9546 if (!CONSTANT_P (ret))
9547 ret = copy_to_reg (ret);
9548 SET_DECL_RTL (val, ret);
9549 }
9550
9551 return ret;
9552 }
9553
9554
9555 case CONSTRUCTOR:
9556 /* If we don't need the result, just ensure we evaluate any
9557 subexpressions. */
9558 if (ignore)
9559 {
9560 unsigned HOST_WIDE_INT idx;
9561 tree value;
9562
9563 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
9564 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
9565
9566 return const0_rtx;
9567 }
9568
9569 return expand_constructor (exp, target, modifier, false);
9570
9571 case TARGET_MEM_REF:
9572 {
9573 addr_space_t as
9574 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9575 struct mem_address addr;
9576 enum insn_code icode;
9577 unsigned int align;
9578
9579 get_address_description (exp, &addr);
9580 op0 = addr_for_mem_ref (&addr, as, true);
9581 op0 = memory_address_addr_space (mode, op0, as);
9582 temp = gen_rtx_MEM (mode, op0);
9583 set_mem_attributes (temp, exp, 0);
9584 set_mem_addr_space (temp, as);
9585 align = get_object_alignment (exp);
9586 if (modifier != EXPAND_WRITE
9587 && modifier != EXPAND_MEMORY
9588 && mode != BLKmode
9589 && align < GET_MODE_ALIGNMENT (mode)
9590 /* If the target does not have special handling for unaligned
9591 loads of mode then it can use regular moves for them. */
9592 && ((icode = optab_handler (movmisalign_optab, mode))
9593 != CODE_FOR_nothing))
9594 {
9595 struct expand_operand ops[2];
9596
9597 /* We've already validated the memory, and we're creating a
9598 new pseudo destination. The predicates really can't fail,
9599 nor can the generator. */
9600 create_output_operand (&ops[0], NULL_RTX, mode);
9601 create_fixed_operand (&ops[1], temp);
9602 expand_insn (icode, 2, ops);
9603 return ops[0].value;
9604 }
9605 return temp;
9606 }
9607
9608 case MEM_REF:
9609 {
9610 addr_space_t as
9611 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9612 enum machine_mode address_mode;
9613 tree base = TREE_OPERAND (exp, 0);
9614 gimple def_stmt;
9615 enum insn_code icode;
9616 unsigned align;
9617 /* Handle expansion of non-aliased memory with non-BLKmode. That
9618 might end up in a register. */
9619 if (mem_ref_refers_to_non_mem_p (exp))
9620 {
9621 HOST_WIDE_INT offset = mem_ref_offset (exp).low;
9622 tree bit_offset;
9623 tree bftype;
9624 base = TREE_OPERAND (base, 0);
9625 if (offset == 0
9626 && host_integerp (TYPE_SIZE (TREE_TYPE (exp)), 1)
9627 && (GET_MODE_BITSIZE (DECL_MODE (base))
9628 == TREE_INT_CST_LOW (TYPE_SIZE (TREE_TYPE (exp)))))
9629 return expand_expr (build1 (VIEW_CONVERT_EXPR,
9630 TREE_TYPE (exp), base),
9631 target, tmode, modifier);
9632 bit_offset = bitsize_int (offset * BITS_PER_UNIT);
9633 bftype = TREE_TYPE (base);
9634 if (TYPE_MODE (TREE_TYPE (exp)) != BLKmode)
9635 bftype = TREE_TYPE (exp);
9636 else
9637 {
9638 temp = assign_stack_temp (DECL_MODE (base),
9639 GET_MODE_SIZE (DECL_MODE (base)));
9640 store_expr (base, temp, 0, false);
9641 temp = adjust_address (temp, BLKmode, offset);
9642 set_mem_size (temp, int_size_in_bytes (TREE_TYPE (exp)));
9643 return temp;
9644 }
9645 return expand_expr (build3 (BIT_FIELD_REF, bftype,
9646 base,
9647 TYPE_SIZE (TREE_TYPE (exp)),
9648 bit_offset),
9649 target, tmode, modifier);
9650 }
9651 address_mode = targetm.addr_space.address_mode (as);
9652 base = TREE_OPERAND (exp, 0);
9653 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR)))
9654 {
9655 tree mask = gimple_assign_rhs2 (def_stmt);
9656 base = build2 (BIT_AND_EXPR, TREE_TYPE (base),
9657 gimple_assign_rhs1 (def_stmt), mask);
9658 TREE_OPERAND (exp, 0) = base;
9659 }
9660 align = get_object_alignment (exp);
9661 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM);
9662 op0 = memory_address_addr_space (address_mode, op0, as);
9663 if (!integer_zerop (TREE_OPERAND (exp, 1)))
9664 {
9665 rtx off
9666 = immed_double_int_const (mem_ref_offset (exp), address_mode);
9667 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
9668 }
9669 op0 = memory_address_addr_space (mode, op0, as);
9670 temp = gen_rtx_MEM (mode, op0);
9671 set_mem_attributes (temp, exp, 0);
9672 set_mem_addr_space (temp, as);
9673 if (TREE_THIS_VOLATILE (exp))
9674 MEM_VOLATILE_P (temp) = 1;
9675 if (modifier != EXPAND_WRITE
9676 && modifier != EXPAND_MEMORY
9677 && !inner_reference_p
9678 && mode != BLKmode
9679 && align < GET_MODE_ALIGNMENT (mode))
9680 {
9681 if ((icode = optab_handler (movmisalign_optab, mode))
9682 != CODE_FOR_nothing)
9683 {
9684 struct expand_operand ops[2];
9685
9686 /* We've already validated the memory, and we're creating a
9687 new pseudo destination. The predicates really can't fail,
9688 nor can the generator. */
9689 create_output_operand (&ops[0], NULL_RTX, mode);
9690 create_fixed_operand (&ops[1], temp);
9691 expand_insn (icode, 2, ops);
9692 return ops[0].value;
9693 }
9694 else if (SLOW_UNALIGNED_ACCESS (mode, align))
9695 temp = extract_bit_field (temp, GET_MODE_BITSIZE (mode),
9696 0, TYPE_UNSIGNED (TREE_TYPE (exp)),
9697 true, (modifier == EXPAND_STACK_PARM
9698 ? NULL_RTX : target),
9699 mode, mode);
9700 }
9701 return temp;
9702 }
9703
9704 case ARRAY_REF:
9705
9706 {
9707 tree array = treeop0;
9708 tree index = treeop1;
9709
9710 /* Fold an expression like: "foo"[2].
9711 This is not done in fold so it won't happen inside &.
9712 Don't fold if this is for wide characters since it's too
9713 difficult to do correctly and this is a very rare case. */
9714
9715 if (modifier != EXPAND_CONST_ADDRESS
9716 && modifier != EXPAND_INITIALIZER
9717 && modifier != EXPAND_MEMORY)
9718 {
9719 tree t = fold_read_from_constant_string (exp);
9720
9721 if (t)
9722 return expand_expr (t, target, tmode, modifier);
9723 }
9724
9725 /* If this is a constant index into a constant array,
9726 just get the value from the array. Handle both the cases when
9727 we have an explicit constructor and when our operand is a variable
9728 that was declared const. */
9729
9730 if (modifier != EXPAND_CONST_ADDRESS
9731 && modifier != EXPAND_INITIALIZER
9732 && modifier != EXPAND_MEMORY
9733 && TREE_CODE (array) == CONSTRUCTOR
9734 && ! TREE_SIDE_EFFECTS (array)
9735 && TREE_CODE (index) == INTEGER_CST)
9736 {
9737 unsigned HOST_WIDE_INT ix;
9738 tree field, value;
9739
9740 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
9741 field, value)
9742 if (tree_int_cst_equal (field, index))
9743 {
9744 if (!TREE_SIDE_EFFECTS (value))
9745 return expand_expr (fold (value), target, tmode, modifier);
9746 break;
9747 }
9748 }
9749
9750 else if (optimize >= 1
9751 && modifier != EXPAND_CONST_ADDRESS
9752 && modifier != EXPAND_INITIALIZER
9753 && modifier != EXPAND_MEMORY
9754 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
9755 && TREE_CODE (array) == VAR_DECL && DECL_INITIAL (array)
9756 && TREE_CODE (DECL_INITIAL (array)) != ERROR_MARK
9757 && const_value_known_p (array))
9758 {
9759 if (TREE_CODE (index) == INTEGER_CST)
9760 {
9761 tree init = DECL_INITIAL (array);
9762
9763 if (TREE_CODE (init) == CONSTRUCTOR)
9764 {
9765 unsigned HOST_WIDE_INT ix;
9766 tree field, value;
9767
9768 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
9769 field, value)
9770 if (tree_int_cst_equal (field, index))
9771 {
9772 if (TREE_SIDE_EFFECTS (value))
9773 break;
9774
9775 if (TREE_CODE (value) == CONSTRUCTOR)
9776 {
9777 /* If VALUE is a CONSTRUCTOR, this
9778 optimization is only useful if
9779 this doesn't store the CONSTRUCTOR
9780 into memory. If it does, it is more
9781 efficient to just load the data from
9782 the array directly. */
9783 rtx ret = expand_constructor (value, target,
9784 modifier, true);
9785 if (ret == NULL_RTX)
9786 break;
9787 }
9788
9789 return expand_expr (fold (value), target, tmode,
9790 modifier);
9791 }
9792 }
9793 else if(TREE_CODE (init) == STRING_CST)
9794 {
9795 tree index1 = index;
9796 tree low_bound = array_ref_low_bound (exp);
9797 index1 = fold_convert_loc (loc, sizetype,
9798 treeop1);
9799
9800 /* Optimize the special-case of a zero lower bound.
9801
9802 We convert the low_bound to sizetype to avoid some problems
9803 with constant folding. (E.g. suppose the lower bound is 1,
9804 and its mode is QI. Without the conversion,l (ARRAY
9805 +(INDEX-(unsigned char)1)) becomes ((ARRAY+(-(unsigned char)1))
9806 +INDEX), which becomes (ARRAY+255+INDEX). Opps!) */
9807
9808 if (! integer_zerop (low_bound))
9809 index1 = size_diffop_loc (loc, index1,
9810 fold_convert_loc (loc, sizetype,
9811 low_bound));
9812
9813 if (0 > compare_tree_int (index1,
9814 TREE_STRING_LENGTH (init)))
9815 {
9816 tree type = TREE_TYPE (TREE_TYPE (init));
9817 enum machine_mode mode = TYPE_MODE (type);
9818
9819 if (GET_MODE_CLASS (mode) == MODE_INT
9820 && GET_MODE_SIZE (mode) == 1)
9821 return gen_int_mode (TREE_STRING_POINTER (init)
9822 [TREE_INT_CST_LOW (index1)],
9823 mode);
9824 }
9825 }
9826 }
9827 }
9828 }
9829 goto normal_inner_ref;
9830
9831 case COMPONENT_REF:
9832 /* If the operand is a CONSTRUCTOR, we can just extract the
9833 appropriate field if it is present. */
9834 if (TREE_CODE (treeop0) == CONSTRUCTOR)
9835 {
9836 unsigned HOST_WIDE_INT idx;
9837 tree field, value;
9838
9839 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0),
9840 idx, field, value)
9841 if (field == treeop1
9842 /* We can normally use the value of the field in the
9843 CONSTRUCTOR. However, if this is a bitfield in
9844 an integral mode that we can fit in a HOST_WIDE_INT,
9845 we must mask only the number of bits in the bitfield,
9846 since this is done implicitly by the constructor. If
9847 the bitfield does not meet either of those conditions,
9848 we can't do this optimization. */
9849 && (! DECL_BIT_FIELD (field)
9850 || ((GET_MODE_CLASS (DECL_MODE (field)) == MODE_INT)
9851 && (GET_MODE_PRECISION (DECL_MODE (field))
9852 <= HOST_BITS_PER_WIDE_INT))))
9853 {
9854 if (DECL_BIT_FIELD (field)
9855 && modifier == EXPAND_STACK_PARM)
9856 target = 0;
9857 op0 = expand_expr (value, target, tmode, modifier);
9858 if (DECL_BIT_FIELD (field))
9859 {
9860 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
9861 enum machine_mode imode = TYPE_MODE (TREE_TYPE (field));
9862
9863 if (TYPE_UNSIGNED (TREE_TYPE (field)))
9864 {
9865 op1 = GEN_INT (((HOST_WIDE_INT) 1 << bitsize) - 1);
9866 op0 = expand_and (imode, op0, op1, target);
9867 }
9868 else
9869 {
9870 int count = GET_MODE_PRECISION (imode) - bitsize;
9871
9872 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
9873 target, 0);
9874 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
9875 target, 0);
9876 }
9877 }
9878
9879 return op0;
9880 }
9881 }
9882 goto normal_inner_ref;
9883
9884 case BIT_FIELD_REF:
9885 case ARRAY_RANGE_REF:
9886 normal_inner_ref:
9887 {
9888 enum machine_mode mode1, mode2;
9889 HOST_WIDE_INT bitsize, bitpos;
9890 tree offset;
9891 int volatilep = 0, must_force_mem;
9892 bool packedp = false;
9893 tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
9894 &mode1, &unsignedp, &volatilep, true);
9895 rtx orig_op0, memloc;
9896 bool mem_attrs_from_type = false;
9897
9898 /* If we got back the original object, something is wrong. Perhaps
9899 we are evaluating an expression too early. In any event, don't
9900 infinitely recurse. */
9901 gcc_assert (tem != exp);
9902
9903 if (TYPE_PACKED (TREE_TYPE (TREE_OPERAND (exp, 0)))
9904 || (TREE_CODE (TREE_OPERAND (exp, 1)) == FIELD_DECL
9905 && DECL_PACKED (TREE_OPERAND (exp, 1))))
9906 packedp = true;
9907
9908 /* If TEM's type is a union of variable size, pass TARGET to the inner
9909 computation, since it will need a temporary and TARGET is known
9910 to have to do. This occurs in unchecked conversion in Ada. */
9911 orig_op0 = op0
9912 = expand_expr_real (tem,
9913 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9914 && COMPLETE_TYPE_P (TREE_TYPE (tem))
9915 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9916 != INTEGER_CST)
9917 && modifier != EXPAND_STACK_PARM
9918 ? target : NULL_RTX),
9919 VOIDmode,
9920 (modifier == EXPAND_INITIALIZER
9921 || modifier == EXPAND_CONST_ADDRESS
9922 || modifier == EXPAND_STACK_PARM)
9923 ? modifier : EXPAND_NORMAL,
9924 NULL, true);
9925
9926
9927 /* If the bitfield is volatile, we want to access it in the
9928 field's mode, not the computed mode.
9929 If a MEM has VOIDmode (external with incomplete type),
9930 use BLKmode for it instead. */
9931 if (MEM_P (op0))
9932 {
9933 if (volatilep && flag_strict_volatile_bitfields > 0)
9934 op0 = adjust_address (op0, mode1, 0);
9935 else if (GET_MODE (op0) == VOIDmode)
9936 op0 = adjust_address (op0, BLKmode, 0);
9937 }
9938
9939 mode2
9940 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
9941
9942 /* If we have either an offset, a BLKmode result, or a reference
9943 outside the underlying object, we must force it to memory.
9944 Such a case can occur in Ada if we have unchecked conversion
9945 of an expression from a scalar type to an aggregate type or
9946 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
9947 passed a partially uninitialized object or a view-conversion
9948 to a larger size. */
9949 must_force_mem = (offset
9950 || mode1 == BLKmode
9951 || bitpos + bitsize > GET_MODE_BITSIZE (mode2));
9952
9953 /* Handle CONCAT first. */
9954 if (GET_CODE (op0) == CONCAT && !must_force_mem)
9955 {
9956 if (bitpos == 0
9957 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)))
9958 return op0;
9959 if (bitpos == 0
9960 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9961 && bitsize)
9962 {
9963 op0 = XEXP (op0, 0);
9964 mode2 = GET_MODE (op0);
9965 }
9966 else if (bitpos == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9967 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1)))
9968 && bitpos
9969 && bitsize)
9970 {
9971 op0 = XEXP (op0, 1);
9972 bitpos = 0;
9973 mode2 = GET_MODE (op0);
9974 }
9975 else
9976 /* Otherwise force into memory. */
9977 must_force_mem = 1;
9978 }
9979
9980 /* If this is a constant, put it in a register if it is a legitimate
9981 constant and we don't need a memory reference. */
9982 if (CONSTANT_P (op0)
9983 && mode2 != BLKmode
9984 && targetm.legitimate_constant_p (mode2, op0)
9985 && !must_force_mem)
9986 op0 = force_reg (mode2, op0);
9987
9988 /* Otherwise, if this is a constant, try to force it to the constant
9989 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
9990 is a legitimate constant. */
9991 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
9992 op0 = validize_mem (memloc);
9993
9994 /* Otherwise, if this is a constant or the object is not in memory
9995 and need be, put it there. */
9996 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
9997 {
9998 tree nt = build_qualified_type (TREE_TYPE (tem),
9999 (TYPE_QUALS (TREE_TYPE (tem))
10000 | TYPE_QUAL_CONST));
10001 memloc = assign_temp (nt, 1, 1);
10002 emit_move_insn (memloc, op0);
10003 op0 = memloc;
10004 mem_attrs_from_type = true;
10005 }
10006
10007 if (offset)
10008 {
10009 enum machine_mode address_mode;
10010 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
10011 EXPAND_SUM);
10012
10013 gcc_assert (MEM_P (op0));
10014
10015 address_mode = get_address_mode (op0);
10016 if (GET_MODE (offset_rtx) != address_mode)
10017 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
10018
10019 if (GET_MODE (op0) == BLKmode
10020 /* A constant address in OP0 can have VOIDmode, we must
10021 not try to call force_reg in that case. */
10022 && GET_MODE (XEXP (op0, 0)) != VOIDmode
10023 && bitsize != 0
10024 && (bitpos % bitsize) == 0
10025 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
10026 && MEM_ALIGN (op0) == GET_MODE_ALIGNMENT (mode1))
10027 {
10028 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
10029 bitpos = 0;
10030 }
10031
10032 op0 = offset_address (op0, offset_rtx,
10033 highest_pow2_factor (offset));
10034 }
10035
10036 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
10037 record its alignment as BIGGEST_ALIGNMENT. */
10038 if (MEM_P (op0) && bitpos == 0 && offset != 0
10039 && is_aligning_offset (offset, tem))
10040 set_mem_align (op0, BIGGEST_ALIGNMENT);
10041
10042 /* Don't forget about volatility even if this is a bitfield. */
10043 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
10044 {
10045 if (op0 == orig_op0)
10046 op0 = copy_rtx (op0);
10047
10048 MEM_VOLATILE_P (op0) = 1;
10049 }
10050
10051 /* In cases where an aligned union has an unaligned object
10052 as a field, we might be extracting a BLKmode value from
10053 an integer-mode (e.g., SImode) object. Handle this case
10054 by doing the extract into an object as wide as the field
10055 (which we know to be the width of a basic mode), then
10056 storing into memory, and changing the mode to BLKmode. */
10057 if (mode1 == VOIDmode
10058 || REG_P (op0) || GET_CODE (op0) == SUBREG
10059 || (mode1 != BLKmode && ! direct_load[(int) mode1]
10060 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
10061 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
10062 && modifier != EXPAND_CONST_ADDRESS
10063 && modifier != EXPAND_INITIALIZER
10064 && modifier != EXPAND_MEMORY)
10065 /* If the field is volatile, we always want an aligned
10066 access. Do this in following two situations:
10067 1. the access is not already naturally
10068 aligned, otherwise "normal" (non-bitfield) volatile fields
10069 become non-addressable.
10070 2. the bitsize is narrower than the access size. Need
10071 to extract bitfields from the access. */
10072 || (volatilep && flag_strict_volatile_bitfields > 0
10073 && (bitpos % GET_MODE_ALIGNMENT (mode) != 0
10074 || (mode1 != BLKmode
10075 && bitsize < GET_MODE_SIZE (mode1) * BITS_PER_UNIT)))
10076 /* If the field isn't aligned enough to fetch as a memref,
10077 fetch it as a bit field. */
10078 || (mode1 != BLKmode
10079 && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
10080 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)
10081 || (MEM_P (op0)
10082 && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
10083 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0))))
10084 && ((modifier == EXPAND_CONST_ADDRESS
10085 || modifier == EXPAND_INITIALIZER)
10086 ? STRICT_ALIGNMENT
10087 : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0))))
10088 || (bitpos % BITS_PER_UNIT != 0)))
10089 /* If the type and the field are a constant size and the
10090 size of the type isn't the same size as the bitfield,
10091 we must use bitfield operations. */
10092 || (bitsize >= 0
10093 && TYPE_SIZE (TREE_TYPE (exp))
10094 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
10095 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
10096 bitsize)))
10097 {
10098 enum machine_mode ext_mode = mode;
10099
10100 if (ext_mode == BLKmode
10101 && ! (target != 0 && MEM_P (op0)
10102 && MEM_P (target)
10103 && bitpos % BITS_PER_UNIT == 0))
10104 ext_mode = mode_for_size (bitsize, MODE_INT, 1);
10105
10106 if (ext_mode == BLKmode)
10107 {
10108 if (target == 0)
10109 target = assign_temp (type, 1, 1);
10110
10111 if (bitsize == 0)
10112 return target;
10113
10114 /* In this case, BITPOS must start at a byte boundary and
10115 TARGET, if specified, must be a MEM. */
10116 gcc_assert (MEM_P (op0)
10117 && (!target || MEM_P (target))
10118 && !(bitpos % BITS_PER_UNIT));
10119
10120 emit_block_move (target,
10121 adjust_address (op0, VOIDmode,
10122 bitpos / BITS_PER_UNIT),
10123 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
10124 / BITS_PER_UNIT),
10125 (modifier == EXPAND_STACK_PARM
10126 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10127
10128 return target;
10129 }
10130
10131 op0 = validize_mem (op0);
10132
10133 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
10134 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10135
10136 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp, packedp,
10137 (modifier == EXPAND_STACK_PARM
10138 ? NULL_RTX : target),
10139 ext_mode, ext_mode);
10140
10141 /* If the result is a record type and BITSIZE is narrower than
10142 the mode of OP0, an integral mode, and this is a big endian
10143 machine, we must put the field into the high-order bits. */
10144 if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN
10145 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
10146 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0)))
10147 op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0,
10148 GET_MODE_BITSIZE (GET_MODE (op0))
10149 - bitsize, op0, 1);
10150
10151 /* If the result type is BLKmode, store the data into a temporary
10152 of the appropriate type, but with the mode corresponding to the
10153 mode for the data we have (op0's mode). It's tempting to make
10154 this a constant type, since we know it's only being stored once,
10155 but that can cause problems if we are taking the address of this
10156 COMPONENT_REF because the MEM of any reference via that address
10157 will have flags corresponding to the type, which will not
10158 necessarily be constant. */
10159 if (mode == BLKmode)
10160 {
10161 rtx new_rtx;
10162
10163 new_rtx = assign_stack_temp_for_type (ext_mode,
10164 GET_MODE_BITSIZE (ext_mode),
10165 type);
10166 emit_move_insn (new_rtx, op0);
10167 op0 = copy_rtx (new_rtx);
10168 PUT_MODE (op0, BLKmode);
10169 }
10170
10171 return op0;
10172 }
10173
10174 /* If the result is BLKmode, use that to access the object
10175 now as well. */
10176 if (mode == BLKmode)
10177 mode1 = BLKmode;
10178
10179 /* Get a reference to just this component. */
10180 if (modifier == EXPAND_CONST_ADDRESS
10181 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
10182 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
10183 else
10184 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
10185
10186 if (op0 == orig_op0)
10187 op0 = copy_rtx (op0);
10188
10189 /* If op0 is a temporary because of forcing to memory, pass only the
10190 type to set_mem_attributes so that the original expression is never
10191 marked as ADDRESSABLE through MEM_EXPR of the temporary. */
10192 if (mem_attrs_from_type)
10193 set_mem_attributes (op0, type, 0);
10194 else
10195 set_mem_attributes (op0, exp, 0);
10196
10197 if (REG_P (XEXP (op0, 0)))
10198 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10199
10200 MEM_VOLATILE_P (op0) |= volatilep;
10201 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
10202 || modifier == EXPAND_CONST_ADDRESS
10203 || modifier == EXPAND_INITIALIZER)
10204 return op0;
10205 else if (target == 0)
10206 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
10207
10208 convert_move (target, op0, unsignedp);
10209 return target;
10210 }
10211
10212 case OBJ_TYPE_REF:
10213 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
10214
10215 case CALL_EXPR:
10216 /* All valid uses of __builtin_va_arg_pack () are removed during
10217 inlining. */
10218 if (CALL_EXPR_VA_ARG_PACK (exp))
10219 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
10220 {
10221 tree fndecl = get_callee_fndecl (exp), attr;
10222
10223 if (fndecl
10224 && (attr = lookup_attribute ("error",
10225 DECL_ATTRIBUTES (fndecl))) != NULL)
10226 error ("%Kcall to %qs declared with attribute error: %s",
10227 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
10228 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
10229 if (fndecl
10230 && (attr = lookup_attribute ("warning",
10231 DECL_ATTRIBUTES (fndecl))) != NULL)
10232 warning_at (tree_nonartificial_location (exp),
10233 0, "%Kcall to %qs declared with attribute warning: %s",
10234 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
10235 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
10236
10237 /* Check for a built-in function. */
10238 if (fndecl && DECL_BUILT_IN (fndecl))
10239 {
10240 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
10241 return expand_builtin (exp, target, subtarget, tmode, ignore);
10242 }
10243 }
10244 return expand_call (exp, target, ignore);
10245
10246 case VIEW_CONVERT_EXPR:
10247 op0 = NULL_RTX;
10248
10249 /* If we are converting to BLKmode, try to avoid an intermediate
10250 temporary by fetching an inner memory reference. */
10251 if (mode == BLKmode
10252 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
10253 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode
10254 && handled_component_p (treeop0))
10255 {
10256 enum machine_mode mode1;
10257 HOST_WIDE_INT bitsize, bitpos;
10258 tree offset;
10259 int unsignedp;
10260 int volatilep = 0;
10261 tree tem
10262 = get_inner_reference (treeop0, &bitsize, &bitpos,
10263 &offset, &mode1, &unsignedp, &volatilep,
10264 true);
10265 rtx orig_op0;
10266
10267 /* ??? We should work harder and deal with non-zero offsets. */
10268 if (!offset
10269 && (bitpos % BITS_PER_UNIT) == 0
10270 && bitsize >= 0
10271 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) == 0)
10272 {
10273 /* See the normal_inner_ref case for the rationale. */
10274 orig_op0
10275 = expand_expr_real (tem,
10276 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
10277 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
10278 != INTEGER_CST)
10279 && modifier != EXPAND_STACK_PARM
10280 ? target : NULL_RTX),
10281 VOIDmode,
10282 (modifier == EXPAND_INITIALIZER
10283 || modifier == EXPAND_CONST_ADDRESS
10284 || modifier == EXPAND_STACK_PARM)
10285 ? modifier : EXPAND_NORMAL,
10286 NULL, true);
10287
10288 if (MEM_P (orig_op0))
10289 {
10290 op0 = orig_op0;
10291
10292 /* Get a reference to just this component. */
10293 if (modifier == EXPAND_CONST_ADDRESS
10294 || modifier == EXPAND_SUM
10295 || modifier == EXPAND_INITIALIZER)
10296 op0 = adjust_address_nv (op0, mode, bitpos / BITS_PER_UNIT);
10297 else
10298 op0 = adjust_address (op0, mode, bitpos / BITS_PER_UNIT);
10299
10300 if (op0 == orig_op0)
10301 op0 = copy_rtx (op0);
10302
10303 set_mem_attributes (op0, treeop0, 0);
10304 if (REG_P (XEXP (op0, 0)))
10305 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10306
10307 MEM_VOLATILE_P (op0) |= volatilep;
10308 }
10309 }
10310 }
10311
10312 if (!op0)
10313 op0 = expand_expr_real (treeop0, NULL_RTX, VOIDmode, modifier,
10314 NULL, inner_reference_p);
10315
10316 /* If the input and output modes are both the same, we are done. */
10317 if (mode == GET_MODE (op0))
10318 ;
10319 /* If neither mode is BLKmode, and both modes are the same size
10320 then we can use gen_lowpart. */
10321 else if (mode != BLKmode && GET_MODE (op0) != BLKmode
10322 && (GET_MODE_PRECISION (mode)
10323 == GET_MODE_PRECISION (GET_MODE (op0)))
10324 && !COMPLEX_MODE_P (GET_MODE (op0)))
10325 {
10326 if (GET_CODE (op0) == SUBREG)
10327 op0 = force_reg (GET_MODE (op0), op0);
10328 temp = gen_lowpart_common (mode, op0);
10329 if (temp)
10330 op0 = temp;
10331 else
10332 {
10333 if (!REG_P (op0) && !MEM_P (op0))
10334 op0 = force_reg (GET_MODE (op0), op0);
10335 op0 = gen_lowpart (mode, op0);
10336 }
10337 }
10338 /* If both types are integral, convert from one mode to the other. */
10339 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)))
10340 op0 = convert_modes (mode, GET_MODE (op0), op0,
10341 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
10342 /* As a last resort, spill op0 to memory, and reload it in a
10343 different mode. */
10344 else if (!MEM_P (op0))
10345 {
10346 /* If the operand is not a MEM, force it into memory. Since we
10347 are going to be changing the mode of the MEM, don't call
10348 force_const_mem for constants because we don't allow pool
10349 constants to change mode. */
10350 tree inner_type = TREE_TYPE (treeop0);
10351
10352 gcc_assert (!TREE_ADDRESSABLE (exp));
10353
10354 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
10355 target
10356 = assign_stack_temp_for_type
10357 (TYPE_MODE (inner_type),
10358 GET_MODE_SIZE (TYPE_MODE (inner_type)), inner_type);
10359
10360 emit_move_insn (target, op0);
10361 op0 = target;
10362 }
10363
10364 /* At this point, OP0 is in the correct mode. If the output type is
10365 such that the operand is known to be aligned, indicate that it is.
10366 Otherwise, we need only be concerned about alignment for non-BLKmode
10367 results. */
10368 if (MEM_P (op0))
10369 {
10370 enum insn_code icode;
10371
10372 if (TYPE_ALIGN_OK (type))
10373 {
10374 /* ??? Copying the MEM without substantially changing it might
10375 run afoul of the code handling volatile memory references in
10376 store_expr, which assumes that TARGET is returned unmodified
10377 if it has been used. */
10378 op0 = copy_rtx (op0);
10379 set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type)));
10380 }
10381 else if (modifier != EXPAND_WRITE
10382 && modifier != EXPAND_MEMORY
10383 && !inner_reference_p
10384 && mode != BLKmode
10385 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
10386 {
10387 /* If the target does have special handling for unaligned
10388 loads of mode then use them. */
10389 if ((icode = optab_handler (movmisalign_optab, mode))
10390 != CODE_FOR_nothing)
10391 {
10392 rtx reg, insn;
10393
10394 op0 = adjust_address (op0, mode, 0);
10395 /* We've already validated the memory, and we're creating a
10396 new pseudo destination. The predicates really can't
10397 fail. */
10398 reg = gen_reg_rtx (mode);
10399
10400 /* Nor can the insn generator. */
10401 insn = GEN_FCN (icode) (reg, op0);
10402 emit_insn (insn);
10403 return reg;
10404 }
10405 else if (STRICT_ALIGNMENT)
10406 {
10407 tree inner_type = TREE_TYPE (treeop0);
10408 HOST_WIDE_INT temp_size
10409 = MAX (int_size_in_bytes (inner_type),
10410 (HOST_WIDE_INT) GET_MODE_SIZE (mode));
10411 rtx new_rtx
10412 = assign_stack_temp_for_type (mode, temp_size, type);
10413 rtx new_with_op0_mode
10414 = adjust_address (new_rtx, GET_MODE (op0), 0);
10415
10416 gcc_assert (!TREE_ADDRESSABLE (exp));
10417
10418 if (GET_MODE (op0) == BLKmode)
10419 emit_block_move (new_with_op0_mode, op0,
10420 GEN_INT (GET_MODE_SIZE (mode)),
10421 (modifier == EXPAND_STACK_PARM
10422 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10423 else
10424 emit_move_insn (new_with_op0_mode, op0);
10425
10426 op0 = new_rtx;
10427 }
10428 }
10429
10430 op0 = adjust_address (op0, mode, 0);
10431 }
10432
10433 return op0;
10434
10435 case MODIFY_EXPR:
10436 {
10437 tree lhs = treeop0;
10438 tree rhs = treeop1;
10439 gcc_assert (ignore);
10440
10441 /* Check for |= or &= of a bitfield of size one into another bitfield
10442 of size 1. In this case, (unless we need the result of the
10443 assignment) we can do this more efficiently with a
10444 test followed by an assignment, if necessary.
10445
10446 ??? At this point, we can't get a BIT_FIELD_REF here. But if
10447 things change so we do, this code should be enhanced to
10448 support it. */
10449 if (TREE_CODE (lhs) == COMPONENT_REF
10450 && (TREE_CODE (rhs) == BIT_IOR_EXPR
10451 || TREE_CODE (rhs) == BIT_AND_EXPR)
10452 && TREE_OPERAND (rhs, 0) == lhs
10453 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
10454 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
10455 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
10456 {
10457 rtx label = gen_label_rtx ();
10458 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
10459 do_jump (TREE_OPERAND (rhs, 1),
10460 value ? label : 0,
10461 value ? 0 : label, -1);
10462 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
10463 false);
10464 do_pending_stack_adjust ();
10465 emit_label (label);
10466 return const0_rtx;
10467 }
10468
10469 expand_assignment (lhs, rhs, false);
10470 return const0_rtx;
10471 }
10472
10473 case ADDR_EXPR:
10474 return expand_expr_addr_expr (exp, target, tmode, modifier);
10475
10476 case REALPART_EXPR:
10477 op0 = expand_normal (treeop0);
10478 return read_complex_part (op0, false);
10479
10480 case IMAGPART_EXPR:
10481 op0 = expand_normal (treeop0);
10482 return read_complex_part (op0, true);
10483
10484 case RETURN_EXPR:
10485 case LABEL_EXPR:
10486 case GOTO_EXPR:
10487 case SWITCH_EXPR:
10488 case ASM_EXPR:
10489 /* Expanded in cfgexpand.c. */
10490 gcc_unreachable ();
10491
10492 case TRY_CATCH_EXPR:
10493 case CATCH_EXPR:
10494 case EH_FILTER_EXPR:
10495 case TRY_FINALLY_EXPR:
10496 /* Lowered by tree-eh.c. */
10497 gcc_unreachable ();
10498
10499 case WITH_CLEANUP_EXPR:
10500 case CLEANUP_POINT_EXPR:
10501 case TARGET_EXPR:
10502 case CASE_LABEL_EXPR:
10503 case VA_ARG_EXPR:
10504 case BIND_EXPR:
10505 case INIT_EXPR:
10506 case CONJ_EXPR:
10507 case COMPOUND_EXPR:
10508 case PREINCREMENT_EXPR:
10509 case PREDECREMENT_EXPR:
10510 case POSTINCREMENT_EXPR:
10511 case POSTDECREMENT_EXPR:
10512 case LOOP_EXPR:
10513 case EXIT_EXPR:
10514 case COMPOUND_LITERAL_EXPR:
10515 /* Lowered by gimplify.c. */
10516 gcc_unreachable ();
10517
10518 case FDESC_EXPR:
10519 /* Function descriptors are not valid except for as
10520 initialization constants, and should not be expanded. */
10521 gcc_unreachable ();
10522
10523 case WITH_SIZE_EXPR:
10524 /* WITH_SIZE_EXPR expands to its first argument. The caller should
10525 have pulled out the size to use in whatever context it needed. */
10526 return expand_expr_real (treeop0, original_target, tmode,
10527 modifier, alt_rtl, inner_reference_p);
10528
10529 default:
10530 return expand_expr_real_2 (&ops, target, tmode, modifier);
10531 }
10532 }
10533
10534 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
10535 signedness of TYPE), possibly returning the result in TARGET. */
10536 static rtx
reduce_to_bit_field_precision(rtx exp,rtx target,tree type)10537 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
10538 {
10539 HOST_WIDE_INT prec = TYPE_PRECISION (type);
10540 if (target && GET_MODE (target) != GET_MODE (exp))
10541 target = 0;
10542 /* For constant values, reduce using build_int_cst_type. */
10543 if (CONST_INT_P (exp))
10544 {
10545 HOST_WIDE_INT value = INTVAL (exp);
10546 tree t = build_int_cst_type (type, value);
10547 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
10548 }
10549 else if (TYPE_UNSIGNED (type))
10550 {
10551 rtx mask = immed_double_int_const (double_int::mask (prec),
10552 GET_MODE (exp));
10553 return expand_and (GET_MODE (exp), exp, mask, target);
10554 }
10555 else
10556 {
10557 int count = GET_MODE_PRECISION (GET_MODE (exp)) - prec;
10558 exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp),
10559 exp, count, target, 0);
10560 return expand_shift (RSHIFT_EXPR, GET_MODE (exp),
10561 exp, count, target, 0);
10562 }
10563 }
10564
10565 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
10566 when applied to the address of EXP produces an address known to be
10567 aligned more than BIGGEST_ALIGNMENT. */
10568
10569 static int
is_aligning_offset(const_tree offset,const_tree exp)10570 is_aligning_offset (const_tree offset, const_tree exp)
10571 {
10572 /* Strip off any conversions. */
10573 while (CONVERT_EXPR_P (offset))
10574 offset = TREE_OPERAND (offset, 0);
10575
10576 /* We must now have a BIT_AND_EXPR with a constant that is one less than
10577 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
10578 if (TREE_CODE (offset) != BIT_AND_EXPR
10579 || !host_integerp (TREE_OPERAND (offset, 1), 1)
10580 || compare_tree_int (TREE_OPERAND (offset, 1),
10581 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
10582 || exact_log2 (tree_low_cst (TREE_OPERAND (offset, 1), 1) + 1) < 0)
10583 return 0;
10584
10585 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
10586 It must be NEGATE_EXPR. Then strip any more conversions. */
10587 offset = TREE_OPERAND (offset, 0);
10588 while (CONVERT_EXPR_P (offset))
10589 offset = TREE_OPERAND (offset, 0);
10590
10591 if (TREE_CODE (offset) != NEGATE_EXPR)
10592 return 0;
10593
10594 offset = TREE_OPERAND (offset, 0);
10595 while (CONVERT_EXPR_P (offset))
10596 offset = TREE_OPERAND (offset, 0);
10597
10598 /* This must now be the address of EXP. */
10599 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
10600 }
10601
10602 /* Return the tree node if an ARG corresponds to a string constant or zero
10603 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
10604 in bytes within the string that ARG is accessing. The type of the
10605 offset will be `sizetype'. */
10606
10607 tree
string_constant(tree arg,tree * ptr_offset)10608 string_constant (tree arg, tree *ptr_offset)
10609 {
10610 tree array, offset, lower_bound;
10611 STRIP_NOPS (arg);
10612
10613 if (TREE_CODE (arg) == ADDR_EXPR)
10614 {
10615 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
10616 {
10617 *ptr_offset = size_zero_node;
10618 return TREE_OPERAND (arg, 0);
10619 }
10620 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
10621 {
10622 array = TREE_OPERAND (arg, 0);
10623 offset = size_zero_node;
10624 }
10625 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
10626 {
10627 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10628 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10629 if (TREE_CODE (array) != STRING_CST
10630 && TREE_CODE (array) != VAR_DECL)
10631 return 0;
10632
10633 /* Check if the array has a nonzero lower bound. */
10634 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
10635 if (!integer_zerop (lower_bound))
10636 {
10637 /* If the offset and base aren't both constants, return 0. */
10638 if (TREE_CODE (lower_bound) != INTEGER_CST)
10639 return 0;
10640 if (TREE_CODE (offset) != INTEGER_CST)
10641 return 0;
10642 /* Adjust offset by the lower bound. */
10643 offset = size_diffop (fold_convert (sizetype, offset),
10644 fold_convert (sizetype, lower_bound));
10645 }
10646 }
10647 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == MEM_REF)
10648 {
10649 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10650 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10651 if (TREE_CODE (array) != ADDR_EXPR)
10652 return 0;
10653 array = TREE_OPERAND (array, 0);
10654 if (TREE_CODE (array) != STRING_CST
10655 && TREE_CODE (array) != VAR_DECL)
10656 return 0;
10657 }
10658 else
10659 return 0;
10660 }
10661 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
10662 {
10663 tree arg0 = TREE_OPERAND (arg, 0);
10664 tree arg1 = TREE_OPERAND (arg, 1);
10665
10666 STRIP_NOPS (arg0);
10667 STRIP_NOPS (arg1);
10668
10669 if (TREE_CODE (arg0) == ADDR_EXPR
10670 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
10671 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
10672 {
10673 array = TREE_OPERAND (arg0, 0);
10674 offset = arg1;
10675 }
10676 else if (TREE_CODE (arg1) == ADDR_EXPR
10677 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
10678 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
10679 {
10680 array = TREE_OPERAND (arg1, 0);
10681 offset = arg0;
10682 }
10683 else
10684 return 0;
10685 }
10686 else
10687 return 0;
10688
10689 if (TREE_CODE (array) == STRING_CST)
10690 {
10691 *ptr_offset = fold_convert (sizetype, offset);
10692 return array;
10693 }
10694 else if (TREE_CODE (array) == VAR_DECL
10695 || TREE_CODE (array) == CONST_DECL)
10696 {
10697 int length;
10698
10699 /* Variables initialized to string literals can be handled too. */
10700 if (!const_value_known_p (array)
10701 || !DECL_INITIAL (array)
10702 || TREE_CODE (DECL_INITIAL (array)) != STRING_CST)
10703 return 0;
10704
10705 /* Avoid const char foo[4] = "abcde"; */
10706 if (DECL_SIZE_UNIT (array) == NULL_TREE
10707 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
10708 || (length = TREE_STRING_LENGTH (DECL_INITIAL (array))) <= 0
10709 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
10710 return 0;
10711
10712 /* If variable is bigger than the string literal, OFFSET must be constant
10713 and inside of the bounds of the string literal. */
10714 offset = fold_convert (sizetype, offset);
10715 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
10716 && (! host_integerp (offset, 1)
10717 || compare_tree_int (offset, length) >= 0))
10718 return 0;
10719
10720 *ptr_offset = offset;
10721 return DECL_INITIAL (array);
10722 }
10723
10724 return 0;
10725 }
10726
10727 /* Generate code to calculate OPS, and exploded expression
10728 using a store-flag instruction and return an rtx for the result.
10729 OPS reflects a comparison.
10730
10731 If TARGET is nonzero, store the result there if convenient.
10732
10733 Return zero if there is no suitable set-flag instruction
10734 available on this machine.
10735
10736 Once expand_expr has been called on the arguments of the comparison,
10737 we are committed to doing the store flag, since it is not safe to
10738 re-evaluate the expression. We emit the store-flag insn by calling
10739 emit_store_flag, but only expand the arguments if we have a reason
10740 to believe that emit_store_flag will be successful. If we think that
10741 it will, but it isn't, we have to simulate the store-flag with a
10742 set/jump/set sequence. */
10743
10744 static rtx
do_store_flag(sepops ops,rtx target,enum machine_mode mode)10745 do_store_flag (sepops ops, rtx target, enum machine_mode mode)
10746 {
10747 enum rtx_code code;
10748 tree arg0, arg1, type;
10749 tree tem;
10750 enum machine_mode operand_mode;
10751 int unsignedp;
10752 rtx op0, op1;
10753 rtx subtarget = target;
10754 location_t loc = ops->location;
10755
10756 arg0 = ops->op0;
10757 arg1 = ops->op1;
10758
10759 /* Don't crash if the comparison was erroneous. */
10760 if (arg0 == error_mark_node || arg1 == error_mark_node)
10761 return const0_rtx;
10762
10763 type = TREE_TYPE (arg0);
10764 operand_mode = TYPE_MODE (type);
10765 unsignedp = TYPE_UNSIGNED (type);
10766
10767 /* We won't bother with BLKmode store-flag operations because it would mean
10768 passing a lot of information to emit_store_flag. */
10769 if (operand_mode == BLKmode)
10770 return 0;
10771
10772 /* We won't bother with store-flag operations involving function pointers
10773 when function pointers must be canonicalized before comparisons. */
10774 #ifdef HAVE_canonicalize_funcptr_for_compare
10775 if (HAVE_canonicalize_funcptr_for_compare
10776 && ((TREE_CODE (TREE_TYPE (arg0)) == POINTER_TYPE
10777 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0)))
10778 == FUNCTION_TYPE))
10779 || (TREE_CODE (TREE_TYPE (arg1)) == POINTER_TYPE
10780 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1)))
10781 == FUNCTION_TYPE))))
10782 return 0;
10783 #endif
10784
10785 STRIP_NOPS (arg0);
10786 STRIP_NOPS (arg1);
10787
10788 /* For vector typed comparisons emit code to generate the desired
10789 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
10790 expander for this. */
10791 if (TREE_CODE (ops->type) == VECTOR_TYPE)
10792 {
10793 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
10794 tree if_true = constant_boolean_node (true, ops->type);
10795 tree if_false = constant_boolean_node (false, ops->type);
10796 return expand_vec_cond_expr (ops->type, ifexp, if_true, if_false, target);
10797 }
10798
10799 /* Get the rtx comparison code to use. We know that EXP is a comparison
10800 operation of some type. Some comparisons against 1 and -1 can be
10801 converted to comparisons with zero. Do so here so that the tests
10802 below will be aware that we have a comparison with zero. These
10803 tests will not catch constants in the first operand, but constants
10804 are rarely passed as the first operand. */
10805
10806 switch (ops->code)
10807 {
10808 case EQ_EXPR:
10809 code = EQ;
10810 break;
10811 case NE_EXPR:
10812 code = NE;
10813 break;
10814 case LT_EXPR:
10815 if (integer_onep (arg1))
10816 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
10817 else
10818 code = unsignedp ? LTU : LT;
10819 break;
10820 case LE_EXPR:
10821 if (! unsignedp && integer_all_onesp (arg1))
10822 arg1 = integer_zero_node, code = LT;
10823 else
10824 code = unsignedp ? LEU : LE;
10825 break;
10826 case GT_EXPR:
10827 if (! unsignedp && integer_all_onesp (arg1))
10828 arg1 = integer_zero_node, code = GE;
10829 else
10830 code = unsignedp ? GTU : GT;
10831 break;
10832 case GE_EXPR:
10833 if (integer_onep (arg1))
10834 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
10835 else
10836 code = unsignedp ? GEU : GE;
10837 break;
10838
10839 case UNORDERED_EXPR:
10840 code = UNORDERED;
10841 break;
10842 case ORDERED_EXPR:
10843 code = ORDERED;
10844 break;
10845 case UNLT_EXPR:
10846 code = UNLT;
10847 break;
10848 case UNLE_EXPR:
10849 code = UNLE;
10850 break;
10851 case UNGT_EXPR:
10852 code = UNGT;
10853 break;
10854 case UNGE_EXPR:
10855 code = UNGE;
10856 break;
10857 case UNEQ_EXPR:
10858 code = UNEQ;
10859 break;
10860 case LTGT_EXPR:
10861 code = LTGT;
10862 break;
10863
10864 default:
10865 gcc_unreachable ();
10866 }
10867
10868 /* Put a constant second. */
10869 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
10870 || TREE_CODE (arg0) == FIXED_CST)
10871 {
10872 tem = arg0; arg0 = arg1; arg1 = tem;
10873 code = swap_condition (code);
10874 }
10875
10876 /* If this is an equality or inequality test of a single bit, we can
10877 do this by shifting the bit being tested to the low-order bit and
10878 masking the result with the constant 1. If the condition was EQ,
10879 we xor it with 1. This does not require an scc insn and is faster
10880 than an scc insn even if we have it.
10881
10882 The code to make this transformation was moved into fold_single_bit_test,
10883 so we just call into the folder and expand its result. */
10884
10885 if ((code == NE || code == EQ)
10886 && integer_zerop (arg1)
10887 && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
10888 {
10889 gimple srcstmt = get_def_for_expr (arg0, BIT_AND_EXPR);
10890 if (srcstmt
10891 && integer_pow2p (gimple_assign_rhs2 (srcstmt)))
10892 {
10893 enum tree_code tcode = code == NE ? NE_EXPR : EQ_EXPR;
10894 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
10895 tree temp = fold_build2_loc (loc, BIT_AND_EXPR, TREE_TYPE (arg1),
10896 gimple_assign_rhs1 (srcstmt),
10897 gimple_assign_rhs2 (srcstmt));
10898 temp = fold_single_bit_test (loc, tcode, temp, arg1, type);
10899 if (temp)
10900 return expand_expr (temp, target, VOIDmode, EXPAND_NORMAL);
10901 }
10902 }
10903
10904 if (! get_subtarget (target)
10905 || GET_MODE (subtarget) != operand_mode)
10906 subtarget = 0;
10907
10908 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
10909
10910 if (target == 0)
10911 target = gen_reg_rtx (mode);
10912
10913 /* Try a cstore if possible. */
10914 return emit_store_flag_force (target, code, op0, op1,
10915 operand_mode, unsignedp,
10916 (TYPE_PRECISION (ops->type) == 1
10917 && !TYPE_UNSIGNED (ops->type)) ? -1 : 1);
10918 }
10919
10920
10921 /* Stubs in case we haven't got a casesi insn. */
10922 #ifndef HAVE_casesi
10923 # define HAVE_casesi 0
10924 # define gen_casesi(a, b, c, d, e) (0)
10925 # define CODE_FOR_casesi CODE_FOR_nothing
10926 #endif
10927
10928 /* Attempt to generate a casesi instruction. Returns 1 if successful,
10929 0 otherwise (i.e. if there is no casesi instruction).
10930
10931 DEFAULT_PROBABILITY is the probability of jumping to the default
10932 label. */
10933 int
try_casesi(tree index_type,tree index_expr,tree minval,tree range,rtx table_label,rtx default_label,rtx fallback_label,int default_probability)10934 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
10935 rtx table_label, rtx default_label, rtx fallback_label,
10936 int default_probability)
10937 {
10938 struct expand_operand ops[5];
10939 enum machine_mode index_mode = SImode;
10940 rtx op1, op2, index;
10941
10942 if (! HAVE_casesi)
10943 return 0;
10944
10945 /* Convert the index to SImode. */
10946 if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode))
10947 {
10948 enum machine_mode omode = TYPE_MODE (index_type);
10949 rtx rangertx = expand_normal (range);
10950
10951 /* We must handle the endpoints in the original mode. */
10952 index_expr = build2 (MINUS_EXPR, index_type,
10953 index_expr, minval);
10954 minval = integer_zero_node;
10955 index = expand_normal (index_expr);
10956 if (default_label)
10957 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
10958 omode, 1, default_label,
10959 default_probability);
10960 /* Now we can safely truncate. */
10961 index = convert_to_mode (index_mode, index, 0);
10962 }
10963 else
10964 {
10965 if (TYPE_MODE (index_type) != index_mode)
10966 {
10967 index_type = lang_hooks.types.type_for_mode (index_mode, 0);
10968 index_expr = fold_convert (index_type, index_expr);
10969 }
10970
10971 index = expand_normal (index_expr);
10972 }
10973
10974 do_pending_stack_adjust ();
10975
10976 op1 = expand_normal (minval);
10977 op2 = expand_normal (range);
10978
10979 create_input_operand (&ops[0], index, index_mode);
10980 create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval));
10981 create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range));
10982 create_fixed_operand (&ops[3], table_label);
10983 create_fixed_operand (&ops[4], (default_label
10984 ? default_label
10985 : fallback_label));
10986 expand_jump_insn (CODE_FOR_casesi, 5, ops);
10987 return 1;
10988 }
10989
10990 /* Attempt to generate a tablejump instruction; same concept. */
10991 #ifndef HAVE_tablejump
10992 #define HAVE_tablejump 0
10993 #define gen_tablejump(x, y) (0)
10994 #endif
10995
10996 /* Subroutine of the next function.
10997
10998 INDEX is the value being switched on, with the lowest value
10999 in the table already subtracted.
11000 MODE is its expected mode (needed if INDEX is constant).
11001 RANGE is the length of the jump table.
11002 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
11003
11004 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
11005 index value is out of range.
11006 DEFAULT_PROBABILITY is the probability of jumping to
11007 the default label. */
11008
11009 static void
do_tablejump(rtx index,enum machine_mode mode,rtx range,rtx table_label,rtx default_label,int default_probability)11010 do_tablejump (rtx index, enum machine_mode mode, rtx range, rtx table_label,
11011 rtx default_label, int default_probability)
11012 {
11013 rtx temp, vector;
11014
11015 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
11016 cfun->cfg->max_jumptable_ents = INTVAL (range);
11017
11018 /* Do an unsigned comparison (in the proper mode) between the index
11019 expression and the value which represents the length of the range.
11020 Since we just finished subtracting the lower bound of the range
11021 from the index expression, this comparison allows us to simultaneously
11022 check that the original index expression value is both greater than
11023 or equal to the minimum value of the range and less than or equal to
11024 the maximum value of the range. */
11025
11026 if (default_label)
11027 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
11028 default_label, default_probability);
11029
11030
11031 /* If index is in range, it must fit in Pmode.
11032 Convert to Pmode so we can index with it. */
11033 if (mode != Pmode)
11034 index = convert_to_mode (Pmode, index, 1);
11035
11036 /* Don't let a MEM slip through, because then INDEX that comes
11037 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
11038 and break_out_memory_refs will go to work on it and mess it up. */
11039 #ifdef PIC_CASE_VECTOR_ADDRESS
11040 if (flag_pic && !REG_P (index))
11041 index = copy_to_mode_reg (Pmode, index);
11042 #endif
11043
11044 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
11045 GET_MODE_SIZE, because this indicates how large insns are. The other
11046 uses should all be Pmode, because they are addresses. This code
11047 could fail if addresses and insns are not the same size. */
11048 index = gen_rtx_PLUS (Pmode,
11049 gen_rtx_MULT (Pmode, index,
11050 GEN_INT (GET_MODE_SIZE (CASE_VECTOR_MODE))),
11051 gen_rtx_LABEL_REF (Pmode, table_label));
11052 #ifdef PIC_CASE_VECTOR_ADDRESS
11053 if (flag_pic)
11054 index = PIC_CASE_VECTOR_ADDRESS (index);
11055 else
11056 #endif
11057 index = memory_address (CASE_VECTOR_MODE, index);
11058 temp = gen_reg_rtx (CASE_VECTOR_MODE);
11059 vector = gen_const_mem (CASE_VECTOR_MODE, index);
11060 convert_move (temp, vector, 0);
11061
11062 emit_jump_insn (gen_tablejump (temp, table_label));
11063
11064 /* If we are generating PIC code or if the table is PC-relative, the
11065 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
11066 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
11067 emit_barrier ();
11068 }
11069
11070 int
try_tablejump(tree index_type,tree index_expr,tree minval,tree range,rtx table_label,rtx default_label,int default_probability)11071 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
11072 rtx table_label, rtx default_label, int default_probability)
11073 {
11074 rtx index;
11075
11076 if (! HAVE_tablejump)
11077 return 0;
11078
11079 index_expr = fold_build2 (MINUS_EXPR, index_type,
11080 fold_convert (index_type, index_expr),
11081 fold_convert (index_type, minval));
11082 index = expand_normal (index_expr);
11083 do_pending_stack_adjust ();
11084
11085 do_tablejump (index, TYPE_MODE (index_type),
11086 convert_modes (TYPE_MODE (index_type),
11087 TYPE_MODE (TREE_TYPE (range)),
11088 expand_normal (range),
11089 TYPE_UNSIGNED (TREE_TYPE (range))),
11090 table_label, default_label, default_probability);
11091 return 1;
11092 }
11093
11094 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
11095 static rtx
const_vector_from_tree(tree exp)11096 const_vector_from_tree (tree exp)
11097 {
11098 rtvec v;
11099 unsigned i;
11100 int units;
11101 tree elt;
11102 enum machine_mode inner, mode;
11103
11104 mode = TYPE_MODE (TREE_TYPE (exp));
11105
11106 if (initializer_zerop (exp))
11107 return CONST0_RTX (mode);
11108
11109 units = GET_MODE_NUNITS (mode);
11110 inner = GET_MODE_INNER (mode);
11111
11112 v = rtvec_alloc (units);
11113
11114 for (i = 0; i < VECTOR_CST_NELTS (exp); ++i)
11115 {
11116 elt = VECTOR_CST_ELT (exp, i);
11117
11118 if (TREE_CODE (elt) == REAL_CST)
11119 RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt),
11120 inner);
11121 else if (TREE_CODE (elt) == FIXED_CST)
11122 RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
11123 inner);
11124 else
11125 RTVEC_ELT (v, i) = immed_double_int_const (tree_to_double_int (elt),
11126 inner);
11127 }
11128
11129 return gen_rtx_CONST_VECTOR (mode, v);
11130 }
11131
11132 /* Build a decl for a personality function given a language prefix. */
11133
11134 tree
build_personality_function(const char * lang)11135 build_personality_function (const char *lang)
11136 {
11137 const char *unwind_and_version;
11138 tree decl, type;
11139 char *name;
11140
11141 switch (targetm_common.except_unwind_info (&global_options))
11142 {
11143 case UI_NONE:
11144 return NULL;
11145 case UI_SJLJ:
11146 unwind_and_version = "_sj0";
11147 break;
11148 case UI_DWARF2:
11149 case UI_TARGET:
11150 unwind_and_version = "_v0";
11151 break;
11152 case UI_SEH:
11153 unwind_and_version = "_seh0";
11154 break;
11155 default:
11156 gcc_unreachable ();
11157 }
11158
11159 name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL));
11160
11161 type = build_function_type_list (integer_type_node, integer_type_node,
11162 long_long_unsigned_type_node,
11163 ptr_type_node, ptr_type_node, NULL_TREE);
11164 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
11165 get_identifier (name), type);
11166 DECL_ARTIFICIAL (decl) = 1;
11167 DECL_EXTERNAL (decl) = 1;
11168 TREE_PUBLIC (decl) = 1;
11169
11170 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
11171 are the flags assigned by targetm.encode_section_info. */
11172 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
11173
11174 return decl;
11175 }
11176
11177 /* Extracts the personality function of DECL and returns the corresponding
11178 libfunc. */
11179
11180 rtx
get_personality_function(tree decl)11181 get_personality_function (tree decl)
11182 {
11183 tree personality = DECL_FUNCTION_PERSONALITY (decl);
11184 enum eh_personality_kind pk;
11185
11186 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl));
11187 if (pk == eh_personality_none)
11188 return NULL;
11189
11190 if (!personality
11191 && pk == eh_personality_any)
11192 personality = lang_hooks.eh_personality ();
11193
11194 if (pk == eh_personality_lang)
11195 gcc_assert (personality != NULL_TREE);
11196
11197 return XEXP (DECL_RTL (personality), 0);
11198 }
11199
11200 #include "gt-expr.h"
11201