1# Copyright (C) 2012-2016 Free Software Foundation, Inc. 2# 3# This file is part of GCC. 4# 5# GCC is free software; you can redistribute it and/or modify 6# it under the terms of the GNU General Public License as published by 7# the Free Software Foundation; either version 3, or (at your option) 8# any later version. 9# 10# GCC is distributed in the hope that it will be useful, 11# but WITHOUT ANY WARRANTY; without even the implied warranty of 12# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13# GNU General Public License for more details. 14# 15# You should have received a copy of the GNU General Public License 16# along with GCC; see the file COPYING3. If not see 17# <http://www.gnu.org/licenses/>. 18 19# This is a target makefile fragment that attempts to get 20# multilibs built for the range of CPU's, FPU's and ABI's that 21# are relevant for the A-profile architecture. It should 22# not be used in conjunction with another make file fragment and 23# assumes --with-arch, --with-cpu, --with-fpu, --with-float, --with-mode 24# have their default values during the configure step. We enforce 25# this during the top-level configury. 26 27MULTILIB_OPTIONS = 28MULTILIB_DIRNAMES = 29MULTILIB_EXCEPTIONS = 30MULTILIB_MATCHES = 31MULTILIB_REUSE = 32 33# We have the following hierachy: 34# ISA: A32 (.) or T32 (thumb) 35# Architecture: ARMv7-A (v7-a), ARMv7VE (v7ve), or ARMv8-A (v8-a). 36# FPU: VFPv3-D16 (fpv3), NEONv1 (simdv1), VFPv4-D16 (fpv4), 37# NEON-VFPV4 (simdvfpv4), NEON for ARMv8 (simdv8), or None (.). 38# Float-abi: Soft (.), softfp (softfp), or hard (hardfp). 39 40MULTILIB_OPTIONS += mthumb 41MULTILIB_DIRNAMES += thumb 42 43MULTILIB_OPTIONS += march=armv7-a/march=armv7ve/march=armv8-a 44MULTILIB_DIRNAMES += v7-a v7ve v8-a 45 46MULTILIB_OPTIONS += mfpu=vfpv3-d16/mfpu=neon/mfpu=vfpv4-d16/mfpu=neon-vfpv4/mfpu=neon-fp-armv8 47MULTILIB_DIRNAMES += fpv3 simdv1 fpv4 simdvfpv4 simdv8 48 49MULTILIB_OPTIONS += mfloat-abi=softfp/mfloat-abi=hard 50MULTILIB_DIRNAMES += softfp hard 51 52# We don't build no-float libraries with an FPU. 53MULTILIB_EXCEPTIONS += *mfpu=vfpv3-d16 54MULTILIB_EXCEPTIONS += *mfpu=neon 55MULTILIB_EXCEPTIONS += *mfpu=vfpv4-d16 56MULTILIB_EXCEPTIONS += *mfpu=neon-vfpv4 57MULTILIB_EXCEPTIONS += *mfpu=neon-fp-armv8 58 59# We don't build libraries requiring an FPU at the CPU/Arch/ISA level. 60MULTILIB_EXCEPTIONS += mfloat-abi=* 61MULTILIB_EXCEPTIONS += mfpu=* 62MULTILIB_EXCEPTIONS += mthumb/mfloat-abi=* 63MULTILIB_EXCEPTIONS += mthumb/mfpu=* 64MULTILIB_EXCEPTIONS += *march=armv7-a/mfloat-abi=* 65MULTILIB_EXCEPTIONS += *march=armv7ve/mfloat-abi=* 66MULTILIB_EXCEPTIONS += *march=armv8-a/mfloat-abi=* 67 68# Ensure the correct FPU variants apply to the correct base architectures. 69MULTILIB_EXCEPTIONS += *march=armv7ve/*mfpu=vfpv3-d16* 70MULTILIB_EXCEPTIONS += *march=armv7ve/*mfpu=neon/* 71MULTILIB_EXCEPTIONS += *march=armv8-a/*mfpu=vfpv3-d16* 72MULTILIB_EXCEPTIONS += *march=armv8-a/*mfpu=neon/* 73MULTILIB_EXCEPTIONS += *march=armv7-a/*mfpu=vfpv4-d16* 74MULTILIB_EXCEPTIONS += *march=armv7-a/*mfpu=neon-vfpv4* 75MULTILIB_EXCEPTIONS += *march=armv8-a/*mfpu=vfpv4-d16* 76MULTILIB_EXCEPTIONS += *march=armv8-a/*mfpu=neon-vfpv4* 77MULTILIB_EXCEPTIONS += *march=armv7-a/*mfpu=neon-fp-armv8* 78MULTILIB_EXCEPTIONS += *march=armv7ve/*mfpu=neon-fp-armv8* 79 80# CPU Matches 81MULTILIB_MATCHES += march?armv7-a=mcpu?cortex-a8 82MULTILIB_MATCHES += march?armv7-a=mcpu?cortex-a9 83MULTILIB_MATCHES += march?armv7-a=mcpu?cortex-a5 84MULTILIB_MATCHES += march?armv7ve=mcpu?cortex-a15 85MULTILIB_MATCHES += march?armv7ve=mcpu?cortex-a12 86MULTILIB_MATCHES += march?armv7ve=mcpu?cortex-a17 87MULTILIB_MATCHES += march?armv7ve=mcpu?cortex-a15.cortex-a7 88MULTILIB_MATCHES += march?armv7ve=mcpu?cortex-a17.cortex-a7 89MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a32 90MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a35 91MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a53 92MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a57 93MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a57.cortex-a53 94MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a72 95MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a72.cortex-a53 96MULTILIB_MATCHES += march?armv8-a=mcpu?exynos-m1 97MULTILIB_MATCHES += march?armv8-a=mcpu?qdf24xx 98MULTILIB_MATCHES += march?armv8-a=mcpu?xgene1 99 100# Arch Matches 101MULTILIB_MATCHES += march?armv8-a=march?armv8-a+crc 102MULTILIB_MATCHES += march?armv8-a=march?armv8.1-a 103MULTILIB_MATCHES += march?armv8-a=march?armv8.1-a+crc 104 105# FPU matches 106MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?vfpv3 107MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?vfpv3-fp16 108MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?vfpv3-fp16-d16 109MULTILIB_MATCHES += mfpu?vfpv4-d16=mfpu?vfpv4 110MULTILIB_MATCHES += mfpu?neon-fp-armv8=mfpu?crypto-neon-fp-armv8 111 112 113# Map all requests for vfpv3 with a later CPU to vfpv3-d16 v7-a. 114# So if new CPUs are added above at the newer architecture levels, 115# do something to map them below here. 116# We take the approach of mapping down to v7-a regardless of what 117# the fp option is if the integer architecture brings things down. 118# This applies to any similar combination at the v7ve and v8-a arch 119# levels. 120 121MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=march.armv7ve/mfpu.vfpv3-d16/mfloat-abi.hard 122MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=march.armv7ve/mfpu.vfpv3-d16/mfloat-abi.softfp 123MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=march.armv8-a/mfpu.vfpv3-d16/mfloat-abi.hard 124MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=march.armv8-a/mfpu.vfpv3-d16/mfloat-abi.softfp 125MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=march.armv7-a/mfpu.vfpv4-d16/mfloat-abi.hard 126MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=march.armv7-a/mfpu.vfpv4-d16/mfloat-abi.softfp 127MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=march.armv7-a/mfpu.fp-armv8/mfloat-abi.hard 128MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=march.armv7-a/mfpu.fp-armv8/mfloat-abi.softfp 129MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=march.armv7-a/mfpu.vfpv4/mfloat-abi.hard 130MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=march.armv7-a/mfpu.vfpv4/mfloat-abi.softfp 131 132 133MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.hard=march.armv7ve/mfpu.neon/mfloat-abi.hard 134MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.softfp=march.armv7ve/mfpu.neon/mfloat-abi.softfp 135MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.hard=march.armv8-a/mfpu.neon/mfloat-abi.hard 136MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.softfp=march.armv8-a/mfpu.neon/mfloat-abi.softfp 137MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.hard=march.armv7-a/mfpu.neon-vfpv4/mfloat-abi.hard 138MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.softfp=march.armv7-a/mfpu.neon-vfpv4/mfloat-abi.softfp 139MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.hard=march.armv7-a/mfpu.neon-fp-armv8/mfloat-abi.hard 140MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.softfp=march.armv7-a/mfpu.neon-fp-armv8/mfloat-abi.softfp 141 142 143MULTILIB_REUSE += march.armv7ve/mfpu.vfpv4-d16/mfloat-abi.hard=march.armv7ve/mfpu.fp-armv8/mfloat-abi.hard 144MULTILIB_REUSE += march.armv7ve/mfpu.vfpv4-d16/mfloat-abi.softfp=march.armv7ve/mfpu.fp-armv8/mfloat-abi.softfp 145MULTILIB_REUSE += march.armv7ve/mfpu.vfpv4-d16/mfloat-abi.hard=march.armv8-a/mfpu.vfpv4/mfloat-abi.hard 146MULTILIB_REUSE += march.armv7ve/mfpu.vfpv4-d16/mfloat-abi.softfp=march.armv8-a/mfpu.vfpv4/mfloat-abi.softfp 147MULTILIB_REUSE += march.armv7ve/mfpu.vfpv4-d16/mfloat-abi.hard=march.armv8-a/mfpu.vfpv4-d16/mfloat-abi.hard 148MULTILIB_REUSE += march.armv7ve/mfpu.vfpv4-d16/mfloat-abi.softfp=march.armv8-a/mfpu.vfpv4-d16/mfloat-abi.softfp 149 150 151MULTILIB_REUSE += march.armv7ve/mfpu.neon-vfpv4/mfloat-abi.hard=march.armv8-a/mfpu.neon-vfpv4/mfloat-abi.hard 152MULTILIB_REUSE += march.armv7ve/mfpu.neon-vfpv4/mfloat-abi.softfp=march.armv8-a/mfpu.neon-vfpv4/mfloat-abi.softfp 153MULTILIB_REUSE += march.armv7ve/mfpu.neon-vfpv4/mfloat-abi.hard=march.armv7ve/mfpu.neon-fp-armv8/mfloat-abi.hard 154MULTILIB_REUSE += march.armv7ve/mfpu.neon-vfpv4/mfloat-abi.softfp=march.armv7ve/mfpu.neon-fp-armv8/mfloat-abi.softfp 155 156 157 158# And again for mthumb. 159 160MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=mthumb/march.armv7ve/mfpu.vfpv3-d16/mfloat-abi.hard 161MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=mthumb/march.armv7ve/mfpu.vfpv3-d16/mfloat-abi.softfp 162MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=mthumb/march.armv8-a/mfpu.vfpv3-d16/mfloat-abi.hard 163MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=mthumb/march.armv8-a/mfpu.vfpv3-d16/mfloat-abi.softfp 164MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=mthumb/march.armv7-a/mfpu.vfpv4-d16/mfloat-abi.hard 165MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=mthumb/march.armv7-a/mfpu.vfpv4-d16/mfloat-abi.softfp 166MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=mthumb/march.armv7-a/mfpu.fp-armv8/mfloat-abi.hard 167MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=mthumb/march.armv7-a/mfpu.fp-armv8/mfloat-abi.softfp 168MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=mthumb/march.armv7-a/mfpu.vfpv4/mfloat-abi.hard 169MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=mthumb/march.armv7-a/mfpu.vfpv4/mfloat-abi.softfp 170 171 172MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.hard=mthumb/march.armv7ve/mfpu.neon/mfloat-abi.hard 173MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.softfp=mthumb/march.armv7ve/mfpu.neon/mfloat-abi.softfp 174MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.hard=mthumb/march.armv8-a/mfpu.neon/mfloat-abi.hard 175MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.softfp=mthumb/march.armv8-a/mfpu.neon/mfloat-abi.softfp 176MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.hard=mthumb/march.armv7-a/mfpu.neon-vfpv4/mfloat-abi.hard 177MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.softfp=mthumb/march.armv7-a/mfpu.neon-vfpv4/mfloat-abi.softfp 178MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.hard=mthumb/march.armv7-a/mfpu.neon-fp-armv8/mfloat-abi.hard 179MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.softfp=mthumb/march.armv7-a/mfpu.neon-fp-armv8/mfloat-abi.softfp 180 181 182MULTILIB_REUSE += mthumb/march.armv7ve/mfpu.vfpv4-d16/mfloat-abi.hard=mthumb/march.armv7ve/mfpu.fp-armv8/mfloat-abi.hard 183MULTILIB_REUSE += mthumb/march.armv7ve/mfpu.vfpv4-d16/mfloat-abi.softfp=mthumb/march.armv7ve/mfpu.fp-armv8/mfloat-abi.softfp 184MULTILIB_REUSE += mthumb/march.armv7ve/mfpu.vfpv4-d16/mfloat-abi.hard=mthumb/march.armv8-a/mfpu.vfpv4/mfloat-abi.hard 185MULTILIB_REUSE += mthumb/march.armv7ve/mfpu.vfpv4-d16/mfloat-abi.softfp=mthumb/march.armv8-a/mfpu.vfpv4/mfloat-abi.softfp 186MULTILIB_REUSE += mthumb/march.armv7ve/mfpu.vfpv4-d16/mfloat-abi.hard=mthumb/march.armv8-a/mfpu.vfpv4-d16/mfloat-abi.hard 187MULTILIB_REUSE += mthumb/march.armv7ve/mfpu.vfpv4-d16/mfloat-abi.softfp=mthumb/march.armv8-a/mfpu.vfpv4-d16/mfloat-abi.softfp 188 189 190MULTILIB_REUSE += mthumb/march.armv7ve/mfpu.neon-vfpv4/mfloat-abi.hard=mthumb/march.armv8-a/mfpu.neon-vfpv4/mfloat-abi.hard 191MULTILIB_REUSE += mthumb/march.armv7ve/mfpu.neon-vfpv4/mfloat-abi.softfp=mthumb/march.armv8-a/mfpu.neon-vfpv4/mfloat-abi.softfp 192MULTILIB_REUSE += mthumb/march.armv7ve/mfpu.neon-vfpv4/mfloat-abi.hard=mthumb/march.armv7ve/mfpu.neon-fp-armv8/mfloat-abi.hard 193MULTILIB_REUSE += mthumb/march.armv7ve/mfpu.neon-vfpv4/mfloat-abi.softfp=mthumb/march.armv7ve/mfpu.neon-fp-armv8/mfloat-abi.softfp 194