1 /* { dg-do compile }  */
2 /* { dg-require-effective-target arm_v8_2a_fp16_neon_ok }  */
3 /* { dg-options "-O2" }  */
4 /* { dg-add-options arm_v8_2a_fp16_neon }  */
5 
6 /* Test instructions generated for the FP16 vector intrinsics.  */
7 
8 #include <arm_neon.h>
9 
10 #define MSTRCAT(L, str)	L##str
11 
12 #define UNOP_TEST(insn)				\
13   float16x4_t					\
14   MSTRCAT (test_##insn, _16x4) (float16x4_t a)	\
15   {						\
16     return MSTRCAT (insn, _f16) (a);		\
17   }						\
18   float16x8_t					\
19   MSTRCAT (test_##insn, _16x8) (float16x8_t a)	\
20   {						\
21     return MSTRCAT (insn, q_f16) (a);		\
22   }
23 
24 #define BINOP_TEST(insn)					\
25   float16x4_t							\
26   MSTRCAT (test_##insn, _16x4) (float16x4_t a, float16x4_t b)	\
27   {								\
28     return MSTRCAT (insn, _f16) (a, b);				\
29   }								\
30   float16x8_t							\
31   MSTRCAT (test_##insn, _16x8) (float16x8_t a, float16x8_t b)	\
32   {								\
33     return MSTRCAT (insn, q_f16) (a, b);			\
34   }
35 
36 #define BINOP_LANE_TEST(insn, I)					\
37   float16x4_t								\
38   MSTRCAT (test_##insn##_lane, _16x4) (float16x4_t a, float16x4_t b)	\
39   {									\
40     return MSTRCAT (insn, _lane_f16) (a, b, I);				\
41   }									\
42   float16x8_t								\
43   MSTRCAT (test_##insn##_lane, _16x8) (float16x8_t a, float16x4_t b)	\
44   {									\
45     return MSTRCAT (insn, q_lane_f16) (a, b, I);			\
46   }
47 
48 #define BINOP_LANEQ_TEST(insn, I)					\
49   float16x4_t								\
50   MSTRCAT (test_##insn##_laneq, _16x4) (float16x4_t a, float16x8_t b)	\
51   {									\
52     return MSTRCAT (insn, _laneq_f16) (a, b, I);			\
53   }									\
54   float16x8_t								\
55   MSTRCAT (test_##insn##_laneq, _16x8) (float16x8_t a, float16x8_t b)	\
56   {									\
57     return MSTRCAT (insn, q_laneq_f16) (a, b, I);			\
58   }									\
59 
60 #define BINOP_N_TEST(insn)					\
61   float16x4_t							\
62   MSTRCAT (test_##insn##_n, _16x4) (float16x4_t a, float16_t b)	\
63   {								\
64     return MSTRCAT (insn, _n_f16) (a, b);			\
65   }								\
66   float16x8_t							\
67   MSTRCAT (test_##insn##_n, _16x8) (float16x8_t a, float16_t b)	\
68   {								\
69     return MSTRCAT (insn, q_n_f16) (a, b);			\
70   }
71 
72 #define TERNOP_TEST(insn)						\
73   float16_t								\
74   MSTRCAT (test_##insn, _16) (float16_t a, float16_t b, float16_t c)	\
75   {									\
76     return MSTRCAT (insn, h_f16) (a, b, c);				\
77   }									\
78   float16x4_t								\
79   MSTRCAT (test_##insn, _16x4) (float16x4_t a, float16x4_t b,		\
80 			       float16x4_t c)				\
81   {									\
82     return MSTRCAT (insn, _f16) (a, b, c);				\
83   }									\
84   float16x8_t								\
85   MSTRCAT (test_##insn, _16x8) (float16x8_t a, float16x8_t b,		\
86 			       float16x8_t c)				\
87   {									\
88     return MSTRCAT (insn, q_f16) (a, b, c);				\
89   }
90 
91 #define VCMP1_TEST(insn)			\
92   uint16x4_t					\
93   MSTRCAT (test_##insn, _16x4) (float16x4_t a)	\
94   {						\
95     return MSTRCAT (insn, _f16) (a);		\
96   }						\
97   uint16x8_t					\
98   MSTRCAT (test_##insn, _16x8) (float16x8_t a)	\
99   {						\
100     return MSTRCAT (insn, q_f16) (a);		\
101   }
102 
103 #define VCMP2_TEST(insn)					\
104   uint16x4_t							\
105   MSTRCAT (test_##insn, _16x4) (float16x4_t a, float16x4_t b)	\
106   {								\
107     return MSTRCAT (insn, _f16) (a, b);				\
108   }								\
109   uint16x8_t							\
110   MSTRCAT (test_##insn, _16x8) (float16x8_t a, float16x8_t b)	\
111   {								\
112     return MSTRCAT (insn, q_f16) (a, b);			\
113   }
114 
115 #define VCVT_TEST(insn, TY, TO, FR)			\
116   MSTRCAT (TO, 16x4_t)					\
117   MSTRCAT (test_##insn, TY) (MSTRCAT (FR, 16x4_t) a)	\
118   {							\
119     return MSTRCAT (insn, TY) (a);			\
120   }							\
121   MSTRCAT (TO, 16x8_t)					\
122   MSTRCAT (test_##insn##_q, TY) (MSTRCAT (FR, 16x8_t) a)	\
123   {							\
124     return MSTRCAT (insn, q##TY) (a);			\
125   }
126 
127 #define VCVT_N_TEST(insn, TY, TO, FR)			\
128   MSTRCAT (TO, 16x4_t)					\
129   MSTRCAT (test_##insn##_n, TY) (MSTRCAT (FR, 16x4_t) a)	\
130   {							\
131     return MSTRCAT (insn, _n##TY) (a, 1);		\
132   }							\
133   MSTRCAT (TO, 16x8_t)					\
134   MSTRCAT (test_##insn##_n_q, TY) (MSTRCAT (FR, 16x8_t) a)	\
135   {							\
136     return MSTRCAT (insn, q_n##TY) (a, 1);		\
137   }
138 
139 VCMP1_TEST (vceqz)
140 /* { dg-final { scan-assembler-times {vceq\.f16\td[0-9]+, d[0-9]+, #0} 1 } }  */
141 /* { dg-final { scan-assembler-times {vceq\.f16\tq[0-9]+, q[0-9]+, #0} 1 } }  */
142 
VCMP1_TEST(vcgtz)143 VCMP1_TEST (vcgtz)
144 /* { dg-final { scan-assembler-times {vcgt\.f16\td[0-9]+, d[0-9]+, #0} 1 } }  */
145 /* { dg-final { scan-assembler-times {vceq\.f16\tq[0-9]+, q[0-9]+, #0} 1 } }  */
146 
147 VCMP1_TEST (vcgez)
148 /* { dg-final { scan-assembler-times {vcge\.f16\td[0-9]+, d[0-9]+, #0} 1 } }  */
149 /* { dg-final { scan-assembler-times {vcge\.f16\tq[0-9]+, q[0-9]+, #0} 1 } }  */
150 
151 VCMP1_TEST (vcltz)
152 /* { dg-final { scan-assembler-times {vclt.f16\td[0-9]+, d[0-9]+, #0} 1 } }  */
153 /* { dg-final { scan-assembler-times {vclt.f16\tq[0-9]+, q[0-9]+, #0} 1 } }  */
154 
155 VCMP1_TEST (vclez)
156 /* { dg-final { scan-assembler-times {vcle\.f16\td[0-9]+, d[0-9]+, #0} 1 } }  */
157 /* { dg-final { scan-assembler-times {vcle\.f16\tq[0-9]+, q[0-9]+, #0} 1 } }  */
158 
159 VCVT_TEST (vcvt, _f16_s16, float, int)
160 VCVT_N_TEST (vcvt, _f16_s16, float, int)
161 /* { dg-final { scan-assembler-times {vcvt\.f16\.s16\td[0-9]+, d[0-9]+} 2 } }
162    { dg-final { scan-assembler-times {vcvt\.f16\.s16\tq[0-9]+, q[0-9]+} 2 } }
163    { dg-final { scan-assembler-times {vcvt\.f16\.s16\td[0-9]+, d[0-9]+, #1} 1 } }
164    { dg-final { scan-assembler-times {vcvt\.f16\.s16\tq[0-9]+, q[0-9]+, #1} 1 } }  */
165 
166 VCVT_TEST (vcvt, _f16_u16, float, uint)
167 VCVT_N_TEST (vcvt, _f16_u16, float, uint)
168 /* { dg-final { scan-assembler-times {vcvt\.f16\.u16\td[0-9]+, d[0-9]+} 2 } }
169    { dg-final { scan-assembler-times {vcvt\.f16\.u16\tq[0-9]+, q[0-9]+} 2 } }
170    { dg-final { scan-assembler-times {vcvt\.f16\.u16\td[0-9]+, d[0-9]+, #1} 1 } }
171    { dg-final { scan-assembler-times {vcvt\.f16\.u16\tq[0-9]+, q[0-9]+, #1} 1 } }  */
172 
173 VCVT_TEST (vcvt, _s16_f16, int, float)
174 VCVT_N_TEST (vcvt, _s16_f16, int, float)
175 /* { dg-final { scan-assembler-times {vcvt\.s16\.f16\td[0-9]+, d[0-9]+} 2 } }
176    { dg-final { scan-assembler-times {vcvt\.s16\.f16\tq[0-9]+, q[0-9]+} 2 } }
177    { dg-final { scan-assembler-times {vcvt\.s16\.f16\td[0-9]+, d[0-9]+, #1} 1 } }
178    { dg-final { scan-assembler-times {vcvt\.s16\.f16\tq[0-9]+, q[0-9]+, #1} 1 } }  */
179 
180 VCVT_TEST (vcvt, _u16_f16, uint, float)
181 VCVT_N_TEST (vcvt, _u16_f16, uint, float)
182 /* { dg-final { scan-assembler-times {vcvt\.u16\.f16\td[0-9]+, d[0-9]+} 2 } }
183    { dg-final { scan-assembler-times {vcvt\.u16\.f16\tq[0-9]+, q[0-9]+} 2 } }
184    { dg-final { scan-assembler-times {vcvt\.u16\.f16\td[0-9]+, d[0-9]+, #1} 1 } }
185    { dg-final { scan-assembler-times {vcvt\.u16\.f16\tq[0-9]+, q[0-9]+, #1} 1 } }  */
186 
187 VCVT_TEST (vcvta, _s16_f16, int, float)
188 /* { dg-final { scan-assembler-times {vcvta\.s16\.f16\td[0-9]+, d[0-9]+} 1 } }
189    { dg-final { scan-assembler-times {vcvta\.s16\.f16\tq[0-9]+, q[0-9]+} 1 } }
190 */
191 
192 VCVT_TEST (vcvta, _u16_f16, uint, float)
193 /* { dg-final { scan-assembler-times {vcvta\.u16\.f16\td[0-9]+, d[0-9]+} 1 } }
194    { dg-final { scan-assembler-times {vcvta\.u16\.f16\tq[0-9]+, q[0-9]+} 1 } }
195 */
196 
197 VCVT_TEST (vcvtm, _s16_f16, int, float)
198 /* { dg-final { scan-assembler-times {vcvtm\.s16\.f16\td[0-9]+, d[0-9]+} 1 } }
199    { dg-final { scan-assembler-times {vcvtm\.s16\.f16\tq[0-9]+, q[0-9]+} 1 } }
200 */
201 
202 VCVT_TEST (vcvtm, _u16_f16, uint, float)
203 /* { dg-final { scan-assembler-times {vcvtm\.u16\.f16\td[0-9]+, d[0-9]+} 1 } }
204    { dg-final { scan-assembler-times {vcvtm\.u16\.f16\tq[0-9]+, q[0-9]+} 1 } }
205 */
206 
207 VCVT_TEST (vcvtn, _s16_f16, int, float)
208 /* { dg-final { scan-assembler-times {vcvtn\.s16\.f16\td[0-9]+, d[0-9]+} 1 } }
209    { dg-final { scan-assembler-times {vcvtn\.s16\.f16\tq[0-9]+, q[0-9]+} 1 } }
210 */
211 
212 VCVT_TEST (vcvtn, _u16_f16, uint, float)
213 /* { dg-final { scan-assembler-times {vcvtn\.u16\.f16\td[0-9]+, d[0-9]+} 1 } }
214    { dg-final { scan-assembler-times {vcvtn\.u16\.f16\tq[0-9]+, q[0-9]+} 1 } }
215 */
216 
217 VCVT_TEST (vcvtp, _s16_f16, int, float)
218 /* { dg-final { scan-assembler-times {vcvtp\.s16\.f16\td[0-9]+, d[0-9]+} 1 } }
219    { dg-final { scan-assembler-times {vcvtp\.s16\.f16\tq[0-9]+, q[0-9]+} 1 } }
220 */
221 
222 VCVT_TEST (vcvtp, _u16_f16, uint, float)
223 /* { dg-final { scan-assembler-times {vcvtp\.u16\.f16\td[0-9]+, d[0-9]+} 1 } }
224    { dg-final { scan-assembler-times {vcvtp\.u16\.f16\tq[0-9]+, q[0-9]+} 1 } }
225 */
226 
227 UNOP_TEST (vabs)
228 /* { dg-final { scan-assembler-times {vabs\.f16\td[0-9]+, d[0-9]+} 1 } }
229    { dg-final { scan-assembler-times {vabs\.f16\tq[0-9]+, q[0-9]+} 1 } }  */
230 
231 UNOP_TEST (vneg)
232 /* { dg-final { scan-assembler-times {vneg\.f16\td[0-9]+, d[0-9]+} 1 } }
233    { dg-final { scan-assembler-times {vneg\.f16\tq[0-9]+, q[0-9]+} 1 } }  */
234 
235 UNOP_TEST (vrecpe)
236 /* { dg-final { scan-assembler-times {vrecpe\.f16\td[0-9]+, d[0-9]+} 1 } }
237    { dg-final { scan-assembler-times {vrecpe\.f16\tq[0-9]+, q[0-9]+} 1 } }  */
238 
239 UNOP_TEST (vrnd)
240 /* { dg-final { scan-assembler-times {vrintz\.f16\td[0-9]+, d[0-9]+} 1 } }
241    { dg-final { scan-assembler-times {vrintz\.f16\tq[0-9]+, q[0-9]+} 1 } }  */
242 
243 UNOP_TEST (vrnda)
244 /* { dg-final { scan-assembler-times {vrinta\.f16\td[0-9]+, d[0-9]+} 1 } }
245    { dg-final { scan-assembler-times {vrinta\.f16\tq[0-9]+, q[0-9]+} 1 } }  */
246 
247 UNOP_TEST (vrndm)
248 /* { dg-final { scan-assembler-times {vrintm\.f16\td[0-9]+, d[0-9]+} 1 } }
249    { dg-final { scan-assembler-times {vrintm\.f16\tq[0-9]+, q[0-9]+} 1 } }  */
250 
251 UNOP_TEST (vrndn)
252 /* { dg-final { scan-assembler-times {vrintn\.f16\td[0-9]+, d[0-9]+} 1 } }
253    { dg-final { scan-assembler-times {vrintn\.f16\tq[0-9]+, q[0-9]+} 1 } }  */
254 
255 UNOP_TEST (vrndp)
256 /* { dg-final { scan-assembler-times {vrintp\.f16\td[0-9]+, d[0-9]+} 1 } }
257    { dg-final { scan-assembler-times {vrintp\.f16\tq[0-9]+, q[0-9]+} 1 } }  */
258 
259 UNOP_TEST (vrndx)
260 /* { dg-final { scan-assembler-times {vrintx\.f16\td[0-9]+, d[0-9]+} 1 } }
261    { dg-final { scan-assembler-times {vrintx\.f16\tq[0-9]+, q[0-9]+} 1 } }  */
262 
263 UNOP_TEST (vrsqrte)
264 /* { dg-final { scan-assembler-times {vrsqrte\.f16\td[0-9]+, d[0-9]+} 1 } }
265    { dg-final { scan-assembler-times {vrsqrte\.f16\tq[0-9]+, q[0-9]+} 1 } }  */
266 
267 BINOP_TEST (vadd)
268 /* { dg-final { scan-assembler-times {vadd\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
269    { dg-final { scan-assembler-times {vadd\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
270 
271 BINOP_TEST (vabd)
272 /* { dg-final { scan-assembler-times {vabd\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
273    { dg-final { scan-assembler-times {vabd\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
274 
275 VCMP2_TEST (vcage)
276 /* { dg-final { scan-assembler-times {vacge\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
277    { dg-final { scan-assembler-times {vacge\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
278 
279 VCMP2_TEST (vcagt)
280 /* { dg-final { scan-assembler-times {vacgt\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
281    { dg-final { scan-assembler-times {vacgt\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
282 
283 VCMP2_TEST (vcale)
284 /* { dg-final { scan-assembler-times {vacle\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
285    { dg-final { scan-assembler-times {vacle\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
286 
287 VCMP2_TEST (vcalt)
288 /* { dg-final { scan-assembler-times {vaclt\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
289    { dg-final { scan-assembler-times {vaclt\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
290 
291 VCMP2_TEST (vceq)
292 /* { dg-final { scan-assembler-times {vceq\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
293    { dg-final { scan-assembler-times {vceq\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
294 
295 VCMP2_TEST (vcge)
296 /* { dg-final { scan-assembler-times {vcge\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
297    { dg-final { scan-assembler-times {vcge\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
298 
299 VCMP2_TEST (vcgt)
300 /* { dg-final { scan-assembler-times {vcgt\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
301    { dg-final { scan-assembler-times {vcgt\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
302 
303 VCMP2_TEST (vcle)
304 /* { dg-final { scan-assembler-times {vcle\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
305    { dg-final { scan-assembler-times {vcle\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
306 
307 VCMP2_TEST (vclt)
308 /* { dg-final { scan-assembler-times {vclt\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
309    { dg-final { scan-assembler-times {vclt\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
310 
311 BINOP_TEST (vmax)
312 /* { dg-final { scan-assembler-times {vmax\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
313    { dg-final { scan-assembler-times {vmax\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
314 
315 BINOP_TEST (vmin)
316 /* { dg-final { scan-assembler-times {vmin\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
317    { dg-final { scan-assembler-times {vmin\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
318 
319 BINOP_TEST (vmaxnm)
320 /* { dg-final { scan-assembler-times {vmaxnm\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
321   { dg-final { scan-assembler-times {vmaxnm\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
322 
323 BINOP_TEST (vminnm)
324 /* { dg-final { scan-assembler-times {vminnm\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
325   { dg-final { scan-assembler-times {vminnm\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
326 
327 BINOP_TEST (vmul)
328 /* { dg-final { scan-assembler-times {vmul\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 3 } }
329    { dg-final { scan-assembler-times {vmul\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
330 BINOP_LANE_TEST (vmul, 2)
331 /* { dg-final { scan-assembler-times {vmul\.f16\td[0-9]+, d[0-9]+, d[0-9]+\[2\]} 1 } }
332    { dg-final { scan-assembler-times {vmul\.f16\tq[0-9]+, q[0-9]+, d[0-9]+\[2\]} 1 } }  */
333 BINOP_N_TEST (vmul)
334 /* { dg-final { scan-assembler-times {vmul\.f16\td[0-9]+, d[0-9]+, d[0-9]+\[0\]} 1 } }
335    { dg-final { scan-assembler-times {vmul\.f16\tq[0-9]+, q[0-9]+, d[0-9]+\[0\]} 1 } }*/
336 
337 float16x4_t
338 test_vpadd_16x4 (float16x4_t a, float16x4_t b)
339 {
340   return vpadd_f16 (a, b);
341 }
342 /* { dg-final { scan-assembler-times {vpadd\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } } */
343 
344 float16x4_t
test_vpmax_16x4(float16x4_t a,float16x4_t b)345 test_vpmax_16x4 (float16x4_t a, float16x4_t b)
346 {
347   return vpmax_f16 (a, b);
348 }
349 /* { dg-final { scan-assembler-times {vpmax\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } } */
350 
351 float16x4_t
test_vpmin_16x4(float16x4_t a,float16x4_t b)352 test_vpmin_16x4 (float16x4_t a, float16x4_t b)
353 {
354   return vpmin_f16 (a, b);
355 }
356 /* { dg-final { scan-assembler-times {vpmin\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } } */
357 
358 BINOP_TEST (vsub)
359 /* { dg-final { scan-assembler-times {vsub\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
360    { dg-final { scan-assembler-times {vsub\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
361 
BINOP_TEST(vrecps)362 BINOP_TEST (vrecps)
363 /* { dg-final { scan-assembler-times {vrecps\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
364   { dg-final { scan-assembler-times {vrecps\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
365 
366 BINOP_TEST (vrsqrts)
367 /* { dg-final { scan-assembler-times {vrsqrts\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
368   { dg-final { scan-assembler-times {vrsqrts\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
369 
370 TERNOP_TEST (vfma)
371 /* { dg-final { scan-assembler-times {vfma\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
372   { dg-final { scan-assembler-times {vfma\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
373 
374 TERNOP_TEST (vfms)
375 /* { dg-final { scan-assembler-times {vfms\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
376   { dg-final { scan-assembler-times {vfms\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
377 
378 float16x4_t
379 test_vmov_n_f16 (float16_t a)
380 {
381   return vmov_n_f16 (a);
382 }
383 
384 float16x4_t
test_vdup_n_f16(float16_t a)385 test_vdup_n_f16 (float16_t a)
386 {
387   return vdup_n_f16 (a);
388 }
389 /* { dg-final { scan-assembler-times {vdup\.16\td[0-9]+, r[0-9]+} 2 } }  */
390 
391 float16x8_t
test_vmovq_n_f16(float16_t a)392 test_vmovq_n_f16 (float16_t a)
393 {
394   return vmovq_n_f16 (a);
395 }
396 
397 float16x8_t
test_vdupq_n_f16(float16_t a)398 test_vdupq_n_f16 (float16_t a)
399 {
400   return vdupq_n_f16 (a);
401 }
402 /* { dg-final { scan-assembler-times {vdup\.16\tq[0-9]+, r[0-9]+} 2 } }  */
403 
404 float16x4_t
test_vdup_lane_f16(float16x4_t a)405 test_vdup_lane_f16 (float16x4_t a)
406 {
407   return vdup_lane_f16 (a, 1);
408 }
409 /* { dg-final { scan-assembler-times {vdup\.16\td[0-9]+, d[0-9]+\[1\]} 1 } }  */
410 
411 float16x8_t
test_vdupq_lane_f16(float16x4_t a)412 test_vdupq_lane_f16 (float16x4_t a)
413 {
414   return vdupq_lane_f16 (a, 1);
415 }
416 /* { dg-final { scan-assembler-times {vdup\.16\tq[0-9]+, d[0-9]+\[1\]} 1 } }  */
417 
418 float16x4_t
test_vext_f16(float16x4_t a,float16x4_t b)419 test_vext_f16 (float16x4_t a, float16x4_t b)
420 {
421   return vext_f16 (a, b, 1);
422 }
423 /* { dg-final { scan-assembler-times {vext\.16\td[0-9]+, d[0-9]+, d[0-9]+, #1} 1 } } */
424 
425 float16x8_t
test_vextq_f16(float16x8_t a,float16x8_t b)426 test_vextq_f16 (float16x8_t a, float16x8_t b)
427 {
428   return vextq_f16 (a, b, 1);
429 }
430 /*   { dg-final { scan-assembler-times {vext\.16\tq[0-9]+, q[0-9]+, q[0-9]+, #1} 1 } }  */
431 
UNOP_TEST(vrev64)432 UNOP_TEST (vrev64)
433 /* { dg-final { scan-assembler-times {vrev64\.16\td[0-9]+, d[0-9]+} 1 } }
434    { dg-final { scan-assembler-times {vrev64\.16\tq[0-9]+, q[0-9]+} 1 } }  */
435 
436 float16x4_t
437 test_vbsl16x4 (uint16x4_t a, float16x4_t b, float16x4_t c)
438 {
439   return vbsl_f16 (a, b, c);
440 }
441 /* { dg-final { scan-assembler-times {vbsl\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }  */
442 
443 float16x8_t
test_vbslq16x8(uint16x8_t a,float16x8_t b,float16x8_t c)444 test_vbslq16x8 (uint16x8_t a, float16x8_t b, float16x8_t c)
445 {
446   return vbslq_f16 (a, b, c);
447 }
448 /*{ dg-final { scan-assembler-times {vbsl\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } }  */
449 
450 float16x4x2_t
test_vzip16x4(float16x4_t a,float16x4_t b)451 test_vzip16x4 (float16x4_t a, float16x4_t b)
452 {
453   return vzip_f16 (a, b);
454 }
455 /* { dg-final { scan-assembler-times {vzip\.16\td[0-9]+, d[0-9]+} 1 } }  */
456 
457 float16x8x2_t
test_vzipq16x8(float16x8_t a,float16x8_t b)458 test_vzipq16x8 (float16x8_t a, float16x8_t b)
459 {
460   return vzipq_f16 (a, b);
461 }
462 /*{ dg-final { scan-assembler-times {vzip\.16\tq[0-9]+, q[0-9]+} 1 } }  */
463 
464 float16x4x2_t
test_vuzp16x4(float16x4_t a,float16x4_t b)465 test_vuzp16x4 (float16x4_t a, float16x4_t b)
466 {
467   return vuzp_f16 (a, b);
468 }
469 /* { dg-final { scan-assembler-times {vuzp\.16\td[0-9]+, d[0-9]+} 1 } }  */
470 
471 float16x8x2_t
test_vuzpq16x8(float16x8_t a,float16x8_t b)472 test_vuzpq16x8 (float16x8_t a, float16x8_t b)
473 {
474   return vuzpq_f16 (a, b);
475 }
476 /*{ dg-final { scan-assembler-times {vuzp\.16\tq[0-9]+, q[0-9]+} 1 } }  */
477 
478 float16x4x2_t
test_vtrn16x4(float16x4_t a,float16x4_t b)479 test_vtrn16x4 (float16x4_t a, float16x4_t b)
480 {
481   return vtrn_f16 (a, b);
482 }
483 /* { dg-final { scan-assembler-times {vtrn\.16\td[0-9]+, d[0-9]+} 1 } }  */
484 
485 float16x8x2_t
test_vtrnq16x8(float16x8_t a,float16x8_t b)486 test_vtrnq16x8 (float16x8_t a, float16x8_t b)
487 {
488   return vtrnq_f16 (a, b);
489 }
490 /*{ dg-final { scan-assembler-times {vtrn\.16\tq[0-9]+, q[0-9]+} 1 } }  */
491