1 /* Testcase to check generation of a SH2A specific instruction for
2    "BXOR.B #imm3, @(disp12, Rn)".  */
3 /* { dg-do compile { target { sh2a } } }  */
4 /* { dg-options "-O1 -mbitops" }  */
5 /* { dg-final { scan-assembler "bxor.b"} }  */
6 
7 volatile struct
8 {
9   union
10   {
11     unsigned char BYTE;
12     struct
13     {
14       unsigned char BIT7:1;
15       unsigned char BIT6:1;
16       unsigned char BIT5:1;
17       unsigned char BIT4:1;
18       unsigned char BIT3:1;
19       unsigned char BIT2:1;
20       unsigned char BIT1:1;
21       unsigned char BIT0:1;
22     }
23     BIT;
24   }
25   ICR0;
26 }
27 USRSTR;
28 
29 volatile union t_IOR
30 {
31   unsigned short WORD;
32   struct
33   {
34     unsigned char IOR15:1;
35     unsigned char IOR14:1;
36     unsigned char IOR13:1;
37     unsigned char IOR12:1;
38     unsigned char IOR11:1;
39     unsigned char IOR10:1;
40     unsigned char IOR9:1;
41     unsigned char IOR8:1;
42     unsigned char IOR7:1;
43     unsigned char IOR6:1;
44     unsigned char IOR5:1;
45     unsigned char IOR4:1;
46     unsigned char IOR3:1;
47     unsigned char IOR2:1;
48     unsigned char IOR1:1;
49     unsigned char IOR0:1;
50   }
51   BIT;
52 }
53 PORT;
54 
55 int
main()56 main ()
57 {
58   volatile unsigned char a;
59 
60   /* Instruction generated is BXOR.B #imm3, @(disp12, Rn)  */
61   USRSTR.ICR0.BIT.BIT3 = USRSTR.ICR0.BIT.BIT4 ^ USRSTR.ICR0.BIT.BIT1;
62   USRSTR.ICR0.BIT.BIT2 = USRSTR.ICR0.BIT.BIT6 ^ USRSTR.ICR0.BIT.BIT6;
63   USRSTR.ICR0.BIT.BIT4 = USRSTR.ICR0.BIT.BIT2 ^ USRSTR.ICR0.BIT.BIT4;
64   USRSTR.ICR0.BIT.BIT6 = USRSTR.ICR0.BIT.BIT1 ^ USRSTR.ICR0.BIT.BIT3;
65 
66   a = USRSTR.ICR0.BIT.BIT0 ^ USRSTR.ICR0.BIT.BIT1;
67   a = USRSTR.ICR0.BIT.BIT5 ^ USRSTR.ICR0.BIT.BIT7;
68   a = USRSTR.ICR0.BIT.BIT2 ^ USRSTR.ICR0.BIT.BIT6;
69 
70   PORT.BIT.IOR13 = PORT.BIT.IOR0  ^  USRSTR.ICR0.BIT.BIT7;
71   PORT.BIT.IOR15 = PORT.BIT.IOR6  ^  USRSTR.ICR0.BIT.BIT2;
72   PORT.BIT.IOR3  = PORT.BIT.IOR2  ^  USRSTR.ICR0.BIT.BIT5;
73   PORT.BIT.IOR1  = PORT.BIT.IOR13 ^  USRSTR.ICR0.BIT.BIT1;
74 
75   PORT.BIT.IOR1  = PORT.BIT.IOR2  ^  USRSTR.ICR0.BIT.BIT1;
76   PORT.BIT.IOR11 = PORT.BIT.IOR9  ^  USRSTR.ICR0.BIT.BIT2;
77   PORT.BIT.IOR8  = PORT.BIT.IOR14 ^  USRSTR.ICR0.BIT.BIT5;
78 
79   PORT.BIT.IOR10 ^= USRSTR.ICR0.BIT.BIT1;
80   PORT.BIT.IOR1  ^= USRSTR.ICR0.BIT.BIT2;
81   PORT.BIT.IOR5  ^= USRSTR.ICR0.BIT.BIT5;
82   PORT.BIT.IOR14 ^= USRSTR.ICR0.BIT.BIT4;
83 
84   /* Instruction generated on using size optimization option "-Os".  */
85   a = a ^ USRSTR.ICR0.BIT.BIT1;
86   a = a ^ USRSTR.ICR0.BIT.BIT4;
87   a = a ^ USRSTR.ICR0.BIT.BIT0;
88 
89   return 0;
90 }
91