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..07-Oct-2021-

READMEH A D07-Oct-20214.6 KiB133104

advsimd-intrinsics.expH A D07-Oct-20212.2 KiB7335

arm-neon-ref.hH A D07-Oct-202124.1 KiB687549

binary_op.incH A D07-Oct-20212.9 KiB8671

binary_op_float.incH A D07-Oct-20215.4 KiB171139

binary_op_no64.incH A D07-Oct-20216.7 KiB188158

binary_sat_op.incH A D07-Oct-20214.4 KiB10789

binary_scalar_op.incH A D07-Oct-20213.3 KiB161126

cmp_fp_op.incH A D07-Oct-20213.7 KiB11794

cmp_op.incH A D07-Oct-202111.3 KiB305264

cmp_zero_op.incH A D07-Oct-20213.7 KiB11290

compute-ref-data.hH A D07-Oct-20218 KiB230196

p64_p128.cH A D07-Oct-202138.9 KiB1,104779

ternary_scalar_op.incH A D07-Oct-20213.7 KiB207170

unary_op.incH A D07-Oct-20212.4 KiB7863

unary_sat_op.incH A D07-Oct-20212.9 KiB8166

unary_scalar_op.incH A D07-Oct-20214.4 KiB201161

vXXXhn.incH A D07-Oct-20212 KiB5646

vXXXl.incH A D07-Oct-20212.4 KiB7664

vXXXw.incH A D07-Oct-20212.5 KiB7664

vaba.cH A D07-Oct-20214.8 KiB136118

vabal.cH A D07-Oct-20214.9 KiB137108

vabd.cH A D07-Oct-20217.4 KiB207178

vabdh_f16_1.cH A D07-Oct-2021792 4530

vabdl.cH A D07-Oct-20212.7 KiB8568

vabs.cH A D07-Oct-20212.6 KiB7358

vabsh_f16_1.cH A D07-Oct-2021947 4129

vadd.cH A D07-Oct-20213.6 KiB10177

vaddh_f16_1.cH A D07-Oct-2021961 4129

vaddhn.cH A D07-Oct-2021684 2519

vaddl.cH A D07-Oct-2021730 2217

vaddw.cH A D07-Oct-2021716 2217

vand.cH A D07-Oct-20211.4 KiB3430

vbic.cH A D07-Oct-20211.5 KiB3531

vbsl.cH A D07-Oct-20215.6 KiB153134

vcage.cH A D07-Oct-2021862 2417

vcageh_f16_1.cH A D07-Oct-2021602 2311

vcagt.cH A D07-Oct-2021839 2417

vcagth_f16_1.cH A D07-Oct-2021593 2210

vcale.cH A D07-Oct-2021798 2215

vcaleh_f16_1.cH A D07-Oct-2021614 2311

vcalt.cH A D07-Oct-2021775 2215

vcalth_f16_1.cH A D07-Oct-2021608 2311

vceq.cH A D07-Oct-20213.7 KiB10277

vceqh_f16_1.cH A D07-Oct-2021573 2210

vceqz_1.cH A D07-Oct-20211.1 KiB2818

vceqzh_f16_1.cH A D07-Oct-2021580 2210

vcge.cH A D07-Oct-20212.9 KiB6955

vcgeh_f16_1.cH A D07-Oct-2021600 2311

vcgez_1.cH A D07-Oct-20211.2 KiB3121

vcgezh_f16_1.cH A D07-Oct-2021619 2311

vcgt.cH A D07-Oct-20212.8 KiB6854

vcgth_f16_1.cH A D07-Oct-2021600 2311

vcgtz_1.cH A D07-Oct-20211.1 KiB2919

vcgtzh_f16_1.cH A D07-Oct-2021613 2311

vcle.cH A D07-Oct-20212.9 KiB7358

vcleh_f16_1.cH A D07-Oct-2021606 2311

vclez_1.cH A D07-Oct-20211.1 KiB3019

vclezh_f16_1.cH A D07-Oct-2021592 2210

vcls.cH A D07-Oct-20214.4 KiB11893

vclt.cH A D07-Oct-20212.8 KiB7156

vclth_f16_1.cH A D07-Oct-2021606 2311

vcltz_1.cH A D07-Oct-20211.1 KiB2817

vcltzh_f16_1.cH A D07-Oct-2021586 2210

vclz.cH A D07-Oct-20217.3 KiB182156

vcnt.cH A D07-Oct-20212.7 KiB7961

vcombine.cH A D07-Oct-20214.2 KiB10994

vcreate.cH A D07-Oct-20214.5 KiB122106

vcvt.cH A D07-Oct-202114 KiB361279

vcvtX.incH A D07-Oct-20213.7 KiB11493

vcvt_f16.cH A D07-Oct-20212.9 KiB10176

vcvt_high_1.cH A D07-Oct-20212.5 KiB9975

vcvta_1.cH A D07-Oct-20211.2 KiB3423

vcvtah_s16_f16_1.cH A D07-Oct-2021638 2411

vcvtah_s32_f16_1.cH A D07-Oct-2021968 5439

vcvtah_s64_f16_1.cH A D07-Oct-2021638 2411

vcvtah_u16_f16_1.cH A D07-Oct-2021634 2411

vcvtah_u32_f16_1.cH A D07-Oct-2021969 5439

vcvtah_u64_f16_1.cH A D07-Oct-2021634 2411

vcvth_f16_s16_1.cH A D07-Oct-2021740 2614

vcvth_f16_s32_1.cH A D07-Oct-20211.1 KiB5339

vcvth_f16_s64_1.cH A D07-Oct-2021740 2614

vcvth_f16_u16_1.cH A D07-Oct-2021746 2614

vcvth_f16_u32_1.cH A D07-Oct-20211 KiB5339

vcvth_f16_u64_1.cH A D07-Oct-2021746 2614

vcvth_n_f16_s16_1.cH A D07-Oct-20211.1 KiB4730

vcvth_n_f16_s32_1.cH A D07-Oct-20212.1 KiB10083

vcvth_n_f16_s64_1.cH A D07-Oct-20211.1 KiB4730

vcvth_n_f16_u16_1.cH A D07-Oct-20211.1 KiB4730

vcvth_n_f16_u32_1.cH A D07-Oct-20211.9 KiB10083

vcvth_n_f16_u64_1.cH A D07-Oct-20211.1 KiB4730

vcvth_n_s16_f16_1.cH A D07-Oct-2021794 3016

vcvth_n_s32_f16_1.cH A D07-Oct-20211.6 KiB10183

vcvth_n_s64_f16_1.cH A D07-Oct-2021794 3016

vcvth_n_u16_f16_1.cH A D07-Oct-2021784 3016

vcvth_n_u32_f16_1.cH A D07-Oct-20211.6 KiB10183

vcvth_n_u64_f16_1.cH A D07-Oct-2021788 3016

vcvth_s16_f16_1.cH A D07-Oct-2021636 2411

vcvth_s32_f16_1.cH A D07-Oct-2021967 5439

vcvth_s64_f16_1.cH A D07-Oct-2021636 2411

vcvth_u16_f16_1.cH A D07-Oct-2021632 2411

vcvth_u32_f16_1.cH A D07-Oct-2021968 5439

vcvth_u64_f16_1.cH A D07-Oct-2021632 2411

vcvtm_1.cH A D07-Oct-20211.2 KiB3423

vcvtmh_s16_f16_1.cH A D07-Oct-2021638 2411

vcvtmh_s32_f16_1.cH A D07-Oct-2021968 5439

vcvtmh_s64_f16_1.cH A D07-Oct-2021638 2411

vcvtmh_u16_f16_1.cH A D07-Oct-2021634 2411

vcvtmh_u32_f16_1.cH A D07-Oct-2021970 5439

vcvtmh_u64_f16_1.cH A D07-Oct-2021634 2411

vcvtnh_s16_f16_1.cH A D07-Oct-2021638 2411

vcvtnh_s32_f16_1.cH A D07-Oct-2021968 5439

vcvtnh_s64_f16_1.cH A D07-Oct-2021638 2411

vcvtnh_u16_f16_1.cH A D07-Oct-2021634 2411

vcvtnh_u32_f16_1.cH A D07-Oct-2021970 5439

vcvtnh_u64_f16_1.cH A D07-Oct-2021634 2411

vcvtp_1.cH A D07-Oct-20211.3 KiB3423

vcvtph_s16_f16_1.cH A D07-Oct-2021638 2411

vcvtph_s32_f16_1.cH A D07-Oct-2021968 5439

vcvtph_s64_f16_1.cH A D07-Oct-2021638 2411

vcvtph_u16_f16_1.cH A D07-Oct-2021634 2411

vcvtph_u32_f16_1.cH A D07-Oct-2021970 5439

vcvtph_u64_f16_1.cH A D07-Oct-2021634 2411

vdiv_f16_1.cH A D07-Oct-20212.5 KiB8767

vdivh_f16_1.cH A D07-Oct-2021988 4330

vdot-compile-2.cH A D07-Oct-20211.8 KiB7449

vdot-compile.cH A D07-Oct-20211.8 KiB7449

vdot-exec.cH A D07-Oct-20213.1 KiB8264

vdup-vmov.cH A D07-Oct-202111.3 KiB329301

vdup_lane.cH A D07-Oct-20219 KiB241210

vduph_lane.cH A D07-Oct-20213.8 KiB138112

vect-dot-qi.hH A D07-Oct-2021330 1513

vect-dot-s8.cH A D07-Oct-2021270 103

vect-dot-u8.cH A D07-Oct-2021272 103

vector-complex.cH A D07-Oct-202110.2 KiB270183

vector-complex_f16.cH A D07-Oct-202113.4 KiB334221

veor.cH A D07-Oct-20211.5 KiB3632

vext.cH A D07-Oct-20215.3 KiB154138

vfma.cH A D07-Oct-20213.9 KiB133111

vfma_n.cH A D07-Oct-20212.3 KiB7555

vfmah_f16_1.cH A D07-Oct-2021943 4129

vfmas_lane_f16_1.cH A D07-Oct-202131.6 KiB909740

vfmas_n_f16_1.cH A D07-Oct-202115.7 KiB470381

vfmash_lane_f16_1.cH A D07-Oct-20213.6 KiB144113

vfms.cH A D07-Oct-20213.9 KiB132111

vfms_vfma_n.cH A D07-Oct-202120.8 KiB491452

vfmsh_f16_1.cH A D07-Oct-2021964 4129

vget_high.cH A D07-Oct-20212.9 KiB7664

vget_lane.cH A D07-Oct-20214.6 KiB147126

vget_low.cH A D07-Oct-20213 KiB7967

vhadd.cH A D07-Oct-20211.4 KiB3530

vhsub.cH A D07-Oct-20211.2 KiB3328

vld1.cH A D07-Oct-20213.2 KiB8371

vld1_dup.cH A D07-Oct-20218.2 KiB194176

vld1_lane.cH A D07-Oct-20215.2 KiB139125

vld1x2.cH A D07-Oct-20211.9 KiB8064

vld1x3.cH A D07-Oct-20212 KiB8366

vld1x4.cH A D07-Oct-20212.1 KiB8469

vld2_lane_f16_indices_1.cH A D07-Oct-2021500 179

vld2_lane_f32_indices_1.cH A D07-Oct-2021421 169

vld2_lane_f64_indices_1.cH A D07-Oct-2021458 179

vld2_lane_p8_indices_1.cH A D07-Oct-2021410 169

vld2_lane_s16_indices_1.cH A D07-Oct-2021413 169

vld2_lane_s32_indices_1.cH A D07-Oct-2021413 169

vld2_lane_s64_indices_1.cH A D07-Oct-2021450 179

vld2_lane_s8_indices_1.cH A D07-Oct-2021406 169

vld2_lane_u16_indices_1.cH A D07-Oct-2021417 169

vld2_lane_u32_indices_1.cH A D07-Oct-2021417 169

vld2_lane_u64_indices_1.cH A D07-Oct-2021454 179

vld2_lane_u8_indices_1.cH A D07-Oct-2021410 169

vld2q_lane_f16_indices_1.cH A D07-Oct-2021503 179

vld2q_lane_f32_indices_1.cH A D07-Oct-2021424 169

vld2q_lane_f64_indices_1.cH A D07-Oct-2021461 179

vld2q_lane_p8_indices_1.cH A D07-Oct-2021457 179

vld2q_lane_s16_indices_1.cH A D07-Oct-2021416 169

vld2q_lane_s32_indices_1.cH A D07-Oct-2021416 169

vld2q_lane_s64_indices_1.cH A D07-Oct-2021453 179

vld2q_lane_s8_indices_1.cH A D07-Oct-2021453 179

vld2q_lane_u16_indices_1.cH A D07-Oct-2021420 169

vld2q_lane_u32_indices_1.cH A D07-Oct-2021420 169

vld2q_lane_u64_indices_1.cH A D07-Oct-2021457 179

vld2q_lane_u8_indices_1.cH A D07-Oct-2021457 179

vld3_lane_f16_indices_1.cH A D07-Oct-2021500 179

vld3_lane_f32_indices_1.cH A D07-Oct-2021421 169

vld3_lane_f64_indices_1.cH A D07-Oct-2021458 179

vld3_lane_p8_indices_1.cH A D07-Oct-2021410 169

vld3_lane_s16_indices_1.cH A D07-Oct-2021413 169

vld3_lane_s32_indices_1.cH A D07-Oct-2021413 169

vld3_lane_s64_indices_1.cH A D07-Oct-2021450 179

vld3_lane_s8_indices_1.cH A D07-Oct-2021406 169

vld3_lane_u16_indices_1.cH A D07-Oct-2021417 169

vld3_lane_u32_indices_1.cH A D07-Oct-2021417 169

vld3_lane_u64_indices_1.cH A D07-Oct-2021454 179

vld3_lane_u8_indices_1.cH A D07-Oct-2021410 169

vld3q_lane_f16_indices_1.cH A D07-Oct-2021503 179

vld3q_lane_f32_indices_1.cH A D07-Oct-2021424 169

vld3q_lane_f64_indices_1.cH A D07-Oct-2021461 179

vld3q_lane_p8_indices_1.cH A D07-Oct-2021457 179

vld3q_lane_s16_indices_1.cH A D07-Oct-2021416 169

vld3q_lane_s32_indices_1.cH A D07-Oct-2021416 169

vld3q_lane_s64_indices_1.cH A D07-Oct-2021453 179

vld3q_lane_s8_indices_1.cH A D07-Oct-2021453 179

vld3q_lane_u16_indices_1.cH A D07-Oct-2021420 169

vld3q_lane_u32_indices_1.cH A D07-Oct-2021420 169

vld3q_lane_u64_indices_1.cH A D07-Oct-2021457 179

vld3q_lane_u8_indices_1.cH A D07-Oct-2021457 179

vld4_lane_f16_indices_1.cH A D07-Oct-2021500 179

vld4_lane_f32_indices_1.cH A D07-Oct-2021421 169

vld4_lane_f64_indices_1.cH A D07-Oct-2021458 179

vld4_lane_p8_indices_1.cH A D07-Oct-2021410 169

vld4_lane_s16_indices_1.cH A D07-Oct-2021413 169

vld4_lane_s32_indices_1.cH A D07-Oct-2021413 169

vld4_lane_s64_indices_1.cH A D07-Oct-2021450 179

vld4_lane_s8_indices_1.cH A D07-Oct-2021406 169

vld4_lane_u16_indices_1.cH A D07-Oct-2021417 169

vld4_lane_u32_indices_1.cH A D07-Oct-2021417 169

vld4_lane_u64_indices_1.cH A D07-Oct-2021454 179

vld4_lane_u8_indices_1.cH A D07-Oct-2021410 169

vld4q_lane_f16_indices_1.cH A D07-Oct-2021503 179

vld4q_lane_f32_indices_1.cH A D07-Oct-2021424 169

vld4q_lane_f64_indices_1.cH A D07-Oct-2021461 179

vld4q_lane_p8_indices_1.cH A D07-Oct-2021457 179

vld4q_lane_s16_indices_1.cH A D07-Oct-2021416 169

vld4q_lane_s32_indices_1.cH A D07-Oct-2021416 169

vld4q_lane_s64_indices_1.cH A D07-Oct-2021453 179

vld4q_lane_s8_indices_1.cH A D07-Oct-2021453 179

vld4q_lane_u16_indices_1.cH A D07-Oct-2021420 169

vld4q_lane_u32_indices_1.cH A D07-Oct-2021420 169

vld4q_lane_u64_indices_1.cH A D07-Oct-2021457 179

vld4q_lane_u8_indices_1.cH A D07-Oct-2021457 179

vldX.cH A D07-Oct-202134.4 KiB771705

vldX_dup.cH A D07-Oct-202121.7 KiB504438

vldX_lane.cH A D07-Oct-202126.1 KiB548475

vmax.cH A D07-Oct-20213.4 KiB8576

vmaxh_f16_1.cH A D07-Oct-2021764 3521

vmaxnm_1.cH A D07-Oct-20211.6 KiB4836

vmaxnmh_f16_1.cH A D07-Oct-2021988 4330

vmaxnmv_f16_1.cH A D07-Oct-20213.9 KiB13295

vmaxv_f16_1.cH A D07-Oct-20213.8 KiB13295

vmin.cH A D07-Oct-20213.5 KiB9082

vminh_f16_1.cH A D07-Oct-2021764 3521

vminnm_1.cH A D07-Oct-20211.7 KiB5240

vminnmh_f16_1.cH A D07-Oct-2021993 4330

vminnmv_f16_1.cH A D07-Oct-20213.9 KiB13295

vminv_f16_1.cH A D07-Oct-20213.8 KiB13295

vmlX.incH A D07-Oct-20214.3 KiB124111

vmlX_lane.incH A D07-Oct-20213.5 KiB10188

vmlX_n.incH A D07-Oct-20213 KiB8877

vmlXl.incH A D07-Oct-20213 KiB9075

vmlXl_lane.incH A D07-Oct-20212.4 KiB7158

vmlXl_n.incH A D07-Oct-20211.9 KiB6249

vmla.cH A D07-Oct-20211.5 KiB3631

vmla_lane.cH A D07-Oct-2021992 2419

vmla_n.cH A D07-Oct-2021980 2419

vmlal.cH A D07-Oct-2021666 1914

vmlal_lane.cH A D07-Oct-2021457 1510

vmlal_n.cH A D07-Oct-2021442 1510

vmls.cH A D07-Oct-20211.5 KiB3833

vmls_lane.cH A D07-Oct-20211 KiB2621

vmls_n.cH A D07-Oct-20211 KiB2621

vmlsl.cH A D07-Oct-2021768 2318

vmlsl_lane.cH A D07-Oct-2021559 1914

vmlsl_n.cH A D07-Oct-2021550 1914

vmovl.cH A D07-Oct-20211.7 KiB5342

vmovn.cH A D07-Oct-20211.6 KiB5140

vmul.cH A D07-Oct-20217 KiB196173

vmul_lane.cH A D07-Oct-20215.1 KiB142125

vmul_lane_f16_1.cH A D07-Oct-202114.1 KiB455365

vmul_n.cH A D07-Oct-20214.5 KiB129111

vmulh_f16_1.cH A D07-Oct-2021993 4330

vmulh_lane_f16_1.cH A D07-Oct-20212.1 KiB9169

vmull.cH A D07-Oct-20212.6 KiB7665

vmull_lane.cH A D07-Oct-20212.1 KiB6751

vmull_n.cH A D07-Oct-20211.9 KiB6246

vmulx_f16_1.cH A D07-Oct-20212.5 KiB8567

vmulx_lane_f16_1.cH A D07-Oct-202114.3 KiB453365

vmulx_lane_f32_indices_1.cH A D07-Oct-2021461 179

vmulx_lane_f64_indices_1.cH A D07-Oct-2021461 179

vmulx_laneq_f32_indices_1.cH A D07-Oct-2021460 179

vmulx_laneq_f64_indices_1.cH A D07-Oct-2021460 179

vmulx_n_f16_1.cH A D07-Oct-20215.1 KiB178141

vmulxd_lane_f64_indices_1.cH A D07-Oct-2021454 179

vmulxd_laneq_f64_indices_1.cH A D07-Oct-2021457 179

vmulxh_f16_1.cH A D07-Oct-20211.1 KiB5136

vmulxh_lane_f16_1.cH A D07-Oct-20212.2 KiB9271

vmulxq_lane_f32_indices_1.cH A D07-Oct-2021464 179

vmulxq_lane_f64_indices_1.cH A D07-Oct-2021460 179

vmulxq_laneq_f32_indices_1.cH A D07-Oct-2021463 179

vmulxq_laneq_f64_indices_1.cH A D07-Oct-2021463 179

vmulxs_lane_f32_indices_1.cH A D07-Oct-2021454 179

vmulxs_laneq_f32_indices_1.cH A D07-Oct-2021457 179

vmvn.cH A D07-Oct-20215 KiB138120

vneg.cH A D07-Oct-20212.6 KiB7458

vnegh_f16_1.cH A D07-Oct-2021899 4029

vorn.cH A D07-Oct-20211.6 KiB3733

vorr.cH A D07-Oct-20211.6 KiB3733

vpXXX.incH A D07-Oct-20212.7 KiB8373

vpadal.cH A D07-Oct-20215.4 KiB142122

vpadd.cH A D07-Oct-2021860 2318

vpaddl.cH A D07-Oct-20214.4 KiB11799

vpmax.cH A D07-Oct-2021861 2418

vpmin.cH A D07-Oct-2021861 2418

vpminmaxnm_f16_1.cH A D07-Oct-20213.6 KiB11587

vqabs.cH A D07-Oct-20214 KiB9977

vqadd.cH A D07-Oct-202112 KiB267216

vqdmlXl.incH A D07-Oct-20212.2 KiB6451

vqdmlXl_lane.incH A D07-Oct-20212.7 KiB7459

vqdmlXl_n.incH A D07-Oct-20212 KiB6046

vqdmlal.cH A D07-Oct-2021895 2816

vqdmlal_lane.cH A D07-Oct-20211.3 KiB3922

vqdmlal_n.cH A D07-Oct-2021901 2816

vqdmlsl.cH A D07-Oct-2021945 3018

vqdmlsl_lane.cH A D07-Oct-20211.4 KiB4124

vqdmlsl_n.cH A D07-Oct-2021951 3018

vqdmulh.cH A D07-Oct-20214.6 KiB12393

vqdmulh_lane.cH A D07-Oct-20214.8 KiB12288

vqdmulh_n.cH A D07-Oct-20214.3 KiB11181

vqdmull.cH A D07-Oct-20213 KiB8761

vqdmull_lane.cH A D07-Oct-20213.2 KiB9563

vqdmull_n.cH A D07-Oct-20213 KiB9361

vqmovn.cH A D07-Oct-20215.5 KiB135104

vqmovun.cH A D07-Oct-20213.4 KiB9466

vqneg.cH A D07-Oct-20214 KiB9977

vqrdmlXh.incH A D07-Oct-20215.4 KiB139118

vqrdmlXh_lane.incH A D07-Oct-20215.7 KiB155128

vqrdmlah.cH A D07-Oct-20212.4 KiB5838

vqrdmlah_lane.cH A D07-Oct-20212.4 KiB5838

vqrdmlsh.cH A D07-Oct-20212.5 KiB6242

vqrdmlsh_lane.cH A D07-Oct-20212.5 KiB6242

vqrdmulh.cH A D07-Oct-20216.6 KiB162119

vqrdmulh_lane.cH A D07-Oct-20216.8 KiB170121

vqrdmulh_n.cH A D07-Oct-20216.2 KiB156114

vqrshl.cH A D07-Oct-202156 KiB1,091962

vqrshrn_n.cH A D07-Oct-20217.5 KiB175135

vqrshrun_n.cH A D07-Oct-20217.6 KiB190123

vqshl.cH A D07-Oct-202140.4 KiB830712

vqshl_n.cH A D07-Oct-202111 KiB235205

vqshlu_n.cH A D07-Oct-202112 KiB264212

vqshrn_n.cH A D07-Oct-20217.7 KiB178138

vqshrun_n.cH A D07-Oct-20215 KiB13489

vqsub.cH A D07-Oct-202112 KiB267215

vqtbX.cH A D07-Oct-202118.4 KiB520403

vraddhn.cH A D07-Oct-2021686 2519

vrecpe.cH A D07-Oct-202110.1 KiB280229

vrecpeh_f16_1.cH A D07-Oct-20211 KiB4328

vrecps.cH A D07-Oct-20217.2 KiB216171

vrecpsh_f16_1.cH A D07-Oct-20211.1 KiB5136

vrecpxh_f16_1.cH A D07-Oct-2021901 3312

vreinterpret.cH A D07-Oct-202152.3 KiB1,045928

vreinterpret_p128.cH A D07-Oct-20218.8 KiB185149

vreinterpret_p64.cH A D07-Oct-202111.7 KiB217188

vrev.cH A D07-Oct-20219.2 KiB221199

vrhadd.cH A D07-Oct-20211.4 KiB3530

vrnd.cH A D07-Oct-2021742 2517

vrndX.incH A D07-Oct-20211.8 KiB6453

vrnda.cH A D07-Oct-2021769 2617

vrndah_f16_1.cH A D07-Oct-2021954 4129

vrndh_f16_1.cH A D07-Oct-2021952 4129

vrndi_f16_1.cH A D07-Oct-20212 KiB7255

vrndih_f16_1.cH A D07-Oct-2021954 4129

vrndm.cH A D07-Oct-2021769 2617

vrndmh_f16_1.cH A D07-Oct-2021954 4129

vrndn.cH A D07-Oct-2021769 2617

vrndnh_f16_1.cH A D07-Oct-2021954 4129

vrndp.cH A D07-Oct-2021744 2517

vrndph_f16_1.cH A D07-Oct-2021954 4129

vrndx.cH A D07-Oct-2021744 2517

vrndxh_f16_1.cH A D07-Oct-2021954 4129

vrshl.cH A D07-Oct-202129.7 KiB628551

vrshr_n.cH A D07-Oct-202122.4 KiB505454

vrshrn_n.cH A D07-Oct-20215.3 KiB144113

vrsqrte.cH A D07-Oct-20218.4 KiB249192

vrsqrteh_f16_1.cH A D07-Oct-20211,022 3118

vrsqrts.cH A D07-Oct-20217.2 KiB216171

vrsqrtsh_f16_1.cH A D07-Oct-20211.2 KiB5136

vrsra_n.cH A D07-Oct-202124.7 KiB554495

vrsubhn.cH A D07-Oct-2021686 2519

vsXi_n.incH A D07-Oct-20213.6 KiB10089

vset_lane.cH A D07-Oct-20214.4 KiB11399

vshl.cH A D07-Oct-202110.2 KiB230193

vshl_n.cH A D07-Oct-20213.6 KiB9783

vshll_n.cH A D07-Oct-20211.8 KiB5744

vshr_n.cH A D07-Oct-20213.6 KiB9682

vshrn_n.cH A D07-Oct-20212.3 KiB7157

vshuffle.incH A D07-Oct-20217.3 KiB203181

vsli_n.cH A D07-Oct-20217.9 KiB177156

vsqrt_f16_1.cH A D07-Oct-20212.2 KiB7355

vsqrth_f16_1.cH A D07-Oct-2021932 4129

vsra_n.cH A D07-Oct-20214.3 KiB118101

vsri_n.cH A D07-Oct-20217.8 KiB177156

vst1_lane.cH A D07-Oct-20213.9 KiB10392

vst1x2.cH A D07-Oct-20211.9 KiB8165

vst1x3.cH A D07-Oct-20212 KiB8266

vst1x4.cH A D07-Oct-20212.1 KiB8469

vst2_lane_f16_indices_1.cH A D07-Oct-2021454 168

vst2_lane_f32_indices_1.cH A D07-Oct-2021375 158

vst2_lane_f64_indices_1.cH A D07-Oct-2021412 168

vst2_lane_p8_indices_1.cH A D07-Oct-2021368 158

vst2_lane_s16_indices_1.cH A D07-Oct-2021371 158

vst2_lane_s32_indices_1.cH A D07-Oct-2021371 158

vst2_lane_s64_indices_1.cH A D07-Oct-2021408 168

vst2_lane_s8_indices_1.cH A D07-Oct-2021366 158

vst2_lane_u16_indices_1.cH A D07-Oct-2021373 158

vst2_lane_u32_indices_1.cH A D07-Oct-2021373 158

vst2_lane_u64_indices_1.cH A D07-Oct-2021410 168

vst2_lane_u8_indices_1.cH A D07-Oct-2021368 158

vst2q_lane_f16_indices_1.cH A D07-Oct-2021457 168

vst2q_lane_f32_indices_1.cH A D07-Oct-2021378 158

vst2q_lane_f64_indices_1.cH A D07-Oct-2021415 168

vst2q_lane_p8_indices_1.cH A D07-Oct-2021413 168

vst2q_lane_s16_indices_1.cH A D07-Oct-2021374 158

vst2q_lane_s32_indices_1.cH A D07-Oct-2021374 158

vst2q_lane_s64_indices_1.cH A D07-Oct-2021411 168

vst2q_lane_s8_indices_1.cH A D07-Oct-2021411 168

vst2q_lane_u16_indices_1.cH A D07-Oct-2021376 158

vst2q_lane_u32_indices_1.cH A D07-Oct-2021376 158

vst2q_lane_u64_indices_1.cH A D07-Oct-2021413 168

vst2q_lane_u8_indices_1.cH A D07-Oct-2021413 168

vst3_lane_f16_indices_1.cH A D07-Oct-2021454 168

vst3_lane_f32_indices_1.cH A D07-Oct-2021375 158

vst3_lane_f64_indices_1.cH A D07-Oct-2021412 168

vst3_lane_p8_indices_1.cH A D07-Oct-2021368 158

vst3_lane_s16_indices_1.cH A D07-Oct-2021371 158

vst3_lane_s32_indices_1.cH A D07-Oct-2021371 158

vst3_lane_s64_indices_1.cH A D07-Oct-2021408 168

vst3_lane_s8_indices_1.cH A D07-Oct-2021366 158

vst3_lane_u16_indices_1.cH A D07-Oct-2021373 158

vst3_lane_u32_indices_1.cH A D07-Oct-2021373 158

vst3_lane_u64_indices_1.cH A D07-Oct-2021410 168

vst3_lane_u8_indices_1.cH A D07-Oct-2021368 158

vst3q_lane_f16_indices_1.cH A D07-Oct-2021457 168

vst3q_lane_f32_indices_1.cH A D07-Oct-2021378 158

vst3q_lane_f64_indices_1.cH A D07-Oct-2021415 168

vst3q_lane_p8_indices_1.cH A D07-Oct-2021413 168

vst3q_lane_s16_indices_1.cH A D07-Oct-2021374 158

vst3q_lane_s32_indices_1.cH A D07-Oct-2021374 158

vst3q_lane_s64_indices_1.cH A D07-Oct-2021411 168

vst3q_lane_s8_indices_1.cH A D07-Oct-2021411 168

vst3q_lane_u16_indices_1.cH A D07-Oct-2021376 158

vst3q_lane_u32_indices_1.cH A D07-Oct-2021376 158

vst3q_lane_u64_indices_1.cH A D07-Oct-2021413 168

vst3q_lane_u8_indices_1.cH A D07-Oct-2021413 168

vst4_lane_f16_indices_1.cH A D07-Oct-2021454 168

vst4_lane_f32_indices_1.cH A D07-Oct-2021375 158

vst4_lane_f64_indices_1.cH A D07-Oct-2021412 168

vst4_lane_p8_indices_1.cH A D07-Oct-2021368 158

vst4_lane_s16_indices_1.cH A D07-Oct-2021371 158

vst4_lane_s32_indices_1.cH A D07-Oct-2021371 158

vst4_lane_s64_indices_1.cH A D07-Oct-2021408 168

vst4_lane_s8_indices_1.cH A D07-Oct-2021366 158

vst4_lane_u16_indices_1.cH A D07-Oct-2021373 158

vst4_lane_u32_indices_1.cH A D07-Oct-2021373 158

vst4_lane_u64_indices_1.cH A D07-Oct-2021410 168

vst4_lane_u8_indices_1.cH A D07-Oct-2021368 158

vst4q_lane_f16_indices_1.cH A D07-Oct-2021457 168

vst4q_lane_f32_indices_1.cH A D07-Oct-2021378 158

vst4q_lane_f64_indices_1.cH A D07-Oct-2021415 168

vst4q_lane_p8_indices_1.cH A D07-Oct-2021413 168

vst4q_lane_s16_indices_1.cH A D07-Oct-2021374 158

vst4q_lane_s32_indices_1.cH A D07-Oct-2021374 158

vst4q_lane_s64_indices_1.cH A D07-Oct-2021411 168

vst4q_lane_s8_indices_1.cH A D07-Oct-2021411 168

vst4q_lane_u16_indices_1.cH A D07-Oct-2021376 158

vst4q_lane_u32_indices_1.cH A D07-Oct-2021376 158

vst4q_lane_u64_indices_1.cH A D07-Oct-2021413 168

vst4q_lane_u8_indices_1.cH A D07-Oct-2021413 168

vstX_lane.cH A D07-Oct-202132.4 KiB684606

vsub.cH A D07-Oct-20213.6 KiB10278

vsubh_f16_1.cH A D07-Oct-2021990 4330

vsubhn.cH A D07-Oct-2021684 2519

vsubl.cH A D07-Oct-2021621 1914

vsubw.cH A D07-Oct-2021699 2116

vtbX.cH A D07-Oct-20219.5 KiB290209

vtrn.cH A D07-Oct-20214.2 KiB10294

vtrn_half.cH A D07-Oct-20219 KiB261233

vtst.cH A D07-Oct-20215.5 KiB148115

vuzp.cH A D07-Oct-20214.3 KiB114106

vuzp_half.cH A D07-Oct-20218.9 KiB257228

vzip.cH A D07-Oct-20214.3 KiB112104

vzip_half.cH A D07-Oct-20219 KiB261233

README

1This directory contains executable tests for ARM/AArch64 Advanced SIMD
2(Neon) intrinsics.
3
4It is meant to cover execution cases of all the Advanced SIMD
5intrinsics, but does not scan the generated assembler code.
6
7The general framework is composed as follows:
8- advsimd-intrinsics.exp: main dejagnu driver
9- *.c: actual tests, generally one per intrinsinc family
10- arm-neon-ref.h: contains macro definitions to save typing in actual
11  test files
12- compute-ref-data.h: contains input vectors definitions
13- *.inc: generic tests, shared by several families of intrinsics. For
14   instance, unary or binary operators
15
16A typical .c test file starts with the following contents (look at
17vld1.c and vaba.c for sample cases):
18#include <arm_neon.h>
19#include "arm-neon-ref.h"
20#include "compute-ref-data.h"
21
22Then, definitions of expected results, based on common input values,
23as defined in compute-ref-data.h.
24For example:
25VECT_VAR_DECL(expected,int,16,4) [] = { 0x16, 0x17, 0x18, 0x19 };
26defines the expected results of an operator generating int16x4 values.
27
28The common input values defined in compute-ref-data.h have been chosen
29to avoid corner-case values for most operators, yet exposing negative
30values for signed operators. For this reason, their range is also
31limited. For instance, the initialization of buffer_int16x4 will be
32{ -16, -15, -14, -13 }.
33
34The initialization of floating-point values is done via hex notation,
35to avoid potential rounding problems.
36
37To test special values and corner cases, specific initialization
38values should be used in dedicated tests, to ensure proper coverage.
39An example of this is vshl.
40
41When a variant of an intrinsic is not available, its expected result
42should be defined to the value of CLEAN_PATTERN_8 as defined in
43arm-neon-ref.h. For example:
44VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
45if the given intrinsic has no variant producing an int64x1 result,
46like the vcmp family (eg. vclt).
47
48This is because the helper function (check_results(), defined in
49arm-neon-ref.h), iterates over all the possible variants, to save
50typing in each individual test file. Alternatively, one can directly
51call the CHECK/CHECK_FP macros to check only a few expected results
52(see vabs.c for an example).
53
54Then, define the TEST_MSG string, which will be used when reporting errors.
55
56Next, define the function performing the actual tests, in general
57relying on the helpers provided by arm-neon-ref.h, which means:
58
59* declare necessary vectors of suitable types: using
60  DECL_VARIABLE_ALL_VARIANTS when all variants are supported, or the
61  relevant of subset calls to DECL_VARIABLE.
62
63* call clean_results() to initialize the 'results' buffers.
64
65* initialize the input vectors, using VLOAD, VDUP or VSET_LANE (vld*
66  tests do not need this step, since their actual purpose is to
67  initialize vectors).
68
69* execute the intrinsic on relevant variants, for instance using
70  TEST_MACRO_ALL_VARIANTS_2_5.
71
72* call check_results() to check that the results match the expected
73  values.
74
75A template test file could be:
76=================================================================
77#include <arm_neon.h>
78#include "arm-neon-ref.h"
79#include "compute-ref-data.h"
80
81/* Expected results.  */
82VECT_VAR_DECL(expected,int,8,8) [] = { 0xf6, 0xf7, 0xf8, 0xf9,
83				       0xfa, 0xfb, 0xfc, 0xfd };
84/* and as many others as necessary.  */
85
86#define TEST_MSG "VMYINTRINSIC"
87void exec_myintrinsic (void)
88{
89  /* my test: v4=vmyintrinsic(v1,v2,v3), then store the result.  */
90#define TEST_VMYINTR(Q, T1, T2, W, N)					\
91  VECT_VAR(vector_res, T1, W, N) =					\
92    vmyintr##Q##_##T2##W(VECT_VAR(vector1, T1, W, N),			\
93			 VECT_VAR(vector2, T1, W, N),			\
94			 VECT_VAR(vector3, T1, W, N));			\
95  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
96
97#define DECL_VMYINTR_VAR(VAR)			\
98  DECL_VARIABLE(VAR, int, 8, 8);
99/* And as many others as necessary.  */
100
101  DECL_VMYINTR_VAR(vector1);
102  DECL_VMYINTR_VAR(vector2);
103  DECL_VMYINTR_VAR(vector3);
104  DECL_VMYINTR_VAR(vector_res);
105
106  clean_results ();
107
108  /* Initialize input "vector1" from "buffer".  */
109  VLOAD(vector1, buffer, , int, s, 8, 8);
110/* And as many others as necessary.  */
111
112  /* Choose init value arbitrarily.  */
113  VDUP(vector2, , int, s, 8, 8, 1);
114/* And as many others as necessary.  */
115
116  /* Choose init value arbitrarily.  */
117  VDUP(vector3, , int, s, 8, 8, -5);
118/* And as many others as necessary.  */
119
120  /* Execute the tests.  */
121  TEST_VMYINTR(, int, s, 8, 8);
122/* And as many others as necessary.  */
123
124  check_results (TEST_MSG, "");
125}
126
127int main (void)
128{
129  exec_vmyintrinsic ();
130  return 0;
131}
132=================================================================
133