1 #include <arm_neon.h>
2 #include "arm-neon-ref.h"
3 #include "compute-ref-data.h"
4 
5 /* Expected results.  */
6 VECT_VAR_DECL(expected,int,8,8) [] = { 0xf1, 0xf1, 0xf1, 0xf1,
7 				       0xf1, 0xf1, 0xf1, 0xf1 };
8 VECT_VAR_DECL(expected,int,16,4) [] = { 0xfff2, 0xfff2, 0xfff2, 0xfff2 };
9 VECT_VAR_DECL(expected,int,32,2) [] = { 0xfffffff1, 0xfffffff1 };
10 VECT_VAR_DECL(expected,int,64,1) [] = { 0xfffffffffffffff0 };
11 VECT_VAR_DECL(expected,uint,8,8) [] = { 0xf7, 0xf7, 0xf7, 0xf7,
12 					0xf7, 0xf7, 0xf7, 0xf7 };
13 VECT_VAR_DECL(expected,uint,16,4) [] = { 0xfff3, 0xfff3, 0xfff3, 0xfff3 };
14 VECT_VAR_DECL(expected,uint,32,2) [] = { 0xfffffff1, 0xfffffff1 };
15 VECT_VAR_DECL(expected,uint,64,1) [] = { 0xfffffffffffffff0 };
16 VECT_VAR_DECL(expected,poly,8,8) [] = { 0xf7, 0xf7, 0xf7, 0xf7,
17 					0xf7, 0xf7, 0xf7, 0xf7 };
18 VECT_VAR_DECL(expected,poly,16,4) [] = { 0xfff3, 0xfff3, 0xfff3, 0xfff3 };
19 VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0xc1700000, 0xc1700000 };
20 #if defined (FP16_SUPPORTED)
21 VECT_VAR_DECL (expected, hfloat, 16, 4) [] = { 0xca80, 0xca80,
22 					       0xca80, 0xca80 };
23 #endif
24 VECT_VAR_DECL(expected,int,8,16) [] = { 0xf2, 0xf2, 0xf2, 0xf2,
25 					0xf2, 0xf2, 0xf2, 0xf2,
26 					0xf2, 0xf2, 0xf2, 0xf2,
27 					0xf2, 0xf2, 0xf2, 0xf2 };
28 VECT_VAR_DECL(expected,int,16,8) [] = { 0xfff3, 0xfff3, 0xfff3, 0xfff3,
29 					0xfff3, 0xfff3, 0xfff3, 0xfff3 };
30 VECT_VAR_DECL(expected,int,32,4) [] = { 0xfffffff1, 0xfffffff1,
31 					0xfffffff1, 0xfffffff1 };
32 VECT_VAR_DECL(expected,int,64,2) [] = { 0xfffffffffffffff0,
33 					0xfffffffffffffff0 };
34 VECT_VAR_DECL(expected,uint,8,16) [] = { 0xf5, 0xf5, 0xf5, 0xf5,
35 					 0xf5, 0xf5, 0xf5, 0xf5,
36 					 0xf5, 0xf5, 0xf5, 0xf5,
37 					 0xf5, 0xf5, 0xf5, 0xf5 };
38 VECT_VAR_DECL(expected,uint,16,8) [] = { 0xfff1, 0xfff1, 0xfff1, 0xfff1,
39 					 0xfff1, 0xfff1, 0xfff1, 0xfff1 };
40 VECT_VAR_DECL(expected,uint,32,4) [] = { 0xfffffff0, 0xfffffff0,
41 					 0xfffffff0, 0xfffffff0 };
42 VECT_VAR_DECL(expected,uint,64,2) [] = { 0xfffffffffffffff0,
43 					 0xfffffffffffffff0 };
44 VECT_VAR_DECL(expected,poly,8,16) [] = { 0xf5, 0xf5, 0xf5, 0xf5,
45 					 0xf5, 0xf5, 0xf5, 0xf5,
46 					 0xf5, 0xf5, 0xf5, 0xf5,
47 					 0xf5, 0xf5, 0xf5, 0xf5 };
48 VECT_VAR_DECL(expected,poly,16,8) [] = { 0xfff1, 0xfff1, 0xfff1, 0xfff1,
49 					 0xfff1, 0xfff1, 0xfff1, 0xfff1 };
50 #if defined (FP16_SUPPORTED)
51 VECT_VAR_DECL (expected, hfloat, 16, 8) [] = { 0xca80, 0xca80,
52 					       0xca80, 0xca80,
53 					       0xca80, 0xca80,
54 					       0xca80, 0xca80 };
55 #endif
56 VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0xc1700000, 0xc1700000,
57 					   0xc1700000, 0xc1700000 };
58 
59 #define TEST_MSG "VDUP_LANE/VDUPQ_LANE"
exec_vdup_lane(void)60 void exec_vdup_lane (void)
61 {
62   /* Basic test: vec1=vdup_lane(vec2, lane), then store the result.  */
63 #define TEST_VDUP_LANE(Q, T1, T2, W, N, N2, L)				\
64   VECT_VAR(vector_res, T1, W, N) =					\
65     vdup##Q##_lane_##T2##W(VECT_VAR(vector, T1, W, N2), L);		\
66   vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
67 
68   /* Input vector can only have 64 bits.  */
69   DECL_VARIABLE_64BITS_VARIANTS(vector);
70 
71   DECL_VARIABLE_ALL_VARIANTS(vector_res);
72 
73   clean_results ();
74 
75   TEST_MACRO_64BITS_VARIANTS_2_5(VLOAD, vector, buffer);
76 #if defined (FP16_SUPPORTED)
77   VLOAD(vector, buffer, , float, f, 16, 4);
78 #endif
79   VLOAD(vector, buffer, , float, f, 32, 2);
80 
81   /* Choose lane arbitrarily.  */
82   TEST_VDUP_LANE(, int, s, 8, 8, 8, 1);
83   TEST_VDUP_LANE(, int, s, 16, 4, 4, 2);
84   TEST_VDUP_LANE(, int, s, 32, 2, 2, 1);
85   TEST_VDUP_LANE(, int, s, 64, 1, 1, 0);
86   TEST_VDUP_LANE(, uint, u, 8, 8, 8, 7);
87   TEST_VDUP_LANE(, uint, u, 16, 4, 4, 3);
88   TEST_VDUP_LANE(, uint, u, 32, 2, 2, 1);
89   TEST_VDUP_LANE(, uint, u, 64, 1, 1, 0);
90   TEST_VDUP_LANE(, poly, p, 8, 8, 8, 7);
91   TEST_VDUP_LANE(, poly, p, 16, 4, 4, 3);
92 #if defined (FP16_SUPPORTED)
93   TEST_VDUP_LANE(, float, f, 16, 4, 4, 3);
94 #endif
95   TEST_VDUP_LANE(, float, f, 32, 2, 2, 1);
96 
97   TEST_VDUP_LANE(q, int, s, 8, 16, 8, 2);
98   TEST_VDUP_LANE(q, int, s, 16, 8, 4, 3);
99   TEST_VDUP_LANE(q, int, s, 32, 4, 2, 1);
100   TEST_VDUP_LANE(q, int, s, 64, 2, 1, 0);
101   TEST_VDUP_LANE(q, uint, u, 8, 16, 8, 5);
102   TEST_VDUP_LANE(q, uint, u, 16, 8, 4, 1);
103   TEST_VDUP_LANE(q, uint, u, 32, 4, 2, 0);
104   TEST_VDUP_LANE(q, uint, u, 64, 2, 1, 0);
105   TEST_VDUP_LANE(q, poly, p, 8, 16, 8, 5);
106   TEST_VDUP_LANE(q, poly, p, 16, 8, 4, 1);
107 #if defined (FP16_SUPPORTED)
108   TEST_VDUP_LANE(q, float, f, 16, 8, 4, 3);
109 #endif
110   TEST_VDUP_LANE(q, float, f, 32, 4, 2, 1);
111 
112 #if defined (FP16_SUPPORTED)
113   CHECK_RESULTS (TEST_MSG, "");
114 #else
115   CHECK_RESULTS_NO_FP16 (TEST_MSG, "");
116 #endif
117 
118 #if defined (__aarch64__)
119 
120 #undef TEST_MSG
121 #define TEST_MSG "VDUP_LANEQ/VDUPQ_LANEQ"
122 
123   /* Expected results for vdup*_laneq tests.  */
124 VECT_VAR_DECL(expected2,int,8,8) [] = { 0xfd, 0xfd, 0xfd, 0xfd,
125 					0xfd, 0xfd, 0xfd, 0xfd };
126 VECT_VAR_DECL(expected2,int,16,4) [] = { 0xfff2, 0xfff2, 0xfff2, 0xfff2 };
127 VECT_VAR_DECL(expected2,int,32,2) [] = { 0xfffffff1, 0xfffffff1 };
128 VECT_VAR_DECL(expected2,int,64,1) [] = { 0xfffffffffffffff0 };
129 VECT_VAR_DECL(expected2,uint,8,8) [] = { 0xff, 0xff, 0xff, 0xff,
130 					 0xff, 0xff, 0xff, 0xff };
131 VECT_VAR_DECL(expected2,uint,16,4) [] = { 0xfff3, 0xfff3, 0xfff3, 0xfff3 };
132 VECT_VAR_DECL(expected2,uint,32,2) [] = { 0xfffffff1, 0xfffffff1 };
133 VECT_VAR_DECL(expected2,uint,64,1) [] = { 0xfffffffffffffff0 };
134 VECT_VAR_DECL(expected2,poly,8,8) [] = { 0xf7, 0xf7, 0xf7, 0xf7,
135 					 0xf7, 0xf7, 0xf7, 0xf7 };
136 VECT_VAR_DECL(expected2,poly,16,4) [] = { 0xfff3, 0xfff3, 0xfff3, 0xfff3 };
137 VECT_VAR_DECL(expected2,hfloat,32,2) [] = { 0xc1700000, 0xc1700000 };
138 #if defined (FP16_SUPPORTED)
139 VECT_VAR_DECL (expected2, hfloat, 16, 4) [] = { 0xca80, 0xca80,
140 						0xca80, 0xca80 };
141 #endif
142 VECT_VAR_DECL(expected2,int,8,16) [] = { 0xfb, 0xfb, 0xfb, 0xfb,
143 					 0xfb, 0xfb, 0xfb, 0xfb,
144 					 0xfb, 0xfb, 0xfb, 0xfb,
145 					 0xfb, 0xfb, 0xfb, 0xfb };
146 VECT_VAR_DECL(expected2,int,16,8) [] = { 0xfff7, 0xfff7, 0xfff7, 0xfff7,
147 					 0xfff7, 0xfff7, 0xfff7, 0xfff7 };
148 VECT_VAR_DECL(expected2,int,32,4) [] = { 0xfffffff1, 0xfffffff1,
149 					 0xfffffff1, 0xfffffff1 };
150 VECT_VAR_DECL(expected2,int,64,2) [] = { 0xfffffffffffffff0,
151 					 0xfffffffffffffff0 };
152 VECT_VAR_DECL(expected2,uint,8,16) [] = { 0xf5, 0xf5, 0xf5, 0xf5,
153 					  0xf5, 0xf5, 0xf5, 0xf5,
154 					  0xf5, 0xf5, 0xf5, 0xf5,
155 					  0xf5, 0xf5, 0xf5, 0xf5 };
156 VECT_VAR_DECL(expected2,uint,16,8) [] = { 0xfff1, 0xfff1, 0xfff1, 0xfff1,
157 					  0xfff1, 0xfff1, 0xfff1, 0xfff1 };
158 VECT_VAR_DECL(expected2,uint,32,4) [] = { 0xfffffff0, 0xfffffff0,
159 					  0xfffffff0, 0xfffffff0 };
160 VECT_VAR_DECL(expected2,uint,64,2) [] = { 0xfffffffffffffff0,
161 					  0xfffffffffffffff0 };
162 VECT_VAR_DECL(expected2,poly,8,16) [] = { 0xf5, 0xf5, 0xf5, 0xf5,
163 					  0xf5, 0xf5, 0xf5, 0xf5,
164 					  0xf5, 0xf5, 0xf5, 0xf5,
165 					  0xf5, 0xf5, 0xf5, 0xf5 };
166 VECT_VAR_DECL(expected2,poly,16,8) [] = { 0xfff1, 0xfff1, 0xfff1, 0xfff1,
167 					  0xfff1, 0xfff1, 0xfff1, 0xfff1 };
168 #if defined (FP16_SUPPORTED)
169 VECT_VAR_DECL (expected2, hfloat, 16, 8) [] = { 0xc880, 0xc880,
170 						0xc880, 0xc880,
171 						0xc880, 0xc880,
172 						0xc880, 0xc880 };
173 #endif
174 VECT_VAR_DECL(expected2,hfloat,32,4) [] = { 0xc1700000, 0xc1700000,
175 					    0xc1700000, 0xc1700000 };
176 
177   /* Clean all results for vdup*_laneq tests.  */
178   clean_results ();
179   /* Basic test: vec1=vdup_lane(vec2, lane), then store the result.  */
180 #define TEST_VDUP_LANEQ(Q, T1, T2, W, N, N2, L)				\
181   VECT_VAR(vector_res, T1, W, N) =					\
182     vdup##Q##_laneq_##T2##W(VECT_VAR(vector, T1, W, N2), L);		\
183   vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
184 
185   /* Input vector can only have 64 bits.  */
186   DECL_VARIABLE_128BITS_VARIANTS(vector);
187 
188   clean_results ();
189 
190   TEST_MACRO_128BITS_VARIANTS_2_5(VLOAD, vector, buffer);
191 #if defined (FP16_SUPPORTED)
192   VLOAD(vector, buffer, q, float, f, 16, 8);
193 #endif
194   VLOAD(vector, buffer, q, float, f, 32, 4);
195 
196   /* Choose lane arbitrarily.  */
197   TEST_VDUP_LANEQ(, int, s, 8, 8, 16, 13);
198   TEST_VDUP_LANEQ(, int, s, 16, 4, 8, 2);
199   TEST_VDUP_LANEQ(, int, s, 32, 2, 4, 1);
200   TEST_VDUP_LANEQ(, int, s, 64, 1, 2, 0);
201   TEST_VDUP_LANEQ(, uint, u, 8, 8, 16, 15);
202   TEST_VDUP_LANEQ(, uint, u, 16, 4, 8, 3);
203   TEST_VDUP_LANEQ(, uint, u, 32, 2, 4, 1);
204   TEST_VDUP_LANEQ(, uint, u, 64, 1, 2, 0);
205   TEST_VDUP_LANEQ(, poly, p, 8, 8, 16, 7);
206   TEST_VDUP_LANEQ(, poly, p, 16, 4, 8, 3);
207 #if defined (FP16_SUPPORTED)
208   TEST_VDUP_LANEQ(, float, f, 16, 4, 8, 3);
209 #endif
210   TEST_VDUP_LANEQ(, float, f, 32, 2, 4, 1);
211 
212   TEST_VDUP_LANEQ(q, int, s, 8, 16, 16, 11);
213   TEST_VDUP_LANEQ(q, int, s, 16, 8, 8, 7);
214   TEST_VDUP_LANEQ(q, int, s, 32, 4, 4, 1);
215   TEST_VDUP_LANEQ(q, int, s, 64, 2, 2, 0);
216   TEST_VDUP_LANEQ(q, uint, u, 8, 16, 16, 5);
217   TEST_VDUP_LANEQ(q, uint, u, 16, 8, 8, 1);
218   TEST_VDUP_LANEQ(q, uint, u, 32, 4, 4, 0);
219   TEST_VDUP_LANEQ(q, uint, u, 64, 2, 2, 0);
220   TEST_VDUP_LANEQ(q, poly, p, 8, 16, 16, 5);
221   TEST_VDUP_LANEQ(q, poly, p, 16, 8, 8, 1);
222 #if defined (FP16_SUPPORTED)
223   TEST_VDUP_LANEQ(q, float, f, 16, 8, 8, 7);
224 #endif
225   TEST_VDUP_LANEQ(q, float, f, 32, 4, 4, 1);
226 
227   CHECK_RESULTS_NAMED (TEST_MSG, expected2, "");
228 #if defined (FP16_SUPPORTED)
229   CHECK_FP(TEST_MSG, float, 16, 4, PRIx16, expected2, "");
230   CHECK_FP(TEST_MSG, float, 16, 8, PRIx16, expected2, "");
231 #endif
232 
233 #endif /* __aarch64__.  */
234 }
235 
main(void)236 int main (void)
237 {
238   exec_vdup_lane ();
239   return 0;
240 }
241