1 /* Test forcing 128-bit logical types into GPR registers. */
2
3 #if defined(NO_ASM)
4 #define FORCE_REG1(X)
5 #define FORCE_REG2(X,Y)
6
7 #else
8 #if defined(USE_ALTIVEC)
9 #define REG_CLASS "+v"
10 #define PRINT_REG1 "# altivec reg %0"
11 #define PRINT_REG2 "# altivec reg %0, %1"
12
13 #elif defined(USE_FPR)
14 #define REG_CLASS "+d"
15 #define PRINT_REG1 "# fpr reg %0"
16 #define PRINT_REG2 "# fpr reg %0, %1"
17
18 #elif defined(USE_VSX)
19 #define REG_CLASS "+wa"
20 #define PRINT_REG1 "# vsx reg %x0"
21 #define PRINT_REG2 "# vsx reg %x0, %x1"
22
23 #else
24 #define REG_CLASS "+r"
25 #define PRINT_REG1 "# gpr reg %0"
26 #define PRINT_REG2 "# gpr reg %0, %1"
27 #endif
28
29 #define FORCE_REG1(X) __asm__ (PRINT_REG1 : REG_CLASS (X))
30 #define FORCE_REG2(X,Y) __asm__ (PRINT_REG2 : REG_CLASS (X), REG_CLASS (Y))
31 #endif
32
ptr1(TYPE * p)33 void ptr1 (TYPE *p)
34 {
35 TYPE a = p[1];
36 TYPE b = p[2];
37 TYPE c;
38
39 FORCE_REG2 (a, b);
40 c = a & b; /* AND */
41 FORCE_REG1 (c);
42 p[0] = c;
43 }
44
ptr2(TYPE * p)45 void ptr2 (TYPE *p)
46 {
47 TYPE a = p[1];
48 TYPE b = p[2];
49 TYPE c;
50
51 FORCE_REG2 (a, b);
52 c = a | b; /* OR */
53 FORCE_REG1 (c);
54 p[0] = c;
55 }
56
ptr3(TYPE * p)57 void ptr3 (TYPE *p)
58 {
59 TYPE a = p[1];
60 TYPE b = p[2];
61 TYPE c;
62
63 FORCE_REG2 (a, b);
64 c = a ^ b; /* XOR */
65 FORCE_REG1 (c);
66 p[0] = c;
67 }
68
ptr4(TYPE * p)69 void ptr4 (TYPE *p)
70 {
71 TYPE a = p[1];
72 TYPE b;
73
74 FORCE_REG1 (a);
75 b = ~a; /* NOR */
76 FORCE_REG1 (b);
77 p[0] = b;
78 }
79
ptr5(TYPE * p)80 void ptr5 (TYPE *p)
81 {
82 TYPE a = p[1];
83 TYPE b = p[2];
84 TYPE c;
85
86 FORCE_REG2 (a, b);
87 c = ~(a & b); /* NAND */
88 FORCE_REG1 (c);
89 p[0] = c;
90 }
91
ptr6(TYPE * p)92 void ptr6 (TYPE *p)
93 {
94 TYPE a = p[1];
95 TYPE b = p[2];
96 TYPE c;
97
98 FORCE_REG2 (a, b);
99 c = ~(a | b); /* AND */
100 FORCE_REG1 (c);
101 p[0] = c;
102 }
103
ptr7(TYPE * p)104 void ptr7 (TYPE *p)
105 {
106 TYPE a = p[1];
107 TYPE b = p[2];
108 TYPE c;
109
110 FORCE_REG2 (a, b);
111 c = ~(a ^ b); /* EQV */
112 FORCE_REG1 (c);
113 p[0] = c;
114 }
115
ptr8(TYPE * p)116 void ptr8 (TYPE *p)
117 {
118 TYPE a = p[1];
119 TYPE b = p[2];
120 TYPE c;
121
122 FORCE_REG2 (a, b);
123 c = (~a) & b; /* ANDC */
124 FORCE_REG1 (c);
125 p[0] = c;
126 }
127
ptr9(TYPE * p)128 void ptr9 (TYPE *p)
129 {
130 TYPE a = p[1];
131 TYPE b = p[2];
132 TYPE c;
133
134 FORCE_REG2 (a, b);
135 c = (~a) | b; /* ORC */
136 FORCE_REG1 (c);
137 p[0] = c;
138 }
139
ptr10(TYPE * p)140 void ptr10 (TYPE *p)
141 {
142 TYPE a = p[1];
143 TYPE b = p[2];
144 TYPE c;
145
146 FORCE_REG2 (a, b);
147 c = (~a) ^ b; /* EQV */
148 FORCE_REG1 (c);
149 p[0] = c;
150 }
151
ptr11(TYPE * p)152 void ptr11 (TYPE *p)
153 {
154 TYPE a = p[1];
155 TYPE b = p[2];
156 TYPE c;
157
158 FORCE_REG2 (a, b);
159 c = a & (~b); /* ANDC */
160 FORCE_REG1 (c);
161 p[0] = c;
162 }
163
ptr12(TYPE * p)164 void ptr12 (TYPE *p)
165 {
166 TYPE a = p[1];
167 TYPE b = p[2];
168 TYPE c;
169
170 FORCE_REG2 (a, b);
171 c = a | (~b); /* ORC */
172 FORCE_REG1 (c);
173 p[0] = c;
174 }
175
ptr13(TYPE * p)176 void ptr13 (TYPE *p)
177 {
178 TYPE a = p[1];
179 TYPE b = p[2];
180 TYPE c;
181
182 FORCE_REG2 (a, b);
183 c = a ^ (~b); /* AND */
184 FORCE_REG1 (c);
185 p[0] = c;
186 }
187