1 /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
2 /* { dg-require-effective-target powerpc_p9vector_ok } */
3 /* { dg-options "-mpower9-vector -O2" } */
4
5 /* Test the generation of the round to odd instructions. */
6 __float128
f128_add(__float128 a,__float128 b)7 f128_add(__float128 a, __float128 b)
8 {
9 return __builtin_addf128_round_to_odd (a, b);
10 }
11
12 __float128
f128_sub(__float128 a,__float128 b)13 f128_sub (__float128 a, __float128 b)
14 {
15 return __builtin_subf128_round_to_odd (a, b);
16 }
17
18 __float128
f128_mul(__float128 a,__float128 b)19 f128_mul (__float128 a, __float128 b)
20 {
21 return __builtin_mulf128_round_to_odd (a, b);
22 }
23
24 __float128
f128_div(__float128 a,__float128 b)25 f128_div (__float128 a, __float128 b)
26 {
27 return __builtin_divf128_round_to_odd (a, b);
28 }
29
30 __float128
f128_sqrt(__float128 a)31 f128_sqrt (__float128 a)
32 {
33 return __builtin_sqrtf128_round_to_odd (a);
34 }
35
36 double
f128_trunc(__float128 a)37 f128_trunc (__float128 a)
38 {
39 return __builtin_truncf128_round_to_odd (a);
40 }
41
42 __float128
f128_fma(__float128 a,__float128 b,__float128 c)43 f128_fma (__float128 a, __float128 b, __float128 c)
44 {
45 return __builtin_fmaf128_round_to_odd (a, b, c);
46 }
47
48 __float128
f128_fms(__float128 a,__float128 b,__float128 c)49 f128_fms (__float128 a, __float128 b, __float128 c)
50 {
51 return __builtin_fmaf128_round_to_odd (a, b, -c);
52 }
53
54 __float128
f128_nfma(__float128 a,__float128 b,__float128 c)55 f128_nfma (__float128 a, __float128 b, __float128 c)
56 {
57 return - __builtin_fmaf128_round_to_odd (a, b, c);
58 }
59
60 __float128
f128_nfms(__float128 a,__float128 b,__float128 c)61 f128_nfms (__float128 a, __float128 b, __float128 c)
62 {
63 return - __builtin_fmaf128_round_to_odd (a, b, -c);
64 }
65
66 /* { dg-final { scan-assembler {\mxsaddqpo\M} } } */
67 /* { dg-final { scan-assembler {\mxssubqpo\M} } } */
68 /* { dg-final { scan-assembler {\mxsmulqpo\M} } } */
69 /* { dg-final { scan-assembler {\mxsdivqpo\M} } } */
70 /* { dg-final { scan-assembler {\mxssqrtqpo\M} } } */
71 /* { dg-final { scan-assembler {\mxscvqpdpo\M} } } */
72 /* { dg-final { scan-assembler {\mxsmaddqpo\M} } } */
73 /* { dg-final { scan-assembler {\mxsmsubqpo\M} } } */
74 /* { dg-final { scan-assembler {\mxsnmaddqpo\M} } } */
75 /* { dg-final { scan-assembler {\mxsnmsubqpo\M} } } */
76