1 /* Common hooks for AArch64.
2 Copyright (C) 2012-2019 Free Software Foundation, Inc.
3 Contributed by ARM Ltd.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
20
21 #include "config.h"
22 #define INCLUDE_STRING
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "memmodel.h"
27 #include "tm_p.h"
28 #include "common/common-target.h"
29 #include "common/common-target-def.h"
30 #include "opts.h"
31 #include "flags.h"
32 #include "diagnostic.h"
33 #include "params.h"
34
35 #ifdef TARGET_BIG_ENDIAN_DEFAULT
36 #undef TARGET_DEFAULT_TARGET_FLAGS
37 #define TARGET_DEFAULT_TARGET_FLAGS (MASK_BIG_END)
38 #endif
39
40 #undef TARGET_HANDLE_OPTION
41 #define TARGET_HANDLE_OPTION aarch64_handle_option
42
43 #undef TARGET_OPTION_OPTIMIZATION_TABLE
44 #define TARGET_OPTION_OPTIMIZATION_TABLE aarch_option_optimization_table
45 #undef TARGET_OPTION_DEFAULT_PARAMS
46 #define TARGET_OPTION_DEFAULT_PARAMS aarch64_option_default_params
47 #undef TARGET_OPTION_VALIDATE_PARAM
48 #define TARGET_OPTION_VALIDATE_PARAM aarch64_option_validate_param
49 #undef TARGET_OPTION_INIT_STRUCT
50 #define TARGET_OPTION_INIT_STRUCT aarch64_option_init_struct
51
52 /* Set default optimization options. */
53 static const struct default_options aarch_option_optimization_table[] =
54 {
55 /* Enable section anchors by default at -O1 or higher. */
56 { OPT_LEVELS_1_PLUS, OPT_fsection_anchors, NULL, 1 },
57 /* Disable fomit-frame-pointer by default. */
58 { OPT_LEVELS_ALL, OPT_fomit_frame_pointer, NULL, 0 },
59 /* Enable -fsched-pressure by default when optimizing. */
60 { OPT_LEVELS_1_PLUS, OPT_fsched_pressure, NULL, 1 },
61 /* Enable redundant extension instructions removal at -O2 and higher. */
62 { OPT_LEVELS_2_PLUS, OPT_free, NULL, 1 },
63 #if (TARGET_DEFAULT_ASYNC_UNWIND_TABLES == 1)
64 { OPT_LEVELS_ALL, OPT_fasynchronous_unwind_tables, NULL, 1 },
65 { OPT_LEVELS_ALL, OPT_funwind_tables, NULL, 1},
66 #endif
67 { OPT_LEVELS_NONE, 0, NULL, 0 }
68 };
69
70 /* Implement target validation TARGET_OPTION_DEFAULT_PARAM. */
71
72 static bool
aarch64_option_validate_param(const int value,const int param)73 aarch64_option_validate_param (const int value, const int param)
74 {
75 /* Check that both parameters are the same. */
76 if (param == (int) PARAM_STACK_CLASH_PROTECTION_GUARD_SIZE)
77 {
78 if (value != 12 && value != 16)
79 {
80 error ("only values 12 (4 KB) and 16 (64 KB) are supported for guard "
81 "size. Given value %d (%llu KB) is out of range",
82 value, (1ULL << value) / 1024ULL);
83 return false;
84 }
85 }
86
87 return true;
88 }
89
90 /* Implement TARGET_OPTION_DEFAULT_PARAMS. */
91
92 static void
aarch64_option_default_params(void)93 aarch64_option_default_params (void)
94 {
95 /* We assume the guard page is 64k. */
96 int index = (int) PARAM_STACK_CLASH_PROTECTION_GUARD_SIZE;
97 set_default_param_value (PARAM_STACK_CLASH_PROTECTION_GUARD_SIZE,
98 DEFAULT_STK_CLASH_GUARD_SIZE == 0
99 ? 16 : DEFAULT_STK_CLASH_GUARD_SIZE);
100
101 int guard_size
102 = default_param_value (PARAM_STACK_CLASH_PROTECTION_GUARD_SIZE);
103
104 /* Set the interval parameter to be the same as the guard size. This way the
105 mid-end code does the right thing for us. */
106 set_default_param_value (PARAM_STACK_CLASH_PROTECTION_PROBE_INTERVAL,
107 guard_size);
108
109 /* Validate the options. */
110 aarch64_option_validate_param (guard_size, index);
111 }
112
113 /* Implement TARGET_HANDLE_OPTION.
114 This function handles the target specific options for CPU/target selection.
115
116 -mcpu=CPU is shorthand for -march=ARCH_FOR_CPU, -mtune=CPU.
117 If either of -march or -mtune is given, they override their
118 respective component of -mcpu. This logic is implemented
119 in config/aarch64/aarch64.c:aarch64_override_options. */
120
121 bool
aarch64_handle_option(struct gcc_options * opts,struct gcc_options * opts_set ATTRIBUTE_UNUSED,const struct cl_decoded_option * decoded,location_t loc ATTRIBUTE_UNUSED)122 aarch64_handle_option (struct gcc_options *opts,
123 struct gcc_options *opts_set ATTRIBUTE_UNUSED,
124 const struct cl_decoded_option *decoded,
125 location_t loc ATTRIBUTE_UNUSED)
126 {
127 size_t code = decoded->opt_index;
128 const char *arg = decoded->arg;
129 int val = decoded->value;
130
131 switch (code)
132 {
133 case OPT_march_:
134 opts->x_aarch64_arch_string = arg;
135 return true;
136
137 case OPT_mcpu_:
138 opts->x_aarch64_cpu_string = arg;
139 return true;
140
141 case OPT_mtune_:
142 opts->x_aarch64_tune_string = arg;
143 return true;
144
145 case OPT_mgeneral_regs_only:
146 opts->x_target_flags |= MASK_GENERAL_REGS_ONLY;
147 return true;
148
149 case OPT_mfix_cortex_a53_835769:
150 opts->x_aarch64_fix_a53_err835769 = val;
151 return true;
152
153 case OPT_mstrict_align:
154 if (val)
155 opts->x_target_flags |= MASK_STRICT_ALIGN;
156 else
157 opts->x_target_flags &= ~MASK_STRICT_ALIGN;
158 return true;
159
160 case OPT_momit_leaf_frame_pointer:
161 opts->x_flag_omit_leaf_frame_pointer = val;
162 return true;
163
164 case OPT_moutline_atomics:
165 if (val)
166 opts->x_target_flags |= MASK_OUTLINE_ATOMICS;
167 else
168 opts->x_target_flags &= ~MASK_OUTLINE_ATOMICS;
169 return true;
170
171 default:
172 return true;
173 }
174 }
175
176 /* An ISA extension in the co-processor and main instruction set space. */
177 struct aarch64_option_extension
178 {
179 const char *const name;
180 const unsigned long flag_canonical;
181 const unsigned long flags_on;
182 const unsigned long flags_off;
183 const bool is_synthetic;
184 };
185
186 /* ISA extensions in AArch64. */
187 static const struct aarch64_option_extension all_extensions[] =
188 {
189 #define AARCH64_OPT_EXTENSION(NAME, FLAG_CANONICAL, FLAGS_ON, FLAGS_OFF, \
190 SYNTHETIC, Z) \
191 {NAME, FLAG_CANONICAL, FLAGS_ON, FLAGS_OFF, SYNTHETIC},
192 #include "config/aarch64/aarch64-option-extensions.def"
193 {NULL, 0, 0, 0, false}
194 };
195
196 /* A copy of the ISA extensions list for AArch64 sorted by the popcount of
197 bits and extension turned on. Cached for efficiency. */
198 static struct aarch64_option_extension all_extensions_by_on[] =
199 {
200 #define AARCH64_OPT_EXTENSION(NAME, FLAG_CANONICAL, FLAGS_ON, FLAGS_OFF, \
201 SYNTHETIC, Z) \
202 {NAME, FLAG_CANONICAL, FLAGS_ON, FLAGS_OFF, SYNTHETIC},
203 #include "config/aarch64/aarch64-option-extensions.def"
204 {NULL, 0, 0, 0, false}
205 };
206
207 struct processor_name_to_arch
208 {
209 const std::string processor_name;
210 const enum aarch64_arch arch;
211 const unsigned long flags;
212 };
213
214 struct arch_to_arch_name
215 {
216 const enum aarch64_arch arch;
217 const std::string arch_name;
218 const unsigned long flags;
219 };
220
221 /* Map processor names to the architecture revision they implement and
222 the default set of architectural feature flags they support. */
223 static const struct processor_name_to_arch all_cores[] =
224 {
225 #define AARCH64_CORE(NAME, X, IDENT, ARCH_IDENT, FLAGS, COSTS, IMP, PART, VARIANT) \
226 {NAME, AARCH64_ARCH_##ARCH_IDENT, FLAGS},
227 #include "config/aarch64/aarch64-cores.def"
228 {"generic", AARCH64_ARCH_8A, AARCH64_FL_FOR_ARCH8},
229 {"", aarch64_no_arch, 0}
230 };
231
232 /* Map architecture revisions to their string representation. */
233 static const struct arch_to_arch_name all_architectures[] =
234 {
235 #define AARCH64_ARCH(NAME, CORE, ARCH_IDENT, ARCH, FLAGS) \
236 {AARCH64_ARCH_##ARCH_IDENT, NAME, FLAGS},
237 #include "config/aarch64/aarch64-arches.def"
238 {aarch64_no_arch, "", 0}
239 };
240
241 /* Parse the architecture extension string STR and update ISA_FLAGS
242 with the architecture features turned on or off. Return a
243 aarch64_parse_opt_result describing the result.
244 When the STR string contains an invalid extension,
245 a copy of the string is created and stored to INVALID_EXTENSION. */
246
247 enum aarch64_parse_opt_result
aarch64_parse_extension(const char * str,unsigned long * isa_flags,std::string * invalid_extension)248 aarch64_parse_extension (const char *str, unsigned long *isa_flags,
249 std::string *invalid_extension)
250 {
251 /* The extension string is parsed left to right. */
252 const struct aarch64_option_extension *opt = NULL;
253
254 /* Flag to say whether we are adding or removing an extension. */
255 int adding_ext = -1;
256
257 while (str != NULL && *str != 0)
258 {
259 const char *ext;
260 size_t len;
261
262 str++;
263 ext = strchr (str, '+');
264
265 if (ext != NULL)
266 len = ext - str;
267 else
268 len = strlen (str);
269
270 if (len >= 2 && strncmp (str, "no", 2) == 0)
271 {
272 adding_ext = 0;
273 len -= 2;
274 str += 2;
275 }
276 else if (len > 0)
277 adding_ext = 1;
278
279 if (len == 0)
280 return AARCH64_PARSE_MISSING_ARG;
281
282
283 /* Scan over the extensions table trying to find an exact match. */
284 for (opt = all_extensions; opt->name != NULL; opt++)
285 {
286 if (strlen (opt->name) == len && strncmp (opt->name, str, len) == 0)
287 {
288 /* Add or remove the extension. */
289 if (adding_ext)
290 *isa_flags |= (opt->flags_on | opt->flag_canonical);
291 else
292 *isa_flags &= ~(opt->flags_off | opt->flag_canonical);
293 break;
294 }
295 }
296
297 if (opt->name == NULL)
298 {
299 /* Extension not found in list. */
300 if (invalid_extension)
301 *invalid_extension = std::string (str, len);
302 return AARCH64_PARSE_INVALID_FEATURE;
303 }
304
305 str = ext;
306 };
307
308 return AARCH64_PARSE_OK;
309 }
310
311 /* Append all architecture extension candidates to the CANDIDATES vector. */
312
313 void
aarch64_get_all_extension_candidates(auto_vec<const char * > * candidates)314 aarch64_get_all_extension_candidates (auto_vec<const char *> *candidates)
315 {
316 const struct aarch64_option_extension *opt;
317 for (opt = all_extensions; opt->name != NULL; opt++)
318 candidates->safe_push (opt->name);
319 }
320
321 /* Comparer to sort aarch64's feature extensions by population count. Largest
322 first. */
323
324 typedef const struct aarch64_option_extension opt_ext;
325
opt_ext_cmp(const void * a,const void * b)326 int opt_ext_cmp (const void* a, const void* b)
327 {
328 opt_ext *opt_a = (opt_ext *)a;
329 opt_ext *opt_b = (opt_ext *)b;
330
331 /* We consider the total set of bits an options turns on to be the union of
332 the singleton set containing the option itself and the set of options it
333 turns on as a dependency. As an example +dotprod turns on FL_DOTPROD and
334 FL_SIMD. As such the set of bits represented by this option is
335 {FL_DOTPROD, FL_SIMD}. */
336 unsigned long total_flags_a = opt_a->flag_canonical & opt_a->flags_on;
337 unsigned long total_flags_b = opt_b->flag_canonical & opt_b->flags_on;
338 int popcnt_a = popcount_hwi ((HOST_WIDE_INT)total_flags_a);
339 int popcnt_b = popcount_hwi ((HOST_WIDE_INT)total_flags_b);
340 int order = popcnt_b - popcnt_a;
341
342 /* If they have the same amount of bits set, give it a more
343 deterministic ordering by using the value of the bits themselves. */
344 if (order == 0)
345 return total_flags_b - total_flags_a;
346
347 return order;
348 }
349
350 /* Implement TARGET_OPTION_INIT_STRUCT. */
351
352 static void
aarch64_option_init_struct(struct gcc_options * opts ATTRIBUTE_UNUSED)353 aarch64_option_init_struct (struct gcc_options *opts ATTRIBUTE_UNUSED)
354 {
355 /* Sort the extensions based on how many bits they set, order the larger
356 counts first. We sort the list because this makes processing the
357 feature bits O(n) instead of O(n^2). While n is small, the function
358 to calculate the feature strings is called on every options push,
359 pop and attribute change (arm_neon headers, lto etc all cause this to
360 happen quite frequently). It is a trade-off between time and space and
361 so time won. */
362 int n_extensions
363 = sizeof (all_extensions) / sizeof (struct aarch64_option_extension);
364 qsort (&all_extensions_by_on, n_extensions,
365 sizeof (struct aarch64_option_extension), opt_ext_cmp);
366 }
367
368 /* Checks to see if enough bits from the option OPT are enabled in
369 ISA_FLAG_BITS to be able to replace the individual options with the
370 canonicalized version of the option. This is done based on two rules:
371
372 1) Synthetic groups, such as +crypto we only care about the bits that are
373 turned on. e.g. +aes+sha2 can be replaced with +crypto.
374
375 2) Options that themselves have a bit, such as +rdma, in this case, all the
376 feature bits they turn on must be available and the bit for the option
377 itself must be. In this case it's effectively a reduction rather than a
378 grouping. e.g. +fp+simd is not enough to turn on +rdma, for that you would
379 need +rdma+fp+simd which is reduced down to +rdma.
380 */
381
382 static bool
aarch64_contains_opt(unsigned long isa_flag_bits,opt_ext * opt)383 aarch64_contains_opt (unsigned long isa_flag_bits, opt_ext *opt)
384 {
385 unsigned long flags_check
386 = opt->is_synthetic ? opt->flags_on : opt->flag_canonical;
387
388 return (isa_flag_bits & flags_check) == flags_check;
389 }
390
391 /* Return a string representation of ISA_FLAGS. DEFAULT_ARCH_FLAGS
392 gives the default set of flags which are implied by whatever -march
393 we'd put out. Our job is to figure out the minimal set of "+" and
394 "+no" feature flags to put out, and to put them out grouped such
395 that all the "+" flags come before the "+no" flags. */
396
397 std::string
aarch64_get_extension_string_for_isa_flags(unsigned long isa_flags,unsigned long default_arch_flags)398 aarch64_get_extension_string_for_isa_flags (unsigned long isa_flags,
399 unsigned long default_arch_flags)
400 {
401 const struct aarch64_option_extension *opt = NULL;
402 std::string outstr = "";
403
404 unsigned long isa_flag_bits = isa_flags;
405
406 /* Pass one: Minimize the search space by reducing the set of options
407 to the smallest set that still turns on the same features as before in
408 conjunction with the bits that are turned on by default for the selected
409 architecture. */
410 for (opt = all_extensions_by_on; opt->name != NULL; opt++)
411 {
412 /* If the bit is on by default, then all the options it turns on are also
413 on by default due to the transitive dependencies.
414
415 If the option is enabled explicitly in the set then we need to emit
416 an option for it. Since this list is sorted by extensions setting the
417 largest number of featers first, we can be sure that nothing else will
418 ever need to set the bits we already set. Consider the following
419 situation:
420
421 Feat1 = A + B + C
422 Feat2 = A + B
423 Feat3 = A + D
424 Feat4 = B + C
425 Feat5 = C
426
427 The following results are expected:
428
429 A + C = A + Feat5
430 B + C = Feat4
431 Feat4 + A = Feat1
432 Feat2 + Feat5 = Feat1
433 Feat1 + C = Feat1
434 Feat3 + Feat4 = Feat1 + D
435
436 This search assumes that all invidual feature bits are use visible,
437 in other words the user must be able to do +A, +B, +C and +D. */
438 if (aarch64_contains_opt (isa_flag_bits | default_arch_flags, opt))
439 {
440 /* We remove all the dependent bits, to prevent them from being turned
441 on twice. This only works because we assume that all there are
442 individual options to set all bits standalone. */
443
444 /* PR target/94396.
445
446 For flags which would already imply a bit that's on by default (e.g
447 fp16fml which implies +fp,+fp16) we must emit the flags that are not
448 on by default. i.e. in Armv8.4-a +fp16fml is default if +fp16. So
449 if a user passes armv8.4-a+fp16 (or +fp16fml) then we need to emit
450 +fp16. But if +fp16fml is used in an architecture where it is
451 completely optional we only have to emit the canonical flag. */
452 uint64_t toggle_bits = opt->flags_on & default_arch_flags;
453 /* Now check to see if the canonical flag is on by default. If it
454 is not then enabling it will enable all bits in flags_on. */
455 if ((opt->flag_canonical & default_arch_flags) == 0)
456 toggle_bits = opt->flags_on;
457
458 isa_flag_bits &= ~toggle_bits;
459 isa_flag_bits |= opt->flag_canonical;
460 }
461 }
462
463 /* By toggling bits on and off, we may have set bits on that are already
464 enabled by default. So we mask the default set out so we don't emit an
465 option for them. Instead of checking for this each time during Pass One
466 we just mask all default bits away at the end. */
467 isa_flag_bits &= ~default_arch_flags;
468
469 /* We now have the smallest set of features we need to process. A subsequent
470 linear scan of the bits in isa_flag_bits will allow us to print the ext
471 names. However as a special case if CRC was enabled before, always print
472 it. This is required because some CPUs have an incorrect specification
473 in older assemblers. Even though CRC should be the default for these
474 cases the -mcpu values won't turn it on. */
475 if (isa_flags & AARCH64_ISA_CRC)
476 isa_flag_bits |= AARCH64_ISA_CRC;
477
478 /* Pass Two:
479 Print the option names that we're sure we must turn on. These are only
480 optional extension names. Mandatory ones have already been removed and
481 ones we explicitly want off have been too. */
482 for (opt = all_extensions_by_on; opt->name != NULL; opt++)
483 {
484 if (isa_flag_bits & opt->flag_canonical)
485 {
486 outstr += "+";
487 outstr += opt->name;
488 }
489 }
490
491 /* Pass Three:
492 Print out a +no for any mandatory extension that we are
493 turning off. By this point aarch64_parse_extension would have ensured
494 that any optional extensions are turned off. The only things left are
495 things that can't be turned off usually, e.g. something that is on by
496 default because it's mandatory and we want it off. For turning off bits
497 we don't guarantee the smallest set of flags, but instead just emit all
498 options the user has specified.
499
500 The assembler requires all +<opts> to be printed before +no<opts>. */
501 for (opt = all_extensions_by_on; opt->name != NULL; opt++)
502 {
503 if ((~isa_flags) & opt->flag_canonical
504 && !((~default_arch_flags) & opt->flag_canonical))
505 {
506 outstr += "+no";
507 outstr += opt->name;
508 }
509 }
510
511 return outstr;
512 }
513
514 /* Attempt to rewrite NAME, which has been passed on the command line
515 as a -mcpu option to an equivalent -march value. If we can do so,
516 return the new string, otherwise return an error. */
517
518 const char *
aarch64_rewrite_selected_cpu(const char * name)519 aarch64_rewrite_selected_cpu (const char *name)
520 {
521 std::string original_string (name);
522 std::string extension_str;
523 std::string processor;
524 size_t extension_pos = original_string.find_first_of ('+');
525
526 /* Strip and save the extension string. */
527 if (extension_pos != std::string::npos)
528 {
529 processor = original_string.substr (0, extension_pos);
530 extension_str = original_string.substr (extension_pos,
531 std::string::npos);
532 }
533 else
534 {
535 /* No extensions. */
536 processor = original_string;
537 }
538
539 const struct processor_name_to_arch* p_to_a;
540 for (p_to_a = all_cores;
541 p_to_a->arch != aarch64_no_arch;
542 p_to_a++)
543 {
544 if (p_to_a->processor_name == processor)
545 break;
546 }
547
548 const struct arch_to_arch_name* a_to_an;
549 for (a_to_an = all_architectures;
550 a_to_an->arch != aarch64_no_arch;
551 a_to_an++)
552 {
553 if (a_to_an->arch == p_to_a->arch)
554 break;
555 }
556
557 /* We couldn't find that proceesor name, or the processor name we
558 found does not map to an architecture we understand. */
559 if (p_to_a->arch == aarch64_no_arch
560 || a_to_an->arch == aarch64_no_arch)
561 fatal_error (input_location, "unknown value %qs for %<-mcpu%>", name);
562
563 unsigned long extensions = p_to_a->flags;
564 aarch64_parse_extension (extension_str.c_str (), &extensions, NULL);
565
566 std::string outstr = a_to_an->arch_name
567 + aarch64_get_extension_string_for_isa_flags (extensions,
568 a_to_an->flags);
569
570 /* We are going to memory leak here, nobody elsewhere
571 in the callchain is going to clean up after us. The alternative is
572 to allocate a static buffer, and assert that it is big enough for our
573 modified string, which seems much worse! */
574 return xstrdup (outstr.c_str ());
575 }
576
577 /* Called by the driver to rewrite a name passed to the -mcpu
578 argument in preparation to be passed to the assembler. The
579 names passed from the commend line will be in ARGV, we want
580 to use the right-most argument, which should be in
581 ARGV[ARGC - 1]. ARGC should always be greater than 0. */
582
583 const char *
aarch64_rewrite_mcpu(int argc,const char ** argv)584 aarch64_rewrite_mcpu (int argc, const char **argv)
585 {
586 gcc_assert (argc);
587 return aarch64_rewrite_selected_cpu (argv[argc - 1]);
588 }
589
590 struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;
591
592 #undef AARCH64_CPU_NAME_LENGTH
593
594