1$AT = '@';
2print <<END
3.text
4	.type _start,${AT}function
5_start:
6
7	pmpyshr2 r4 = r5, r6, 0
8	pmpyshr2.u r4 = r5, r6, 16
9
10	pmpy2.r r4 = r5, r6
11	pmpy2.l r4 = r5, r6
12
13	mix1.r r4 = r5, r6
14	mix2.r r4 = r5, r6
15	mix4.r r4 = r5, r6
16	mix1.l r4 = r5, r6
17	mix2.l r4 = r5, r6
18	mix4.l r4 = r5, r6
19
20	pack2.uss r4 = r5, r6
21	pack2.sss r4 = r5, r6
22	pack4.sss r4 = r5, r6
23
24	unpack1.h r4 = r5, r6
25	unpack2.h r4 = r5, r6
26	unpack4.h r4 = r5, r6
27	unpack1.l r4 = r5, r6
28	unpack2.l r4 = r5, r6
29	unpack4.l r4 = r5, r6
30
31	pmin1.u r4 = r5, r6
32	pmax1.u r4 = r5, r6
33
34	pmin2 r4 = r5, r6
35	pmax2 r4 = r5, r6
36
37	psad1 r4 = r5, r6
38
39	mux1 r4 = r5, ${AT}rev
40	mux1 r4 = r5, ${AT}mix
41	mux1 r4 = r5, ${AT}shuf
42	mux1 r4 = r5, ${AT}alt
43	mux1 r4 = r5, ${AT}brcst
44
45	mux2 r4 = r5, 0
46	mux2 r4 = r5, 0xff
47	mux2 r4 = r5, 0xaa
48
49	pshr2 r4 = r5, r6
50	pshr2 r4 = r5, 0
51	pshr2 r4 = r5, 8
52	pshr2 r4 = r5, 31
53
54	pshr4 r4 = r5, r6
55	pshr4 r4 = r5, 0
56	pshr4 r4 = r5, 8
57	pshr4 r4 = r5, 31
58
59	pshr2.u r4 = r5, r6
60	pshr2.u r4 = r5, 0
61	pshr2.u r4 = r5, 8
62	pshr2.u r4 = r5, 31
63
64	pshr4.u r4 = r5, r6
65	pshr4.u r4 = r5, 0
66	pshr4.u r4 = r5, 8
67	pshr4.u r4 = r5, 31
68
69	shr r4 = r5, r6
70	shr.u r4 = r5, r6
71
72	pshl2 r4 = r5, r6
73	pshl2 r4 = r5, 0
74	pshl2 r4 = r5, 8
75	pshl2 r4 = r5, 31
76
77	pshl4 r4 = r5, r6
78	pshl4 r4 = r5, 0
79	pshl4 r4 = r5, 8
80	pshl4 r4 = r5, 31
81
82	shl r4 = r5, r6
83
84	popcnt r4 = r5
85
86	shrp r4 = r5, r6, 0
87	shrp r4 = r5, r6, 12
88	shrp r4 = r5, r6, 63
89
90	extr r4 = r5, 0, 16
91	extr r4 = r5, 0, 63
92	extr r4 = r5, 10, 40
93
94	extr.u r4 = r5, 0, 16
95	extr.u r4 = r5, 0, 63
96	extr.u r4 = r5, 10, 40
97
98	dep.z r4 = r5, 0, 16
99	dep.z r4 = r5, 0, 63
100	dep.z r4 = r5, 10, 40
101	dep.z r4 = 0, 0, 16
102	dep.z r4 = 127, 0, 63
103	dep.z r4 = -128, 5, 50
104	dep.z r4 = 0x55, 10, 40
105
106	dep r4 = 0, r5, 0, 16
107	dep r4 = -1, r5, 0, 63
108// Insert padding NOPs to force the same template selection as IAS.
109	nop.m 0
110	nop.f 0
111	dep r4 = r5, r6, 10, 7
112
113	movl r4 = 0
114	movl r4 = 0xffffffffffffffff
115	movl r4 = 0x1234567890abcdef
116
117	break.i 0
118	break.i 0x1fffff
119
120	nop.i 0
121	nop.i 0x1fffff
122
123	chk.s.i r4, _start
124
125	mov r4 = b0
126	mov b0 = r4
127
128	mov pr = r4, 0
129	mov pr = r4, 0x1234
130	mov pr = r4, 0x1ffff
131
132	mov pr.rot = 0
133// ??? This was originally 0x3ffffff, but that generates an assembler warning
134// that the testsuite infrastructure isn't set up to ignore.
135	mov pr.rot = 0x3ff0000
136	mov pr.rot = -0x4000000
137
138	zxt1 r4 = r5
139	zxt2 r4 = r5
140	zxt4 r4 = r5
141
142	sxt1 r4 = r5
143	sxt2 r4 = r5
144	sxt4 r4 = r5
145
146	czx1.l r4 = r5
147	czx2.l r4 = r5
148	czx1.r r4 = r5
149	czx2.r r4 = r5
150
151END
152;
153
154@ctype = ( "", ".unc", ".and", ".or", ".or.andcm", ".orcm",
155	   ".andcm", ".and.orcm" );
156
157$i = 0;
158foreach $z ( ".z", ".nz" ) {
159  foreach $c (@ctype) {
160    print "\ttbit${z}${c} p2, p3 = r4, $i\n";
161    ++$i;
162  }
163}
164print "\n";
165
166foreach $z ( ".z", ".nz" ) {
167  foreach $c (@ctype) {
168    print "\ttnat${z}${c} p2, p3 = r4\n";
169  }
170}
171print "\n";
172
173
174@mwh = ( "", ".sptk", ".dptk" );
175@ih = ( "", ".imp" );
176
177$LAB = 1;
178
179foreach $b ("", ".ret") {
180  foreach $w (@mwh) {
181    foreach $i (@ih) {
182      print "\tmov${b}${w}${i} b3 = r4, .L${LAB}\n";
183    }
184    print ".space 240\n";
185    print ".L${LAB}:\n";
186    ++$LAB;
187  }
188  print "\n";
189}
190