1// Code generated from gen/PPC64.rules; DO NOT EDIT.
2// generated with: cd gen; go run *.go
3
4package ssa
5
6import "math"
7import "cmd/internal/objabi"
8import "cmd/compile/internal/types"
9
10func rewriteValuePPC64(v *Value) bool {
11	switch v.Op {
12	case OpAbs:
13		return rewriteValuePPC64_OpAbs_0(v)
14	case OpAdd16:
15		return rewriteValuePPC64_OpAdd16_0(v)
16	case OpAdd32:
17		return rewriteValuePPC64_OpAdd32_0(v)
18	case OpAdd32F:
19		return rewriteValuePPC64_OpAdd32F_0(v)
20	case OpAdd64:
21		return rewriteValuePPC64_OpAdd64_0(v)
22	case OpAdd64F:
23		return rewriteValuePPC64_OpAdd64F_0(v)
24	case OpAdd64carry:
25		return rewriteValuePPC64_OpAdd64carry_0(v)
26	case OpAdd8:
27		return rewriteValuePPC64_OpAdd8_0(v)
28	case OpAddPtr:
29		return rewriteValuePPC64_OpAddPtr_0(v)
30	case OpAddr:
31		return rewriteValuePPC64_OpAddr_0(v)
32	case OpAnd16:
33		return rewriteValuePPC64_OpAnd16_0(v)
34	case OpAnd32:
35		return rewriteValuePPC64_OpAnd32_0(v)
36	case OpAnd64:
37		return rewriteValuePPC64_OpAnd64_0(v)
38	case OpAnd8:
39		return rewriteValuePPC64_OpAnd8_0(v)
40	case OpAndB:
41		return rewriteValuePPC64_OpAndB_0(v)
42	case OpAtomicAdd32:
43		return rewriteValuePPC64_OpAtomicAdd32_0(v)
44	case OpAtomicAdd64:
45		return rewriteValuePPC64_OpAtomicAdd64_0(v)
46	case OpAtomicAnd8:
47		return rewriteValuePPC64_OpAtomicAnd8_0(v)
48	case OpAtomicCompareAndSwap32:
49		return rewriteValuePPC64_OpAtomicCompareAndSwap32_0(v)
50	case OpAtomicCompareAndSwap64:
51		return rewriteValuePPC64_OpAtomicCompareAndSwap64_0(v)
52	case OpAtomicCompareAndSwapRel32:
53		return rewriteValuePPC64_OpAtomicCompareAndSwapRel32_0(v)
54	case OpAtomicExchange32:
55		return rewriteValuePPC64_OpAtomicExchange32_0(v)
56	case OpAtomicExchange64:
57		return rewriteValuePPC64_OpAtomicExchange64_0(v)
58	case OpAtomicLoad32:
59		return rewriteValuePPC64_OpAtomicLoad32_0(v)
60	case OpAtomicLoad64:
61		return rewriteValuePPC64_OpAtomicLoad64_0(v)
62	case OpAtomicLoad8:
63		return rewriteValuePPC64_OpAtomicLoad8_0(v)
64	case OpAtomicLoadAcq32:
65		return rewriteValuePPC64_OpAtomicLoadAcq32_0(v)
66	case OpAtomicLoadPtr:
67		return rewriteValuePPC64_OpAtomicLoadPtr_0(v)
68	case OpAtomicOr8:
69		return rewriteValuePPC64_OpAtomicOr8_0(v)
70	case OpAtomicStore32:
71		return rewriteValuePPC64_OpAtomicStore32_0(v)
72	case OpAtomicStore64:
73		return rewriteValuePPC64_OpAtomicStore64_0(v)
74	case OpAtomicStore8:
75		return rewriteValuePPC64_OpAtomicStore8_0(v)
76	case OpAtomicStoreRel32:
77		return rewriteValuePPC64_OpAtomicStoreRel32_0(v)
78	case OpAvg64u:
79		return rewriteValuePPC64_OpAvg64u_0(v)
80	case OpBitLen32:
81		return rewriteValuePPC64_OpBitLen32_0(v)
82	case OpBitLen64:
83		return rewriteValuePPC64_OpBitLen64_0(v)
84	case OpCeil:
85		return rewriteValuePPC64_OpCeil_0(v)
86	case OpClosureCall:
87		return rewriteValuePPC64_OpClosureCall_0(v)
88	case OpCom16:
89		return rewriteValuePPC64_OpCom16_0(v)
90	case OpCom32:
91		return rewriteValuePPC64_OpCom32_0(v)
92	case OpCom64:
93		return rewriteValuePPC64_OpCom64_0(v)
94	case OpCom8:
95		return rewriteValuePPC64_OpCom8_0(v)
96	case OpCondSelect:
97		return rewriteValuePPC64_OpCondSelect_0(v)
98	case OpConst16:
99		return rewriteValuePPC64_OpConst16_0(v)
100	case OpConst32:
101		return rewriteValuePPC64_OpConst32_0(v)
102	case OpConst32F:
103		return rewriteValuePPC64_OpConst32F_0(v)
104	case OpConst64:
105		return rewriteValuePPC64_OpConst64_0(v)
106	case OpConst64F:
107		return rewriteValuePPC64_OpConst64F_0(v)
108	case OpConst8:
109		return rewriteValuePPC64_OpConst8_0(v)
110	case OpConstBool:
111		return rewriteValuePPC64_OpConstBool_0(v)
112	case OpConstNil:
113		return rewriteValuePPC64_OpConstNil_0(v)
114	case OpCopysign:
115		return rewriteValuePPC64_OpCopysign_0(v)
116	case OpCtz16:
117		return rewriteValuePPC64_OpCtz16_0(v)
118	case OpCtz32:
119		return rewriteValuePPC64_OpCtz32_0(v)
120	case OpCtz32NonZero:
121		return rewriteValuePPC64_OpCtz32NonZero_0(v)
122	case OpCtz64:
123		return rewriteValuePPC64_OpCtz64_0(v)
124	case OpCtz64NonZero:
125		return rewriteValuePPC64_OpCtz64NonZero_0(v)
126	case OpCtz8:
127		return rewriteValuePPC64_OpCtz8_0(v)
128	case OpCvt32Fto32:
129		return rewriteValuePPC64_OpCvt32Fto32_0(v)
130	case OpCvt32Fto64:
131		return rewriteValuePPC64_OpCvt32Fto64_0(v)
132	case OpCvt32Fto64F:
133		return rewriteValuePPC64_OpCvt32Fto64F_0(v)
134	case OpCvt32to32F:
135		return rewriteValuePPC64_OpCvt32to32F_0(v)
136	case OpCvt32to64F:
137		return rewriteValuePPC64_OpCvt32to64F_0(v)
138	case OpCvt64Fto32:
139		return rewriteValuePPC64_OpCvt64Fto32_0(v)
140	case OpCvt64Fto32F:
141		return rewriteValuePPC64_OpCvt64Fto32F_0(v)
142	case OpCvt64Fto64:
143		return rewriteValuePPC64_OpCvt64Fto64_0(v)
144	case OpCvt64to32F:
145		return rewriteValuePPC64_OpCvt64to32F_0(v)
146	case OpCvt64to64F:
147		return rewriteValuePPC64_OpCvt64to64F_0(v)
148	case OpDiv16:
149		return rewriteValuePPC64_OpDiv16_0(v)
150	case OpDiv16u:
151		return rewriteValuePPC64_OpDiv16u_0(v)
152	case OpDiv32:
153		return rewriteValuePPC64_OpDiv32_0(v)
154	case OpDiv32F:
155		return rewriteValuePPC64_OpDiv32F_0(v)
156	case OpDiv32u:
157		return rewriteValuePPC64_OpDiv32u_0(v)
158	case OpDiv64:
159		return rewriteValuePPC64_OpDiv64_0(v)
160	case OpDiv64F:
161		return rewriteValuePPC64_OpDiv64F_0(v)
162	case OpDiv64u:
163		return rewriteValuePPC64_OpDiv64u_0(v)
164	case OpDiv8:
165		return rewriteValuePPC64_OpDiv8_0(v)
166	case OpDiv8u:
167		return rewriteValuePPC64_OpDiv8u_0(v)
168	case OpEq16:
169		return rewriteValuePPC64_OpEq16_0(v)
170	case OpEq32:
171		return rewriteValuePPC64_OpEq32_0(v)
172	case OpEq32F:
173		return rewriteValuePPC64_OpEq32F_0(v)
174	case OpEq64:
175		return rewriteValuePPC64_OpEq64_0(v)
176	case OpEq64F:
177		return rewriteValuePPC64_OpEq64F_0(v)
178	case OpEq8:
179		return rewriteValuePPC64_OpEq8_0(v)
180	case OpEqB:
181		return rewriteValuePPC64_OpEqB_0(v)
182	case OpEqPtr:
183		return rewriteValuePPC64_OpEqPtr_0(v)
184	case OpFMA:
185		return rewriteValuePPC64_OpFMA_0(v)
186	case OpFloor:
187		return rewriteValuePPC64_OpFloor_0(v)
188	case OpGeq16:
189		return rewriteValuePPC64_OpGeq16_0(v)
190	case OpGeq16U:
191		return rewriteValuePPC64_OpGeq16U_0(v)
192	case OpGeq32:
193		return rewriteValuePPC64_OpGeq32_0(v)
194	case OpGeq32F:
195		return rewriteValuePPC64_OpGeq32F_0(v)
196	case OpGeq32U:
197		return rewriteValuePPC64_OpGeq32U_0(v)
198	case OpGeq64:
199		return rewriteValuePPC64_OpGeq64_0(v)
200	case OpGeq64F:
201		return rewriteValuePPC64_OpGeq64F_0(v)
202	case OpGeq64U:
203		return rewriteValuePPC64_OpGeq64U_0(v)
204	case OpGeq8:
205		return rewriteValuePPC64_OpGeq8_0(v)
206	case OpGeq8U:
207		return rewriteValuePPC64_OpGeq8U_0(v)
208	case OpGetCallerPC:
209		return rewriteValuePPC64_OpGetCallerPC_0(v)
210	case OpGetCallerSP:
211		return rewriteValuePPC64_OpGetCallerSP_0(v)
212	case OpGetClosurePtr:
213		return rewriteValuePPC64_OpGetClosurePtr_0(v)
214	case OpGreater16:
215		return rewriteValuePPC64_OpGreater16_0(v)
216	case OpGreater16U:
217		return rewriteValuePPC64_OpGreater16U_0(v)
218	case OpGreater32:
219		return rewriteValuePPC64_OpGreater32_0(v)
220	case OpGreater32F:
221		return rewriteValuePPC64_OpGreater32F_0(v)
222	case OpGreater32U:
223		return rewriteValuePPC64_OpGreater32U_0(v)
224	case OpGreater64:
225		return rewriteValuePPC64_OpGreater64_0(v)
226	case OpGreater64F:
227		return rewriteValuePPC64_OpGreater64F_0(v)
228	case OpGreater64U:
229		return rewriteValuePPC64_OpGreater64U_0(v)
230	case OpGreater8:
231		return rewriteValuePPC64_OpGreater8_0(v)
232	case OpGreater8U:
233		return rewriteValuePPC64_OpGreater8U_0(v)
234	case OpHmul32:
235		return rewriteValuePPC64_OpHmul32_0(v)
236	case OpHmul32u:
237		return rewriteValuePPC64_OpHmul32u_0(v)
238	case OpHmul64:
239		return rewriteValuePPC64_OpHmul64_0(v)
240	case OpHmul64u:
241		return rewriteValuePPC64_OpHmul64u_0(v)
242	case OpInterCall:
243		return rewriteValuePPC64_OpInterCall_0(v)
244	case OpIsInBounds:
245		return rewriteValuePPC64_OpIsInBounds_0(v)
246	case OpIsNonNil:
247		return rewriteValuePPC64_OpIsNonNil_0(v)
248	case OpIsSliceInBounds:
249		return rewriteValuePPC64_OpIsSliceInBounds_0(v)
250	case OpLeq16:
251		return rewriteValuePPC64_OpLeq16_0(v)
252	case OpLeq16U:
253		return rewriteValuePPC64_OpLeq16U_0(v)
254	case OpLeq32:
255		return rewriteValuePPC64_OpLeq32_0(v)
256	case OpLeq32F:
257		return rewriteValuePPC64_OpLeq32F_0(v)
258	case OpLeq32U:
259		return rewriteValuePPC64_OpLeq32U_0(v)
260	case OpLeq64:
261		return rewriteValuePPC64_OpLeq64_0(v)
262	case OpLeq64F:
263		return rewriteValuePPC64_OpLeq64F_0(v)
264	case OpLeq64U:
265		return rewriteValuePPC64_OpLeq64U_0(v)
266	case OpLeq8:
267		return rewriteValuePPC64_OpLeq8_0(v)
268	case OpLeq8U:
269		return rewriteValuePPC64_OpLeq8U_0(v)
270	case OpLess16:
271		return rewriteValuePPC64_OpLess16_0(v)
272	case OpLess16U:
273		return rewriteValuePPC64_OpLess16U_0(v)
274	case OpLess32:
275		return rewriteValuePPC64_OpLess32_0(v)
276	case OpLess32F:
277		return rewriteValuePPC64_OpLess32F_0(v)
278	case OpLess32U:
279		return rewriteValuePPC64_OpLess32U_0(v)
280	case OpLess64:
281		return rewriteValuePPC64_OpLess64_0(v)
282	case OpLess64F:
283		return rewriteValuePPC64_OpLess64F_0(v)
284	case OpLess64U:
285		return rewriteValuePPC64_OpLess64U_0(v)
286	case OpLess8:
287		return rewriteValuePPC64_OpLess8_0(v)
288	case OpLess8U:
289		return rewriteValuePPC64_OpLess8U_0(v)
290	case OpLoad:
291		return rewriteValuePPC64_OpLoad_0(v)
292	case OpLocalAddr:
293		return rewriteValuePPC64_OpLocalAddr_0(v)
294	case OpLsh16x16:
295		return rewriteValuePPC64_OpLsh16x16_0(v)
296	case OpLsh16x32:
297		return rewriteValuePPC64_OpLsh16x32_0(v)
298	case OpLsh16x64:
299		return rewriteValuePPC64_OpLsh16x64_0(v)
300	case OpLsh16x8:
301		return rewriteValuePPC64_OpLsh16x8_0(v)
302	case OpLsh32x16:
303		return rewriteValuePPC64_OpLsh32x16_0(v)
304	case OpLsh32x32:
305		return rewriteValuePPC64_OpLsh32x32_0(v)
306	case OpLsh32x64:
307		return rewriteValuePPC64_OpLsh32x64_0(v)
308	case OpLsh32x8:
309		return rewriteValuePPC64_OpLsh32x8_0(v)
310	case OpLsh64x16:
311		return rewriteValuePPC64_OpLsh64x16_0(v)
312	case OpLsh64x32:
313		return rewriteValuePPC64_OpLsh64x32_0(v)
314	case OpLsh64x64:
315		return rewriteValuePPC64_OpLsh64x64_0(v)
316	case OpLsh64x8:
317		return rewriteValuePPC64_OpLsh64x8_0(v)
318	case OpLsh8x16:
319		return rewriteValuePPC64_OpLsh8x16_0(v)
320	case OpLsh8x32:
321		return rewriteValuePPC64_OpLsh8x32_0(v)
322	case OpLsh8x64:
323		return rewriteValuePPC64_OpLsh8x64_0(v)
324	case OpLsh8x8:
325		return rewriteValuePPC64_OpLsh8x8_0(v)
326	case OpMod16:
327		return rewriteValuePPC64_OpMod16_0(v)
328	case OpMod16u:
329		return rewriteValuePPC64_OpMod16u_0(v)
330	case OpMod32:
331		return rewriteValuePPC64_OpMod32_0(v)
332	case OpMod32u:
333		return rewriteValuePPC64_OpMod32u_0(v)
334	case OpMod64:
335		return rewriteValuePPC64_OpMod64_0(v)
336	case OpMod64u:
337		return rewriteValuePPC64_OpMod64u_0(v)
338	case OpMod8:
339		return rewriteValuePPC64_OpMod8_0(v)
340	case OpMod8u:
341		return rewriteValuePPC64_OpMod8u_0(v)
342	case OpMove:
343		return rewriteValuePPC64_OpMove_0(v) || rewriteValuePPC64_OpMove_10(v)
344	case OpMul16:
345		return rewriteValuePPC64_OpMul16_0(v)
346	case OpMul32:
347		return rewriteValuePPC64_OpMul32_0(v)
348	case OpMul32F:
349		return rewriteValuePPC64_OpMul32F_0(v)
350	case OpMul64:
351		return rewriteValuePPC64_OpMul64_0(v)
352	case OpMul64F:
353		return rewriteValuePPC64_OpMul64F_0(v)
354	case OpMul64uhilo:
355		return rewriteValuePPC64_OpMul64uhilo_0(v)
356	case OpMul8:
357		return rewriteValuePPC64_OpMul8_0(v)
358	case OpNeg16:
359		return rewriteValuePPC64_OpNeg16_0(v)
360	case OpNeg32:
361		return rewriteValuePPC64_OpNeg32_0(v)
362	case OpNeg32F:
363		return rewriteValuePPC64_OpNeg32F_0(v)
364	case OpNeg64:
365		return rewriteValuePPC64_OpNeg64_0(v)
366	case OpNeg64F:
367		return rewriteValuePPC64_OpNeg64F_0(v)
368	case OpNeg8:
369		return rewriteValuePPC64_OpNeg8_0(v)
370	case OpNeq16:
371		return rewriteValuePPC64_OpNeq16_0(v)
372	case OpNeq32:
373		return rewriteValuePPC64_OpNeq32_0(v)
374	case OpNeq32F:
375		return rewriteValuePPC64_OpNeq32F_0(v)
376	case OpNeq64:
377		return rewriteValuePPC64_OpNeq64_0(v)
378	case OpNeq64F:
379		return rewriteValuePPC64_OpNeq64F_0(v)
380	case OpNeq8:
381		return rewriteValuePPC64_OpNeq8_0(v)
382	case OpNeqB:
383		return rewriteValuePPC64_OpNeqB_0(v)
384	case OpNeqPtr:
385		return rewriteValuePPC64_OpNeqPtr_0(v)
386	case OpNilCheck:
387		return rewriteValuePPC64_OpNilCheck_0(v)
388	case OpNot:
389		return rewriteValuePPC64_OpNot_0(v)
390	case OpOffPtr:
391		return rewriteValuePPC64_OpOffPtr_0(v)
392	case OpOr16:
393		return rewriteValuePPC64_OpOr16_0(v)
394	case OpOr32:
395		return rewriteValuePPC64_OpOr32_0(v)
396	case OpOr64:
397		return rewriteValuePPC64_OpOr64_0(v)
398	case OpOr8:
399		return rewriteValuePPC64_OpOr8_0(v)
400	case OpOrB:
401		return rewriteValuePPC64_OpOrB_0(v)
402	case OpPPC64ADD:
403		return rewriteValuePPC64_OpPPC64ADD_0(v)
404	case OpPPC64ADDconst:
405		return rewriteValuePPC64_OpPPC64ADDconst_0(v)
406	case OpPPC64AND:
407		return rewriteValuePPC64_OpPPC64AND_0(v) || rewriteValuePPC64_OpPPC64AND_10(v)
408	case OpPPC64ANDconst:
409		return rewriteValuePPC64_OpPPC64ANDconst_0(v) || rewriteValuePPC64_OpPPC64ANDconst_10(v)
410	case OpPPC64CMP:
411		return rewriteValuePPC64_OpPPC64CMP_0(v)
412	case OpPPC64CMPU:
413		return rewriteValuePPC64_OpPPC64CMPU_0(v)
414	case OpPPC64CMPUconst:
415		return rewriteValuePPC64_OpPPC64CMPUconst_0(v)
416	case OpPPC64CMPW:
417		return rewriteValuePPC64_OpPPC64CMPW_0(v)
418	case OpPPC64CMPWU:
419		return rewriteValuePPC64_OpPPC64CMPWU_0(v)
420	case OpPPC64CMPWUconst:
421		return rewriteValuePPC64_OpPPC64CMPWUconst_0(v)
422	case OpPPC64CMPWconst:
423		return rewriteValuePPC64_OpPPC64CMPWconst_0(v)
424	case OpPPC64CMPconst:
425		return rewriteValuePPC64_OpPPC64CMPconst_0(v)
426	case OpPPC64Equal:
427		return rewriteValuePPC64_OpPPC64Equal_0(v)
428	case OpPPC64FABS:
429		return rewriteValuePPC64_OpPPC64FABS_0(v)
430	case OpPPC64FADD:
431		return rewriteValuePPC64_OpPPC64FADD_0(v)
432	case OpPPC64FADDS:
433		return rewriteValuePPC64_OpPPC64FADDS_0(v)
434	case OpPPC64FCEIL:
435		return rewriteValuePPC64_OpPPC64FCEIL_0(v)
436	case OpPPC64FFLOOR:
437		return rewriteValuePPC64_OpPPC64FFLOOR_0(v)
438	case OpPPC64FGreaterEqual:
439		return rewriteValuePPC64_OpPPC64FGreaterEqual_0(v)
440	case OpPPC64FGreaterThan:
441		return rewriteValuePPC64_OpPPC64FGreaterThan_0(v)
442	case OpPPC64FLessEqual:
443		return rewriteValuePPC64_OpPPC64FLessEqual_0(v)
444	case OpPPC64FLessThan:
445		return rewriteValuePPC64_OpPPC64FLessThan_0(v)
446	case OpPPC64FMOVDload:
447		return rewriteValuePPC64_OpPPC64FMOVDload_0(v)
448	case OpPPC64FMOVDstore:
449		return rewriteValuePPC64_OpPPC64FMOVDstore_0(v)
450	case OpPPC64FMOVSload:
451		return rewriteValuePPC64_OpPPC64FMOVSload_0(v)
452	case OpPPC64FMOVSstore:
453		return rewriteValuePPC64_OpPPC64FMOVSstore_0(v)
454	case OpPPC64FNEG:
455		return rewriteValuePPC64_OpPPC64FNEG_0(v)
456	case OpPPC64FSQRT:
457		return rewriteValuePPC64_OpPPC64FSQRT_0(v)
458	case OpPPC64FSUB:
459		return rewriteValuePPC64_OpPPC64FSUB_0(v)
460	case OpPPC64FSUBS:
461		return rewriteValuePPC64_OpPPC64FSUBS_0(v)
462	case OpPPC64FTRUNC:
463		return rewriteValuePPC64_OpPPC64FTRUNC_0(v)
464	case OpPPC64GreaterEqual:
465		return rewriteValuePPC64_OpPPC64GreaterEqual_0(v)
466	case OpPPC64GreaterThan:
467		return rewriteValuePPC64_OpPPC64GreaterThan_0(v)
468	case OpPPC64ISEL:
469		return rewriteValuePPC64_OpPPC64ISEL_0(v) || rewriteValuePPC64_OpPPC64ISEL_10(v) || rewriteValuePPC64_OpPPC64ISEL_20(v)
470	case OpPPC64ISELB:
471		return rewriteValuePPC64_OpPPC64ISELB_0(v) || rewriteValuePPC64_OpPPC64ISELB_10(v) || rewriteValuePPC64_OpPPC64ISELB_20(v)
472	case OpPPC64LessEqual:
473		return rewriteValuePPC64_OpPPC64LessEqual_0(v)
474	case OpPPC64LessThan:
475		return rewriteValuePPC64_OpPPC64LessThan_0(v)
476	case OpPPC64MFVSRD:
477		return rewriteValuePPC64_OpPPC64MFVSRD_0(v)
478	case OpPPC64MOVBZload:
479		return rewriteValuePPC64_OpPPC64MOVBZload_0(v)
480	case OpPPC64MOVBZloadidx:
481		return rewriteValuePPC64_OpPPC64MOVBZloadidx_0(v)
482	case OpPPC64MOVBZreg:
483		return rewriteValuePPC64_OpPPC64MOVBZreg_0(v) || rewriteValuePPC64_OpPPC64MOVBZreg_10(v)
484	case OpPPC64MOVBreg:
485		return rewriteValuePPC64_OpPPC64MOVBreg_0(v) || rewriteValuePPC64_OpPPC64MOVBreg_10(v)
486	case OpPPC64MOVBstore:
487		return rewriteValuePPC64_OpPPC64MOVBstore_0(v) || rewriteValuePPC64_OpPPC64MOVBstore_10(v) || rewriteValuePPC64_OpPPC64MOVBstore_20(v)
488	case OpPPC64MOVBstoreidx:
489		return rewriteValuePPC64_OpPPC64MOVBstoreidx_0(v) || rewriteValuePPC64_OpPPC64MOVBstoreidx_10(v)
490	case OpPPC64MOVBstorezero:
491		return rewriteValuePPC64_OpPPC64MOVBstorezero_0(v)
492	case OpPPC64MOVDload:
493		return rewriteValuePPC64_OpPPC64MOVDload_0(v)
494	case OpPPC64MOVDloadidx:
495		return rewriteValuePPC64_OpPPC64MOVDloadidx_0(v)
496	case OpPPC64MOVDstore:
497		return rewriteValuePPC64_OpPPC64MOVDstore_0(v)
498	case OpPPC64MOVDstoreidx:
499		return rewriteValuePPC64_OpPPC64MOVDstoreidx_0(v)
500	case OpPPC64MOVDstorezero:
501		return rewriteValuePPC64_OpPPC64MOVDstorezero_0(v)
502	case OpPPC64MOVHBRstore:
503		return rewriteValuePPC64_OpPPC64MOVHBRstore_0(v)
504	case OpPPC64MOVHZload:
505		return rewriteValuePPC64_OpPPC64MOVHZload_0(v)
506	case OpPPC64MOVHZloadidx:
507		return rewriteValuePPC64_OpPPC64MOVHZloadidx_0(v)
508	case OpPPC64MOVHZreg:
509		return rewriteValuePPC64_OpPPC64MOVHZreg_0(v) || rewriteValuePPC64_OpPPC64MOVHZreg_10(v)
510	case OpPPC64MOVHload:
511		return rewriteValuePPC64_OpPPC64MOVHload_0(v)
512	case OpPPC64MOVHloadidx:
513		return rewriteValuePPC64_OpPPC64MOVHloadidx_0(v)
514	case OpPPC64MOVHreg:
515		return rewriteValuePPC64_OpPPC64MOVHreg_0(v) || rewriteValuePPC64_OpPPC64MOVHreg_10(v)
516	case OpPPC64MOVHstore:
517		return rewriteValuePPC64_OpPPC64MOVHstore_0(v)
518	case OpPPC64MOVHstoreidx:
519		return rewriteValuePPC64_OpPPC64MOVHstoreidx_0(v)
520	case OpPPC64MOVHstorezero:
521		return rewriteValuePPC64_OpPPC64MOVHstorezero_0(v)
522	case OpPPC64MOVWBRstore:
523		return rewriteValuePPC64_OpPPC64MOVWBRstore_0(v)
524	case OpPPC64MOVWZload:
525		return rewriteValuePPC64_OpPPC64MOVWZload_0(v)
526	case OpPPC64MOVWZloadidx:
527		return rewriteValuePPC64_OpPPC64MOVWZloadidx_0(v)
528	case OpPPC64MOVWZreg:
529		return rewriteValuePPC64_OpPPC64MOVWZreg_0(v) || rewriteValuePPC64_OpPPC64MOVWZreg_10(v) || rewriteValuePPC64_OpPPC64MOVWZreg_20(v)
530	case OpPPC64MOVWload:
531		return rewriteValuePPC64_OpPPC64MOVWload_0(v)
532	case OpPPC64MOVWloadidx:
533		return rewriteValuePPC64_OpPPC64MOVWloadidx_0(v)
534	case OpPPC64MOVWreg:
535		return rewriteValuePPC64_OpPPC64MOVWreg_0(v) || rewriteValuePPC64_OpPPC64MOVWreg_10(v)
536	case OpPPC64MOVWstore:
537		return rewriteValuePPC64_OpPPC64MOVWstore_0(v)
538	case OpPPC64MOVWstoreidx:
539		return rewriteValuePPC64_OpPPC64MOVWstoreidx_0(v)
540	case OpPPC64MOVWstorezero:
541		return rewriteValuePPC64_OpPPC64MOVWstorezero_0(v)
542	case OpPPC64MTVSRD:
543		return rewriteValuePPC64_OpPPC64MTVSRD_0(v)
544	case OpPPC64MaskIfNotCarry:
545		return rewriteValuePPC64_OpPPC64MaskIfNotCarry_0(v)
546	case OpPPC64NotEqual:
547		return rewriteValuePPC64_OpPPC64NotEqual_0(v)
548	case OpPPC64OR:
549		return rewriteValuePPC64_OpPPC64OR_0(v) || rewriteValuePPC64_OpPPC64OR_10(v) || rewriteValuePPC64_OpPPC64OR_20(v) || rewriteValuePPC64_OpPPC64OR_30(v) || rewriteValuePPC64_OpPPC64OR_40(v) || rewriteValuePPC64_OpPPC64OR_50(v) || rewriteValuePPC64_OpPPC64OR_60(v) || rewriteValuePPC64_OpPPC64OR_70(v) || rewriteValuePPC64_OpPPC64OR_80(v) || rewriteValuePPC64_OpPPC64OR_90(v) || rewriteValuePPC64_OpPPC64OR_100(v) || rewriteValuePPC64_OpPPC64OR_110(v)
550	case OpPPC64ORN:
551		return rewriteValuePPC64_OpPPC64ORN_0(v)
552	case OpPPC64ORconst:
553		return rewriteValuePPC64_OpPPC64ORconst_0(v)
554	case OpPPC64ROTL:
555		return rewriteValuePPC64_OpPPC64ROTL_0(v)
556	case OpPPC64ROTLW:
557		return rewriteValuePPC64_OpPPC64ROTLW_0(v)
558	case OpPPC64SUB:
559		return rewriteValuePPC64_OpPPC64SUB_0(v)
560	case OpPPC64XOR:
561		return rewriteValuePPC64_OpPPC64XOR_0(v) || rewriteValuePPC64_OpPPC64XOR_10(v)
562	case OpPPC64XORconst:
563		return rewriteValuePPC64_OpPPC64XORconst_0(v)
564	case OpPanicBounds:
565		return rewriteValuePPC64_OpPanicBounds_0(v)
566	case OpPopCount16:
567		return rewriteValuePPC64_OpPopCount16_0(v)
568	case OpPopCount32:
569		return rewriteValuePPC64_OpPopCount32_0(v)
570	case OpPopCount64:
571		return rewriteValuePPC64_OpPopCount64_0(v)
572	case OpPopCount8:
573		return rewriteValuePPC64_OpPopCount8_0(v)
574	case OpRotateLeft16:
575		return rewriteValuePPC64_OpRotateLeft16_0(v)
576	case OpRotateLeft32:
577		return rewriteValuePPC64_OpRotateLeft32_0(v)
578	case OpRotateLeft64:
579		return rewriteValuePPC64_OpRotateLeft64_0(v)
580	case OpRotateLeft8:
581		return rewriteValuePPC64_OpRotateLeft8_0(v)
582	case OpRound:
583		return rewriteValuePPC64_OpRound_0(v)
584	case OpRound32F:
585		return rewriteValuePPC64_OpRound32F_0(v)
586	case OpRound64F:
587		return rewriteValuePPC64_OpRound64F_0(v)
588	case OpRsh16Ux16:
589		return rewriteValuePPC64_OpRsh16Ux16_0(v)
590	case OpRsh16Ux32:
591		return rewriteValuePPC64_OpRsh16Ux32_0(v)
592	case OpRsh16Ux64:
593		return rewriteValuePPC64_OpRsh16Ux64_0(v)
594	case OpRsh16Ux8:
595		return rewriteValuePPC64_OpRsh16Ux8_0(v)
596	case OpRsh16x16:
597		return rewriteValuePPC64_OpRsh16x16_0(v)
598	case OpRsh16x32:
599		return rewriteValuePPC64_OpRsh16x32_0(v)
600	case OpRsh16x64:
601		return rewriteValuePPC64_OpRsh16x64_0(v)
602	case OpRsh16x8:
603		return rewriteValuePPC64_OpRsh16x8_0(v)
604	case OpRsh32Ux16:
605		return rewriteValuePPC64_OpRsh32Ux16_0(v)
606	case OpRsh32Ux32:
607		return rewriteValuePPC64_OpRsh32Ux32_0(v)
608	case OpRsh32Ux64:
609		return rewriteValuePPC64_OpRsh32Ux64_0(v) || rewriteValuePPC64_OpRsh32Ux64_10(v)
610	case OpRsh32Ux8:
611		return rewriteValuePPC64_OpRsh32Ux8_0(v)
612	case OpRsh32x16:
613		return rewriteValuePPC64_OpRsh32x16_0(v)
614	case OpRsh32x32:
615		return rewriteValuePPC64_OpRsh32x32_0(v)
616	case OpRsh32x64:
617		return rewriteValuePPC64_OpRsh32x64_0(v) || rewriteValuePPC64_OpRsh32x64_10(v)
618	case OpRsh32x8:
619		return rewriteValuePPC64_OpRsh32x8_0(v)
620	case OpRsh64Ux16:
621		return rewriteValuePPC64_OpRsh64Ux16_0(v)
622	case OpRsh64Ux32:
623		return rewriteValuePPC64_OpRsh64Ux32_0(v)
624	case OpRsh64Ux64:
625		return rewriteValuePPC64_OpRsh64Ux64_0(v) || rewriteValuePPC64_OpRsh64Ux64_10(v)
626	case OpRsh64Ux8:
627		return rewriteValuePPC64_OpRsh64Ux8_0(v)
628	case OpRsh64x16:
629		return rewriteValuePPC64_OpRsh64x16_0(v)
630	case OpRsh64x32:
631		return rewriteValuePPC64_OpRsh64x32_0(v)
632	case OpRsh64x64:
633		return rewriteValuePPC64_OpRsh64x64_0(v) || rewriteValuePPC64_OpRsh64x64_10(v)
634	case OpRsh64x8:
635		return rewriteValuePPC64_OpRsh64x8_0(v)
636	case OpRsh8Ux16:
637		return rewriteValuePPC64_OpRsh8Ux16_0(v)
638	case OpRsh8Ux32:
639		return rewriteValuePPC64_OpRsh8Ux32_0(v)
640	case OpRsh8Ux64:
641		return rewriteValuePPC64_OpRsh8Ux64_0(v)
642	case OpRsh8Ux8:
643		return rewriteValuePPC64_OpRsh8Ux8_0(v)
644	case OpRsh8x16:
645		return rewriteValuePPC64_OpRsh8x16_0(v)
646	case OpRsh8x32:
647		return rewriteValuePPC64_OpRsh8x32_0(v)
648	case OpRsh8x64:
649		return rewriteValuePPC64_OpRsh8x64_0(v)
650	case OpRsh8x8:
651		return rewriteValuePPC64_OpRsh8x8_0(v)
652	case OpSignExt16to32:
653		return rewriteValuePPC64_OpSignExt16to32_0(v)
654	case OpSignExt16to64:
655		return rewriteValuePPC64_OpSignExt16to64_0(v)
656	case OpSignExt32to64:
657		return rewriteValuePPC64_OpSignExt32to64_0(v)
658	case OpSignExt8to16:
659		return rewriteValuePPC64_OpSignExt8to16_0(v)
660	case OpSignExt8to32:
661		return rewriteValuePPC64_OpSignExt8to32_0(v)
662	case OpSignExt8to64:
663		return rewriteValuePPC64_OpSignExt8to64_0(v)
664	case OpSlicemask:
665		return rewriteValuePPC64_OpSlicemask_0(v)
666	case OpSqrt:
667		return rewriteValuePPC64_OpSqrt_0(v)
668	case OpStaticCall:
669		return rewriteValuePPC64_OpStaticCall_0(v)
670	case OpStore:
671		return rewriteValuePPC64_OpStore_0(v)
672	case OpSub16:
673		return rewriteValuePPC64_OpSub16_0(v)
674	case OpSub32:
675		return rewriteValuePPC64_OpSub32_0(v)
676	case OpSub32F:
677		return rewriteValuePPC64_OpSub32F_0(v)
678	case OpSub64:
679		return rewriteValuePPC64_OpSub64_0(v)
680	case OpSub64F:
681		return rewriteValuePPC64_OpSub64F_0(v)
682	case OpSub8:
683		return rewriteValuePPC64_OpSub8_0(v)
684	case OpSubPtr:
685		return rewriteValuePPC64_OpSubPtr_0(v)
686	case OpTrunc:
687		return rewriteValuePPC64_OpTrunc_0(v)
688	case OpTrunc16to8:
689		return rewriteValuePPC64_OpTrunc16to8_0(v)
690	case OpTrunc32to16:
691		return rewriteValuePPC64_OpTrunc32to16_0(v)
692	case OpTrunc32to8:
693		return rewriteValuePPC64_OpTrunc32to8_0(v)
694	case OpTrunc64to16:
695		return rewriteValuePPC64_OpTrunc64to16_0(v)
696	case OpTrunc64to32:
697		return rewriteValuePPC64_OpTrunc64to32_0(v)
698	case OpTrunc64to8:
699		return rewriteValuePPC64_OpTrunc64to8_0(v)
700	case OpWB:
701		return rewriteValuePPC64_OpWB_0(v)
702	case OpXor16:
703		return rewriteValuePPC64_OpXor16_0(v)
704	case OpXor32:
705		return rewriteValuePPC64_OpXor32_0(v)
706	case OpXor64:
707		return rewriteValuePPC64_OpXor64_0(v)
708	case OpXor8:
709		return rewriteValuePPC64_OpXor8_0(v)
710	case OpZero:
711		return rewriteValuePPC64_OpZero_0(v) || rewriteValuePPC64_OpZero_10(v)
712	case OpZeroExt16to32:
713		return rewriteValuePPC64_OpZeroExt16to32_0(v)
714	case OpZeroExt16to64:
715		return rewriteValuePPC64_OpZeroExt16to64_0(v)
716	case OpZeroExt32to64:
717		return rewriteValuePPC64_OpZeroExt32to64_0(v)
718	case OpZeroExt8to16:
719		return rewriteValuePPC64_OpZeroExt8to16_0(v)
720	case OpZeroExt8to32:
721		return rewriteValuePPC64_OpZeroExt8to32_0(v)
722	case OpZeroExt8to64:
723		return rewriteValuePPC64_OpZeroExt8to64_0(v)
724	}
725	return false
726}
727func rewriteValuePPC64_OpAbs_0(v *Value) bool {
728	// match: (Abs x)
729	// result: (FABS x)
730	for {
731		x := v.Args[0]
732		v.reset(OpPPC64FABS)
733		v.AddArg(x)
734		return true
735	}
736}
737func rewriteValuePPC64_OpAdd16_0(v *Value) bool {
738	// match: (Add16 x y)
739	// result: (ADD x y)
740	for {
741		y := v.Args[1]
742		x := v.Args[0]
743		v.reset(OpPPC64ADD)
744		v.AddArg(x)
745		v.AddArg(y)
746		return true
747	}
748}
749func rewriteValuePPC64_OpAdd32_0(v *Value) bool {
750	// match: (Add32 x y)
751	// result: (ADD x y)
752	for {
753		y := v.Args[1]
754		x := v.Args[0]
755		v.reset(OpPPC64ADD)
756		v.AddArg(x)
757		v.AddArg(y)
758		return true
759	}
760}
761func rewriteValuePPC64_OpAdd32F_0(v *Value) bool {
762	// match: (Add32F x y)
763	// result: (FADDS x y)
764	for {
765		y := v.Args[1]
766		x := v.Args[0]
767		v.reset(OpPPC64FADDS)
768		v.AddArg(x)
769		v.AddArg(y)
770		return true
771	}
772}
773func rewriteValuePPC64_OpAdd64_0(v *Value) bool {
774	// match: (Add64 x y)
775	// result: (ADD x y)
776	for {
777		y := v.Args[1]
778		x := v.Args[0]
779		v.reset(OpPPC64ADD)
780		v.AddArg(x)
781		v.AddArg(y)
782		return true
783	}
784}
785func rewriteValuePPC64_OpAdd64F_0(v *Value) bool {
786	// match: (Add64F x y)
787	// result: (FADD x y)
788	for {
789		y := v.Args[1]
790		x := v.Args[0]
791		v.reset(OpPPC64FADD)
792		v.AddArg(x)
793		v.AddArg(y)
794		return true
795	}
796}
797func rewriteValuePPC64_OpAdd64carry_0(v *Value) bool {
798	// match: (Add64carry x y c)
799	// result: (LoweredAdd64Carry x y c)
800	for {
801		c := v.Args[2]
802		x := v.Args[0]
803		y := v.Args[1]
804		v.reset(OpPPC64LoweredAdd64Carry)
805		v.AddArg(x)
806		v.AddArg(y)
807		v.AddArg(c)
808		return true
809	}
810}
811func rewriteValuePPC64_OpAdd8_0(v *Value) bool {
812	// match: (Add8 x y)
813	// result: (ADD x y)
814	for {
815		y := v.Args[1]
816		x := v.Args[0]
817		v.reset(OpPPC64ADD)
818		v.AddArg(x)
819		v.AddArg(y)
820		return true
821	}
822}
823func rewriteValuePPC64_OpAddPtr_0(v *Value) bool {
824	// match: (AddPtr x y)
825	// result: (ADD x y)
826	for {
827		y := v.Args[1]
828		x := v.Args[0]
829		v.reset(OpPPC64ADD)
830		v.AddArg(x)
831		v.AddArg(y)
832		return true
833	}
834}
835func rewriteValuePPC64_OpAddr_0(v *Value) bool {
836	// match: (Addr {sym} base)
837	// result: (MOVDaddr {sym} base)
838	for {
839		sym := v.Aux
840		base := v.Args[0]
841		v.reset(OpPPC64MOVDaddr)
842		v.Aux = sym
843		v.AddArg(base)
844		return true
845	}
846}
847func rewriteValuePPC64_OpAnd16_0(v *Value) bool {
848	// match: (And16 x y)
849	// result: (AND x y)
850	for {
851		y := v.Args[1]
852		x := v.Args[0]
853		v.reset(OpPPC64AND)
854		v.AddArg(x)
855		v.AddArg(y)
856		return true
857	}
858}
859func rewriteValuePPC64_OpAnd32_0(v *Value) bool {
860	// match: (And32 x y)
861	// result: (AND x y)
862	for {
863		y := v.Args[1]
864		x := v.Args[0]
865		v.reset(OpPPC64AND)
866		v.AddArg(x)
867		v.AddArg(y)
868		return true
869	}
870}
871func rewriteValuePPC64_OpAnd64_0(v *Value) bool {
872	// match: (And64 x y)
873	// result: (AND x y)
874	for {
875		y := v.Args[1]
876		x := v.Args[0]
877		v.reset(OpPPC64AND)
878		v.AddArg(x)
879		v.AddArg(y)
880		return true
881	}
882}
883func rewriteValuePPC64_OpAnd8_0(v *Value) bool {
884	// match: (And8 x y)
885	// result: (AND x y)
886	for {
887		y := v.Args[1]
888		x := v.Args[0]
889		v.reset(OpPPC64AND)
890		v.AddArg(x)
891		v.AddArg(y)
892		return true
893	}
894}
895func rewriteValuePPC64_OpAndB_0(v *Value) bool {
896	// match: (AndB x y)
897	// result: (AND x y)
898	for {
899		y := v.Args[1]
900		x := v.Args[0]
901		v.reset(OpPPC64AND)
902		v.AddArg(x)
903		v.AddArg(y)
904		return true
905	}
906}
907func rewriteValuePPC64_OpAtomicAdd32_0(v *Value) bool {
908	// match: (AtomicAdd32 ptr val mem)
909	// result: (LoweredAtomicAdd32 ptr val mem)
910	for {
911		mem := v.Args[2]
912		ptr := v.Args[0]
913		val := v.Args[1]
914		v.reset(OpPPC64LoweredAtomicAdd32)
915		v.AddArg(ptr)
916		v.AddArg(val)
917		v.AddArg(mem)
918		return true
919	}
920}
921func rewriteValuePPC64_OpAtomicAdd64_0(v *Value) bool {
922	// match: (AtomicAdd64 ptr val mem)
923	// result: (LoweredAtomicAdd64 ptr val mem)
924	for {
925		mem := v.Args[2]
926		ptr := v.Args[0]
927		val := v.Args[1]
928		v.reset(OpPPC64LoweredAtomicAdd64)
929		v.AddArg(ptr)
930		v.AddArg(val)
931		v.AddArg(mem)
932		return true
933	}
934}
935func rewriteValuePPC64_OpAtomicAnd8_0(v *Value) bool {
936	// match: (AtomicAnd8 ptr val mem)
937	// result: (LoweredAtomicAnd8 ptr val mem)
938	for {
939		mem := v.Args[2]
940		ptr := v.Args[0]
941		val := v.Args[1]
942		v.reset(OpPPC64LoweredAtomicAnd8)
943		v.AddArg(ptr)
944		v.AddArg(val)
945		v.AddArg(mem)
946		return true
947	}
948}
949func rewriteValuePPC64_OpAtomicCompareAndSwap32_0(v *Value) bool {
950	// match: (AtomicCompareAndSwap32 ptr old new_ mem)
951	// result: (LoweredAtomicCas32 [1] ptr old new_ mem)
952	for {
953		mem := v.Args[3]
954		ptr := v.Args[0]
955		old := v.Args[1]
956		new_ := v.Args[2]
957		v.reset(OpPPC64LoweredAtomicCas32)
958		v.AuxInt = 1
959		v.AddArg(ptr)
960		v.AddArg(old)
961		v.AddArg(new_)
962		v.AddArg(mem)
963		return true
964	}
965}
966func rewriteValuePPC64_OpAtomicCompareAndSwap64_0(v *Value) bool {
967	// match: (AtomicCompareAndSwap64 ptr old new_ mem)
968	// result: (LoweredAtomicCas64 [1] ptr old new_ mem)
969	for {
970		mem := v.Args[3]
971		ptr := v.Args[0]
972		old := v.Args[1]
973		new_ := v.Args[2]
974		v.reset(OpPPC64LoweredAtomicCas64)
975		v.AuxInt = 1
976		v.AddArg(ptr)
977		v.AddArg(old)
978		v.AddArg(new_)
979		v.AddArg(mem)
980		return true
981	}
982}
983func rewriteValuePPC64_OpAtomicCompareAndSwapRel32_0(v *Value) bool {
984	// match: (AtomicCompareAndSwapRel32 ptr old new_ mem)
985	// result: (LoweredAtomicCas32 [0] ptr old new_ mem)
986	for {
987		mem := v.Args[3]
988		ptr := v.Args[0]
989		old := v.Args[1]
990		new_ := v.Args[2]
991		v.reset(OpPPC64LoweredAtomicCas32)
992		v.AuxInt = 0
993		v.AddArg(ptr)
994		v.AddArg(old)
995		v.AddArg(new_)
996		v.AddArg(mem)
997		return true
998	}
999}
1000func rewriteValuePPC64_OpAtomicExchange32_0(v *Value) bool {
1001	// match: (AtomicExchange32 ptr val mem)
1002	// result: (LoweredAtomicExchange32 ptr val mem)
1003	for {
1004		mem := v.Args[2]
1005		ptr := v.Args[0]
1006		val := v.Args[1]
1007		v.reset(OpPPC64LoweredAtomicExchange32)
1008		v.AddArg(ptr)
1009		v.AddArg(val)
1010		v.AddArg(mem)
1011		return true
1012	}
1013}
1014func rewriteValuePPC64_OpAtomicExchange64_0(v *Value) bool {
1015	// match: (AtomicExchange64 ptr val mem)
1016	// result: (LoweredAtomicExchange64 ptr val mem)
1017	for {
1018		mem := v.Args[2]
1019		ptr := v.Args[0]
1020		val := v.Args[1]
1021		v.reset(OpPPC64LoweredAtomicExchange64)
1022		v.AddArg(ptr)
1023		v.AddArg(val)
1024		v.AddArg(mem)
1025		return true
1026	}
1027}
1028func rewriteValuePPC64_OpAtomicLoad32_0(v *Value) bool {
1029	// match: (AtomicLoad32 ptr mem)
1030	// result: (LoweredAtomicLoad32 [1] ptr mem)
1031	for {
1032		mem := v.Args[1]
1033		ptr := v.Args[0]
1034		v.reset(OpPPC64LoweredAtomicLoad32)
1035		v.AuxInt = 1
1036		v.AddArg(ptr)
1037		v.AddArg(mem)
1038		return true
1039	}
1040}
1041func rewriteValuePPC64_OpAtomicLoad64_0(v *Value) bool {
1042	// match: (AtomicLoad64 ptr mem)
1043	// result: (LoweredAtomicLoad64 [1] ptr mem)
1044	for {
1045		mem := v.Args[1]
1046		ptr := v.Args[0]
1047		v.reset(OpPPC64LoweredAtomicLoad64)
1048		v.AuxInt = 1
1049		v.AddArg(ptr)
1050		v.AddArg(mem)
1051		return true
1052	}
1053}
1054func rewriteValuePPC64_OpAtomicLoad8_0(v *Value) bool {
1055	// match: (AtomicLoad8 ptr mem)
1056	// result: (LoweredAtomicLoad8 [1] ptr mem)
1057	for {
1058		mem := v.Args[1]
1059		ptr := v.Args[0]
1060		v.reset(OpPPC64LoweredAtomicLoad8)
1061		v.AuxInt = 1
1062		v.AddArg(ptr)
1063		v.AddArg(mem)
1064		return true
1065	}
1066}
1067func rewriteValuePPC64_OpAtomicLoadAcq32_0(v *Value) bool {
1068	// match: (AtomicLoadAcq32 ptr mem)
1069	// result: (LoweredAtomicLoad32 [0] ptr mem)
1070	for {
1071		mem := v.Args[1]
1072		ptr := v.Args[0]
1073		v.reset(OpPPC64LoweredAtomicLoad32)
1074		v.AuxInt = 0
1075		v.AddArg(ptr)
1076		v.AddArg(mem)
1077		return true
1078	}
1079}
1080func rewriteValuePPC64_OpAtomicLoadPtr_0(v *Value) bool {
1081	// match: (AtomicLoadPtr ptr mem)
1082	// result: (LoweredAtomicLoadPtr [1] ptr mem)
1083	for {
1084		mem := v.Args[1]
1085		ptr := v.Args[0]
1086		v.reset(OpPPC64LoweredAtomicLoadPtr)
1087		v.AuxInt = 1
1088		v.AddArg(ptr)
1089		v.AddArg(mem)
1090		return true
1091	}
1092}
1093func rewriteValuePPC64_OpAtomicOr8_0(v *Value) bool {
1094	// match: (AtomicOr8 ptr val mem)
1095	// result: (LoweredAtomicOr8 ptr val mem)
1096	for {
1097		mem := v.Args[2]
1098		ptr := v.Args[0]
1099		val := v.Args[1]
1100		v.reset(OpPPC64LoweredAtomicOr8)
1101		v.AddArg(ptr)
1102		v.AddArg(val)
1103		v.AddArg(mem)
1104		return true
1105	}
1106}
1107func rewriteValuePPC64_OpAtomicStore32_0(v *Value) bool {
1108	// match: (AtomicStore32 ptr val mem)
1109	// result: (LoweredAtomicStore32 [1] ptr val mem)
1110	for {
1111		mem := v.Args[2]
1112		ptr := v.Args[0]
1113		val := v.Args[1]
1114		v.reset(OpPPC64LoweredAtomicStore32)
1115		v.AuxInt = 1
1116		v.AddArg(ptr)
1117		v.AddArg(val)
1118		v.AddArg(mem)
1119		return true
1120	}
1121}
1122func rewriteValuePPC64_OpAtomicStore64_0(v *Value) bool {
1123	// match: (AtomicStore64 ptr val mem)
1124	// result: (LoweredAtomicStore64 [1] ptr val mem)
1125	for {
1126		mem := v.Args[2]
1127		ptr := v.Args[0]
1128		val := v.Args[1]
1129		v.reset(OpPPC64LoweredAtomicStore64)
1130		v.AuxInt = 1
1131		v.AddArg(ptr)
1132		v.AddArg(val)
1133		v.AddArg(mem)
1134		return true
1135	}
1136}
1137func rewriteValuePPC64_OpAtomicStore8_0(v *Value) bool {
1138	// match: (AtomicStore8 ptr val mem)
1139	// result: (LoweredAtomicStore8 [1] ptr val mem)
1140	for {
1141		mem := v.Args[2]
1142		ptr := v.Args[0]
1143		val := v.Args[1]
1144		v.reset(OpPPC64LoweredAtomicStore8)
1145		v.AuxInt = 1
1146		v.AddArg(ptr)
1147		v.AddArg(val)
1148		v.AddArg(mem)
1149		return true
1150	}
1151}
1152func rewriteValuePPC64_OpAtomicStoreRel32_0(v *Value) bool {
1153	// match: (AtomicStoreRel32 ptr val mem)
1154	// result: (LoweredAtomicStore32 [0] ptr val mem)
1155	for {
1156		mem := v.Args[2]
1157		ptr := v.Args[0]
1158		val := v.Args[1]
1159		v.reset(OpPPC64LoweredAtomicStore32)
1160		v.AuxInt = 0
1161		v.AddArg(ptr)
1162		v.AddArg(val)
1163		v.AddArg(mem)
1164		return true
1165	}
1166}
1167func rewriteValuePPC64_OpAvg64u_0(v *Value) bool {
1168	b := v.Block
1169	// match: (Avg64u <t> x y)
1170	// result: (ADD (SRDconst <t> (SUB <t> x y) [1]) y)
1171	for {
1172		t := v.Type
1173		y := v.Args[1]
1174		x := v.Args[0]
1175		v.reset(OpPPC64ADD)
1176		v0 := b.NewValue0(v.Pos, OpPPC64SRDconst, t)
1177		v0.AuxInt = 1
1178		v1 := b.NewValue0(v.Pos, OpPPC64SUB, t)
1179		v1.AddArg(x)
1180		v1.AddArg(y)
1181		v0.AddArg(v1)
1182		v.AddArg(v0)
1183		v.AddArg(y)
1184		return true
1185	}
1186}
1187func rewriteValuePPC64_OpBitLen32_0(v *Value) bool {
1188	b := v.Block
1189	typ := &b.Func.Config.Types
1190	// match: (BitLen32 x)
1191	// result: (SUB (MOVDconst [32]) (CNTLZW <typ.Int> x))
1192	for {
1193		x := v.Args[0]
1194		v.reset(OpPPC64SUB)
1195		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
1196		v0.AuxInt = 32
1197		v.AddArg(v0)
1198		v1 := b.NewValue0(v.Pos, OpPPC64CNTLZW, typ.Int)
1199		v1.AddArg(x)
1200		v.AddArg(v1)
1201		return true
1202	}
1203}
1204func rewriteValuePPC64_OpBitLen64_0(v *Value) bool {
1205	b := v.Block
1206	typ := &b.Func.Config.Types
1207	// match: (BitLen64 x)
1208	// result: (SUB (MOVDconst [64]) (CNTLZD <typ.Int> x))
1209	for {
1210		x := v.Args[0]
1211		v.reset(OpPPC64SUB)
1212		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
1213		v0.AuxInt = 64
1214		v.AddArg(v0)
1215		v1 := b.NewValue0(v.Pos, OpPPC64CNTLZD, typ.Int)
1216		v1.AddArg(x)
1217		v.AddArg(v1)
1218		return true
1219	}
1220}
1221func rewriteValuePPC64_OpCeil_0(v *Value) bool {
1222	// match: (Ceil x)
1223	// result: (FCEIL x)
1224	for {
1225		x := v.Args[0]
1226		v.reset(OpPPC64FCEIL)
1227		v.AddArg(x)
1228		return true
1229	}
1230}
1231func rewriteValuePPC64_OpClosureCall_0(v *Value) bool {
1232	// match: (ClosureCall [argwid] entry closure mem)
1233	// result: (CALLclosure [argwid] entry closure mem)
1234	for {
1235		argwid := v.AuxInt
1236		mem := v.Args[2]
1237		entry := v.Args[0]
1238		closure := v.Args[1]
1239		v.reset(OpPPC64CALLclosure)
1240		v.AuxInt = argwid
1241		v.AddArg(entry)
1242		v.AddArg(closure)
1243		v.AddArg(mem)
1244		return true
1245	}
1246}
1247func rewriteValuePPC64_OpCom16_0(v *Value) bool {
1248	// match: (Com16 x)
1249	// result: (NOR x x)
1250	for {
1251		x := v.Args[0]
1252		v.reset(OpPPC64NOR)
1253		v.AddArg(x)
1254		v.AddArg(x)
1255		return true
1256	}
1257}
1258func rewriteValuePPC64_OpCom32_0(v *Value) bool {
1259	// match: (Com32 x)
1260	// result: (NOR x x)
1261	for {
1262		x := v.Args[0]
1263		v.reset(OpPPC64NOR)
1264		v.AddArg(x)
1265		v.AddArg(x)
1266		return true
1267	}
1268}
1269func rewriteValuePPC64_OpCom64_0(v *Value) bool {
1270	// match: (Com64 x)
1271	// result: (NOR x x)
1272	for {
1273		x := v.Args[0]
1274		v.reset(OpPPC64NOR)
1275		v.AddArg(x)
1276		v.AddArg(x)
1277		return true
1278	}
1279}
1280func rewriteValuePPC64_OpCom8_0(v *Value) bool {
1281	// match: (Com8 x)
1282	// result: (NOR x x)
1283	for {
1284		x := v.Args[0]
1285		v.reset(OpPPC64NOR)
1286		v.AddArg(x)
1287		v.AddArg(x)
1288		return true
1289	}
1290}
1291func rewriteValuePPC64_OpCondSelect_0(v *Value) bool {
1292	b := v.Block
1293	// match: (CondSelect x y bool)
1294	// cond: flagArg(bool) != nil
1295	// result: (ISEL [2] x y bool)
1296	for {
1297		bool := v.Args[2]
1298		x := v.Args[0]
1299		y := v.Args[1]
1300		if !(flagArg(bool) != nil) {
1301			break
1302		}
1303		v.reset(OpPPC64ISEL)
1304		v.AuxInt = 2
1305		v.AddArg(x)
1306		v.AddArg(y)
1307		v.AddArg(bool)
1308		return true
1309	}
1310	// match: (CondSelect x y bool)
1311	// cond: flagArg(bool) == nil
1312	// result: (ISEL [2] x y (CMPWconst [0] bool))
1313	for {
1314		bool := v.Args[2]
1315		x := v.Args[0]
1316		y := v.Args[1]
1317		if !(flagArg(bool) == nil) {
1318			break
1319		}
1320		v.reset(OpPPC64ISEL)
1321		v.AuxInt = 2
1322		v.AddArg(x)
1323		v.AddArg(y)
1324		v0 := b.NewValue0(v.Pos, OpPPC64CMPWconst, types.TypeFlags)
1325		v0.AuxInt = 0
1326		v0.AddArg(bool)
1327		v.AddArg(v0)
1328		return true
1329	}
1330	return false
1331}
1332func rewriteValuePPC64_OpConst16_0(v *Value) bool {
1333	// match: (Const16 [val])
1334	// result: (MOVDconst [val])
1335	for {
1336		val := v.AuxInt
1337		v.reset(OpPPC64MOVDconst)
1338		v.AuxInt = val
1339		return true
1340	}
1341}
1342func rewriteValuePPC64_OpConst32_0(v *Value) bool {
1343	// match: (Const32 [val])
1344	// result: (MOVDconst [val])
1345	for {
1346		val := v.AuxInt
1347		v.reset(OpPPC64MOVDconst)
1348		v.AuxInt = val
1349		return true
1350	}
1351}
1352func rewriteValuePPC64_OpConst32F_0(v *Value) bool {
1353	// match: (Const32F [val])
1354	// result: (FMOVSconst [val])
1355	for {
1356		val := v.AuxInt
1357		v.reset(OpPPC64FMOVSconst)
1358		v.AuxInt = val
1359		return true
1360	}
1361}
1362func rewriteValuePPC64_OpConst64_0(v *Value) bool {
1363	// match: (Const64 [val])
1364	// result: (MOVDconst [val])
1365	for {
1366		val := v.AuxInt
1367		v.reset(OpPPC64MOVDconst)
1368		v.AuxInt = val
1369		return true
1370	}
1371}
1372func rewriteValuePPC64_OpConst64F_0(v *Value) bool {
1373	// match: (Const64F [val])
1374	// result: (FMOVDconst [val])
1375	for {
1376		val := v.AuxInt
1377		v.reset(OpPPC64FMOVDconst)
1378		v.AuxInt = val
1379		return true
1380	}
1381}
1382func rewriteValuePPC64_OpConst8_0(v *Value) bool {
1383	// match: (Const8 [val])
1384	// result: (MOVDconst [val])
1385	for {
1386		val := v.AuxInt
1387		v.reset(OpPPC64MOVDconst)
1388		v.AuxInt = val
1389		return true
1390	}
1391}
1392func rewriteValuePPC64_OpConstBool_0(v *Value) bool {
1393	// match: (ConstBool [b])
1394	// result: (MOVDconst [b])
1395	for {
1396		b := v.AuxInt
1397		v.reset(OpPPC64MOVDconst)
1398		v.AuxInt = b
1399		return true
1400	}
1401}
1402func rewriteValuePPC64_OpConstNil_0(v *Value) bool {
1403	// match: (ConstNil)
1404	// result: (MOVDconst [0])
1405	for {
1406		v.reset(OpPPC64MOVDconst)
1407		v.AuxInt = 0
1408		return true
1409	}
1410}
1411func rewriteValuePPC64_OpCopysign_0(v *Value) bool {
1412	// match: (Copysign x y)
1413	// result: (FCPSGN y x)
1414	for {
1415		y := v.Args[1]
1416		x := v.Args[0]
1417		v.reset(OpPPC64FCPSGN)
1418		v.AddArg(y)
1419		v.AddArg(x)
1420		return true
1421	}
1422}
1423func rewriteValuePPC64_OpCtz16_0(v *Value) bool {
1424	b := v.Block
1425	typ := &b.Func.Config.Types
1426	// match: (Ctz16 x)
1427	// result: (POPCNTW (MOVHZreg (ANDN <typ.Int16> (ADDconst <typ.Int16> [-1] x) x)))
1428	for {
1429		x := v.Args[0]
1430		v.reset(OpPPC64POPCNTW)
1431		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
1432		v1 := b.NewValue0(v.Pos, OpPPC64ANDN, typ.Int16)
1433		v2 := b.NewValue0(v.Pos, OpPPC64ADDconst, typ.Int16)
1434		v2.AuxInt = -1
1435		v2.AddArg(x)
1436		v1.AddArg(v2)
1437		v1.AddArg(x)
1438		v0.AddArg(v1)
1439		v.AddArg(v0)
1440		return true
1441	}
1442}
1443func rewriteValuePPC64_OpCtz32_0(v *Value) bool {
1444	b := v.Block
1445	typ := &b.Func.Config.Types
1446	// match: (Ctz32 x)
1447	// cond: objabi.GOPPC64<=8
1448	// result: (POPCNTW (MOVWZreg (ANDN <typ.Int> (ADDconst <typ.Int> [-1] x) x)))
1449	for {
1450		x := v.Args[0]
1451		if !(objabi.GOPPC64 <= 8) {
1452			break
1453		}
1454		v.reset(OpPPC64POPCNTW)
1455		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZreg, typ.Int64)
1456		v1 := b.NewValue0(v.Pos, OpPPC64ANDN, typ.Int)
1457		v2 := b.NewValue0(v.Pos, OpPPC64ADDconst, typ.Int)
1458		v2.AuxInt = -1
1459		v2.AddArg(x)
1460		v1.AddArg(v2)
1461		v1.AddArg(x)
1462		v0.AddArg(v1)
1463		v.AddArg(v0)
1464		return true
1465	}
1466	// match: (Ctz32 x)
1467	// result: (CNTTZW (MOVWZreg x))
1468	for {
1469		x := v.Args[0]
1470		v.reset(OpPPC64CNTTZW)
1471		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZreg, typ.Int64)
1472		v0.AddArg(x)
1473		v.AddArg(v0)
1474		return true
1475	}
1476}
1477func rewriteValuePPC64_OpCtz32NonZero_0(v *Value) bool {
1478	// match: (Ctz32NonZero x)
1479	// result: (Ctz32 x)
1480	for {
1481		x := v.Args[0]
1482		v.reset(OpCtz32)
1483		v.AddArg(x)
1484		return true
1485	}
1486}
1487func rewriteValuePPC64_OpCtz64_0(v *Value) bool {
1488	b := v.Block
1489	typ := &b.Func.Config.Types
1490	// match: (Ctz64 x)
1491	// cond: objabi.GOPPC64<=8
1492	// result: (POPCNTD (ANDN <typ.Int64> (ADDconst <typ.Int64> [-1] x) x))
1493	for {
1494		x := v.Args[0]
1495		if !(objabi.GOPPC64 <= 8) {
1496			break
1497		}
1498		v.reset(OpPPC64POPCNTD)
1499		v0 := b.NewValue0(v.Pos, OpPPC64ANDN, typ.Int64)
1500		v1 := b.NewValue0(v.Pos, OpPPC64ADDconst, typ.Int64)
1501		v1.AuxInt = -1
1502		v1.AddArg(x)
1503		v0.AddArg(v1)
1504		v0.AddArg(x)
1505		v.AddArg(v0)
1506		return true
1507	}
1508	// match: (Ctz64 x)
1509	// result: (CNTTZD x)
1510	for {
1511		x := v.Args[0]
1512		v.reset(OpPPC64CNTTZD)
1513		v.AddArg(x)
1514		return true
1515	}
1516}
1517func rewriteValuePPC64_OpCtz64NonZero_0(v *Value) bool {
1518	// match: (Ctz64NonZero x)
1519	// result: (Ctz64 x)
1520	for {
1521		x := v.Args[0]
1522		v.reset(OpCtz64)
1523		v.AddArg(x)
1524		return true
1525	}
1526}
1527func rewriteValuePPC64_OpCtz8_0(v *Value) bool {
1528	b := v.Block
1529	typ := &b.Func.Config.Types
1530	// match: (Ctz8 x)
1531	// result: (POPCNTB (MOVBZreg (ANDN <typ.UInt8> (ADDconst <typ.UInt8> [-1] x) x)))
1532	for {
1533		x := v.Args[0]
1534		v.reset(OpPPC64POPCNTB)
1535		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
1536		v1 := b.NewValue0(v.Pos, OpPPC64ANDN, typ.UInt8)
1537		v2 := b.NewValue0(v.Pos, OpPPC64ADDconst, typ.UInt8)
1538		v2.AuxInt = -1
1539		v2.AddArg(x)
1540		v1.AddArg(v2)
1541		v1.AddArg(x)
1542		v0.AddArg(v1)
1543		v.AddArg(v0)
1544		return true
1545	}
1546}
1547func rewriteValuePPC64_OpCvt32Fto32_0(v *Value) bool {
1548	b := v.Block
1549	typ := &b.Func.Config.Types
1550	// match: (Cvt32Fto32 x)
1551	// result: (MFVSRD (FCTIWZ x))
1552	for {
1553		x := v.Args[0]
1554		v.reset(OpPPC64MFVSRD)
1555		v0 := b.NewValue0(v.Pos, OpPPC64FCTIWZ, typ.Float64)
1556		v0.AddArg(x)
1557		v.AddArg(v0)
1558		return true
1559	}
1560}
1561func rewriteValuePPC64_OpCvt32Fto64_0(v *Value) bool {
1562	b := v.Block
1563	typ := &b.Func.Config.Types
1564	// match: (Cvt32Fto64 x)
1565	// result: (MFVSRD (FCTIDZ x))
1566	for {
1567		x := v.Args[0]
1568		v.reset(OpPPC64MFVSRD)
1569		v0 := b.NewValue0(v.Pos, OpPPC64FCTIDZ, typ.Float64)
1570		v0.AddArg(x)
1571		v.AddArg(v0)
1572		return true
1573	}
1574}
1575func rewriteValuePPC64_OpCvt32Fto64F_0(v *Value) bool {
1576	// match: (Cvt32Fto64F x)
1577	// result: x
1578	for {
1579		x := v.Args[0]
1580		v.reset(OpCopy)
1581		v.Type = x.Type
1582		v.AddArg(x)
1583		return true
1584	}
1585}
1586func rewriteValuePPC64_OpCvt32to32F_0(v *Value) bool {
1587	b := v.Block
1588	typ := &b.Func.Config.Types
1589	// match: (Cvt32to32F x)
1590	// result: (FCFIDS (MTVSRD (SignExt32to64 x)))
1591	for {
1592		x := v.Args[0]
1593		v.reset(OpPPC64FCFIDS)
1594		v0 := b.NewValue0(v.Pos, OpPPC64MTVSRD, typ.Float64)
1595		v1 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
1596		v1.AddArg(x)
1597		v0.AddArg(v1)
1598		v.AddArg(v0)
1599		return true
1600	}
1601}
1602func rewriteValuePPC64_OpCvt32to64F_0(v *Value) bool {
1603	b := v.Block
1604	typ := &b.Func.Config.Types
1605	// match: (Cvt32to64F x)
1606	// result: (FCFID (MTVSRD (SignExt32to64 x)))
1607	for {
1608		x := v.Args[0]
1609		v.reset(OpPPC64FCFID)
1610		v0 := b.NewValue0(v.Pos, OpPPC64MTVSRD, typ.Float64)
1611		v1 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
1612		v1.AddArg(x)
1613		v0.AddArg(v1)
1614		v.AddArg(v0)
1615		return true
1616	}
1617}
1618func rewriteValuePPC64_OpCvt64Fto32_0(v *Value) bool {
1619	b := v.Block
1620	typ := &b.Func.Config.Types
1621	// match: (Cvt64Fto32 x)
1622	// result: (MFVSRD (FCTIWZ x))
1623	for {
1624		x := v.Args[0]
1625		v.reset(OpPPC64MFVSRD)
1626		v0 := b.NewValue0(v.Pos, OpPPC64FCTIWZ, typ.Float64)
1627		v0.AddArg(x)
1628		v.AddArg(v0)
1629		return true
1630	}
1631}
1632func rewriteValuePPC64_OpCvt64Fto32F_0(v *Value) bool {
1633	// match: (Cvt64Fto32F x)
1634	// result: (FRSP x)
1635	for {
1636		x := v.Args[0]
1637		v.reset(OpPPC64FRSP)
1638		v.AddArg(x)
1639		return true
1640	}
1641}
1642func rewriteValuePPC64_OpCvt64Fto64_0(v *Value) bool {
1643	b := v.Block
1644	typ := &b.Func.Config.Types
1645	// match: (Cvt64Fto64 x)
1646	// result: (MFVSRD (FCTIDZ x))
1647	for {
1648		x := v.Args[0]
1649		v.reset(OpPPC64MFVSRD)
1650		v0 := b.NewValue0(v.Pos, OpPPC64FCTIDZ, typ.Float64)
1651		v0.AddArg(x)
1652		v.AddArg(v0)
1653		return true
1654	}
1655}
1656func rewriteValuePPC64_OpCvt64to32F_0(v *Value) bool {
1657	b := v.Block
1658	typ := &b.Func.Config.Types
1659	// match: (Cvt64to32F x)
1660	// result: (FCFIDS (MTVSRD x))
1661	for {
1662		x := v.Args[0]
1663		v.reset(OpPPC64FCFIDS)
1664		v0 := b.NewValue0(v.Pos, OpPPC64MTVSRD, typ.Float64)
1665		v0.AddArg(x)
1666		v.AddArg(v0)
1667		return true
1668	}
1669}
1670func rewriteValuePPC64_OpCvt64to64F_0(v *Value) bool {
1671	b := v.Block
1672	typ := &b.Func.Config.Types
1673	// match: (Cvt64to64F x)
1674	// result: (FCFID (MTVSRD x))
1675	for {
1676		x := v.Args[0]
1677		v.reset(OpPPC64FCFID)
1678		v0 := b.NewValue0(v.Pos, OpPPC64MTVSRD, typ.Float64)
1679		v0.AddArg(x)
1680		v.AddArg(v0)
1681		return true
1682	}
1683}
1684func rewriteValuePPC64_OpDiv16_0(v *Value) bool {
1685	b := v.Block
1686	typ := &b.Func.Config.Types
1687	// match: (Div16 x y)
1688	// result: (DIVW (SignExt16to32 x) (SignExt16to32 y))
1689	for {
1690		y := v.Args[1]
1691		x := v.Args[0]
1692		v.reset(OpPPC64DIVW)
1693		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
1694		v0.AddArg(x)
1695		v.AddArg(v0)
1696		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
1697		v1.AddArg(y)
1698		v.AddArg(v1)
1699		return true
1700	}
1701}
1702func rewriteValuePPC64_OpDiv16u_0(v *Value) bool {
1703	b := v.Block
1704	typ := &b.Func.Config.Types
1705	// match: (Div16u x y)
1706	// result: (DIVWU (ZeroExt16to32 x) (ZeroExt16to32 y))
1707	for {
1708		y := v.Args[1]
1709		x := v.Args[0]
1710		v.reset(OpPPC64DIVWU)
1711		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
1712		v0.AddArg(x)
1713		v.AddArg(v0)
1714		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
1715		v1.AddArg(y)
1716		v.AddArg(v1)
1717		return true
1718	}
1719}
1720func rewriteValuePPC64_OpDiv32_0(v *Value) bool {
1721	// match: (Div32 x y)
1722	// result: (DIVW x y)
1723	for {
1724		y := v.Args[1]
1725		x := v.Args[0]
1726		v.reset(OpPPC64DIVW)
1727		v.AddArg(x)
1728		v.AddArg(y)
1729		return true
1730	}
1731}
1732func rewriteValuePPC64_OpDiv32F_0(v *Value) bool {
1733	// match: (Div32F x y)
1734	// result: (FDIVS x y)
1735	for {
1736		y := v.Args[1]
1737		x := v.Args[0]
1738		v.reset(OpPPC64FDIVS)
1739		v.AddArg(x)
1740		v.AddArg(y)
1741		return true
1742	}
1743}
1744func rewriteValuePPC64_OpDiv32u_0(v *Value) bool {
1745	// match: (Div32u x y)
1746	// result: (DIVWU x y)
1747	for {
1748		y := v.Args[1]
1749		x := v.Args[0]
1750		v.reset(OpPPC64DIVWU)
1751		v.AddArg(x)
1752		v.AddArg(y)
1753		return true
1754	}
1755}
1756func rewriteValuePPC64_OpDiv64_0(v *Value) bool {
1757	// match: (Div64 x y)
1758	// result: (DIVD x y)
1759	for {
1760		y := v.Args[1]
1761		x := v.Args[0]
1762		v.reset(OpPPC64DIVD)
1763		v.AddArg(x)
1764		v.AddArg(y)
1765		return true
1766	}
1767}
1768func rewriteValuePPC64_OpDiv64F_0(v *Value) bool {
1769	// match: (Div64F x y)
1770	// result: (FDIV x y)
1771	for {
1772		y := v.Args[1]
1773		x := v.Args[0]
1774		v.reset(OpPPC64FDIV)
1775		v.AddArg(x)
1776		v.AddArg(y)
1777		return true
1778	}
1779}
1780func rewriteValuePPC64_OpDiv64u_0(v *Value) bool {
1781	// match: (Div64u x y)
1782	// result: (DIVDU x y)
1783	for {
1784		y := v.Args[1]
1785		x := v.Args[0]
1786		v.reset(OpPPC64DIVDU)
1787		v.AddArg(x)
1788		v.AddArg(y)
1789		return true
1790	}
1791}
1792func rewriteValuePPC64_OpDiv8_0(v *Value) bool {
1793	b := v.Block
1794	typ := &b.Func.Config.Types
1795	// match: (Div8 x y)
1796	// result: (DIVW (SignExt8to32 x) (SignExt8to32 y))
1797	for {
1798		y := v.Args[1]
1799		x := v.Args[0]
1800		v.reset(OpPPC64DIVW)
1801		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
1802		v0.AddArg(x)
1803		v.AddArg(v0)
1804		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
1805		v1.AddArg(y)
1806		v.AddArg(v1)
1807		return true
1808	}
1809}
1810func rewriteValuePPC64_OpDiv8u_0(v *Value) bool {
1811	b := v.Block
1812	typ := &b.Func.Config.Types
1813	// match: (Div8u x y)
1814	// result: (DIVWU (ZeroExt8to32 x) (ZeroExt8to32 y))
1815	for {
1816		y := v.Args[1]
1817		x := v.Args[0]
1818		v.reset(OpPPC64DIVWU)
1819		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
1820		v0.AddArg(x)
1821		v.AddArg(v0)
1822		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
1823		v1.AddArg(y)
1824		v.AddArg(v1)
1825		return true
1826	}
1827}
1828func rewriteValuePPC64_OpEq16_0(v *Value) bool {
1829	b := v.Block
1830	typ := &b.Func.Config.Types
1831	// match: (Eq16 x y)
1832	// cond: isSigned(x.Type) && isSigned(y.Type)
1833	// result: (Equal (CMPW (SignExt16to32 x) (SignExt16to32 y)))
1834	for {
1835		y := v.Args[1]
1836		x := v.Args[0]
1837		if !(isSigned(x.Type) && isSigned(y.Type)) {
1838			break
1839		}
1840		v.reset(OpPPC64Equal)
1841		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
1842		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
1843		v1.AddArg(x)
1844		v0.AddArg(v1)
1845		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
1846		v2.AddArg(y)
1847		v0.AddArg(v2)
1848		v.AddArg(v0)
1849		return true
1850	}
1851	// match: (Eq16 x y)
1852	// result: (Equal (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
1853	for {
1854		y := v.Args[1]
1855		x := v.Args[0]
1856		v.reset(OpPPC64Equal)
1857		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
1858		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
1859		v1.AddArg(x)
1860		v0.AddArg(v1)
1861		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
1862		v2.AddArg(y)
1863		v0.AddArg(v2)
1864		v.AddArg(v0)
1865		return true
1866	}
1867}
1868func rewriteValuePPC64_OpEq32_0(v *Value) bool {
1869	b := v.Block
1870	// match: (Eq32 x y)
1871	// result: (Equal (CMPW x y))
1872	for {
1873		y := v.Args[1]
1874		x := v.Args[0]
1875		v.reset(OpPPC64Equal)
1876		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
1877		v0.AddArg(x)
1878		v0.AddArg(y)
1879		v.AddArg(v0)
1880		return true
1881	}
1882}
1883func rewriteValuePPC64_OpEq32F_0(v *Value) bool {
1884	b := v.Block
1885	// match: (Eq32F x y)
1886	// result: (Equal (FCMPU x y))
1887	for {
1888		y := v.Args[1]
1889		x := v.Args[0]
1890		v.reset(OpPPC64Equal)
1891		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
1892		v0.AddArg(x)
1893		v0.AddArg(y)
1894		v.AddArg(v0)
1895		return true
1896	}
1897}
1898func rewriteValuePPC64_OpEq64_0(v *Value) bool {
1899	b := v.Block
1900	// match: (Eq64 x y)
1901	// result: (Equal (CMP x y))
1902	for {
1903		y := v.Args[1]
1904		x := v.Args[0]
1905		v.reset(OpPPC64Equal)
1906		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
1907		v0.AddArg(x)
1908		v0.AddArg(y)
1909		v.AddArg(v0)
1910		return true
1911	}
1912}
1913func rewriteValuePPC64_OpEq64F_0(v *Value) bool {
1914	b := v.Block
1915	// match: (Eq64F x y)
1916	// result: (Equal (FCMPU x y))
1917	for {
1918		y := v.Args[1]
1919		x := v.Args[0]
1920		v.reset(OpPPC64Equal)
1921		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
1922		v0.AddArg(x)
1923		v0.AddArg(y)
1924		v.AddArg(v0)
1925		return true
1926	}
1927}
1928func rewriteValuePPC64_OpEq8_0(v *Value) bool {
1929	b := v.Block
1930	typ := &b.Func.Config.Types
1931	// match: (Eq8 x y)
1932	// cond: isSigned(x.Type) && isSigned(y.Type)
1933	// result: (Equal (CMPW (SignExt8to32 x) (SignExt8to32 y)))
1934	for {
1935		y := v.Args[1]
1936		x := v.Args[0]
1937		if !(isSigned(x.Type) && isSigned(y.Type)) {
1938			break
1939		}
1940		v.reset(OpPPC64Equal)
1941		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
1942		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
1943		v1.AddArg(x)
1944		v0.AddArg(v1)
1945		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
1946		v2.AddArg(y)
1947		v0.AddArg(v2)
1948		v.AddArg(v0)
1949		return true
1950	}
1951	// match: (Eq8 x y)
1952	// result: (Equal (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
1953	for {
1954		y := v.Args[1]
1955		x := v.Args[0]
1956		v.reset(OpPPC64Equal)
1957		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
1958		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
1959		v1.AddArg(x)
1960		v0.AddArg(v1)
1961		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
1962		v2.AddArg(y)
1963		v0.AddArg(v2)
1964		v.AddArg(v0)
1965		return true
1966	}
1967}
1968func rewriteValuePPC64_OpEqB_0(v *Value) bool {
1969	b := v.Block
1970	typ := &b.Func.Config.Types
1971	// match: (EqB x y)
1972	// result: (ANDconst [1] (EQV x y))
1973	for {
1974		y := v.Args[1]
1975		x := v.Args[0]
1976		v.reset(OpPPC64ANDconst)
1977		v.AuxInt = 1
1978		v0 := b.NewValue0(v.Pos, OpPPC64EQV, typ.Int64)
1979		v0.AddArg(x)
1980		v0.AddArg(y)
1981		v.AddArg(v0)
1982		return true
1983	}
1984}
1985func rewriteValuePPC64_OpEqPtr_0(v *Value) bool {
1986	b := v.Block
1987	// match: (EqPtr x y)
1988	// result: (Equal (CMP x y))
1989	for {
1990		y := v.Args[1]
1991		x := v.Args[0]
1992		v.reset(OpPPC64Equal)
1993		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
1994		v0.AddArg(x)
1995		v0.AddArg(y)
1996		v.AddArg(v0)
1997		return true
1998	}
1999}
2000func rewriteValuePPC64_OpFMA_0(v *Value) bool {
2001	// match: (FMA x y z)
2002	// result: (FMADD x y z)
2003	for {
2004		z := v.Args[2]
2005		x := v.Args[0]
2006		y := v.Args[1]
2007		v.reset(OpPPC64FMADD)
2008		v.AddArg(x)
2009		v.AddArg(y)
2010		v.AddArg(z)
2011		return true
2012	}
2013}
2014func rewriteValuePPC64_OpFloor_0(v *Value) bool {
2015	// match: (Floor x)
2016	// result: (FFLOOR x)
2017	for {
2018		x := v.Args[0]
2019		v.reset(OpPPC64FFLOOR)
2020		v.AddArg(x)
2021		return true
2022	}
2023}
2024func rewriteValuePPC64_OpGeq16_0(v *Value) bool {
2025	b := v.Block
2026	typ := &b.Func.Config.Types
2027	// match: (Geq16 x y)
2028	// result: (GreaterEqual (CMPW (SignExt16to32 x) (SignExt16to32 y)))
2029	for {
2030		y := v.Args[1]
2031		x := v.Args[0]
2032		v.reset(OpPPC64GreaterEqual)
2033		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
2034		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
2035		v1.AddArg(x)
2036		v0.AddArg(v1)
2037		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
2038		v2.AddArg(y)
2039		v0.AddArg(v2)
2040		v.AddArg(v0)
2041		return true
2042	}
2043}
2044func rewriteValuePPC64_OpGeq16U_0(v *Value) bool {
2045	b := v.Block
2046	typ := &b.Func.Config.Types
2047	// match: (Geq16U x y)
2048	// result: (GreaterEqual (CMPWU (ZeroExt16to32 x) (ZeroExt16to32 y)))
2049	for {
2050		y := v.Args[1]
2051		x := v.Args[0]
2052		v.reset(OpPPC64GreaterEqual)
2053		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
2054		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
2055		v1.AddArg(x)
2056		v0.AddArg(v1)
2057		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
2058		v2.AddArg(y)
2059		v0.AddArg(v2)
2060		v.AddArg(v0)
2061		return true
2062	}
2063}
2064func rewriteValuePPC64_OpGeq32_0(v *Value) bool {
2065	b := v.Block
2066	// match: (Geq32 x y)
2067	// result: (GreaterEqual (CMPW x y))
2068	for {
2069		y := v.Args[1]
2070		x := v.Args[0]
2071		v.reset(OpPPC64GreaterEqual)
2072		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
2073		v0.AddArg(x)
2074		v0.AddArg(y)
2075		v.AddArg(v0)
2076		return true
2077	}
2078}
2079func rewriteValuePPC64_OpGeq32F_0(v *Value) bool {
2080	b := v.Block
2081	// match: (Geq32F x y)
2082	// result: (FGreaterEqual (FCMPU x y))
2083	for {
2084		y := v.Args[1]
2085		x := v.Args[0]
2086		v.reset(OpPPC64FGreaterEqual)
2087		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
2088		v0.AddArg(x)
2089		v0.AddArg(y)
2090		v.AddArg(v0)
2091		return true
2092	}
2093}
2094func rewriteValuePPC64_OpGeq32U_0(v *Value) bool {
2095	b := v.Block
2096	// match: (Geq32U x y)
2097	// result: (GreaterEqual (CMPWU x y))
2098	for {
2099		y := v.Args[1]
2100		x := v.Args[0]
2101		v.reset(OpPPC64GreaterEqual)
2102		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
2103		v0.AddArg(x)
2104		v0.AddArg(y)
2105		v.AddArg(v0)
2106		return true
2107	}
2108}
2109func rewriteValuePPC64_OpGeq64_0(v *Value) bool {
2110	b := v.Block
2111	// match: (Geq64 x y)
2112	// result: (GreaterEqual (CMP x y))
2113	for {
2114		y := v.Args[1]
2115		x := v.Args[0]
2116		v.reset(OpPPC64GreaterEqual)
2117		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
2118		v0.AddArg(x)
2119		v0.AddArg(y)
2120		v.AddArg(v0)
2121		return true
2122	}
2123}
2124func rewriteValuePPC64_OpGeq64F_0(v *Value) bool {
2125	b := v.Block
2126	// match: (Geq64F x y)
2127	// result: (FGreaterEqual (FCMPU x y))
2128	for {
2129		y := v.Args[1]
2130		x := v.Args[0]
2131		v.reset(OpPPC64FGreaterEqual)
2132		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
2133		v0.AddArg(x)
2134		v0.AddArg(y)
2135		v.AddArg(v0)
2136		return true
2137	}
2138}
2139func rewriteValuePPC64_OpGeq64U_0(v *Value) bool {
2140	b := v.Block
2141	// match: (Geq64U x y)
2142	// result: (GreaterEqual (CMPU x y))
2143	for {
2144		y := v.Args[1]
2145		x := v.Args[0]
2146		v.reset(OpPPC64GreaterEqual)
2147		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
2148		v0.AddArg(x)
2149		v0.AddArg(y)
2150		v.AddArg(v0)
2151		return true
2152	}
2153}
2154func rewriteValuePPC64_OpGeq8_0(v *Value) bool {
2155	b := v.Block
2156	typ := &b.Func.Config.Types
2157	// match: (Geq8 x y)
2158	// result: (GreaterEqual (CMPW (SignExt8to32 x) (SignExt8to32 y)))
2159	for {
2160		y := v.Args[1]
2161		x := v.Args[0]
2162		v.reset(OpPPC64GreaterEqual)
2163		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
2164		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
2165		v1.AddArg(x)
2166		v0.AddArg(v1)
2167		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
2168		v2.AddArg(y)
2169		v0.AddArg(v2)
2170		v.AddArg(v0)
2171		return true
2172	}
2173}
2174func rewriteValuePPC64_OpGeq8U_0(v *Value) bool {
2175	b := v.Block
2176	typ := &b.Func.Config.Types
2177	// match: (Geq8U x y)
2178	// result: (GreaterEqual (CMPWU (ZeroExt8to32 x) (ZeroExt8to32 y)))
2179	for {
2180		y := v.Args[1]
2181		x := v.Args[0]
2182		v.reset(OpPPC64GreaterEqual)
2183		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
2184		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
2185		v1.AddArg(x)
2186		v0.AddArg(v1)
2187		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
2188		v2.AddArg(y)
2189		v0.AddArg(v2)
2190		v.AddArg(v0)
2191		return true
2192	}
2193}
2194func rewriteValuePPC64_OpGetCallerPC_0(v *Value) bool {
2195	// match: (GetCallerPC)
2196	// result: (LoweredGetCallerPC)
2197	for {
2198		v.reset(OpPPC64LoweredGetCallerPC)
2199		return true
2200	}
2201}
2202func rewriteValuePPC64_OpGetCallerSP_0(v *Value) bool {
2203	// match: (GetCallerSP)
2204	// result: (LoweredGetCallerSP)
2205	for {
2206		v.reset(OpPPC64LoweredGetCallerSP)
2207		return true
2208	}
2209}
2210func rewriteValuePPC64_OpGetClosurePtr_0(v *Value) bool {
2211	// match: (GetClosurePtr)
2212	// result: (LoweredGetClosurePtr)
2213	for {
2214		v.reset(OpPPC64LoweredGetClosurePtr)
2215		return true
2216	}
2217}
2218func rewriteValuePPC64_OpGreater16_0(v *Value) bool {
2219	b := v.Block
2220	typ := &b.Func.Config.Types
2221	// match: (Greater16 x y)
2222	// result: (GreaterThan (CMPW (SignExt16to32 x) (SignExt16to32 y)))
2223	for {
2224		y := v.Args[1]
2225		x := v.Args[0]
2226		v.reset(OpPPC64GreaterThan)
2227		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
2228		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
2229		v1.AddArg(x)
2230		v0.AddArg(v1)
2231		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
2232		v2.AddArg(y)
2233		v0.AddArg(v2)
2234		v.AddArg(v0)
2235		return true
2236	}
2237}
2238func rewriteValuePPC64_OpGreater16U_0(v *Value) bool {
2239	b := v.Block
2240	typ := &b.Func.Config.Types
2241	// match: (Greater16U x y)
2242	// result: (GreaterThan (CMPWU (ZeroExt16to32 x) (ZeroExt16to32 y)))
2243	for {
2244		y := v.Args[1]
2245		x := v.Args[0]
2246		v.reset(OpPPC64GreaterThan)
2247		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
2248		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
2249		v1.AddArg(x)
2250		v0.AddArg(v1)
2251		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
2252		v2.AddArg(y)
2253		v0.AddArg(v2)
2254		v.AddArg(v0)
2255		return true
2256	}
2257}
2258func rewriteValuePPC64_OpGreater32_0(v *Value) bool {
2259	b := v.Block
2260	// match: (Greater32 x y)
2261	// result: (GreaterThan (CMPW x y))
2262	for {
2263		y := v.Args[1]
2264		x := v.Args[0]
2265		v.reset(OpPPC64GreaterThan)
2266		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
2267		v0.AddArg(x)
2268		v0.AddArg(y)
2269		v.AddArg(v0)
2270		return true
2271	}
2272}
2273func rewriteValuePPC64_OpGreater32F_0(v *Value) bool {
2274	b := v.Block
2275	// match: (Greater32F x y)
2276	// result: (FGreaterThan (FCMPU x y))
2277	for {
2278		y := v.Args[1]
2279		x := v.Args[0]
2280		v.reset(OpPPC64FGreaterThan)
2281		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
2282		v0.AddArg(x)
2283		v0.AddArg(y)
2284		v.AddArg(v0)
2285		return true
2286	}
2287}
2288func rewriteValuePPC64_OpGreater32U_0(v *Value) bool {
2289	b := v.Block
2290	// match: (Greater32U x y)
2291	// result: (GreaterThan (CMPWU x y))
2292	for {
2293		y := v.Args[1]
2294		x := v.Args[0]
2295		v.reset(OpPPC64GreaterThan)
2296		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
2297		v0.AddArg(x)
2298		v0.AddArg(y)
2299		v.AddArg(v0)
2300		return true
2301	}
2302}
2303func rewriteValuePPC64_OpGreater64_0(v *Value) bool {
2304	b := v.Block
2305	// match: (Greater64 x y)
2306	// result: (GreaterThan (CMP x y))
2307	for {
2308		y := v.Args[1]
2309		x := v.Args[0]
2310		v.reset(OpPPC64GreaterThan)
2311		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
2312		v0.AddArg(x)
2313		v0.AddArg(y)
2314		v.AddArg(v0)
2315		return true
2316	}
2317}
2318func rewriteValuePPC64_OpGreater64F_0(v *Value) bool {
2319	b := v.Block
2320	// match: (Greater64F x y)
2321	// result: (FGreaterThan (FCMPU x y))
2322	for {
2323		y := v.Args[1]
2324		x := v.Args[0]
2325		v.reset(OpPPC64FGreaterThan)
2326		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
2327		v0.AddArg(x)
2328		v0.AddArg(y)
2329		v.AddArg(v0)
2330		return true
2331	}
2332}
2333func rewriteValuePPC64_OpGreater64U_0(v *Value) bool {
2334	b := v.Block
2335	// match: (Greater64U x y)
2336	// result: (GreaterThan (CMPU x y))
2337	for {
2338		y := v.Args[1]
2339		x := v.Args[0]
2340		v.reset(OpPPC64GreaterThan)
2341		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
2342		v0.AddArg(x)
2343		v0.AddArg(y)
2344		v.AddArg(v0)
2345		return true
2346	}
2347}
2348func rewriteValuePPC64_OpGreater8_0(v *Value) bool {
2349	b := v.Block
2350	typ := &b.Func.Config.Types
2351	// match: (Greater8 x y)
2352	// result: (GreaterThan (CMPW (SignExt8to32 x) (SignExt8to32 y)))
2353	for {
2354		y := v.Args[1]
2355		x := v.Args[0]
2356		v.reset(OpPPC64GreaterThan)
2357		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
2358		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
2359		v1.AddArg(x)
2360		v0.AddArg(v1)
2361		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
2362		v2.AddArg(y)
2363		v0.AddArg(v2)
2364		v.AddArg(v0)
2365		return true
2366	}
2367}
2368func rewriteValuePPC64_OpGreater8U_0(v *Value) bool {
2369	b := v.Block
2370	typ := &b.Func.Config.Types
2371	// match: (Greater8U x y)
2372	// result: (GreaterThan (CMPWU (ZeroExt8to32 x) (ZeroExt8to32 y)))
2373	for {
2374		y := v.Args[1]
2375		x := v.Args[0]
2376		v.reset(OpPPC64GreaterThan)
2377		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
2378		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
2379		v1.AddArg(x)
2380		v0.AddArg(v1)
2381		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
2382		v2.AddArg(y)
2383		v0.AddArg(v2)
2384		v.AddArg(v0)
2385		return true
2386	}
2387}
2388func rewriteValuePPC64_OpHmul32_0(v *Value) bool {
2389	// match: (Hmul32 x y)
2390	// result: (MULHW x y)
2391	for {
2392		y := v.Args[1]
2393		x := v.Args[0]
2394		v.reset(OpPPC64MULHW)
2395		v.AddArg(x)
2396		v.AddArg(y)
2397		return true
2398	}
2399}
2400func rewriteValuePPC64_OpHmul32u_0(v *Value) bool {
2401	// match: (Hmul32u x y)
2402	// result: (MULHWU x y)
2403	for {
2404		y := v.Args[1]
2405		x := v.Args[0]
2406		v.reset(OpPPC64MULHWU)
2407		v.AddArg(x)
2408		v.AddArg(y)
2409		return true
2410	}
2411}
2412func rewriteValuePPC64_OpHmul64_0(v *Value) bool {
2413	// match: (Hmul64 x y)
2414	// result: (MULHD x y)
2415	for {
2416		y := v.Args[1]
2417		x := v.Args[0]
2418		v.reset(OpPPC64MULHD)
2419		v.AddArg(x)
2420		v.AddArg(y)
2421		return true
2422	}
2423}
2424func rewriteValuePPC64_OpHmul64u_0(v *Value) bool {
2425	// match: (Hmul64u x y)
2426	// result: (MULHDU x y)
2427	for {
2428		y := v.Args[1]
2429		x := v.Args[0]
2430		v.reset(OpPPC64MULHDU)
2431		v.AddArg(x)
2432		v.AddArg(y)
2433		return true
2434	}
2435}
2436func rewriteValuePPC64_OpInterCall_0(v *Value) bool {
2437	// match: (InterCall [argwid] entry mem)
2438	// result: (CALLinter [argwid] entry mem)
2439	for {
2440		argwid := v.AuxInt
2441		mem := v.Args[1]
2442		entry := v.Args[0]
2443		v.reset(OpPPC64CALLinter)
2444		v.AuxInt = argwid
2445		v.AddArg(entry)
2446		v.AddArg(mem)
2447		return true
2448	}
2449}
2450func rewriteValuePPC64_OpIsInBounds_0(v *Value) bool {
2451	b := v.Block
2452	// match: (IsInBounds idx len)
2453	// result: (LessThan (CMPU idx len))
2454	for {
2455		len := v.Args[1]
2456		idx := v.Args[0]
2457		v.reset(OpPPC64LessThan)
2458		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
2459		v0.AddArg(idx)
2460		v0.AddArg(len)
2461		v.AddArg(v0)
2462		return true
2463	}
2464}
2465func rewriteValuePPC64_OpIsNonNil_0(v *Value) bool {
2466	b := v.Block
2467	// match: (IsNonNil ptr)
2468	// result: (NotEqual (CMPconst [0] ptr))
2469	for {
2470		ptr := v.Args[0]
2471		v.reset(OpPPC64NotEqual)
2472		v0 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
2473		v0.AuxInt = 0
2474		v0.AddArg(ptr)
2475		v.AddArg(v0)
2476		return true
2477	}
2478}
2479func rewriteValuePPC64_OpIsSliceInBounds_0(v *Value) bool {
2480	b := v.Block
2481	// match: (IsSliceInBounds idx len)
2482	// result: (LessEqual (CMPU idx len))
2483	for {
2484		len := v.Args[1]
2485		idx := v.Args[0]
2486		v.reset(OpPPC64LessEqual)
2487		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
2488		v0.AddArg(idx)
2489		v0.AddArg(len)
2490		v.AddArg(v0)
2491		return true
2492	}
2493}
2494func rewriteValuePPC64_OpLeq16_0(v *Value) bool {
2495	b := v.Block
2496	typ := &b.Func.Config.Types
2497	// match: (Leq16 x y)
2498	// result: (LessEqual (CMPW (SignExt16to32 x) (SignExt16to32 y)))
2499	for {
2500		y := v.Args[1]
2501		x := v.Args[0]
2502		v.reset(OpPPC64LessEqual)
2503		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
2504		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
2505		v1.AddArg(x)
2506		v0.AddArg(v1)
2507		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
2508		v2.AddArg(y)
2509		v0.AddArg(v2)
2510		v.AddArg(v0)
2511		return true
2512	}
2513}
2514func rewriteValuePPC64_OpLeq16U_0(v *Value) bool {
2515	b := v.Block
2516	typ := &b.Func.Config.Types
2517	// match: (Leq16U x y)
2518	// result: (LessEqual (CMPWU (ZeroExt16to32 x) (ZeroExt16to32 y)))
2519	for {
2520		y := v.Args[1]
2521		x := v.Args[0]
2522		v.reset(OpPPC64LessEqual)
2523		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
2524		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
2525		v1.AddArg(x)
2526		v0.AddArg(v1)
2527		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
2528		v2.AddArg(y)
2529		v0.AddArg(v2)
2530		v.AddArg(v0)
2531		return true
2532	}
2533}
2534func rewriteValuePPC64_OpLeq32_0(v *Value) bool {
2535	b := v.Block
2536	// match: (Leq32 x y)
2537	// result: (LessEqual (CMPW x y))
2538	for {
2539		y := v.Args[1]
2540		x := v.Args[0]
2541		v.reset(OpPPC64LessEqual)
2542		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
2543		v0.AddArg(x)
2544		v0.AddArg(y)
2545		v.AddArg(v0)
2546		return true
2547	}
2548}
2549func rewriteValuePPC64_OpLeq32F_0(v *Value) bool {
2550	b := v.Block
2551	// match: (Leq32F x y)
2552	// result: (FLessEqual (FCMPU x y))
2553	for {
2554		y := v.Args[1]
2555		x := v.Args[0]
2556		v.reset(OpPPC64FLessEqual)
2557		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
2558		v0.AddArg(x)
2559		v0.AddArg(y)
2560		v.AddArg(v0)
2561		return true
2562	}
2563}
2564func rewriteValuePPC64_OpLeq32U_0(v *Value) bool {
2565	b := v.Block
2566	// match: (Leq32U x y)
2567	// result: (LessEqual (CMPWU x y))
2568	for {
2569		y := v.Args[1]
2570		x := v.Args[0]
2571		v.reset(OpPPC64LessEqual)
2572		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
2573		v0.AddArg(x)
2574		v0.AddArg(y)
2575		v.AddArg(v0)
2576		return true
2577	}
2578}
2579func rewriteValuePPC64_OpLeq64_0(v *Value) bool {
2580	b := v.Block
2581	// match: (Leq64 x y)
2582	// result: (LessEqual (CMP x y))
2583	for {
2584		y := v.Args[1]
2585		x := v.Args[0]
2586		v.reset(OpPPC64LessEqual)
2587		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
2588		v0.AddArg(x)
2589		v0.AddArg(y)
2590		v.AddArg(v0)
2591		return true
2592	}
2593}
2594func rewriteValuePPC64_OpLeq64F_0(v *Value) bool {
2595	b := v.Block
2596	// match: (Leq64F x y)
2597	// result: (FLessEqual (FCMPU x y))
2598	for {
2599		y := v.Args[1]
2600		x := v.Args[0]
2601		v.reset(OpPPC64FLessEqual)
2602		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
2603		v0.AddArg(x)
2604		v0.AddArg(y)
2605		v.AddArg(v0)
2606		return true
2607	}
2608}
2609func rewriteValuePPC64_OpLeq64U_0(v *Value) bool {
2610	b := v.Block
2611	// match: (Leq64U x y)
2612	// result: (LessEqual (CMPU x y))
2613	for {
2614		y := v.Args[1]
2615		x := v.Args[0]
2616		v.reset(OpPPC64LessEqual)
2617		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
2618		v0.AddArg(x)
2619		v0.AddArg(y)
2620		v.AddArg(v0)
2621		return true
2622	}
2623}
2624func rewriteValuePPC64_OpLeq8_0(v *Value) bool {
2625	b := v.Block
2626	typ := &b.Func.Config.Types
2627	// match: (Leq8 x y)
2628	// result: (LessEqual (CMPW (SignExt8to32 x) (SignExt8to32 y)))
2629	for {
2630		y := v.Args[1]
2631		x := v.Args[0]
2632		v.reset(OpPPC64LessEqual)
2633		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
2634		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
2635		v1.AddArg(x)
2636		v0.AddArg(v1)
2637		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
2638		v2.AddArg(y)
2639		v0.AddArg(v2)
2640		v.AddArg(v0)
2641		return true
2642	}
2643}
2644func rewriteValuePPC64_OpLeq8U_0(v *Value) bool {
2645	b := v.Block
2646	typ := &b.Func.Config.Types
2647	// match: (Leq8U x y)
2648	// result: (LessEqual (CMPWU (ZeroExt8to32 x) (ZeroExt8to32 y)))
2649	for {
2650		y := v.Args[1]
2651		x := v.Args[0]
2652		v.reset(OpPPC64LessEqual)
2653		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
2654		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
2655		v1.AddArg(x)
2656		v0.AddArg(v1)
2657		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
2658		v2.AddArg(y)
2659		v0.AddArg(v2)
2660		v.AddArg(v0)
2661		return true
2662	}
2663}
2664func rewriteValuePPC64_OpLess16_0(v *Value) bool {
2665	b := v.Block
2666	typ := &b.Func.Config.Types
2667	// match: (Less16 x y)
2668	// result: (LessThan (CMPW (SignExt16to32 x) (SignExt16to32 y)))
2669	for {
2670		y := v.Args[1]
2671		x := v.Args[0]
2672		v.reset(OpPPC64LessThan)
2673		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
2674		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
2675		v1.AddArg(x)
2676		v0.AddArg(v1)
2677		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
2678		v2.AddArg(y)
2679		v0.AddArg(v2)
2680		v.AddArg(v0)
2681		return true
2682	}
2683}
2684func rewriteValuePPC64_OpLess16U_0(v *Value) bool {
2685	b := v.Block
2686	typ := &b.Func.Config.Types
2687	// match: (Less16U x y)
2688	// result: (LessThan (CMPWU (ZeroExt16to32 x) (ZeroExt16to32 y)))
2689	for {
2690		y := v.Args[1]
2691		x := v.Args[0]
2692		v.reset(OpPPC64LessThan)
2693		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
2694		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
2695		v1.AddArg(x)
2696		v0.AddArg(v1)
2697		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
2698		v2.AddArg(y)
2699		v0.AddArg(v2)
2700		v.AddArg(v0)
2701		return true
2702	}
2703}
2704func rewriteValuePPC64_OpLess32_0(v *Value) bool {
2705	b := v.Block
2706	// match: (Less32 x y)
2707	// result: (LessThan (CMPW x y))
2708	for {
2709		y := v.Args[1]
2710		x := v.Args[0]
2711		v.reset(OpPPC64LessThan)
2712		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
2713		v0.AddArg(x)
2714		v0.AddArg(y)
2715		v.AddArg(v0)
2716		return true
2717	}
2718}
2719func rewriteValuePPC64_OpLess32F_0(v *Value) bool {
2720	b := v.Block
2721	// match: (Less32F x y)
2722	// result: (FLessThan (FCMPU x y))
2723	for {
2724		y := v.Args[1]
2725		x := v.Args[0]
2726		v.reset(OpPPC64FLessThan)
2727		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
2728		v0.AddArg(x)
2729		v0.AddArg(y)
2730		v.AddArg(v0)
2731		return true
2732	}
2733}
2734func rewriteValuePPC64_OpLess32U_0(v *Value) bool {
2735	b := v.Block
2736	// match: (Less32U x y)
2737	// result: (LessThan (CMPWU x y))
2738	for {
2739		y := v.Args[1]
2740		x := v.Args[0]
2741		v.reset(OpPPC64LessThan)
2742		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
2743		v0.AddArg(x)
2744		v0.AddArg(y)
2745		v.AddArg(v0)
2746		return true
2747	}
2748}
2749func rewriteValuePPC64_OpLess64_0(v *Value) bool {
2750	b := v.Block
2751	// match: (Less64 x y)
2752	// result: (LessThan (CMP x y))
2753	for {
2754		y := v.Args[1]
2755		x := v.Args[0]
2756		v.reset(OpPPC64LessThan)
2757		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
2758		v0.AddArg(x)
2759		v0.AddArg(y)
2760		v.AddArg(v0)
2761		return true
2762	}
2763}
2764func rewriteValuePPC64_OpLess64F_0(v *Value) bool {
2765	b := v.Block
2766	// match: (Less64F x y)
2767	// result: (FLessThan (FCMPU x y))
2768	for {
2769		y := v.Args[1]
2770		x := v.Args[0]
2771		v.reset(OpPPC64FLessThan)
2772		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
2773		v0.AddArg(x)
2774		v0.AddArg(y)
2775		v.AddArg(v0)
2776		return true
2777	}
2778}
2779func rewriteValuePPC64_OpLess64U_0(v *Value) bool {
2780	b := v.Block
2781	// match: (Less64U x y)
2782	// result: (LessThan (CMPU x y))
2783	for {
2784		y := v.Args[1]
2785		x := v.Args[0]
2786		v.reset(OpPPC64LessThan)
2787		v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
2788		v0.AddArg(x)
2789		v0.AddArg(y)
2790		v.AddArg(v0)
2791		return true
2792	}
2793}
2794func rewriteValuePPC64_OpLess8_0(v *Value) bool {
2795	b := v.Block
2796	typ := &b.Func.Config.Types
2797	// match: (Less8 x y)
2798	// result: (LessThan (CMPW (SignExt8to32 x) (SignExt8to32 y)))
2799	for {
2800		y := v.Args[1]
2801		x := v.Args[0]
2802		v.reset(OpPPC64LessThan)
2803		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
2804		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
2805		v1.AddArg(x)
2806		v0.AddArg(v1)
2807		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
2808		v2.AddArg(y)
2809		v0.AddArg(v2)
2810		v.AddArg(v0)
2811		return true
2812	}
2813}
2814func rewriteValuePPC64_OpLess8U_0(v *Value) bool {
2815	b := v.Block
2816	typ := &b.Func.Config.Types
2817	// match: (Less8U x y)
2818	// result: (LessThan (CMPWU (ZeroExt8to32 x) (ZeroExt8to32 y)))
2819	for {
2820		y := v.Args[1]
2821		x := v.Args[0]
2822		v.reset(OpPPC64LessThan)
2823		v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
2824		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
2825		v1.AddArg(x)
2826		v0.AddArg(v1)
2827		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
2828		v2.AddArg(y)
2829		v0.AddArg(v2)
2830		v.AddArg(v0)
2831		return true
2832	}
2833}
2834func rewriteValuePPC64_OpLoad_0(v *Value) bool {
2835	b := v.Block
2836	typ := &b.Func.Config.Types
2837	// match: (Load <t> ptr mem)
2838	// cond: (is64BitInt(t) || isPtr(t))
2839	// result: (MOVDload ptr mem)
2840	for {
2841		t := v.Type
2842		mem := v.Args[1]
2843		ptr := v.Args[0]
2844		if !(is64BitInt(t) || isPtr(t)) {
2845			break
2846		}
2847		v.reset(OpPPC64MOVDload)
2848		v.AddArg(ptr)
2849		v.AddArg(mem)
2850		return true
2851	}
2852	// match: (Load <t> ptr mem)
2853	// cond: is32BitInt(t) && isSigned(t)
2854	// result: (MOVWload ptr mem)
2855	for {
2856		t := v.Type
2857		mem := v.Args[1]
2858		ptr := v.Args[0]
2859		if !(is32BitInt(t) && isSigned(t)) {
2860			break
2861		}
2862		v.reset(OpPPC64MOVWload)
2863		v.AddArg(ptr)
2864		v.AddArg(mem)
2865		return true
2866	}
2867	// match: (Load <t> ptr mem)
2868	// cond: is32BitInt(t) && !isSigned(t)
2869	// result: (MOVWZload ptr mem)
2870	for {
2871		t := v.Type
2872		mem := v.Args[1]
2873		ptr := v.Args[0]
2874		if !(is32BitInt(t) && !isSigned(t)) {
2875			break
2876		}
2877		v.reset(OpPPC64MOVWZload)
2878		v.AddArg(ptr)
2879		v.AddArg(mem)
2880		return true
2881	}
2882	// match: (Load <t> ptr mem)
2883	// cond: is16BitInt(t) && isSigned(t)
2884	// result: (MOVHload ptr mem)
2885	for {
2886		t := v.Type
2887		mem := v.Args[1]
2888		ptr := v.Args[0]
2889		if !(is16BitInt(t) && isSigned(t)) {
2890			break
2891		}
2892		v.reset(OpPPC64MOVHload)
2893		v.AddArg(ptr)
2894		v.AddArg(mem)
2895		return true
2896	}
2897	// match: (Load <t> ptr mem)
2898	// cond: is16BitInt(t) && !isSigned(t)
2899	// result: (MOVHZload ptr mem)
2900	for {
2901		t := v.Type
2902		mem := v.Args[1]
2903		ptr := v.Args[0]
2904		if !(is16BitInt(t) && !isSigned(t)) {
2905			break
2906		}
2907		v.reset(OpPPC64MOVHZload)
2908		v.AddArg(ptr)
2909		v.AddArg(mem)
2910		return true
2911	}
2912	// match: (Load <t> ptr mem)
2913	// cond: t.IsBoolean()
2914	// result: (MOVBZload ptr mem)
2915	for {
2916		t := v.Type
2917		mem := v.Args[1]
2918		ptr := v.Args[0]
2919		if !(t.IsBoolean()) {
2920			break
2921		}
2922		v.reset(OpPPC64MOVBZload)
2923		v.AddArg(ptr)
2924		v.AddArg(mem)
2925		return true
2926	}
2927	// match: (Load <t> ptr mem)
2928	// cond: is8BitInt(t) && isSigned(t)
2929	// result: (MOVBreg (MOVBZload ptr mem))
2930	for {
2931		t := v.Type
2932		mem := v.Args[1]
2933		ptr := v.Args[0]
2934		if !(is8BitInt(t) && isSigned(t)) {
2935			break
2936		}
2937		v.reset(OpPPC64MOVBreg)
2938		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
2939		v0.AddArg(ptr)
2940		v0.AddArg(mem)
2941		v.AddArg(v0)
2942		return true
2943	}
2944	// match: (Load <t> ptr mem)
2945	// cond: is8BitInt(t) && !isSigned(t)
2946	// result: (MOVBZload ptr mem)
2947	for {
2948		t := v.Type
2949		mem := v.Args[1]
2950		ptr := v.Args[0]
2951		if !(is8BitInt(t) && !isSigned(t)) {
2952			break
2953		}
2954		v.reset(OpPPC64MOVBZload)
2955		v.AddArg(ptr)
2956		v.AddArg(mem)
2957		return true
2958	}
2959	// match: (Load <t> ptr mem)
2960	// cond: is32BitFloat(t)
2961	// result: (FMOVSload ptr mem)
2962	for {
2963		t := v.Type
2964		mem := v.Args[1]
2965		ptr := v.Args[0]
2966		if !(is32BitFloat(t)) {
2967			break
2968		}
2969		v.reset(OpPPC64FMOVSload)
2970		v.AddArg(ptr)
2971		v.AddArg(mem)
2972		return true
2973	}
2974	// match: (Load <t> ptr mem)
2975	// cond: is64BitFloat(t)
2976	// result: (FMOVDload ptr mem)
2977	for {
2978		t := v.Type
2979		mem := v.Args[1]
2980		ptr := v.Args[0]
2981		if !(is64BitFloat(t)) {
2982			break
2983		}
2984		v.reset(OpPPC64FMOVDload)
2985		v.AddArg(ptr)
2986		v.AddArg(mem)
2987		return true
2988	}
2989	return false
2990}
2991func rewriteValuePPC64_OpLocalAddr_0(v *Value) bool {
2992	// match: (LocalAddr {sym} base _)
2993	// result: (MOVDaddr {sym} base)
2994	for {
2995		sym := v.Aux
2996		_ = v.Args[1]
2997		base := v.Args[0]
2998		v.reset(OpPPC64MOVDaddr)
2999		v.Aux = sym
3000		v.AddArg(base)
3001		return true
3002	}
3003}
3004func rewriteValuePPC64_OpLsh16x16_0(v *Value) bool {
3005	b := v.Block
3006	typ := &b.Func.Config.Types
3007	// match: (Lsh16x16 x y)
3008	// cond: shiftIsBounded(v)
3009	// result: (SLW x y)
3010	for {
3011		y := v.Args[1]
3012		x := v.Args[0]
3013		if !(shiftIsBounded(v)) {
3014			break
3015		}
3016		v.reset(OpPPC64SLW)
3017		v.AddArg(x)
3018		v.AddArg(y)
3019		return true
3020	}
3021	// match: (Lsh16x16 x y)
3022	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt16to64 y)))))
3023	for {
3024		y := v.Args[1]
3025		x := v.Args[0]
3026		v.reset(OpPPC64SLW)
3027		v.AddArg(x)
3028		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
3029		v0.AddArg(y)
3030		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
3031		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
3032		v2.AuxInt = -16
3033		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
3034		v3.AddArg(y)
3035		v2.AddArg(v3)
3036		v1.AddArg(v2)
3037		v0.AddArg(v1)
3038		v.AddArg(v0)
3039		return true
3040	}
3041}
3042func rewriteValuePPC64_OpLsh16x32_0(v *Value) bool {
3043	b := v.Block
3044	typ := &b.Func.Config.Types
3045	// match: (Lsh16x32 x (Const64 [c]))
3046	// cond: uint32(c) < 16
3047	// result: (SLWconst x [c])
3048	for {
3049		_ = v.Args[1]
3050		x := v.Args[0]
3051		v_1 := v.Args[1]
3052		if v_1.Op != OpConst64 {
3053			break
3054		}
3055		c := v_1.AuxInt
3056		if !(uint32(c) < 16) {
3057			break
3058		}
3059		v.reset(OpPPC64SLWconst)
3060		v.AuxInt = c
3061		v.AddArg(x)
3062		return true
3063	}
3064	// match: (Lsh16x32 x (MOVDconst [c]))
3065	// cond: uint32(c) < 16
3066	// result: (SLWconst x [c])
3067	for {
3068		_ = v.Args[1]
3069		x := v.Args[0]
3070		v_1 := v.Args[1]
3071		if v_1.Op != OpPPC64MOVDconst {
3072			break
3073		}
3074		c := v_1.AuxInt
3075		if !(uint32(c) < 16) {
3076			break
3077		}
3078		v.reset(OpPPC64SLWconst)
3079		v.AuxInt = c
3080		v.AddArg(x)
3081		return true
3082	}
3083	// match: (Lsh16x32 x y)
3084	// cond: shiftIsBounded(v)
3085	// result: (SLW x y)
3086	for {
3087		y := v.Args[1]
3088		x := v.Args[0]
3089		if !(shiftIsBounded(v)) {
3090			break
3091		}
3092		v.reset(OpPPC64SLW)
3093		v.AddArg(x)
3094		v.AddArg(y)
3095		return true
3096	}
3097	// match: (Lsh16x32 x y)
3098	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt32to64 y)))))
3099	for {
3100		y := v.Args[1]
3101		x := v.Args[0]
3102		v.reset(OpPPC64SLW)
3103		v.AddArg(x)
3104		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
3105		v0.AddArg(y)
3106		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
3107		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
3108		v2.AuxInt = -16
3109		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
3110		v3.AddArg(y)
3111		v2.AddArg(v3)
3112		v1.AddArg(v2)
3113		v0.AddArg(v1)
3114		v.AddArg(v0)
3115		return true
3116	}
3117}
3118func rewriteValuePPC64_OpLsh16x64_0(v *Value) bool {
3119	b := v.Block
3120	typ := &b.Func.Config.Types
3121	// match: (Lsh16x64 x (Const64 [c]))
3122	// cond: uint64(c) < 16
3123	// result: (SLWconst x [c])
3124	for {
3125		_ = v.Args[1]
3126		x := v.Args[0]
3127		v_1 := v.Args[1]
3128		if v_1.Op != OpConst64 {
3129			break
3130		}
3131		c := v_1.AuxInt
3132		if !(uint64(c) < 16) {
3133			break
3134		}
3135		v.reset(OpPPC64SLWconst)
3136		v.AuxInt = c
3137		v.AddArg(x)
3138		return true
3139	}
3140	// match: (Lsh16x64 _ (Const64 [c]))
3141	// cond: uint64(c) >= 16
3142	// result: (MOVDconst [0])
3143	for {
3144		_ = v.Args[1]
3145		v_1 := v.Args[1]
3146		if v_1.Op != OpConst64 {
3147			break
3148		}
3149		c := v_1.AuxInt
3150		if !(uint64(c) >= 16) {
3151			break
3152		}
3153		v.reset(OpPPC64MOVDconst)
3154		v.AuxInt = 0
3155		return true
3156	}
3157	// match: (Lsh16x64 x (MOVDconst [c]))
3158	// cond: uint64(c) < 16
3159	// result: (SLWconst x [c])
3160	for {
3161		_ = v.Args[1]
3162		x := v.Args[0]
3163		v_1 := v.Args[1]
3164		if v_1.Op != OpPPC64MOVDconst {
3165			break
3166		}
3167		c := v_1.AuxInt
3168		if !(uint64(c) < 16) {
3169			break
3170		}
3171		v.reset(OpPPC64SLWconst)
3172		v.AuxInt = c
3173		v.AddArg(x)
3174		return true
3175	}
3176	// match: (Lsh16x64 x y)
3177	// cond: shiftIsBounded(v)
3178	// result: (SLW x y)
3179	for {
3180		y := v.Args[1]
3181		x := v.Args[0]
3182		if !(shiftIsBounded(v)) {
3183			break
3184		}
3185		v.reset(OpPPC64SLW)
3186		v.AddArg(x)
3187		v.AddArg(y)
3188		return true
3189	}
3190	// match: (Lsh16x64 x y)
3191	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] y))))
3192	for {
3193		y := v.Args[1]
3194		x := v.Args[0]
3195		v.reset(OpPPC64SLW)
3196		v.AddArg(x)
3197		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
3198		v0.AddArg(y)
3199		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
3200		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
3201		v2.AuxInt = -16
3202		v2.AddArg(y)
3203		v1.AddArg(v2)
3204		v0.AddArg(v1)
3205		v.AddArg(v0)
3206		return true
3207	}
3208}
3209func rewriteValuePPC64_OpLsh16x8_0(v *Value) bool {
3210	b := v.Block
3211	typ := &b.Func.Config.Types
3212	// match: (Lsh16x8 x y)
3213	// cond: shiftIsBounded(v)
3214	// result: (SLW x y)
3215	for {
3216		y := v.Args[1]
3217		x := v.Args[0]
3218		if !(shiftIsBounded(v)) {
3219			break
3220		}
3221		v.reset(OpPPC64SLW)
3222		v.AddArg(x)
3223		v.AddArg(y)
3224		return true
3225	}
3226	// match: (Lsh16x8 x y)
3227	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt8to64 y)))))
3228	for {
3229		y := v.Args[1]
3230		x := v.Args[0]
3231		v.reset(OpPPC64SLW)
3232		v.AddArg(x)
3233		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
3234		v0.AddArg(y)
3235		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
3236		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
3237		v2.AuxInt = -16
3238		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
3239		v3.AddArg(y)
3240		v2.AddArg(v3)
3241		v1.AddArg(v2)
3242		v0.AddArg(v1)
3243		v.AddArg(v0)
3244		return true
3245	}
3246}
3247func rewriteValuePPC64_OpLsh32x16_0(v *Value) bool {
3248	b := v.Block
3249	typ := &b.Func.Config.Types
3250	// match: (Lsh32x16 x y)
3251	// cond: shiftIsBounded(v)
3252	// result: (SLW x y)
3253	for {
3254		y := v.Args[1]
3255		x := v.Args[0]
3256		if !(shiftIsBounded(v)) {
3257			break
3258		}
3259		v.reset(OpPPC64SLW)
3260		v.AddArg(x)
3261		v.AddArg(y)
3262		return true
3263	}
3264	// match: (Lsh32x16 x y)
3265	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt16to64 y)))))
3266	for {
3267		y := v.Args[1]
3268		x := v.Args[0]
3269		v.reset(OpPPC64SLW)
3270		v.AddArg(x)
3271		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
3272		v0.AddArg(y)
3273		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
3274		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
3275		v2.AuxInt = -32
3276		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
3277		v3.AddArg(y)
3278		v2.AddArg(v3)
3279		v1.AddArg(v2)
3280		v0.AddArg(v1)
3281		v.AddArg(v0)
3282		return true
3283	}
3284}
3285func rewriteValuePPC64_OpLsh32x32_0(v *Value) bool {
3286	b := v.Block
3287	typ := &b.Func.Config.Types
3288	// match: (Lsh32x32 x (Const64 [c]))
3289	// cond: uint32(c) < 32
3290	// result: (SLWconst x [c])
3291	for {
3292		_ = v.Args[1]
3293		x := v.Args[0]
3294		v_1 := v.Args[1]
3295		if v_1.Op != OpConst64 {
3296			break
3297		}
3298		c := v_1.AuxInt
3299		if !(uint32(c) < 32) {
3300			break
3301		}
3302		v.reset(OpPPC64SLWconst)
3303		v.AuxInt = c
3304		v.AddArg(x)
3305		return true
3306	}
3307	// match: (Lsh32x32 x (MOVDconst [c]))
3308	// cond: uint32(c) < 32
3309	// result: (SLWconst x [c])
3310	for {
3311		_ = v.Args[1]
3312		x := v.Args[0]
3313		v_1 := v.Args[1]
3314		if v_1.Op != OpPPC64MOVDconst {
3315			break
3316		}
3317		c := v_1.AuxInt
3318		if !(uint32(c) < 32) {
3319			break
3320		}
3321		v.reset(OpPPC64SLWconst)
3322		v.AuxInt = c
3323		v.AddArg(x)
3324		return true
3325	}
3326	// match: (Lsh32x32 x y)
3327	// cond: shiftIsBounded(v)
3328	// result: (SLW x y)
3329	for {
3330		y := v.Args[1]
3331		x := v.Args[0]
3332		if !(shiftIsBounded(v)) {
3333			break
3334		}
3335		v.reset(OpPPC64SLW)
3336		v.AddArg(x)
3337		v.AddArg(y)
3338		return true
3339	}
3340	// match: (Lsh32x32 x y)
3341	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt32to64 y)))))
3342	for {
3343		y := v.Args[1]
3344		x := v.Args[0]
3345		v.reset(OpPPC64SLW)
3346		v.AddArg(x)
3347		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
3348		v0.AddArg(y)
3349		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
3350		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
3351		v2.AuxInt = -32
3352		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
3353		v3.AddArg(y)
3354		v2.AddArg(v3)
3355		v1.AddArg(v2)
3356		v0.AddArg(v1)
3357		v.AddArg(v0)
3358		return true
3359	}
3360}
3361func rewriteValuePPC64_OpLsh32x64_0(v *Value) bool {
3362	b := v.Block
3363	typ := &b.Func.Config.Types
3364	// match: (Lsh32x64 x (Const64 [c]))
3365	// cond: uint64(c) < 32
3366	// result: (SLWconst x [c])
3367	for {
3368		_ = v.Args[1]
3369		x := v.Args[0]
3370		v_1 := v.Args[1]
3371		if v_1.Op != OpConst64 {
3372			break
3373		}
3374		c := v_1.AuxInt
3375		if !(uint64(c) < 32) {
3376			break
3377		}
3378		v.reset(OpPPC64SLWconst)
3379		v.AuxInt = c
3380		v.AddArg(x)
3381		return true
3382	}
3383	// match: (Lsh32x64 _ (Const64 [c]))
3384	// cond: uint64(c) >= 32
3385	// result: (MOVDconst [0])
3386	for {
3387		_ = v.Args[1]
3388		v_1 := v.Args[1]
3389		if v_1.Op != OpConst64 {
3390			break
3391		}
3392		c := v_1.AuxInt
3393		if !(uint64(c) >= 32) {
3394			break
3395		}
3396		v.reset(OpPPC64MOVDconst)
3397		v.AuxInt = 0
3398		return true
3399	}
3400	// match: (Lsh32x64 x (MOVDconst [c]))
3401	// cond: uint64(c) < 32
3402	// result: (SLWconst x [c])
3403	for {
3404		_ = v.Args[1]
3405		x := v.Args[0]
3406		v_1 := v.Args[1]
3407		if v_1.Op != OpPPC64MOVDconst {
3408			break
3409		}
3410		c := v_1.AuxInt
3411		if !(uint64(c) < 32) {
3412			break
3413		}
3414		v.reset(OpPPC64SLWconst)
3415		v.AuxInt = c
3416		v.AddArg(x)
3417		return true
3418	}
3419	// match: (Lsh32x64 x y)
3420	// cond: shiftIsBounded(v)
3421	// result: (SLW x y)
3422	for {
3423		y := v.Args[1]
3424		x := v.Args[0]
3425		if !(shiftIsBounded(v)) {
3426			break
3427		}
3428		v.reset(OpPPC64SLW)
3429		v.AddArg(x)
3430		v.AddArg(y)
3431		return true
3432	}
3433	// match: (Lsh32x64 x (AND y (MOVDconst [31])))
3434	// result: (SLW x (ANDconst <typ.Int32> [31] y))
3435	for {
3436		_ = v.Args[1]
3437		x := v.Args[0]
3438		v_1 := v.Args[1]
3439		if v_1.Op != OpPPC64AND {
3440			break
3441		}
3442		_ = v_1.Args[1]
3443		y := v_1.Args[0]
3444		v_1_1 := v_1.Args[1]
3445		if v_1_1.Op != OpPPC64MOVDconst || v_1_1.AuxInt != 31 {
3446			break
3447		}
3448		v.reset(OpPPC64SLW)
3449		v.AddArg(x)
3450		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
3451		v0.AuxInt = 31
3452		v0.AddArg(y)
3453		v.AddArg(v0)
3454		return true
3455	}
3456	// match: (Lsh32x64 x (AND (MOVDconst [31]) y))
3457	// result: (SLW x (ANDconst <typ.Int32> [31] y))
3458	for {
3459		_ = v.Args[1]
3460		x := v.Args[0]
3461		v_1 := v.Args[1]
3462		if v_1.Op != OpPPC64AND {
3463			break
3464		}
3465		y := v_1.Args[1]
3466		v_1_0 := v_1.Args[0]
3467		if v_1_0.Op != OpPPC64MOVDconst || v_1_0.AuxInt != 31 {
3468			break
3469		}
3470		v.reset(OpPPC64SLW)
3471		v.AddArg(x)
3472		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
3473		v0.AuxInt = 31
3474		v0.AddArg(y)
3475		v.AddArg(v0)
3476		return true
3477	}
3478	// match: (Lsh32x64 x (ANDconst <typ.Int32> [31] y))
3479	// result: (SLW x (ANDconst <typ.Int32> [31] y))
3480	for {
3481		_ = v.Args[1]
3482		x := v.Args[0]
3483		v_1 := v.Args[1]
3484		if v_1.Op != OpPPC64ANDconst || v_1.Type != typ.Int32 || v_1.AuxInt != 31 {
3485			break
3486		}
3487		y := v_1.Args[0]
3488		v.reset(OpPPC64SLW)
3489		v.AddArg(x)
3490		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
3491		v0.AuxInt = 31
3492		v0.AddArg(y)
3493		v.AddArg(v0)
3494		return true
3495	}
3496	// match: (Lsh32x64 x y)
3497	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] y))))
3498	for {
3499		y := v.Args[1]
3500		x := v.Args[0]
3501		v.reset(OpPPC64SLW)
3502		v.AddArg(x)
3503		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
3504		v0.AddArg(y)
3505		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
3506		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
3507		v2.AuxInt = -32
3508		v2.AddArg(y)
3509		v1.AddArg(v2)
3510		v0.AddArg(v1)
3511		v.AddArg(v0)
3512		return true
3513	}
3514}
3515func rewriteValuePPC64_OpLsh32x8_0(v *Value) bool {
3516	b := v.Block
3517	typ := &b.Func.Config.Types
3518	// match: (Lsh32x8 x y)
3519	// cond: shiftIsBounded(v)
3520	// result: (SLW x y)
3521	for {
3522		y := v.Args[1]
3523		x := v.Args[0]
3524		if !(shiftIsBounded(v)) {
3525			break
3526		}
3527		v.reset(OpPPC64SLW)
3528		v.AddArg(x)
3529		v.AddArg(y)
3530		return true
3531	}
3532	// match: (Lsh32x8 x y)
3533	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt8to64 y)))))
3534	for {
3535		y := v.Args[1]
3536		x := v.Args[0]
3537		v.reset(OpPPC64SLW)
3538		v.AddArg(x)
3539		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
3540		v0.AddArg(y)
3541		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
3542		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
3543		v2.AuxInt = -32
3544		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
3545		v3.AddArg(y)
3546		v2.AddArg(v3)
3547		v1.AddArg(v2)
3548		v0.AddArg(v1)
3549		v.AddArg(v0)
3550		return true
3551	}
3552}
3553func rewriteValuePPC64_OpLsh64x16_0(v *Value) bool {
3554	b := v.Block
3555	typ := &b.Func.Config.Types
3556	// match: (Lsh64x16 x y)
3557	// cond: shiftIsBounded(v)
3558	// result: (SLD x y)
3559	for {
3560		y := v.Args[1]
3561		x := v.Args[0]
3562		if !(shiftIsBounded(v)) {
3563			break
3564		}
3565		v.reset(OpPPC64SLD)
3566		v.AddArg(x)
3567		v.AddArg(y)
3568		return true
3569	}
3570	// match: (Lsh64x16 x y)
3571	// result: (SLD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt16to64 y)))))
3572	for {
3573		y := v.Args[1]
3574		x := v.Args[0]
3575		v.reset(OpPPC64SLD)
3576		v.AddArg(x)
3577		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
3578		v0.AddArg(y)
3579		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
3580		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
3581		v2.AuxInt = -64
3582		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
3583		v3.AddArg(y)
3584		v2.AddArg(v3)
3585		v1.AddArg(v2)
3586		v0.AddArg(v1)
3587		v.AddArg(v0)
3588		return true
3589	}
3590}
3591func rewriteValuePPC64_OpLsh64x32_0(v *Value) bool {
3592	b := v.Block
3593	typ := &b.Func.Config.Types
3594	// match: (Lsh64x32 x (Const64 [c]))
3595	// cond: uint32(c) < 64
3596	// result: (SLDconst x [c])
3597	for {
3598		_ = v.Args[1]
3599		x := v.Args[0]
3600		v_1 := v.Args[1]
3601		if v_1.Op != OpConst64 {
3602			break
3603		}
3604		c := v_1.AuxInt
3605		if !(uint32(c) < 64) {
3606			break
3607		}
3608		v.reset(OpPPC64SLDconst)
3609		v.AuxInt = c
3610		v.AddArg(x)
3611		return true
3612	}
3613	// match: (Lsh64x32 x (MOVDconst [c]))
3614	// cond: uint32(c) < 64
3615	// result: (SLDconst x [c])
3616	for {
3617		_ = v.Args[1]
3618		x := v.Args[0]
3619		v_1 := v.Args[1]
3620		if v_1.Op != OpPPC64MOVDconst {
3621			break
3622		}
3623		c := v_1.AuxInt
3624		if !(uint32(c) < 64) {
3625			break
3626		}
3627		v.reset(OpPPC64SLDconst)
3628		v.AuxInt = c
3629		v.AddArg(x)
3630		return true
3631	}
3632	// match: (Lsh64x32 x y)
3633	// cond: shiftIsBounded(v)
3634	// result: (SLD x y)
3635	for {
3636		y := v.Args[1]
3637		x := v.Args[0]
3638		if !(shiftIsBounded(v)) {
3639			break
3640		}
3641		v.reset(OpPPC64SLD)
3642		v.AddArg(x)
3643		v.AddArg(y)
3644		return true
3645	}
3646	// match: (Lsh64x32 x y)
3647	// result: (SLD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt32to64 y)))))
3648	for {
3649		y := v.Args[1]
3650		x := v.Args[0]
3651		v.reset(OpPPC64SLD)
3652		v.AddArg(x)
3653		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
3654		v0.AddArg(y)
3655		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
3656		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
3657		v2.AuxInt = -64
3658		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
3659		v3.AddArg(y)
3660		v2.AddArg(v3)
3661		v1.AddArg(v2)
3662		v0.AddArg(v1)
3663		v.AddArg(v0)
3664		return true
3665	}
3666}
3667func rewriteValuePPC64_OpLsh64x64_0(v *Value) bool {
3668	b := v.Block
3669	typ := &b.Func.Config.Types
3670	// match: (Lsh64x64 x (Const64 [c]))
3671	// cond: uint64(c) < 64
3672	// result: (SLDconst x [c])
3673	for {
3674		_ = v.Args[1]
3675		x := v.Args[0]
3676		v_1 := v.Args[1]
3677		if v_1.Op != OpConst64 {
3678			break
3679		}
3680		c := v_1.AuxInt
3681		if !(uint64(c) < 64) {
3682			break
3683		}
3684		v.reset(OpPPC64SLDconst)
3685		v.AuxInt = c
3686		v.AddArg(x)
3687		return true
3688	}
3689	// match: (Lsh64x64 _ (Const64 [c]))
3690	// cond: uint64(c) >= 64
3691	// result: (MOVDconst [0])
3692	for {
3693		_ = v.Args[1]
3694		v_1 := v.Args[1]
3695		if v_1.Op != OpConst64 {
3696			break
3697		}
3698		c := v_1.AuxInt
3699		if !(uint64(c) >= 64) {
3700			break
3701		}
3702		v.reset(OpPPC64MOVDconst)
3703		v.AuxInt = 0
3704		return true
3705	}
3706	// match: (Lsh64x64 x (MOVDconst [c]))
3707	// cond: uint64(c) < 64
3708	// result: (SLDconst x [c])
3709	for {
3710		_ = v.Args[1]
3711		x := v.Args[0]
3712		v_1 := v.Args[1]
3713		if v_1.Op != OpPPC64MOVDconst {
3714			break
3715		}
3716		c := v_1.AuxInt
3717		if !(uint64(c) < 64) {
3718			break
3719		}
3720		v.reset(OpPPC64SLDconst)
3721		v.AuxInt = c
3722		v.AddArg(x)
3723		return true
3724	}
3725	// match: (Lsh64x64 x y)
3726	// cond: shiftIsBounded(v)
3727	// result: (SLD x y)
3728	for {
3729		y := v.Args[1]
3730		x := v.Args[0]
3731		if !(shiftIsBounded(v)) {
3732			break
3733		}
3734		v.reset(OpPPC64SLD)
3735		v.AddArg(x)
3736		v.AddArg(y)
3737		return true
3738	}
3739	// match: (Lsh64x64 x (AND y (MOVDconst [63])))
3740	// result: (SLD x (ANDconst <typ.Int64> [63] y))
3741	for {
3742		_ = v.Args[1]
3743		x := v.Args[0]
3744		v_1 := v.Args[1]
3745		if v_1.Op != OpPPC64AND {
3746			break
3747		}
3748		_ = v_1.Args[1]
3749		y := v_1.Args[0]
3750		v_1_1 := v_1.Args[1]
3751		if v_1_1.Op != OpPPC64MOVDconst || v_1_1.AuxInt != 63 {
3752			break
3753		}
3754		v.reset(OpPPC64SLD)
3755		v.AddArg(x)
3756		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
3757		v0.AuxInt = 63
3758		v0.AddArg(y)
3759		v.AddArg(v0)
3760		return true
3761	}
3762	// match: (Lsh64x64 x (AND (MOVDconst [63]) y))
3763	// result: (SLD x (ANDconst <typ.Int64> [63] y))
3764	for {
3765		_ = v.Args[1]
3766		x := v.Args[0]
3767		v_1 := v.Args[1]
3768		if v_1.Op != OpPPC64AND {
3769			break
3770		}
3771		y := v_1.Args[1]
3772		v_1_0 := v_1.Args[0]
3773		if v_1_0.Op != OpPPC64MOVDconst || v_1_0.AuxInt != 63 {
3774			break
3775		}
3776		v.reset(OpPPC64SLD)
3777		v.AddArg(x)
3778		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
3779		v0.AuxInt = 63
3780		v0.AddArg(y)
3781		v.AddArg(v0)
3782		return true
3783	}
3784	// match: (Lsh64x64 x (ANDconst <typ.Int64> [63] y))
3785	// result: (SLD x (ANDconst <typ.Int64> [63] y))
3786	for {
3787		_ = v.Args[1]
3788		x := v.Args[0]
3789		v_1 := v.Args[1]
3790		if v_1.Op != OpPPC64ANDconst || v_1.Type != typ.Int64 || v_1.AuxInt != 63 {
3791			break
3792		}
3793		y := v_1.Args[0]
3794		v.reset(OpPPC64SLD)
3795		v.AddArg(x)
3796		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
3797		v0.AuxInt = 63
3798		v0.AddArg(y)
3799		v.AddArg(v0)
3800		return true
3801	}
3802	// match: (Lsh64x64 x y)
3803	// result: (SLD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] y))))
3804	for {
3805		y := v.Args[1]
3806		x := v.Args[0]
3807		v.reset(OpPPC64SLD)
3808		v.AddArg(x)
3809		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
3810		v0.AddArg(y)
3811		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
3812		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
3813		v2.AuxInt = -64
3814		v2.AddArg(y)
3815		v1.AddArg(v2)
3816		v0.AddArg(v1)
3817		v.AddArg(v0)
3818		return true
3819	}
3820}
3821func rewriteValuePPC64_OpLsh64x8_0(v *Value) bool {
3822	b := v.Block
3823	typ := &b.Func.Config.Types
3824	// match: (Lsh64x8 x y)
3825	// cond: shiftIsBounded(v)
3826	// result: (SLD x y)
3827	for {
3828		y := v.Args[1]
3829		x := v.Args[0]
3830		if !(shiftIsBounded(v)) {
3831			break
3832		}
3833		v.reset(OpPPC64SLD)
3834		v.AddArg(x)
3835		v.AddArg(y)
3836		return true
3837	}
3838	// match: (Lsh64x8 x y)
3839	// result: (SLD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt8to64 y)))))
3840	for {
3841		y := v.Args[1]
3842		x := v.Args[0]
3843		v.reset(OpPPC64SLD)
3844		v.AddArg(x)
3845		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
3846		v0.AddArg(y)
3847		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
3848		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
3849		v2.AuxInt = -64
3850		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
3851		v3.AddArg(y)
3852		v2.AddArg(v3)
3853		v1.AddArg(v2)
3854		v0.AddArg(v1)
3855		v.AddArg(v0)
3856		return true
3857	}
3858}
3859func rewriteValuePPC64_OpLsh8x16_0(v *Value) bool {
3860	b := v.Block
3861	typ := &b.Func.Config.Types
3862	// match: (Lsh8x16 x y)
3863	// cond: shiftIsBounded(v)
3864	// result: (SLW x y)
3865	for {
3866		y := v.Args[1]
3867		x := v.Args[0]
3868		if !(shiftIsBounded(v)) {
3869			break
3870		}
3871		v.reset(OpPPC64SLW)
3872		v.AddArg(x)
3873		v.AddArg(y)
3874		return true
3875	}
3876	// match: (Lsh8x16 x y)
3877	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt16to64 y)))))
3878	for {
3879		y := v.Args[1]
3880		x := v.Args[0]
3881		v.reset(OpPPC64SLW)
3882		v.AddArg(x)
3883		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
3884		v0.AddArg(y)
3885		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
3886		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
3887		v2.AuxInt = -8
3888		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
3889		v3.AddArg(y)
3890		v2.AddArg(v3)
3891		v1.AddArg(v2)
3892		v0.AddArg(v1)
3893		v.AddArg(v0)
3894		return true
3895	}
3896}
3897func rewriteValuePPC64_OpLsh8x32_0(v *Value) bool {
3898	b := v.Block
3899	typ := &b.Func.Config.Types
3900	// match: (Lsh8x32 x (Const64 [c]))
3901	// cond: uint32(c) < 8
3902	// result: (SLWconst x [c])
3903	for {
3904		_ = v.Args[1]
3905		x := v.Args[0]
3906		v_1 := v.Args[1]
3907		if v_1.Op != OpConst64 {
3908			break
3909		}
3910		c := v_1.AuxInt
3911		if !(uint32(c) < 8) {
3912			break
3913		}
3914		v.reset(OpPPC64SLWconst)
3915		v.AuxInt = c
3916		v.AddArg(x)
3917		return true
3918	}
3919	// match: (Lsh8x32 x (MOVDconst [c]))
3920	// cond: uint32(c) < 8
3921	// result: (SLWconst x [c])
3922	for {
3923		_ = v.Args[1]
3924		x := v.Args[0]
3925		v_1 := v.Args[1]
3926		if v_1.Op != OpPPC64MOVDconst {
3927			break
3928		}
3929		c := v_1.AuxInt
3930		if !(uint32(c) < 8) {
3931			break
3932		}
3933		v.reset(OpPPC64SLWconst)
3934		v.AuxInt = c
3935		v.AddArg(x)
3936		return true
3937	}
3938	// match: (Lsh8x32 x y)
3939	// cond: shiftIsBounded(v)
3940	// result: (SLW x y)
3941	for {
3942		y := v.Args[1]
3943		x := v.Args[0]
3944		if !(shiftIsBounded(v)) {
3945			break
3946		}
3947		v.reset(OpPPC64SLW)
3948		v.AddArg(x)
3949		v.AddArg(y)
3950		return true
3951	}
3952	// match: (Lsh8x32 x y)
3953	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt32to64 y)))))
3954	for {
3955		y := v.Args[1]
3956		x := v.Args[0]
3957		v.reset(OpPPC64SLW)
3958		v.AddArg(x)
3959		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
3960		v0.AddArg(y)
3961		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
3962		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
3963		v2.AuxInt = -8
3964		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
3965		v3.AddArg(y)
3966		v2.AddArg(v3)
3967		v1.AddArg(v2)
3968		v0.AddArg(v1)
3969		v.AddArg(v0)
3970		return true
3971	}
3972}
3973func rewriteValuePPC64_OpLsh8x64_0(v *Value) bool {
3974	b := v.Block
3975	typ := &b.Func.Config.Types
3976	// match: (Lsh8x64 x (Const64 [c]))
3977	// cond: uint64(c) < 8
3978	// result: (SLWconst x [c])
3979	for {
3980		_ = v.Args[1]
3981		x := v.Args[0]
3982		v_1 := v.Args[1]
3983		if v_1.Op != OpConst64 {
3984			break
3985		}
3986		c := v_1.AuxInt
3987		if !(uint64(c) < 8) {
3988			break
3989		}
3990		v.reset(OpPPC64SLWconst)
3991		v.AuxInt = c
3992		v.AddArg(x)
3993		return true
3994	}
3995	// match: (Lsh8x64 _ (Const64 [c]))
3996	// cond: uint64(c) >= 8
3997	// result: (MOVDconst [0])
3998	for {
3999		_ = v.Args[1]
4000		v_1 := v.Args[1]
4001		if v_1.Op != OpConst64 {
4002			break
4003		}
4004		c := v_1.AuxInt
4005		if !(uint64(c) >= 8) {
4006			break
4007		}
4008		v.reset(OpPPC64MOVDconst)
4009		v.AuxInt = 0
4010		return true
4011	}
4012	// match: (Lsh8x64 x (MOVDconst [c]))
4013	// cond: uint64(c) < 8
4014	// result: (SLWconst x [c])
4015	for {
4016		_ = v.Args[1]
4017		x := v.Args[0]
4018		v_1 := v.Args[1]
4019		if v_1.Op != OpPPC64MOVDconst {
4020			break
4021		}
4022		c := v_1.AuxInt
4023		if !(uint64(c) < 8) {
4024			break
4025		}
4026		v.reset(OpPPC64SLWconst)
4027		v.AuxInt = c
4028		v.AddArg(x)
4029		return true
4030	}
4031	// match: (Lsh8x64 x y)
4032	// cond: shiftIsBounded(v)
4033	// result: (SLW x y)
4034	for {
4035		y := v.Args[1]
4036		x := v.Args[0]
4037		if !(shiftIsBounded(v)) {
4038			break
4039		}
4040		v.reset(OpPPC64SLW)
4041		v.AddArg(x)
4042		v.AddArg(y)
4043		return true
4044	}
4045	// match: (Lsh8x64 x y)
4046	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] y))))
4047	for {
4048		y := v.Args[1]
4049		x := v.Args[0]
4050		v.reset(OpPPC64SLW)
4051		v.AddArg(x)
4052		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
4053		v0.AddArg(y)
4054		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
4055		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
4056		v2.AuxInt = -8
4057		v2.AddArg(y)
4058		v1.AddArg(v2)
4059		v0.AddArg(v1)
4060		v.AddArg(v0)
4061		return true
4062	}
4063}
4064func rewriteValuePPC64_OpLsh8x8_0(v *Value) bool {
4065	b := v.Block
4066	typ := &b.Func.Config.Types
4067	// match: (Lsh8x8 x y)
4068	// cond: shiftIsBounded(v)
4069	// result: (SLW x y)
4070	for {
4071		y := v.Args[1]
4072		x := v.Args[0]
4073		if !(shiftIsBounded(v)) {
4074			break
4075		}
4076		v.reset(OpPPC64SLW)
4077		v.AddArg(x)
4078		v.AddArg(y)
4079		return true
4080	}
4081	// match: (Lsh8x8 x y)
4082	// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt8to64 y)))))
4083	for {
4084		y := v.Args[1]
4085		x := v.Args[0]
4086		v.reset(OpPPC64SLW)
4087		v.AddArg(x)
4088		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
4089		v0.AddArg(y)
4090		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
4091		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
4092		v2.AuxInt = -8
4093		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
4094		v3.AddArg(y)
4095		v2.AddArg(v3)
4096		v1.AddArg(v2)
4097		v0.AddArg(v1)
4098		v.AddArg(v0)
4099		return true
4100	}
4101}
4102func rewriteValuePPC64_OpMod16_0(v *Value) bool {
4103	b := v.Block
4104	typ := &b.Func.Config.Types
4105	// match: (Mod16 x y)
4106	// result: (Mod32 (SignExt16to32 x) (SignExt16to32 y))
4107	for {
4108		y := v.Args[1]
4109		x := v.Args[0]
4110		v.reset(OpMod32)
4111		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
4112		v0.AddArg(x)
4113		v.AddArg(v0)
4114		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
4115		v1.AddArg(y)
4116		v.AddArg(v1)
4117		return true
4118	}
4119}
4120func rewriteValuePPC64_OpMod16u_0(v *Value) bool {
4121	b := v.Block
4122	typ := &b.Func.Config.Types
4123	// match: (Mod16u x y)
4124	// result: (Mod32u (ZeroExt16to32 x) (ZeroExt16to32 y))
4125	for {
4126		y := v.Args[1]
4127		x := v.Args[0]
4128		v.reset(OpMod32u)
4129		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
4130		v0.AddArg(x)
4131		v.AddArg(v0)
4132		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
4133		v1.AddArg(y)
4134		v.AddArg(v1)
4135		return true
4136	}
4137}
4138func rewriteValuePPC64_OpMod32_0(v *Value) bool {
4139	b := v.Block
4140	typ := &b.Func.Config.Types
4141	// match: (Mod32 x y)
4142	// result: (SUB x (MULLW y (DIVW x y)))
4143	for {
4144		y := v.Args[1]
4145		x := v.Args[0]
4146		v.reset(OpPPC64SUB)
4147		v.AddArg(x)
4148		v0 := b.NewValue0(v.Pos, OpPPC64MULLW, typ.Int32)
4149		v0.AddArg(y)
4150		v1 := b.NewValue0(v.Pos, OpPPC64DIVW, typ.Int32)
4151		v1.AddArg(x)
4152		v1.AddArg(y)
4153		v0.AddArg(v1)
4154		v.AddArg(v0)
4155		return true
4156	}
4157}
4158func rewriteValuePPC64_OpMod32u_0(v *Value) bool {
4159	b := v.Block
4160	typ := &b.Func.Config.Types
4161	// match: (Mod32u x y)
4162	// result: (SUB x (MULLW y (DIVWU x y)))
4163	for {
4164		y := v.Args[1]
4165		x := v.Args[0]
4166		v.reset(OpPPC64SUB)
4167		v.AddArg(x)
4168		v0 := b.NewValue0(v.Pos, OpPPC64MULLW, typ.Int32)
4169		v0.AddArg(y)
4170		v1 := b.NewValue0(v.Pos, OpPPC64DIVWU, typ.Int32)
4171		v1.AddArg(x)
4172		v1.AddArg(y)
4173		v0.AddArg(v1)
4174		v.AddArg(v0)
4175		return true
4176	}
4177}
4178func rewriteValuePPC64_OpMod64_0(v *Value) bool {
4179	b := v.Block
4180	typ := &b.Func.Config.Types
4181	// match: (Mod64 x y)
4182	// result: (SUB x (MULLD y (DIVD x y)))
4183	for {
4184		y := v.Args[1]
4185		x := v.Args[0]
4186		v.reset(OpPPC64SUB)
4187		v.AddArg(x)
4188		v0 := b.NewValue0(v.Pos, OpPPC64MULLD, typ.Int64)
4189		v0.AddArg(y)
4190		v1 := b.NewValue0(v.Pos, OpPPC64DIVD, typ.Int64)
4191		v1.AddArg(x)
4192		v1.AddArg(y)
4193		v0.AddArg(v1)
4194		v.AddArg(v0)
4195		return true
4196	}
4197}
4198func rewriteValuePPC64_OpMod64u_0(v *Value) bool {
4199	b := v.Block
4200	typ := &b.Func.Config.Types
4201	// match: (Mod64u x y)
4202	// result: (SUB x (MULLD y (DIVDU x y)))
4203	for {
4204		y := v.Args[1]
4205		x := v.Args[0]
4206		v.reset(OpPPC64SUB)
4207		v.AddArg(x)
4208		v0 := b.NewValue0(v.Pos, OpPPC64MULLD, typ.Int64)
4209		v0.AddArg(y)
4210		v1 := b.NewValue0(v.Pos, OpPPC64DIVDU, typ.Int64)
4211		v1.AddArg(x)
4212		v1.AddArg(y)
4213		v0.AddArg(v1)
4214		v.AddArg(v0)
4215		return true
4216	}
4217}
4218func rewriteValuePPC64_OpMod8_0(v *Value) bool {
4219	b := v.Block
4220	typ := &b.Func.Config.Types
4221	// match: (Mod8 x y)
4222	// result: (Mod32 (SignExt8to32 x) (SignExt8to32 y))
4223	for {
4224		y := v.Args[1]
4225		x := v.Args[0]
4226		v.reset(OpMod32)
4227		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
4228		v0.AddArg(x)
4229		v.AddArg(v0)
4230		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
4231		v1.AddArg(y)
4232		v.AddArg(v1)
4233		return true
4234	}
4235}
4236func rewriteValuePPC64_OpMod8u_0(v *Value) bool {
4237	b := v.Block
4238	typ := &b.Func.Config.Types
4239	// match: (Mod8u x y)
4240	// result: (Mod32u (ZeroExt8to32 x) (ZeroExt8to32 y))
4241	for {
4242		y := v.Args[1]
4243		x := v.Args[0]
4244		v.reset(OpMod32u)
4245		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
4246		v0.AddArg(x)
4247		v.AddArg(v0)
4248		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
4249		v1.AddArg(y)
4250		v.AddArg(v1)
4251		return true
4252	}
4253}
4254func rewriteValuePPC64_OpMove_0(v *Value) bool {
4255	b := v.Block
4256	typ := &b.Func.Config.Types
4257	// match: (Move [0] _ _ mem)
4258	// result: mem
4259	for {
4260		if v.AuxInt != 0 {
4261			break
4262		}
4263		mem := v.Args[2]
4264		v.reset(OpCopy)
4265		v.Type = mem.Type
4266		v.AddArg(mem)
4267		return true
4268	}
4269	// match: (Move [1] dst src mem)
4270	// result: (MOVBstore dst (MOVBZload src mem) mem)
4271	for {
4272		if v.AuxInt != 1 {
4273			break
4274		}
4275		mem := v.Args[2]
4276		dst := v.Args[0]
4277		src := v.Args[1]
4278		v.reset(OpPPC64MOVBstore)
4279		v.AddArg(dst)
4280		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
4281		v0.AddArg(src)
4282		v0.AddArg(mem)
4283		v.AddArg(v0)
4284		v.AddArg(mem)
4285		return true
4286	}
4287	// match: (Move [2] dst src mem)
4288	// result: (MOVHstore dst (MOVHZload src mem) mem)
4289	for {
4290		if v.AuxInt != 2 {
4291			break
4292		}
4293		mem := v.Args[2]
4294		dst := v.Args[0]
4295		src := v.Args[1]
4296		v.reset(OpPPC64MOVHstore)
4297		v.AddArg(dst)
4298		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZload, typ.UInt16)
4299		v0.AddArg(src)
4300		v0.AddArg(mem)
4301		v.AddArg(v0)
4302		v.AddArg(mem)
4303		return true
4304	}
4305	// match: (Move [4] dst src mem)
4306	// result: (MOVWstore dst (MOVWZload src mem) mem)
4307	for {
4308		if v.AuxInt != 4 {
4309			break
4310		}
4311		mem := v.Args[2]
4312		dst := v.Args[0]
4313		src := v.Args[1]
4314		v.reset(OpPPC64MOVWstore)
4315		v.AddArg(dst)
4316		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
4317		v0.AddArg(src)
4318		v0.AddArg(mem)
4319		v.AddArg(v0)
4320		v.AddArg(mem)
4321		return true
4322	}
4323	// match: (Move [8] {t} dst src mem)
4324	// cond: t.(*types.Type).Alignment()%4 == 0
4325	// result: (MOVDstore dst (MOVDload src mem) mem)
4326	for {
4327		if v.AuxInt != 8 {
4328			break
4329		}
4330		t := v.Aux
4331		mem := v.Args[2]
4332		dst := v.Args[0]
4333		src := v.Args[1]
4334		if !(t.(*types.Type).Alignment()%4 == 0) {
4335			break
4336		}
4337		v.reset(OpPPC64MOVDstore)
4338		v.AddArg(dst)
4339		v0 := b.NewValue0(v.Pos, OpPPC64MOVDload, typ.Int64)
4340		v0.AddArg(src)
4341		v0.AddArg(mem)
4342		v.AddArg(v0)
4343		v.AddArg(mem)
4344		return true
4345	}
4346	// match: (Move [8] dst src mem)
4347	// result: (MOVWstore [4] dst (MOVWZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem))
4348	for {
4349		if v.AuxInt != 8 {
4350			break
4351		}
4352		mem := v.Args[2]
4353		dst := v.Args[0]
4354		src := v.Args[1]
4355		v.reset(OpPPC64MOVWstore)
4356		v.AuxInt = 4
4357		v.AddArg(dst)
4358		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
4359		v0.AuxInt = 4
4360		v0.AddArg(src)
4361		v0.AddArg(mem)
4362		v.AddArg(v0)
4363		v1 := b.NewValue0(v.Pos, OpPPC64MOVWstore, types.TypeMem)
4364		v1.AddArg(dst)
4365		v2 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
4366		v2.AddArg(src)
4367		v2.AddArg(mem)
4368		v1.AddArg(v2)
4369		v1.AddArg(mem)
4370		v.AddArg(v1)
4371		return true
4372	}
4373	// match: (Move [3] dst src mem)
4374	// result: (MOVBstore [2] dst (MOVBZload [2] src mem) (MOVHstore dst (MOVHload src mem) mem))
4375	for {
4376		if v.AuxInt != 3 {
4377			break
4378		}
4379		mem := v.Args[2]
4380		dst := v.Args[0]
4381		src := v.Args[1]
4382		v.reset(OpPPC64MOVBstore)
4383		v.AuxInt = 2
4384		v.AddArg(dst)
4385		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
4386		v0.AuxInt = 2
4387		v0.AddArg(src)
4388		v0.AddArg(mem)
4389		v.AddArg(v0)
4390		v1 := b.NewValue0(v.Pos, OpPPC64MOVHstore, types.TypeMem)
4391		v1.AddArg(dst)
4392		v2 := b.NewValue0(v.Pos, OpPPC64MOVHload, typ.Int16)
4393		v2.AddArg(src)
4394		v2.AddArg(mem)
4395		v1.AddArg(v2)
4396		v1.AddArg(mem)
4397		v.AddArg(v1)
4398		return true
4399	}
4400	// match: (Move [5] dst src mem)
4401	// result: (MOVBstore [4] dst (MOVBZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem))
4402	for {
4403		if v.AuxInt != 5 {
4404			break
4405		}
4406		mem := v.Args[2]
4407		dst := v.Args[0]
4408		src := v.Args[1]
4409		v.reset(OpPPC64MOVBstore)
4410		v.AuxInt = 4
4411		v.AddArg(dst)
4412		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
4413		v0.AuxInt = 4
4414		v0.AddArg(src)
4415		v0.AddArg(mem)
4416		v.AddArg(v0)
4417		v1 := b.NewValue0(v.Pos, OpPPC64MOVWstore, types.TypeMem)
4418		v1.AddArg(dst)
4419		v2 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
4420		v2.AddArg(src)
4421		v2.AddArg(mem)
4422		v1.AddArg(v2)
4423		v1.AddArg(mem)
4424		v.AddArg(v1)
4425		return true
4426	}
4427	// match: (Move [6] dst src mem)
4428	// result: (MOVHstore [4] dst (MOVHZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem))
4429	for {
4430		if v.AuxInt != 6 {
4431			break
4432		}
4433		mem := v.Args[2]
4434		dst := v.Args[0]
4435		src := v.Args[1]
4436		v.reset(OpPPC64MOVHstore)
4437		v.AuxInt = 4
4438		v.AddArg(dst)
4439		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZload, typ.UInt16)
4440		v0.AuxInt = 4
4441		v0.AddArg(src)
4442		v0.AddArg(mem)
4443		v.AddArg(v0)
4444		v1 := b.NewValue0(v.Pos, OpPPC64MOVWstore, types.TypeMem)
4445		v1.AddArg(dst)
4446		v2 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
4447		v2.AddArg(src)
4448		v2.AddArg(mem)
4449		v1.AddArg(v2)
4450		v1.AddArg(mem)
4451		v.AddArg(v1)
4452		return true
4453	}
4454	// match: (Move [7] dst src mem)
4455	// result: (MOVBstore [6] dst (MOVBZload [6] src mem) (MOVHstore [4] dst (MOVHZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem)))
4456	for {
4457		if v.AuxInt != 7 {
4458			break
4459		}
4460		mem := v.Args[2]
4461		dst := v.Args[0]
4462		src := v.Args[1]
4463		v.reset(OpPPC64MOVBstore)
4464		v.AuxInt = 6
4465		v.AddArg(dst)
4466		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
4467		v0.AuxInt = 6
4468		v0.AddArg(src)
4469		v0.AddArg(mem)
4470		v.AddArg(v0)
4471		v1 := b.NewValue0(v.Pos, OpPPC64MOVHstore, types.TypeMem)
4472		v1.AuxInt = 4
4473		v1.AddArg(dst)
4474		v2 := b.NewValue0(v.Pos, OpPPC64MOVHZload, typ.UInt16)
4475		v2.AuxInt = 4
4476		v2.AddArg(src)
4477		v2.AddArg(mem)
4478		v1.AddArg(v2)
4479		v3 := b.NewValue0(v.Pos, OpPPC64MOVWstore, types.TypeMem)
4480		v3.AddArg(dst)
4481		v4 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
4482		v4.AddArg(src)
4483		v4.AddArg(mem)
4484		v3.AddArg(v4)
4485		v3.AddArg(mem)
4486		v1.AddArg(v3)
4487		v.AddArg(v1)
4488		return true
4489	}
4490	return false
4491}
4492func rewriteValuePPC64_OpMove_10(v *Value) bool {
4493	// match: (Move [s] dst src mem)
4494	// cond: s > 8
4495	// result: (LoweredMove [s] dst src mem)
4496	for {
4497		s := v.AuxInt
4498		mem := v.Args[2]
4499		dst := v.Args[0]
4500		src := v.Args[1]
4501		if !(s > 8) {
4502			break
4503		}
4504		v.reset(OpPPC64LoweredMove)
4505		v.AuxInt = s
4506		v.AddArg(dst)
4507		v.AddArg(src)
4508		v.AddArg(mem)
4509		return true
4510	}
4511	return false
4512}
4513func rewriteValuePPC64_OpMul16_0(v *Value) bool {
4514	// match: (Mul16 x y)
4515	// result: (MULLW x y)
4516	for {
4517		y := v.Args[1]
4518		x := v.Args[0]
4519		v.reset(OpPPC64MULLW)
4520		v.AddArg(x)
4521		v.AddArg(y)
4522		return true
4523	}
4524}
4525func rewriteValuePPC64_OpMul32_0(v *Value) bool {
4526	// match: (Mul32 x y)
4527	// result: (MULLW x y)
4528	for {
4529		y := v.Args[1]
4530		x := v.Args[0]
4531		v.reset(OpPPC64MULLW)
4532		v.AddArg(x)
4533		v.AddArg(y)
4534		return true
4535	}
4536}
4537func rewriteValuePPC64_OpMul32F_0(v *Value) bool {
4538	// match: (Mul32F x y)
4539	// result: (FMULS x y)
4540	for {
4541		y := v.Args[1]
4542		x := v.Args[0]
4543		v.reset(OpPPC64FMULS)
4544		v.AddArg(x)
4545		v.AddArg(y)
4546		return true
4547	}
4548}
4549func rewriteValuePPC64_OpMul64_0(v *Value) bool {
4550	// match: (Mul64 x y)
4551	// result: (MULLD x y)
4552	for {
4553		y := v.Args[1]
4554		x := v.Args[0]
4555		v.reset(OpPPC64MULLD)
4556		v.AddArg(x)
4557		v.AddArg(y)
4558		return true
4559	}
4560}
4561func rewriteValuePPC64_OpMul64F_0(v *Value) bool {
4562	// match: (Mul64F x y)
4563	// result: (FMUL x y)
4564	for {
4565		y := v.Args[1]
4566		x := v.Args[0]
4567		v.reset(OpPPC64FMUL)
4568		v.AddArg(x)
4569		v.AddArg(y)
4570		return true
4571	}
4572}
4573func rewriteValuePPC64_OpMul64uhilo_0(v *Value) bool {
4574	// match: (Mul64uhilo x y)
4575	// result: (LoweredMuluhilo x y)
4576	for {
4577		y := v.Args[1]
4578		x := v.Args[0]
4579		v.reset(OpPPC64LoweredMuluhilo)
4580		v.AddArg(x)
4581		v.AddArg(y)
4582		return true
4583	}
4584}
4585func rewriteValuePPC64_OpMul8_0(v *Value) bool {
4586	// match: (Mul8 x y)
4587	// result: (MULLW x y)
4588	for {
4589		y := v.Args[1]
4590		x := v.Args[0]
4591		v.reset(OpPPC64MULLW)
4592		v.AddArg(x)
4593		v.AddArg(y)
4594		return true
4595	}
4596}
4597func rewriteValuePPC64_OpNeg16_0(v *Value) bool {
4598	// match: (Neg16 x)
4599	// result: (NEG x)
4600	for {
4601		x := v.Args[0]
4602		v.reset(OpPPC64NEG)
4603		v.AddArg(x)
4604		return true
4605	}
4606}
4607func rewriteValuePPC64_OpNeg32_0(v *Value) bool {
4608	// match: (Neg32 x)
4609	// result: (NEG x)
4610	for {
4611		x := v.Args[0]
4612		v.reset(OpPPC64NEG)
4613		v.AddArg(x)
4614		return true
4615	}
4616}
4617func rewriteValuePPC64_OpNeg32F_0(v *Value) bool {
4618	// match: (Neg32F x)
4619	// result: (FNEG x)
4620	for {
4621		x := v.Args[0]
4622		v.reset(OpPPC64FNEG)
4623		v.AddArg(x)
4624		return true
4625	}
4626}
4627func rewriteValuePPC64_OpNeg64_0(v *Value) bool {
4628	// match: (Neg64 x)
4629	// result: (NEG x)
4630	for {
4631		x := v.Args[0]
4632		v.reset(OpPPC64NEG)
4633		v.AddArg(x)
4634		return true
4635	}
4636}
4637func rewriteValuePPC64_OpNeg64F_0(v *Value) bool {
4638	// match: (Neg64F x)
4639	// result: (FNEG x)
4640	for {
4641		x := v.Args[0]
4642		v.reset(OpPPC64FNEG)
4643		v.AddArg(x)
4644		return true
4645	}
4646}
4647func rewriteValuePPC64_OpNeg8_0(v *Value) bool {
4648	// match: (Neg8 x)
4649	// result: (NEG x)
4650	for {
4651		x := v.Args[0]
4652		v.reset(OpPPC64NEG)
4653		v.AddArg(x)
4654		return true
4655	}
4656}
4657func rewriteValuePPC64_OpNeq16_0(v *Value) bool {
4658	b := v.Block
4659	typ := &b.Func.Config.Types
4660	// match: (Neq16 x y)
4661	// cond: isSigned(x.Type) && isSigned(y.Type)
4662	// result: (NotEqual (CMPW (SignExt16to32 x) (SignExt16to32 y)))
4663	for {
4664		y := v.Args[1]
4665		x := v.Args[0]
4666		if !(isSigned(x.Type) && isSigned(y.Type)) {
4667			break
4668		}
4669		v.reset(OpPPC64NotEqual)
4670		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
4671		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
4672		v1.AddArg(x)
4673		v0.AddArg(v1)
4674		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
4675		v2.AddArg(y)
4676		v0.AddArg(v2)
4677		v.AddArg(v0)
4678		return true
4679	}
4680	// match: (Neq16 x y)
4681	// result: (NotEqual (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
4682	for {
4683		y := v.Args[1]
4684		x := v.Args[0]
4685		v.reset(OpPPC64NotEqual)
4686		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
4687		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
4688		v1.AddArg(x)
4689		v0.AddArg(v1)
4690		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
4691		v2.AddArg(y)
4692		v0.AddArg(v2)
4693		v.AddArg(v0)
4694		return true
4695	}
4696}
4697func rewriteValuePPC64_OpNeq32_0(v *Value) bool {
4698	b := v.Block
4699	// match: (Neq32 x y)
4700	// result: (NotEqual (CMPW x y))
4701	for {
4702		y := v.Args[1]
4703		x := v.Args[0]
4704		v.reset(OpPPC64NotEqual)
4705		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
4706		v0.AddArg(x)
4707		v0.AddArg(y)
4708		v.AddArg(v0)
4709		return true
4710	}
4711}
4712func rewriteValuePPC64_OpNeq32F_0(v *Value) bool {
4713	b := v.Block
4714	// match: (Neq32F x y)
4715	// result: (NotEqual (FCMPU x y))
4716	for {
4717		y := v.Args[1]
4718		x := v.Args[0]
4719		v.reset(OpPPC64NotEqual)
4720		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
4721		v0.AddArg(x)
4722		v0.AddArg(y)
4723		v.AddArg(v0)
4724		return true
4725	}
4726}
4727func rewriteValuePPC64_OpNeq64_0(v *Value) bool {
4728	b := v.Block
4729	// match: (Neq64 x y)
4730	// result: (NotEqual (CMP x y))
4731	for {
4732		y := v.Args[1]
4733		x := v.Args[0]
4734		v.reset(OpPPC64NotEqual)
4735		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
4736		v0.AddArg(x)
4737		v0.AddArg(y)
4738		v.AddArg(v0)
4739		return true
4740	}
4741}
4742func rewriteValuePPC64_OpNeq64F_0(v *Value) bool {
4743	b := v.Block
4744	// match: (Neq64F x y)
4745	// result: (NotEqual (FCMPU x y))
4746	for {
4747		y := v.Args[1]
4748		x := v.Args[0]
4749		v.reset(OpPPC64NotEqual)
4750		v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
4751		v0.AddArg(x)
4752		v0.AddArg(y)
4753		v.AddArg(v0)
4754		return true
4755	}
4756}
4757func rewriteValuePPC64_OpNeq8_0(v *Value) bool {
4758	b := v.Block
4759	typ := &b.Func.Config.Types
4760	// match: (Neq8 x y)
4761	// cond: isSigned(x.Type) && isSigned(y.Type)
4762	// result: (NotEqual (CMPW (SignExt8to32 x) (SignExt8to32 y)))
4763	for {
4764		y := v.Args[1]
4765		x := v.Args[0]
4766		if !(isSigned(x.Type) && isSigned(y.Type)) {
4767			break
4768		}
4769		v.reset(OpPPC64NotEqual)
4770		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
4771		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
4772		v1.AddArg(x)
4773		v0.AddArg(v1)
4774		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
4775		v2.AddArg(y)
4776		v0.AddArg(v2)
4777		v.AddArg(v0)
4778		return true
4779	}
4780	// match: (Neq8 x y)
4781	// result: (NotEqual (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
4782	for {
4783		y := v.Args[1]
4784		x := v.Args[0]
4785		v.reset(OpPPC64NotEqual)
4786		v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
4787		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
4788		v1.AddArg(x)
4789		v0.AddArg(v1)
4790		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
4791		v2.AddArg(y)
4792		v0.AddArg(v2)
4793		v.AddArg(v0)
4794		return true
4795	}
4796}
4797func rewriteValuePPC64_OpNeqB_0(v *Value) bool {
4798	// match: (NeqB x y)
4799	// result: (XOR x y)
4800	for {
4801		y := v.Args[1]
4802		x := v.Args[0]
4803		v.reset(OpPPC64XOR)
4804		v.AddArg(x)
4805		v.AddArg(y)
4806		return true
4807	}
4808}
4809func rewriteValuePPC64_OpNeqPtr_0(v *Value) bool {
4810	b := v.Block
4811	// match: (NeqPtr x y)
4812	// result: (NotEqual (CMP x y))
4813	for {
4814		y := v.Args[1]
4815		x := v.Args[0]
4816		v.reset(OpPPC64NotEqual)
4817		v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
4818		v0.AddArg(x)
4819		v0.AddArg(y)
4820		v.AddArg(v0)
4821		return true
4822	}
4823}
4824func rewriteValuePPC64_OpNilCheck_0(v *Value) bool {
4825	// match: (NilCheck ptr mem)
4826	// result: (LoweredNilCheck ptr mem)
4827	for {
4828		mem := v.Args[1]
4829		ptr := v.Args[0]
4830		v.reset(OpPPC64LoweredNilCheck)
4831		v.AddArg(ptr)
4832		v.AddArg(mem)
4833		return true
4834	}
4835}
4836func rewriteValuePPC64_OpNot_0(v *Value) bool {
4837	// match: (Not x)
4838	// result: (XORconst [1] x)
4839	for {
4840		x := v.Args[0]
4841		v.reset(OpPPC64XORconst)
4842		v.AuxInt = 1
4843		v.AddArg(x)
4844		return true
4845	}
4846}
4847func rewriteValuePPC64_OpOffPtr_0(v *Value) bool {
4848	b := v.Block
4849	typ := &b.Func.Config.Types
4850	// match: (OffPtr [off] ptr)
4851	// result: (ADD (MOVDconst <typ.Int64> [off]) ptr)
4852	for {
4853		off := v.AuxInt
4854		ptr := v.Args[0]
4855		v.reset(OpPPC64ADD)
4856		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
4857		v0.AuxInt = off
4858		v.AddArg(v0)
4859		v.AddArg(ptr)
4860		return true
4861	}
4862}
4863func rewriteValuePPC64_OpOr16_0(v *Value) bool {
4864	// match: (Or16 x y)
4865	// result: (OR x y)
4866	for {
4867		y := v.Args[1]
4868		x := v.Args[0]
4869		v.reset(OpPPC64OR)
4870		v.AddArg(x)
4871		v.AddArg(y)
4872		return true
4873	}
4874}
4875func rewriteValuePPC64_OpOr32_0(v *Value) bool {
4876	// match: (Or32 x y)
4877	// result: (OR x y)
4878	for {
4879		y := v.Args[1]
4880		x := v.Args[0]
4881		v.reset(OpPPC64OR)
4882		v.AddArg(x)
4883		v.AddArg(y)
4884		return true
4885	}
4886}
4887func rewriteValuePPC64_OpOr64_0(v *Value) bool {
4888	// match: (Or64 x y)
4889	// result: (OR x y)
4890	for {
4891		y := v.Args[1]
4892		x := v.Args[0]
4893		v.reset(OpPPC64OR)
4894		v.AddArg(x)
4895		v.AddArg(y)
4896		return true
4897	}
4898}
4899func rewriteValuePPC64_OpOr8_0(v *Value) bool {
4900	// match: (Or8 x y)
4901	// result: (OR x y)
4902	for {
4903		y := v.Args[1]
4904		x := v.Args[0]
4905		v.reset(OpPPC64OR)
4906		v.AddArg(x)
4907		v.AddArg(y)
4908		return true
4909	}
4910}
4911func rewriteValuePPC64_OpOrB_0(v *Value) bool {
4912	// match: (OrB x y)
4913	// result: (OR x y)
4914	for {
4915		y := v.Args[1]
4916		x := v.Args[0]
4917		v.reset(OpPPC64OR)
4918		v.AddArg(x)
4919		v.AddArg(y)
4920		return true
4921	}
4922}
4923func rewriteValuePPC64_OpPPC64ADD_0(v *Value) bool {
4924	b := v.Block
4925	typ := &b.Func.Config.Types
4926	// match: (ADD (SLDconst x [c]) (SRDconst x [d]))
4927	// cond: d == 64-c
4928	// result: (ROTLconst [c] x)
4929	for {
4930		_ = v.Args[1]
4931		v_0 := v.Args[0]
4932		if v_0.Op != OpPPC64SLDconst {
4933			break
4934		}
4935		c := v_0.AuxInt
4936		x := v_0.Args[0]
4937		v_1 := v.Args[1]
4938		if v_1.Op != OpPPC64SRDconst {
4939			break
4940		}
4941		d := v_1.AuxInt
4942		if x != v_1.Args[0] || !(d == 64-c) {
4943			break
4944		}
4945		v.reset(OpPPC64ROTLconst)
4946		v.AuxInt = c
4947		v.AddArg(x)
4948		return true
4949	}
4950	// match: (ADD (SRDconst x [d]) (SLDconst x [c]))
4951	// cond: d == 64-c
4952	// result: (ROTLconst [c] x)
4953	for {
4954		_ = v.Args[1]
4955		v_0 := v.Args[0]
4956		if v_0.Op != OpPPC64SRDconst {
4957			break
4958		}
4959		d := v_0.AuxInt
4960		x := v_0.Args[0]
4961		v_1 := v.Args[1]
4962		if v_1.Op != OpPPC64SLDconst {
4963			break
4964		}
4965		c := v_1.AuxInt
4966		if x != v_1.Args[0] || !(d == 64-c) {
4967			break
4968		}
4969		v.reset(OpPPC64ROTLconst)
4970		v.AuxInt = c
4971		v.AddArg(x)
4972		return true
4973	}
4974	// match: (ADD (SLWconst x [c]) (SRWconst x [d]))
4975	// cond: d == 32-c
4976	// result: (ROTLWconst [c] x)
4977	for {
4978		_ = v.Args[1]
4979		v_0 := v.Args[0]
4980		if v_0.Op != OpPPC64SLWconst {
4981			break
4982		}
4983		c := v_0.AuxInt
4984		x := v_0.Args[0]
4985		v_1 := v.Args[1]
4986		if v_1.Op != OpPPC64SRWconst {
4987			break
4988		}
4989		d := v_1.AuxInt
4990		if x != v_1.Args[0] || !(d == 32-c) {
4991			break
4992		}
4993		v.reset(OpPPC64ROTLWconst)
4994		v.AuxInt = c
4995		v.AddArg(x)
4996		return true
4997	}
4998	// match: (ADD (SRWconst x [d]) (SLWconst x [c]))
4999	// cond: d == 32-c
5000	// result: (ROTLWconst [c] x)
5001	for {
5002		_ = v.Args[1]
5003		v_0 := v.Args[0]
5004		if v_0.Op != OpPPC64SRWconst {
5005			break
5006		}
5007		d := v_0.AuxInt
5008		x := v_0.Args[0]
5009		v_1 := v.Args[1]
5010		if v_1.Op != OpPPC64SLWconst {
5011			break
5012		}
5013		c := v_1.AuxInt
5014		if x != v_1.Args[0] || !(d == 32-c) {
5015			break
5016		}
5017		v.reset(OpPPC64ROTLWconst)
5018		v.AuxInt = c
5019		v.AddArg(x)
5020		return true
5021	}
5022	// match: (ADD (SLD x (ANDconst <typ.Int64> [63] y)) (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))))
5023	// result: (ROTL x y)
5024	for {
5025		_ = v.Args[1]
5026		v_0 := v.Args[0]
5027		if v_0.Op != OpPPC64SLD {
5028			break
5029		}
5030		_ = v_0.Args[1]
5031		x := v_0.Args[0]
5032		v_0_1 := v_0.Args[1]
5033		if v_0_1.Op != OpPPC64ANDconst || v_0_1.Type != typ.Int64 || v_0_1.AuxInt != 63 {
5034			break
5035		}
5036		y := v_0_1.Args[0]
5037		v_1 := v.Args[1]
5038		if v_1.Op != OpPPC64SRD {
5039			break
5040		}
5041		_ = v_1.Args[1]
5042		if x != v_1.Args[0] {
5043			break
5044		}
5045		v_1_1 := v_1.Args[1]
5046		if v_1_1.Op != OpPPC64SUB || v_1_1.Type != typ.UInt {
5047			break
5048		}
5049		_ = v_1_1.Args[1]
5050		v_1_1_0 := v_1_1.Args[0]
5051		if v_1_1_0.Op != OpPPC64MOVDconst || v_1_1_0.AuxInt != 64 {
5052			break
5053		}
5054		v_1_1_1 := v_1_1.Args[1]
5055		if v_1_1_1.Op != OpPPC64ANDconst || v_1_1_1.Type != typ.UInt || v_1_1_1.AuxInt != 63 || y != v_1_1_1.Args[0] {
5056			break
5057		}
5058		v.reset(OpPPC64ROTL)
5059		v.AddArg(x)
5060		v.AddArg(y)
5061		return true
5062	}
5063	// match: (ADD (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))) (SLD x (ANDconst <typ.Int64> [63] y)))
5064	// result: (ROTL x y)
5065	for {
5066		_ = v.Args[1]
5067		v_0 := v.Args[0]
5068		if v_0.Op != OpPPC64SRD {
5069			break
5070		}
5071		_ = v_0.Args[1]
5072		x := v_0.Args[0]
5073		v_0_1 := v_0.Args[1]
5074		if v_0_1.Op != OpPPC64SUB || v_0_1.Type != typ.UInt {
5075			break
5076		}
5077		_ = v_0_1.Args[1]
5078		v_0_1_0 := v_0_1.Args[0]
5079		if v_0_1_0.Op != OpPPC64MOVDconst || v_0_1_0.AuxInt != 64 {
5080			break
5081		}
5082		v_0_1_1 := v_0_1.Args[1]
5083		if v_0_1_1.Op != OpPPC64ANDconst || v_0_1_1.Type != typ.UInt || v_0_1_1.AuxInt != 63 {
5084			break
5085		}
5086		y := v_0_1_1.Args[0]
5087		v_1 := v.Args[1]
5088		if v_1.Op != OpPPC64SLD {
5089			break
5090		}
5091		_ = v_1.Args[1]
5092		if x != v_1.Args[0] {
5093			break
5094		}
5095		v_1_1 := v_1.Args[1]
5096		if v_1_1.Op != OpPPC64ANDconst || v_1_1.Type != typ.Int64 || v_1_1.AuxInt != 63 || y != v_1_1.Args[0] {
5097			break
5098		}
5099		v.reset(OpPPC64ROTL)
5100		v.AddArg(x)
5101		v.AddArg(y)
5102		return true
5103	}
5104	// match: (ADD (SLW x (ANDconst <typ.Int32> [31] y)) (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))))
5105	// result: (ROTLW x y)
5106	for {
5107		_ = v.Args[1]
5108		v_0 := v.Args[0]
5109		if v_0.Op != OpPPC64SLW {
5110			break
5111		}
5112		_ = v_0.Args[1]
5113		x := v_0.Args[0]
5114		v_0_1 := v_0.Args[1]
5115		if v_0_1.Op != OpPPC64ANDconst || v_0_1.Type != typ.Int32 || v_0_1.AuxInt != 31 {
5116			break
5117		}
5118		y := v_0_1.Args[0]
5119		v_1 := v.Args[1]
5120		if v_1.Op != OpPPC64SRW {
5121			break
5122		}
5123		_ = v_1.Args[1]
5124		if x != v_1.Args[0] {
5125			break
5126		}
5127		v_1_1 := v_1.Args[1]
5128		if v_1_1.Op != OpPPC64SUB || v_1_1.Type != typ.UInt {
5129			break
5130		}
5131		_ = v_1_1.Args[1]
5132		v_1_1_0 := v_1_1.Args[0]
5133		if v_1_1_0.Op != OpPPC64MOVDconst || v_1_1_0.AuxInt != 32 {
5134			break
5135		}
5136		v_1_1_1 := v_1_1.Args[1]
5137		if v_1_1_1.Op != OpPPC64ANDconst || v_1_1_1.Type != typ.UInt || v_1_1_1.AuxInt != 31 || y != v_1_1_1.Args[0] {
5138			break
5139		}
5140		v.reset(OpPPC64ROTLW)
5141		v.AddArg(x)
5142		v.AddArg(y)
5143		return true
5144	}
5145	// match: (ADD (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))) (SLW x (ANDconst <typ.Int32> [31] y)))
5146	// result: (ROTLW x y)
5147	for {
5148		_ = v.Args[1]
5149		v_0 := v.Args[0]
5150		if v_0.Op != OpPPC64SRW {
5151			break
5152		}
5153		_ = v_0.Args[1]
5154		x := v_0.Args[0]
5155		v_0_1 := v_0.Args[1]
5156		if v_0_1.Op != OpPPC64SUB || v_0_1.Type != typ.UInt {
5157			break
5158		}
5159		_ = v_0_1.Args[1]
5160		v_0_1_0 := v_0_1.Args[0]
5161		if v_0_1_0.Op != OpPPC64MOVDconst || v_0_1_0.AuxInt != 32 {
5162			break
5163		}
5164		v_0_1_1 := v_0_1.Args[1]
5165		if v_0_1_1.Op != OpPPC64ANDconst || v_0_1_1.Type != typ.UInt || v_0_1_1.AuxInt != 31 {
5166			break
5167		}
5168		y := v_0_1_1.Args[0]
5169		v_1 := v.Args[1]
5170		if v_1.Op != OpPPC64SLW {
5171			break
5172		}
5173		_ = v_1.Args[1]
5174		if x != v_1.Args[0] {
5175			break
5176		}
5177		v_1_1 := v_1.Args[1]
5178		if v_1_1.Op != OpPPC64ANDconst || v_1_1.Type != typ.Int32 || v_1_1.AuxInt != 31 || y != v_1_1.Args[0] {
5179			break
5180		}
5181		v.reset(OpPPC64ROTLW)
5182		v.AddArg(x)
5183		v.AddArg(y)
5184		return true
5185	}
5186	// match: (ADD x (MOVDconst [c]))
5187	// cond: is32Bit(c)
5188	// result: (ADDconst [c] x)
5189	for {
5190		_ = v.Args[1]
5191		x := v.Args[0]
5192		v_1 := v.Args[1]
5193		if v_1.Op != OpPPC64MOVDconst {
5194			break
5195		}
5196		c := v_1.AuxInt
5197		if !(is32Bit(c)) {
5198			break
5199		}
5200		v.reset(OpPPC64ADDconst)
5201		v.AuxInt = c
5202		v.AddArg(x)
5203		return true
5204	}
5205	// match: (ADD (MOVDconst [c]) x)
5206	// cond: is32Bit(c)
5207	// result: (ADDconst [c] x)
5208	for {
5209		x := v.Args[1]
5210		v_0 := v.Args[0]
5211		if v_0.Op != OpPPC64MOVDconst {
5212			break
5213		}
5214		c := v_0.AuxInt
5215		if !(is32Bit(c)) {
5216			break
5217		}
5218		v.reset(OpPPC64ADDconst)
5219		v.AuxInt = c
5220		v.AddArg(x)
5221		return true
5222	}
5223	return false
5224}
5225func rewriteValuePPC64_OpPPC64ADDconst_0(v *Value) bool {
5226	// match: (ADDconst [c] (ADDconst [d] x))
5227	// cond: is32Bit(c+d)
5228	// result: (ADDconst [c+d] x)
5229	for {
5230		c := v.AuxInt
5231		v_0 := v.Args[0]
5232		if v_0.Op != OpPPC64ADDconst {
5233			break
5234		}
5235		d := v_0.AuxInt
5236		x := v_0.Args[0]
5237		if !(is32Bit(c + d)) {
5238			break
5239		}
5240		v.reset(OpPPC64ADDconst)
5241		v.AuxInt = c + d
5242		v.AddArg(x)
5243		return true
5244	}
5245	// match: (ADDconst [0] x)
5246	// result: x
5247	for {
5248		if v.AuxInt != 0 {
5249			break
5250		}
5251		x := v.Args[0]
5252		v.reset(OpCopy)
5253		v.Type = x.Type
5254		v.AddArg(x)
5255		return true
5256	}
5257	// match: (ADDconst [c] (MOVDaddr [d] {sym} x))
5258	// result: (MOVDaddr [c+d] {sym} x)
5259	for {
5260		c := v.AuxInt
5261		v_0 := v.Args[0]
5262		if v_0.Op != OpPPC64MOVDaddr {
5263			break
5264		}
5265		d := v_0.AuxInt
5266		sym := v_0.Aux
5267		x := v_0.Args[0]
5268		v.reset(OpPPC64MOVDaddr)
5269		v.AuxInt = c + d
5270		v.Aux = sym
5271		v.AddArg(x)
5272		return true
5273	}
5274	return false
5275}
5276func rewriteValuePPC64_OpPPC64AND_0(v *Value) bool {
5277	// match: (AND x (NOR y y))
5278	// result: (ANDN x y)
5279	for {
5280		_ = v.Args[1]
5281		x := v.Args[0]
5282		v_1 := v.Args[1]
5283		if v_1.Op != OpPPC64NOR {
5284			break
5285		}
5286		y := v_1.Args[1]
5287		if y != v_1.Args[0] {
5288			break
5289		}
5290		v.reset(OpPPC64ANDN)
5291		v.AddArg(x)
5292		v.AddArg(y)
5293		return true
5294	}
5295	// match: (AND (NOR y y) x)
5296	// result: (ANDN x y)
5297	for {
5298		x := v.Args[1]
5299		v_0 := v.Args[0]
5300		if v_0.Op != OpPPC64NOR {
5301			break
5302		}
5303		y := v_0.Args[1]
5304		if y != v_0.Args[0] {
5305			break
5306		}
5307		v.reset(OpPPC64ANDN)
5308		v.AddArg(x)
5309		v.AddArg(y)
5310		return true
5311	}
5312	// match: (AND (MOVDconst [c]) (MOVDconst [d]))
5313	// result: (MOVDconst [c&d])
5314	for {
5315		_ = v.Args[1]
5316		v_0 := v.Args[0]
5317		if v_0.Op != OpPPC64MOVDconst {
5318			break
5319		}
5320		c := v_0.AuxInt
5321		v_1 := v.Args[1]
5322		if v_1.Op != OpPPC64MOVDconst {
5323			break
5324		}
5325		d := v_1.AuxInt
5326		v.reset(OpPPC64MOVDconst)
5327		v.AuxInt = c & d
5328		return true
5329	}
5330	// match: (AND (MOVDconst [d]) (MOVDconst [c]))
5331	// result: (MOVDconst [c&d])
5332	for {
5333		_ = v.Args[1]
5334		v_0 := v.Args[0]
5335		if v_0.Op != OpPPC64MOVDconst {
5336			break
5337		}
5338		d := v_0.AuxInt
5339		v_1 := v.Args[1]
5340		if v_1.Op != OpPPC64MOVDconst {
5341			break
5342		}
5343		c := v_1.AuxInt
5344		v.reset(OpPPC64MOVDconst)
5345		v.AuxInt = c & d
5346		return true
5347	}
5348	// match: (AND x (MOVDconst [c]))
5349	// cond: isU16Bit(c)
5350	// result: (ANDconst [c] x)
5351	for {
5352		_ = v.Args[1]
5353		x := v.Args[0]
5354		v_1 := v.Args[1]
5355		if v_1.Op != OpPPC64MOVDconst {
5356			break
5357		}
5358		c := v_1.AuxInt
5359		if !(isU16Bit(c)) {
5360			break
5361		}
5362		v.reset(OpPPC64ANDconst)
5363		v.AuxInt = c
5364		v.AddArg(x)
5365		return true
5366	}
5367	// match: (AND (MOVDconst [c]) x)
5368	// cond: isU16Bit(c)
5369	// result: (ANDconst [c] x)
5370	for {
5371		x := v.Args[1]
5372		v_0 := v.Args[0]
5373		if v_0.Op != OpPPC64MOVDconst {
5374			break
5375		}
5376		c := v_0.AuxInt
5377		if !(isU16Bit(c)) {
5378			break
5379		}
5380		v.reset(OpPPC64ANDconst)
5381		v.AuxInt = c
5382		v.AddArg(x)
5383		return true
5384	}
5385	// match: (AND (MOVDconst [c]) y:(MOVWZreg _))
5386	// cond: c&0xFFFFFFFF == 0xFFFFFFFF
5387	// result: y
5388	for {
5389		_ = v.Args[1]
5390		v_0 := v.Args[0]
5391		if v_0.Op != OpPPC64MOVDconst {
5392			break
5393		}
5394		c := v_0.AuxInt
5395		y := v.Args[1]
5396		if y.Op != OpPPC64MOVWZreg || !(c&0xFFFFFFFF == 0xFFFFFFFF) {
5397			break
5398		}
5399		v.reset(OpCopy)
5400		v.Type = y.Type
5401		v.AddArg(y)
5402		return true
5403	}
5404	// match: (AND y:(MOVWZreg _) (MOVDconst [c]))
5405	// cond: c&0xFFFFFFFF == 0xFFFFFFFF
5406	// result: y
5407	for {
5408		_ = v.Args[1]
5409		y := v.Args[0]
5410		if y.Op != OpPPC64MOVWZreg {
5411			break
5412		}
5413		v_1 := v.Args[1]
5414		if v_1.Op != OpPPC64MOVDconst {
5415			break
5416		}
5417		c := v_1.AuxInt
5418		if !(c&0xFFFFFFFF == 0xFFFFFFFF) {
5419			break
5420		}
5421		v.reset(OpCopy)
5422		v.Type = y.Type
5423		v.AddArg(y)
5424		return true
5425	}
5426	// match: (AND (MOVDconst [0xFFFFFFFF]) y:(MOVWreg x))
5427	// result: (MOVWZreg x)
5428	for {
5429		_ = v.Args[1]
5430		v_0 := v.Args[0]
5431		if v_0.Op != OpPPC64MOVDconst || v_0.AuxInt != 0xFFFFFFFF {
5432			break
5433		}
5434		y := v.Args[1]
5435		if y.Op != OpPPC64MOVWreg {
5436			break
5437		}
5438		x := y.Args[0]
5439		v.reset(OpPPC64MOVWZreg)
5440		v.AddArg(x)
5441		return true
5442	}
5443	// match: (AND y:(MOVWreg x) (MOVDconst [0xFFFFFFFF]))
5444	// result: (MOVWZreg x)
5445	for {
5446		_ = v.Args[1]
5447		y := v.Args[0]
5448		if y.Op != OpPPC64MOVWreg {
5449			break
5450		}
5451		x := y.Args[0]
5452		v_1 := v.Args[1]
5453		if v_1.Op != OpPPC64MOVDconst || v_1.AuxInt != 0xFFFFFFFF {
5454			break
5455		}
5456		v.reset(OpPPC64MOVWZreg)
5457		v.AddArg(x)
5458		return true
5459	}
5460	return false
5461}
5462func rewriteValuePPC64_OpPPC64AND_10(v *Value) bool {
5463	// match: (AND (MOVDconst [c]) x:(MOVBZload _ _))
5464	// result: (ANDconst [c&0xFF] x)
5465	for {
5466		_ = v.Args[1]
5467		v_0 := v.Args[0]
5468		if v_0.Op != OpPPC64MOVDconst {
5469			break
5470		}
5471		c := v_0.AuxInt
5472		x := v.Args[1]
5473		if x.Op != OpPPC64MOVBZload {
5474			break
5475		}
5476		_ = x.Args[1]
5477		v.reset(OpPPC64ANDconst)
5478		v.AuxInt = c & 0xFF
5479		v.AddArg(x)
5480		return true
5481	}
5482	// match: (AND x:(MOVBZload _ _) (MOVDconst [c]))
5483	// result: (ANDconst [c&0xFF] x)
5484	for {
5485		_ = v.Args[1]
5486		x := v.Args[0]
5487		if x.Op != OpPPC64MOVBZload {
5488			break
5489		}
5490		_ = x.Args[1]
5491		v_1 := v.Args[1]
5492		if v_1.Op != OpPPC64MOVDconst {
5493			break
5494		}
5495		c := v_1.AuxInt
5496		v.reset(OpPPC64ANDconst)
5497		v.AuxInt = c & 0xFF
5498		v.AddArg(x)
5499		return true
5500	}
5501	// match: (AND x:(MOVBZload _ _) (MOVDconst [c]))
5502	// result: (ANDconst [c&0xFF] x)
5503	for {
5504		_ = v.Args[1]
5505		x := v.Args[0]
5506		if x.Op != OpPPC64MOVBZload {
5507			break
5508		}
5509		_ = x.Args[1]
5510		v_1 := v.Args[1]
5511		if v_1.Op != OpPPC64MOVDconst {
5512			break
5513		}
5514		c := v_1.AuxInt
5515		v.reset(OpPPC64ANDconst)
5516		v.AuxInt = c & 0xFF
5517		v.AddArg(x)
5518		return true
5519	}
5520	// match: (AND (MOVDconst [c]) x:(MOVBZload _ _))
5521	// result: (ANDconst [c&0xFF] x)
5522	for {
5523		_ = v.Args[1]
5524		v_0 := v.Args[0]
5525		if v_0.Op != OpPPC64MOVDconst {
5526			break
5527		}
5528		c := v_0.AuxInt
5529		x := v.Args[1]
5530		if x.Op != OpPPC64MOVBZload {
5531			break
5532		}
5533		_ = x.Args[1]
5534		v.reset(OpPPC64ANDconst)
5535		v.AuxInt = c & 0xFF
5536		v.AddArg(x)
5537		return true
5538	}
5539	return false
5540}
5541func rewriteValuePPC64_OpPPC64ANDconst_0(v *Value) bool {
5542	// match: (ANDconst [c] (ANDconst [d] x))
5543	// result: (ANDconst [c&d] x)
5544	for {
5545		c := v.AuxInt
5546		v_0 := v.Args[0]
5547		if v_0.Op != OpPPC64ANDconst {
5548			break
5549		}
5550		d := v_0.AuxInt
5551		x := v_0.Args[0]
5552		v.reset(OpPPC64ANDconst)
5553		v.AuxInt = c & d
5554		v.AddArg(x)
5555		return true
5556	}
5557	// match: (ANDconst [-1] x)
5558	// result: x
5559	for {
5560		if v.AuxInt != -1 {
5561			break
5562		}
5563		x := v.Args[0]
5564		v.reset(OpCopy)
5565		v.Type = x.Type
5566		v.AddArg(x)
5567		return true
5568	}
5569	// match: (ANDconst [0] _)
5570	// result: (MOVDconst [0])
5571	for {
5572		if v.AuxInt != 0 {
5573			break
5574		}
5575		v.reset(OpPPC64MOVDconst)
5576		v.AuxInt = 0
5577		return true
5578	}
5579	// match: (ANDconst [c] y:(MOVBZreg _))
5580	// cond: c&0xFF == 0xFF
5581	// result: y
5582	for {
5583		c := v.AuxInt
5584		y := v.Args[0]
5585		if y.Op != OpPPC64MOVBZreg || !(c&0xFF == 0xFF) {
5586			break
5587		}
5588		v.reset(OpCopy)
5589		v.Type = y.Type
5590		v.AddArg(y)
5591		return true
5592	}
5593	// match: (ANDconst [0xFF] y:(MOVBreg _))
5594	// result: y
5595	for {
5596		if v.AuxInt != 0xFF {
5597			break
5598		}
5599		y := v.Args[0]
5600		if y.Op != OpPPC64MOVBreg {
5601			break
5602		}
5603		v.reset(OpCopy)
5604		v.Type = y.Type
5605		v.AddArg(y)
5606		return true
5607	}
5608	// match: (ANDconst [c] y:(MOVHZreg _))
5609	// cond: c&0xFFFF == 0xFFFF
5610	// result: y
5611	for {
5612		c := v.AuxInt
5613		y := v.Args[0]
5614		if y.Op != OpPPC64MOVHZreg || !(c&0xFFFF == 0xFFFF) {
5615			break
5616		}
5617		v.reset(OpCopy)
5618		v.Type = y.Type
5619		v.AddArg(y)
5620		return true
5621	}
5622	// match: (ANDconst [0xFFFF] y:(MOVHreg _))
5623	// result: y
5624	for {
5625		if v.AuxInt != 0xFFFF {
5626			break
5627		}
5628		y := v.Args[0]
5629		if y.Op != OpPPC64MOVHreg {
5630			break
5631		}
5632		v.reset(OpCopy)
5633		v.Type = y.Type
5634		v.AddArg(y)
5635		return true
5636	}
5637	// match: (ANDconst [c] (MOVBreg x))
5638	// result: (ANDconst [c&0xFF] x)
5639	for {
5640		c := v.AuxInt
5641		v_0 := v.Args[0]
5642		if v_0.Op != OpPPC64MOVBreg {
5643			break
5644		}
5645		x := v_0.Args[0]
5646		v.reset(OpPPC64ANDconst)
5647		v.AuxInt = c & 0xFF
5648		v.AddArg(x)
5649		return true
5650	}
5651	// match: (ANDconst [c] (MOVBZreg x))
5652	// result: (ANDconst [c&0xFF] x)
5653	for {
5654		c := v.AuxInt
5655		v_0 := v.Args[0]
5656		if v_0.Op != OpPPC64MOVBZreg {
5657			break
5658		}
5659		x := v_0.Args[0]
5660		v.reset(OpPPC64ANDconst)
5661		v.AuxInt = c & 0xFF
5662		v.AddArg(x)
5663		return true
5664	}
5665	// match: (ANDconst [c] (MOVHreg x))
5666	// result: (ANDconst [c&0xFFFF] x)
5667	for {
5668		c := v.AuxInt
5669		v_0 := v.Args[0]
5670		if v_0.Op != OpPPC64MOVHreg {
5671			break
5672		}
5673		x := v_0.Args[0]
5674		v.reset(OpPPC64ANDconst)
5675		v.AuxInt = c & 0xFFFF
5676		v.AddArg(x)
5677		return true
5678	}
5679	return false
5680}
5681func rewriteValuePPC64_OpPPC64ANDconst_10(v *Value) bool {
5682	// match: (ANDconst [c] (MOVHZreg x))
5683	// result: (ANDconst [c&0xFFFF] x)
5684	for {
5685		c := v.AuxInt
5686		v_0 := v.Args[0]
5687		if v_0.Op != OpPPC64MOVHZreg {
5688			break
5689		}
5690		x := v_0.Args[0]
5691		v.reset(OpPPC64ANDconst)
5692		v.AuxInt = c & 0xFFFF
5693		v.AddArg(x)
5694		return true
5695	}
5696	// match: (ANDconst [c] (MOVWreg x))
5697	// result: (ANDconst [c&0xFFFFFFFF] x)
5698	for {
5699		c := v.AuxInt
5700		v_0 := v.Args[0]
5701		if v_0.Op != OpPPC64MOVWreg {
5702			break
5703		}
5704		x := v_0.Args[0]
5705		v.reset(OpPPC64ANDconst)
5706		v.AuxInt = c & 0xFFFFFFFF
5707		v.AddArg(x)
5708		return true
5709	}
5710	// match: (ANDconst [c] (MOVWZreg x))
5711	// result: (ANDconst [c&0xFFFFFFFF] x)
5712	for {
5713		c := v.AuxInt
5714		v_0 := v.Args[0]
5715		if v_0.Op != OpPPC64MOVWZreg {
5716			break
5717		}
5718		x := v_0.Args[0]
5719		v.reset(OpPPC64ANDconst)
5720		v.AuxInt = c & 0xFFFFFFFF
5721		v.AddArg(x)
5722		return true
5723	}
5724	return false
5725}
5726func rewriteValuePPC64_OpPPC64CMP_0(v *Value) bool {
5727	b := v.Block
5728	// match: (CMP x (MOVDconst [c]))
5729	// cond: is16Bit(c)
5730	// result: (CMPconst x [c])
5731	for {
5732		_ = v.Args[1]
5733		x := v.Args[0]
5734		v_1 := v.Args[1]
5735		if v_1.Op != OpPPC64MOVDconst {
5736			break
5737		}
5738		c := v_1.AuxInt
5739		if !(is16Bit(c)) {
5740			break
5741		}
5742		v.reset(OpPPC64CMPconst)
5743		v.AuxInt = c
5744		v.AddArg(x)
5745		return true
5746	}
5747	// match: (CMP (MOVDconst [c]) y)
5748	// cond: is16Bit(c)
5749	// result: (InvertFlags (CMPconst y [c]))
5750	for {
5751		y := v.Args[1]
5752		v_0 := v.Args[0]
5753		if v_0.Op != OpPPC64MOVDconst {
5754			break
5755		}
5756		c := v_0.AuxInt
5757		if !(is16Bit(c)) {
5758			break
5759		}
5760		v.reset(OpPPC64InvertFlags)
5761		v0 := b.NewValue0(v.Pos, OpPPC64CMPconst, types.TypeFlags)
5762		v0.AuxInt = c
5763		v0.AddArg(y)
5764		v.AddArg(v0)
5765		return true
5766	}
5767	return false
5768}
5769func rewriteValuePPC64_OpPPC64CMPU_0(v *Value) bool {
5770	b := v.Block
5771	// match: (CMPU x (MOVDconst [c]))
5772	// cond: isU16Bit(c)
5773	// result: (CMPUconst x [c])
5774	for {
5775		_ = v.Args[1]
5776		x := v.Args[0]
5777		v_1 := v.Args[1]
5778		if v_1.Op != OpPPC64MOVDconst {
5779			break
5780		}
5781		c := v_1.AuxInt
5782		if !(isU16Bit(c)) {
5783			break
5784		}
5785		v.reset(OpPPC64CMPUconst)
5786		v.AuxInt = c
5787		v.AddArg(x)
5788		return true
5789	}
5790	// match: (CMPU (MOVDconst [c]) y)
5791	// cond: isU16Bit(c)
5792	// result: (InvertFlags (CMPUconst y [c]))
5793	for {
5794		y := v.Args[1]
5795		v_0 := v.Args[0]
5796		if v_0.Op != OpPPC64MOVDconst {
5797			break
5798		}
5799		c := v_0.AuxInt
5800		if !(isU16Bit(c)) {
5801			break
5802		}
5803		v.reset(OpPPC64InvertFlags)
5804		v0 := b.NewValue0(v.Pos, OpPPC64CMPUconst, types.TypeFlags)
5805		v0.AuxInt = c
5806		v0.AddArg(y)
5807		v.AddArg(v0)
5808		return true
5809	}
5810	return false
5811}
5812func rewriteValuePPC64_OpPPC64CMPUconst_0(v *Value) bool {
5813	// match: (CMPUconst (MOVDconst [x]) [y])
5814	// cond: x==y
5815	// result: (FlagEQ)
5816	for {
5817		y := v.AuxInt
5818		v_0 := v.Args[0]
5819		if v_0.Op != OpPPC64MOVDconst {
5820			break
5821		}
5822		x := v_0.AuxInt
5823		if !(x == y) {
5824			break
5825		}
5826		v.reset(OpPPC64FlagEQ)
5827		return true
5828	}
5829	// match: (CMPUconst (MOVDconst [x]) [y])
5830	// cond: uint64(x)<uint64(y)
5831	// result: (FlagLT)
5832	for {
5833		y := v.AuxInt
5834		v_0 := v.Args[0]
5835		if v_0.Op != OpPPC64MOVDconst {
5836			break
5837		}
5838		x := v_0.AuxInt
5839		if !(uint64(x) < uint64(y)) {
5840			break
5841		}
5842		v.reset(OpPPC64FlagLT)
5843		return true
5844	}
5845	// match: (CMPUconst (MOVDconst [x]) [y])
5846	// cond: uint64(x)>uint64(y)
5847	// result: (FlagGT)
5848	for {
5849		y := v.AuxInt
5850		v_0 := v.Args[0]
5851		if v_0.Op != OpPPC64MOVDconst {
5852			break
5853		}
5854		x := v_0.AuxInt
5855		if !(uint64(x) > uint64(y)) {
5856			break
5857		}
5858		v.reset(OpPPC64FlagGT)
5859		return true
5860	}
5861	return false
5862}
5863func rewriteValuePPC64_OpPPC64CMPW_0(v *Value) bool {
5864	b := v.Block
5865	// match: (CMPW x (MOVWreg y))
5866	// result: (CMPW x y)
5867	for {
5868		_ = v.Args[1]
5869		x := v.Args[0]
5870		v_1 := v.Args[1]
5871		if v_1.Op != OpPPC64MOVWreg {
5872			break
5873		}
5874		y := v_1.Args[0]
5875		v.reset(OpPPC64CMPW)
5876		v.AddArg(x)
5877		v.AddArg(y)
5878		return true
5879	}
5880	// match: (CMPW (MOVWreg x) y)
5881	// result: (CMPW x y)
5882	for {
5883		y := v.Args[1]
5884		v_0 := v.Args[0]
5885		if v_0.Op != OpPPC64MOVWreg {
5886			break
5887		}
5888		x := v_0.Args[0]
5889		v.reset(OpPPC64CMPW)
5890		v.AddArg(x)
5891		v.AddArg(y)
5892		return true
5893	}
5894	// match: (CMPW x (MOVDconst [c]))
5895	// cond: is16Bit(c)
5896	// result: (CMPWconst x [c])
5897	for {
5898		_ = v.Args[1]
5899		x := v.Args[0]
5900		v_1 := v.Args[1]
5901		if v_1.Op != OpPPC64MOVDconst {
5902			break
5903		}
5904		c := v_1.AuxInt
5905		if !(is16Bit(c)) {
5906			break
5907		}
5908		v.reset(OpPPC64CMPWconst)
5909		v.AuxInt = c
5910		v.AddArg(x)
5911		return true
5912	}
5913	// match: (CMPW (MOVDconst [c]) y)
5914	// cond: is16Bit(c)
5915	// result: (InvertFlags (CMPWconst y [c]))
5916	for {
5917		y := v.Args[1]
5918		v_0 := v.Args[0]
5919		if v_0.Op != OpPPC64MOVDconst {
5920			break
5921		}
5922		c := v_0.AuxInt
5923		if !(is16Bit(c)) {
5924			break
5925		}
5926		v.reset(OpPPC64InvertFlags)
5927		v0 := b.NewValue0(v.Pos, OpPPC64CMPWconst, types.TypeFlags)
5928		v0.AuxInt = c
5929		v0.AddArg(y)
5930		v.AddArg(v0)
5931		return true
5932	}
5933	return false
5934}
5935func rewriteValuePPC64_OpPPC64CMPWU_0(v *Value) bool {
5936	b := v.Block
5937	// match: (CMPWU x (MOVWZreg y))
5938	// result: (CMPWU x y)
5939	for {
5940		_ = v.Args[1]
5941		x := v.Args[0]
5942		v_1 := v.Args[1]
5943		if v_1.Op != OpPPC64MOVWZreg {
5944			break
5945		}
5946		y := v_1.Args[0]
5947		v.reset(OpPPC64CMPWU)
5948		v.AddArg(x)
5949		v.AddArg(y)
5950		return true
5951	}
5952	// match: (CMPWU (MOVWZreg x) y)
5953	// result: (CMPWU x y)
5954	for {
5955		y := v.Args[1]
5956		v_0 := v.Args[0]
5957		if v_0.Op != OpPPC64MOVWZreg {
5958			break
5959		}
5960		x := v_0.Args[0]
5961		v.reset(OpPPC64CMPWU)
5962		v.AddArg(x)
5963		v.AddArg(y)
5964		return true
5965	}
5966	// match: (CMPWU x (MOVDconst [c]))
5967	// cond: isU16Bit(c)
5968	// result: (CMPWUconst x [c])
5969	for {
5970		_ = v.Args[1]
5971		x := v.Args[0]
5972		v_1 := v.Args[1]
5973		if v_1.Op != OpPPC64MOVDconst {
5974			break
5975		}
5976		c := v_1.AuxInt
5977		if !(isU16Bit(c)) {
5978			break
5979		}
5980		v.reset(OpPPC64CMPWUconst)
5981		v.AuxInt = c
5982		v.AddArg(x)
5983		return true
5984	}
5985	// match: (CMPWU (MOVDconst [c]) y)
5986	// cond: isU16Bit(c)
5987	// result: (InvertFlags (CMPWUconst y [c]))
5988	for {
5989		y := v.Args[1]
5990		v_0 := v.Args[0]
5991		if v_0.Op != OpPPC64MOVDconst {
5992			break
5993		}
5994		c := v_0.AuxInt
5995		if !(isU16Bit(c)) {
5996			break
5997		}
5998		v.reset(OpPPC64InvertFlags)
5999		v0 := b.NewValue0(v.Pos, OpPPC64CMPWUconst, types.TypeFlags)
6000		v0.AuxInt = c
6001		v0.AddArg(y)
6002		v.AddArg(v0)
6003		return true
6004	}
6005	return false
6006}
6007func rewriteValuePPC64_OpPPC64CMPWUconst_0(v *Value) bool {
6008	// match: (CMPWUconst (MOVDconst [x]) [y])
6009	// cond: int32(x)==int32(y)
6010	// result: (FlagEQ)
6011	for {
6012		y := v.AuxInt
6013		v_0 := v.Args[0]
6014		if v_0.Op != OpPPC64MOVDconst {
6015			break
6016		}
6017		x := v_0.AuxInt
6018		if !(int32(x) == int32(y)) {
6019			break
6020		}
6021		v.reset(OpPPC64FlagEQ)
6022		return true
6023	}
6024	// match: (CMPWUconst (MOVDconst [x]) [y])
6025	// cond: uint32(x)<uint32(y)
6026	// result: (FlagLT)
6027	for {
6028		y := v.AuxInt
6029		v_0 := v.Args[0]
6030		if v_0.Op != OpPPC64MOVDconst {
6031			break
6032		}
6033		x := v_0.AuxInt
6034		if !(uint32(x) < uint32(y)) {
6035			break
6036		}
6037		v.reset(OpPPC64FlagLT)
6038		return true
6039	}
6040	// match: (CMPWUconst (MOVDconst [x]) [y])
6041	// cond: uint32(x)>uint32(y)
6042	// result: (FlagGT)
6043	for {
6044		y := v.AuxInt
6045		v_0 := v.Args[0]
6046		if v_0.Op != OpPPC64MOVDconst {
6047			break
6048		}
6049		x := v_0.AuxInt
6050		if !(uint32(x) > uint32(y)) {
6051			break
6052		}
6053		v.reset(OpPPC64FlagGT)
6054		return true
6055	}
6056	return false
6057}
6058func rewriteValuePPC64_OpPPC64CMPWconst_0(v *Value) bool {
6059	// match: (CMPWconst (MOVDconst [x]) [y])
6060	// cond: int32(x)==int32(y)
6061	// result: (FlagEQ)
6062	for {
6063		y := v.AuxInt
6064		v_0 := v.Args[0]
6065		if v_0.Op != OpPPC64MOVDconst {
6066			break
6067		}
6068		x := v_0.AuxInt
6069		if !(int32(x) == int32(y)) {
6070			break
6071		}
6072		v.reset(OpPPC64FlagEQ)
6073		return true
6074	}
6075	// match: (CMPWconst (MOVDconst [x]) [y])
6076	// cond: int32(x)<int32(y)
6077	// result: (FlagLT)
6078	for {
6079		y := v.AuxInt
6080		v_0 := v.Args[0]
6081		if v_0.Op != OpPPC64MOVDconst {
6082			break
6083		}
6084		x := v_0.AuxInt
6085		if !(int32(x) < int32(y)) {
6086			break
6087		}
6088		v.reset(OpPPC64FlagLT)
6089		return true
6090	}
6091	// match: (CMPWconst (MOVDconst [x]) [y])
6092	// cond: int32(x)>int32(y)
6093	// result: (FlagGT)
6094	for {
6095		y := v.AuxInt
6096		v_0 := v.Args[0]
6097		if v_0.Op != OpPPC64MOVDconst {
6098			break
6099		}
6100		x := v_0.AuxInt
6101		if !(int32(x) > int32(y)) {
6102			break
6103		}
6104		v.reset(OpPPC64FlagGT)
6105		return true
6106	}
6107	return false
6108}
6109func rewriteValuePPC64_OpPPC64CMPconst_0(v *Value) bool {
6110	// match: (CMPconst (MOVDconst [x]) [y])
6111	// cond: x==y
6112	// result: (FlagEQ)
6113	for {
6114		y := v.AuxInt
6115		v_0 := v.Args[0]
6116		if v_0.Op != OpPPC64MOVDconst {
6117			break
6118		}
6119		x := v_0.AuxInt
6120		if !(x == y) {
6121			break
6122		}
6123		v.reset(OpPPC64FlagEQ)
6124		return true
6125	}
6126	// match: (CMPconst (MOVDconst [x]) [y])
6127	// cond: x<y
6128	// result: (FlagLT)
6129	for {
6130		y := v.AuxInt
6131		v_0 := v.Args[0]
6132		if v_0.Op != OpPPC64MOVDconst {
6133			break
6134		}
6135		x := v_0.AuxInt
6136		if !(x < y) {
6137			break
6138		}
6139		v.reset(OpPPC64FlagLT)
6140		return true
6141	}
6142	// match: (CMPconst (MOVDconst [x]) [y])
6143	// cond: x>y
6144	// result: (FlagGT)
6145	for {
6146		y := v.AuxInt
6147		v_0 := v.Args[0]
6148		if v_0.Op != OpPPC64MOVDconst {
6149			break
6150		}
6151		x := v_0.AuxInt
6152		if !(x > y) {
6153			break
6154		}
6155		v.reset(OpPPC64FlagGT)
6156		return true
6157	}
6158	return false
6159}
6160func rewriteValuePPC64_OpPPC64Equal_0(v *Value) bool {
6161	b := v.Block
6162	typ := &b.Func.Config.Types
6163	// match: (Equal (FlagEQ))
6164	// result: (MOVDconst [1])
6165	for {
6166		v_0 := v.Args[0]
6167		if v_0.Op != OpPPC64FlagEQ {
6168			break
6169		}
6170		v.reset(OpPPC64MOVDconst)
6171		v.AuxInt = 1
6172		return true
6173	}
6174	// match: (Equal (FlagLT))
6175	// result: (MOVDconst [0])
6176	for {
6177		v_0 := v.Args[0]
6178		if v_0.Op != OpPPC64FlagLT {
6179			break
6180		}
6181		v.reset(OpPPC64MOVDconst)
6182		v.AuxInt = 0
6183		return true
6184	}
6185	// match: (Equal (FlagGT))
6186	// result: (MOVDconst [0])
6187	for {
6188		v_0 := v.Args[0]
6189		if v_0.Op != OpPPC64FlagGT {
6190			break
6191		}
6192		v.reset(OpPPC64MOVDconst)
6193		v.AuxInt = 0
6194		return true
6195	}
6196	// match: (Equal (InvertFlags x))
6197	// result: (Equal x)
6198	for {
6199		v_0 := v.Args[0]
6200		if v_0.Op != OpPPC64InvertFlags {
6201			break
6202		}
6203		x := v_0.Args[0]
6204		v.reset(OpPPC64Equal)
6205		v.AddArg(x)
6206		return true
6207	}
6208	// match: (Equal cmp)
6209	// result: (ISELB [2] (MOVDconst [1]) cmp)
6210	for {
6211		cmp := v.Args[0]
6212		v.reset(OpPPC64ISELB)
6213		v.AuxInt = 2
6214		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
6215		v0.AuxInt = 1
6216		v.AddArg(v0)
6217		v.AddArg(cmp)
6218		return true
6219	}
6220}
6221func rewriteValuePPC64_OpPPC64FABS_0(v *Value) bool {
6222	// match: (FABS (FMOVDconst [x]))
6223	// result: (FMOVDconst [auxFrom64F(math.Abs(auxTo64F(x)))])
6224	for {
6225		v_0 := v.Args[0]
6226		if v_0.Op != OpPPC64FMOVDconst {
6227			break
6228		}
6229		x := v_0.AuxInt
6230		v.reset(OpPPC64FMOVDconst)
6231		v.AuxInt = auxFrom64F(math.Abs(auxTo64F(x)))
6232		return true
6233	}
6234	return false
6235}
6236func rewriteValuePPC64_OpPPC64FADD_0(v *Value) bool {
6237	// match: (FADD (FMUL x y) z)
6238	// result: (FMADD x y z)
6239	for {
6240		z := v.Args[1]
6241		v_0 := v.Args[0]
6242		if v_0.Op != OpPPC64FMUL {
6243			break
6244		}
6245		y := v_0.Args[1]
6246		x := v_0.Args[0]
6247		v.reset(OpPPC64FMADD)
6248		v.AddArg(x)
6249		v.AddArg(y)
6250		v.AddArg(z)
6251		return true
6252	}
6253	// match: (FADD z (FMUL x y))
6254	// result: (FMADD x y z)
6255	for {
6256		_ = v.Args[1]
6257		z := v.Args[0]
6258		v_1 := v.Args[1]
6259		if v_1.Op != OpPPC64FMUL {
6260			break
6261		}
6262		y := v_1.Args[1]
6263		x := v_1.Args[0]
6264		v.reset(OpPPC64FMADD)
6265		v.AddArg(x)
6266		v.AddArg(y)
6267		v.AddArg(z)
6268		return true
6269	}
6270	return false
6271}
6272func rewriteValuePPC64_OpPPC64FADDS_0(v *Value) bool {
6273	// match: (FADDS (FMULS x y) z)
6274	// result: (FMADDS x y z)
6275	for {
6276		z := v.Args[1]
6277		v_0 := v.Args[0]
6278		if v_0.Op != OpPPC64FMULS {
6279			break
6280		}
6281		y := v_0.Args[1]
6282		x := v_0.Args[0]
6283		v.reset(OpPPC64FMADDS)
6284		v.AddArg(x)
6285		v.AddArg(y)
6286		v.AddArg(z)
6287		return true
6288	}
6289	// match: (FADDS z (FMULS x y))
6290	// result: (FMADDS x y z)
6291	for {
6292		_ = v.Args[1]
6293		z := v.Args[0]
6294		v_1 := v.Args[1]
6295		if v_1.Op != OpPPC64FMULS {
6296			break
6297		}
6298		y := v_1.Args[1]
6299		x := v_1.Args[0]
6300		v.reset(OpPPC64FMADDS)
6301		v.AddArg(x)
6302		v.AddArg(y)
6303		v.AddArg(z)
6304		return true
6305	}
6306	return false
6307}
6308func rewriteValuePPC64_OpPPC64FCEIL_0(v *Value) bool {
6309	// match: (FCEIL (FMOVDconst [x]))
6310	// result: (FMOVDconst [auxFrom64F(math.Ceil(auxTo64F(x)))])
6311	for {
6312		v_0 := v.Args[0]
6313		if v_0.Op != OpPPC64FMOVDconst {
6314			break
6315		}
6316		x := v_0.AuxInt
6317		v.reset(OpPPC64FMOVDconst)
6318		v.AuxInt = auxFrom64F(math.Ceil(auxTo64F(x)))
6319		return true
6320	}
6321	return false
6322}
6323func rewriteValuePPC64_OpPPC64FFLOOR_0(v *Value) bool {
6324	// match: (FFLOOR (FMOVDconst [x]))
6325	// result: (FMOVDconst [auxFrom64F(math.Floor(auxTo64F(x)))])
6326	for {
6327		v_0 := v.Args[0]
6328		if v_0.Op != OpPPC64FMOVDconst {
6329			break
6330		}
6331		x := v_0.AuxInt
6332		v.reset(OpPPC64FMOVDconst)
6333		v.AuxInt = auxFrom64F(math.Floor(auxTo64F(x)))
6334		return true
6335	}
6336	return false
6337}
6338func rewriteValuePPC64_OpPPC64FGreaterEqual_0(v *Value) bool {
6339	b := v.Block
6340	typ := &b.Func.Config.Types
6341	// match: (FGreaterEqual cmp)
6342	// result: (ISEL [2] (MOVDconst [1]) (ISELB [1] (MOVDconst [1]) cmp) cmp)
6343	for {
6344		cmp := v.Args[0]
6345		v.reset(OpPPC64ISEL)
6346		v.AuxInt = 2
6347		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
6348		v0.AuxInt = 1
6349		v.AddArg(v0)
6350		v1 := b.NewValue0(v.Pos, OpPPC64ISELB, typ.Int32)
6351		v1.AuxInt = 1
6352		v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
6353		v2.AuxInt = 1
6354		v1.AddArg(v2)
6355		v1.AddArg(cmp)
6356		v.AddArg(v1)
6357		v.AddArg(cmp)
6358		return true
6359	}
6360}
6361func rewriteValuePPC64_OpPPC64FGreaterThan_0(v *Value) bool {
6362	b := v.Block
6363	typ := &b.Func.Config.Types
6364	// match: (FGreaterThan cmp)
6365	// result: (ISELB [1] (MOVDconst [1]) cmp)
6366	for {
6367		cmp := v.Args[0]
6368		v.reset(OpPPC64ISELB)
6369		v.AuxInt = 1
6370		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
6371		v0.AuxInt = 1
6372		v.AddArg(v0)
6373		v.AddArg(cmp)
6374		return true
6375	}
6376}
6377func rewriteValuePPC64_OpPPC64FLessEqual_0(v *Value) bool {
6378	b := v.Block
6379	typ := &b.Func.Config.Types
6380	// match: (FLessEqual cmp)
6381	// result: (ISEL [2] (MOVDconst [1]) (ISELB [0] (MOVDconst [1]) cmp) cmp)
6382	for {
6383		cmp := v.Args[0]
6384		v.reset(OpPPC64ISEL)
6385		v.AuxInt = 2
6386		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
6387		v0.AuxInt = 1
6388		v.AddArg(v0)
6389		v1 := b.NewValue0(v.Pos, OpPPC64ISELB, typ.Int32)
6390		v1.AuxInt = 0
6391		v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
6392		v2.AuxInt = 1
6393		v1.AddArg(v2)
6394		v1.AddArg(cmp)
6395		v.AddArg(v1)
6396		v.AddArg(cmp)
6397		return true
6398	}
6399}
6400func rewriteValuePPC64_OpPPC64FLessThan_0(v *Value) bool {
6401	b := v.Block
6402	typ := &b.Func.Config.Types
6403	// match: (FLessThan cmp)
6404	// result: (ISELB [0] (MOVDconst [1]) cmp)
6405	for {
6406		cmp := v.Args[0]
6407		v.reset(OpPPC64ISELB)
6408		v.AuxInt = 0
6409		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
6410		v0.AuxInt = 1
6411		v.AddArg(v0)
6412		v.AddArg(cmp)
6413		return true
6414	}
6415}
6416func rewriteValuePPC64_OpPPC64FMOVDload_0(v *Value) bool {
6417	// match: (FMOVDload [off] {sym} ptr (MOVDstore [off] {sym} ptr x _))
6418	// result: (MTVSRD x)
6419	for {
6420		off := v.AuxInt
6421		sym := v.Aux
6422		_ = v.Args[1]
6423		ptr := v.Args[0]
6424		v_1 := v.Args[1]
6425		if v_1.Op != OpPPC64MOVDstore || v_1.AuxInt != off || v_1.Aux != sym {
6426			break
6427		}
6428		_ = v_1.Args[2]
6429		if ptr != v_1.Args[0] {
6430			break
6431		}
6432		x := v_1.Args[1]
6433		v.reset(OpPPC64MTVSRD)
6434		v.AddArg(x)
6435		return true
6436	}
6437	// match: (FMOVDload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
6438	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
6439	// result: (FMOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
6440	for {
6441		off1 := v.AuxInt
6442		sym1 := v.Aux
6443		mem := v.Args[1]
6444		p := v.Args[0]
6445		if p.Op != OpPPC64MOVDaddr {
6446			break
6447		}
6448		off2 := p.AuxInt
6449		sym2 := p.Aux
6450		ptr := p.Args[0]
6451		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
6452			break
6453		}
6454		v.reset(OpPPC64FMOVDload)
6455		v.AuxInt = off1 + off2
6456		v.Aux = mergeSym(sym1, sym2)
6457		v.AddArg(ptr)
6458		v.AddArg(mem)
6459		return true
6460	}
6461	// match: (FMOVDload [off1] {sym} (ADDconst [off2] ptr) mem)
6462	// cond: is16Bit(off1+off2)
6463	// result: (FMOVDload [off1+off2] {sym} ptr mem)
6464	for {
6465		off1 := v.AuxInt
6466		sym := v.Aux
6467		mem := v.Args[1]
6468		v_0 := v.Args[0]
6469		if v_0.Op != OpPPC64ADDconst {
6470			break
6471		}
6472		off2 := v_0.AuxInt
6473		ptr := v_0.Args[0]
6474		if !(is16Bit(off1 + off2)) {
6475			break
6476		}
6477		v.reset(OpPPC64FMOVDload)
6478		v.AuxInt = off1 + off2
6479		v.Aux = sym
6480		v.AddArg(ptr)
6481		v.AddArg(mem)
6482		return true
6483	}
6484	return false
6485}
6486func rewriteValuePPC64_OpPPC64FMOVDstore_0(v *Value) bool {
6487	// match: (FMOVDstore [off] {sym} ptr (MTVSRD x) mem)
6488	// result: (MOVDstore [off] {sym} ptr x mem)
6489	for {
6490		off := v.AuxInt
6491		sym := v.Aux
6492		mem := v.Args[2]
6493		ptr := v.Args[0]
6494		v_1 := v.Args[1]
6495		if v_1.Op != OpPPC64MTVSRD {
6496			break
6497		}
6498		x := v_1.Args[0]
6499		v.reset(OpPPC64MOVDstore)
6500		v.AuxInt = off
6501		v.Aux = sym
6502		v.AddArg(ptr)
6503		v.AddArg(x)
6504		v.AddArg(mem)
6505		return true
6506	}
6507	// match: (FMOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem)
6508	// cond: is16Bit(off1+off2)
6509	// result: (FMOVDstore [off1+off2] {sym} ptr val mem)
6510	for {
6511		off1 := v.AuxInt
6512		sym := v.Aux
6513		mem := v.Args[2]
6514		v_0 := v.Args[0]
6515		if v_0.Op != OpPPC64ADDconst {
6516			break
6517		}
6518		off2 := v_0.AuxInt
6519		ptr := v_0.Args[0]
6520		val := v.Args[1]
6521		if !(is16Bit(off1 + off2)) {
6522			break
6523		}
6524		v.reset(OpPPC64FMOVDstore)
6525		v.AuxInt = off1 + off2
6526		v.Aux = sym
6527		v.AddArg(ptr)
6528		v.AddArg(val)
6529		v.AddArg(mem)
6530		return true
6531	}
6532	// match: (FMOVDstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
6533	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
6534	// result: (FMOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
6535	for {
6536		off1 := v.AuxInt
6537		sym1 := v.Aux
6538		mem := v.Args[2]
6539		p := v.Args[0]
6540		if p.Op != OpPPC64MOVDaddr {
6541			break
6542		}
6543		off2 := p.AuxInt
6544		sym2 := p.Aux
6545		ptr := p.Args[0]
6546		val := v.Args[1]
6547		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
6548			break
6549		}
6550		v.reset(OpPPC64FMOVDstore)
6551		v.AuxInt = off1 + off2
6552		v.Aux = mergeSym(sym1, sym2)
6553		v.AddArg(ptr)
6554		v.AddArg(val)
6555		v.AddArg(mem)
6556		return true
6557	}
6558	return false
6559}
6560func rewriteValuePPC64_OpPPC64FMOVSload_0(v *Value) bool {
6561	// match: (FMOVSload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
6562	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
6563	// result: (FMOVSload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
6564	for {
6565		off1 := v.AuxInt
6566		sym1 := v.Aux
6567		mem := v.Args[1]
6568		p := v.Args[0]
6569		if p.Op != OpPPC64MOVDaddr {
6570			break
6571		}
6572		off2 := p.AuxInt
6573		sym2 := p.Aux
6574		ptr := p.Args[0]
6575		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
6576			break
6577		}
6578		v.reset(OpPPC64FMOVSload)
6579		v.AuxInt = off1 + off2
6580		v.Aux = mergeSym(sym1, sym2)
6581		v.AddArg(ptr)
6582		v.AddArg(mem)
6583		return true
6584	}
6585	// match: (FMOVSload [off1] {sym} (ADDconst [off2] ptr) mem)
6586	// cond: is16Bit(off1+off2)
6587	// result: (FMOVSload [off1+off2] {sym} ptr mem)
6588	for {
6589		off1 := v.AuxInt
6590		sym := v.Aux
6591		mem := v.Args[1]
6592		v_0 := v.Args[0]
6593		if v_0.Op != OpPPC64ADDconst {
6594			break
6595		}
6596		off2 := v_0.AuxInt
6597		ptr := v_0.Args[0]
6598		if !(is16Bit(off1 + off2)) {
6599			break
6600		}
6601		v.reset(OpPPC64FMOVSload)
6602		v.AuxInt = off1 + off2
6603		v.Aux = sym
6604		v.AddArg(ptr)
6605		v.AddArg(mem)
6606		return true
6607	}
6608	return false
6609}
6610func rewriteValuePPC64_OpPPC64FMOVSstore_0(v *Value) bool {
6611	// match: (FMOVSstore [off1] {sym} (ADDconst [off2] ptr) val mem)
6612	// cond: is16Bit(off1+off2)
6613	// result: (FMOVSstore [off1+off2] {sym} ptr val mem)
6614	for {
6615		off1 := v.AuxInt
6616		sym := v.Aux
6617		mem := v.Args[2]
6618		v_0 := v.Args[0]
6619		if v_0.Op != OpPPC64ADDconst {
6620			break
6621		}
6622		off2 := v_0.AuxInt
6623		ptr := v_0.Args[0]
6624		val := v.Args[1]
6625		if !(is16Bit(off1 + off2)) {
6626			break
6627		}
6628		v.reset(OpPPC64FMOVSstore)
6629		v.AuxInt = off1 + off2
6630		v.Aux = sym
6631		v.AddArg(ptr)
6632		v.AddArg(val)
6633		v.AddArg(mem)
6634		return true
6635	}
6636	// match: (FMOVSstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
6637	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
6638	// result: (FMOVSstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
6639	for {
6640		off1 := v.AuxInt
6641		sym1 := v.Aux
6642		mem := v.Args[2]
6643		p := v.Args[0]
6644		if p.Op != OpPPC64MOVDaddr {
6645			break
6646		}
6647		off2 := p.AuxInt
6648		sym2 := p.Aux
6649		ptr := p.Args[0]
6650		val := v.Args[1]
6651		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
6652			break
6653		}
6654		v.reset(OpPPC64FMOVSstore)
6655		v.AuxInt = off1 + off2
6656		v.Aux = mergeSym(sym1, sym2)
6657		v.AddArg(ptr)
6658		v.AddArg(val)
6659		v.AddArg(mem)
6660		return true
6661	}
6662	return false
6663}
6664func rewriteValuePPC64_OpPPC64FNEG_0(v *Value) bool {
6665	// match: (FNEG (FABS x))
6666	// result: (FNABS x)
6667	for {
6668		v_0 := v.Args[0]
6669		if v_0.Op != OpPPC64FABS {
6670			break
6671		}
6672		x := v_0.Args[0]
6673		v.reset(OpPPC64FNABS)
6674		v.AddArg(x)
6675		return true
6676	}
6677	// match: (FNEG (FNABS x))
6678	// result: (FABS x)
6679	for {
6680		v_0 := v.Args[0]
6681		if v_0.Op != OpPPC64FNABS {
6682			break
6683		}
6684		x := v_0.Args[0]
6685		v.reset(OpPPC64FABS)
6686		v.AddArg(x)
6687		return true
6688	}
6689	return false
6690}
6691func rewriteValuePPC64_OpPPC64FSQRT_0(v *Value) bool {
6692	// match: (FSQRT (FMOVDconst [x]))
6693	// result: (FMOVDconst [auxFrom64F(math.Sqrt(auxTo64F(x)))])
6694	for {
6695		v_0 := v.Args[0]
6696		if v_0.Op != OpPPC64FMOVDconst {
6697			break
6698		}
6699		x := v_0.AuxInt
6700		v.reset(OpPPC64FMOVDconst)
6701		v.AuxInt = auxFrom64F(math.Sqrt(auxTo64F(x)))
6702		return true
6703	}
6704	return false
6705}
6706func rewriteValuePPC64_OpPPC64FSUB_0(v *Value) bool {
6707	// match: (FSUB (FMUL x y) z)
6708	// result: (FMSUB x y z)
6709	for {
6710		z := v.Args[1]
6711		v_0 := v.Args[0]
6712		if v_0.Op != OpPPC64FMUL {
6713			break
6714		}
6715		y := v_0.Args[1]
6716		x := v_0.Args[0]
6717		v.reset(OpPPC64FMSUB)
6718		v.AddArg(x)
6719		v.AddArg(y)
6720		v.AddArg(z)
6721		return true
6722	}
6723	return false
6724}
6725func rewriteValuePPC64_OpPPC64FSUBS_0(v *Value) bool {
6726	// match: (FSUBS (FMULS x y) z)
6727	// result: (FMSUBS x y z)
6728	for {
6729		z := v.Args[1]
6730		v_0 := v.Args[0]
6731		if v_0.Op != OpPPC64FMULS {
6732			break
6733		}
6734		y := v_0.Args[1]
6735		x := v_0.Args[0]
6736		v.reset(OpPPC64FMSUBS)
6737		v.AddArg(x)
6738		v.AddArg(y)
6739		v.AddArg(z)
6740		return true
6741	}
6742	return false
6743}
6744func rewriteValuePPC64_OpPPC64FTRUNC_0(v *Value) bool {
6745	// match: (FTRUNC (FMOVDconst [x]))
6746	// result: (FMOVDconst [auxFrom64F(math.Trunc(auxTo64F(x)))])
6747	for {
6748		v_0 := v.Args[0]
6749		if v_0.Op != OpPPC64FMOVDconst {
6750			break
6751		}
6752		x := v_0.AuxInt
6753		v.reset(OpPPC64FMOVDconst)
6754		v.AuxInt = auxFrom64F(math.Trunc(auxTo64F(x)))
6755		return true
6756	}
6757	return false
6758}
6759func rewriteValuePPC64_OpPPC64GreaterEqual_0(v *Value) bool {
6760	b := v.Block
6761	typ := &b.Func.Config.Types
6762	// match: (GreaterEqual (FlagEQ))
6763	// result: (MOVDconst [1])
6764	for {
6765		v_0 := v.Args[0]
6766		if v_0.Op != OpPPC64FlagEQ {
6767			break
6768		}
6769		v.reset(OpPPC64MOVDconst)
6770		v.AuxInt = 1
6771		return true
6772	}
6773	// match: (GreaterEqual (FlagLT))
6774	// result: (MOVDconst [0])
6775	for {
6776		v_0 := v.Args[0]
6777		if v_0.Op != OpPPC64FlagLT {
6778			break
6779		}
6780		v.reset(OpPPC64MOVDconst)
6781		v.AuxInt = 0
6782		return true
6783	}
6784	// match: (GreaterEqual (FlagGT))
6785	// result: (MOVDconst [1])
6786	for {
6787		v_0 := v.Args[0]
6788		if v_0.Op != OpPPC64FlagGT {
6789			break
6790		}
6791		v.reset(OpPPC64MOVDconst)
6792		v.AuxInt = 1
6793		return true
6794	}
6795	// match: (GreaterEqual (InvertFlags x))
6796	// result: (LessEqual x)
6797	for {
6798		v_0 := v.Args[0]
6799		if v_0.Op != OpPPC64InvertFlags {
6800			break
6801		}
6802		x := v_0.Args[0]
6803		v.reset(OpPPC64LessEqual)
6804		v.AddArg(x)
6805		return true
6806	}
6807	// match: (GreaterEqual cmp)
6808	// result: (ISELB [4] (MOVDconst [1]) cmp)
6809	for {
6810		cmp := v.Args[0]
6811		v.reset(OpPPC64ISELB)
6812		v.AuxInt = 4
6813		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
6814		v0.AuxInt = 1
6815		v.AddArg(v0)
6816		v.AddArg(cmp)
6817		return true
6818	}
6819}
6820func rewriteValuePPC64_OpPPC64GreaterThan_0(v *Value) bool {
6821	b := v.Block
6822	typ := &b.Func.Config.Types
6823	// match: (GreaterThan (FlagEQ))
6824	// result: (MOVDconst [0])
6825	for {
6826		v_0 := v.Args[0]
6827		if v_0.Op != OpPPC64FlagEQ {
6828			break
6829		}
6830		v.reset(OpPPC64MOVDconst)
6831		v.AuxInt = 0
6832		return true
6833	}
6834	// match: (GreaterThan (FlagLT))
6835	// result: (MOVDconst [0])
6836	for {
6837		v_0 := v.Args[0]
6838		if v_0.Op != OpPPC64FlagLT {
6839			break
6840		}
6841		v.reset(OpPPC64MOVDconst)
6842		v.AuxInt = 0
6843		return true
6844	}
6845	// match: (GreaterThan (FlagGT))
6846	// result: (MOVDconst [1])
6847	for {
6848		v_0 := v.Args[0]
6849		if v_0.Op != OpPPC64FlagGT {
6850			break
6851		}
6852		v.reset(OpPPC64MOVDconst)
6853		v.AuxInt = 1
6854		return true
6855	}
6856	// match: (GreaterThan (InvertFlags x))
6857	// result: (LessThan x)
6858	for {
6859		v_0 := v.Args[0]
6860		if v_0.Op != OpPPC64InvertFlags {
6861			break
6862		}
6863		x := v_0.Args[0]
6864		v.reset(OpPPC64LessThan)
6865		v.AddArg(x)
6866		return true
6867	}
6868	// match: (GreaterThan cmp)
6869	// result: (ISELB [1] (MOVDconst [1]) cmp)
6870	for {
6871		cmp := v.Args[0]
6872		v.reset(OpPPC64ISELB)
6873		v.AuxInt = 1
6874		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
6875		v0.AuxInt = 1
6876		v.AddArg(v0)
6877		v.AddArg(cmp)
6878		return true
6879	}
6880}
6881func rewriteValuePPC64_OpPPC64ISEL_0(v *Value) bool {
6882	// match: (ISEL [2] x _ (FlagEQ))
6883	// result: x
6884	for {
6885		if v.AuxInt != 2 {
6886			break
6887		}
6888		_ = v.Args[2]
6889		x := v.Args[0]
6890		v_2 := v.Args[2]
6891		if v_2.Op != OpPPC64FlagEQ {
6892			break
6893		}
6894		v.reset(OpCopy)
6895		v.Type = x.Type
6896		v.AddArg(x)
6897		return true
6898	}
6899	// match: (ISEL [2] _ y (FlagLT))
6900	// result: y
6901	for {
6902		if v.AuxInt != 2 {
6903			break
6904		}
6905		_ = v.Args[2]
6906		y := v.Args[1]
6907		v_2 := v.Args[2]
6908		if v_2.Op != OpPPC64FlagLT {
6909			break
6910		}
6911		v.reset(OpCopy)
6912		v.Type = y.Type
6913		v.AddArg(y)
6914		return true
6915	}
6916	// match: (ISEL [2] _ y (FlagGT))
6917	// result: y
6918	for {
6919		if v.AuxInt != 2 {
6920			break
6921		}
6922		_ = v.Args[2]
6923		y := v.Args[1]
6924		v_2 := v.Args[2]
6925		if v_2.Op != OpPPC64FlagGT {
6926			break
6927		}
6928		v.reset(OpCopy)
6929		v.Type = y.Type
6930		v.AddArg(y)
6931		return true
6932	}
6933	// match: (ISEL [6] _ y (FlagEQ))
6934	// result: y
6935	for {
6936		if v.AuxInt != 6 {
6937			break
6938		}
6939		_ = v.Args[2]
6940		y := v.Args[1]
6941		v_2 := v.Args[2]
6942		if v_2.Op != OpPPC64FlagEQ {
6943			break
6944		}
6945		v.reset(OpCopy)
6946		v.Type = y.Type
6947		v.AddArg(y)
6948		return true
6949	}
6950	// match: (ISEL [6] x _ (FlagLT))
6951	// result: x
6952	for {
6953		if v.AuxInt != 6 {
6954			break
6955		}
6956		_ = v.Args[2]
6957		x := v.Args[0]
6958		v_2 := v.Args[2]
6959		if v_2.Op != OpPPC64FlagLT {
6960			break
6961		}
6962		v.reset(OpCopy)
6963		v.Type = x.Type
6964		v.AddArg(x)
6965		return true
6966	}
6967	// match: (ISEL [6] x _ (FlagGT))
6968	// result: x
6969	for {
6970		if v.AuxInt != 6 {
6971			break
6972		}
6973		_ = v.Args[2]
6974		x := v.Args[0]
6975		v_2 := v.Args[2]
6976		if v_2.Op != OpPPC64FlagGT {
6977			break
6978		}
6979		v.reset(OpCopy)
6980		v.Type = x.Type
6981		v.AddArg(x)
6982		return true
6983	}
6984	// match: (ISEL [0] _ y (FlagEQ))
6985	// result: y
6986	for {
6987		if v.AuxInt != 0 {
6988			break
6989		}
6990		_ = v.Args[2]
6991		y := v.Args[1]
6992		v_2 := v.Args[2]
6993		if v_2.Op != OpPPC64FlagEQ {
6994			break
6995		}
6996		v.reset(OpCopy)
6997		v.Type = y.Type
6998		v.AddArg(y)
6999		return true
7000	}
7001	// match: (ISEL [0] _ y (FlagGT))
7002	// result: y
7003	for {
7004		if v.AuxInt != 0 {
7005			break
7006		}
7007		_ = v.Args[2]
7008		y := v.Args[1]
7009		v_2 := v.Args[2]
7010		if v_2.Op != OpPPC64FlagGT {
7011			break
7012		}
7013		v.reset(OpCopy)
7014		v.Type = y.Type
7015		v.AddArg(y)
7016		return true
7017	}
7018	// match: (ISEL [0] x _ (FlagLT))
7019	// result: x
7020	for {
7021		if v.AuxInt != 0 {
7022			break
7023		}
7024		_ = v.Args[2]
7025		x := v.Args[0]
7026		v_2 := v.Args[2]
7027		if v_2.Op != OpPPC64FlagLT {
7028			break
7029		}
7030		v.reset(OpCopy)
7031		v.Type = x.Type
7032		v.AddArg(x)
7033		return true
7034	}
7035	// match: (ISEL [5] _ x (FlagEQ))
7036	// result: x
7037	for {
7038		if v.AuxInt != 5 {
7039			break
7040		}
7041		_ = v.Args[2]
7042		x := v.Args[1]
7043		v_2 := v.Args[2]
7044		if v_2.Op != OpPPC64FlagEQ {
7045			break
7046		}
7047		v.reset(OpCopy)
7048		v.Type = x.Type
7049		v.AddArg(x)
7050		return true
7051	}
7052	return false
7053}
7054func rewriteValuePPC64_OpPPC64ISEL_10(v *Value) bool {
7055	// match: (ISEL [5] _ x (FlagLT))
7056	// result: x
7057	for {
7058		if v.AuxInt != 5 {
7059			break
7060		}
7061		_ = v.Args[2]
7062		x := v.Args[1]
7063		v_2 := v.Args[2]
7064		if v_2.Op != OpPPC64FlagLT {
7065			break
7066		}
7067		v.reset(OpCopy)
7068		v.Type = x.Type
7069		v.AddArg(x)
7070		return true
7071	}
7072	// match: (ISEL [5] y _ (FlagGT))
7073	// result: y
7074	for {
7075		if v.AuxInt != 5 {
7076			break
7077		}
7078		_ = v.Args[2]
7079		y := v.Args[0]
7080		v_2 := v.Args[2]
7081		if v_2.Op != OpPPC64FlagGT {
7082			break
7083		}
7084		v.reset(OpCopy)
7085		v.Type = y.Type
7086		v.AddArg(y)
7087		return true
7088	}
7089	// match: (ISEL [1] _ y (FlagEQ))
7090	// result: y
7091	for {
7092		if v.AuxInt != 1 {
7093			break
7094		}
7095		_ = v.Args[2]
7096		y := v.Args[1]
7097		v_2 := v.Args[2]
7098		if v_2.Op != OpPPC64FlagEQ {
7099			break
7100		}
7101		v.reset(OpCopy)
7102		v.Type = y.Type
7103		v.AddArg(y)
7104		return true
7105	}
7106	// match: (ISEL [1] _ y (FlagLT))
7107	// result: y
7108	for {
7109		if v.AuxInt != 1 {
7110			break
7111		}
7112		_ = v.Args[2]
7113		y := v.Args[1]
7114		v_2 := v.Args[2]
7115		if v_2.Op != OpPPC64FlagLT {
7116			break
7117		}
7118		v.reset(OpCopy)
7119		v.Type = y.Type
7120		v.AddArg(y)
7121		return true
7122	}
7123	// match: (ISEL [1] x _ (FlagGT))
7124	// result: x
7125	for {
7126		if v.AuxInt != 1 {
7127			break
7128		}
7129		_ = v.Args[2]
7130		x := v.Args[0]
7131		v_2 := v.Args[2]
7132		if v_2.Op != OpPPC64FlagGT {
7133			break
7134		}
7135		v.reset(OpCopy)
7136		v.Type = x.Type
7137		v.AddArg(x)
7138		return true
7139	}
7140	// match: (ISEL [4] x _ (FlagEQ))
7141	// result: x
7142	for {
7143		if v.AuxInt != 4 {
7144			break
7145		}
7146		_ = v.Args[2]
7147		x := v.Args[0]
7148		v_2 := v.Args[2]
7149		if v_2.Op != OpPPC64FlagEQ {
7150			break
7151		}
7152		v.reset(OpCopy)
7153		v.Type = x.Type
7154		v.AddArg(x)
7155		return true
7156	}
7157	// match: (ISEL [4] x _ (FlagGT))
7158	// result: x
7159	for {
7160		if v.AuxInt != 4 {
7161			break
7162		}
7163		_ = v.Args[2]
7164		x := v.Args[0]
7165		v_2 := v.Args[2]
7166		if v_2.Op != OpPPC64FlagGT {
7167			break
7168		}
7169		v.reset(OpCopy)
7170		v.Type = x.Type
7171		v.AddArg(x)
7172		return true
7173	}
7174	// match: (ISEL [4] _ y (FlagLT))
7175	// result: y
7176	for {
7177		if v.AuxInt != 4 {
7178			break
7179		}
7180		_ = v.Args[2]
7181		y := v.Args[1]
7182		v_2 := v.Args[2]
7183		if v_2.Op != OpPPC64FlagLT {
7184			break
7185		}
7186		v.reset(OpCopy)
7187		v.Type = y.Type
7188		v.AddArg(y)
7189		return true
7190	}
7191	// match: (ISEL [n] x y (InvertFlags bool))
7192	// cond: n%4 == 0
7193	// result: (ISEL [n+1] x y bool)
7194	for {
7195		n := v.AuxInt
7196		_ = v.Args[2]
7197		x := v.Args[0]
7198		y := v.Args[1]
7199		v_2 := v.Args[2]
7200		if v_2.Op != OpPPC64InvertFlags {
7201			break
7202		}
7203		bool := v_2.Args[0]
7204		if !(n%4 == 0) {
7205			break
7206		}
7207		v.reset(OpPPC64ISEL)
7208		v.AuxInt = n + 1
7209		v.AddArg(x)
7210		v.AddArg(y)
7211		v.AddArg(bool)
7212		return true
7213	}
7214	// match: (ISEL [n] x y (InvertFlags bool))
7215	// cond: n%4 == 1
7216	// result: (ISEL [n-1] x y bool)
7217	for {
7218		n := v.AuxInt
7219		_ = v.Args[2]
7220		x := v.Args[0]
7221		y := v.Args[1]
7222		v_2 := v.Args[2]
7223		if v_2.Op != OpPPC64InvertFlags {
7224			break
7225		}
7226		bool := v_2.Args[0]
7227		if !(n%4 == 1) {
7228			break
7229		}
7230		v.reset(OpPPC64ISEL)
7231		v.AuxInt = n - 1
7232		v.AddArg(x)
7233		v.AddArg(y)
7234		v.AddArg(bool)
7235		return true
7236	}
7237	return false
7238}
7239func rewriteValuePPC64_OpPPC64ISEL_20(v *Value) bool {
7240	// match: (ISEL [n] x y (InvertFlags bool))
7241	// cond: n%4 == 2
7242	// result: (ISEL [n] x y bool)
7243	for {
7244		n := v.AuxInt
7245		_ = v.Args[2]
7246		x := v.Args[0]
7247		y := v.Args[1]
7248		v_2 := v.Args[2]
7249		if v_2.Op != OpPPC64InvertFlags {
7250			break
7251		}
7252		bool := v_2.Args[0]
7253		if !(n%4 == 2) {
7254			break
7255		}
7256		v.reset(OpPPC64ISEL)
7257		v.AuxInt = n
7258		v.AddArg(x)
7259		v.AddArg(y)
7260		v.AddArg(bool)
7261		return true
7262	}
7263	return false
7264}
7265func rewriteValuePPC64_OpPPC64ISELB_0(v *Value) bool {
7266	// match: (ISELB [0] _ (FlagLT))
7267	// result: (MOVDconst [1])
7268	for {
7269		if v.AuxInt != 0 {
7270			break
7271		}
7272		_ = v.Args[1]
7273		v_1 := v.Args[1]
7274		if v_1.Op != OpPPC64FlagLT {
7275			break
7276		}
7277		v.reset(OpPPC64MOVDconst)
7278		v.AuxInt = 1
7279		return true
7280	}
7281	// match: (ISELB [0] _ (FlagGT))
7282	// result: (MOVDconst [0])
7283	for {
7284		if v.AuxInt != 0 {
7285			break
7286		}
7287		_ = v.Args[1]
7288		v_1 := v.Args[1]
7289		if v_1.Op != OpPPC64FlagGT {
7290			break
7291		}
7292		v.reset(OpPPC64MOVDconst)
7293		v.AuxInt = 0
7294		return true
7295	}
7296	// match: (ISELB [0] _ (FlagEQ))
7297	// result: (MOVDconst [0])
7298	for {
7299		if v.AuxInt != 0 {
7300			break
7301		}
7302		_ = v.Args[1]
7303		v_1 := v.Args[1]
7304		if v_1.Op != OpPPC64FlagEQ {
7305			break
7306		}
7307		v.reset(OpPPC64MOVDconst)
7308		v.AuxInt = 0
7309		return true
7310	}
7311	// match: (ISELB [1] _ (FlagGT))
7312	// result: (MOVDconst [1])
7313	for {
7314		if v.AuxInt != 1 {
7315			break
7316		}
7317		_ = v.Args[1]
7318		v_1 := v.Args[1]
7319		if v_1.Op != OpPPC64FlagGT {
7320			break
7321		}
7322		v.reset(OpPPC64MOVDconst)
7323		v.AuxInt = 1
7324		return true
7325	}
7326	// match: (ISELB [1] _ (FlagLT))
7327	// result: (MOVDconst [0])
7328	for {
7329		if v.AuxInt != 1 {
7330			break
7331		}
7332		_ = v.Args[1]
7333		v_1 := v.Args[1]
7334		if v_1.Op != OpPPC64FlagLT {
7335			break
7336		}
7337		v.reset(OpPPC64MOVDconst)
7338		v.AuxInt = 0
7339		return true
7340	}
7341	// match: (ISELB [1] _ (FlagEQ))
7342	// result: (MOVDconst [0])
7343	for {
7344		if v.AuxInt != 1 {
7345			break
7346		}
7347		_ = v.Args[1]
7348		v_1 := v.Args[1]
7349		if v_1.Op != OpPPC64FlagEQ {
7350			break
7351		}
7352		v.reset(OpPPC64MOVDconst)
7353		v.AuxInt = 0
7354		return true
7355	}
7356	// match: (ISELB [2] _ (FlagEQ))
7357	// result: (MOVDconst [1])
7358	for {
7359		if v.AuxInt != 2 {
7360			break
7361		}
7362		_ = v.Args[1]
7363		v_1 := v.Args[1]
7364		if v_1.Op != OpPPC64FlagEQ {
7365			break
7366		}
7367		v.reset(OpPPC64MOVDconst)
7368		v.AuxInt = 1
7369		return true
7370	}
7371	// match: (ISELB [2] _ (FlagLT))
7372	// result: (MOVDconst [0])
7373	for {
7374		if v.AuxInt != 2 {
7375			break
7376		}
7377		_ = v.Args[1]
7378		v_1 := v.Args[1]
7379		if v_1.Op != OpPPC64FlagLT {
7380			break
7381		}
7382		v.reset(OpPPC64MOVDconst)
7383		v.AuxInt = 0
7384		return true
7385	}
7386	// match: (ISELB [2] _ (FlagGT))
7387	// result: (MOVDconst [0])
7388	for {
7389		if v.AuxInt != 2 {
7390			break
7391		}
7392		_ = v.Args[1]
7393		v_1 := v.Args[1]
7394		if v_1.Op != OpPPC64FlagGT {
7395			break
7396		}
7397		v.reset(OpPPC64MOVDconst)
7398		v.AuxInt = 0
7399		return true
7400	}
7401	// match: (ISELB [4] _ (FlagLT))
7402	// result: (MOVDconst [0])
7403	for {
7404		if v.AuxInt != 4 {
7405			break
7406		}
7407		_ = v.Args[1]
7408		v_1 := v.Args[1]
7409		if v_1.Op != OpPPC64FlagLT {
7410			break
7411		}
7412		v.reset(OpPPC64MOVDconst)
7413		v.AuxInt = 0
7414		return true
7415	}
7416	return false
7417}
7418func rewriteValuePPC64_OpPPC64ISELB_10(v *Value) bool {
7419	b := v.Block
7420	typ := &b.Func.Config.Types
7421	// match: (ISELB [4] _ (FlagGT))
7422	// result: (MOVDconst [1])
7423	for {
7424		if v.AuxInt != 4 {
7425			break
7426		}
7427		_ = v.Args[1]
7428		v_1 := v.Args[1]
7429		if v_1.Op != OpPPC64FlagGT {
7430			break
7431		}
7432		v.reset(OpPPC64MOVDconst)
7433		v.AuxInt = 1
7434		return true
7435	}
7436	// match: (ISELB [4] _ (FlagEQ))
7437	// result: (MOVDconst [1])
7438	for {
7439		if v.AuxInt != 4 {
7440			break
7441		}
7442		_ = v.Args[1]
7443		v_1 := v.Args[1]
7444		if v_1.Op != OpPPC64FlagEQ {
7445			break
7446		}
7447		v.reset(OpPPC64MOVDconst)
7448		v.AuxInt = 1
7449		return true
7450	}
7451	// match: (ISELB [5] _ (FlagGT))
7452	// result: (MOVDconst [0])
7453	for {
7454		if v.AuxInt != 5 {
7455			break
7456		}
7457		_ = v.Args[1]
7458		v_1 := v.Args[1]
7459		if v_1.Op != OpPPC64FlagGT {
7460			break
7461		}
7462		v.reset(OpPPC64MOVDconst)
7463		v.AuxInt = 0
7464		return true
7465	}
7466	// match: (ISELB [5] _ (FlagLT))
7467	// result: (MOVDconst [1])
7468	for {
7469		if v.AuxInt != 5 {
7470			break
7471		}
7472		_ = v.Args[1]
7473		v_1 := v.Args[1]
7474		if v_1.Op != OpPPC64FlagLT {
7475			break
7476		}
7477		v.reset(OpPPC64MOVDconst)
7478		v.AuxInt = 1
7479		return true
7480	}
7481	// match: (ISELB [5] _ (FlagEQ))
7482	// result: (MOVDconst [1])
7483	for {
7484		if v.AuxInt != 5 {
7485			break
7486		}
7487		_ = v.Args[1]
7488		v_1 := v.Args[1]
7489		if v_1.Op != OpPPC64FlagEQ {
7490			break
7491		}
7492		v.reset(OpPPC64MOVDconst)
7493		v.AuxInt = 1
7494		return true
7495	}
7496	// match: (ISELB [6] _ (FlagEQ))
7497	// result: (MOVDconst [0])
7498	for {
7499		if v.AuxInt != 6 {
7500			break
7501		}
7502		_ = v.Args[1]
7503		v_1 := v.Args[1]
7504		if v_1.Op != OpPPC64FlagEQ {
7505			break
7506		}
7507		v.reset(OpPPC64MOVDconst)
7508		v.AuxInt = 0
7509		return true
7510	}
7511	// match: (ISELB [6] _ (FlagLT))
7512	// result: (MOVDconst [1])
7513	for {
7514		if v.AuxInt != 6 {
7515			break
7516		}
7517		_ = v.Args[1]
7518		v_1 := v.Args[1]
7519		if v_1.Op != OpPPC64FlagLT {
7520			break
7521		}
7522		v.reset(OpPPC64MOVDconst)
7523		v.AuxInt = 1
7524		return true
7525	}
7526	// match: (ISELB [6] _ (FlagGT))
7527	// result: (MOVDconst [1])
7528	for {
7529		if v.AuxInt != 6 {
7530			break
7531		}
7532		_ = v.Args[1]
7533		v_1 := v.Args[1]
7534		if v_1.Op != OpPPC64FlagGT {
7535			break
7536		}
7537		v.reset(OpPPC64MOVDconst)
7538		v.AuxInt = 1
7539		return true
7540	}
7541	// match: (ISELB [n] (MOVDconst [1]) (InvertFlags bool))
7542	// cond: n%4 == 0
7543	// result: (ISELB [n+1] (MOVDconst [1]) bool)
7544	for {
7545		n := v.AuxInt
7546		_ = v.Args[1]
7547		v_0 := v.Args[0]
7548		if v_0.Op != OpPPC64MOVDconst || v_0.AuxInt != 1 {
7549			break
7550		}
7551		v_1 := v.Args[1]
7552		if v_1.Op != OpPPC64InvertFlags {
7553			break
7554		}
7555		bool := v_1.Args[0]
7556		if !(n%4 == 0) {
7557			break
7558		}
7559		v.reset(OpPPC64ISELB)
7560		v.AuxInt = n + 1
7561		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
7562		v0.AuxInt = 1
7563		v.AddArg(v0)
7564		v.AddArg(bool)
7565		return true
7566	}
7567	// match: (ISELB [n] (MOVDconst [1]) (InvertFlags bool))
7568	// cond: n%4 == 1
7569	// result: (ISELB [n-1] (MOVDconst [1]) bool)
7570	for {
7571		n := v.AuxInt
7572		_ = v.Args[1]
7573		v_0 := v.Args[0]
7574		if v_0.Op != OpPPC64MOVDconst || v_0.AuxInt != 1 {
7575			break
7576		}
7577		v_1 := v.Args[1]
7578		if v_1.Op != OpPPC64InvertFlags {
7579			break
7580		}
7581		bool := v_1.Args[0]
7582		if !(n%4 == 1) {
7583			break
7584		}
7585		v.reset(OpPPC64ISELB)
7586		v.AuxInt = n - 1
7587		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
7588		v0.AuxInt = 1
7589		v.AddArg(v0)
7590		v.AddArg(bool)
7591		return true
7592	}
7593	return false
7594}
7595func rewriteValuePPC64_OpPPC64ISELB_20(v *Value) bool {
7596	b := v.Block
7597	typ := &b.Func.Config.Types
7598	// match: (ISELB [n] (MOVDconst [1]) (InvertFlags bool))
7599	// cond: n%4 == 2
7600	// result: (ISELB [n] (MOVDconst [1]) bool)
7601	for {
7602		n := v.AuxInt
7603		_ = v.Args[1]
7604		v_0 := v.Args[0]
7605		if v_0.Op != OpPPC64MOVDconst || v_0.AuxInt != 1 {
7606			break
7607		}
7608		v_1 := v.Args[1]
7609		if v_1.Op != OpPPC64InvertFlags {
7610			break
7611		}
7612		bool := v_1.Args[0]
7613		if !(n%4 == 2) {
7614			break
7615		}
7616		v.reset(OpPPC64ISELB)
7617		v.AuxInt = n
7618		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
7619		v0.AuxInt = 1
7620		v.AddArg(v0)
7621		v.AddArg(bool)
7622		return true
7623	}
7624	return false
7625}
7626func rewriteValuePPC64_OpPPC64LessEqual_0(v *Value) bool {
7627	b := v.Block
7628	typ := &b.Func.Config.Types
7629	// match: (LessEqual (FlagEQ))
7630	// result: (MOVDconst [1])
7631	for {
7632		v_0 := v.Args[0]
7633		if v_0.Op != OpPPC64FlagEQ {
7634			break
7635		}
7636		v.reset(OpPPC64MOVDconst)
7637		v.AuxInt = 1
7638		return true
7639	}
7640	// match: (LessEqual (FlagLT))
7641	// result: (MOVDconst [1])
7642	for {
7643		v_0 := v.Args[0]
7644		if v_0.Op != OpPPC64FlagLT {
7645			break
7646		}
7647		v.reset(OpPPC64MOVDconst)
7648		v.AuxInt = 1
7649		return true
7650	}
7651	// match: (LessEqual (FlagGT))
7652	// result: (MOVDconst [0])
7653	for {
7654		v_0 := v.Args[0]
7655		if v_0.Op != OpPPC64FlagGT {
7656			break
7657		}
7658		v.reset(OpPPC64MOVDconst)
7659		v.AuxInt = 0
7660		return true
7661	}
7662	// match: (LessEqual (InvertFlags x))
7663	// result: (GreaterEqual x)
7664	for {
7665		v_0 := v.Args[0]
7666		if v_0.Op != OpPPC64InvertFlags {
7667			break
7668		}
7669		x := v_0.Args[0]
7670		v.reset(OpPPC64GreaterEqual)
7671		v.AddArg(x)
7672		return true
7673	}
7674	// match: (LessEqual cmp)
7675	// result: (ISELB [5] (MOVDconst [1]) cmp)
7676	for {
7677		cmp := v.Args[0]
7678		v.reset(OpPPC64ISELB)
7679		v.AuxInt = 5
7680		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
7681		v0.AuxInt = 1
7682		v.AddArg(v0)
7683		v.AddArg(cmp)
7684		return true
7685	}
7686}
7687func rewriteValuePPC64_OpPPC64LessThan_0(v *Value) bool {
7688	b := v.Block
7689	typ := &b.Func.Config.Types
7690	// match: (LessThan (FlagEQ))
7691	// result: (MOVDconst [0])
7692	for {
7693		v_0 := v.Args[0]
7694		if v_0.Op != OpPPC64FlagEQ {
7695			break
7696		}
7697		v.reset(OpPPC64MOVDconst)
7698		v.AuxInt = 0
7699		return true
7700	}
7701	// match: (LessThan (FlagLT))
7702	// result: (MOVDconst [1])
7703	for {
7704		v_0 := v.Args[0]
7705		if v_0.Op != OpPPC64FlagLT {
7706			break
7707		}
7708		v.reset(OpPPC64MOVDconst)
7709		v.AuxInt = 1
7710		return true
7711	}
7712	// match: (LessThan (FlagGT))
7713	// result: (MOVDconst [0])
7714	for {
7715		v_0 := v.Args[0]
7716		if v_0.Op != OpPPC64FlagGT {
7717			break
7718		}
7719		v.reset(OpPPC64MOVDconst)
7720		v.AuxInt = 0
7721		return true
7722	}
7723	// match: (LessThan (InvertFlags x))
7724	// result: (GreaterThan x)
7725	for {
7726		v_0 := v.Args[0]
7727		if v_0.Op != OpPPC64InvertFlags {
7728			break
7729		}
7730		x := v_0.Args[0]
7731		v.reset(OpPPC64GreaterThan)
7732		v.AddArg(x)
7733		return true
7734	}
7735	// match: (LessThan cmp)
7736	// result: (ISELB [0] (MOVDconst [1]) cmp)
7737	for {
7738		cmp := v.Args[0]
7739		v.reset(OpPPC64ISELB)
7740		v.AuxInt = 0
7741		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
7742		v0.AuxInt = 1
7743		v.AddArg(v0)
7744		v.AddArg(cmp)
7745		return true
7746	}
7747}
7748func rewriteValuePPC64_OpPPC64MFVSRD_0(v *Value) bool {
7749	b := v.Block
7750	typ := &b.Func.Config.Types
7751	// match: (MFVSRD (FMOVDconst [c]))
7752	// result: (MOVDconst [c])
7753	for {
7754		v_0 := v.Args[0]
7755		if v_0.Op != OpPPC64FMOVDconst {
7756			break
7757		}
7758		c := v_0.AuxInt
7759		v.reset(OpPPC64MOVDconst)
7760		v.AuxInt = c
7761		return true
7762	}
7763	// match: (MFVSRD x:(FMOVDload [off] {sym} ptr mem))
7764	// cond: x.Uses == 1 && clobber(x)
7765	// result: @x.Block (MOVDload [off] {sym} ptr mem)
7766	for {
7767		x := v.Args[0]
7768		if x.Op != OpPPC64FMOVDload {
7769			break
7770		}
7771		off := x.AuxInt
7772		sym := x.Aux
7773		mem := x.Args[1]
7774		ptr := x.Args[0]
7775		if !(x.Uses == 1 && clobber(x)) {
7776			break
7777		}
7778		b = x.Block
7779		v0 := b.NewValue0(x.Pos, OpPPC64MOVDload, typ.Int64)
7780		v.reset(OpCopy)
7781		v.AddArg(v0)
7782		v0.AuxInt = off
7783		v0.Aux = sym
7784		v0.AddArg(ptr)
7785		v0.AddArg(mem)
7786		return true
7787	}
7788	return false
7789}
7790func rewriteValuePPC64_OpPPC64MOVBZload_0(v *Value) bool {
7791	// match: (MOVBZload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
7792	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
7793	// result: (MOVBZload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
7794	for {
7795		off1 := v.AuxInt
7796		sym1 := v.Aux
7797		mem := v.Args[1]
7798		p := v.Args[0]
7799		if p.Op != OpPPC64MOVDaddr {
7800			break
7801		}
7802		off2 := p.AuxInt
7803		sym2 := p.Aux
7804		ptr := p.Args[0]
7805		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
7806			break
7807		}
7808		v.reset(OpPPC64MOVBZload)
7809		v.AuxInt = off1 + off2
7810		v.Aux = mergeSym(sym1, sym2)
7811		v.AddArg(ptr)
7812		v.AddArg(mem)
7813		return true
7814	}
7815	// match: (MOVBZload [off1] {sym} (ADDconst [off2] x) mem)
7816	// cond: is16Bit(off1+off2)
7817	// result: (MOVBZload [off1+off2] {sym} x mem)
7818	for {
7819		off1 := v.AuxInt
7820		sym := v.Aux
7821		mem := v.Args[1]
7822		v_0 := v.Args[0]
7823		if v_0.Op != OpPPC64ADDconst {
7824			break
7825		}
7826		off2 := v_0.AuxInt
7827		x := v_0.Args[0]
7828		if !(is16Bit(off1 + off2)) {
7829			break
7830		}
7831		v.reset(OpPPC64MOVBZload)
7832		v.AuxInt = off1 + off2
7833		v.Aux = sym
7834		v.AddArg(x)
7835		v.AddArg(mem)
7836		return true
7837	}
7838	// match: (MOVBZload [0] {sym} p:(ADD ptr idx) mem)
7839	// cond: sym == nil && p.Uses == 1
7840	// result: (MOVBZloadidx ptr idx mem)
7841	for {
7842		if v.AuxInt != 0 {
7843			break
7844		}
7845		sym := v.Aux
7846		mem := v.Args[1]
7847		p := v.Args[0]
7848		if p.Op != OpPPC64ADD {
7849			break
7850		}
7851		idx := p.Args[1]
7852		ptr := p.Args[0]
7853		if !(sym == nil && p.Uses == 1) {
7854			break
7855		}
7856		v.reset(OpPPC64MOVBZloadidx)
7857		v.AddArg(ptr)
7858		v.AddArg(idx)
7859		v.AddArg(mem)
7860		return true
7861	}
7862	return false
7863}
7864func rewriteValuePPC64_OpPPC64MOVBZloadidx_0(v *Value) bool {
7865	// match: (MOVBZloadidx ptr (MOVDconst [c]) mem)
7866	// cond: is16Bit(c)
7867	// result: (MOVBZload [c] ptr mem)
7868	for {
7869		mem := v.Args[2]
7870		ptr := v.Args[0]
7871		v_1 := v.Args[1]
7872		if v_1.Op != OpPPC64MOVDconst {
7873			break
7874		}
7875		c := v_1.AuxInt
7876		if !(is16Bit(c)) {
7877			break
7878		}
7879		v.reset(OpPPC64MOVBZload)
7880		v.AuxInt = c
7881		v.AddArg(ptr)
7882		v.AddArg(mem)
7883		return true
7884	}
7885	// match: (MOVBZloadidx (MOVDconst [c]) ptr mem)
7886	// cond: is16Bit(c)
7887	// result: (MOVBZload [c] ptr mem)
7888	for {
7889		mem := v.Args[2]
7890		v_0 := v.Args[0]
7891		if v_0.Op != OpPPC64MOVDconst {
7892			break
7893		}
7894		c := v_0.AuxInt
7895		ptr := v.Args[1]
7896		if !(is16Bit(c)) {
7897			break
7898		}
7899		v.reset(OpPPC64MOVBZload)
7900		v.AuxInt = c
7901		v.AddArg(ptr)
7902		v.AddArg(mem)
7903		return true
7904	}
7905	return false
7906}
7907func rewriteValuePPC64_OpPPC64MOVBZreg_0(v *Value) bool {
7908	b := v.Block
7909	typ := &b.Func.Config.Types
7910	// match: (MOVBZreg y:(ANDconst [c] _))
7911	// cond: uint64(c) <= 0xFF
7912	// result: y
7913	for {
7914		y := v.Args[0]
7915		if y.Op != OpPPC64ANDconst {
7916			break
7917		}
7918		c := y.AuxInt
7919		if !(uint64(c) <= 0xFF) {
7920			break
7921		}
7922		v.reset(OpCopy)
7923		v.Type = y.Type
7924		v.AddArg(y)
7925		return true
7926	}
7927	// match: (MOVBZreg (SRWconst [c] (MOVBZreg x)))
7928	// result: (SRWconst [c] (MOVBZreg x))
7929	for {
7930		v_0 := v.Args[0]
7931		if v_0.Op != OpPPC64SRWconst {
7932			break
7933		}
7934		c := v_0.AuxInt
7935		v_0_0 := v_0.Args[0]
7936		if v_0_0.Op != OpPPC64MOVBZreg {
7937			break
7938		}
7939		x := v_0_0.Args[0]
7940		v.reset(OpPPC64SRWconst)
7941		v.AuxInt = c
7942		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
7943		v0.AddArg(x)
7944		v.AddArg(v0)
7945		return true
7946	}
7947	// match: (MOVBZreg (SRWconst [c] x))
7948	// cond: sizeof(x.Type) == 8
7949	// result: (SRWconst [c] x)
7950	for {
7951		v_0 := v.Args[0]
7952		if v_0.Op != OpPPC64SRWconst {
7953			break
7954		}
7955		c := v_0.AuxInt
7956		x := v_0.Args[0]
7957		if !(sizeof(x.Type) == 8) {
7958			break
7959		}
7960		v.reset(OpPPC64SRWconst)
7961		v.AuxInt = c
7962		v.AddArg(x)
7963		return true
7964	}
7965	// match: (MOVBZreg (SRDconst [c] x))
7966	// cond: c>=56
7967	// result: (SRDconst [c] x)
7968	for {
7969		v_0 := v.Args[0]
7970		if v_0.Op != OpPPC64SRDconst {
7971			break
7972		}
7973		c := v_0.AuxInt
7974		x := v_0.Args[0]
7975		if !(c >= 56) {
7976			break
7977		}
7978		v.reset(OpPPC64SRDconst)
7979		v.AuxInt = c
7980		v.AddArg(x)
7981		return true
7982	}
7983	// match: (MOVBZreg (SRWconst [c] x))
7984	// cond: c>=24
7985	// result: (SRWconst [c] x)
7986	for {
7987		v_0 := v.Args[0]
7988		if v_0.Op != OpPPC64SRWconst {
7989			break
7990		}
7991		c := v_0.AuxInt
7992		x := v_0.Args[0]
7993		if !(c >= 24) {
7994			break
7995		}
7996		v.reset(OpPPC64SRWconst)
7997		v.AuxInt = c
7998		v.AddArg(x)
7999		return true
8000	}
8001	// match: (MOVBZreg y:(MOVBZreg _))
8002	// result: y
8003	for {
8004		y := v.Args[0]
8005		if y.Op != OpPPC64MOVBZreg {
8006			break
8007		}
8008		v.reset(OpCopy)
8009		v.Type = y.Type
8010		v.AddArg(y)
8011		return true
8012	}
8013	// match: (MOVBZreg (MOVBreg x))
8014	// result: (MOVBZreg x)
8015	for {
8016		v_0 := v.Args[0]
8017		if v_0.Op != OpPPC64MOVBreg {
8018			break
8019		}
8020		x := v_0.Args[0]
8021		v.reset(OpPPC64MOVBZreg)
8022		v.AddArg(x)
8023		return true
8024	}
8025	// match: (MOVBZreg x:(MOVBZload _ _))
8026	// result: x
8027	for {
8028		x := v.Args[0]
8029		if x.Op != OpPPC64MOVBZload {
8030			break
8031		}
8032		_ = x.Args[1]
8033		v.reset(OpCopy)
8034		v.Type = x.Type
8035		v.AddArg(x)
8036		return true
8037	}
8038	// match: (MOVBZreg x:(MOVBZloadidx _ _ _))
8039	// result: x
8040	for {
8041		x := v.Args[0]
8042		if x.Op != OpPPC64MOVBZloadidx {
8043			break
8044		}
8045		_ = x.Args[2]
8046		v.reset(OpCopy)
8047		v.Type = x.Type
8048		v.AddArg(x)
8049		return true
8050	}
8051	// match: (MOVBZreg x:(Arg <t>))
8052	// cond: is8BitInt(t) && !isSigned(t)
8053	// result: x
8054	for {
8055		x := v.Args[0]
8056		if x.Op != OpArg {
8057			break
8058		}
8059		t := x.Type
8060		if !(is8BitInt(t) && !isSigned(t)) {
8061			break
8062		}
8063		v.reset(OpCopy)
8064		v.Type = x.Type
8065		v.AddArg(x)
8066		return true
8067	}
8068	return false
8069}
8070func rewriteValuePPC64_OpPPC64MOVBZreg_10(v *Value) bool {
8071	// match: (MOVBZreg (MOVDconst [c]))
8072	// result: (MOVDconst [int64(uint8(c))])
8073	for {
8074		v_0 := v.Args[0]
8075		if v_0.Op != OpPPC64MOVDconst {
8076			break
8077		}
8078		c := v_0.AuxInt
8079		v.reset(OpPPC64MOVDconst)
8080		v.AuxInt = int64(uint8(c))
8081		return true
8082	}
8083	return false
8084}
8085func rewriteValuePPC64_OpPPC64MOVBreg_0(v *Value) bool {
8086	b := v.Block
8087	typ := &b.Func.Config.Types
8088	// match: (MOVBreg y:(ANDconst [c] _))
8089	// cond: uint64(c) <= 0x7F
8090	// result: y
8091	for {
8092		y := v.Args[0]
8093		if y.Op != OpPPC64ANDconst {
8094			break
8095		}
8096		c := y.AuxInt
8097		if !(uint64(c) <= 0x7F) {
8098			break
8099		}
8100		v.reset(OpCopy)
8101		v.Type = y.Type
8102		v.AddArg(y)
8103		return true
8104	}
8105	// match: (MOVBreg (SRAWconst [c] (MOVBreg x)))
8106	// result: (SRAWconst [c] (MOVBreg x))
8107	for {
8108		v_0 := v.Args[0]
8109		if v_0.Op != OpPPC64SRAWconst {
8110			break
8111		}
8112		c := v_0.AuxInt
8113		v_0_0 := v_0.Args[0]
8114		if v_0_0.Op != OpPPC64MOVBreg {
8115			break
8116		}
8117		x := v_0_0.Args[0]
8118		v.reset(OpPPC64SRAWconst)
8119		v.AuxInt = c
8120		v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
8121		v0.AddArg(x)
8122		v.AddArg(v0)
8123		return true
8124	}
8125	// match: (MOVBreg (SRAWconst [c] x))
8126	// cond: sizeof(x.Type) == 8
8127	// result: (SRAWconst [c] x)
8128	for {
8129		v_0 := v.Args[0]
8130		if v_0.Op != OpPPC64SRAWconst {
8131			break
8132		}
8133		c := v_0.AuxInt
8134		x := v_0.Args[0]
8135		if !(sizeof(x.Type) == 8) {
8136			break
8137		}
8138		v.reset(OpPPC64SRAWconst)
8139		v.AuxInt = c
8140		v.AddArg(x)
8141		return true
8142	}
8143	// match: (MOVBreg (SRDconst [c] x))
8144	// cond: c>56
8145	// result: (SRDconst [c] x)
8146	for {
8147		v_0 := v.Args[0]
8148		if v_0.Op != OpPPC64SRDconst {
8149			break
8150		}
8151		c := v_0.AuxInt
8152		x := v_0.Args[0]
8153		if !(c > 56) {
8154			break
8155		}
8156		v.reset(OpPPC64SRDconst)
8157		v.AuxInt = c
8158		v.AddArg(x)
8159		return true
8160	}
8161	// match: (MOVBreg (SRDconst [c] x))
8162	// cond: c==56
8163	// result: (SRADconst [c] x)
8164	for {
8165		v_0 := v.Args[0]
8166		if v_0.Op != OpPPC64SRDconst {
8167			break
8168		}
8169		c := v_0.AuxInt
8170		x := v_0.Args[0]
8171		if !(c == 56) {
8172			break
8173		}
8174		v.reset(OpPPC64SRADconst)
8175		v.AuxInt = c
8176		v.AddArg(x)
8177		return true
8178	}
8179	// match: (MOVBreg (SRWconst [c] x))
8180	// cond: c>24
8181	// result: (SRWconst [c] x)
8182	for {
8183		v_0 := v.Args[0]
8184		if v_0.Op != OpPPC64SRWconst {
8185			break
8186		}
8187		c := v_0.AuxInt
8188		x := v_0.Args[0]
8189		if !(c > 24) {
8190			break
8191		}
8192		v.reset(OpPPC64SRWconst)
8193		v.AuxInt = c
8194		v.AddArg(x)
8195		return true
8196	}
8197	// match: (MOVBreg (SRWconst [c] x))
8198	// cond: c==24
8199	// result: (SRAWconst [c] x)
8200	for {
8201		v_0 := v.Args[0]
8202		if v_0.Op != OpPPC64SRWconst {
8203			break
8204		}
8205		c := v_0.AuxInt
8206		x := v_0.Args[0]
8207		if !(c == 24) {
8208			break
8209		}
8210		v.reset(OpPPC64SRAWconst)
8211		v.AuxInt = c
8212		v.AddArg(x)
8213		return true
8214	}
8215	// match: (MOVBreg y:(MOVBreg _))
8216	// result: y
8217	for {
8218		y := v.Args[0]
8219		if y.Op != OpPPC64MOVBreg {
8220			break
8221		}
8222		v.reset(OpCopy)
8223		v.Type = y.Type
8224		v.AddArg(y)
8225		return true
8226	}
8227	// match: (MOVBreg (MOVBZreg x))
8228	// result: (MOVBreg x)
8229	for {
8230		v_0 := v.Args[0]
8231		if v_0.Op != OpPPC64MOVBZreg {
8232			break
8233		}
8234		x := v_0.Args[0]
8235		v.reset(OpPPC64MOVBreg)
8236		v.AddArg(x)
8237		return true
8238	}
8239	// match: (MOVBreg x:(Arg <t>))
8240	// cond: is8BitInt(t) && isSigned(t)
8241	// result: x
8242	for {
8243		x := v.Args[0]
8244		if x.Op != OpArg {
8245			break
8246		}
8247		t := x.Type
8248		if !(is8BitInt(t) && isSigned(t)) {
8249			break
8250		}
8251		v.reset(OpCopy)
8252		v.Type = x.Type
8253		v.AddArg(x)
8254		return true
8255	}
8256	return false
8257}
8258func rewriteValuePPC64_OpPPC64MOVBreg_10(v *Value) bool {
8259	// match: (MOVBreg (MOVDconst [c]))
8260	// result: (MOVDconst [int64(int8(c))])
8261	for {
8262		v_0 := v.Args[0]
8263		if v_0.Op != OpPPC64MOVDconst {
8264			break
8265		}
8266		c := v_0.AuxInt
8267		v.reset(OpPPC64MOVDconst)
8268		v.AuxInt = int64(int8(c))
8269		return true
8270	}
8271	return false
8272}
8273func rewriteValuePPC64_OpPPC64MOVBstore_0(v *Value) bool {
8274	// match: (MOVBstore [off1] {sym} (ADDconst [off2] x) val mem)
8275	// cond: is16Bit(off1+off2)
8276	// result: (MOVBstore [off1+off2] {sym} x val mem)
8277	for {
8278		off1 := v.AuxInt
8279		sym := v.Aux
8280		mem := v.Args[2]
8281		v_0 := v.Args[0]
8282		if v_0.Op != OpPPC64ADDconst {
8283			break
8284		}
8285		off2 := v_0.AuxInt
8286		x := v_0.Args[0]
8287		val := v.Args[1]
8288		if !(is16Bit(off1 + off2)) {
8289			break
8290		}
8291		v.reset(OpPPC64MOVBstore)
8292		v.AuxInt = off1 + off2
8293		v.Aux = sym
8294		v.AddArg(x)
8295		v.AddArg(val)
8296		v.AddArg(mem)
8297		return true
8298	}
8299	// match: (MOVBstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
8300	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
8301	// result: (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
8302	for {
8303		off1 := v.AuxInt
8304		sym1 := v.Aux
8305		mem := v.Args[2]
8306		p := v.Args[0]
8307		if p.Op != OpPPC64MOVDaddr {
8308			break
8309		}
8310		off2 := p.AuxInt
8311		sym2 := p.Aux
8312		ptr := p.Args[0]
8313		val := v.Args[1]
8314		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
8315			break
8316		}
8317		v.reset(OpPPC64MOVBstore)
8318		v.AuxInt = off1 + off2
8319		v.Aux = mergeSym(sym1, sym2)
8320		v.AddArg(ptr)
8321		v.AddArg(val)
8322		v.AddArg(mem)
8323		return true
8324	}
8325	// match: (MOVBstore [off] {sym} ptr (MOVDconst [0]) mem)
8326	// result: (MOVBstorezero [off] {sym} ptr mem)
8327	for {
8328		off := v.AuxInt
8329		sym := v.Aux
8330		mem := v.Args[2]
8331		ptr := v.Args[0]
8332		v_1 := v.Args[1]
8333		if v_1.Op != OpPPC64MOVDconst || v_1.AuxInt != 0 {
8334			break
8335		}
8336		v.reset(OpPPC64MOVBstorezero)
8337		v.AuxInt = off
8338		v.Aux = sym
8339		v.AddArg(ptr)
8340		v.AddArg(mem)
8341		return true
8342	}
8343	// match: (MOVBstore [off] {sym} p:(ADD ptr idx) val mem)
8344	// cond: off == 0 && sym == nil && p.Uses == 1
8345	// result: (MOVBstoreidx ptr idx val mem)
8346	for {
8347		off := v.AuxInt
8348		sym := v.Aux
8349		mem := v.Args[2]
8350		p := v.Args[0]
8351		if p.Op != OpPPC64ADD {
8352			break
8353		}
8354		idx := p.Args[1]
8355		ptr := p.Args[0]
8356		val := v.Args[1]
8357		if !(off == 0 && sym == nil && p.Uses == 1) {
8358			break
8359		}
8360		v.reset(OpPPC64MOVBstoreidx)
8361		v.AddArg(ptr)
8362		v.AddArg(idx)
8363		v.AddArg(val)
8364		v.AddArg(mem)
8365		return true
8366	}
8367	// match: (MOVBstore [off] {sym} ptr (MOVBreg x) mem)
8368	// result: (MOVBstore [off] {sym} ptr x mem)
8369	for {
8370		off := v.AuxInt
8371		sym := v.Aux
8372		mem := v.Args[2]
8373		ptr := v.Args[0]
8374		v_1 := v.Args[1]
8375		if v_1.Op != OpPPC64MOVBreg {
8376			break
8377		}
8378		x := v_1.Args[0]
8379		v.reset(OpPPC64MOVBstore)
8380		v.AuxInt = off
8381		v.Aux = sym
8382		v.AddArg(ptr)
8383		v.AddArg(x)
8384		v.AddArg(mem)
8385		return true
8386	}
8387	// match: (MOVBstore [off] {sym} ptr (MOVBZreg x) mem)
8388	// result: (MOVBstore [off] {sym} ptr x mem)
8389	for {
8390		off := v.AuxInt
8391		sym := v.Aux
8392		mem := v.Args[2]
8393		ptr := v.Args[0]
8394		v_1 := v.Args[1]
8395		if v_1.Op != OpPPC64MOVBZreg {
8396			break
8397		}
8398		x := v_1.Args[0]
8399		v.reset(OpPPC64MOVBstore)
8400		v.AuxInt = off
8401		v.Aux = sym
8402		v.AddArg(ptr)
8403		v.AddArg(x)
8404		v.AddArg(mem)
8405		return true
8406	}
8407	// match: (MOVBstore [off] {sym} ptr (MOVHreg x) mem)
8408	// result: (MOVBstore [off] {sym} ptr x mem)
8409	for {
8410		off := v.AuxInt
8411		sym := v.Aux
8412		mem := v.Args[2]
8413		ptr := v.Args[0]
8414		v_1 := v.Args[1]
8415		if v_1.Op != OpPPC64MOVHreg {
8416			break
8417		}
8418		x := v_1.Args[0]
8419		v.reset(OpPPC64MOVBstore)
8420		v.AuxInt = off
8421		v.Aux = sym
8422		v.AddArg(ptr)
8423		v.AddArg(x)
8424		v.AddArg(mem)
8425		return true
8426	}
8427	// match: (MOVBstore [off] {sym} ptr (MOVHZreg x) mem)
8428	// result: (MOVBstore [off] {sym} ptr x mem)
8429	for {
8430		off := v.AuxInt
8431		sym := v.Aux
8432		mem := v.Args[2]
8433		ptr := v.Args[0]
8434		v_1 := v.Args[1]
8435		if v_1.Op != OpPPC64MOVHZreg {
8436			break
8437		}
8438		x := v_1.Args[0]
8439		v.reset(OpPPC64MOVBstore)
8440		v.AuxInt = off
8441		v.Aux = sym
8442		v.AddArg(ptr)
8443		v.AddArg(x)
8444		v.AddArg(mem)
8445		return true
8446	}
8447	// match: (MOVBstore [off] {sym} ptr (MOVWreg x) mem)
8448	// result: (MOVBstore [off] {sym} ptr x mem)
8449	for {
8450		off := v.AuxInt
8451		sym := v.Aux
8452		mem := v.Args[2]
8453		ptr := v.Args[0]
8454		v_1 := v.Args[1]
8455		if v_1.Op != OpPPC64MOVWreg {
8456			break
8457		}
8458		x := v_1.Args[0]
8459		v.reset(OpPPC64MOVBstore)
8460		v.AuxInt = off
8461		v.Aux = sym
8462		v.AddArg(ptr)
8463		v.AddArg(x)
8464		v.AddArg(mem)
8465		return true
8466	}
8467	// match: (MOVBstore [off] {sym} ptr (MOVWZreg x) mem)
8468	// result: (MOVBstore [off] {sym} ptr x mem)
8469	for {
8470		off := v.AuxInt
8471		sym := v.Aux
8472		mem := v.Args[2]
8473		ptr := v.Args[0]
8474		v_1 := v.Args[1]
8475		if v_1.Op != OpPPC64MOVWZreg {
8476			break
8477		}
8478		x := v_1.Args[0]
8479		v.reset(OpPPC64MOVBstore)
8480		v.AuxInt = off
8481		v.Aux = sym
8482		v.AddArg(ptr)
8483		v.AddArg(x)
8484		v.AddArg(mem)
8485		return true
8486	}
8487	return false
8488}
8489func rewriteValuePPC64_OpPPC64MOVBstore_10(v *Value) bool {
8490	b := v.Block
8491	config := b.Func.Config
8492	typ := &b.Func.Config.Types
8493	// match: (MOVBstore [off] {sym} ptr (SRWconst (MOVHreg x) [c]) mem)
8494	// cond: c <= 8
8495	// result: (MOVBstore [off] {sym} ptr (SRWconst <typ.UInt32> x [c]) mem)
8496	for {
8497		off := v.AuxInt
8498		sym := v.Aux
8499		mem := v.Args[2]
8500		ptr := v.Args[0]
8501		v_1 := v.Args[1]
8502		if v_1.Op != OpPPC64SRWconst {
8503			break
8504		}
8505		c := v_1.AuxInt
8506		v_1_0 := v_1.Args[0]
8507		if v_1_0.Op != OpPPC64MOVHreg {
8508			break
8509		}
8510		x := v_1_0.Args[0]
8511		if !(c <= 8) {
8512			break
8513		}
8514		v.reset(OpPPC64MOVBstore)
8515		v.AuxInt = off
8516		v.Aux = sym
8517		v.AddArg(ptr)
8518		v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
8519		v0.AuxInt = c
8520		v0.AddArg(x)
8521		v.AddArg(v0)
8522		v.AddArg(mem)
8523		return true
8524	}
8525	// match: (MOVBstore [off] {sym} ptr (SRWconst (MOVHZreg x) [c]) mem)
8526	// cond: c <= 8
8527	// result: (MOVBstore [off] {sym} ptr (SRWconst <typ.UInt32> x [c]) mem)
8528	for {
8529		off := v.AuxInt
8530		sym := v.Aux
8531		mem := v.Args[2]
8532		ptr := v.Args[0]
8533		v_1 := v.Args[1]
8534		if v_1.Op != OpPPC64SRWconst {
8535			break
8536		}
8537		c := v_1.AuxInt
8538		v_1_0 := v_1.Args[0]
8539		if v_1_0.Op != OpPPC64MOVHZreg {
8540			break
8541		}
8542		x := v_1_0.Args[0]
8543		if !(c <= 8) {
8544			break
8545		}
8546		v.reset(OpPPC64MOVBstore)
8547		v.AuxInt = off
8548		v.Aux = sym
8549		v.AddArg(ptr)
8550		v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
8551		v0.AuxInt = c
8552		v0.AddArg(x)
8553		v.AddArg(v0)
8554		v.AddArg(mem)
8555		return true
8556	}
8557	// match: (MOVBstore [off] {sym} ptr (SRWconst (MOVWreg x) [c]) mem)
8558	// cond: c <= 24
8559	// result: (MOVBstore [off] {sym} ptr (SRWconst <typ.UInt32> x [c]) mem)
8560	for {
8561		off := v.AuxInt
8562		sym := v.Aux
8563		mem := v.Args[2]
8564		ptr := v.Args[0]
8565		v_1 := v.Args[1]
8566		if v_1.Op != OpPPC64SRWconst {
8567			break
8568		}
8569		c := v_1.AuxInt
8570		v_1_0 := v_1.Args[0]
8571		if v_1_0.Op != OpPPC64MOVWreg {
8572			break
8573		}
8574		x := v_1_0.Args[0]
8575		if !(c <= 24) {
8576			break
8577		}
8578		v.reset(OpPPC64MOVBstore)
8579		v.AuxInt = off
8580		v.Aux = sym
8581		v.AddArg(ptr)
8582		v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
8583		v0.AuxInt = c
8584		v0.AddArg(x)
8585		v.AddArg(v0)
8586		v.AddArg(mem)
8587		return true
8588	}
8589	// match: (MOVBstore [off] {sym} ptr (SRWconst (MOVWZreg x) [c]) mem)
8590	// cond: c <= 24
8591	// result: (MOVBstore [off] {sym} ptr (SRWconst <typ.UInt32> x [c]) mem)
8592	for {
8593		off := v.AuxInt
8594		sym := v.Aux
8595		mem := v.Args[2]
8596		ptr := v.Args[0]
8597		v_1 := v.Args[1]
8598		if v_1.Op != OpPPC64SRWconst {
8599			break
8600		}
8601		c := v_1.AuxInt
8602		v_1_0 := v_1.Args[0]
8603		if v_1_0.Op != OpPPC64MOVWZreg {
8604			break
8605		}
8606		x := v_1_0.Args[0]
8607		if !(c <= 24) {
8608			break
8609		}
8610		v.reset(OpPPC64MOVBstore)
8611		v.AuxInt = off
8612		v.Aux = sym
8613		v.AddArg(ptr)
8614		v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
8615		v0.AuxInt = c
8616		v0.AddArg(x)
8617		v.AddArg(v0)
8618		v.AddArg(mem)
8619		return true
8620	}
8621	// match: (MOVBstore [i1] {s} p (SRWconst w [24]) x0:(MOVBstore [i0] {s} p (SRWconst w [16]) mem))
8622	// cond: !config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)
8623	// result: (MOVHstore [i0] {s} p (SRWconst <typ.UInt16> w [16]) mem)
8624	for {
8625		i1 := v.AuxInt
8626		s := v.Aux
8627		_ = v.Args[2]
8628		p := v.Args[0]
8629		v_1 := v.Args[1]
8630		if v_1.Op != OpPPC64SRWconst || v_1.AuxInt != 24 {
8631			break
8632		}
8633		w := v_1.Args[0]
8634		x0 := v.Args[2]
8635		if x0.Op != OpPPC64MOVBstore {
8636			break
8637		}
8638		i0 := x0.AuxInt
8639		if x0.Aux != s {
8640			break
8641		}
8642		mem := x0.Args[2]
8643		if p != x0.Args[0] {
8644			break
8645		}
8646		x0_1 := x0.Args[1]
8647		if x0_1.Op != OpPPC64SRWconst || x0_1.AuxInt != 16 || w != x0_1.Args[0] || !(!config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)) {
8648			break
8649		}
8650		v.reset(OpPPC64MOVHstore)
8651		v.AuxInt = i0
8652		v.Aux = s
8653		v.AddArg(p)
8654		v0 := b.NewValue0(x0.Pos, OpPPC64SRWconst, typ.UInt16)
8655		v0.AuxInt = 16
8656		v0.AddArg(w)
8657		v.AddArg(v0)
8658		v.AddArg(mem)
8659		return true
8660	}
8661	// match: (MOVBstore [i1] {s} p (SRDconst w [24]) x0:(MOVBstore [i0] {s} p (SRDconst w [16]) mem))
8662	// cond: !config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)
8663	// result: (MOVHstore [i0] {s} p (SRWconst <typ.UInt16> w [16]) mem)
8664	for {
8665		i1 := v.AuxInt
8666		s := v.Aux
8667		_ = v.Args[2]
8668		p := v.Args[0]
8669		v_1 := v.Args[1]
8670		if v_1.Op != OpPPC64SRDconst || v_1.AuxInt != 24 {
8671			break
8672		}
8673		w := v_1.Args[0]
8674		x0 := v.Args[2]
8675		if x0.Op != OpPPC64MOVBstore {
8676			break
8677		}
8678		i0 := x0.AuxInt
8679		if x0.Aux != s {
8680			break
8681		}
8682		mem := x0.Args[2]
8683		if p != x0.Args[0] {
8684			break
8685		}
8686		x0_1 := x0.Args[1]
8687		if x0_1.Op != OpPPC64SRDconst || x0_1.AuxInt != 16 || w != x0_1.Args[0] || !(!config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)) {
8688			break
8689		}
8690		v.reset(OpPPC64MOVHstore)
8691		v.AuxInt = i0
8692		v.Aux = s
8693		v.AddArg(p)
8694		v0 := b.NewValue0(x0.Pos, OpPPC64SRWconst, typ.UInt16)
8695		v0.AuxInt = 16
8696		v0.AddArg(w)
8697		v.AddArg(v0)
8698		v.AddArg(mem)
8699		return true
8700	}
8701	// match: (MOVBstore [i1] {s} p (SRWconst w [8]) x0:(MOVBstore [i0] {s} p w mem))
8702	// cond: !config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)
8703	// result: (MOVHstore [i0] {s} p w mem)
8704	for {
8705		i1 := v.AuxInt
8706		s := v.Aux
8707		_ = v.Args[2]
8708		p := v.Args[0]
8709		v_1 := v.Args[1]
8710		if v_1.Op != OpPPC64SRWconst || v_1.AuxInt != 8 {
8711			break
8712		}
8713		w := v_1.Args[0]
8714		x0 := v.Args[2]
8715		if x0.Op != OpPPC64MOVBstore {
8716			break
8717		}
8718		i0 := x0.AuxInt
8719		if x0.Aux != s {
8720			break
8721		}
8722		mem := x0.Args[2]
8723		if p != x0.Args[0] || w != x0.Args[1] || !(!config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)) {
8724			break
8725		}
8726		v.reset(OpPPC64MOVHstore)
8727		v.AuxInt = i0
8728		v.Aux = s
8729		v.AddArg(p)
8730		v.AddArg(w)
8731		v.AddArg(mem)
8732		return true
8733	}
8734	// match: (MOVBstore [i1] {s} p (SRDconst w [8]) x0:(MOVBstore [i0] {s} p w mem))
8735	// cond: !config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)
8736	// result: (MOVHstore [i0] {s} p w mem)
8737	for {
8738		i1 := v.AuxInt
8739		s := v.Aux
8740		_ = v.Args[2]
8741		p := v.Args[0]
8742		v_1 := v.Args[1]
8743		if v_1.Op != OpPPC64SRDconst || v_1.AuxInt != 8 {
8744			break
8745		}
8746		w := v_1.Args[0]
8747		x0 := v.Args[2]
8748		if x0.Op != OpPPC64MOVBstore {
8749			break
8750		}
8751		i0 := x0.AuxInt
8752		if x0.Aux != s {
8753			break
8754		}
8755		mem := x0.Args[2]
8756		if p != x0.Args[0] || w != x0.Args[1] || !(!config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)) {
8757			break
8758		}
8759		v.reset(OpPPC64MOVHstore)
8760		v.AuxInt = i0
8761		v.Aux = s
8762		v.AddArg(p)
8763		v.AddArg(w)
8764		v.AddArg(mem)
8765		return true
8766	}
8767	// match: (MOVBstore [i3] {s} p w x0:(MOVBstore [i2] {s} p (SRWconst w [8]) x1:(MOVBstore [i1] {s} p (SRWconst w [16]) x2:(MOVBstore [i0] {s} p (SRWconst w [24]) mem))))
8768	// cond: !config.BigEndian && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && clobber(x0) && clobber(x1) && clobber(x2)
8769	// result: (MOVWBRstore (MOVDaddr <typ.Uintptr> [i0] {s} p) w mem)
8770	for {
8771		i3 := v.AuxInt
8772		s := v.Aux
8773		_ = v.Args[2]
8774		p := v.Args[0]
8775		w := v.Args[1]
8776		x0 := v.Args[2]
8777		if x0.Op != OpPPC64MOVBstore {
8778			break
8779		}
8780		i2 := x0.AuxInt
8781		if x0.Aux != s {
8782			break
8783		}
8784		_ = x0.Args[2]
8785		if p != x0.Args[0] {
8786			break
8787		}
8788		x0_1 := x0.Args[1]
8789		if x0_1.Op != OpPPC64SRWconst || x0_1.AuxInt != 8 || w != x0_1.Args[0] {
8790			break
8791		}
8792		x1 := x0.Args[2]
8793		if x1.Op != OpPPC64MOVBstore {
8794			break
8795		}
8796		i1 := x1.AuxInt
8797		if x1.Aux != s {
8798			break
8799		}
8800		_ = x1.Args[2]
8801		if p != x1.Args[0] {
8802			break
8803		}
8804		x1_1 := x1.Args[1]
8805		if x1_1.Op != OpPPC64SRWconst || x1_1.AuxInt != 16 || w != x1_1.Args[0] {
8806			break
8807		}
8808		x2 := x1.Args[2]
8809		if x2.Op != OpPPC64MOVBstore {
8810			break
8811		}
8812		i0 := x2.AuxInt
8813		if x2.Aux != s {
8814			break
8815		}
8816		mem := x2.Args[2]
8817		if p != x2.Args[0] {
8818			break
8819		}
8820		x2_1 := x2.Args[1]
8821		if x2_1.Op != OpPPC64SRWconst || x2_1.AuxInt != 24 || w != x2_1.Args[0] || !(!config.BigEndian && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && clobber(x0) && clobber(x1) && clobber(x2)) {
8822			break
8823		}
8824		v.reset(OpPPC64MOVWBRstore)
8825		v0 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
8826		v0.AuxInt = i0
8827		v0.Aux = s
8828		v0.AddArg(p)
8829		v.AddArg(v0)
8830		v.AddArg(w)
8831		v.AddArg(mem)
8832		return true
8833	}
8834	// match: (MOVBstore [i1] {s} p w x0:(MOVBstore [i0] {s} p (SRWconst w [8]) mem))
8835	// cond: !config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)
8836	// result: (MOVHBRstore (MOVDaddr <typ.Uintptr> [i0] {s} p) w mem)
8837	for {
8838		i1 := v.AuxInt
8839		s := v.Aux
8840		_ = v.Args[2]
8841		p := v.Args[0]
8842		w := v.Args[1]
8843		x0 := v.Args[2]
8844		if x0.Op != OpPPC64MOVBstore {
8845			break
8846		}
8847		i0 := x0.AuxInt
8848		if x0.Aux != s {
8849			break
8850		}
8851		mem := x0.Args[2]
8852		if p != x0.Args[0] {
8853			break
8854		}
8855		x0_1 := x0.Args[1]
8856		if x0_1.Op != OpPPC64SRWconst || x0_1.AuxInt != 8 || w != x0_1.Args[0] || !(!config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)) {
8857			break
8858		}
8859		v.reset(OpPPC64MOVHBRstore)
8860		v0 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
8861		v0.AuxInt = i0
8862		v0.Aux = s
8863		v0.AddArg(p)
8864		v.AddArg(v0)
8865		v.AddArg(w)
8866		v.AddArg(mem)
8867		return true
8868	}
8869	return false
8870}
8871func rewriteValuePPC64_OpPPC64MOVBstore_20(v *Value) bool {
8872	b := v.Block
8873	config := b.Func.Config
8874	typ := &b.Func.Config.Types
8875	// match: (MOVBstore [i7] {s} p (SRDconst w [56]) x0:(MOVBstore [i6] {s} p (SRDconst w [48]) x1:(MOVBstore [i5] {s} p (SRDconst w [40]) x2:(MOVBstore [i4] {s} p (SRDconst w [32]) x3:(MOVWstore [i0] {s} p w mem)))))
8876	// cond: !config.BigEndian && i0%4 == 0 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3)
8877	// result: (MOVDstore [i0] {s} p w mem)
8878	for {
8879		i7 := v.AuxInt
8880		s := v.Aux
8881		_ = v.Args[2]
8882		p := v.Args[0]
8883		v_1 := v.Args[1]
8884		if v_1.Op != OpPPC64SRDconst || v_1.AuxInt != 56 {
8885			break
8886		}
8887		w := v_1.Args[0]
8888		x0 := v.Args[2]
8889		if x0.Op != OpPPC64MOVBstore {
8890			break
8891		}
8892		i6 := x0.AuxInt
8893		if x0.Aux != s {
8894			break
8895		}
8896		_ = x0.Args[2]
8897		if p != x0.Args[0] {
8898			break
8899		}
8900		x0_1 := x0.Args[1]
8901		if x0_1.Op != OpPPC64SRDconst || x0_1.AuxInt != 48 || w != x0_1.Args[0] {
8902			break
8903		}
8904		x1 := x0.Args[2]
8905		if x1.Op != OpPPC64MOVBstore {
8906			break
8907		}
8908		i5 := x1.AuxInt
8909		if x1.Aux != s {
8910			break
8911		}
8912		_ = x1.Args[2]
8913		if p != x1.Args[0] {
8914			break
8915		}
8916		x1_1 := x1.Args[1]
8917		if x1_1.Op != OpPPC64SRDconst || x1_1.AuxInt != 40 || w != x1_1.Args[0] {
8918			break
8919		}
8920		x2 := x1.Args[2]
8921		if x2.Op != OpPPC64MOVBstore {
8922			break
8923		}
8924		i4 := x2.AuxInt
8925		if x2.Aux != s {
8926			break
8927		}
8928		_ = x2.Args[2]
8929		if p != x2.Args[0] {
8930			break
8931		}
8932		x2_1 := x2.Args[1]
8933		if x2_1.Op != OpPPC64SRDconst || x2_1.AuxInt != 32 || w != x2_1.Args[0] {
8934			break
8935		}
8936		x3 := x2.Args[2]
8937		if x3.Op != OpPPC64MOVWstore {
8938			break
8939		}
8940		i0 := x3.AuxInt
8941		if x3.Aux != s {
8942			break
8943		}
8944		mem := x3.Args[2]
8945		if p != x3.Args[0] || w != x3.Args[1] || !(!config.BigEndian && i0%4 == 0 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3)) {
8946			break
8947		}
8948		v.reset(OpPPC64MOVDstore)
8949		v.AuxInt = i0
8950		v.Aux = s
8951		v.AddArg(p)
8952		v.AddArg(w)
8953		v.AddArg(mem)
8954		return true
8955	}
8956	// match: (MOVBstore [i7] {s} p w x0:(MOVBstore [i6] {s} p (SRDconst w [8]) x1:(MOVBstore [i5] {s} p (SRDconst w [16]) x2:(MOVBstore [i4] {s} p (SRDconst w [24]) x3:(MOVBstore [i3] {s} p (SRDconst w [32]) x4:(MOVBstore [i2] {s} p (SRDconst w [40]) x5:(MOVBstore [i1] {s} p (SRDconst w [48]) x6:(MOVBstore [i0] {s} p (SRDconst w [56]) mem))))))))
8957	// cond: !config.BigEndian && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6)
8958	// result: (MOVDBRstore (MOVDaddr <typ.Uintptr> [i0] {s} p) w mem)
8959	for {
8960		i7 := v.AuxInt
8961		s := v.Aux
8962		_ = v.Args[2]
8963		p := v.Args[0]
8964		w := v.Args[1]
8965		x0 := v.Args[2]
8966		if x0.Op != OpPPC64MOVBstore {
8967			break
8968		}
8969		i6 := x0.AuxInt
8970		if x0.Aux != s {
8971			break
8972		}
8973		_ = x0.Args[2]
8974		if p != x0.Args[0] {
8975			break
8976		}
8977		x0_1 := x0.Args[1]
8978		if x0_1.Op != OpPPC64SRDconst || x0_1.AuxInt != 8 || w != x0_1.Args[0] {
8979			break
8980		}
8981		x1 := x0.Args[2]
8982		if x1.Op != OpPPC64MOVBstore {
8983			break
8984		}
8985		i5 := x1.AuxInt
8986		if x1.Aux != s {
8987			break
8988		}
8989		_ = x1.Args[2]
8990		if p != x1.Args[0] {
8991			break
8992		}
8993		x1_1 := x1.Args[1]
8994		if x1_1.Op != OpPPC64SRDconst || x1_1.AuxInt != 16 || w != x1_1.Args[0] {
8995			break
8996		}
8997		x2 := x1.Args[2]
8998		if x2.Op != OpPPC64MOVBstore {
8999			break
9000		}
9001		i4 := x2.AuxInt
9002		if x2.Aux != s {
9003			break
9004		}
9005		_ = x2.Args[2]
9006		if p != x2.Args[0] {
9007			break
9008		}
9009		x2_1 := x2.Args[1]
9010		if x2_1.Op != OpPPC64SRDconst || x2_1.AuxInt != 24 || w != x2_1.Args[0] {
9011			break
9012		}
9013		x3 := x2.Args[2]
9014		if x3.Op != OpPPC64MOVBstore {
9015			break
9016		}
9017		i3 := x3.AuxInt
9018		if x3.Aux != s {
9019			break
9020		}
9021		_ = x3.Args[2]
9022		if p != x3.Args[0] {
9023			break
9024		}
9025		x3_1 := x3.Args[1]
9026		if x3_1.Op != OpPPC64SRDconst || x3_1.AuxInt != 32 || w != x3_1.Args[0] {
9027			break
9028		}
9029		x4 := x3.Args[2]
9030		if x4.Op != OpPPC64MOVBstore {
9031			break
9032		}
9033		i2 := x4.AuxInt
9034		if x4.Aux != s {
9035			break
9036		}
9037		_ = x4.Args[2]
9038		if p != x4.Args[0] {
9039			break
9040		}
9041		x4_1 := x4.Args[1]
9042		if x4_1.Op != OpPPC64SRDconst || x4_1.AuxInt != 40 || w != x4_1.Args[0] {
9043			break
9044		}
9045		x5 := x4.Args[2]
9046		if x5.Op != OpPPC64MOVBstore {
9047			break
9048		}
9049		i1 := x5.AuxInt
9050		if x5.Aux != s {
9051			break
9052		}
9053		_ = x5.Args[2]
9054		if p != x5.Args[0] {
9055			break
9056		}
9057		x5_1 := x5.Args[1]
9058		if x5_1.Op != OpPPC64SRDconst || x5_1.AuxInt != 48 || w != x5_1.Args[0] {
9059			break
9060		}
9061		x6 := x5.Args[2]
9062		if x6.Op != OpPPC64MOVBstore {
9063			break
9064		}
9065		i0 := x6.AuxInt
9066		if x6.Aux != s {
9067			break
9068		}
9069		mem := x6.Args[2]
9070		if p != x6.Args[0] {
9071			break
9072		}
9073		x6_1 := x6.Args[1]
9074		if x6_1.Op != OpPPC64SRDconst || x6_1.AuxInt != 56 || w != x6_1.Args[0] || !(!config.BigEndian && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6)) {
9075			break
9076		}
9077		v.reset(OpPPC64MOVDBRstore)
9078		v0 := b.NewValue0(x6.Pos, OpPPC64MOVDaddr, typ.Uintptr)
9079		v0.AuxInt = i0
9080		v0.Aux = s
9081		v0.AddArg(p)
9082		v.AddArg(v0)
9083		v.AddArg(w)
9084		v.AddArg(mem)
9085		return true
9086	}
9087	return false
9088}
9089func rewriteValuePPC64_OpPPC64MOVBstoreidx_0(v *Value) bool {
9090	b := v.Block
9091	typ := &b.Func.Config.Types
9092	// match: (MOVBstoreidx ptr (MOVDconst [c]) val mem)
9093	// cond: is16Bit(c)
9094	// result: (MOVBstore [c] ptr val mem)
9095	for {
9096		mem := v.Args[3]
9097		ptr := v.Args[0]
9098		v_1 := v.Args[1]
9099		if v_1.Op != OpPPC64MOVDconst {
9100			break
9101		}
9102		c := v_1.AuxInt
9103		val := v.Args[2]
9104		if !(is16Bit(c)) {
9105			break
9106		}
9107		v.reset(OpPPC64MOVBstore)
9108		v.AuxInt = c
9109		v.AddArg(ptr)
9110		v.AddArg(val)
9111		v.AddArg(mem)
9112		return true
9113	}
9114	// match: (MOVBstoreidx (MOVDconst [c]) ptr val mem)
9115	// cond: is16Bit(c)
9116	// result: (MOVBstore [c] ptr val mem)
9117	for {
9118		mem := v.Args[3]
9119		v_0 := v.Args[0]
9120		if v_0.Op != OpPPC64MOVDconst {
9121			break
9122		}
9123		c := v_0.AuxInt
9124		ptr := v.Args[1]
9125		val := v.Args[2]
9126		if !(is16Bit(c)) {
9127			break
9128		}
9129		v.reset(OpPPC64MOVBstore)
9130		v.AuxInt = c
9131		v.AddArg(ptr)
9132		v.AddArg(val)
9133		v.AddArg(mem)
9134		return true
9135	}
9136	// match: (MOVBstoreidx [off] {sym} ptr idx (MOVBreg x) mem)
9137	// result: (MOVBstoreidx [off] {sym} ptr idx x mem)
9138	for {
9139		off := v.AuxInt
9140		sym := v.Aux
9141		mem := v.Args[3]
9142		ptr := v.Args[0]
9143		idx := v.Args[1]
9144		v_2 := v.Args[2]
9145		if v_2.Op != OpPPC64MOVBreg {
9146			break
9147		}
9148		x := v_2.Args[0]
9149		v.reset(OpPPC64MOVBstoreidx)
9150		v.AuxInt = off
9151		v.Aux = sym
9152		v.AddArg(ptr)
9153		v.AddArg(idx)
9154		v.AddArg(x)
9155		v.AddArg(mem)
9156		return true
9157	}
9158	// match: (MOVBstoreidx [off] {sym} ptr idx (MOVBZreg x) mem)
9159	// result: (MOVBstoreidx [off] {sym} ptr idx x mem)
9160	for {
9161		off := v.AuxInt
9162		sym := v.Aux
9163		mem := v.Args[3]
9164		ptr := v.Args[0]
9165		idx := v.Args[1]
9166		v_2 := v.Args[2]
9167		if v_2.Op != OpPPC64MOVBZreg {
9168			break
9169		}
9170		x := v_2.Args[0]
9171		v.reset(OpPPC64MOVBstoreidx)
9172		v.AuxInt = off
9173		v.Aux = sym
9174		v.AddArg(ptr)
9175		v.AddArg(idx)
9176		v.AddArg(x)
9177		v.AddArg(mem)
9178		return true
9179	}
9180	// match: (MOVBstoreidx [off] {sym} ptr idx (MOVHreg x) mem)
9181	// result: (MOVBstoreidx [off] {sym} ptr idx x mem)
9182	for {
9183		off := v.AuxInt
9184		sym := v.Aux
9185		mem := v.Args[3]
9186		ptr := v.Args[0]
9187		idx := v.Args[1]
9188		v_2 := v.Args[2]
9189		if v_2.Op != OpPPC64MOVHreg {
9190			break
9191		}
9192		x := v_2.Args[0]
9193		v.reset(OpPPC64MOVBstoreidx)
9194		v.AuxInt = off
9195		v.Aux = sym
9196		v.AddArg(ptr)
9197		v.AddArg(idx)
9198		v.AddArg(x)
9199		v.AddArg(mem)
9200		return true
9201	}
9202	// match: (MOVBstoreidx [off] {sym} ptr idx (MOVHZreg x) mem)
9203	// result: (MOVBstoreidx [off] {sym} ptr idx x mem)
9204	for {
9205		off := v.AuxInt
9206		sym := v.Aux
9207		mem := v.Args[3]
9208		ptr := v.Args[0]
9209		idx := v.Args[1]
9210		v_2 := v.Args[2]
9211		if v_2.Op != OpPPC64MOVHZreg {
9212			break
9213		}
9214		x := v_2.Args[0]
9215		v.reset(OpPPC64MOVBstoreidx)
9216		v.AuxInt = off
9217		v.Aux = sym
9218		v.AddArg(ptr)
9219		v.AddArg(idx)
9220		v.AddArg(x)
9221		v.AddArg(mem)
9222		return true
9223	}
9224	// match: (MOVBstoreidx [off] {sym} ptr idx (MOVWreg x) mem)
9225	// result: (MOVBstoreidx [off] {sym} ptr idx x mem)
9226	for {
9227		off := v.AuxInt
9228		sym := v.Aux
9229		mem := v.Args[3]
9230		ptr := v.Args[0]
9231		idx := v.Args[1]
9232		v_2 := v.Args[2]
9233		if v_2.Op != OpPPC64MOVWreg {
9234			break
9235		}
9236		x := v_2.Args[0]
9237		v.reset(OpPPC64MOVBstoreidx)
9238		v.AuxInt = off
9239		v.Aux = sym
9240		v.AddArg(ptr)
9241		v.AddArg(idx)
9242		v.AddArg(x)
9243		v.AddArg(mem)
9244		return true
9245	}
9246	// match: (MOVBstoreidx [off] {sym} ptr idx (MOVWZreg x) mem)
9247	// result: (MOVBstoreidx [off] {sym} ptr idx x mem)
9248	for {
9249		off := v.AuxInt
9250		sym := v.Aux
9251		mem := v.Args[3]
9252		ptr := v.Args[0]
9253		idx := v.Args[1]
9254		v_2 := v.Args[2]
9255		if v_2.Op != OpPPC64MOVWZreg {
9256			break
9257		}
9258		x := v_2.Args[0]
9259		v.reset(OpPPC64MOVBstoreidx)
9260		v.AuxInt = off
9261		v.Aux = sym
9262		v.AddArg(ptr)
9263		v.AddArg(idx)
9264		v.AddArg(x)
9265		v.AddArg(mem)
9266		return true
9267	}
9268	// match: (MOVBstoreidx [off] {sym} ptr idx (SRWconst (MOVHreg x) [c]) mem)
9269	// cond: c <= 8
9270	// result: (MOVBstoreidx [off] {sym} ptr idx (SRWconst <typ.UInt32> x [c]) mem)
9271	for {
9272		off := v.AuxInt
9273		sym := v.Aux
9274		mem := v.Args[3]
9275		ptr := v.Args[0]
9276		idx := v.Args[1]
9277		v_2 := v.Args[2]
9278		if v_2.Op != OpPPC64SRWconst {
9279			break
9280		}
9281		c := v_2.AuxInt
9282		v_2_0 := v_2.Args[0]
9283		if v_2_0.Op != OpPPC64MOVHreg {
9284			break
9285		}
9286		x := v_2_0.Args[0]
9287		if !(c <= 8) {
9288			break
9289		}
9290		v.reset(OpPPC64MOVBstoreidx)
9291		v.AuxInt = off
9292		v.Aux = sym
9293		v.AddArg(ptr)
9294		v.AddArg(idx)
9295		v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
9296		v0.AuxInt = c
9297		v0.AddArg(x)
9298		v.AddArg(v0)
9299		v.AddArg(mem)
9300		return true
9301	}
9302	// match: (MOVBstoreidx [off] {sym} ptr idx (SRWconst (MOVHZreg x) [c]) mem)
9303	// cond: c <= 8
9304	// result: (MOVBstoreidx [off] {sym} ptr idx (SRWconst <typ.UInt32> x [c]) mem)
9305	for {
9306		off := v.AuxInt
9307		sym := v.Aux
9308		mem := v.Args[3]
9309		ptr := v.Args[0]
9310		idx := v.Args[1]
9311		v_2 := v.Args[2]
9312		if v_2.Op != OpPPC64SRWconst {
9313			break
9314		}
9315		c := v_2.AuxInt
9316		v_2_0 := v_2.Args[0]
9317		if v_2_0.Op != OpPPC64MOVHZreg {
9318			break
9319		}
9320		x := v_2_0.Args[0]
9321		if !(c <= 8) {
9322			break
9323		}
9324		v.reset(OpPPC64MOVBstoreidx)
9325		v.AuxInt = off
9326		v.Aux = sym
9327		v.AddArg(ptr)
9328		v.AddArg(idx)
9329		v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
9330		v0.AuxInt = c
9331		v0.AddArg(x)
9332		v.AddArg(v0)
9333		v.AddArg(mem)
9334		return true
9335	}
9336	return false
9337}
9338func rewriteValuePPC64_OpPPC64MOVBstoreidx_10(v *Value) bool {
9339	b := v.Block
9340	typ := &b.Func.Config.Types
9341	// match: (MOVBstoreidx [off] {sym} ptr idx (SRWconst (MOVWreg x) [c]) mem)
9342	// cond: c <= 24
9343	// result: (MOVBstoreidx [off] {sym} ptr idx (SRWconst <typ.UInt32> x [c]) mem)
9344	for {
9345		off := v.AuxInt
9346		sym := v.Aux
9347		mem := v.Args[3]
9348		ptr := v.Args[0]
9349		idx := v.Args[1]
9350		v_2 := v.Args[2]
9351		if v_2.Op != OpPPC64SRWconst {
9352			break
9353		}
9354		c := v_2.AuxInt
9355		v_2_0 := v_2.Args[0]
9356		if v_2_0.Op != OpPPC64MOVWreg {
9357			break
9358		}
9359		x := v_2_0.Args[0]
9360		if !(c <= 24) {
9361			break
9362		}
9363		v.reset(OpPPC64MOVBstoreidx)
9364		v.AuxInt = off
9365		v.Aux = sym
9366		v.AddArg(ptr)
9367		v.AddArg(idx)
9368		v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
9369		v0.AuxInt = c
9370		v0.AddArg(x)
9371		v.AddArg(v0)
9372		v.AddArg(mem)
9373		return true
9374	}
9375	// match: (MOVBstoreidx [off] {sym} ptr idx (SRWconst (MOVWZreg x) [c]) mem)
9376	// cond: c <= 24
9377	// result: (MOVBstoreidx [off] {sym} ptr idx (SRWconst <typ.UInt32> x [c]) mem)
9378	for {
9379		off := v.AuxInt
9380		sym := v.Aux
9381		mem := v.Args[3]
9382		ptr := v.Args[0]
9383		idx := v.Args[1]
9384		v_2 := v.Args[2]
9385		if v_2.Op != OpPPC64SRWconst {
9386			break
9387		}
9388		c := v_2.AuxInt
9389		v_2_0 := v_2.Args[0]
9390		if v_2_0.Op != OpPPC64MOVWZreg {
9391			break
9392		}
9393		x := v_2_0.Args[0]
9394		if !(c <= 24) {
9395			break
9396		}
9397		v.reset(OpPPC64MOVBstoreidx)
9398		v.AuxInt = off
9399		v.Aux = sym
9400		v.AddArg(ptr)
9401		v.AddArg(idx)
9402		v0 := b.NewValue0(v.Pos, OpPPC64SRWconst, typ.UInt32)
9403		v0.AuxInt = c
9404		v0.AddArg(x)
9405		v.AddArg(v0)
9406		v.AddArg(mem)
9407		return true
9408	}
9409	return false
9410}
9411func rewriteValuePPC64_OpPPC64MOVBstorezero_0(v *Value) bool {
9412	// match: (MOVBstorezero [off1] {sym} (ADDconst [off2] x) mem)
9413	// cond: is16Bit(off1+off2)
9414	// result: (MOVBstorezero [off1+off2] {sym} x mem)
9415	for {
9416		off1 := v.AuxInt
9417		sym := v.Aux
9418		mem := v.Args[1]
9419		v_0 := v.Args[0]
9420		if v_0.Op != OpPPC64ADDconst {
9421			break
9422		}
9423		off2 := v_0.AuxInt
9424		x := v_0.Args[0]
9425		if !(is16Bit(off1 + off2)) {
9426			break
9427		}
9428		v.reset(OpPPC64MOVBstorezero)
9429		v.AuxInt = off1 + off2
9430		v.Aux = sym
9431		v.AddArg(x)
9432		v.AddArg(mem)
9433		return true
9434	}
9435	// match: (MOVBstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem)
9436	// cond: canMergeSym(sym1,sym2) && (x.Op != OpSB || p.Uses == 1)
9437	// result: (MOVBstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
9438	for {
9439		off1 := v.AuxInt
9440		sym1 := v.Aux
9441		mem := v.Args[1]
9442		p := v.Args[0]
9443		if p.Op != OpPPC64MOVDaddr {
9444			break
9445		}
9446		off2 := p.AuxInt
9447		sym2 := p.Aux
9448		x := p.Args[0]
9449		if !(canMergeSym(sym1, sym2) && (x.Op != OpSB || p.Uses == 1)) {
9450			break
9451		}
9452		v.reset(OpPPC64MOVBstorezero)
9453		v.AuxInt = off1 + off2
9454		v.Aux = mergeSym(sym1, sym2)
9455		v.AddArg(x)
9456		v.AddArg(mem)
9457		return true
9458	}
9459	return false
9460}
9461func rewriteValuePPC64_OpPPC64MOVDload_0(v *Value) bool {
9462	// match: (MOVDload [off] {sym} ptr (FMOVDstore [off] {sym} ptr x _))
9463	// result: (MFVSRD x)
9464	for {
9465		off := v.AuxInt
9466		sym := v.Aux
9467		_ = v.Args[1]
9468		ptr := v.Args[0]
9469		v_1 := v.Args[1]
9470		if v_1.Op != OpPPC64FMOVDstore || v_1.AuxInt != off || v_1.Aux != sym {
9471			break
9472		}
9473		_ = v_1.Args[2]
9474		if ptr != v_1.Args[0] {
9475			break
9476		}
9477		x := v_1.Args[1]
9478		v.reset(OpPPC64MFVSRD)
9479		v.AddArg(x)
9480		return true
9481	}
9482	// match: (MOVDload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
9483	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1) && (off1+off2)%4 == 0
9484	// result: (MOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
9485	for {
9486		off1 := v.AuxInt
9487		sym1 := v.Aux
9488		mem := v.Args[1]
9489		p := v.Args[0]
9490		if p.Op != OpPPC64MOVDaddr {
9491			break
9492		}
9493		off2 := p.AuxInt
9494		sym2 := p.Aux
9495		ptr := p.Args[0]
9496		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1) && (off1+off2)%4 == 0) {
9497			break
9498		}
9499		v.reset(OpPPC64MOVDload)
9500		v.AuxInt = off1 + off2
9501		v.Aux = mergeSym(sym1, sym2)
9502		v.AddArg(ptr)
9503		v.AddArg(mem)
9504		return true
9505	}
9506	// match: (MOVDload [off1] {sym} (ADDconst [off2] x) mem)
9507	// cond: is16Bit(off1+off2) && (off1+off2)%4 == 0
9508	// result: (MOVDload [off1+off2] {sym} x mem)
9509	for {
9510		off1 := v.AuxInt
9511		sym := v.Aux
9512		mem := v.Args[1]
9513		v_0 := v.Args[0]
9514		if v_0.Op != OpPPC64ADDconst {
9515			break
9516		}
9517		off2 := v_0.AuxInt
9518		x := v_0.Args[0]
9519		if !(is16Bit(off1+off2) && (off1+off2)%4 == 0) {
9520			break
9521		}
9522		v.reset(OpPPC64MOVDload)
9523		v.AuxInt = off1 + off2
9524		v.Aux = sym
9525		v.AddArg(x)
9526		v.AddArg(mem)
9527		return true
9528	}
9529	// match: (MOVDload [0] {sym} p:(ADD ptr idx) mem)
9530	// cond: sym == nil && p.Uses == 1
9531	// result: (MOVDloadidx ptr idx mem)
9532	for {
9533		if v.AuxInt != 0 {
9534			break
9535		}
9536		sym := v.Aux
9537		mem := v.Args[1]
9538		p := v.Args[0]
9539		if p.Op != OpPPC64ADD {
9540			break
9541		}
9542		idx := p.Args[1]
9543		ptr := p.Args[0]
9544		if !(sym == nil && p.Uses == 1) {
9545			break
9546		}
9547		v.reset(OpPPC64MOVDloadidx)
9548		v.AddArg(ptr)
9549		v.AddArg(idx)
9550		v.AddArg(mem)
9551		return true
9552	}
9553	return false
9554}
9555func rewriteValuePPC64_OpPPC64MOVDloadidx_0(v *Value) bool {
9556	// match: (MOVDloadidx ptr (MOVDconst [c]) mem)
9557	// cond: is16Bit(c) && c%4 == 0
9558	// result: (MOVDload [c] ptr mem)
9559	for {
9560		mem := v.Args[2]
9561		ptr := v.Args[0]
9562		v_1 := v.Args[1]
9563		if v_1.Op != OpPPC64MOVDconst {
9564			break
9565		}
9566		c := v_1.AuxInt
9567		if !(is16Bit(c) && c%4 == 0) {
9568			break
9569		}
9570		v.reset(OpPPC64MOVDload)
9571		v.AuxInt = c
9572		v.AddArg(ptr)
9573		v.AddArg(mem)
9574		return true
9575	}
9576	// match: (MOVDloadidx (MOVDconst [c]) ptr mem)
9577	// cond: is16Bit(c) && c%4 == 0
9578	// result: (MOVDload [c] ptr mem)
9579	for {
9580		mem := v.Args[2]
9581		v_0 := v.Args[0]
9582		if v_0.Op != OpPPC64MOVDconst {
9583			break
9584		}
9585		c := v_0.AuxInt
9586		ptr := v.Args[1]
9587		if !(is16Bit(c) && c%4 == 0) {
9588			break
9589		}
9590		v.reset(OpPPC64MOVDload)
9591		v.AuxInt = c
9592		v.AddArg(ptr)
9593		v.AddArg(mem)
9594		return true
9595	}
9596	return false
9597}
9598func rewriteValuePPC64_OpPPC64MOVDstore_0(v *Value) bool {
9599	// match: (MOVDstore [off] {sym} ptr (MFVSRD x) mem)
9600	// result: (FMOVDstore [off] {sym} ptr x mem)
9601	for {
9602		off := v.AuxInt
9603		sym := v.Aux
9604		mem := v.Args[2]
9605		ptr := v.Args[0]
9606		v_1 := v.Args[1]
9607		if v_1.Op != OpPPC64MFVSRD {
9608			break
9609		}
9610		x := v_1.Args[0]
9611		v.reset(OpPPC64FMOVDstore)
9612		v.AuxInt = off
9613		v.Aux = sym
9614		v.AddArg(ptr)
9615		v.AddArg(x)
9616		v.AddArg(mem)
9617		return true
9618	}
9619	// match: (MOVDstore [off1] {sym} (ADDconst [off2] x) val mem)
9620	// cond: is16Bit(off1+off2) && (off1+off2)%4 == 0
9621	// result: (MOVDstore [off1+off2] {sym} x val mem)
9622	for {
9623		off1 := v.AuxInt
9624		sym := v.Aux
9625		mem := v.Args[2]
9626		v_0 := v.Args[0]
9627		if v_0.Op != OpPPC64ADDconst {
9628			break
9629		}
9630		off2 := v_0.AuxInt
9631		x := v_0.Args[0]
9632		val := v.Args[1]
9633		if !(is16Bit(off1+off2) && (off1+off2)%4 == 0) {
9634			break
9635		}
9636		v.reset(OpPPC64MOVDstore)
9637		v.AuxInt = off1 + off2
9638		v.Aux = sym
9639		v.AddArg(x)
9640		v.AddArg(val)
9641		v.AddArg(mem)
9642		return true
9643	}
9644	// match: (MOVDstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
9645	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1) && (off1+off2)%4 == 0
9646	// result: (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
9647	for {
9648		off1 := v.AuxInt
9649		sym1 := v.Aux
9650		mem := v.Args[2]
9651		p := v.Args[0]
9652		if p.Op != OpPPC64MOVDaddr {
9653			break
9654		}
9655		off2 := p.AuxInt
9656		sym2 := p.Aux
9657		ptr := p.Args[0]
9658		val := v.Args[1]
9659		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1) && (off1+off2)%4 == 0) {
9660			break
9661		}
9662		v.reset(OpPPC64MOVDstore)
9663		v.AuxInt = off1 + off2
9664		v.Aux = mergeSym(sym1, sym2)
9665		v.AddArg(ptr)
9666		v.AddArg(val)
9667		v.AddArg(mem)
9668		return true
9669	}
9670	// match: (MOVDstore [off] {sym} ptr (MOVDconst [0]) mem)
9671	// result: (MOVDstorezero [off] {sym} ptr mem)
9672	for {
9673		off := v.AuxInt
9674		sym := v.Aux
9675		mem := v.Args[2]
9676		ptr := v.Args[0]
9677		v_1 := v.Args[1]
9678		if v_1.Op != OpPPC64MOVDconst || v_1.AuxInt != 0 {
9679			break
9680		}
9681		v.reset(OpPPC64MOVDstorezero)
9682		v.AuxInt = off
9683		v.Aux = sym
9684		v.AddArg(ptr)
9685		v.AddArg(mem)
9686		return true
9687	}
9688	// match: (MOVDstore [off] {sym} p:(ADD ptr idx) val mem)
9689	// cond: off == 0 && sym == nil && p.Uses == 1
9690	// result: (MOVDstoreidx ptr idx val mem)
9691	for {
9692		off := v.AuxInt
9693		sym := v.Aux
9694		mem := v.Args[2]
9695		p := v.Args[0]
9696		if p.Op != OpPPC64ADD {
9697			break
9698		}
9699		idx := p.Args[1]
9700		ptr := p.Args[0]
9701		val := v.Args[1]
9702		if !(off == 0 && sym == nil && p.Uses == 1) {
9703			break
9704		}
9705		v.reset(OpPPC64MOVDstoreidx)
9706		v.AddArg(ptr)
9707		v.AddArg(idx)
9708		v.AddArg(val)
9709		v.AddArg(mem)
9710		return true
9711	}
9712	return false
9713}
9714func rewriteValuePPC64_OpPPC64MOVDstoreidx_0(v *Value) bool {
9715	// match: (MOVDstoreidx ptr (MOVDconst [c]) val mem)
9716	// cond: is16Bit(c) && c%4 == 0
9717	// result: (MOVDstore [c] ptr val mem)
9718	for {
9719		mem := v.Args[3]
9720		ptr := v.Args[0]
9721		v_1 := v.Args[1]
9722		if v_1.Op != OpPPC64MOVDconst {
9723			break
9724		}
9725		c := v_1.AuxInt
9726		val := v.Args[2]
9727		if !(is16Bit(c) && c%4 == 0) {
9728			break
9729		}
9730		v.reset(OpPPC64MOVDstore)
9731		v.AuxInt = c
9732		v.AddArg(ptr)
9733		v.AddArg(val)
9734		v.AddArg(mem)
9735		return true
9736	}
9737	// match: (MOVDstoreidx (MOVDconst [c]) ptr val mem)
9738	// cond: is16Bit(c) && c%4 == 0
9739	// result: (MOVDstore [c] ptr val mem)
9740	for {
9741		mem := v.Args[3]
9742		v_0 := v.Args[0]
9743		if v_0.Op != OpPPC64MOVDconst {
9744			break
9745		}
9746		c := v_0.AuxInt
9747		ptr := v.Args[1]
9748		val := v.Args[2]
9749		if !(is16Bit(c) && c%4 == 0) {
9750			break
9751		}
9752		v.reset(OpPPC64MOVDstore)
9753		v.AuxInt = c
9754		v.AddArg(ptr)
9755		v.AddArg(val)
9756		v.AddArg(mem)
9757		return true
9758	}
9759	return false
9760}
9761func rewriteValuePPC64_OpPPC64MOVDstorezero_0(v *Value) bool {
9762	// match: (MOVDstorezero [off1] {sym} (ADDconst [off2] x) mem)
9763	// cond: is16Bit(off1+off2) && (off1+off2)%4 == 0
9764	// result: (MOVDstorezero [off1+off2] {sym} x mem)
9765	for {
9766		off1 := v.AuxInt
9767		sym := v.Aux
9768		mem := v.Args[1]
9769		v_0 := v.Args[0]
9770		if v_0.Op != OpPPC64ADDconst {
9771			break
9772		}
9773		off2 := v_0.AuxInt
9774		x := v_0.Args[0]
9775		if !(is16Bit(off1+off2) && (off1+off2)%4 == 0) {
9776			break
9777		}
9778		v.reset(OpPPC64MOVDstorezero)
9779		v.AuxInt = off1 + off2
9780		v.Aux = sym
9781		v.AddArg(x)
9782		v.AddArg(mem)
9783		return true
9784	}
9785	// match: (MOVDstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem)
9786	// cond: canMergeSym(sym1,sym2) && (x.Op != OpSB || p.Uses == 1) && (off1+off2)%4 == 0
9787	// result: (MOVDstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
9788	for {
9789		off1 := v.AuxInt
9790		sym1 := v.Aux
9791		mem := v.Args[1]
9792		p := v.Args[0]
9793		if p.Op != OpPPC64MOVDaddr {
9794			break
9795		}
9796		off2 := p.AuxInt
9797		sym2 := p.Aux
9798		x := p.Args[0]
9799		if !(canMergeSym(sym1, sym2) && (x.Op != OpSB || p.Uses == 1) && (off1+off2)%4 == 0) {
9800			break
9801		}
9802		v.reset(OpPPC64MOVDstorezero)
9803		v.AuxInt = off1 + off2
9804		v.Aux = mergeSym(sym1, sym2)
9805		v.AddArg(x)
9806		v.AddArg(mem)
9807		return true
9808	}
9809	return false
9810}
9811func rewriteValuePPC64_OpPPC64MOVHBRstore_0(v *Value) bool {
9812	// match: (MOVHBRstore {sym} ptr (MOVHreg x) mem)
9813	// result: (MOVHBRstore {sym} ptr x mem)
9814	for {
9815		sym := v.Aux
9816		mem := v.Args[2]
9817		ptr := v.Args[0]
9818		v_1 := v.Args[1]
9819		if v_1.Op != OpPPC64MOVHreg {
9820			break
9821		}
9822		x := v_1.Args[0]
9823		v.reset(OpPPC64MOVHBRstore)
9824		v.Aux = sym
9825		v.AddArg(ptr)
9826		v.AddArg(x)
9827		v.AddArg(mem)
9828		return true
9829	}
9830	// match: (MOVHBRstore {sym} ptr (MOVHZreg x) mem)
9831	// result: (MOVHBRstore {sym} ptr x mem)
9832	for {
9833		sym := v.Aux
9834		mem := v.Args[2]
9835		ptr := v.Args[0]
9836		v_1 := v.Args[1]
9837		if v_1.Op != OpPPC64MOVHZreg {
9838			break
9839		}
9840		x := v_1.Args[0]
9841		v.reset(OpPPC64MOVHBRstore)
9842		v.Aux = sym
9843		v.AddArg(ptr)
9844		v.AddArg(x)
9845		v.AddArg(mem)
9846		return true
9847	}
9848	// match: (MOVHBRstore {sym} ptr (MOVWreg x) mem)
9849	// result: (MOVHBRstore {sym} ptr x mem)
9850	for {
9851		sym := v.Aux
9852		mem := v.Args[2]
9853		ptr := v.Args[0]
9854		v_1 := v.Args[1]
9855		if v_1.Op != OpPPC64MOVWreg {
9856			break
9857		}
9858		x := v_1.Args[0]
9859		v.reset(OpPPC64MOVHBRstore)
9860		v.Aux = sym
9861		v.AddArg(ptr)
9862		v.AddArg(x)
9863		v.AddArg(mem)
9864		return true
9865	}
9866	// match: (MOVHBRstore {sym} ptr (MOVWZreg x) mem)
9867	// result: (MOVHBRstore {sym} ptr x mem)
9868	for {
9869		sym := v.Aux
9870		mem := v.Args[2]
9871		ptr := v.Args[0]
9872		v_1 := v.Args[1]
9873		if v_1.Op != OpPPC64MOVWZreg {
9874			break
9875		}
9876		x := v_1.Args[0]
9877		v.reset(OpPPC64MOVHBRstore)
9878		v.Aux = sym
9879		v.AddArg(ptr)
9880		v.AddArg(x)
9881		v.AddArg(mem)
9882		return true
9883	}
9884	return false
9885}
9886func rewriteValuePPC64_OpPPC64MOVHZload_0(v *Value) bool {
9887	// match: (MOVHZload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
9888	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
9889	// result: (MOVHZload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
9890	for {
9891		off1 := v.AuxInt
9892		sym1 := v.Aux
9893		mem := v.Args[1]
9894		p := v.Args[0]
9895		if p.Op != OpPPC64MOVDaddr {
9896			break
9897		}
9898		off2 := p.AuxInt
9899		sym2 := p.Aux
9900		ptr := p.Args[0]
9901		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
9902			break
9903		}
9904		v.reset(OpPPC64MOVHZload)
9905		v.AuxInt = off1 + off2
9906		v.Aux = mergeSym(sym1, sym2)
9907		v.AddArg(ptr)
9908		v.AddArg(mem)
9909		return true
9910	}
9911	// match: (MOVHZload [off1] {sym} (ADDconst [off2] x) mem)
9912	// cond: is16Bit(off1+off2)
9913	// result: (MOVHZload [off1+off2] {sym} x mem)
9914	for {
9915		off1 := v.AuxInt
9916		sym := v.Aux
9917		mem := v.Args[1]
9918		v_0 := v.Args[0]
9919		if v_0.Op != OpPPC64ADDconst {
9920			break
9921		}
9922		off2 := v_0.AuxInt
9923		x := v_0.Args[0]
9924		if !(is16Bit(off1 + off2)) {
9925			break
9926		}
9927		v.reset(OpPPC64MOVHZload)
9928		v.AuxInt = off1 + off2
9929		v.Aux = sym
9930		v.AddArg(x)
9931		v.AddArg(mem)
9932		return true
9933	}
9934	// match: (MOVHZload [0] {sym} p:(ADD ptr idx) mem)
9935	// cond: sym == nil && p.Uses == 1
9936	// result: (MOVHZloadidx ptr idx mem)
9937	for {
9938		if v.AuxInt != 0 {
9939			break
9940		}
9941		sym := v.Aux
9942		mem := v.Args[1]
9943		p := v.Args[0]
9944		if p.Op != OpPPC64ADD {
9945			break
9946		}
9947		idx := p.Args[1]
9948		ptr := p.Args[0]
9949		if !(sym == nil && p.Uses == 1) {
9950			break
9951		}
9952		v.reset(OpPPC64MOVHZloadidx)
9953		v.AddArg(ptr)
9954		v.AddArg(idx)
9955		v.AddArg(mem)
9956		return true
9957	}
9958	return false
9959}
9960func rewriteValuePPC64_OpPPC64MOVHZloadidx_0(v *Value) bool {
9961	// match: (MOVHZloadidx ptr (MOVDconst [c]) mem)
9962	// cond: is16Bit(c)
9963	// result: (MOVHZload [c] ptr mem)
9964	for {
9965		mem := v.Args[2]
9966		ptr := v.Args[0]
9967		v_1 := v.Args[1]
9968		if v_1.Op != OpPPC64MOVDconst {
9969			break
9970		}
9971		c := v_1.AuxInt
9972		if !(is16Bit(c)) {
9973			break
9974		}
9975		v.reset(OpPPC64MOVHZload)
9976		v.AuxInt = c
9977		v.AddArg(ptr)
9978		v.AddArg(mem)
9979		return true
9980	}
9981	// match: (MOVHZloadidx (MOVDconst [c]) ptr mem)
9982	// cond: is16Bit(c)
9983	// result: (MOVHZload [c] ptr mem)
9984	for {
9985		mem := v.Args[2]
9986		v_0 := v.Args[0]
9987		if v_0.Op != OpPPC64MOVDconst {
9988			break
9989		}
9990		c := v_0.AuxInt
9991		ptr := v.Args[1]
9992		if !(is16Bit(c)) {
9993			break
9994		}
9995		v.reset(OpPPC64MOVHZload)
9996		v.AuxInt = c
9997		v.AddArg(ptr)
9998		v.AddArg(mem)
9999		return true
10000	}
10001	return false
10002}
10003func rewriteValuePPC64_OpPPC64MOVHZreg_0(v *Value) bool {
10004	b := v.Block
10005	typ := &b.Func.Config.Types
10006	// match: (MOVHZreg y:(ANDconst [c] _))
10007	// cond: uint64(c) <= 0xFFFF
10008	// result: y
10009	for {
10010		y := v.Args[0]
10011		if y.Op != OpPPC64ANDconst {
10012			break
10013		}
10014		c := y.AuxInt
10015		if !(uint64(c) <= 0xFFFF) {
10016			break
10017		}
10018		v.reset(OpCopy)
10019		v.Type = y.Type
10020		v.AddArg(y)
10021		return true
10022	}
10023	// match: (MOVHZreg (SRWconst [c] (MOVBZreg x)))
10024	// result: (SRWconst [c] (MOVBZreg x))
10025	for {
10026		v_0 := v.Args[0]
10027		if v_0.Op != OpPPC64SRWconst {
10028			break
10029		}
10030		c := v_0.AuxInt
10031		v_0_0 := v_0.Args[0]
10032		if v_0_0.Op != OpPPC64MOVBZreg {
10033			break
10034		}
10035		x := v_0_0.Args[0]
10036		v.reset(OpPPC64SRWconst)
10037		v.AuxInt = c
10038		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
10039		v0.AddArg(x)
10040		v.AddArg(v0)
10041		return true
10042	}
10043	// match: (MOVHZreg (SRWconst [c] (MOVHZreg x)))
10044	// result: (SRWconst [c] (MOVHZreg x))
10045	for {
10046		v_0 := v.Args[0]
10047		if v_0.Op != OpPPC64SRWconst {
10048			break
10049		}
10050		c := v_0.AuxInt
10051		v_0_0 := v_0.Args[0]
10052		if v_0_0.Op != OpPPC64MOVHZreg {
10053			break
10054		}
10055		x := v_0_0.Args[0]
10056		v.reset(OpPPC64SRWconst)
10057		v.AuxInt = c
10058		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
10059		v0.AddArg(x)
10060		v.AddArg(v0)
10061		return true
10062	}
10063	// match: (MOVHZreg (SRWconst [c] x))
10064	// cond: sizeof(x.Type) <= 16
10065	// result: (SRWconst [c] x)
10066	for {
10067		v_0 := v.Args[0]
10068		if v_0.Op != OpPPC64SRWconst {
10069			break
10070		}
10071		c := v_0.AuxInt
10072		x := v_0.Args[0]
10073		if !(sizeof(x.Type) <= 16) {
10074			break
10075		}
10076		v.reset(OpPPC64SRWconst)
10077		v.AuxInt = c
10078		v.AddArg(x)
10079		return true
10080	}
10081	// match: (MOVHZreg (SRDconst [c] x))
10082	// cond: c>=48
10083	// result: (SRDconst [c] x)
10084	for {
10085		v_0 := v.Args[0]
10086		if v_0.Op != OpPPC64SRDconst {
10087			break
10088		}
10089		c := v_0.AuxInt
10090		x := v_0.Args[0]
10091		if !(c >= 48) {
10092			break
10093		}
10094		v.reset(OpPPC64SRDconst)
10095		v.AuxInt = c
10096		v.AddArg(x)
10097		return true
10098	}
10099	// match: (MOVHZreg (SRWconst [c] x))
10100	// cond: c>=16
10101	// result: (SRWconst [c] x)
10102	for {
10103		v_0 := v.Args[0]
10104		if v_0.Op != OpPPC64SRWconst {
10105			break
10106		}
10107		c := v_0.AuxInt
10108		x := v_0.Args[0]
10109		if !(c >= 16) {
10110			break
10111		}
10112		v.reset(OpPPC64SRWconst)
10113		v.AuxInt = c
10114		v.AddArg(x)
10115		return true
10116	}
10117	// match: (MOVHZreg y:(MOVHZreg _))
10118	// result: y
10119	for {
10120		y := v.Args[0]
10121		if y.Op != OpPPC64MOVHZreg {
10122			break
10123		}
10124		v.reset(OpCopy)
10125		v.Type = y.Type
10126		v.AddArg(y)
10127		return true
10128	}
10129	// match: (MOVHZreg y:(MOVBZreg _))
10130	// result: y
10131	for {
10132		y := v.Args[0]
10133		if y.Op != OpPPC64MOVBZreg {
10134			break
10135		}
10136		v.reset(OpCopy)
10137		v.Type = y.Type
10138		v.AddArg(y)
10139		return true
10140	}
10141	// match: (MOVHZreg y:(MOVHBRload _ _))
10142	// result: y
10143	for {
10144		y := v.Args[0]
10145		if y.Op != OpPPC64MOVHBRload {
10146			break
10147		}
10148		_ = y.Args[1]
10149		v.reset(OpCopy)
10150		v.Type = y.Type
10151		v.AddArg(y)
10152		return true
10153	}
10154	// match: (MOVHZreg y:(MOVHreg x))
10155	// result: (MOVHZreg x)
10156	for {
10157		y := v.Args[0]
10158		if y.Op != OpPPC64MOVHreg {
10159			break
10160		}
10161		x := y.Args[0]
10162		v.reset(OpPPC64MOVHZreg)
10163		v.AddArg(x)
10164		return true
10165	}
10166	return false
10167}
10168func rewriteValuePPC64_OpPPC64MOVHZreg_10(v *Value) bool {
10169	// match: (MOVHZreg x:(MOVBZload _ _))
10170	// result: x
10171	for {
10172		x := v.Args[0]
10173		if x.Op != OpPPC64MOVBZload {
10174			break
10175		}
10176		_ = x.Args[1]
10177		v.reset(OpCopy)
10178		v.Type = x.Type
10179		v.AddArg(x)
10180		return true
10181	}
10182	// match: (MOVHZreg x:(MOVBZloadidx _ _ _))
10183	// result: x
10184	for {
10185		x := v.Args[0]
10186		if x.Op != OpPPC64MOVBZloadidx {
10187			break
10188		}
10189		_ = x.Args[2]
10190		v.reset(OpCopy)
10191		v.Type = x.Type
10192		v.AddArg(x)
10193		return true
10194	}
10195	// match: (MOVHZreg x:(MOVHZload _ _))
10196	// result: x
10197	for {
10198		x := v.Args[0]
10199		if x.Op != OpPPC64MOVHZload {
10200			break
10201		}
10202		_ = x.Args[1]
10203		v.reset(OpCopy)
10204		v.Type = x.Type
10205		v.AddArg(x)
10206		return true
10207	}
10208	// match: (MOVHZreg x:(MOVHZloadidx _ _ _))
10209	// result: x
10210	for {
10211		x := v.Args[0]
10212		if x.Op != OpPPC64MOVHZloadidx {
10213			break
10214		}
10215		_ = x.Args[2]
10216		v.reset(OpCopy)
10217		v.Type = x.Type
10218		v.AddArg(x)
10219		return true
10220	}
10221	// match: (MOVHZreg x:(Arg <t>))
10222	// cond: (is8BitInt(t) || is16BitInt(t)) && !isSigned(t)
10223	// result: x
10224	for {
10225		x := v.Args[0]
10226		if x.Op != OpArg {
10227			break
10228		}
10229		t := x.Type
10230		if !((is8BitInt(t) || is16BitInt(t)) && !isSigned(t)) {
10231			break
10232		}
10233		v.reset(OpCopy)
10234		v.Type = x.Type
10235		v.AddArg(x)
10236		return true
10237	}
10238	// match: (MOVHZreg (MOVDconst [c]))
10239	// result: (MOVDconst [int64(uint16(c))])
10240	for {
10241		v_0 := v.Args[0]
10242		if v_0.Op != OpPPC64MOVDconst {
10243			break
10244		}
10245		c := v_0.AuxInt
10246		v.reset(OpPPC64MOVDconst)
10247		v.AuxInt = int64(uint16(c))
10248		return true
10249	}
10250	return false
10251}
10252func rewriteValuePPC64_OpPPC64MOVHload_0(v *Value) bool {
10253	// match: (MOVHload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
10254	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
10255	// result: (MOVHload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
10256	for {
10257		off1 := v.AuxInt
10258		sym1 := v.Aux
10259		mem := v.Args[1]
10260		p := v.Args[0]
10261		if p.Op != OpPPC64MOVDaddr {
10262			break
10263		}
10264		off2 := p.AuxInt
10265		sym2 := p.Aux
10266		ptr := p.Args[0]
10267		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
10268			break
10269		}
10270		v.reset(OpPPC64MOVHload)
10271		v.AuxInt = off1 + off2
10272		v.Aux = mergeSym(sym1, sym2)
10273		v.AddArg(ptr)
10274		v.AddArg(mem)
10275		return true
10276	}
10277	// match: (MOVHload [off1] {sym} (ADDconst [off2] x) mem)
10278	// cond: is16Bit(off1+off2)
10279	// result: (MOVHload [off1+off2] {sym} x mem)
10280	for {
10281		off1 := v.AuxInt
10282		sym := v.Aux
10283		mem := v.Args[1]
10284		v_0 := v.Args[0]
10285		if v_0.Op != OpPPC64ADDconst {
10286			break
10287		}
10288		off2 := v_0.AuxInt
10289		x := v_0.Args[0]
10290		if !(is16Bit(off1 + off2)) {
10291			break
10292		}
10293		v.reset(OpPPC64MOVHload)
10294		v.AuxInt = off1 + off2
10295		v.Aux = sym
10296		v.AddArg(x)
10297		v.AddArg(mem)
10298		return true
10299	}
10300	// match: (MOVHload [0] {sym} p:(ADD ptr idx) mem)
10301	// cond: sym == nil && p.Uses == 1
10302	// result: (MOVHloadidx ptr idx mem)
10303	for {
10304		if v.AuxInt != 0 {
10305			break
10306		}
10307		sym := v.Aux
10308		mem := v.Args[1]
10309		p := v.Args[0]
10310		if p.Op != OpPPC64ADD {
10311			break
10312		}
10313		idx := p.Args[1]
10314		ptr := p.Args[0]
10315		if !(sym == nil && p.Uses == 1) {
10316			break
10317		}
10318		v.reset(OpPPC64MOVHloadidx)
10319		v.AddArg(ptr)
10320		v.AddArg(idx)
10321		v.AddArg(mem)
10322		return true
10323	}
10324	return false
10325}
10326func rewriteValuePPC64_OpPPC64MOVHloadidx_0(v *Value) bool {
10327	// match: (MOVHloadidx ptr (MOVDconst [c]) mem)
10328	// cond: is16Bit(c)
10329	// result: (MOVHload [c] ptr mem)
10330	for {
10331		mem := v.Args[2]
10332		ptr := v.Args[0]
10333		v_1 := v.Args[1]
10334		if v_1.Op != OpPPC64MOVDconst {
10335			break
10336		}
10337		c := v_1.AuxInt
10338		if !(is16Bit(c)) {
10339			break
10340		}
10341		v.reset(OpPPC64MOVHload)
10342		v.AuxInt = c
10343		v.AddArg(ptr)
10344		v.AddArg(mem)
10345		return true
10346	}
10347	// match: (MOVHloadidx (MOVDconst [c]) ptr mem)
10348	// cond: is16Bit(c)
10349	// result: (MOVHload [c] ptr mem)
10350	for {
10351		mem := v.Args[2]
10352		v_0 := v.Args[0]
10353		if v_0.Op != OpPPC64MOVDconst {
10354			break
10355		}
10356		c := v_0.AuxInt
10357		ptr := v.Args[1]
10358		if !(is16Bit(c)) {
10359			break
10360		}
10361		v.reset(OpPPC64MOVHload)
10362		v.AuxInt = c
10363		v.AddArg(ptr)
10364		v.AddArg(mem)
10365		return true
10366	}
10367	return false
10368}
10369func rewriteValuePPC64_OpPPC64MOVHreg_0(v *Value) bool {
10370	b := v.Block
10371	typ := &b.Func.Config.Types
10372	// match: (MOVHreg y:(ANDconst [c] _))
10373	// cond: uint64(c) <= 0x7FFF
10374	// result: y
10375	for {
10376		y := v.Args[0]
10377		if y.Op != OpPPC64ANDconst {
10378			break
10379		}
10380		c := y.AuxInt
10381		if !(uint64(c) <= 0x7FFF) {
10382			break
10383		}
10384		v.reset(OpCopy)
10385		v.Type = y.Type
10386		v.AddArg(y)
10387		return true
10388	}
10389	// match: (MOVHreg (SRAWconst [c] (MOVBreg x)))
10390	// result: (SRAWconst [c] (MOVBreg x))
10391	for {
10392		v_0 := v.Args[0]
10393		if v_0.Op != OpPPC64SRAWconst {
10394			break
10395		}
10396		c := v_0.AuxInt
10397		v_0_0 := v_0.Args[0]
10398		if v_0_0.Op != OpPPC64MOVBreg {
10399			break
10400		}
10401		x := v_0_0.Args[0]
10402		v.reset(OpPPC64SRAWconst)
10403		v.AuxInt = c
10404		v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
10405		v0.AddArg(x)
10406		v.AddArg(v0)
10407		return true
10408	}
10409	// match: (MOVHreg (SRAWconst [c] (MOVHreg x)))
10410	// result: (SRAWconst [c] (MOVHreg x))
10411	for {
10412		v_0 := v.Args[0]
10413		if v_0.Op != OpPPC64SRAWconst {
10414			break
10415		}
10416		c := v_0.AuxInt
10417		v_0_0 := v_0.Args[0]
10418		if v_0_0.Op != OpPPC64MOVHreg {
10419			break
10420		}
10421		x := v_0_0.Args[0]
10422		v.reset(OpPPC64SRAWconst)
10423		v.AuxInt = c
10424		v0 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
10425		v0.AddArg(x)
10426		v.AddArg(v0)
10427		return true
10428	}
10429	// match: (MOVHreg (SRAWconst [c] x))
10430	// cond: sizeof(x.Type) <= 16
10431	// result: (SRAWconst [c] x)
10432	for {
10433		v_0 := v.Args[0]
10434		if v_0.Op != OpPPC64SRAWconst {
10435			break
10436		}
10437		c := v_0.AuxInt
10438		x := v_0.Args[0]
10439		if !(sizeof(x.Type) <= 16) {
10440			break
10441		}
10442		v.reset(OpPPC64SRAWconst)
10443		v.AuxInt = c
10444		v.AddArg(x)
10445		return true
10446	}
10447	// match: (MOVHreg (SRDconst [c] x))
10448	// cond: c>48
10449	// result: (SRDconst [c] x)
10450	for {
10451		v_0 := v.Args[0]
10452		if v_0.Op != OpPPC64SRDconst {
10453			break
10454		}
10455		c := v_0.AuxInt
10456		x := v_0.Args[0]
10457		if !(c > 48) {
10458			break
10459		}
10460		v.reset(OpPPC64SRDconst)
10461		v.AuxInt = c
10462		v.AddArg(x)
10463		return true
10464	}
10465	// match: (MOVHreg (SRDconst [c] x))
10466	// cond: c==48
10467	// result: (SRADconst [c] x)
10468	for {
10469		v_0 := v.Args[0]
10470		if v_0.Op != OpPPC64SRDconst {
10471			break
10472		}
10473		c := v_0.AuxInt
10474		x := v_0.Args[0]
10475		if !(c == 48) {
10476			break
10477		}
10478		v.reset(OpPPC64SRADconst)
10479		v.AuxInt = c
10480		v.AddArg(x)
10481		return true
10482	}
10483	// match: (MOVHreg (SRWconst [c] x))
10484	// cond: c>16
10485	// result: (SRWconst [c] x)
10486	for {
10487		v_0 := v.Args[0]
10488		if v_0.Op != OpPPC64SRWconst {
10489			break
10490		}
10491		c := v_0.AuxInt
10492		x := v_0.Args[0]
10493		if !(c > 16) {
10494			break
10495		}
10496		v.reset(OpPPC64SRWconst)
10497		v.AuxInt = c
10498		v.AddArg(x)
10499		return true
10500	}
10501	// match: (MOVHreg (SRWconst [c] x))
10502	// cond: c==16
10503	// result: (SRAWconst [c] x)
10504	for {
10505		v_0 := v.Args[0]
10506		if v_0.Op != OpPPC64SRWconst {
10507			break
10508		}
10509		c := v_0.AuxInt
10510		x := v_0.Args[0]
10511		if !(c == 16) {
10512			break
10513		}
10514		v.reset(OpPPC64SRAWconst)
10515		v.AuxInt = c
10516		v.AddArg(x)
10517		return true
10518	}
10519	// match: (MOVHreg y:(MOVHreg _))
10520	// result: y
10521	for {
10522		y := v.Args[0]
10523		if y.Op != OpPPC64MOVHreg {
10524			break
10525		}
10526		v.reset(OpCopy)
10527		v.Type = y.Type
10528		v.AddArg(y)
10529		return true
10530	}
10531	// match: (MOVHreg y:(MOVBreg _))
10532	// result: y
10533	for {
10534		y := v.Args[0]
10535		if y.Op != OpPPC64MOVBreg {
10536			break
10537		}
10538		v.reset(OpCopy)
10539		v.Type = y.Type
10540		v.AddArg(y)
10541		return true
10542	}
10543	return false
10544}
10545func rewriteValuePPC64_OpPPC64MOVHreg_10(v *Value) bool {
10546	// match: (MOVHreg y:(MOVHZreg x))
10547	// result: (MOVHreg x)
10548	for {
10549		y := v.Args[0]
10550		if y.Op != OpPPC64MOVHZreg {
10551			break
10552		}
10553		x := y.Args[0]
10554		v.reset(OpPPC64MOVHreg)
10555		v.AddArg(x)
10556		return true
10557	}
10558	// match: (MOVHreg x:(MOVHload _ _))
10559	// result: x
10560	for {
10561		x := v.Args[0]
10562		if x.Op != OpPPC64MOVHload {
10563			break
10564		}
10565		_ = x.Args[1]
10566		v.reset(OpCopy)
10567		v.Type = x.Type
10568		v.AddArg(x)
10569		return true
10570	}
10571	// match: (MOVHreg x:(MOVHloadidx _ _ _))
10572	// result: x
10573	for {
10574		x := v.Args[0]
10575		if x.Op != OpPPC64MOVHloadidx {
10576			break
10577		}
10578		_ = x.Args[2]
10579		v.reset(OpCopy)
10580		v.Type = x.Type
10581		v.AddArg(x)
10582		return true
10583	}
10584	// match: (MOVHreg x:(Arg <t>))
10585	// cond: (is8BitInt(t) || is16BitInt(t)) && isSigned(t)
10586	// result: x
10587	for {
10588		x := v.Args[0]
10589		if x.Op != OpArg {
10590			break
10591		}
10592		t := x.Type
10593		if !((is8BitInt(t) || is16BitInt(t)) && isSigned(t)) {
10594			break
10595		}
10596		v.reset(OpCopy)
10597		v.Type = x.Type
10598		v.AddArg(x)
10599		return true
10600	}
10601	// match: (MOVHreg (MOVDconst [c]))
10602	// result: (MOVDconst [int64(int16(c))])
10603	for {
10604		v_0 := v.Args[0]
10605		if v_0.Op != OpPPC64MOVDconst {
10606			break
10607		}
10608		c := v_0.AuxInt
10609		v.reset(OpPPC64MOVDconst)
10610		v.AuxInt = int64(int16(c))
10611		return true
10612	}
10613	return false
10614}
10615func rewriteValuePPC64_OpPPC64MOVHstore_0(v *Value) bool {
10616	b := v.Block
10617	config := b.Func.Config
10618	// match: (MOVHstore [off1] {sym} (ADDconst [off2] x) val mem)
10619	// cond: is16Bit(off1+off2)
10620	// result: (MOVHstore [off1+off2] {sym} x val mem)
10621	for {
10622		off1 := v.AuxInt
10623		sym := v.Aux
10624		mem := v.Args[2]
10625		v_0 := v.Args[0]
10626		if v_0.Op != OpPPC64ADDconst {
10627			break
10628		}
10629		off2 := v_0.AuxInt
10630		x := v_0.Args[0]
10631		val := v.Args[1]
10632		if !(is16Bit(off1 + off2)) {
10633			break
10634		}
10635		v.reset(OpPPC64MOVHstore)
10636		v.AuxInt = off1 + off2
10637		v.Aux = sym
10638		v.AddArg(x)
10639		v.AddArg(val)
10640		v.AddArg(mem)
10641		return true
10642	}
10643	// match: (MOVHstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
10644	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
10645	// result: (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
10646	for {
10647		off1 := v.AuxInt
10648		sym1 := v.Aux
10649		mem := v.Args[2]
10650		p := v.Args[0]
10651		if p.Op != OpPPC64MOVDaddr {
10652			break
10653		}
10654		off2 := p.AuxInt
10655		sym2 := p.Aux
10656		ptr := p.Args[0]
10657		val := v.Args[1]
10658		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
10659			break
10660		}
10661		v.reset(OpPPC64MOVHstore)
10662		v.AuxInt = off1 + off2
10663		v.Aux = mergeSym(sym1, sym2)
10664		v.AddArg(ptr)
10665		v.AddArg(val)
10666		v.AddArg(mem)
10667		return true
10668	}
10669	// match: (MOVHstore [off] {sym} ptr (MOVDconst [0]) mem)
10670	// result: (MOVHstorezero [off] {sym} ptr mem)
10671	for {
10672		off := v.AuxInt
10673		sym := v.Aux
10674		mem := v.Args[2]
10675		ptr := v.Args[0]
10676		v_1 := v.Args[1]
10677		if v_1.Op != OpPPC64MOVDconst || v_1.AuxInt != 0 {
10678			break
10679		}
10680		v.reset(OpPPC64MOVHstorezero)
10681		v.AuxInt = off
10682		v.Aux = sym
10683		v.AddArg(ptr)
10684		v.AddArg(mem)
10685		return true
10686	}
10687	// match: (MOVHstore [off] {sym} p:(ADD ptr idx) val mem)
10688	// cond: off == 0 && sym == nil && p.Uses == 1
10689	// result: (MOVHstoreidx ptr idx val mem)
10690	for {
10691		off := v.AuxInt
10692		sym := v.Aux
10693		mem := v.Args[2]
10694		p := v.Args[0]
10695		if p.Op != OpPPC64ADD {
10696			break
10697		}
10698		idx := p.Args[1]
10699		ptr := p.Args[0]
10700		val := v.Args[1]
10701		if !(off == 0 && sym == nil && p.Uses == 1) {
10702			break
10703		}
10704		v.reset(OpPPC64MOVHstoreidx)
10705		v.AddArg(ptr)
10706		v.AddArg(idx)
10707		v.AddArg(val)
10708		v.AddArg(mem)
10709		return true
10710	}
10711	// match: (MOVHstore [off] {sym} ptr (MOVHreg x) mem)
10712	// result: (MOVHstore [off] {sym} ptr x mem)
10713	for {
10714		off := v.AuxInt
10715		sym := v.Aux
10716		mem := v.Args[2]
10717		ptr := v.Args[0]
10718		v_1 := v.Args[1]
10719		if v_1.Op != OpPPC64MOVHreg {
10720			break
10721		}
10722		x := v_1.Args[0]
10723		v.reset(OpPPC64MOVHstore)
10724		v.AuxInt = off
10725		v.Aux = sym
10726		v.AddArg(ptr)
10727		v.AddArg(x)
10728		v.AddArg(mem)
10729		return true
10730	}
10731	// match: (MOVHstore [off] {sym} ptr (MOVHZreg x) mem)
10732	// result: (MOVHstore [off] {sym} ptr x mem)
10733	for {
10734		off := v.AuxInt
10735		sym := v.Aux
10736		mem := v.Args[2]
10737		ptr := v.Args[0]
10738		v_1 := v.Args[1]
10739		if v_1.Op != OpPPC64MOVHZreg {
10740			break
10741		}
10742		x := v_1.Args[0]
10743		v.reset(OpPPC64MOVHstore)
10744		v.AuxInt = off
10745		v.Aux = sym
10746		v.AddArg(ptr)
10747		v.AddArg(x)
10748		v.AddArg(mem)
10749		return true
10750	}
10751	// match: (MOVHstore [off] {sym} ptr (MOVWreg x) mem)
10752	// result: (MOVHstore [off] {sym} ptr x mem)
10753	for {
10754		off := v.AuxInt
10755		sym := v.Aux
10756		mem := v.Args[2]
10757		ptr := v.Args[0]
10758		v_1 := v.Args[1]
10759		if v_1.Op != OpPPC64MOVWreg {
10760			break
10761		}
10762		x := v_1.Args[0]
10763		v.reset(OpPPC64MOVHstore)
10764		v.AuxInt = off
10765		v.Aux = sym
10766		v.AddArg(ptr)
10767		v.AddArg(x)
10768		v.AddArg(mem)
10769		return true
10770	}
10771	// match: (MOVHstore [off] {sym} ptr (MOVWZreg x) mem)
10772	// result: (MOVHstore [off] {sym} ptr x mem)
10773	for {
10774		off := v.AuxInt
10775		sym := v.Aux
10776		mem := v.Args[2]
10777		ptr := v.Args[0]
10778		v_1 := v.Args[1]
10779		if v_1.Op != OpPPC64MOVWZreg {
10780			break
10781		}
10782		x := v_1.Args[0]
10783		v.reset(OpPPC64MOVHstore)
10784		v.AuxInt = off
10785		v.Aux = sym
10786		v.AddArg(ptr)
10787		v.AddArg(x)
10788		v.AddArg(mem)
10789		return true
10790	}
10791	// match: (MOVHstore [i1] {s} p (SRWconst w [16]) x0:(MOVHstore [i0] {s} p w mem))
10792	// cond: !config.BigEndian && x0.Uses == 1 && i1 == i0+2 && clobber(x0)
10793	// result: (MOVWstore [i0] {s} p w mem)
10794	for {
10795		i1 := v.AuxInt
10796		s := v.Aux
10797		_ = v.Args[2]
10798		p := v.Args[0]
10799		v_1 := v.Args[1]
10800		if v_1.Op != OpPPC64SRWconst || v_1.AuxInt != 16 {
10801			break
10802		}
10803		w := v_1.Args[0]
10804		x0 := v.Args[2]
10805		if x0.Op != OpPPC64MOVHstore {
10806			break
10807		}
10808		i0 := x0.AuxInt
10809		if x0.Aux != s {
10810			break
10811		}
10812		mem := x0.Args[2]
10813		if p != x0.Args[0] || w != x0.Args[1] || !(!config.BigEndian && x0.Uses == 1 && i1 == i0+2 && clobber(x0)) {
10814			break
10815		}
10816		v.reset(OpPPC64MOVWstore)
10817		v.AuxInt = i0
10818		v.Aux = s
10819		v.AddArg(p)
10820		v.AddArg(w)
10821		v.AddArg(mem)
10822		return true
10823	}
10824	// match: (MOVHstore [i1] {s} p (SRDconst w [16]) x0:(MOVHstore [i0] {s} p w mem))
10825	// cond: !config.BigEndian && x0.Uses == 1 && i1 == i0+2 && clobber(x0)
10826	// result: (MOVWstore [i0] {s} p w mem)
10827	for {
10828		i1 := v.AuxInt
10829		s := v.Aux
10830		_ = v.Args[2]
10831		p := v.Args[0]
10832		v_1 := v.Args[1]
10833		if v_1.Op != OpPPC64SRDconst || v_1.AuxInt != 16 {
10834			break
10835		}
10836		w := v_1.Args[0]
10837		x0 := v.Args[2]
10838		if x0.Op != OpPPC64MOVHstore {
10839			break
10840		}
10841		i0 := x0.AuxInt
10842		if x0.Aux != s {
10843			break
10844		}
10845		mem := x0.Args[2]
10846		if p != x0.Args[0] || w != x0.Args[1] || !(!config.BigEndian && x0.Uses == 1 && i1 == i0+2 && clobber(x0)) {
10847			break
10848		}
10849		v.reset(OpPPC64MOVWstore)
10850		v.AuxInt = i0
10851		v.Aux = s
10852		v.AddArg(p)
10853		v.AddArg(w)
10854		v.AddArg(mem)
10855		return true
10856	}
10857	return false
10858}
10859func rewriteValuePPC64_OpPPC64MOVHstoreidx_0(v *Value) bool {
10860	// match: (MOVHstoreidx ptr (MOVDconst [c]) val mem)
10861	// cond: is16Bit(c)
10862	// result: (MOVHstore [c] ptr val mem)
10863	for {
10864		mem := v.Args[3]
10865		ptr := v.Args[0]
10866		v_1 := v.Args[1]
10867		if v_1.Op != OpPPC64MOVDconst {
10868			break
10869		}
10870		c := v_1.AuxInt
10871		val := v.Args[2]
10872		if !(is16Bit(c)) {
10873			break
10874		}
10875		v.reset(OpPPC64MOVHstore)
10876		v.AuxInt = c
10877		v.AddArg(ptr)
10878		v.AddArg(val)
10879		v.AddArg(mem)
10880		return true
10881	}
10882	// match: (MOVHstoreidx (MOVDconst [c]) ptr val mem)
10883	// cond: is16Bit(c)
10884	// result: (MOVHstore [c] ptr val mem)
10885	for {
10886		mem := v.Args[3]
10887		v_0 := v.Args[0]
10888		if v_0.Op != OpPPC64MOVDconst {
10889			break
10890		}
10891		c := v_0.AuxInt
10892		ptr := v.Args[1]
10893		val := v.Args[2]
10894		if !(is16Bit(c)) {
10895			break
10896		}
10897		v.reset(OpPPC64MOVHstore)
10898		v.AuxInt = c
10899		v.AddArg(ptr)
10900		v.AddArg(val)
10901		v.AddArg(mem)
10902		return true
10903	}
10904	// match: (MOVHstoreidx [off] {sym} ptr idx (MOVHreg x) mem)
10905	// result: (MOVHstoreidx [off] {sym} ptr idx x mem)
10906	for {
10907		off := v.AuxInt
10908		sym := v.Aux
10909		mem := v.Args[3]
10910		ptr := v.Args[0]
10911		idx := v.Args[1]
10912		v_2 := v.Args[2]
10913		if v_2.Op != OpPPC64MOVHreg {
10914			break
10915		}
10916		x := v_2.Args[0]
10917		v.reset(OpPPC64MOVHstoreidx)
10918		v.AuxInt = off
10919		v.Aux = sym
10920		v.AddArg(ptr)
10921		v.AddArg(idx)
10922		v.AddArg(x)
10923		v.AddArg(mem)
10924		return true
10925	}
10926	// match: (MOVHstoreidx [off] {sym} ptr idx (MOVHZreg x) mem)
10927	// result: (MOVHstoreidx [off] {sym} ptr idx x mem)
10928	for {
10929		off := v.AuxInt
10930		sym := v.Aux
10931		mem := v.Args[3]
10932		ptr := v.Args[0]
10933		idx := v.Args[1]
10934		v_2 := v.Args[2]
10935		if v_2.Op != OpPPC64MOVHZreg {
10936			break
10937		}
10938		x := v_2.Args[0]
10939		v.reset(OpPPC64MOVHstoreidx)
10940		v.AuxInt = off
10941		v.Aux = sym
10942		v.AddArg(ptr)
10943		v.AddArg(idx)
10944		v.AddArg(x)
10945		v.AddArg(mem)
10946		return true
10947	}
10948	// match: (MOVHstoreidx [off] {sym} ptr idx (MOVWreg x) mem)
10949	// result: (MOVHstoreidx [off] {sym} ptr idx x mem)
10950	for {
10951		off := v.AuxInt
10952		sym := v.Aux
10953		mem := v.Args[3]
10954		ptr := v.Args[0]
10955		idx := v.Args[1]
10956		v_2 := v.Args[2]
10957		if v_2.Op != OpPPC64MOVWreg {
10958			break
10959		}
10960		x := v_2.Args[0]
10961		v.reset(OpPPC64MOVHstoreidx)
10962		v.AuxInt = off
10963		v.Aux = sym
10964		v.AddArg(ptr)
10965		v.AddArg(idx)
10966		v.AddArg(x)
10967		v.AddArg(mem)
10968		return true
10969	}
10970	// match: (MOVHstoreidx [off] {sym} ptr idx (MOVWZreg x) mem)
10971	// result: (MOVHstoreidx [off] {sym} ptr idx x mem)
10972	for {
10973		off := v.AuxInt
10974		sym := v.Aux
10975		mem := v.Args[3]
10976		ptr := v.Args[0]
10977		idx := v.Args[1]
10978		v_2 := v.Args[2]
10979		if v_2.Op != OpPPC64MOVWZreg {
10980			break
10981		}
10982		x := v_2.Args[0]
10983		v.reset(OpPPC64MOVHstoreidx)
10984		v.AuxInt = off
10985		v.Aux = sym
10986		v.AddArg(ptr)
10987		v.AddArg(idx)
10988		v.AddArg(x)
10989		v.AddArg(mem)
10990		return true
10991	}
10992	return false
10993}
10994func rewriteValuePPC64_OpPPC64MOVHstorezero_0(v *Value) bool {
10995	// match: (MOVHstorezero [off1] {sym} (ADDconst [off2] x) mem)
10996	// cond: is16Bit(off1+off2)
10997	// result: (MOVHstorezero [off1+off2] {sym} x mem)
10998	for {
10999		off1 := v.AuxInt
11000		sym := v.Aux
11001		mem := v.Args[1]
11002		v_0 := v.Args[0]
11003		if v_0.Op != OpPPC64ADDconst {
11004			break
11005		}
11006		off2 := v_0.AuxInt
11007		x := v_0.Args[0]
11008		if !(is16Bit(off1 + off2)) {
11009			break
11010		}
11011		v.reset(OpPPC64MOVHstorezero)
11012		v.AuxInt = off1 + off2
11013		v.Aux = sym
11014		v.AddArg(x)
11015		v.AddArg(mem)
11016		return true
11017	}
11018	// match: (MOVHstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem)
11019	// cond: canMergeSym(sym1,sym2) && (x.Op != OpSB || p.Uses == 1)
11020	// result: (MOVHstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
11021	for {
11022		off1 := v.AuxInt
11023		sym1 := v.Aux
11024		mem := v.Args[1]
11025		p := v.Args[0]
11026		if p.Op != OpPPC64MOVDaddr {
11027			break
11028		}
11029		off2 := p.AuxInt
11030		sym2 := p.Aux
11031		x := p.Args[0]
11032		if !(canMergeSym(sym1, sym2) && (x.Op != OpSB || p.Uses == 1)) {
11033			break
11034		}
11035		v.reset(OpPPC64MOVHstorezero)
11036		v.AuxInt = off1 + off2
11037		v.Aux = mergeSym(sym1, sym2)
11038		v.AddArg(x)
11039		v.AddArg(mem)
11040		return true
11041	}
11042	return false
11043}
11044func rewriteValuePPC64_OpPPC64MOVWBRstore_0(v *Value) bool {
11045	// match: (MOVWBRstore {sym} ptr (MOVWreg x) mem)
11046	// result: (MOVWBRstore {sym} ptr x mem)
11047	for {
11048		sym := v.Aux
11049		mem := v.Args[2]
11050		ptr := v.Args[0]
11051		v_1 := v.Args[1]
11052		if v_1.Op != OpPPC64MOVWreg {
11053			break
11054		}
11055		x := v_1.Args[0]
11056		v.reset(OpPPC64MOVWBRstore)
11057		v.Aux = sym
11058		v.AddArg(ptr)
11059		v.AddArg(x)
11060		v.AddArg(mem)
11061		return true
11062	}
11063	// match: (MOVWBRstore {sym} ptr (MOVWZreg x) mem)
11064	// result: (MOVWBRstore {sym} ptr x mem)
11065	for {
11066		sym := v.Aux
11067		mem := v.Args[2]
11068		ptr := v.Args[0]
11069		v_1 := v.Args[1]
11070		if v_1.Op != OpPPC64MOVWZreg {
11071			break
11072		}
11073		x := v_1.Args[0]
11074		v.reset(OpPPC64MOVWBRstore)
11075		v.Aux = sym
11076		v.AddArg(ptr)
11077		v.AddArg(x)
11078		v.AddArg(mem)
11079		return true
11080	}
11081	return false
11082}
11083func rewriteValuePPC64_OpPPC64MOVWZload_0(v *Value) bool {
11084	// match: (MOVWZload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
11085	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
11086	// result: (MOVWZload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
11087	for {
11088		off1 := v.AuxInt
11089		sym1 := v.Aux
11090		mem := v.Args[1]
11091		p := v.Args[0]
11092		if p.Op != OpPPC64MOVDaddr {
11093			break
11094		}
11095		off2 := p.AuxInt
11096		sym2 := p.Aux
11097		ptr := p.Args[0]
11098		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
11099			break
11100		}
11101		v.reset(OpPPC64MOVWZload)
11102		v.AuxInt = off1 + off2
11103		v.Aux = mergeSym(sym1, sym2)
11104		v.AddArg(ptr)
11105		v.AddArg(mem)
11106		return true
11107	}
11108	// match: (MOVWZload [off1] {sym} (ADDconst [off2] x) mem)
11109	// cond: is16Bit(off1+off2)
11110	// result: (MOVWZload [off1+off2] {sym} x mem)
11111	for {
11112		off1 := v.AuxInt
11113		sym := v.Aux
11114		mem := v.Args[1]
11115		v_0 := v.Args[0]
11116		if v_0.Op != OpPPC64ADDconst {
11117			break
11118		}
11119		off2 := v_0.AuxInt
11120		x := v_0.Args[0]
11121		if !(is16Bit(off1 + off2)) {
11122			break
11123		}
11124		v.reset(OpPPC64MOVWZload)
11125		v.AuxInt = off1 + off2
11126		v.Aux = sym
11127		v.AddArg(x)
11128		v.AddArg(mem)
11129		return true
11130	}
11131	// match: (MOVWZload [0] {sym} p:(ADD ptr idx) mem)
11132	// cond: sym == nil && p.Uses == 1
11133	// result: (MOVWZloadidx ptr idx mem)
11134	for {
11135		if v.AuxInt != 0 {
11136			break
11137		}
11138		sym := v.Aux
11139		mem := v.Args[1]
11140		p := v.Args[0]
11141		if p.Op != OpPPC64ADD {
11142			break
11143		}
11144		idx := p.Args[1]
11145		ptr := p.Args[0]
11146		if !(sym == nil && p.Uses == 1) {
11147			break
11148		}
11149		v.reset(OpPPC64MOVWZloadidx)
11150		v.AddArg(ptr)
11151		v.AddArg(idx)
11152		v.AddArg(mem)
11153		return true
11154	}
11155	return false
11156}
11157func rewriteValuePPC64_OpPPC64MOVWZloadidx_0(v *Value) bool {
11158	// match: (MOVWZloadidx ptr (MOVDconst [c]) mem)
11159	// cond: is16Bit(c)
11160	// result: (MOVWZload [c] ptr mem)
11161	for {
11162		mem := v.Args[2]
11163		ptr := v.Args[0]
11164		v_1 := v.Args[1]
11165		if v_1.Op != OpPPC64MOVDconst {
11166			break
11167		}
11168		c := v_1.AuxInt
11169		if !(is16Bit(c)) {
11170			break
11171		}
11172		v.reset(OpPPC64MOVWZload)
11173		v.AuxInt = c
11174		v.AddArg(ptr)
11175		v.AddArg(mem)
11176		return true
11177	}
11178	// match: (MOVWZloadidx (MOVDconst [c]) ptr mem)
11179	// cond: is16Bit(c)
11180	// result: (MOVWZload [c] ptr mem)
11181	for {
11182		mem := v.Args[2]
11183		v_0 := v.Args[0]
11184		if v_0.Op != OpPPC64MOVDconst {
11185			break
11186		}
11187		c := v_0.AuxInt
11188		ptr := v.Args[1]
11189		if !(is16Bit(c)) {
11190			break
11191		}
11192		v.reset(OpPPC64MOVWZload)
11193		v.AuxInt = c
11194		v.AddArg(ptr)
11195		v.AddArg(mem)
11196		return true
11197	}
11198	return false
11199}
11200func rewriteValuePPC64_OpPPC64MOVWZreg_0(v *Value) bool {
11201	b := v.Block
11202	typ := &b.Func.Config.Types
11203	// match: (MOVWZreg y:(ANDconst [c] _))
11204	// cond: uint64(c) <= 0xFFFFFFFF
11205	// result: y
11206	for {
11207		y := v.Args[0]
11208		if y.Op != OpPPC64ANDconst {
11209			break
11210		}
11211		c := y.AuxInt
11212		if !(uint64(c) <= 0xFFFFFFFF) {
11213			break
11214		}
11215		v.reset(OpCopy)
11216		v.Type = y.Type
11217		v.AddArg(y)
11218		return true
11219	}
11220	// match: (MOVWZreg y:(AND (MOVDconst [c]) _))
11221	// cond: uint64(c) <= 0xFFFFFFFF
11222	// result: y
11223	for {
11224		y := v.Args[0]
11225		if y.Op != OpPPC64AND {
11226			break
11227		}
11228		_ = y.Args[1]
11229		y_0 := y.Args[0]
11230		if y_0.Op != OpPPC64MOVDconst {
11231			break
11232		}
11233		c := y_0.AuxInt
11234		if !(uint64(c) <= 0xFFFFFFFF) {
11235			break
11236		}
11237		v.reset(OpCopy)
11238		v.Type = y.Type
11239		v.AddArg(y)
11240		return true
11241	}
11242	// match: (MOVWZreg y:(AND _ (MOVDconst [c])))
11243	// cond: uint64(c) <= 0xFFFFFFFF
11244	// result: y
11245	for {
11246		y := v.Args[0]
11247		if y.Op != OpPPC64AND {
11248			break
11249		}
11250		_ = y.Args[1]
11251		y_1 := y.Args[1]
11252		if y_1.Op != OpPPC64MOVDconst {
11253			break
11254		}
11255		c := y_1.AuxInt
11256		if !(uint64(c) <= 0xFFFFFFFF) {
11257			break
11258		}
11259		v.reset(OpCopy)
11260		v.Type = y.Type
11261		v.AddArg(y)
11262		return true
11263	}
11264	// match: (MOVWZreg (SRWconst [c] (MOVBZreg x)))
11265	// result: (SRWconst [c] (MOVBZreg x))
11266	for {
11267		v_0 := v.Args[0]
11268		if v_0.Op != OpPPC64SRWconst {
11269			break
11270		}
11271		c := v_0.AuxInt
11272		v_0_0 := v_0.Args[0]
11273		if v_0_0.Op != OpPPC64MOVBZreg {
11274			break
11275		}
11276		x := v_0_0.Args[0]
11277		v.reset(OpPPC64SRWconst)
11278		v.AuxInt = c
11279		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
11280		v0.AddArg(x)
11281		v.AddArg(v0)
11282		return true
11283	}
11284	// match: (MOVWZreg (SRWconst [c] (MOVHZreg x)))
11285	// result: (SRWconst [c] (MOVHZreg x))
11286	for {
11287		v_0 := v.Args[0]
11288		if v_0.Op != OpPPC64SRWconst {
11289			break
11290		}
11291		c := v_0.AuxInt
11292		v_0_0 := v_0.Args[0]
11293		if v_0_0.Op != OpPPC64MOVHZreg {
11294			break
11295		}
11296		x := v_0_0.Args[0]
11297		v.reset(OpPPC64SRWconst)
11298		v.AuxInt = c
11299		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
11300		v0.AddArg(x)
11301		v.AddArg(v0)
11302		return true
11303	}
11304	// match: (MOVWZreg (SRWconst [c] (MOVWZreg x)))
11305	// result: (SRWconst [c] (MOVWZreg x))
11306	for {
11307		v_0 := v.Args[0]
11308		if v_0.Op != OpPPC64SRWconst {
11309			break
11310		}
11311		c := v_0.AuxInt
11312		v_0_0 := v_0.Args[0]
11313		if v_0_0.Op != OpPPC64MOVWZreg {
11314			break
11315		}
11316		x := v_0_0.Args[0]
11317		v.reset(OpPPC64SRWconst)
11318		v.AuxInt = c
11319		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZreg, typ.Int64)
11320		v0.AddArg(x)
11321		v.AddArg(v0)
11322		return true
11323	}
11324	// match: (MOVWZreg (SRWconst [c] x))
11325	// cond: sizeof(x.Type) <= 32
11326	// result: (SRWconst [c] x)
11327	for {
11328		v_0 := v.Args[0]
11329		if v_0.Op != OpPPC64SRWconst {
11330			break
11331		}
11332		c := v_0.AuxInt
11333		x := v_0.Args[0]
11334		if !(sizeof(x.Type) <= 32) {
11335			break
11336		}
11337		v.reset(OpPPC64SRWconst)
11338		v.AuxInt = c
11339		v.AddArg(x)
11340		return true
11341	}
11342	// match: (MOVWZreg (SRDconst [c] x))
11343	// cond: c>=32
11344	// result: (SRDconst [c] x)
11345	for {
11346		v_0 := v.Args[0]
11347		if v_0.Op != OpPPC64SRDconst {
11348			break
11349		}
11350		c := v_0.AuxInt
11351		x := v_0.Args[0]
11352		if !(c >= 32) {
11353			break
11354		}
11355		v.reset(OpPPC64SRDconst)
11356		v.AuxInt = c
11357		v.AddArg(x)
11358		return true
11359	}
11360	// match: (MOVWZreg y:(MOVWZreg _))
11361	// result: y
11362	for {
11363		y := v.Args[0]
11364		if y.Op != OpPPC64MOVWZreg {
11365			break
11366		}
11367		v.reset(OpCopy)
11368		v.Type = y.Type
11369		v.AddArg(y)
11370		return true
11371	}
11372	// match: (MOVWZreg y:(MOVHZreg _))
11373	// result: y
11374	for {
11375		y := v.Args[0]
11376		if y.Op != OpPPC64MOVHZreg {
11377			break
11378		}
11379		v.reset(OpCopy)
11380		v.Type = y.Type
11381		v.AddArg(y)
11382		return true
11383	}
11384	return false
11385}
11386func rewriteValuePPC64_OpPPC64MOVWZreg_10(v *Value) bool {
11387	// match: (MOVWZreg y:(MOVBZreg _))
11388	// result: y
11389	for {
11390		y := v.Args[0]
11391		if y.Op != OpPPC64MOVBZreg {
11392			break
11393		}
11394		v.reset(OpCopy)
11395		v.Type = y.Type
11396		v.AddArg(y)
11397		return true
11398	}
11399	// match: (MOVWZreg y:(MOVHBRload _ _))
11400	// result: y
11401	for {
11402		y := v.Args[0]
11403		if y.Op != OpPPC64MOVHBRload {
11404			break
11405		}
11406		_ = y.Args[1]
11407		v.reset(OpCopy)
11408		v.Type = y.Type
11409		v.AddArg(y)
11410		return true
11411	}
11412	// match: (MOVWZreg y:(MOVWBRload _ _))
11413	// result: y
11414	for {
11415		y := v.Args[0]
11416		if y.Op != OpPPC64MOVWBRload {
11417			break
11418		}
11419		_ = y.Args[1]
11420		v.reset(OpCopy)
11421		v.Type = y.Type
11422		v.AddArg(y)
11423		return true
11424	}
11425	// match: (MOVWZreg y:(MOVWreg x))
11426	// result: (MOVWZreg x)
11427	for {
11428		y := v.Args[0]
11429		if y.Op != OpPPC64MOVWreg {
11430			break
11431		}
11432		x := y.Args[0]
11433		v.reset(OpPPC64MOVWZreg)
11434		v.AddArg(x)
11435		return true
11436	}
11437	// match: (MOVWZreg x:(MOVBZload _ _))
11438	// result: x
11439	for {
11440		x := v.Args[0]
11441		if x.Op != OpPPC64MOVBZload {
11442			break
11443		}
11444		_ = x.Args[1]
11445		v.reset(OpCopy)
11446		v.Type = x.Type
11447		v.AddArg(x)
11448		return true
11449	}
11450	// match: (MOVWZreg x:(MOVBZloadidx _ _ _))
11451	// result: x
11452	for {
11453		x := v.Args[0]
11454		if x.Op != OpPPC64MOVBZloadidx {
11455			break
11456		}
11457		_ = x.Args[2]
11458		v.reset(OpCopy)
11459		v.Type = x.Type
11460		v.AddArg(x)
11461		return true
11462	}
11463	// match: (MOVWZreg x:(MOVHZload _ _))
11464	// result: x
11465	for {
11466		x := v.Args[0]
11467		if x.Op != OpPPC64MOVHZload {
11468			break
11469		}
11470		_ = x.Args[1]
11471		v.reset(OpCopy)
11472		v.Type = x.Type
11473		v.AddArg(x)
11474		return true
11475	}
11476	// match: (MOVWZreg x:(MOVHZloadidx _ _ _))
11477	// result: x
11478	for {
11479		x := v.Args[0]
11480		if x.Op != OpPPC64MOVHZloadidx {
11481			break
11482		}
11483		_ = x.Args[2]
11484		v.reset(OpCopy)
11485		v.Type = x.Type
11486		v.AddArg(x)
11487		return true
11488	}
11489	// match: (MOVWZreg x:(MOVWZload _ _))
11490	// result: x
11491	for {
11492		x := v.Args[0]
11493		if x.Op != OpPPC64MOVWZload {
11494			break
11495		}
11496		_ = x.Args[1]
11497		v.reset(OpCopy)
11498		v.Type = x.Type
11499		v.AddArg(x)
11500		return true
11501	}
11502	// match: (MOVWZreg x:(MOVWZloadidx _ _ _))
11503	// result: x
11504	for {
11505		x := v.Args[0]
11506		if x.Op != OpPPC64MOVWZloadidx {
11507			break
11508		}
11509		_ = x.Args[2]
11510		v.reset(OpCopy)
11511		v.Type = x.Type
11512		v.AddArg(x)
11513		return true
11514	}
11515	return false
11516}
11517func rewriteValuePPC64_OpPPC64MOVWZreg_20(v *Value) bool {
11518	// match: (MOVWZreg x:(Arg <t>))
11519	// cond: (is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && !isSigned(t)
11520	// result: x
11521	for {
11522		x := v.Args[0]
11523		if x.Op != OpArg {
11524			break
11525		}
11526		t := x.Type
11527		if !((is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && !isSigned(t)) {
11528			break
11529		}
11530		v.reset(OpCopy)
11531		v.Type = x.Type
11532		v.AddArg(x)
11533		return true
11534	}
11535	// match: (MOVWZreg (MOVDconst [c]))
11536	// result: (MOVDconst [int64(uint32(c))])
11537	for {
11538		v_0 := v.Args[0]
11539		if v_0.Op != OpPPC64MOVDconst {
11540			break
11541		}
11542		c := v_0.AuxInt
11543		v.reset(OpPPC64MOVDconst)
11544		v.AuxInt = int64(uint32(c))
11545		return true
11546	}
11547	return false
11548}
11549func rewriteValuePPC64_OpPPC64MOVWload_0(v *Value) bool {
11550	// match: (MOVWload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
11551	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1) && (off1+off2)%4 == 0
11552	// result: (MOVWload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
11553	for {
11554		off1 := v.AuxInt
11555		sym1 := v.Aux
11556		mem := v.Args[1]
11557		p := v.Args[0]
11558		if p.Op != OpPPC64MOVDaddr {
11559			break
11560		}
11561		off2 := p.AuxInt
11562		sym2 := p.Aux
11563		ptr := p.Args[0]
11564		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1) && (off1+off2)%4 == 0) {
11565			break
11566		}
11567		v.reset(OpPPC64MOVWload)
11568		v.AuxInt = off1 + off2
11569		v.Aux = mergeSym(sym1, sym2)
11570		v.AddArg(ptr)
11571		v.AddArg(mem)
11572		return true
11573	}
11574	// match: (MOVWload [off1] {sym} (ADDconst [off2] x) mem)
11575	// cond: is16Bit(off1+off2) && (off1+off2)%4 == 0
11576	// result: (MOVWload [off1+off2] {sym} x mem)
11577	for {
11578		off1 := v.AuxInt
11579		sym := v.Aux
11580		mem := v.Args[1]
11581		v_0 := v.Args[0]
11582		if v_0.Op != OpPPC64ADDconst {
11583			break
11584		}
11585		off2 := v_0.AuxInt
11586		x := v_0.Args[0]
11587		if !(is16Bit(off1+off2) && (off1+off2)%4 == 0) {
11588			break
11589		}
11590		v.reset(OpPPC64MOVWload)
11591		v.AuxInt = off1 + off2
11592		v.Aux = sym
11593		v.AddArg(x)
11594		v.AddArg(mem)
11595		return true
11596	}
11597	// match: (MOVWload [0] {sym} p:(ADD ptr idx) mem)
11598	// cond: sym == nil && p.Uses == 1
11599	// result: (MOVWloadidx ptr idx mem)
11600	for {
11601		if v.AuxInt != 0 {
11602			break
11603		}
11604		sym := v.Aux
11605		mem := v.Args[1]
11606		p := v.Args[0]
11607		if p.Op != OpPPC64ADD {
11608			break
11609		}
11610		idx := p.Args[1]
11611		ptr := p.Args[0]
11612		if !(sym == nil && p.Uses == 1) {
11613			break
11614		}
11615		v.reset(OpPPC64MOVWloadidx)
11616		v.AddArg(ptr)
11617		v.AddArg(idx)
11618		v.AddArg(mem)
11619		return true
11620	}
11621	return false
11622}
11623func rewriteValuePPC64_OpPPC64MOVWloadidx_0(v *Value) bool {
11624	// match: (MOVWloadidx ptr (MOVDconst [c]) mem)
11625	// cond: is16Bit(c) && c%4 == 0
11626	// result: (MOVWload [c] ptr mem)
11627	for {
11628		mem := v.Args[2]
11629		ptr := v.Args[0]
11630		v_1 := v.Args[1]
11631		if v_1.Op != OpPPC64MOVDconst {
11632			break
11633		}
11634		c := v_1.AuxInt
11635		if !(is16Bit(c) && c%4 == 0) {
11636			break
11637		}
11638		v.reset(OpPPC64MOVWload)
11639		v.AuxInt = c
11640		v.AddArg(ptr)
11641		v.AddArg(mem)
11642		return true
11643	}
11644	// match: (MOVWloadidx (MOVDconst [c]) ptr mem)
11645	// cond: is16Bit(c) && c%4 == 0
11646	// result: (MOVWload [c] ptr mem)
11647	for {
11648		mem := v.Args[2]
11649		v_0 := v.Args[0]
11650		if v_0.Op != OpPPC64MOVDconst {
11651			break
11652		}
11653		c := v_0.AuxInt
11654		ptr := v.Args[1]
11655		if !(is16Bit(c) && c%4 == 0) {
11656			break
11657		}
11658		v.reset(OpPPC64MOVWload)
11659		v.AuxInt = c
11660		v.AddArg(ptr)
11661		v.AddArg(mem)
11662		return true
11663	}
11664	return false
11665}
11666func rewriteValuePPC64_OpPPC64MOVWreg_0(v *Value) bool {
11667	b := v.Block
11668	typ := &b.Func.Config.Types
11669	// match: (MOVWreg y:(ANDconst [c] _))
11670	// cond: uint64(c) <= 0xFFFF
11671	// result: y
11672	for {
11673		y := v.Args[0]
11674		if y.Op != OpPPC64ANDconst {
11675			break
11676		}
11677		c := y.AuxInt
11678		if !(uint64(c) <= 0xFFFF) {
11679			break
11680		}
11681		v.reset(OpCopy)
11682		v.Type = y.Type
11683		v.AddArg(y)
11684		return true
11685	}
11686	// match: (MOVWreg y:(AND (MOVDconst [c]) _))
11687	// cond: uint64(c) <= 0x7FFFFFFF
11688	// result: y
11689	for {
11690		y := v.Args[0]
11691		if y.Op != OpPPC64AND {
11692			break
11693		}
11694		_ = y.Args[1]
11695		y_0 := y.Args[0]
11696		if y_0.Op != OpPPC64MOVDconst {
11697			break
11698		}
11699		c := y_0.AuxInt
11700		if !(uint64(c) <= 0x7FFFFFFF) {
11701			break
11702		}
11703		v.reset(OpCopy)
11704		v.Type = y.Type
11705		v.AddArg(y)
11706		return true
11707	}
11708	// match: (MOVWreg y:(AND _ (MOVDconst [c])))
11709	// cond: uint64(c) <= 0x7FFFFFFF
11710	// result: y
11711	for {
11712		y := v.Args[0]
11713		if y.Op != OpPPC64AND {
11714			break
11715		}
11716		_ = y.Args[1]
11717		y_1 := y.Args[1]
11718		if y_1.Op != OpPPC64MOVDconst {
11719			break
11720		}
11721		c := y_1.AuxInt
11722		if !(uint64(c) <= 0x7FFFFFFF) {
11723			break
11724		}
11725		v.reset(OpCopy)
11726		v.Type = y.Type
11727		v.AddArg(y)
11728		return true
11729	}
11730	// match: (MOVWreg (SRAWconst [c] (MOVBreg x)))
11731	// result: (SRAWconst [c] (MOVBreg x))
11732	for {
11733		v_0 := v.Args[0]
11734		if v_0.Op != OpPPC64SRAWconst {
11735			break
11736		}
11737		c := v_0.AuxInt
11738		v_0_0 := v_0.Args[0]
11739		if v_0_0.Op != OpPPC64MOVBreg {
11740			break
11741		}
11742		x := v_0_0.Args[0]
11743		v.reset(OpPPC64SRAWconst)
11744		v.AuxInt = c
11745		v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
11746		v0.AddArg(x)
11747		v.AddArg(v0)
11748		return true
11749	}
11750	// match: (MOVWreg (SRAWconst [c] (MOVHreg x)))
11751	// result: (SRAWconst [c] (MOVHreg x))
11752	for {
11753		v_0 := v.Args[0]
11754		if v_0.Op != OpPPC64SRAWconst {
11755			break
11756		}
11757		c := v_0.AuxInt
11758		v_0_0 := v_0.Args[0]
11759		if v_0_0.Op != OpPPC64MOVHreg {
11760			break
11761		}
11762		x := v_0_0.Args[0]
11763		v.reset(OpPPC64SRAWconst)
11764		v.AuxInt = c
11765		v0 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
11766		v0.AddArg(x)
11767		v.AddArg(v0)
11768		return true
11769	}
11770	// match: (MOVWreg (SRAWconst [c] (MOVWreg x)))
11771	// result: (SRAWconst [c] (MOVWreg x))
11772	for {
11773		v_0 := v.Args[0]
11774		if v_0.Op != OpPPC64SRAWconst {
11775			break
11776		}
11777		c := v_0.AuxInt
11778		v_0_0 := v_0.Args[0]
11779		if v_0_0.Op != OpPPC64MOVWreg {
11780			break
11781		}
11782		x := v_0_0.Args[0]
11783		v.reset(OpPPC64SRAWconst)
11784		v.AuxInt = c
11785		v0 := b.NewValue0(v.Pos, OpPPC64MOVWreg, typ.Int64)
11786		v0.AddArg(x)
11787		v.AddArg(v0)
11788		return true
11789	}
11790	// match: (MOVWreg (SRAWconst [c] x))
11791	// cond: sizeof(x.Type) <= 32
11792	// result: (SRAWconst [c] x)
11793	for {
11794		v_0 := v.Args[0]
11795		if v_0.Op != OpPPC64SRAWconst {
11796			break
11797		}
11798		c := v_0.AuxInt
11799		x := v_0.Args[0]
11800		if !(sizeof(x.Type) <= 32) {
11801			break
11802		}
11803		v.reset(OpPPC64SRAWconst)
11804		v.AuxInt = c
11805		v.AddArg(x)
11806		return true
11807	}
11808	// match: (MOVWreg (SRDconst [c] x))
11809	// cond: c>32
11810	// result: (SRDconst [c] x)
11811	for {
11812		v_0 := v.Args[0]
11813		if v_0.Op != OpPPC64SRDconst {
11814			break
11815		}
11816		c := v_0.AuxInt
11817		x := v_0.Args[0]
11818		if !(c > 32) {
11819			break
11820		}
11821		v.reset(OpPPC64SRDconst)
11822		v.AuxInt = c
11823		v.AddArg(x)
11824		return true
11825	}
11826	// match: (MOVWreg (SRDconst [c] x))
11827	// cond: c==32
11828	// result: (SRADconst [c] x)
11829	for {
11830		v_0 := v.Args[0]
11831		if v_0.Op != OpPPC64SRDconst {
11832			break
11833		}
11834		c := v_0.AuxInt
11835		x := v_0.Args[0]
11836		if !(c == 32) {
11837			break
11838		}
11839		v.reset(OpPPC64SRADconst)
11840		v.AuxInt = c
11841		v.AddArg(x)
11842		return true
11843	}
11844	// match: (MOVWreg y:(MOVWreg _))
11845	// result: y
11846	for {
11847		y := v.Args[0]
11848		if y.Op != OpPPC64MOVWreg {
11849			break
11850		}
11851		v.reset(OpCopy)
11852		v.Type = y.Type
11853		v.AddArg(y)
11854		return true
11855	}
11856	return false
11857}
11858func rewriteValuePPC64_OpPPC64MOVWreg_10(v *Value) bool {
11859	// match: (MOVWreg y:(MOVHreg _))
11860	// result: y
11861	for {
11862		y := v.Args[0]
11863		if y.Op != OpPPC64MOVHreg {
11864			break
11865		}
11866		v.reset(OpCopy)
11867		v.Type = y.Type
11868		v.AddArg(y)
11869		return true
11870	}
11871	// match: (MOVWreg y:(MOVBreg _))
11872	// result: y
11873	for {
11874		y := v.Args[0]
11875		if y.Op != OpPPC64MOVBreg {
11876			break
11877		}
11878		v.reset(OpCopy)
11879		v.Type = y.Type
11880		v.AddArg(y)
11881		return true
11882	}
11883	// match: (MOVWreg y:(MOVWZreg x))
11884	// result: (MOVWreg x)
11885	for {
11886		y := v.Args[0]
11887		if y.Op != OpPPC64MOVWZreg {
11888			break
11889		}
11890		x := y.Args[0]
11891		v.reset(OpPPC64MOVWreg)
11892		v.AddArg(x)
11893		return true
11894	}
11895	// match: (MOVWreg x:(MOVHload _ _))
11896	// result: x
11897	for {
11898		x := v.Args[0]
11899		if x.Op != OpPPC64MOVHload {
11900			break
11901		}
11902		_ = x.Args[1]
11903		v.reset(OpCopy)
11904		v.Type = x.Type
11905		v.AddArg(x)
11906		return true
11907	}
11908	// match: (MOVWreg x:(MOVHloadidx _ _ _))
11909	// result: x
11910	for {
11911		x := v.Args[0]
11912		if x.Op != OpPPC64MOVHloadidx {
11913			break
11914		}
11915		_ = x.Args[2]
11916		v.reset(OpCopy)
11917		v.Type = x.Type
11918		v.AddArg(x)
11919		return true
11920	}
11921	// match: (MOVWreg x:(MOVWload _ _))
11922	// result: x
11923	for {
11924		x := v.Args[0]
11925		if x.Op != OpPPC64MOVWload {
11926			break
11927		}
11928		_ = x.Args[1]
11929		v.reset(OpCopy)
11930		v.Type = x.Type
11931		v.AddArg(x)
11932		return true
11933	}
11934	// match: (MOVWreg x:(MOVWloadidx _ _ _))
11935	// result: x
11936	for {
11937		x := v.Args[0]
11938		if x.Op != OpPPC64MOVWloadidx {
11939			break
11940		}
11941		_ = x.Args[2]
11942		v.reset(OpCopy)
11943		v.Type = x.Type
11944		v.AddArg(x)
11945		return true
11946	}
11947	// match: (MOVWreg x:(Arg <t>))
11948	// cond: (is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && isSigned(t)
11949	// result: x
11950	for {
11951		x := v.Args[0]
11952		if x.Op != OpArg {
11953			break
11954		}
11955		t := x.Type
11956		if !((is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && isSigned(t)) {
11957			break
11958		}
11959		v.reset(OpCopy)
11960		v.Type = x.Type
11961		v.AddArg(x)
11962		return true
11963	}
11964	// match: (MOVWreg (MOVDconst [c]))
11965	// result: (MOVDconst [int64(int32(c))])
11966	for {
11967		v_0 := v.Args[0]
11968		if v_0.Op != OpPPC64MOVDconst {
11969			break
11970		}
11971		c := v_0.AuxInt
11972		v.reset(OpPPC64MOVDconst)
11973		v.AuxInt = int64(int32(c))
11974		return true
11975	}
11976	return false
11977}
11978func rewriteValuePPC64_OpPPC64MOVWstore_0(v *Value) bool {
11979	// match: (MOVWstore [off1] {sym} (ADDconst [off2] x) val mem)
11980	// cond: is16Bit(off1+off2)
11981	// result: (MOVWstore [off1+off2] {sym} x val mem)
11982	for {
11983		off1 := v.AuxInt
11984		sym := v.Aux
11985		mem := v.Args[2]
11986		v_0 := v.Args[0]
11987		if v_0.Op != OpPPC64ADDconst {
11988			break
11989		}
11990		off2 := v_0.AuxInt
11991		x := v_0.Args[0]
11992		val := v.Args[1]
11993		if !(is16Bit(off1 + off2)) {
11994			break
11995		}
11996		v.reset(OpPPC64MOVWstore)
11997		v.AuxInt = off1 + off2
11998		v.Aux = sym
11999		v.AddArg(x)
12000		v.AddArg(val)
12001		v.AddArg(mem)
12002		return true
12003	}
12004	// match: (MOVWstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
12005	// cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
12006	// result: (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
12007	for {
12008		off1 := v.AuxInt
12009		sym1 := v.Aux
12010		mem := v.Args[2]
12011		p := v.Args[0]
12012		if p.Op != OpPPC64MOVDaddr {
12013			break
12014		}
12015		off2 := p.AuxInt
12016		sym2 := p.Aux
12017		ptr := p.Args[0]
12018		val := v.Args[1]
12019		if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
12020			break
12021		}
12022		v.reset(OpPPC64MOVWstore)
12023		v.AuxInt = off1 + off2
12024		v.Aux = mergeSym(sym1, sym2)
12025		v.AddArg(ptr)
12026		v.AddArg(val)
12027		v.AddArg(mem)
12028		return true
12029	}
12030	// match: (MOVWstore [off] {sym} ptr (MOVDconst [0]) mem)
12031	// result: (MOVWstorezero [off] {sym} ptr mem)
12032	for {
12033		off := v.AuxInt
12034		sym := v.Aux
12035		mem := v.Args[2]
12036		ptr := v.Args[0]
12037		v_1 := v.Args[1]
12038		if v_1.Op != OpPPC64MOVDconst || v_1.AuxInt != 0 {
12039			break
12040		}
12041		v.reset(OpPPC64MOVWstorezero)
12042		v.AuxInt = off
12043		v.Aux = sym
12044		v.AddArg(ptr)
12045		v.AddArg(mem)
12046		return true
12047	}
12048	// match: (MOVWstore [off] {sym} p:(ADD ptr idx) val mem)
12049	// cond: off == 0 && sym == nil && p.Uses == 1
12050	// result: (MOVWstoreidx ptr idx val mem)
12051	for {
12052		off := v.AuxInt
12053		sym := v.Aux
12054		mem := v.Args[2]
12055		p := v.Args[0]
12056		if p.Op != OpPPC64ADD {
12057			break
12058		}
12059		idx := p.Args[1]
12060		ptr := p.Args[0]
12061		val := v.Args[1]
12062		if !(off == 0 && sym == nil && p.Uses == 1) {
12063			break
12064		}
12065		v.reset(OpPPC64MOVWstoreidx)
12066		v.AddArg(ptr)
12067		v.AddArg(idx)
12068		v.AddArg(val)
12069		v.AddArg(mem)
12070		return true
12071	}
12072	// match: (MOVWstore [off] {sym} ptr (MOVWreg x) mem)
12073	// result: (MOVWstore [off] {sym} ptr x mem)
12074	for {
12075		off := v.AuxInt
12076		sym := v.Aux
12077		mem := v.Args[2]
12078		ptr := v.Args[0]
12079		v_1 := v.Args[1]
12080		if v_1.Op != OpPPC64MOVWreg {
12081			break
12082		}
12083		x := v_1.Args[0]
12084		v.reset(OpPPC64MOVWstore)
12085		v.AuxInt = off
12086		v.Aux = sym
12087		v.AddArg(ptr)
12088		v.AddArg(x)
12089		v.AddArg(mem)
12090		return true
12091	}
12092	// match: (MOVWstore [off] {sym} ptr (MOVWZreg x) mem)
12093	// result: (MOVWstore [off] {sym} ptr x mem)
12094	for {
12095		off := v.AuxInt
12096		sym := v.Aux
12097		mem := v.Args[2]
12098		ptr := v.Args[0]
12099		v_1 := v.Args[1]
12100		if v_1.Op != OpPPC64MOVWZreg {
12101			break
12102		}
12103		x := v_1.Args[0]
12104		v.reset(OpPPC64MOVWstore)
12105		v.AuxInt = off
12106		v.Aux = sym
12107		v.AddArg(ptr)
12108		v.AddArg(x)
12109		v.AddArg(mem)
12110		return true
12111	}
12112	return false
12113}
12114func rewriteValuePPC64_OpPPC64MOVWstoreidx_0(v *Value) bool {
12115	// match: (MOVWstoreidx ptr (MOVDconst [c]) val mem)
12116	// cond: is16Bit(c)
12117	// result: (MOVWstore [c] ptr val mem)
12118	for {
12119		mem := v.Args[3]
12120		ptr := v.Args[0]
12121		v_1 := v.Args[1]
12122		if v_1.Op != OpPPC64MOVDconst {
12123			break
12124		}
12125		c := v_1.AuxInt
12126		val := v.Args[2]
12127		if !(is16Bit(c)) {
12128			break
12129		}
12130		v.reset(OpPPC64MOVWstore)
12131		v.AuxInt = c
12132		v.AddArg(ptr)
12133		v.AddArg(val)
12134		v.AddArg(mem)
12135		return true
12136	}
12137	// match: (MOVWstoreidx (MOVDconst [c]) ptr val mem)
12138	// cond: is16Bit(c)
12139	// result: (MOVWstore [c] ptr val mem)
12140	for {
12141		mem := v.Args[3]
12142		v_0 := v.Args[0]
12143		if v_0.Op != OpPPC64MOVDconst {
12144			break
12145		}
12146		c := v_0.AuxInt
12147		ptr := v.Args[1]
12148		val := v.Args[2]
12149		if !(is16Bit(c)) {
12150			break
12151		}
12152		v.reset(OpPPC64MOVWstore)
12153		v.AuxInt = c
12154		v.AddArg(ptr)
12155		v.AddArg(val)
12156		v.AddArg(mem)
12157		return true
12158	}
12159	// match: (MOVWstoreidx [off] {sym} ptr idx (MOVWreg x) mem)
12160	// result: (MOVWstoreidx [off] {sym} ptr idx x mem)
12161	for {
12162		off := v.AuxInt
12163		sym := v.Aux
12164		mem := v.Args[3]
12165		ptr := v.Args[0]
12166		idx := v.Args[1]
12167		v_2 := v.Args[2]
12168		if v_2.Op != OpPPC64MOVWreg {
12169			break
12170		}
12171		x := v_2.Args[0]
12172		v.reset(OpPPC64MOVWstoreidx)
12173		v.AuxInt = off
12174		v.Aux = sym
12175		v.AddArg(ptr)
12176		v.AddArg(idx)
12177		v.AddArg(x)
12178		v.AddArg(mem)
12179		return true
12180	}
12181	// match: (MOVWstoreidx [off] {sym} ptr idx (MOVWZreg x) mem)
12182	// result: (MOVWstoreidx [off] {sym} ptr idx x mem)
12183	for {
12184		off := v.AuxInt
12185		sym := v.Aux
12186		mem := v.Args[3]
12187		ptr := v.Args[0]
12188		idx := v.Args[1]
12189		v_2 := v.Args[2]
12190		if v_2.Op != OpPPC64MOVWZreg {
12191			break
12192		}
12193		x := v_2.Args[0]
12194		v.reset(OpPPC64MOVWstoreidx)
12195		v.AuxInt = off
12196		v.Aux = sym
12197		v.AddArg(ptr)
12198		v.AddArg(idx)
12199		v.AddArg(x)
12200		v.AddArg(mem)
12201		return true
12202	}
12203	return false
12204}
12205func rewriteValuePPC64_OpPPC64MOVWstorezero_0(v *Value) bool {
12206	// match: (MOVWstorezero [off1] {sym} (ADDconst [off2] x) mem)
12207	// cond: is16Bit(off1+off2)
12208	// result: (MOVWstorezero [off1+off2] {sym} x mem)
12209	for {
12210		off1 := v.AuxInt
12211		sym := v.Aux
12212		mem := v.Args[1]
12213		v_0 := v.Args[0]
12214		if v_0.Op != OpPPC64ADDconst {
12215			break
12216		}
12217		off2 := v_0.AuxInt
12218		x := v_0.Args[0]
12219		if !(is16Bit(off1 + off2)) {
12220			break
12221		}
12222		v.reset(OpPPC64MOVWstorezero)
12223		v.AuxInt = off1 + off2
12224		v.Aux = sym
12225		v.AddArg(x)
12226		v.AddArg(mem)
12227		return true
12228	}
12229	// match: (MOVWstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem)
12230	// cond: canMergeSym(sym1,sym2) && (x.Op != OpSB || p.Uses == 1)
12231	// result: (MOVWstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
12232	for {
12233		off1 := v.AuxInt
12234		sym1 := v.Aux
12235		mem := v.Args[1]
12236		p := v.Args[0]
12237		if p.Op != OpPPC64MOVDaddr {
12238			break
12239		}
12240		off2 := p.AuxInt
12241		sym2 := p.Aux
12242		x := p.Args[0]
12243		if !(canMergeSym(sym1, sym2) && (x.Op != OpSB || p.Uses == 1)) {
12244			break
12245		}
12246		v.reset(OpPPC64MOVWstorezero)
12247		v.AuxInt = off1 + off2
12248		v.Aux = mergeSym(sym1, sym2)
12249		v.AddArg(x)
12250		v.AddArg(mem)
12251		return true
12252	}
12253	return false
12254}
12255func rewriteValuePPC64_OpPPC64MTVSRD_0(v *Value) bool {
12256	b := v.Block
12257	typ := &b.Func.Config.Types
12258	// match: (MTVSRD (MOVDconst [c]))
12259	// result: (FMOVDconst [c])
12260	for {
12261		v_0 := v.Args[0]
12262		if v_0.Op != OpPPC64MOVDconst {
12263			break
12264		}
12265		c := v_0.AuxInt
12266		v.reset(OpPPC64FMOVDconst)
12267		v.AuxInt = c
12268		return true
12269	}
12270	// match: (MTVSRD x:(MOVDload [off] {sym} ptr mem))
12271	// cond: x.Uses == 1 && clobber(x)
12272	// result: @x.Block (FMOVDload [off] {sym} ptr mem)
12273	for {
12274		x := v.Args[0]
12275		if x.Op != OpPPC64MOVDload {
12276			break
12277		}
12278		off := x.AuxInt
12279		sym := x.Aux
12280		mem := x.Args[1]
12281		ptr := x.Args[0]
12282		if !(x.Uses == 1 && clobber(x)) {
12283			break
12284		}
12285		b = x.Block
12286		v0 := b.NewValue0(x.Pos, OpPPC64FMOVDload, typ.Float64)
12287		v.reset(OpCopy)
12288		v.AddArg(v0)
12289		v0.AuxInt = off
12290		v0.Aux = sym
12291		v0.AddArg(ptr)
12292		v0.AddArg(mem)
12293		return true
12294	}
12295	return false
12296}
12297func rewriteValuePPC64_OpPPC64MaskIfNotCarry_0(v *Value) bool {
12298	// match: (MaskIfNotCarry (ADDconstForCarry [c] (ANDconst [d] _)))
12299	// cond: c < 0 && d > 0 && c + d < 0
12300	// result: (MOVDconst [-1])
12301	for {
12302		v_0 := v.Args[0]
12303		if v_0.Op != OpPPC64ADDconstForCarry {
12304			break
12305		}
12306		c := v_0.AuxInt
12307		v_0_0 := v_0.Args[0]
12308		if v_0_0.Op != OpPPC64ANDconst {
12309			break
12310		}
12311		d := v_0_0.AuxInt
12312		if !(c < 0 && d > 0 && c+d < 0) {
12313			break
12314		}
12315		v.reset(OpPPC64MOVDconst)
12316		v.AuxInt = -1
12317		return true
12318	}
12319	return false
12320}
12321func rewriteValuePPC64_OpPPC64NotEqual_0(v *Value) bool {
12322	b := v.Block
12323	typ := &b.Func.Config.Types
12324	// match: (NotEqual (FlagEQ))
12325	// result: (MOVDconst [0])
12326	for {
12327		v_0 := v.Args[0]
12328		if v_0.Op != OpPPC64FlagEQ {
12329			break
12330		}
12331		v.reset(OpPPC64MOVDconst)
12332		v.AuxInt = 0
12333		return true
12334	}
12335	// match: (NotEqual (FlagLT))
12336	// result: (MOVDconst [1])
12337	for {
12338		v_0 := v.Args[0]
12339		if v_0.Op != OpPPC64FlagLT {
12340			break
12341		}
12342		v.reset(OpPPC64MOVDconst)
12343		v.AuxInt = 1
12344		return true
12345	}
12346	// match: (NotEqual (FlagGT))
12347	// result: (MOVDconst [1])
12348	for {
12349		v_0 := v.Args[0]
12350		if v_0.Op != OpPPC64FlagGT {
12351			break
12352		}
12353		v.reset(OpPPC64MOVDconst)
12354		v.AuxInt = 1
12355		return true
12356	}
12357	// match: (NotEqual (InvertFlags x))
12358	// result: (NotEqual x)
12359	for {
12360		v_0 := v.Args[0]
12361		if v_0.Op != OpPPC64InvertFlags {
12362			break
12363		}
12364		x := v_0.Args[0]
12365		v.reset(OpPPC64NotEqual)
12366		v.AddArg(x)
12367		return true
12368	}
12369	// match: (NotEqual cmp)
12370	// result: (ISELB [6] (MOVDconst [1]) cmp)
12371	for {
12372		cmp := v.Args[0]
12373		v.reset(OpPPC64ISELB)
12374		v.AuxInt = 6
12375		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
12376		v0.AuxInt = 1
12377		v.AddArg(v0)
12378		v.AddArg(cmp)
12379		return true
12380	}
12381}
12382func rewriteValuePPC64_OpPPC64OR_0(v *Value) bool {
12383	b := v.Block
12384	typ := &b.Func.Config.Types
12385	// match: (OR (SLDconst x [c]) (SRDconst x [d]))
12386	// cond: d == 64-c
12387	// result: (ROTLconst [c] x)
12388	for {
12389		_ = v.Args[1]
12390		v_0 := v.Args[0]
12391		if v_0.Op != OpPPC64SLDconst {
12392			break
12393		}
12394		c := v_0.AuxInt
12395		x := v_0.Args[0]
12396		v_1 := v.Args[1]
12397		if v_1.Op != OpPPC64SRDconst {
12398			break
12399		}
12400		d := v_1.AuxInt
12401		if x != v_1.Args[0] || !(d == 64-c) {
12402			break
12403		}
12404		v.reset(OpPPC64ROTLconst)
12405		v.AuxInt = c
12406		v.AddArg(x)
12407		return true
12408	}
12409	// match: (OR (SRDconst x [d]) (SLDconst x [c]))
12410	// cond: d == 64-c
12411	// result: (ROTLconst [c] x)
12412	for {
12413		_ = v.Args[1]
12414		v_0 := v.Args[0]
12415		if v_0.Op != OpPPC64SRDconst {
12416			break
12417		}
12418		d := v_0.AuxInt
12419		x := v_0.Args[0]
12420		v_1 := v.Args[1]
12421		if v_1.Op != OpPPC64SLDconst {
12422			break
12423		}
12424		c := v_1.AuxInt
12425		if x != v_1.Args[0] || !(d == 64-c) {
12426			break
12427		}
12428		v.reset(OpPPC64ROTLconst)
12429		v.AuxInt = c
12430		v.AddArg(x)
12431		return true
12432	}
12433	// match: (OR (SLWconst x [c]) (SRWconst x [d]))
12434	// cond: d == 32-c
12435	// result: (ROTLWconst [c] x)
12436	for {
12437		_ = v.Args[1]
12438		v_0 := v.Args[0]
12439		if v_0.Op != OpPPC64SLWconst {
12440			break
12441		}
12442		c := v_0.AuxInt
12443		x := v_0.Args[0]
12444		v_1 := v.Args[1]
12445		if v_1.Op != OpPPC64SRWconst {
12446			break
12447		}
12448		d := v_1.AuxInt
12449		if x != v_1.Args[0] || !(d == 32-c) {
12450			break
12451		}
12452		v.reset(OpPPC64ROTLWconst)
12453		v.AuxInt = c
12454		v.AddArg(x)
12455		return true
12456	}
12457	// match: (OR (SRWconst x [d]) (SLWconst x [c]))
12458	// cond: d == 32-c
12459	// result: (ROTLWconst [c] x)
12460	for {
12461		_ = v.Args[1]
12462		v_0 := v.Args[0]
12463		if v_0.Op != OpPPC64SRWconst {
12464			break
12465		}
12466		d := v_0.AuxInt
12467		x := v_0.Args[0]
12468		v_1 := v.Args[1]
12469		if v_1.Op != OpPPC64SLWconst {
12470			break
12471		}
12472		c := v_1.AuxInt
12473		if x != v_1.Args[0] || !(d == 32-c) {
12474			break
12475		}
12476		v.reset(OpPPC64ROTLWconst)
12477		v.AuxInt = c
12478		v.AddArg(x)
12479		return true
12480	}
12481	// match: (OR (SLD x (ANDconst <typ.Int64> [63] y)) (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))))
12482	// result: (ROTL x y)
12483	for {
12484		_ = v.Args[1]
12485		v_0 := v.Args[0]
12486		if v_0.Op != OpPPC64SLD {
12487			break
12488		}
12489		_ = v_0.Args[1]
12490		x := v_0.Args[0]
12491		v_0_1 := v_0.Args[1]
12492		if v_0_1.Op != OpPPC64ANDconst || v_0_1.Type != typ.Int64 || v_0_1.AuxInt != 63 {
12493			break
12494		}
12495		y := v_0_1.Args[0]
12496		v_1 := v.Args[1]
12497		if v_1.Op != OpPPC64SRD {
12498			break
12499		}
12500		_ = v_1.Args[1]
12501		if x != v_1.Args[0] {
12502			break
12503		}
12504		v_1_1 := v_1.Args[1]
12505		if v_1_1.Op != OpPPC64SUB || v_1_1.Type != typ.UInt {
12506			break
12507		}
12508		_ = v_1_1.Args[1]
12509		v_1_1_0 := v_1_1.Args[0]
12510		if v_1_1_0.Op != OpPPC64MOVDconst || v_1_1_0.AuxInt != 64 {
12511			break
12512		}
12513		v_1_1_1 := v_1_1.Args[1]
12514		if v_1_1_1.Op != OpPPC64ANDconst || v_1_1_1.Type != typ.UInt || v_1_1_1.AuxInt != 63 || y != v_1_1_1.Args[0] {
12515			break
12516		}
12517		v.reset(OpPPC64ROTL)
12518		v.AddArg(x)
12519		v.AddArg(y)
12520		return true
12521	}
12522	// match: (OR (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))) (SLD x (ANDconst <typ.Int64> [63] y)))
12523	// result: (ROTL x y)
12524	for {
12525		_ = v.Args[1]
12526		v_0 := v.Args[0]
12527		if v_0.Op != OpPPC64SRD {
12528			break
12529		}
12530		_ = v_0.Args[1]
12531		x := v_0.Args[0]
12532		v_0_1 := v_0.Args[1]
12533		if v_0_1.Op != OpPPC64SUB || v_0_1.Type != typ.UInt {
12534			break
12535		}
12536		_ = v_0_1.Args[1]
12537		v_0_1_0 := v_0_1.Args[0]
12538		if v_0_1_0.Op != OpPPC64MOVDconst || v_0_1_0.AuxInt != 64 {
12539			break
12540		}
12541		v_0_1_1 := v_0_1.Args[1]
12542		if v_0_1_1.Op != OpPPC64ANDconst || v_0_1_1.Type != typ.UInt || v_0_1_1.AuxInt != 63 {
12543			break
12544		}
12545		y := v_0_1_1.Args[0]
12546		v_1 := v.Args[1]
12547		if v_1.Op != OpPPC64SLD {
12548			break
12549		}
12550		_ = v_1.Args[1]
12551		if x != v_1.Args[0] {
12552			break
12553		}
12554		v_1_1 := v_1.Args[1]
12555		if v_1_1.Op != OpPPC64ANDconst || v_1_1.Type != typ.Int64 || v_1_1.AuxInt != 63 || y != v_1_1.Args[0] {
12556			break
12557		}
12558		v.reset(OpPPC64ROTL)
12559		v.AddArg(x)
12560		v.AddArg(y)
12561		return true
12562	}
12563	// match: (OR (SLW x (ANDconst <typ.Int32> [31] y)) (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))))
12564	// result: (ROTLW x y)
12565	for {
12566		_ = v.Args[1]
12567		v_0 := v.Args[0]
12568		if v_0.Op != OpPPC64SLW {
12569			break
12570		}
12571		_ = v_0.Args[1]
12572		x := v_0.Args[0]
12573		v_0_1 := v_0.Args[1]
12574		if v_0_1.Op != OpPPC64ANDconst || v_0_1.Type != typ.Int32 || v_0_1.AuxInt != 31 {
12575			break
12576		}
12577		y := v_0_1.Args[0]
12578		v_1 := v.Args[1]
12579		if v_1.Op != OpPPC64SRW {
12580			break
12581		}
12582		_ = v_1.Args[1]
12583		if x != v_1.Args[0] {
12584			break
12585		}
12586		v_1_1 := v_1.Args[1]
12587		if v_1_1.Op != OpPPC64SUB || v_1_1.Type != typ.UInt {
12588			break
12589		}
12590		_ = v_1_1.Args[1]
12591		v_1_1_0 := v_1_1.Args[0]
12592		if v_1_1_0.Op != OpPPC64MOVDconst || v_1_1_0.AuxInt != 32 {
12593			break
12594		}
12595		v_1_1_1 := v_1_1.Args[1]
12596		if v_1_1_1.Op != OpPPC64ANDconst || v_1_1_1.Type != typ.UInt || v_1_1_1.AuxInt != 31 || y != v_1_1_1.Args[0] {
12597			break
12598		}
12599		v.reset(OpPPC64ROTLW)
12600		v.AddArg(x)
12601		v.AddArg(y)
12602		return true
12603	}
12604	// match: (OR (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))) (SLW x (ANDconst <typ.Int32> [31] y)))
12605	// result: (ROTLW x y)
12606	for {
12607		_ = v.Args[1]
12608		v_0 := v.Args[0]
12609		if v_0.Op != OpPPC64SRW {
12610			break
12611		}
12612		_ = v_0.Args[1]
12613		x := v_0.Args[0]
12614		v_0_1 := v_0.Args[1]
12615		if v_0_1.Op != OpPPC64SUB || v_0_1.Type != typ.UInt {
12616			break
12617		}
12618		_ = v_0_1.Args[1]
12619		v_0_1_0 := v_0_1.Args[0]
12620		if v_0_1_0.Op != OpPPC64MOVDconst || v_0_1_0.AuxInt != 32 {
12621			break
12622		}
12623		v_0_1_1 := v_0_1.Args[1]
12624		if v_0_1_1.Op != OpPPC64ANDconst || v_0_1_1.Type != typ.UInt || v_0_1_1.AuxInt != 31 {
12625			break
12626		}
12627		y := v_0_1_1.Args[0]
12628		v_1 := v.Args[1]
12629		if v_1.Op != OpPPC64SLW {
12630			break
12631		}
12632		_ = v_1.Args[1]
12633		if x != v_1.Args[0] {
12634			break
12635		}
12636		v_1_1 := v_1.Args[1]
12637		if v_1_1.Op != OpPPC64ANDconst || v_1_1.Type != typ.Int32 || v_1_1.AuxInt != 31 || y != v_1_1.Args[0] {
12638			break
12639		}
12640		v.reset(OpPPC64ROTLW)
12641		v.AddArg(x)
12642		v.AddArg(y)
12643		return true
12644	}
12645	// match: (OR (MOVDconst [c]) (MOVDconst [d]))
12646	// result: (MOVDconst [c|d])
12647	for {
12648		_ = v.Args[1]
12649		v_0 := v.Args[0]
12650		if v_0.Op != OpPPC64MOVDconst {
12651			break
12652		}
12653		c := v_0.AuxInt
12654		v_1 := v.Args[1]
12655		if v_1.Op != OpPPC64MOVDconst {
12656			break
12657		}
12658		d := v_1.AuxInt
12659		v.reset(OpPPC64MOVDconst)
12660		v.AuxInt = c | d
12661		return true
12662	}
12663	// match: (OR (MOVDconst [d]) (MOVDconst [c]))
12664	// result: (MOVDconst [c|d])
12665	for {
12666		_ = v.Args[1]
12667		v_0 := v.Args[0]
12668		if v_0.Op != OpPPC64MOVDconst {
12669			break
12670		}
12671		d := v_0.AuxInt
12672		v_1 := v.Args[1]
12673		if v_1.Op != OpPPC64MOVDconst {
12674			break
12675		}
12676		c := v_1.AuxInt
12677		v.reset(OpPPC64MOVDconst)
12678		v.AuxInt = c | d
12679		return true
12680	}
12681	return false
12682}
12683func rewriteValuePPC64_OpPPC64OR_10(v *Value) bool {
12684	b := v.Block
12685	config := b.Func.Config
12686	typ := &b.Func.Config.Types
12687	// match: (OR x (MOVDconst [c]))
12688	// cond: isU32Bit(c)
12689	// result: (ORconst [c] x)
12690	for {
12691		_ = v.Args[1]
12692		x := v.Args[0]
12693		v_1 := v.Args[1]
12694		if v_1.Op != OpPPC64MOVDconst {
12695			break
12696		}
12697		c := v_1.AuxInt
12698		if !(isU32Bit(c)) {
12699			break
12700		}
12701		v.reset(OpPPC64ORconst)
12702		v.AuxInt = c
12703		v.AddArg(x)
12704		return true
12705	}
12706	// match: (OR (MOVDconst [c]) x)
12707	// cond: isU32Bit(c)
12708	// result: (ORconst [c] x)
12709	for {
12710		x := v.Args[1]
12711		v_0 := v.Args[0]
12712		if v_0.Op != OpPPC64MOVDconst {
12713			break
12714		}
12715		c := v_0.AuxInt
12716		if !(isU32Bit(c)) {
12717			break
12718		}
12719		v.reset(OpPPC64ORconst)
12720		v.AuxInt = c
12721		v.AddArg(x)
12722		return true
12723	}
12724	// match: (OR <t> x0:(MOVBZload [i0] {s} p mem) o1:(SLWconst x1:(MOVBZload [i1] {s} p mem) [8]))
12725	// cond: !config.BigEndian && i1 == i0+1 && x0.Uses ==1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)
12726	// result: @mergePoint(b,x0,x1) (MOVHZload <t> {s} [i0] p mem)
12727	for {
12728		t := v.Type
12729		_ = v.Args[1]
12730		x0 := v.Args[0]
12731		if x0.Op != OpPPC64MOVBZload {
12732			break
12733		}
12734		i0 := x0.AuxInt
12735		s := x0.Aux
12736		mem := x0.Args[1]
12737		p := x0.Args[0]
12738		o1 := v.Args[1]
12739		if o1.Op != OpPPC64SLWconst || o1.AuxInt != 8 {
12740			break
12741		}
12742		x1 := o1.Args[0]
12743		if x1.Op != OpPPC64MOVBZload {
12744			break
12745		}
12746		i1 := x1.AuxInt
12747		if x1.Aux != s {
12748			break
12749		}
12750		_ = x1.Args[1]
12751		if p != x1.Args[0] || mem != x1.Args[1] || !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
12752			break
12753		}
12754		b = mergePoint(b, x0, x1)
12755		v0 := b.NewValue0(x1.Pos, OpPPC64MOVHZload, t)
12756		v.reset(OpCopy)
12757		v.AddArg(v0)
12758		v0.AuxInt = i0
12759		v0.Aux = s
12760		v0.AddArg(p)
12761		v0.AddArg(mem)
12762		return true
12763	}
12764	// match: (OR <t> o1:(SLWconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))
12765	// cond: !config.BigEndian && i1 == i0+1 && x0.Uses ==1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)
12766	// result: @mergePoint(b,x0,x1) (MOVHZload <t> {s} [i0] p mem)
12767	for {
12768		t := v.Type
12769		_ = v.Args[1]
12770		o1 := v.Args[0]
12771		if o1.Op != OpPPC64SLWconst || o1.AuxInt != 8 {
12772			break
12773		}
12774		x1 := o1.Args[0]
12775		if x1.Op != OpPPC64MOVBZload {
12776			break
12777		}
12778		i1 := x1.AuxInt
12779		s := x1.Aux
12780		mem := x1.Args[1]
12781		p := x1.Args[0]
12782		x0 := v.Args[1]
12783		if x0.Op != OpPPC64MOVBZload {
12784			break
12785		}
12786		i0 := x0.AuxInt
12787		if x0.Aux != s {
12788			break
12789		}
12790		_ = x0.Args[1]
12791		if p != x0.Args[0] || mem != x0.Args[1] || !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
12792			break
12793		}
12794		b = mergePoint(b, x0, x1)
12795		v0 := b.NewValue0(x0.Pos, OpPPC64MOVHZload, t)
12796		v.reset(OpCopy)
12797		v.AddArg(v0)
12798		v0.AuxInt = i0
12799		v0.Aux = s
12800		v0.AddArg(p)
12801		v0.AddArg(mem)
12802		return true
12803	}
12804	// match: (OR <t> x0:(MOVBZload [i0] {s} p mem) o1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]))
12805	// cond: !config.BigEndian && i1 == i0+1 && x0.Uses ==1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)
12806	// result: @mergePoint(b,x0,x1) (MOVHZload <t> {s} [i0] p mem)
12807	for {
12808		t := v.Type
12809		_ = v.Args[1]
12810		x0 := v.Args[0]
12811		if x0.Op != OpPPC64MOVBZload {
12812			break
12813		}
12814		i0 := x0.AuxInt
12815		s := x0.Aux
12816		mem := x0.Args[1]
12817		p := x0.Args[0]
12818		o1 := v.Args[1]
12819		if o1.Op != OpPPC64SLDconst || o1.AuxInt != 8 {
12820			break
12821		}
12822		x1 := o1.Args[0]
12823		if x1.Op != OpPPC64MOVBZload {
12824			break
12825		}
12826		i1 := x1.AuxInt
12827		if x1.Aux != s {
12828			break
12829		}
12830		_ = x1.Args[1]
12831		if p != x1.Args[0] || mem != x1.Args[1] || !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
12832			break
12833		}
12834		b = mergePoint(b, x0, x1)
12835		v0 := b.NewValue0(x1.Pos, OpPPC64MOVHZload, t)
12836		v.reset(OpCopy)
12837		v.AddArg(v0)
12838		v0.AuxInt = i0
12839		v0.Aux = s
12840		v0.AddArg(p)
12841		v0.AddArg(mem)
12842		return true
12843	}
12844	// match: (OR <t> o1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [8]) x0:(MOVBZload [i0] {s} p mem))
12845	// cond: !config.BigEndian && i1 == i0+1 && x0.Uses ==1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)
12846	// result: @mergePoint(b,x0,x1) (MOVHZload <t> {s} [i0] p mem)
12847	for {
12848		t := v.Type
12849		_ = v.Args[1]
12850		o1 := v.Args[0]
12851		if o1.Op != OpPPC64SLDconst || o1.AuxInt != 8 {
12852			break
12853		}
12854		x1 := o1.Args[0]
12855		if x1.Op != OpPPC64MOVBZload {
12856			break
12857		}
12858		i1 := x1.AuxInt
12859		s := x1.Aux
12860		mem := x1.Args[1]
12861		p := x1.Args[0]
12862		x0 := v.Args[1]
12863		if x0.Op != OpPPC64MOVBZload {
12864			break
12865		}
12866		i0 := x0.AuxInt
12867		if x0.Aux != s {
12868			break
12869		}
12870		_ = x0.Args[1]
12871		if p != x0.Args[0] || mem != x0.Args[1] || !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
12872			break
12873		}
12874		b = mergePoint(b, x0, x1)
12875		v0 := b.NewValue0(x0.Pos, OpPPC64MOVHZload, t)
12876		v.reset(OpCopy)
12877		v.AddArg(v0)
12878		v0.AuxInt = i0
12879		v0.Aux = s
12880		v0.AddArg(p)
12881		v0.AddArg(mem)
12882		return true
12883	}
12884	// match: (OR <t> x0:(MOVBZload [i1] {s} p mem) o1:(SLWconst x1:(MOVBZload [i0] {s} p mem) [8]))
12885	// cond: !config.BigEndian && i1 == i0+1 && x0.Uses ==1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)
12886	// result: @mergePoint(b,x0,x1) (MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
12887	for {
12888		t := v.Type
12889		_ = v.Args[1]
12890		x0 := v.Args[0]
12891		if x0.Op != OpPPC64MOVBZload {
12892			break
12893		}
12894		i1 := x0.AuxInt
12895		s := x0.Aux
12896		mem := x0.Args[1]
12897		p := x0.Args[0]
12898		o1 := v.Args[1]
12899		if o1.Op != OpPPC64SLWconst || o1.AuxInt != 8 {
12900			break
12901		}
12902		x1 := o1.Args[0]
12903		if x1.Op != OpPPC64MOVBZload {
12904			break
12905		}
12906		i0 := x1.AuxInt
12907		if x1.Aux != s {
12908			break
12909		}
12910		_ = x1.Args[1]
12911		if p != x1.Args[0] || mem != x1.Args[1] || !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
12912			break
12913		}
12914		b = mergePoint(b, x0, x1)
12915		v0 := b.NewValue0(x1.Pos, OpPPC64MOVHBRload, t)
12916		v.reset(OpCopy)
12917		v.AddArg(v0)
12918		v1 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
12919		v1.AuxInt = i0
12920		v1.Aux = s
12921		v1.AddArg(p)
12922		v0.AddArg(v1)
12923		v0.AddArg(mem)
12924		return true
12925	}
12926	// match: (OR <t> o1:(SLWconst x1:(MOVBZload [i0] {s} p mem) [8]) x0:(MOVBZload [i1] {s} p mem))
12927	// cond: !config.BigEndian && i1 == i0+1 && x0.Uses ==1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)
12928	// result: @mergePoint(b,x0,x1) (MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
12929	for {
12930		t := v.Type
12931		_ = v.Args[1]
12932		o1 := v.Args[0]
12933		if o1.Op != OpPPC64SLWconst || o1.AuxInt != 8 {
12934			break
12935		}
12936		x1 := o1.Args[0]
12937		if x1.Op != OpPPC64MOVBZload {
12938			break
12939		}
12940		i0 := x1.AuxInt
12941		s := x1.Aux
12942		mem := x1.Args[1]
12943		p := x1.Args[0]
12944		x0 := v.Args[1]
12945		if x0.Op != OpPPC64MOVBZload {
12946			break
12947		}
12948		i1 := x0.AuxInt
12949		if x0.Aux != s {
12950			break
12951		}
12952		_ = x0.Args[1]
12953		if p != x0.Args[0] || mem != x0.Args[1] || !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
12954			break
12955		}
12956		b = mergePoint(b, x0, x1)
12957		v0 := b.NewValue0(x0.Pos, OpPPC64MOVHBRload, t)
12958		v.reset(OpCopy)
12959		v.AddArg(v0)
12960		v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
12961		v1.AuxInt = i0
12962		v1.Aux = s
12963		v1.AddArg(p)
12964		v0.AddArg(v1)
12965		v0.AddArg(mem)
12966		return true
12967	}
12968	// match: (OR <t> x0:(MOVBZload [i1] {s} p mem) o1:(SLDconst x1:(MOVBZload [i0] {s} p mem) [8]))
12969	// cond: !config.BigEndian && i1 == i0+1 && x0.Uses ==1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)
12970	// result: @mergePoint(b,x0,x1) (MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
12971	for {
12972		t := v.Type
12973		_ = v.Args[1]
12974		x0 := v.Args[0]
12975		if x0.Op != OpPPC64MOVBZload {
12976			break
12977		}
12978		i1 := x0.AuxInt
12979		s := x0.Aux
12980		mem := x0.Args[1]
12981		p := x0.Args[0]
12982		o1 := v.Args[1]
12983		if o1.Op != OpPPC64SLDconst || o1.AuxInt != 8 {
12984			break
12985		}
12986		x1 := o1.Args[0]
12987		if x1.Op != OpPPC64MOVBZload {
12988			break
12989		}
12990		i0 := x1.AuxInt
12991		if x1.Aux != s {
12992			break
12993		}
12994		_ = x1.Args[1]
12995		if p != x1.Args[0] || mem != x1.Args[1] || !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
12996			break
12997		}
12998		b = mergePoint(b, x0, x1)
12999		v0 := b.NewValue0(x1.Pos, OpPPC64MOVHBRload, t)
13000		v.reset(OpCopy)
13001		v.AddArg(v0)
13002		v1 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
13003		v1.AuxInt = i0
13004		v1.Aux = s
13005		v1.AddArg(p)
13006		v0.AddArg(v1)
13007		v0.AddArg(mem)
13008		return true
13009	}
13010	// match: (OR <t> o1:(SLDconst x1:(MOVBZload [i0] {s} p mem) [8]) x0:(MOVBZload [i1] {s} p mem))
13011	// cond: !config.BigEndian && i1 == i0+1 && x0.Uses ==1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)
13012	// result: @mergePoint(b,x0,x1) (MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
13013	for {
13014		t := v.Type
13015		_ = v.Args[1]
13016		o1 := v.Args[0]
13017		if o1.Op != OpPPC64SLDconst || o1.AuxInt != 8 {
13018			break
13019		}
13020		x1 := o1.Args[0]
13021		if x1.Op != OpPPC64MOVBZload {
13022			break
13023		}
13024		i0 := x1.AuxInt
13025		s := x1.Aux
13026		mem := x1.Args[1]
13027		p := x1.Args[0]
13028		x0 := v.Args[1]
13029		if x0.Op != OpPPC64MOVBZload {
13030			break
13031		}
13032		i1 := x0.AuxInt
13033		if x0.Aux != s {
13034			break
13035		}
13036		_ = x0.Args[1]
13037		if p != x0.Args[0] || mem != x0.Args[1] || !(!config.BigEndian && i1 == i0+1 && x0.Uses == 1 && x1.Uses == 1 && o1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(o1)) {
13038			break
13039		}
13040		b = mergePoint(b, x0, x1)
13041		v0 := b.NewValue0(x0.Pos, OpPPC64MOVHBRload, t)
13042		v.reset(OpCopy)
13043		v.AddArg(v0)
13044		v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
13045		v1.AuxInt = i0
13046		v1.Aux = s
13047		v1.AddArg(p)
13048		v0.AddArg(v1)
13049		v0.AddArg(mem)
13050		return true
13051	}
13052	return false
13053}
13054func rewriteValuePPC64_OpPPC64OR_20(v *Value) bool {
13055	b := v.Block
13056	config := b.Func.Config
13057	typ := &b.Func.Config.Types
13058	// match: (OR <t> s0:(SLWconst x0:(MOVBZload [i1] {s} p mem) [n1]) s1:(SLWconst x1:(MOVBZload [i0] {s} p mem) [n2]))
13059	// cond: !config.BigEndian && i1 == i0+1 && n1%8 == 0 && n2 == n1+8 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1)
13060	// result: @mergePoint(b,x0,x1) (SLDconst <t> (MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [n1])
13061	for {
13062		t := v.Type
13063		_ = v.Args[1]
13064		s0 := v.Args[0]
13065		if s0.Op != OpPPC64SLWconst {
13066			break
13067		}
13068		n1 := s0.AuxInt
13069		x0 := s0.Args[0]
13070		if x0.Op != OpPPC64MOVBZload {
13071			break
13072		}
13073		i1 := x0.AuxInt
13074		s := x0.Aux
13075		mem := x0.Args[1]
13076		p := x0.Args[0]
13077		s1 := v.Args[1]
13078		if s1.Op != OpPPC64SLWconst {
13079			break
13080		}
13081		n2 := s1.AuxInt
13082		x1 := s1.Args[0]
13083		if x1.Op != OpPPC64MOVBZload {
13084			break
13085		}
13086		i0 := x1.AuxInt
13087		if x1.Aux != s {
13088			break
13089		}
13090		_ = x1.Args[1]
13091		if p != x1.Args[0] || mem != x1.Args[1] || !(!config.BigEndian && i1 == i0+1 && n1%8 == 0 && n2 == n1+8 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1)) {
13092			break
13093		}
13094		b = mergePoint(b, x0, x1)
13095		v0 := b.NewValue0(x1.Pos, OpPPC64SLDconst, t)
13096		v.reset(OpCopy)
13097		v.AddArg(v0)
13098		v0.AuxInt = n1
13099		v1 := b.NewValue0(x1.Pos, OpPPC64MOVHBRload, t)
13100		v2 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
13101		v2.AuxInt = i0
13102		v2.Aux = s
13103		v2.AddArg(p)
13104		v1.AddArg(v2)
13105		v1.AddArg(mem)
13106		v0.AddArg(v1)
13107		return true
13108	}
13109	// match: (OR <t> s1:(SLWconst x1:(MOVBZload [i0] {s} p mem) [n2]) s0:(SLWconst x0:(MOVBZload [i1] {s} p mem) [n1]))
13110	// cond: !config.BigEndian && i1 == i0+1 && n1%8 == 0 && n2 == n1+8 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1)
13111	// result: @mergePoint(b,x0,x1) (SLDconst <t> (MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [n1])
13112	for {
13113		t := v.Type
13114		_ = v.Args[1]
13115		s1 := v.Args[0]
13116		if s1.Op != OpPPC64SLWconst {
13117			break
13118		}
13119		n2 := s1.AuxInt
13120		x1 := s1.Args[0]
13121		if x1.Op != OpPPC64MOVBZload {
13122			break
13123		}
13124		i0 := x1.AuxInt
13125		s := x1.Aux
13126		mem := x1.Args[1]
13127		p := x1.Args[0]
13128		s0 := v.Args[1]
13129		if s0.Op != OpPPC64SLWconst {
13130			break
13131		}
13132		n1 := s0.AuxInt
13133		x0 := s0.Args[0]
13134		if x0.Op != OpPPC64MOVBZload {
13135			break
13136		}
13137		i1 := x0.AuxInt
13138		if x0.Aux != s {
13139			break
13140		}
13141		_ = x0.Args[1]
13142		if p != x0.Args[0] || mem != x0.Args[1] || !(!config.BigEndian && i1 == i0+1 && n1%8 == 0 && n2 == n1+8 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1)) {
13143			break
13144		}
13145		b = mergePoint(b, x0, x1)
13146		v0 := b.NewValue0(x0.Pos, OpPPC64SLDconst, t)
13147		v.reset(OpCopy)
13148		v.AddArg(v0)
13149		v0.AuxInt = n1
13150		v1 := b.NewValue0(x0.Pos, OpPPC64MOVHBRload, t)
13151		v2 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
13152		v2.AuxInt = i0
13153		v2.Aux = s
13154		v2.AddArg(p)
13155		v1.AddArg(v2)
13156		v1.AddArg(mem)
13157		v0.AddArg(v1)
13158		return true
13159	}
13160	// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i1] {s} p mem) [n1]) s1:(SLDconst x1:(MOVBZload [i0] {s} p mem) [n2]))
13161	// cond: !config.BigEndian && i1 == i0+1 && n1%8 == 0 && n2 == n1+8 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1)
13162	// result: @mergePoint(b,x0,x1) (SLDconst <t> (MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [n1])
13163	for {
13164		t := v.Type
13165		_ = v.Args[1]
13166		s0 := v.Args[0]
13167		if s0.Op != OpPPC64SLDconst {
13168			break
13169		}
13170		n1 := s0.AuxInt
13171		x0 := s0.Args[0]
13172		if x0.Op != OpPPC64MOVBZload {
13173			break
13174		}
13175		i1 := x0.AuxInt
13176		s := x0.Aux
13177		mem := x0.Args[1]
13178		p := x0.Args[0]
13179		s1 := v.Args[1]
13180		if s1.Op != OpPPC64SLDconst {
13181			break
13182		}
13183		n2 := s1.AuxInt
13184		x1 := s1.Args[0]
13185		if x1.Op != OpPPC64MOVBZload {
13186			break
13187		}
13188		i0 := x1.AuxInt
13189		if x1.Aux != s {
13190			break
13191		}
13192		_ = x1.Args[1]
13193		if p != x1.Args[0] || mem != x1.Args[1] || !(!config.BigEndian && i1 == i0+1 && n1%8 == 0 && n2 == n1+8 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1)) {
13194			break
13195		}
13196		b = mergePoint(b, x0, x1)
13197		v0 := b.NewValue0(x1.Pos, OpPPC64SLDconst, t)
13198		v.reset(OpCopy)
13199		v.AddArg(v0)
13200		v0.AuxInt = n1
13201		v1 := b.NewValue0(x1.Pos, OpPPC64MOVHBRload, t)
13202		v2 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
13203		v2.AuxInt = i0
13204		v2.Aux = s
13205		v2.AddArg(p)
13206		v1.AddArg(v2)
13207		v1.AddArg(mem)
13208		v0.AddArg(v1)
13209		return true
13210	}
13211	// match: (OR <t> s1:(SLDconst x1:(MOVBZload [i0] {s} p mem) [n2]) s0:(SLDconst x0:(MOVBZload [i1] {s} p mem) [n1]))
13212	// cond: !config.BigEndian && i1 == i0+1 && n1%8 == 0 && n2 == n1+8 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1)
13213	// result: @mergePoint(b,x0,x1) (SLDconst <t> (MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [n1])
13214	for {
13215		t := v.Type
13216		_ = v.Args[1]
13217		s1 := v.Args[0]
13218		if s1.Op != OpPPC64SLDconst {
13219			break
13220		}
13221		n2 := s1.AuxInt
13222		x1 := s1.Args[0]
13223		if x1.Op != OpPPC64MOVBZload {
13224			break
13225		}
13226		i0 := x1.AuxInt
13227		s := x1.Aux
13228		mem := x1.Args[1]
13229		p := x1.Args[0]
13230		s0 := v.Args[1]
13231		if s0.Op != OpPPC64SLDconst {
13232			break
13233		}
13234		n1 := s0.AuxInt
13235		x0 := s0.Args[0]
13236		if x0.Op != OpPPC64MOVBZload {
13237			break
13238		}
13239		i1 := x0.AuxInt
13240		if x0.Aux != s {
13241			break
13242		}
13243		_ = x0.Args[1]
13244		if p != x0.Args[0] || mem != x0.Args[1] || !(!config.BigEndian && i1 == i0+1 && n1%8 == 0 && n2 == n1+8 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1)) {
13245			break
13246		}
13247		b = mergePoint(b, x0, x1)
13248		v0 := b.NewValue0(x0.Pos, OpPPC64SLDconst, t)
13249		v.reset(OpCopy)
13250		v.AddArg(v0)
13251		v0.AuxInt = n1
13252		v1 := b.NewValue0(x0.Pos, OpPPC64MOVHBRload, t)
13253		v2 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
13254		v2.AuxInt = i0
13255		v2.Aux = s
13256		v2.AddArg(p)
13257		v1.AddArg(v2)
13258		v1.AddArg(mem)
13259		v0.AddArg(v1)
13260		return true
13261	}
13262	// match: (OR <t> s1:(SLWconst x2:(MOVBZload [i3] {s} p mem) [24]) o0:(OR <t> s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [16]) x0:(MOVHZload [i0] {s} p mem)))
13263	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
13264	// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
13265	for {
13266		t := v.Type
13267		_ = v.Args[1]
13268		s1 := v.Args[0]
13269		if s1.Op != OpPPC64SLWconst || s1.AuxInt != 24 {
13270			break
13271		}
13272		x2 := s1.Args[0]
13273		if x2.Op != OpPPC64MOVBZload {
13274			break
13275		}
13276		i3 := x2.AuxInt
13277		s := x2.Aux
13278		mem := x2.Args[1]
13279		p := x2.Args[0]
13280		o0 := v.Args[1]
13281		if o0.Op != OpPPC64OR || o0.Type != t {
13282			break
13283		}
13284		_ = o0.Args[1]
13285		s0 := o0.Args[0]
13286		if s0.Op != OpPPC64SLWconst || s0.AuxInt != 16 {
13287			break
13288		}
13289		x1 := s0.Args[0]
13290		if x1.Op != OpPPC64MOVBZload {
13291			break
13292		}
13293		i2 := x1.AuxInt
13294		if x1.Aux != s {
13295			break
13296		}
13297		_ = x1.Args[1]
13298		if p != x1.Args[0] || mem != x1.Args[1] {
13299			break
13300		}
13301		x0 := o0.Args[1]
13302		if x0.Op != OpPPC64MOVHZload {
13303			break
13304		}
13305		i0 := x0.AuxInt
13306		if x0.Aux != s {
13307			break
13308		}
13309		_ = x0.Args[1]
13310		if p != x0.Args[0] || mem != x0.Args[1] || !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
13311			break
13312		}
13313		b = mergePoint(b, x0, x1, x2)
13314		v0 := b.NewValue0(x0.Pos, OpPPC64MOVWZload, t)
13315		v.reset(OpCopy)
13316		v.AddArg(v0)
13317		v0.AuxInt = i0
13318		v0.Aux = s
13319		v0.AddArg(p)
13320		v0.AddArg(mem)
13321		return true
13322	}
13323	// match: (OR <t> s1:(SLWconst x2:(MOVBZload [i3] {s} p mem) [24]) o0:(OR <t> x0:(MOVHZload [i0] {s} p mem) s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [16])))
13324	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
13325	// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
13326	for {
13327		t := v.Type
13328		_ = v.Args[1]
13329		s1 := v.Args[0]
13330		if s1.Op != OpPPC64SLWconst || s1.AuxInt != 24 {
13331			break
13332		}
13333		x2 := s1.Args[0]
13334		if x2.Op != OpPPC64MOVBZload {
13335			break
13336		}
13337		i3 := x2.AuxInt
13338		s := x2.Aux
13339		mem := x2.Args[1]
13340		p := x2.Args[0]
13341		o0 := v.Args[1]
13342		if o0.Op != OpPPC64OR || o0.Type != t {
13343			break
13344		}
13345		_ = o0.Args[1]
13346		x0 := o0.Args[0]
13347		if x0.Op != OpPPC64MOVHZload {
13348			break
13349		}
13350		i0 := x0.AuxInt
13351		if x0.Aux != s {
13352			break
13353		}
13354		_ = x0.Args[1]
13355		if p != x0.Args[0] || mem != x0.Args[1] {
13356			break
13357		}
13358		s0 := o0.Args[1]
13359		if s0.Op != OpPPC64SLWconst || s0.AuxInt != 16 {
13360			break
13361		}
13362		x1 := s0.Args[0]
13363		if x1.Op != OpPPC64MOVBZload {
13364			break
13365		}
13366		i2 := x1.AuxInt
13367		if x1.Aux != s {
13368			break
13369		}
13370		_ = x1.Args[1]
13371		if p != x1.Args[0] || mem != x1.Args[1] || !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
13372			break
13373		}
13374		b = mergePoint(b, x0, x1, x2)
13375		v0 := b.NewValue0(x1.Pos, OpPPC64MOVWZload, t)
13376		v.reset(OpCopy)
13377		v.AddArg(v0)
13378		v0.AuxInt = i0
13379		v0.Aux = s
13380		v0.AddArg(p)
13381		v0.AddArg(mem)
13382		return true
13383	}
13384	// match: (OR <t> o0:(OR <t> s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [16]) x0:(MOVHZload [i0] {s} p mem)) s1:(SLWconst x2:(MOVBZload [i3] {s} p mem) [24]))
13385	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
13386	// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
13387	for {
13388		t := v.Type
13389		_ = v.Args[1]
13390		o0 := v.Args[0]
13391		if o0.Op != OpPPC64OR || o0.Type != t {
13392			break
13393		}
13394		_ = o0.Args[1]
13395		s0 := o0.Args[0]
13396		if s0.Op != OpPPC64SLWconst || s0.AuxInt != 16 {
13397			break
13398		}
13399		x1 := s0.Args[0]
13400		if x1.Op != OpPPC64MOVBZload {
13401			break
13402		}
13403		i2 := x1.AuxInt
13404		s := x1.Aux
13405		mem := x1.Args[1]
13406		p := x1.Args[0]
13407		x0 := o0.Args[1]
13408		if x0.Op != OpPPC64MOVHZload {
13409			break
13410		}
13411		i0 := x0.AuxInt
13412		if x0.Aux != s {
13413			break
13414		}
13415		_ = x0.Args[1]
13416		if p != x0.Args[0] || mem != x0.Args[1] {
13417			break
13418		}
13419		s1 := v.Args[1]
13420		if s1.Op != OpPPC64SLWconst || s1.AuxInt != 24 {
13421			break
13422		}
13423		x2 := s1.Args[0]
13424		if x2.Op != OpPPC64MOVBZload {
13425			break
13426		}
13427		i3 := x2.AuxInt
13428		if x2.Aux != s {
13429			break
13430		}
13431		_ = x2.Args[1]
13432		if p != x2.Args[0] || mem != x2.Args[1] || !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
13433			break
13434		}
13435		b = mergePoint(b, x0, x1, x2)
13436		v0 := b.NewValue0(x2.Pos, OpPPC64MOVWZload, t)
13437		v.reset(OpCopy)
13438		v.AddArg(v0)
13439		v0.AuxInt = i0
13440		v0.Aux = s
13441		v0.AddArg(p)
13442		v0.AddArg(mem)
13443		return true
13444	}
13445	// match: (OR <t> o0:(OR <t> x0:(MOVHZload [i0] {s} p mem) s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [16])) s1:(SLWconst x2:(MOVBZload [i3] {s} p mem) [24]))
13446	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
13447	// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
13448	for {
13449		t := v.Type
13450		_ = v.Args[1]
13451		o0 := v.Args[0]
13452		if o0.Op != OpPPC64OR || o0.Type != t {
13453			break
13454		}
13455		_ = o0.Args[1]
13456		x0 := o0.Args[0]
13457		if x0.Op != OpPPC64MOVHZload {
13458			break
13459		}
13460		i0 := x0.AuxInt
13461		s := x0.Aux
13462		mem := x0.Args[1]
13463		p := x0.Args[0]
13464		s0 := o0.Args[1]
13465		if s0.Op != OpPPC64SLWconst || s0.AuxInt != 16 {
13466			break
13467		}
13468		x1 := s0.Args[0]
13469		if x1.Op != OpPPC64MOVBZload {
13470			break
13471		}
13472		i2 := x1.AuxInt
13473		if x1.Aux != s {
13474			break
13475		}
13476		_ = x1.Args[1]
13477		if p != x1.Args[0] || mem != x1.Args[1] {
13478			break
13479		}
13480		s1 := v.Args[1]
13481		if s1.Op != OpPPC64SLWconst || s1.AuxInt != 24 {
13482			break
13483		}
13484		x2 := s1.Args[0]
13485		if x2.Op != OpPPC64MOVBZload {
13486			break
13487		}
13488		i3 := x2.AuxInt
13489		if x2.Aux != s {
13490			break
13491		}
13492		_ = x2.Args[1]
13493		if p != x2.Args[0] || mem != x2.Args[1] || !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
13494			break
13495		}
13496		b = mergePoint(b, x0, x1, x2)
13497		v0 := b.NewValue0(x2.Pos, OpPPC64MOVWZload, t)
13498		v.reset(OpCopy)
13499		v.AddArg(v0)
13500		v0.AuxInt = i0
13501		v0.Aux = s
13502		v0.AddArg(p)
13503		v0.AddArg(mem)
13504		return true
13505	}
13506	// match: (OR <t> s1:(SLDconst x2:(MOVBZload [i3] {s} p mem) [24]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i2] {s} p mem) [16]) x0:(MOVHZload [i0] {s} p mem)))
13507	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
13508	// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
13509	for {
13510		t := v.Type
13511		_ = v.Args[1]
13512		s1 := v.Args[0]
13513		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 24 {
13514			break
13515		}
13516		x2 := s1.Args[0]
13517		if x2.Op != OpPPC64MOVBZload {
13518			break
13519		}
13520		i3 := x2.AuxInt
13521		s := x2.Aux
13522		mem := x2.Args[1]
13523		p := x2.Args[0]
13524		o0 := v.Args[1]
13525		if o0.Op != OpPPC64OR || o0.Type != t {
13526			break
13527		}
13528		_ = o0.Args[1]
13529		s0 := o0.Args[0]
13530		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 16 {
13531			break
13532		}
13533		x1 := s0.Args[0]
13534		if x1.Op != OpPPC64MOVBZload {
13535			break
13536		}
13537		i2 := x1.AuxInt
13538		if x1.Aux != s {
13539			break
13540		}
13541		_ = x1.Args[1]
13542		if p != x1.Args[0] || mem != x1.Args[1] {
13543			break
13544		}
13545		x0 := o0.Args[1]
13546		if x0.Op != OpPPC64MOVHZload {
13547			break
13548		}
13549		i0 := x0.AuxInt
13550		if x0.Aux != s {
13551			break
13552		}
13553		_ = x0.Args[1]
13554		if p != x0.Args[0] || mem != x0.Args[1] || !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
13555			break
13556		}
13557		b = mergePoint(b, x0, x1, x2)
13558		v0 := b.NewValue0(x0.Pos, OpPPC64MOVWZload, t)
13559		v.reset(OpCopy)
13560		v.AddArg(v0)
13561		v0.AuxInt = i0
13562		v0.Aux = s
13563		v0.AddArg(p)
13564		v0.AddArg(mem)
13565		return true
13566	}
13567	// match: (OR <t> s1:(SLDconst x2:(MOVBZload [i3] {s} p mem) [24]) o0:(OR <t> x0:(MOVHZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i2] {s} p mem) [16])))
13568	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
13569	// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
13570	for {
13571		t := v.Type
13572		_ = v.Args[1]
13573		s1 := v.Args[0]
13574		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 24 {
13575			break
13576		}
13577		x2 := s1.Args[0]
13578		if x2.Op != OpPPC64MOVBZload {
13579			break
13580		}
13581		i3 := x2.AuxInt
13582		s := x2.Aux
13583		mem := x2.Args[1]
13584		p := x2.Args[0]
13585		o0 := v.Args[1]
13586		if o0.Op != OpPPC64OR || o0.Type != t {
13587			break
13588		}
13589		_ = o0.Args[1]
13590		x0 := o0.Args[0]
13591		if x0.Op != OpPPC64MOVHZload {
13592			break
13593		}
13594		i0 := x0.AuxInt
13595		if x0.Aux != s {
13596			break
13597		}
13598		_ = x0.Args[1]
13599		if p != x0.Args[0] || mem != x0.Args[1] {
13600			break
13601		}
13602		s0 := o0.Args[1]
13603		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 16 {
13604			break
13605		}
13606		x1 := s0.Args[0]
13607		if x1.Op != OpPPC64MOVBZload {
13608			break
13609		}
13610		i2 := x1.AuxInt
13611		if x1.Aux != s {
13612			break
13613		}
13614		_ = x1.Args[1]
13615		if p != x1.Args[0] || mem != x1.Args[1] || !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
13616			break
13617		}
13618		b = mergePoint(b, x0, x1, x2)
13619		v0 := b.NewValue0(x1.Pos, OpPPC64MOVWZload, t)
13620		v.reset(OpCopy)
13621		v.AddArg(v0)
13622		v0.AuxInt = i0
13623		v0.Aux = s
13624		v0.AddArg(p)
13625		v0.AddArg(mem)
13626		return true
13627	}
13628	return false
13629}
13630func rewriteValuePPC64_OpPPC64OR_30(v *Value) bool {
13631	b := v.Block
13632	config := b.Func.Config
13633	typ := &b.Func.Config.Types
13634	// match: (OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i2] {s} p mem) [16]) x0:(MOVHZload [i0] {s} p mem)) s1:(SLDconst x2:(MOVBZload [i3] {s} p mem) [24]))
13635	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
13636	// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
13637	for {
13638		t := v.Type
13639		_ = v.Args[1]
13640		o0 := v.Args[0]
13641		if o0.Op != OpPPC64OR || o0.Type != t {
13642			break
13643		}
13644		_ = o0.Args[1]
13645		s0 := o0.Args[0]
13646		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 16 {
13647			break
13648		}
13649		x1 := s0.Args[0]
13650		if x1.Op != OpPPC64MOVBZload {
13651			break
13652		}
13653		i2 := x1.AuxInt
13654		s := x1.Aux
13655		mem := x1.Args[1]
13656		p := x1.Args[0]
13657		x0 := o0.Args[1]
13658		if x0.Op != OpPPC64MOVHZload {
13659			break
13660		}
13661		i0 := x0.AuxInt
13662		if x0.Aux != s {
13663			break
13664		}
13665		_ = x0.Args[1]
13666		if p != x0.Args[0] || mem != x0.Args[1] {
13667			break
13668		}
13669		s1 := v.Args[1]
13670		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 24 {
13671			break
13672		}
13673		x2 := s1.Args[0]
13674		if x2.Op != OpPPC64MOVBZload {
13675			break
13676		}
13677		i3 := x2.AuxInt
13678		if x2.Aux != s {
13679			break
13680		}
13681		_ = x2.Args[1]
13682		if p != x2.Args[0] || mem != x2.Args[1] || !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
13683			break
13684		}
13685		b = mergePoint(b, x0, x1, x2)
13686		v0 := b.NewValue0(x2.Pos, OpPPC64MOVWZload, t)
13687		v.reset(OpCopy)
13688		v.AddArg(v0)
13689		v0.AuxInt = i0
13690		v0.Aux = s
13691		v0.AddArg(p)
13692		v0.AddArg(mem)
13693		return true
13694	}
13695	// match: (OR <t> o0:(OR <t> x0:(MOVHZload [i0] {s} p mem) s0:(SLDconst x1:(MOVBZload [i2] {s} p mem) [16])) s1:(SLDconst x2:(MOVBZload [i3] {s} p mem) [24]))
13696	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses ==1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
13697	// result: @mergePoint(b,x0,x1,x2) (MOVWZload <t> {s} [i0] p mem)
13698	for {
13699		t := v.Type
13700		_ = v.Args[1]
13701		o0 := v.Args[0]
13702		if o0.Op != OpPPC64OR || o0.Type != t {
13703			break
13704		}
13705		_ = o0.Args[1]
13706		x0 := o0.Args[0]
13707		if x0.Op != OpPPC64MOVHZload {
13708			break
13709		}
13710		i0 := x0.AuxInt
13711		s := x0.Aux
13712		mem := x0.Args[1]
13713		p := x0.Args[0]
13714		s0 := o0.Args[1]
13715		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 16 {
13716			break
13717		}
13718		x1 := s0.Args[0]
13719		if x1.Op != OpPPC64MOVBZload {
13720			break
13721		}
13722		i2 := x1.AuxInt
13723		if x1.Aux != s {
13724			break
13725		}
13726		_ = x1.Args[1]
13727		if p != x1.Args[0] || mem != x1.Args[1] {
13728			break
13729		}
13730		s1 := v.Args[1]
13731		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 24 {
13732			break
13733		}
13734		x2 := s1.Args[0]
13735		if x2.Op != OpPPC64MOVBZload {
13736			break
13737		}
13738		i3 := x2.AuxInt
13739		if x2.Aux != s {
13740			break
13741		}
13742		_ = x2.Args[1]
13743		if p != x2.Args[0] || mem != x2.Args[1] || !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
13744			break
13745		}
13746		b = mergePoint(b, x0, x1, x2)
13747		v0 := b.NewValue0(x2.Pos, OpPPC64MOVWZload, t)
13748		v.reset(OpCopy)
13749		v.AddArg(v0)
13750		v0.AuxInt = i0
13751		v0.Aux = s
13752		v0.AddArg(p)
13753		v0.AddArg(mem)
13754		return true
13755	}
13756	// match: (OR <t> s1:(SLWconst x2:(MOVBZload [i0] {s} p mem) [24]) o0:(OR <t> s0:(SLWconst x1:(MOVBZload [i1] {s} p mem) [16]) x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem)))
13757	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
13758	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
13759	for {
13760		t := v.Type
13761		_ = v.Args[1]
13762		s1 := v.Args[0]
13763		if s1.Op != OpPPC64SLWconst || s1.AuxInt != 24 {
13764			break
13765		}
13766		x2 := s1.Args[0]
13767		if x2.Op != OpPPC64MOVBZload {
13768			break
13769		}
13770		i0 := x2.AuxInt
13771		s := x2.Aux
13772		mem := x2.Args[1]
13773		p := x2.Args[0]
13774		o0 := v.Args[1]
13775		if o0.Op != OpPPC64OR || o0.Type != t {
13776			break
13777		}
13778		_ = o0.Args[1]
13779		s0 := o0.Args[0]
13780		if s0.Op != OpPPC64SLWconst || s0.AuxInt != 16 {
13781			break
13782		}
13783		x1 := s0.Args[0]
13784		if x1.Op != OpPPC64MOVBZload {
13785			break
13786		}
13787		i1 := x1.AuxInt
13788		if x1.Aux != s {
13789			break
13790		}
13791		_ = x1.Args[1]
13792		if p != x1.Args[0] || mem != x1.Args[1] {
13793			break
13794		}
13795		x0 := o0.Args[1]
13796		if x0.Op != OpPPC64MOVHBRload || x0.Type != t {
13797			break
13798		}
13799		_ = x0.Args[1]
13800		x0_0 := x0.Args[0]
13801		if x0_0.Op != OpPPC64MOVDaddr || x0_0.Type != typ.Uintptr {
13802			break
13803		}
13804		i2 := x0_0.AuxInt
13805		if x0_0.Aux != s || p != x0_0.Args[0] || mem != x0.Args[1] || !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
13806			break
13807		}
13808		b = mergePoint(b, x0, x1, x2)
13809		v0 := b.NewValue0(x0.Pos, OpPPC64MOVWBRload, t)
13810		v.reset(OpCopy)
13811		v.AddArg(v0)
13812		v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
13813		v1.AuxInt = i0
13814		v1.Aux = s
13815		v1.AddArg(p)
13816		v0.AddArg(v1)
13817		v0.AddArg(mem)
13818		return true
13819	}
13820	// match: (OR <t> s1:(SLWconst x2:(MOVBZload [i0] {s} p mem) [24]) o0:(OR <t> x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem) s0:(SLWconst x1:(MOVBZload [i1] {s} p mem) [16])))
13821	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
13822	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
13823	for {
13824		t := v.Type
13825		_ = v.Args[1]
13826		s1 := v.Args[0]
13827		if s1.Op != OpPPC64SLWconst || s1.AuxInt != 24 {
13828			break
13829		}
13830		x2 := s1.Args[0]
13831		if x2.Op != OpPPC64MOVBZload {
13832			break
13833		}
13834		i0 := x2.AuxInt
13835		s := x2.Aux
13836		mem := x2.Args[1]
13837		p := x2.Args[0]
13838		o0 := v.Args[1]
13839		if o0.Op != OpPPC64OR || o0.Type != t {
13840			break
13841		}
13842		_ = o0.Args[1]
13843		x0 := o0.Args[0]
13844		if x0.Op != OpPPC64MOVHBRload || x0.Type != t {
13845			break
13846		}
13847		_ = x0.Args[1]
13848		x0_0 := x0.Args[0]
13849		if x0_0.Op != OpPPC64MOVDaddr || x0_0.Type != typ.Uintptr {
13850			break
13851		}
13852		i2 := x0_0.AuxInt
13853		if x0_0.Aux != s || p != x0_0.Args[0] || mem != x0.Args[1] {
13854			break
13855		}
13856		s0 := o0.Args[1]
13857		if s0.Op != OpPPC64SLWconst || s0.AuxInt != 16 {
13858			break
13859		}
13860		x1 := s0.Args[0]
13861		if x1.Op != OpPPC64MOVBZload {
13862			break
13863		}
13864		i1 := x1.AuxInt
13865		if x1.Aux != s {
13866			break
13867		}
13868		_ = x1.Args[1]
13869		if p != x1.Args[0] || mem != x1.Args[1] || !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
13870			break
13871		}
13872		b = mergePoint(b, x0, x1, x2)
13873		v0 := b.NewValue0(x1.Pos, OpPPC64MOVWBRload, t)
13874		v.reset(OpCopy)
13875		v.AddArg(v0)
13876		v1 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
13877		v1.AuxInt = i0
13878		v1.Aux = s
13879		v1.AddArg(p)
13880		v0.AddArg(v1)
13881		v0.AddArg(mem)
13882		return true
13883	}
13884	// match: (OR <t> o0:(OR <t> s0:(SLWconst x1:(MOVBZload [i1] {s} p mem) [16]) x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem)) s1:(SLWconst x2:(MOVBZload [i0] {s} p mem) [24]))
13885	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
13886	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
13887	for {
13888		t := v.Type
13889		_ = v.Args[1]
13890		o0 := v.Args[0]
13891		if o0.Op != OpPPC64OR || o0.Type != t {
13892			break
13893		}
13894		_ = o0.Args[1]
13895		s0 := o0.Args[0]
13896		if s0.Op != OpPPC64SLWconst || s0.AuxInt != 16 {
13897			break
13898		}
13899		x1 := s0.Args[0]
13900		if x1.Op != OpPPC64MOVBZload {
13901			break
13902		}
13903		i1 := x1.AuxInt
13904		s := x1.Aux
13905		mem := x1.Args[1]
13906		p := x1.Args[0]
13907		x0 := o0.Args[1]
13908		if x0.Op != OpPPC64MOVHBRload || x0.Type != t {
13909			break
13910		}
13911		_ = x0.Args[1]
13912		x0_0 := x0.Args[0]
13913		if x0_0.Op != OpPPC64MOVDaddr || x0_0.Type != typ.Uintptr {
13914			break
13915		}
13916		i2 := x0_0.AuxInt
13917		if x0_0.Aux != s || p != x0_0.Args[0] || mem != x0.Args[1] {
13918			break
13919		}
13920		s1 := v.Args[1]
13921		if s1.Op != OpPPC64SLWconst || s1.AuxInt != 24 {
13922			break
13923		}
13924		x2 := s1.Args[0]
13925		if x2.Op != OpPPC64MOVBZload {
13926			break
13927		}
13928		i0 := x2.AuxInt
13929		if x2.Aux != s {
13930			break
13931		}
13932		_ = x2.Args[1]
13933		if p != x2.Args[0] || mem != x2.Args[1] || !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
13934			break
13935		}
13936		b = mergePoint(b, x0, x1, x2)
13937		v0 := b.NewValue0(x2.Pos, OpPPC64MOVWBRload, t)
13938		v.reset(OpCopy)
13939		v.AddArg(v0)
13940		v1 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
13941		v1.AuxInt = i0
13942		v1.Aux = s
13943		v1.AddArg(p)
13944		v0.AddArg(v1)
13945		v0.AddArg(mem)
13946		return true
13947	}
13948	// match: (OR <t> o0:(OR <t> x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem) s0:(SLWconst x1:(MOVBZload [i1] {s} p mem) [16])) s1:(SLWconst x2:(MOVBZload [i0] {s} p mem) [24]))
13949	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
13950	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
13951	for {
13952		t := v.Type
13953		_ = v.Args[1]
13954		o0 := v.Args[0]
13955		if o0.Op != OpPPC64OR || o0.Type != t {
13956			break
13957		}
13958		_ = o0.Args[1]
13959		x0 := o0.Args[0]
13960		if x0.Op != OpPPC64MOVHBRload || x0.Type != t {
13961			break
13962		}
13963		mem := x0.Args[1]
13964		x0_0 := x0.Args[0]
13965		if x0_0.Op != OpPPC64MOVDaddr || x0_0.Type != typ.Uintptr {
13966			break
13967		}
13968		i2 := x0_0.AuxInt
13969		s := x0_0.Aux
13970		p := x0_0.Args[0]
13971		s0 := o0.Args[1]
13972		if s0.Op != OpPPC64SLWconst || s0.AuxInt != 16 {
13973			break
13974		}
13975		x1 := s0.Args[0]
13976		if x1.Op != OpPPC64MOVBZload {
13977			break
13978		}
13979		i1 := x1.AuxInt
13980		if x1.Aux != s {
13981			break
13982		}
13983		_ = x1.Args[1]
13984		if p != x1.Args[0] || mem != x1.Args[1] {
13985			break
13986		}
13987		s1 := v.Args[1]
13988		if s1.Op != OpPPC64SLWconst || s1.AuxInt != 24 {
13989			break
13990		}
13991		x2 := s1.Args[0]
13992		if x2.Op != OpPPC64MOVBZload {
13993			break
13994		}
13995		i0 := x2.AuxInt
13996		if x2.Aux != s {
13997			break
13998		}
13999		_ = x2.Args[1]
14000		if p != x2.Args[0] || mem != x2.Args[1] || !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
14001			break
14002		}
14003		b = mergePoint(b, x0, x1, x2)
14004		v0 := b.NewValue0(x2.Pos, OpPPC64MOVWBRload, t)
14005		v.reset(OpCopy)
14006		v.AddArg(v0)
14007		v1 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
14008		v1.AuxInt = i0
14009		v1.Aux = s
14010		v1.AddArg(p)
14011		v0.AddArg(v1)
14012		v0.AddArg(mem)
14013		return true
14014	}
14015	// match: (OR <t> s1:(SLDconst x2:(MOVBZload [i0] {s} p mem) [24]) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [16]) x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem)))
14016	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
14017	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
14018	for {
14019		t := v.Type
14020		_ = v.Args[1]
14021		s1 := v.Args[0]
14022		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 24 {
14023			break
14024		}
14025		x2 := s1.Args[0]
14026		if x2.Op != OpPPC64MOVBZload {
14027			break
14028		}
14029		i0 := x2.AuxInt
14030		s := x2.Aux
14031		mem := x2.Args[1]
14032		p := x2.Args[0]
14033		o0 := v.Args[1]
14034		if o0.Op != OpPPC64OR || o0.Type != t {
14035			break
14036		}
14037		_ = o0.Args[1]
14038		s0 := o0.Args[0]
14039		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 16 {
14040			break
14041		}
14042		x1 := s0.Args[0]
14043		if x1.Op != OpPPC64MOVBZload {
14044			break
14045		}
14046		i1 := x1.AuxInt
14047		if x1.Aux != s {
14048			break
14049		}
14050		_ = x1.Args[1]
14051		if p != x1.Args[0] || mem != x1.Args[1] {
14052			break
14053		}
14054		x0 := o0.Args[1]
14055		if x0.Op != OpPPC64MOVHBRload || x0.Type != t {
14056			break
14057		}
14058		_ = x0.Args[1]
14059		x0_0 := x0.Args[0]
14060		if x0_0.Op != OpPPC64MOVDaddr || x0_0.Type != typ.Uintptr {
14061			break
14062		}
14063		i2 := x0_0.AuxInt
14064		if x0_0.Aux != s || p != x0_0.Args[0] || mem != x0.Args[1] || !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
14065			break
14066		}
14067		b = mergePoint(b, x0, x1, x2)
14068		v0 := b.NewValue0(x0.Pos, OpPPC64MOVWBRload, t)
14069		v.reset(OpCopy)
14070		v.AddArg(v0)
14071		v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
14072		v1.AuxInt = i0
14073		v1.Aux = s
14074		v1.AddArg(p)
14075		v0.AddArg(v1)
14076		v0.AddArg(mem)
14077		return true
14078	}
14079	// match: (OR <t> s1:(SLDconst x2:(MOVBZload [i0] {s} p mem) [24]) o0:(OR <t> x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [16])))
14080	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
14081	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
14082	for {
14083		t := v.Type
14084		_ = v.Args[1]
14085		s1 := v.Args[0]
14086		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 24 {
14087			break
14088		}
14089		x2 := s1.Args[0]
14090		if x2.Op != OpPPC64MOVBZload {
14091			break
14092		}
14093		i0 := x2.AuxInt
14094		s := x2.Aux
14095		mem := x2.Args[1]
14096		p := x2.Args[0]
14097		o0 := v.Args[1]
14098		if o0.Op != OpPPC64OR || o0.Type != t {
14099			break
14100		}
14101		_ = o0.Args[1]
14102		x0 := o0.Args[0]
14103		if x0.Op != OpPPC64MOVHBRload || x0.Type != t {
14104			break
14105		}
14106		_ = x0.Args[1]
14107		x0_0 := x0.Args[0]
14108		if x0_0.Op != OpPPC64MOVDaddr || x0_0.Type != typ.Uintptr {
14109			break
14110		}
14111		i2 := x0_0.AuxInt
14112		if x0_0.Aux != s || p != x0_0.Args[0] || mem != x0.Args[1] {
14113			break
14114		}
14115		s0 := o0.Args[1]
14116		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 16 {
14117			break
14118		}
14119		x1 := s0.Args[0]
14120		if x1.Op != OpPPC64MOVBZload {
14121			break
14122		}
14123		i1 := x1.AuxInt
14124		if x1.Aux != s {
14125			break
14126		}
14127		_ = x1.Args[1]
14128		if p != x1.Args[0] || mem != x1.Args[1] || !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
14129			break
14130		}
14131		b = mergePoint(b, x0, x1, x2)
14132		v0 := b.NewValue0(x1.Pos, OpPPC64MOVWBRload, t)
14133		v.reset(OpCopy)
14134		v.AddArg(v0)
14135		v1 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
14136		v1.AuxInt = i0
14137		v1.Aux = s
14138		v1.AddArg(p)
14139		v0.AddArg(v1)
14140		v0.AddArg(mem)
14141		return true
14142	}
14143	// match: (OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [16]) x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem)) s1:(SLDconst x2:(MOVBZload [i0] {s} p mem) [24]))
14144	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
14145	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
14146	for {
14147		t := v.Type
14148		_ = v.Args[1]
14149		o0 := v.Args[0]
14150		if o0.Op != OpPPC64OR || o0.Type != t {
14151			break
14152		}
14153		_ = o0.Args[1]
14154		s0 := o0.Args[0]
14155		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 16 {
14156			break
14157		}
14158		x1 := s0.Args[0]
14159		if x1.Op != OpPPC64MOVBZload {
14160			break
14161		}
14162		i1 := x1.AuxInt
14163		s := x1.Aux
14164		mem := x1.Args[1]
14165		p := x1.Args[0]
14166		x0 := o0.Args[1]
14167		if x0.Op != OpPPC64MOVHBRload || x0.Type != t {
14168			break
14169		}
14170		_ = x0.Args[1]
14171		x0_0 := x0.Args[0]
14172		if x0_0.Op != OpPPC64MOVDaddr || x0_0.Type != typ.Uintptr {
14173			break
14174		}
14175		i2 := x0_0.AuxInt
14176		if x0_0.Aux != s || p != x0_0.Args[0] || mem != x0.Args[1] {
14177			break
14178		}
14179		s1 := v.Args[1]
14180		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 24 {
14181			break
14182		}
14183		x2 := s1.Args[0]
14184		if x2.Op != OpPPC64MOVBZload {
14185			break
14186		}
14187		i0 := x2.AuxInt
14188		if x2.Aux != s {
14189			break
14190		}
14191		_ = x2.Args[1]
14192		if p != x2.Args[0] || mem != x2.Args[1] || !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
14193			break
14194		}
14195		b = mergePoint(b, x0, x1, x2)
14196		v0 := b.NewValue0(x2.Pos, OpPPC64MOVWBRload, t)
14197		v.reset(OpCopy)
14198		v.AddArg(v0)
14199		v1 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
14200		v1.AuxInt = i0
14201		v1.Aux = s
14202		v1.AddArg(p)
14203		v0.AddArg(v1)
14204		v0.AddArg(mem)
14205		return true
14206	}
14207	// match: (OR <t> o0:(OR <t> x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem) s0:(SLDconst x1:(MOVBZload [i1] {s} p mem) [16])) s1:(SLDconst x2:(MOVBZload [i0] {s} p mem) [24]))
14208	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
14209	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
14210	for {
14211		t := v.Type
14212		_ = v.Args[1]
14213		o0 := v.Args[0]
14214		if o0.Op != OpPPC64OR || o0.Type != t {
14215			break
14216		}
14217		_ = o0.Args[1]
14218		x0 := o0.Args[0]
14219		if x0.Op != OpPPC64MOVHBRload || x0.Type != t {
14220			break
14221		}
14222		mem := x0.Args[1]
14223		x0_0 := x0.Args[0]
14224		if x0_0.Op != OpPPC64MOVDaddr || x0_0.Type != typ.Uintptr {
14225			break
14226		}
14227		i2 := x0_0.AuxInt
14228		s := x0_0.Aux
14229		p := x0_0.Args[0]
14230		s0 := o0.Args[1]
14231		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 16 {
14232			break
14233		}
14234		x1 := s0.Args[0]
14235		if x1.Op != OpPPC64MOVBZload {
14236			break
14237		}
14238		i1 := x1.AuxInt
14239		if x1.Aux != s {
14240			break
14241		}
14242		_ = x1.Args[1]
14243		if p != x1.Args[0] || mem != x1.Args[1] {
14244			break
14245		}
14246		s1 := v.Args[1]
14247		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 24 {
14248			break
14249		}
14250		x2 := s1.Args[0]
14251		if x2.Op != OpPPC64MOVBZload {
14252			break
14253		}
14254		i0 := x2.AuxInt
14255		if x2.Aux != s {
14256			break
14257		}
14258		_ = x2.Args[1]
14259		if p != x2.Args[0] || mem != x2.Args[1] || !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
14260			break
14261		}
14262		b = mergePoint(b, x0, x1, x2)
14263		v0 := b.NewValue0(x2.Pos, OpPPC64MOVWBRload, t)
14264		v.reset(OpCopy)
14265		v.AddArg(v0)
14266		v1 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
14267		v1.AuxInt = i0
14268		v1.Aux = s
14269		v1.AddArg(p)
14270		v0.AddArg(v1)
14271		v0.AddArg(mem)
14272		return true
14273	}
14274	return false
14275}
14276func rewriteValuePPC64_OpPPC64OR_40(v *Value) bool {
14277	b := v.Block
14278	config := b.Func.Config
14279	typ := &b.Func.Config.Types
14280	// match: (OR <t> x0:(MOVBZload [i3] {s} p mem) o0:(OR <t> s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [8]) s1:(SLWconst x2:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [16])))
14281	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
14282	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
14283	for {
14284		t := v.Type
14285		_ = v.Args[1]
14286		x0 := v.Args[0]
14287		if x0.Op != OpPPC64MOVBZload {
14288			break
14289		}
14290		i3 := x0.AuxInt
14291		s := x0.Aux
14292		mem := x0.Args[1]
14293		p := x0.Args[0]
14294		o0 := v.Args[1]
14295		if o0.Op != OpPPC64OR || o0.Type != t {
14296			break
14297		}
14298		_ = o0.Args[1]
14299		s0 := o0.Args[0]
14300		if s0.Op != OpPPC64SLWconst || s0.AuxInt != 8 {
14301			break
14302		}
14303		x1 := s0.Args[0]
14304		if x1.Op != OpPPC64MOVBZload {
14305			break
14306		}
14307		i2 := x1.AuxInt
14308		if x1.Aux != s {
14309			break
14310		}
14311		_ = x1.Args[1]
14312		if p != x1.Args[0] || mem != x1.Args[1] {
14313			break
14314		}
14315		s1 := o0.Args[1]
14316		if s1.Op != OpPPC64SLWconst || s1.AuxInt != 16 {
14317			break
14318		}
14319		x2 := s1.Args[0]
14320		if x2.Op != OpPPC64MOVHBRload || x2.Type != t {
14321			break
14322		}
14323		_ = x2.Args[1]
14324		x2_0 := x2.Args[0]
14325		if x2_0.Op != OpPPC64MOVDaddr || x2_0.Type != typ.Uintptr {
14326			break
14327		}
14328		i0 := x2_0.AuxInt
14329		if x2_0.Aux != s || p != x2_0.Args[0] || mem != x2.Args[1] || !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
14330			break
14331		}
14332		b = mergePoint(b, x0, x1, x2)
14333		v0 := b.NewValue0(x2.Pos, OpPPC64MOVWBRload, t)
14334		v.reset(OpCopy)
14335		v.AddArg(v0)
14336		v1 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
14337		v1.AuxInt = i0
14338		v1.Aux = s
14339		v1.AddArg(p)
14340		v0.AddArg(v1)
14341		v0.AddArg(mem)
14342		return true
14343	}
14344	// match: (OR <t> x0:(MOVBZload [i3] {s} p mem) o0:(OR <t> s1:(SLWconst x2:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [16]) s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [8])))
14345	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
14346	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
14347	for {
14348		t := v.Type
14349		_ = v.Args[1]
14350		x0 := v.Args[0]
14351		if x0.Op != OpPPC64MOVBZload {
14352			break
14353		}
14354		i3 := x0.AuxInt
14355		s := x0.Aux
14356		mem := x0.Args[1]
14357		p := x0.Args[0]
14358		o0 := v.Args[1]
14359		if o0.Op != OpPPC64OR || o0.Type != t {
14360			break
14361		}
14362		_ = o0.Args[1]
14363		s1 := o0.Args[0]
14364		if s1.Op != OpPPC64SLWconst || s1.AuxInt != 16 {
14365			break
14366		}
14367		x2 := s1.Args[0]
14368		if x2.Op != OpPPC64MOVHBRload || x2.Type != t {
14369			break
14370		}
14371		_ = x2.Args[1]
14372		x2_0 := x2.Args[0]
14373		if x2_0.Op != OpPPC64MOVDaddr || x2_0.Type != typ.Uintptr {
14374			break
14375		}
14376		i0 := x2_0.AuxInt
14377		if x2_0.Aux != s || p != x2_0.Args[0] || mem != x2.Args[1] {
14378			break
14379		}
14380		s0 := o0.Args[1]
14381		if s0.Op != OpPPC64SLWconst || s0.AuxInt != 8 {
14382			break
14383		}
14384		x1 := s0.Args[0]
14385		if x1.Op != OpPPC64MOVBZload {
14386			break
14387		}
14388		i2 := x1.AuxInt
14389		if x1.Aux != s {
14390			break
14391		}
14392		_ = x1.Args[1]
14393		if p != x1.Args[0] || mem != x1.Args[1] || !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
14394			break
14395		}
14396		b = mergePoint(b, x0, x1, x2)
14397		v0 := b.NewValue0(x1.Pos, OpPPC64MOVWBRload, t)
14398		v.reset(OpCopy)
14399		v.AddArg(v0)
14400		v1 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
14401		v1.AuxInt = i0
14402		v1.Aux = s
14403		v1.AddArg(p)
14404		v0.AddArg(v1)
14405		v0.AddArg(mem)
14406		return true
14407	}
14408	// match: (OR <t> o0:(OR <t> s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [8]) s1:(SLWconst x2:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [16])) x0:(MOVBZload [i3] {s} p mem))
14409	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
14410	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
14411	for {
14412		t := v.Type
14413		_ = v.Args[1]
14414		o0 := v.Args[0]
14415		if o0.Op != OpPPC64OR || o0.Type != t {
14416			break
14417		}
14418		_ = o0.Args[1]
14419		s0 := o0.Args[0]
14420		if s0.Op != OpPPC64SLWconst || s0.AuxInt != 8 {
14421			break
14422		}
14423		x1 := s0.Args[0]
14424		if x1.Op != OpPPC64MOVBZload {
14425			break
14426		}
14427		i2 := x1.AuxInt
14428		s := x1.Aux
14429		mem := x1.Args[1]
14430		p := x1.Args[0]
14431		s1 := o0.Args[1]
14432		if s1.Op != OpPPC64SLWconst || s1.AuxInt != 16 {
14433			break
14434		}
14435		x2 := s1.Args[0]
14436		if x2.Op != OpPPC64MOVHBRload || x2.Type != t {
14437			break
14438		}
14439		_ = x2.Args[1]
14440		x2_0 := x2.Args[0]
14441		if x2_0.Op != OpPPC64MOVDaddr || x2_0.Type != typ.Uintptr {
14442			break
14443		}
14444		i0 := x2_0.AuxInt
14445		if x2_0.Aux != s || p != x2_0.Args[0] || mem != x2.Args[1] {
14446			break
14447		}
14448		x0 := v.Args[1]
14449		if x0.Op != OpPPC64MOVBZload {
14450			break
14451		}
14452		i3 := x0.AuxInt
14453		if x0.Aux != s {
14454			break
14455		}
14456		_ = x0.Args[1]
14457		if p != x0.Args[0] || mem != x0.Args[1] || !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
14458			break
14459		}
14460		b = mergePoint(b, x0, x1, x2)
14461		v0 := b.NewValue0(x0.Pos, OpPPC64MOVWBRload, t)
14462		v.reset(OpCopy)
14463		v.AddArg(v0)
14464		v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
14465		v1.AuxInt = i0
14466		v1.Aux = s
14467		v1.AddArg(p)
14468		v0.AddArg(v1)
14469		v0.AddArg(mem)
14470		return true
14471	}
14472	// match: (OR <t> o0:(OR <t> s1:(SLWconst x2:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [16]) s0:(SLWconst x1:(MOVBZload [i2] {s} p mem) [8])) x0:(MOVBZload [i3] {s} p mem))
14473	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
14474	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
14475	for {
14476		t := v.Type
14477		_ = v.Args[1]
14478		o0 := v.Args[0]
14479		if o0.Op != OpPPC64OR || o0.Type != t {
14480			break
14481		}
14482		_ = o0.Args[1]
14483		s1 := o0.Args[0]
14484		if s1.Op != OpPPC64SLWconst || s1.AuxInt != 16 {
14485			break
14486		}
14487		x2 := s1.Args[0]
14488		if x2.Op != OpPPC64MOVHBRload || x2.Type != t {
14489			break
14490		}
14491		mem := x2.Args[1]
14492		x2_0 := x2.Args[0]
14493		if x2_0.Op != OpPPC64MOVDaddr || x2_0.Type != typ.Uintptr {
14494			break
14495		}
14496		i0 := x2_0.AuxInt
14497		s := x2_0.Aux
14498		p := x2_0.Args[0]
14499		s0 := o0.Args[1]
14500		if s0.Op != OpPPC64SLWconst || s0.AuxInt != 8 {
14501			break
14502		}
14503		x1 := s0.Args[0]
14504		if x1.Op != OpPPC64MOVBZload {
14505			break
14506		}
14507		i2 := x1.AuxInt
14508		if x1.Aux != s {
14509			break
14510		}
14511		_ = x1.Args[1]
14512		if p != x1.Args[0] || mem != x1.Args[1] {
14513			break
14514		}
14515		x0 := v.Args[1]
14516		if x0.Op != OpPPC64MOVBZload {
14517			break
14518		}
14519		i3 := x0.AuxInt
14520		if x0.Aux != s {
14521			break
14522		}
14523		_ = x0.Args[1]
14524		if p != x0.Args[0] || mem != x0.Args[1] || !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
14525			break
14526		}
14527		b = mergePoint(b, x0, x1, x2)
14528		v0 := b.NewValue0(x0.Pos, OpPPC64MOVWBRload, t)
14529		v.reset(OpCopy)
14530		v.AddArg(v0)
14531		v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
14532		v1.AuxInt = i0
14533		v1.Aux = s
14534		v1.AddArg(p)
14535		v0.AddArg(v1)
14536		v0.AddArg(mem)
14537		return true
14538	}
14539	// match: (OR <t> x0:(MOVBZload [i3] {s} p mem) o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i2] {s} p mem) [8]) s1:(SLDconst x2:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [16])))
14540	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
14541	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
14542	for {
14543		t := v.Type
14544		_ = v.Args[1]
14545		x0 := v.Args[0]
14546		if x0.Op != OpPPC64MOVBZload {
14547			break
14548		}
14549		i3 := x0.AuxInt
14550		s := x0.Aux
14551		mem := x0.Args[1]
14552		p := x0.Args[0]
14553		o0 := v.Args[1]
14554		if o0.Op != OpPPC64OR || o0.Type != t {
14555			break
14556		}
14557		_ = o0.Args[1]
14558		s0 := o0.Args[0]
14559		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 8 {
14560			break
14561		}
14562		x1 := s0.Args[0]
14563		if x1.Op != OpPPC64MOVBZload {
14564			break
14565		}
14566		i2 := x1.AuxInt
14567		if x1.Aux != s {
14568			break
14569		}
14570		_ = x1.Args[1]
14571		if p != x1.Args[0] || mem != x1.Args[1] {
14572			break
14573		}
14574		s1 := o0.Args[1]
14575		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 16 {
14576			break
14577		}
14578		x2 := s1.Args[0]
14579		if x2.Op != OpPPC64MOVHBRload || x2.Type != t {
14580			break
14581		}
14582		_ = x2.Args[1]
14583		x2_0 := x2.Args[0]
14584		if x2_0.Op != OpPPC64MOVDaddr || x2_0.Type != typ.Uintptr {
14585			break
14586		}
14587		i0 := x2_0.AuxInt
14588		if x2_0.Aux != s || p != x2_0.Args[0] || mem != x2.Args[1] || !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
14589			break
14590		}
14591		b = mergePoint(b, x0, x1, x2)
14592		v0 := b.NewValue0(x2.Pos, OpPPC64MOVWBRload, t)
14593		v.reset(OpCopy)
14594		v.AddArg(v0)
14595		v1 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
14596		v1.AuxInt = i0
14597		v1.Aux = s
14598		v1.AddArg(p)
14599		v0.AddArg(v1)
14600		v0.AddArg(mem)
14601		return true
14602	}
14603	// match: (OR <t> x0:(MOVBZload [i3] {s} p mem) o0:(OR <t> s1:(SLDconst x2:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [16]) s0:(SLDconst x1:(MOVBZload [i2] {s} p mem) [8])))
14604	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
14605	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
14606	for {
14607		t := v.Type
14608		_ = v.Args[1]
14609		x0 := v.Args[0]
14610		if x0.Op != OpPPC64MOVBZload {
14611			break
14612		}
14613		i3 := x0.AuxInt
14614		s := x0.Aux
14615		mem := x0.Args[1]
14616		p := x0.Args[0]
14617		o0 := v.Args[1]
14618		if o0.Op != OpPPC64OR || o0.Type != t {
14619			break
14620		}
14621		_ = o0.Args[1]
14622		s1 := o0.Args[0]
14623		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 16 {
14624			break
14625		}
14626		x2 := s1.Args[0]
14627		if x2.Op != OpPPC64MOVHBRload || x2.Type != t {
14628			break
14629		}
14630		_ = x2.Args[1]
14631		x2_0 := x2.Args[0]
14632		if x2_0.Op != OpPPC64MOVDaddr || x2_0.Type != typ.Uintptr {
14633			break
14634		}
14635		i0 := x2_0.AuxInt
14636		if x2_0.Aux != s || p != x2_0.Args[0] || mem != x2.Args[1] {
14637			break
14638		}
14639		s0 := o0.Args[1]
14640		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 8 {
14641			break
14642		}
14643		x1 := s0.Args[0]
14644		if x1.Op != OpPPC64MOVBZload {
14645			break
14646		}
14647		i2 := x1.AuxInt
14648		if x1.Aux != s {
14649			break
14650		}
14651		_ = x1.Args[1]
14652		if p != x1.Args[0] || mem != x1.Args[1] || !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
14653			break
14654		}
14655		b = mergePoint(b, x0, x1, x2)
14656		v0 := b.NewValue0(x1.Pos, OpPPC64MOVWBRload, t)
14657		v.reset(OpCopy)
14658		v.AddArg(v0)
14659		v1 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
14660		v1.AuxInt = i0
14661		v1.Aux = s
14662		v1.AddArg(p)
14663		v0.AddArg(v1)
14664		v0.AddArg(mem)
14665		return true
14666	}
14667	// match: (OR <t> o0:(OR <t> s0:(SLDconst x1:(MOVBZload [i2] {s} p mem) [8]) s1:(SLDconst x2:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [16])) x0:(MOVBZload [i3] {s} p mem))
14668	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
14669	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
14670	for {
14671		t := v.Type
14672		_ = v.Args[1]
14673		o0 := v.Args[0]
14674		if o0.Op != OpPPC64OR || o0.Type != t {
14675			break
14676		}
14677		_ = o0.Args[1]
14678		s0 := o0.Args[0]
14679		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 8 {
14680			break
14681		}
14682		x1 := s0.Args[0]
14683		if x1.Op != OpPPC64MOVBZload {
14684			break
14685		}
14686		i2 := x1.AuxInt
14687		s := x1.Aux
14688		mem := x1.Args[1]
14689		p := x1.Args[0]
14690		s1 := o0.Args[1]
14691		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 16 {
14692			break
14693		}
14694		x2 := s1.Args[0]
14695		if x2.Op != OpPPC64MOVHBRload || x2.Type != t {
14696			break
14697		}
14698		_ = x2.Args[1]
14699		x2_0 := x2.Args[0]
14700		if x2_0.Op != OpPPC64MOVDaddr || x2_0.Type != typ.Uintptr {
14701			break
14702		}
14703		i0 := x2_0.AuxInt
14704		if x2_0.Aux != s || p != x2_0.Args[0] || mem != x2.Args[1] {
14705			break
14706		}
14707		x0 := v.Args[1]
14708		if x0.Op != OpPPC64MOVBZload {
14709			break
14710		}
14711		i3 := x0.AuxInt
14712		if x0.Aux != s {
14713			break
14714		}
14715		_ = x0.Args[1]
14716		if p != x0.Args[0] || mem != x0.Args[1] || !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
14717			break
14718		}
14719		b = mergePoint(b, x0, x1, x2)
14720		v0 := b.NewValue0(x0.Pos, OpPPC64MOVWBRload, t)
14721		v.reset(OpCopy)
14722		v.AddArg(v0)
14723		v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
14724		v1.AuxInt = i0
14725		v1.Aux = s
14726		v1.AddArg(p)
14727		v0.AddArg(v1)
14728		v0.AddArg(mem)
14729		return true
14730	}
14731	// match: (OR <t> o0:(OR <t> s1:(SLDconst x2:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [16]) s0:(SLDconst x1:(MOVBZload [i2] {s} p mem) [8])) x0:(MOVBZload [i3] {s} p mem))
14732	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)
14733	// result: @mergePoint(b,x0,x1,x2) (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
14734	for {
14735		t := v.Type
14736		_ = v.Args[1]
14737		o0 := v.Args[0]
14738		if o0.Op != OpPPC64OR || o0.Type != t {
14739			break
14740		}
14741		_ = o0.Args[1]
14742		s1 := o0.Args[0]
14743		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 16 {
14744			break
14745		}
14746		x2 := s1.Args[0]
14747		if x2.Op != OpPPC64MOVHBRload || x2.Type != t {
14748			break
14749		}
14750		mem := x2.Args[1]
14751		x2_0 := x2.Args[0]
14752		if x2_0.Op != OpPPC64MOVDaddr || x2_0.Type != typ.Uintptr {
14753			break
14754		}
14755		i0 := x2_0.AuxInt
14756		s := x2_0.Aux
14757		p := x2_0.Args[0]
14758		s0 := o0.Args[1]
14759		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 8 {
14760			break
14761		}
14762		x1 := s0.Args[0]
14763		if x1.Op != OpPPC64MOVBZload {
14764			break
14765		}
14766		i2 := x1.AuxInt
14767		if x1.Aux != s {
14768			break
14769		}
14770		_ = x1.Args[1]
14771		if p != x1.Args[0] || mem != x1.Args[1] {
14772			break
14773		}
14774		x0 := v.Args[1]
14775		if x0.Op != OpPPC64MOVBZload {
14776			break
14777		}
14778		i3 := x0.AuxInt
14779		if x0.Aux != s {
14780			break
14781		}
14782		_ = x0.Args[1]
14783		if p != x0.Args[0] || mem != x0.Args[1] || !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) {
14784			break
14785		}
14786		b = mergePoint(b, x0, x1, x2)
14787		v0 := b.NewValue0(x0.Pos, OpPPC64MOVWBRload, t)
14788		v.reset(OpCopy)
14789		v.AddArg(v0)
14790		v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
14791		v1.AuxInt = i0
14792		v1.Aux = s
14793		v1.AddArg(p)
14794		v0.AddArg(v1)
14795		v0.AddArg(mem)
14796		return true
14797	}
14798	// match: (OR <t> s2:(SLDconst x2:(MOVBZload [i3] {s} p mem) [32]) o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i2] {s} p mem) [40]) s0:(SLDconst x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [48])))
14799	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)
14800	// result: @mergePoint(b,x0,x1,x2) (SLDconst <t> (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])
14801	for {
14802		t := v.Type
14803		_ = v.Args[1]
14804		s2 := v.Args[0]
14805		if s2.Op != OpPPC64SLDconst || s2.AuxInt != 32 {
14806			break
14807		}
14808		x2 := s2.Args[0]
14809		if x2.Op != OpPPC64MOVBZload {
14810			break
14811		}
14812		i3 := x2.AuxInt
14813		s := x2.Aux
14814		mem := x2.Args[1]
14815		p := x2.Args[0]
14816		o0 := v.Args[1]
14817		if o0.Op != OpPPC64OR || o0.Type != t {
14818			break
14819		}
14820		_ = o0.Args[1]
14821		s1 := o0.Args[0]
14822		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 40 {
14823			break
14824		}
14825		x1 := s1.Args[0]
14826		if x1.Op != OpPPC64MOVBZload {
14827			break
14828		}
14829		i2 := x1.AuxInt
14830		if x1.Aux != s {
14831			break
14832		}
14833		_ = x1.Args[1]
14834		if p != x1.Args[0] || mem != x1.Args[1] {
14835			break
14836		}
14837		s0 := o0.Args[1]
14838		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 48 {
14839			break
14840		}
14841		x0 := s0.Args[0]
14842		if x0.Op != OpPPC64MOVHBRload || x0.Type != t {
14843			break
14844		}
14845		_ = x0.Args[1]
14846		x0_0 := x0.Args[0]
14847		if x0_0.Op != OpPPC64MOVDaddr || x0_0.Type != typ.Uintptr {
14848			break
14849		}
14850		i0 := x0_0.AuxInt
14851		if x0_0.Aux != s || p != x0_0.Args[0] || mem != x0.Args[1] || !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)) {
14852			break
14853		}
14854		b = mergePoint(b, x0, x1, x2)
14855		v0 := b.NewValue0(x0.Pos, OpPPC64SLDconst, t)
14856		v.reset(OpCopy)
14857		v.AddArg(v0)
14858		v0.AuxInt = 32
14859		v1 := b.NewValue0(x0.Pos, OpPPC64MOVWBRload, t)
14860		v2 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
14861		v2.AuxInt = i0
14862		v2.Aux = s
14863		v2.AddArg(p)
14864		v1.AddArg(v2)
14865		v1.AddArg(mem)
14866		v0.AddArg(v1)
14867		return true
14868	}
14869	// match: (OR <t> s2:(SLDconst x2:(MOVBZload [i3] {s} p mem) [32]) o0:(OR <t> s0:(SLDconst x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [48]) s1:(SLDconst x1:(MOVBZload [i2] {s} p mem) [40])))
14870	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)
14871	// result: @mergePoint(b,x0,x1,x2) (SLDconst <t> (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])
14872	for {
14873		t := v.Type
14874		_ = v.Args[1]
14875		s2 := v.Args[0]
14876		if s2.Op != OpPPC64SLDconst || s2.AuxInt != 32 {
14877			break
14878		}
14879		x2 := s2.Args[0]
14880		if x2.Op != OpPPC64MOVBZload {
14881			break
14882		}
14883		i3 := x2.AuxInt
14884		s := x2.Aux
14885		mem := x2.Args[1]
14886		p := x2.Args[0]
14887		o0 := v.Args[1]
14888		if o0.Op != OpPPC64OR || o0.Type != t {
14889			break
14890		}
14891		_ = o0.Args[1]
14892		s0 := o0.Args[0]
14893		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 48 {
14894			break
14895		}
14896		x0 := s0.Args[0]
14897		if x0.Op != OpPPC64MOVHBRload || x0.Type != t {
14898			break
14899		}
14900		_ = x0.Args[1]
14901		x0_0 := x0.Args[0]
14902		if x0_0.Op != OpPPC64MOVDaddr || x0_0.Type != typ.Uintptr {
14903			break
14904		}
14905		i0 := x0_0.AuxInt
14906		if x0_0.Aux != s || p != x0_0.Args[0] || mem != x0.Args[1] {
14907			break
14908		}
14909		s1 := o0.Args[1]
14910		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 40 {
14911			break
14912		}
14913		x1 := s1.Args[0]
14914		if x1.Op != OpPPC64MOVBZload {
14915			break
14916		}
14917		i2 := x1.AuxInt
14918		if x1.Aux != s {
14919			break
14920		}
14921		_ = x1.Args[1]
14922		if p != x1.Args[0] || mem != x1.Args[1] || !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)) {
14923			break
14924		}
14925		b = mergePoint(b, x0, x1, x2)
14926		v0 := b.NewValue0(x1.Pos, OpPPC64SLDconst, t)
14927		v.reset(OpCopy)
14928		v.AddArg(v0)
14929		v0.AuxInt = 32
14930		v1 := b.NewValue0(x1.Pos, OpPPC64MOVWBRload, t)
14931		v2 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
14932		v2.AuxInt = i0
14933		v2.Aux = s
14934		v2.AddArg(p)
14935		v1.AddArg(v2)
14936		v1.AddArg(mem)
14937		v0.AddArg(v1)
14938		return true
14939	}
14940	return false
14941}
14942func rewriteValuePPC64_OpPPC64OR_50(v *Value) bool {
14943	b := v.Block
14944	config := b.Func.Config
14945	typ := &b.Func.Config.Types
14946	// match: (OR <t> o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i2] {s} p mem) [40]) s0:(SLDconst x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [48])) s2:(SLDconst x2:(MOVBZload [i3] {s} p mem) [32]))
14947	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)
14948	// result: @mergePoint(b,x0,x1,x2) (SLDconst <t> (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])
14949	for {
14950		t := v.Type
14951		_ = v.Args[1]
14952		o0 := v.Args[0]
14953		if o0.Op != OpPPC64OR || o0.Type != t {
14954			break
14955		}
14956		_ = o0.Args[1]
14957		s1 := o0.Args[0]
14958		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 40 {
14959			break
14960		}
14961		x1 := s1.Args[0]
14962		if x1.Op != OpPPC64MOVBZload {
14963			break
14964		}
14965		i2 := x1.AuxInt
14966		s := x1.Aux
14967		mem := x1.Args[1]
14968		p := x1.Args[0]
14969		s0 := o0.Args[1]
14970		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 48 {
14971			break
14972		}
14973		x0 := s0.Args[0]
14974		if x0.Op != OpPPC64MOVHBRload || x0.Type != t {
14975			break
14976		}
14977		_ = x0.Args[1]
14978		x0_0 := x0.Args[0]
14979		if x0_0.Op != OpPPC64MOVDaddr || x0_0.Type != typ.Uintptr {
14980			break
14981		}
14982		i0 := x0_0.AuxInt
14983		if x0_0.Aux != s || p != x0_0.Args[0] || mem != x0.Args[1] {
14984			break
14985		}
14986		s2 := v.Args[1]
14987		if s2.Op != OpPPC64SLDconst || s2.AuxInt != 32 {
14988			break
14989		}
14990		x2 := s2.Args[0]
14991		if x2.Op != OpPPC64MOVBZload {
14992			break
14993		}
14994		i3 := x2.AuxInt
14995		if x2.Aux != s {
14996			break
14997		}
14998		_ = x2.Args[1]
14999		if p != x2.Args[0] || mem != x2.Args[1] || !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)) {
15000			break
15001		}
15002		b = mergePoint(b, x0, x1, x2)
15003		v0 := b.NewValue0(x2.Pos, OpPPC64SLDconst, t)
15004		v.reset(OpCopy)
15005		v.AddArg(v0)
15006		v0.AuxInt = 32
15007		v1 := b.NewValue0(x2.Pos, OpPPC64MOVWBRload, t)
15008		v2 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
15009		v2.AuxInt = i0
15010		v2.Aux = s
15011		v2.AddArg(p)
15012		v1.AddArg(v2)
15013		v1.AddArg(mem)
15014		v0.AddArg(v1)
15015		return true
15016	}
15017	// match: (OR <t> o0:(OR <t> s0:(SLDconst x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [48]) s1:(SLDconst x1:(MOVBZload [i2] {s} p mem) [40])) s2:(SLDconst x2:(MOVBZload [i3] {s} p mem) [32]))
15018	// cond: !config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)
15019	// result: @mergePoint(b,x0,x1,x2) (SLDconst <t> (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])
15020	for {
15021		t := v.Type
15022		_ = v.Args[1]
15023		o0 := v.Args[0]
15024		if o0.Op != OpPPC64OR || o0.Type != t {
15025			break
15026		}
15027		_ = o0.Args[1]
15028		s0 := o0.Args[0]
15029		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 48 {
15030			break
15031		}
15032		x0 := s0.Args[0]
15033		if x0.Op != OpPPC64MOVHBRload || x0.Type != t {
15034			break
15035		}
15036		mem := x0.Args[1]
15037		x0_0 := x0.Args[0]
15038		if x0_0.Op != OpPPC64MOVDaddr || x0_0.Type != typ.Uintptr {
15039			break
15040		}
15041		i0 := x0_0.AuxInt
15042		s := x0_0.Aux
15043		p := x0_0.Args[0]
15044		s1 := o0.Args[1]
15045		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 40 {
15046			break
15047		}
15048		x1 := s1.Args[0]
15049		if x1.Op != OpPPC64MOVBZload {
15050			break
15051		}
15052		i2 := x1.AuxInt
15053		if x1.Aux != s {
15054			break
15055		}
15056		_ = x1.Args[1]
15057		if p != x1.Args[0] || mem != x1.Args[1] {
15058			break
15059		}
15060		s2 := v.Args[1]
15061		if s2.Op != OpPPC64SLDconst || s2.AuxInt != 32 {
15062			break
15063		}
15064		x2 := s2.Args[0]
15065		if x2.Op != OpPPC64MOVBZload {
15066			break
15067		}
15068		i3 := x2.AuxInt
15069		if x2.Aux != s {
15070			break
15071		}
15072		_ = x2.Args[1]
15073		if p != x2.Args[0] || mem != x2.Args[1] || !(!config.BigEndian && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)) {
15074			break
15075		}
15076		b = mergePoint(b, x0, x1, x2)
15077		v0 := b.NewValue0(x2.Pos, OpPPC64SLDconst, t)
15078		v.reset(OpCopy)
15079		v.AddArg(v0)
15080		v0.AuxInt = 32
15081		v1 := b.NewValue0(x2.Pos, OpPPC64MOVWBRload, t)
15082		v2 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
15083		v2.AuxInt = i0
15084		v2.Aux = s
15085		v2.AddArg(p)
15086		v1.AddArg(v2)
15087		v1.AddArg(mem)
15088		v0.AddArg(v1)
15089		return true
15090	}
15091	// match: (OR <t> s2:(SLDconst x2:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) s0:(SLDconst x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem) [32])))
15092	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)
15093	// result: @mergePoint(b,x0,x1,x2) (SLDconst <t> (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])
15094	for {
15095		t := v.Type
15096		_ = v.Args[1]
15097		s2 := v.Args[0]
15098		if s2.Op != OpPPC64SLDconst || s2.AuxInt != 56 {
15099			break
15100		}
15101		x2 := s2.Args[0]
15102		if x2.Op != OpPPC64MOVBZload {
15103			break
15104		}
15105		i0 := x2.AuxInt
15106		s := x2.Aux
15107		mem := x2.Args[1]
15108		p := x2.Args[0]
15109		o0 := v.Args[1]
15110		if o0.Op != OpPPC64OR || o0.Type != t {
15111			break
15112		}
15113		_ = o0.Args[1]
15114		s1 := o0.Args[0]
15115		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 48 {
15116			break
15117		}
15118		x1 := s1.Args[0]
15119		if x1.Op != OpPPC64MOVBZload {
15120			break
15121		}
15122		i1 := x1.AuxInt
15123		if x1.Aux != s {
15124			break
15125		}
15126		_ = x1.Args[1]
15127		if p != x1.Args[0] || mem != x1.Args[1] {
15128			break
15129		}
15130		s0 := o0.Args[1]
15131		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 32 {
15132			break
15133		}
15134		x0 := s0.Args[0]
15135		if x0.Op != OpPPC64MOVHBRload || x0.Type != t {
15136			break
15137		}
15138		_ = x0.Args[1]
15139		x0_0 := x0.Args[0]
15140		if x0_0.Op != OpPPC64MOVDaddr || x0_0.Type != typ.Uintptr {
15141			break
15142		}
15143		i2 := x0_0.AuxInt
15144		if x0_0.Aux != s || p != x0_0.Args[0] || mem != x0.Args[1] || !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)) {
15145			break
15146		}
15147		b = mergePoint(b, x0, x1, x2)
15148		v0 := b.NewValue0(x0.Pos, OpPPC64SLDconst, t)
15149		v.reset(OpCopy)
15150		v.AddArg(v0)
15151		v0.AuxInt = 32
15152		v1 := b.NewValue0(x0.Pos, OpPPC64MOVWBRload, t)
15153		v2 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
15154		v2.AuxInt = i0
15155		v2.Aux = s
15156		v2.AddArg(p)
15157		v1.AddArg(v2)
15158		v1.AddArg(mem)
15159		v0.AddArg(v1)
15160		return true
15161	}
15162	// match: (OR <t> s2:(SLDconst x2:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> s0:(SLDconst x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem) [32]) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])))
15163	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)
15164	// result: @mergePoint(b,x0,x1,x2) (SLDconst <t> (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])
15165	for {
15166		t := v.Type
15167		_ = v.Args[1]
15168		s2 := v.Args[0]
15169		if s2.Op != OpPPC64SLDconst || s2.AuxInt != 56 {
15170			break
15171		}
15172		x2 := s2.Args[0]
15173		if x2.Op != OpPPC64MOVBZload {
15174			break
15175		}
15176		i0 := x2.AuxInt
15177		s := x2.Aux
15178		mem := x2.Args[1]
15179		p := x2.Args[0]
15180		o0 := v.Args[1]
15181		if o0.Op != OpPPC64OR || o0.Type != t {
15182			break
15183		}
15184		_ = o0.Args[1]
15185		s0 := o0.Args[0]
15186		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 32 {
15187			break
15188		}
15189		x0 := s0.Args[0]
15190		if x0.Op != OpPPC64MOVHBRload || x0.Type != t {
15191			break
15192		}
15193		_ = x0.Args[1]
15194		x0_0 := x0.Args[0]
15195		if x0_0.Op != OpPPC64MOVDaddr || x0_0.Type != typ.Uintptr {
15196			break
15197		}
15198		i2 := x0_0.AuxInt
15199		if x0_0.Aux != s || p != x0_0.Args[0] || mem != x0.Args[1] {
15200			break
15201		}
15202		s1 := o0.Args[1]
15203		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 48 {
15204			break
15205		}
15206		x1 := s1.Args[0]
15207		if x1.Op != OpPPC64MOVBZload {
15208			break
15209		}
15210		i1 := x1.AuxInt
15211		if x1.Aux != s {
15212			break
15213		}
15214		_ = x1.Args[1]
15215		if p != x1.Args[0] || mem != x1.Args[1] || !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)) {
15216			break
15217		}
15218		b = mergePoint(b, x0, x1, x2)
15219		v0 := b.NewValue0(x1.Pos, OpPPC64SLDconst, t)
15220		v.reset(OpCopy)
15221		v.AddArg(v0)
15222		v0.AuxInt = 32
15223		v1 := b.NewValue0(x1.Pos, OpPPC64MOVWBRload, t)
15224		v2 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
15225		v2.AuxInt = i0
15226		v2.Aux = s
15227		v2.AddArg(p)
15228		v1.AddArg(v2)
15229		v1.AddArg(mem)
15230		v0.AddArg(v1)
15231		return true
15232	}
15233	// match: (OR <t> o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) s0:(SLDconst x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem) [32])) s2:(SLDconst x2:(MOVBZload [i0] {s} p mem) [56]))
15234	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)
15235	// result: @mergePoint(b,x0,x1,x2) (SLDconst <t> (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])
15236	for {
15237		t := v.Type
15238		_ = v.Args[1]
15239		o0 := v.Args[0]
15240		if o0.Op != OpPPC64OR || o0.Type != t {
15241			break
15242		}
15243		_ = o0.Args[1]
15244		s1 := o0.Args[0]
15245		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 48 {
15246			break
15247		}
15248		x1 := s1.Args[0]
15249		if x1.Op != OpPPC64MOVBZload {
15250			break
15251		}
15252		i1 := x1.AuxInt
15253		s := x1.Aux
15254		mem := x1.Args[1]
15255		p := x1.Args[0]
15256		s0 := o0.Args[1]
15257		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 32 {
15258			break
15259		}
15260		x0 := s0.Args[0]
15261		if x0.Op != OpPPC64MOVHBRload || x0.Type != t {
15262			break
15263		}
15264		_ = x0.Args[1]
15265		x0_0 := x0.Args[0]
15266		if x0_0.Op != OpPPC64MOVDaddr || x0_0.Type != typ.Uintptr {
15267			break
15268		}
15269		i2 := x0_0.AuxInt
15270		if x0_0.Aux != s || p != x0_0.Args[0] || mem != x0.Args[1] {
15271			break
15272		}
15273		s2 := v.Args[1]
15274		if s2.Op != OpPPC64SLDconst || s2.AuxInt != 56 {
15275			break
15276		}
15277		x2 := s2.Args[0]
15278		if x2.Op != OpPPC64MOVBZload {
15279			break
15280		}
15281		i0 := x2.AuxInt
15282		if x2.Aux != s {
15283			break
15284		}
15285		_ = x2.Args[1]
15286		if p != x2.Args[0] || mem != x2.Args[1] || !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)) {
15287			break
15288		}
15289		b = mergePoint(b, x0, x1, x2)
15290		v0 := b.NewValue0(x2.Pos, OpPPC64SLDconst, t)
15291		v.reset(OpCopy)
15292		v.AddArg(v0)
15293		v0.AuxInt = 32
15294		v1 := b.NewValue0(x2.Pos, OpPPC64MOVWBRload, t)
15295		v2 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
15296		v2.AuxInt = i0
15297		v2.Aux = s
15298		v2.AddArg(p)
15299		v1.AddArg(v2)
15300		v1.AddArg(mem)
15301		v0.AddArg(v1)
15302		return true
15303	}
15304	// match: (OR <t> o0:(OR <t> s0:(SLDconst x0:(MOVHBRload <t> (MOVDaddr <typ.Uintptr> [i2] {s} p) mem) [32]) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])) s2:(SLDconst x2:(MOVBZload [i0] {s} p mem) [56]))
15305	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)
15306	// result: @mergePoint(b,x0,x1,x2) (SLDconst <t> (MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])
15307	for {
15308		t := v.Type
15309		_ = v.Args[1]
15310		o0 := v.Args[0]
15311		if o0.Op != OpPPC64OR || o0.Type != t {
15312			break
15313		}
15314		_ = o0.Args[1]
15315		s0 := o0.Args[0]
15316		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 32 {
15317			break
15318		}
15319		x0 := s0.Args[0]
15320		if x0.Op != OpPPC64MOVHBRload || x0.Type != t {
15321			break
15322		}
15323		mem := x0.Args[1]
15324		x0_0 := x0.Args[0]
15325		if x0_0.Op != OpPPC64MOVDaddr || x0_0.Type != typ.Uintptr {
15326			break
15327		}
15328		i2 := x0_0.AuxInt
15329		s := x0_0.Aux
15330		p := x0_0.Args[0]
15331		s1 := o0.Args[1]
15332		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 48 {
15333			break
15334		}
15335		x1 := s1.Args[0]
15336		if x1.Op != OpPPC64MOVBZload {
15337			break
15338		}
15339		i1 := x1.AuxInt
15340		if x1.Aux != s {
15341			break
15342		}
15343		_ = x1.Args[1]
15344		if p != x1.Args[0] || mem != x1.Args[1] {
15345			break
15346		}
15347		s2 := v.Args[1]
15348		if s2.Op != OpPPC64SLDconst || s2.AuxInt != 56 {
15349			break
15350		}
15351		x2 := s2.Args[0]
15352		if x2.Op != OpPPC64MOVBZload {
15353			break
15354		}
15355		i0 := x2.AuxInt
15356		if x2.Aux != s {
15357			break
15358		}
15359		_ = x2.Args[1]
15360		if p != x2.Args[0] || mem != x2.Args[1] || !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && o0.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(o0)) {
15361			break
15362		}
15363		b = mergePoint(b, x0, x1, x2)
15364		v0 := b.NewValue0(x2.Pos, OpPPC64SLDconst, t)
15365		v.reset(OpCopy)
15366		v.AddArg(v0)
15367		v0.AuxInt = 32
15368		v1 := b.NewValue0(x2.Pos, OpPPC64MOVWBRload, t)
15369		v2 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
15370		v2.AuxInt = i0
15371		v2.Aux = s
15372		v2.AddArg(p)
15373		v1.AddArg(v2)
15374		v1.AddArg(mem)
15375		v0.AddArg(v1)
15376		return true
15377	}
15378	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) x0:(MOVWZload {s} [i0] p mem)))))
15379	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
15380	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
15381	for {
15382		t := v.Type
15383		_ = v.Args[1]
15384		s6 := v.Args[0]
15385		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 56 {
15386			break
15387		}
15388		x7 := s6.Args[0]
15389		if x7.Op != OpPPC64MOVBZload {
15390			break
15391		}
15392		i7 := x7.AuxInt
15393		s := x7.Aux
15394		mem := x7.Args[1]
15395		p := x7.Args[0]
15396		o5 := v.Args[1]
15397		if o5.Op != OpPPC64OR || o5.Type != t {
15398			break
15399		}
15400		_ = o5.Args[1]
15401		s5 := o5.Args[0]
15402		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 48 {
15403			break
15404		}
15405		x6 := s5.Args[0]
15406		if x6.Op != OpPPC64MOVBZload {
15407			break
15408		}
15409		i6 := x6.AuxInt
15410		if x6.Aux != s {
15411			break
15412		}
15413		_ = x6.Args[1]
15414		if p != x6.Args[0] || mem != x6.Args[1] {
15415			break
15416		}
15417		o4 := o5.Args[1]
15418		if o4.Op != OpPPC64OR || o4.Type != t {
15419			break
15420		}
15421		_ = o4.Args[1]
15422		s4 := o4.Args[0]
15423		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 40 {
15424			break
15425		}
15426		x5 := s4.Args[0]
15427		if x5.Op != OpPPC64MOVBZload {
15428			break
15429		}
15430		i5 := x5.AuxInt
15431		if x5.Aux != s {
15432			break
15433		}
15434		_ = x5.Args[1]
15435		if p != x5.Args[0] || mem != x5.Args[1] {
15436			break
15437		}
15438		o3 := o4.Args[1]
15439		if o3.Op != OpPPC64OR || o3.Type != t {
15440			break
15441		}
15442		_ = o3.Args[1]
15443		s3 := o3.Args[0]
15444		if s3.Op != OpPPC64SLDconst || s3.AuxInt != 32 {
15445			break
15446		}
15447		x4 := s3.Args[0]
15448		if x4.Op != OpPPC64MOVBZload {
15449			break
15450		}
15451		i4 := x4.AuxInt
15452		if x4.Aux != s {
15453			break
15454		}
15455		_ = x4.Args[1]
15456		if p != x4.Args[0] || mem != x4.Args[1] {
15457			break
15458		}
15459		x0 := o3.Args[1]
15460		if x0.Op != OpPPC64MOVWZload {
15461			break
15462		}
15463		i0 := x0.AuxInt
15464		if x0.Aux != s {
15465			break
15466		}
15467		_ = x0.Args[1]
15468		if p != x0.Args[0] || mem != x0.Args[1] || !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
15469			break
15470		}
15471		b = mergePoint(b, x0, x4, x5, x6, x7)
15472		v0 := b.NewValue0(x0.Pos, OpPPC64MOVDload, t)
15473		v.reset(OpCopy)
15474		v.AddArg(v0)
15475		v0.AuxInt = i0
15476		v0.Aux = s
15477		v0.AddArg(p)
15478		v0.AddArg(mem)
15479		return true
15480	}
15481	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> x0:(MOVWZload {s} [i0] p mem) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))))
15482	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
15483	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
15484	for {
15485		t := v.Type
15486		_ = v.Args[1]
15487		s6 := v.Args[0]
15488		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 56 {
15489			break
15490		}
15491		x7 := s6.Args[0]
15492		if x7.Op != OpPPC64MOVBZload {
15493			break
15494		}
15495		i7 := x7.AuxInt
15496		s := x7.Aux
15497		mem := x7.Args[1]
15498		p := x7.Args[0]
15499		o5 := v.Args[1]
15500		if o5.Op != OpPPC64OR || o5.Type != t {
15501			break
15502		}
15503		_ = o5.Args[1]
15504		s5 := o5.Args[0]
15505		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 48 {
15506			break
15507		}
15508		x6 := s5.Args[0]
15509		if x6.Op != OpPPC64MOVBZload {
15510			break
15511		}
15512		i6 := x6.AuxInt
15513		if x6.Aux != s {
15514			break
15515		}
15516		_ = x6.Args[1]
15517		if p != x6.Args[0] || mem != x6.Args[1] {
15518			break
15519		}
15520		o4 := o5.Args[1]
15521		if o4.Op != OpPPC64OR || o4.Type != t {
15522			break
15523		}
15524		_ = o4.Args[1]
15525		s4 := o4.Args[0]
15526		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 40 {
15527			break
15528		}
15529		x5 := s4.Args[0]
15530		if x5.Op != OpPPC64MOVBZload {
15531			break
15532		}
15533		i5 := x5.AuxInt
15534		if x5.Aux != s {
15535			break
15536		}
15537		_ = x5.Args[1]
15538		if p != x5.Args[0] || mem != x5.Args[1] {
15539			break
15540		}
15541		o3 := o4.Args[1]
15542		if o3.Op != OpPPC64OR || o3.Type != t {
15543			break
15544		}
15545		_ = o3.Args[1]
15546		x0 := o3.Args[0]
15547		if x0.Op != OpPPC64MOVWZload {
15548			break
15549		}
15550		i0 := x0.AuxInt
15551		if x0.Aux != s {
15552			break
15553		}
15554		_ = x0.Args[1]
15555		if p != x0.Args[0] || mem != x0.Args[1] {
15556			break
15557		}
15558		s3 := o3.Args[1]
15559		if s3.Op != OpPPC64SLDconst || s3.AuxInt != 32 {
15560			break
15561		}
15562		x4 := s3.Args[0]
15563		if x4.Op != OpPPC64MOVBZload {
15564			break
15565		}
15566		i4 := x4.AuxInt
15567		if x4.Aux != s {
15568			break
15569		}
15570		_ = x4.Args[1]
15571		if p != x4.Args[0] || mem != x4.Args[1] || !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
15572			break
15573		}
15574		b = mergePoint(b, x0, x4, x5, x6, x7)
15575		v0 := b.NewValue0(x4.Pos, OpPPC64MOVDload, t)
15576		v.reset(OpCopy)
15577		v.AddArg(v0)
15578		v0.AuxInt = i0
15579		v0.Aux = s
15580		v0.AddArg(p)
15581		v0.AddArg(mem)
15582		return true
15583	}
15584	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) x0:(MOVWZload {s} [i0] p mem)) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
15585	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
15586	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
15587	for {
15588		t := v.Type
15589		_ = v.Args[1]
15590		s6 := v.Args[0]
15591		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 56 {
15592			break
15593		}
15594		x7 := s6.Args[0]
15595		if x7.Op != OpPPC64MOVBZload {
15596			break
15597		}
15598		i7 := x7.AuxInt
15599		s := x7.Aux
15600		mem := x7.Args[1]
15601		p := x7.Args[0]
15602		o5 := v.Args[1]
15603		if o5.Op != OpPPC64OR || o5.Type != t {
15604			break
15605		}
15606		_ = o5.Args[1]
15607		s5 := o5.Args[0]
15608		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 48 {
15609			break
15610		}
15611		x6 := s5.Args[0]
15612		if x6.Op != OpPPC64MOVBZload {
15613			break
15614		}
15615		i6 := x6.AuxInt
15616		if x6.Aux != s {
15617			break
15618		}
15619		_ = x6.Args[1]
15620		if p != x6.Args[0] || mem != x6.Args[1] {
15621			break
15622		}
15623		o4 := o5.Args[1]
15624		if o4.Op != OpPPC64OR || o4.Type != t {
15625			break
15626		}
15627		_ = o4.Args[1]
15628		o3 := o4.Args[0]
15629		if o3.Op != OpPPC64OR || o3.Type != t {
15630			break
15631		}
15632		_ = o3.Args[1]
15633		s3 := o3.Args[0]
15634		if s3.Op != OpPPC64SLDconst || s3.AuxInt != 32 {
15635			break
15636		}
15637		x4 := s3.Args[0]
15638		if x4.Op != OpPPC64MOVBZload {
15639			break
15640		}
15641		i4 := x4.AuxInt
15642		if x4.Aux != s {
15643			break
15644		}
15645		_ = x4.Args[1]
15646		if p != x4.Args[0] || mem != x4.Args[1] {
15647			break
15648		}
15649		x0 := o3.Args[1]
15650		if x0.Op != OpPPC64MOVWZload {
15651			break
15652		}
15653		i0 := x0.AuxInt
15654		if x0.Aux != s {
15655			break
15656		}
15657		_ = x0.Args[1]
15658		if p != x0.Args[0] || mem != x0.Args[1] {
15659			break
15660		}
15661		s4 := o4.Args[1]
15662		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 40 {
15663			break
15664		}
15665		x5 := s4.Args[0]
15666		if x5.Op != OpPPC64MOVBZload {
15667			break
15668		}
15669		i5 := x5.AuxInt
15670		if x5.Aux != s {
15671			break
15672		}
15673		_ = x5.Args[1]
15674		if p != x5.Args[0] || mem != x5.Args[1] || !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
15675			break
15676		}
15677		b = mergePoint(b, x0, x4, x5, x6, x7)
15678		v0 := b.NewValue0(x5.Pos, OpPPC64MOVDload, t)
15679		v.reset(OpCopy)
15680		v.AddArg(v0)
15681		v0.AuxInt = i0
15682		v0.Aux = s
15683		v0.AddArg(p)
15684		v0.AddArg(mem)
15685		return true
15686	}
15687	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> x0:(MOVWZload {s} [i0] p mem) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))))
15688	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
15689	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
15690	for {
15691		t := v.Type
15692		_ = v.Args[1]
15693		s6 := v.Args[0]
15694		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 56 {
15695			break
15696		}
15697		x7 := s6.Args[0]
15698		if x7.Op != OpPPC64MOVBZload {
15699			break
15700		}
15701		i7 := x7.AuxInt
15702		s := x7.Aux
15703		mem := x7.Args[1]
15704		p := x7.Args[0]
15705		o5 := v.Args[1]
15706		if o5.Op != OpPPC64OR || o5.Type != t {
15707			break
15708		}
15709		_ = o5.Args[1]
15710		s5 := o5.Args[0]
15711		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 48 {
15712			break
15713		}
15714		x6 := s5.Args[0]
15715		if x6.Op != OpPPC64MOVBZload {
15716			break
15717		}
15718		i6 := x6.AuxInt
15719		if x6.Aux != s {
15720			break
15721		}
15722		_ = x6.Args[1]
15723		if p != x6.Args[0] || mem != x6.Args[1] {
15724			break
15725		}
15726		o4 := o5.Args[1]
15727		if o4.Op != OpPPC64OR || o4.Type != t {
15728			break
15729		}
15730		_ = o4.Args[1]
15731		o3 := o4.Args[0]
15732		if o3.Op != OpPPC64OR || o3.Type != t {
15733			break
15734		}
15735		_ = o3.Args[1]
15736		x0 := o3.Args[0]
15737		if x0.Op != OpPPC64MOVWZload {
15738			break
15739		}
15740		i0 := x0.AuxInt
15741		if x0.Aux != s {
15742			break
15743		}
15744		_ = x0.Args[1]
15745		if p != x0.Args[0] || mem != x0.Args[1] {
15746			break
15747		}
15748		s3 := o3.Args[1]
15749		if s3.Op != OpPPC64SLDconst || s3.AuxInt != 32 {
15750			break
15751		}
15752		x4 := s3.Args[0]
15753		if x4.Op != OpPPC64MOVBZload {
15754			break
15755		}
15756		i4 := x4.AuxInt
15757		if x4.Aux != s {
15758			break
15759		}
15760		_ = x4.Args[1]
15761		if p != x4.Args[0] || mem != x4.Args[1] {
15762			break
15763		}
15764		s4 := o4.Args[1]
15765		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 40 {
15766			break
15767		}
15768		x5 := s4.Args[0]
15769		if x5.Op != OpPPC64MOVBZload {
15770			break
15771		}
15772		i5 := x5.AuxInt
15773		if x5.Aux != s {
15774			break
15775		}
15776		_ = x5.Args[1]
15777		if p != x5.Args[0] || mem != x5.Args[1] || !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
15778			break
15779		}
15780		b = mergePoint(b, x0, x4, x5, x6, x7)
15781		v0 := b.NewValue0(x5.Pos, OpPPC64MOVDload, t)
15782		v.reset(OpCopy)
15783		v.AddArg(v0)
15784		v0.AuxInt = i0
15785		v0.Aux = s
15786		v0.AddArg(p)
15787		v0.AddArg(mem)
15788		return true
15789	}
15790	return false
15791}
15792func rewriteValuePPC64_OpPPC64OR_60(v *Value) bool {
15793	b := v.Block
15794	config := b.Func.Config
15795	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) x0:(MOVWZload {s} [i0] p mem))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
15796	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
15797	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
15798	for {
15799		t := v.Type
15800		_ = v.Args[1]
15801		s6 := v.Args[0]
15802		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 56 {
15803			break
15804		}
15805		x7 := s6.Args[0]
15806		if x7.Op != OpPPC64MOVBZload {
15807			break
15808		}
15809		i7 := x7.AuxInt
15810		s := x7.Aux
15811		mem := x7.Args[1]
15812		p := x7.Args[0]
15813		o5 := v.Args[1]
15814		if o5.Op != OpPPC64OR || o5.Type != t {
15815			break
15816		}
15817		_ = o5.Args[1]
15818		o4 := o5.Args[0]
15819		if o4.Op != OpPPC64OR || o4.Type != t {
15820			break
15821		}
15822		_ = o4.Args[1]
15823		s4 := o4.Args[0]
15824		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 40 {
15825			break
15826		}
15827		x5 := s4.Args[0]
15828		if x5.Op != OpPPC64MOVBZload {
15829			break
15830		}
15831		i5 := x5.AuxInt
15832		if x5.Aux != s {
15833			break
15834		}
15835		_ = x5.Args[1]
15836		if p != x5.Args[0] || mem != x5.Args[1] {
15837			break
15838		}
15839		o3 := o4.Args[1]
15840		if o3.Op != OpPPC64OR || o3.Type != t {
15841			break
15842		}
15843		_ = o3.Args[1]
15844		s3 := o3.Args[0]
15845		if s3.Op != OpPPC64SLDconst || s3.AuxInt != 32 {
15846			break
15847		}
15848		x4 := s3.Args[0]
15849		if x4.Op != OpPPC64MOVBZload {
15850			break
15851		}
15852		i4 := x4.AuxInt
15853		if x4.Aux != s {
15854			break
15855		}
15856		_ = x4.Args[1]
15857		if p != x4.Args[0] || mem != x4.Args[1] {
15858			break
15859		}
15860		x0 := o3.Args[1]
15861		if x0.Op != OpPPC64MOVWZload {
15862			break
15863		}
15864		i0 := x0.AuxInt
15865		if x0.Aux != s {
15866			break
15867		}
15868		_ = x0.Args[1]
15869		if p != x0.Args[0] || mem != x0.Args[1] {
15870			break
15871		}
15872		s5 := o5.Args[1]
15873		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 48 {
15874			break
15875		}
15876		x6 := s5.Args[0]
15877		if x6.Op != OpPPC64MOVBZload {
15878			break
15879		}
15880		i6 := x6.AuxInt
15881		if x6.Aux != s {
15882			break
15883		}
15884		_ = x6.Args[1]
15885		if p != x6.Args[0] || mem != x6.Args[1] || !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
15886			break
15887		}
15888		b = mergePoint(b, x0, x4, x5, x6, x7)
15889		v0 := b.NewValue0(x6.Pos, OpPPC64MOVDload, t)
15890		v.reset(OpCopy)
15891		v.AddArg(v0)
15892		v0.AuxInt = i0
15893		v0.Aux = s
15894		v0.AddArg(p)
15895		v0.AddArg(mem)
15896		return true
15897	}
15898	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> x0:(MOVWZload {s} [i0] p mem) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
15899	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
15900	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
15901	for {
15902		t := v.Type
15903		_ = v.Args[1]
15904		s6 := v.Args[0]
15905		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 56 {
15906			break
15907		}
15908		x7 := s6.Args[0]
15909		if x7.Op != OpPPC64MOVBZload {
15910			break
15911		}
15912		i7 := x7.AuxInt
15913		s := x7.Aux
15914		mem := x7.Args[1]
15915		p := x7.Args[0]
15916		o5 := v.Args[1]
15917		if o5.Op != OpPPC64OR || o5.Type != t {
15918			break
15919		}
15920		_ = o5.Args[1]
15921		o4 := o5.Args[0]
15922		if o4.Op != OpPPC64OR || o4.Type != t {
15923			break
15924		}
15925		_ = o4.Args[1]
15926		s4 := o4.Args[0]
15927		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 40 {
15928			break
15929		}
15930		x5 := s4.Args[0]
15931		if x5.Op != OpPPC64MOVBZload {
15932			break
15933		}
15934		i5 := x5.AuxInt
15935		if x5.Aux != s {
15936			break
15937		}
15938		_ = x5.Args[1]
15939		if p != x5.Args[0] || mem != x5.Args[1] {
15940			break
15941		}
15942		o3 := o4.Args[1]
15943		if o3.Op != OpPPC64OR || o3.Type != t {
15944			break
15945		}
15946		_ = o3.Args[1]
15947		x0 := o3.Args[0]
15948		if x0.Op != OpPPC64MOVWZload {
15949			break
15950		}
15951		i0 := x0.AuxInt
15952		if x0.Aux != s {
15953			break
15954		}
15955		_ = x0.Args[1]
15956		if p != x0.Args[0] || mem != x0.Args[1] {
15957			break
15958		}
15959		s3 := o3.Args[1]
15960		if s3.Op != OpPPC64SLDconst || s3.AuxInt != 32 {
15961			break
15962		}
15963		x4 := s3.Args[0]
15964		if x4.Op != OpPPC64MOVBZload {
15965			break
15966		}
15967		i4 := x4.AuxInt
15968		if x4.Aux != s {
15969			break
15970		}
15971		_ = x4.Args[1]
15972		if p != x4.Args[0] || mem != x4.Args[1] {
15973			break
15974		}
15975		s5 := o5.Args[1]
15976		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 48 {
15977			break
15978		}
15979		x6 := s5.Args[0]
15980		if x6.Op != OpPPC64MOVBZload {
15981			break
15982		}
15983		i6 := x6.AuxInt
15984		if x6.Aux != s {
15985			break
15986		}
15987		_ = x6.Args[1]
15988		if p != x6.Args[0] || mem != x6.Args[1] || !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
15989			break
15990		}
15991		b = mergePoint(b, x0, x4, x5, x6, x7)
15992		v0 := b.NewValue0(x6.Pos, OpPPC64MOVDload, t)
15993		v.reset(OpCopy)
15994		v.AddArg(v0)
15995		v0.AuxInt = i0
15996		v0.Aux = s
15997		v0.AddArg(p)
15998		v0.AddArg(mem)
15999		return true
16000	}
16001	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) x0:(MOVWZload {s} [i0] p mem)) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
16002	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
16003	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
16004	for {
16005		t := v.Type
16006		_ = v.Args[1]
16007		s6 := v.Args[0]
16008		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 56 {
16009			break
16010		}
16011		x7 := s6.Args[0]
16012		if x7.Op != OpPPC64MOVBZload {
16013			break
16014		}
16015		i7 := x7.AuxInt
16016		s := x7.Aux
16017		mem := x7.Args[1]
16018		p := x7.Args[0]
16019		o5 := v.Args[1]
16020		if o5.Op != OpPPC64OR || o5.Type != t {
16021			break
16022		}
16023		_ = o5.Args[1]
16024		o4 := o5.Args[0]
16025		if o4.Op != OpPPC64OR || o4.Type != t {
16026			break
16027		}
16028		_ = o4.Args[1]
16029		o3 := o4.Args[0]
16030		if o3.Op != OpPPC64OR || o3.Type != t {
16031			break
16032		}
16033		_ = o3.Args[1]
16034		s3 := o3.Args[0]
16035		if s3.Op != OpPPC64SLDconst || s3.AuxInt != 32 {
16036			break
16037		}
16038		x4 := s3.Args[0]
16039		if x4.Op != OpPPC64MOVBZload {
16040			break
16041		}
16042		i4 := x4.AuxInt
16043		if x4.Aux != s {
16044			break
16045		}
16046		_ = x4.Args[1]
16047		if p != x4.Args[0] || mem != x4.Args[1] {
16048			break
16049		}
16050		x0 := o3.Args[1]
16051		if x0.Op != OpPPC64MOVWZload {
16052			break
16053		}
16054		i0 := x0.AuxInt
16055		if x0.Aux != s {
16056			break
16057		}
16058		_ = x0.Args[1]
16059		if p != x0.Args[0] || mem != x0.Args[1] {
16060			break
16061		}
16062		s4 := o4.Args[1]
16063		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 40 {
16064			break
16065		}
16066		x5 := s4.Args[0]
16067		if x5.Op != OpPPC64MOVBZload {
16068			break
16069		}
16070		i5 := x5.AuxInt
16071		if x5.Aux != s {
16072			break
16073		}
16074		_ = x5.Args[1]
16075		if p != x5.Args[0] || mem != x5.Args[1] {
16076			break
16077		}
16078		s5 := o5.Args[1]
16079		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 48 {
16080			break
16081		}
16082		x6 := s5.Args[0]
16083		if x6.Op != OpPPC64MOVBZload {
16084			break
16085		}
16086		i6 := x6.AuxInt
16087		if x6.Aux != s {
16088			break
16089		}
16090		_ = x6.Args[1]
16091		if p != x6.Args[0] || mem != x6.Args[1] || !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
16092			break
16093		}
16094		b = mergePoint(b, x0, x4, x5, x6, x7)
16095		v0 := b.NewValue0(x6.Pos, OpPPC64MOVDload, t)
16096		v.reset(OpCopy)
16097		v.AddArg(v0)
16098		v0.AuxInt = i0
16099		v0.Aux = s
16100		v0.AddArg(p)
16101		v0.AddArg(mem)
16102		return true
16103	}
16104	// match: (OR <t> s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]) o5:(OR <t> o4:(OR <t> o3:(OR <t> x0:(MOVWZload {s} [i0] p mem) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])))
16105	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
16106	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
16107	for {
16108		t := v.Type
16109		_ = v.Args[1]
16110		s6 := v.Args[0]
16111		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 56 {
16112			break
16113		}
16114		x7 := s6.Args[0]
16115		if x7.Op != OpPPC64MOVBZload {
16116			break
16117		}
16118		i7 := x7.AuxInt
16119		s := x7.Aux
16120		mem := x7.Args[1]
16121		p := x7.Args[0]
16122		o5 := v.Args[1]
16123		if o5.Op != OpPPC64OR || o5.Type != t {
16124			break
16125		}
16126		_ = o5.Args[1]
16127		o4 := o5.Args[0]
16128		if o4.Op != OpPPC64OR || o4.Type != t {
16129			break
16130		}
16131		_ = o4.Args[1]
16132		o3 := o4.Args[0]
16133		if o3.Op != OpPPC64OR || o3.Type != t {
16134			break
16135		}
16136		_ = o3.Args[1]
16137		x0 := o3.Args[0]
16138		if x0.Op != OpPPC64MOVWZload {
16139			break
16140		}
16141		i0 := x0.AuxInt
16142		if x0.Aux != s {
16143			break
16144		}
16145		_ = x0.Args[1]
16146		if p != x0.Args[0] || mem != x0.Args[1] {
16147			break
16148		}
16149		s3 := o3.Args[1]
16150		if s3.Op != OpPPC64SLDconst || s3.AuxInt != 32 {
16151			break
16152		}
16153		x4 := s3.Args[0]
16154		if x4.Op != OpPPC64MOVBZload {
16155			break
16156		}
16157		i4 := x4.AuxInt
16158		if x4.Aux != s {
16159			break
16160		}
16161		_ = x4.Args[1]
16162		if p != x4.Args[0] || mem != x4.Args[1] {
16163			break
16164		}
16165		s4 := o4.Args[1]
16166		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 40 {
16167			break
16168		}
16169		x5 := s4.Args[0]
16170		if x5.Op != OpPPC64MOVBZload {
16171			break
16172		}
16173		i5 := x5.AuxInt
16174		if x5.Aux != s {
16175			break
16176		}
16177		_ = x5.Args[1]
16178		if p != x5.Args[0] || mem != x5.Args[1] {
16179			break
16180		}
16181		s5 := o5.Args[1]
16182		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 48 {
16183			break
16184		}
16185		x6 := s5.Args[0]
16186		if x6.Op != OpPPC64MOVBZload {
16187			break
16188		}
16189		i6 := x6.AuxInt
16190		if x6.Aux != s {
16191			break
16192		}
16193		_ = x6.Args[1]
16194		if p != x6.Args[0] || mem != x6.Args[1] || !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
16195			break
16196		}
16197		b = mergePoint(b, x0, x4, x5, x6, x7)
16198		v0 := b.NewValue0(x6.Pos, OpPPC64MOVDload, t)
16199		v.reset(OpCopy)
16200		v.AddArg(v0)
16201		v0.AuxInt = i0
16202		v0.Aux = s
16203		v0.AddArg(p)
16204		v0.AddArg(mem)
16205		return true
16206	}
16207	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) x0:(MOVWZload {s} [i0] p mem)))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
16208	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
16209	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
16210	for {
16211		t := v.Type
16212		_ = v.Args[1]
16213		o5 := v.Args[0]
16214		if o5.Op != OpPPC64OR || o5.Type != t {
16215			break
16216		}
16217		_ = o5.Args[1]
16218		s5 := o5.Args[0]
16219		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 48 {
16220			break
16221		}
16222		x6 := s5.Args[0]
16223		if x6.Op != OpPPC64MOVBZload {
16224			break
16225		}
16226		i6 := x6.AuxInt
16227		s := x6.Aux
16228		mem := x6.Args[1]
16229		p := x6.Args[0]
16230		o4 := o5.Args[1]
16231		if o4.Op != OpPPC64OR || o4.Type != t {
16232			break
16233		}
16234		_ = o4.Args[1]
16235		s4 := o4.Args[0]
16236		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 40 {
16237			break
16238		}
16239		x5 := s4.Args[0]
16240		if x5.Op != OpPPC64MOVBZload {
16241			break
16242		}
16243		i5 := x5.AuxInt
16244		if x5.Aux != s {
16245			break
16246		}
16247		_ = x5.Args[1]
16248		if p != x5.Args[0] || mem != x5.Args[1] {
16249			break
16250		}
16251		o3 := o4.Args[1]
16252		if o3.Op != OpPPC64OR || o3.Type != t {
16253			break
16254		}
16255		_ = o3.Args[1]
16256		s3 := o3.Args[0]
16257		if s3.Op != OpPPC64SLDconst || s3.AuxInt != 32 {
16258			break
16259		}
16260		x4 := s3.Args[0]
16261		if x4.Op != OpPPC64MOVBZload {
16262			break
16263		}
16264		i4 := x4.AuxInt
16265		if x4.Aux != s {
16266			break
16267		}
16268		_ = x4.Args[1]
16269		if p != x4.Args[0] || mem != x4.Args[1] {
16270			break
16271		}
16272		x0 := o3.Args[1]
16273		if x0.Op != OpPPC64MOVWZload {
16274			break
16275		}
16276		i0 := x0.AuxInt
16277		if x0.Aux != s {
16278			break
16279		}
16280		_ = x0.Args[1]
16281		if p != x0.Args[0] || mem != x0.Args[1] {
16282			break
16283		}
16284		s6 := v.Args[1]
16285		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 56 {
16286			break
16287		}
16288		x7 := s6.Args[0]
16289		if x7.Op != OpPPC64MOVBZload {
16290			break
16291		}
16292		i7 := x7.AuxInt
16293		if x7.Aux != s {
16294			break
16295		}
16296		_ = x7.Args[1]
16297		if p != x7.Args[0] || mem != x7.Args[1] || !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
16298			break
16299		}
16300		b = mergePoint(b, x0, x4, x5, x6, x7)
16301		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDload, t)
16302		v.reset(OpCopy)
16303		v.AddArg(v0)
16304		v0.AuxInt = i0
16305		v0.Aux = s
16306		v0.AddArg(p)
16307		v0.AddArg(mem)
16308		return true
16309	}
16310	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> x0:(MOVWZload {s} [i0] p mem) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
16311	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
16312	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
16313	for {
16314		t := v.Type
16315		_ = v.Args[1]
16316		o5 := v.Args[0]
16317		if o5.Op != OpPPC64OR || o5.Type != t {
16318			break
16319		}
16320		_ = o5.Args[1]
16321		s5 := o5.Args[0]
16322		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 48 {
16323			break
16324		}
16325		x6 := s5.Args[0]
16326		if x6.Op != OpPPC64MOVBZload {
16327			break
16328		}
16329		i6 := x6.AuxInt
16330		s := x6.Aux
16331		mem := x6.Args[1]
16332		p := x6.Args[0]
16333		o4 := o5.Args[1]
16334		if o4.Op != OpPPC64OR || o4.Type != t {
16335			break
16336		}
16337		_ = o4.Args[1]
16338		s4 := o4.Args[0]
16339		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 40 {
16340			break
16341		}
16342		x5 := s4.Args[0]
16343		if x5.Op != OpPPC64MOVBZload {
16344			break
16345		}
16346		i5 := x5.AuxInt
16347		if x5.Aux != s {
16348			break
16349		}
16350		_ = x5.Args[1]
16351		if p != x5.Args[0] || mem != x5.Args[1] {
16352			break
16353		}
16354		o3 := o4.Args[1]
16355		if o3.Op != OpPPC64OR || o3.Type != t {
16356			break
16357		}
16358		_ = o3.Args[1]
16359		x0 := o3.Args[0]
16360		if x0.Op != OpPPC64MOVWZload {
16361			break
16362		}
16363		i0 := x0.AuxInt
16364		if x0.Aux != s {
16365			break
16366		}
16367		_ = x0.Args[1]
16368		if p != x0.Args[0] || mem != x0.Args[1] {
16369			break
16370		}
16371		s3 := o3.Args[1]
16372		if s3.Op != OpPPC64SLDconst || s3.AuxInt != 32 {
16373			break
16374		}
16375		x4 := s3.Args[0]
16376		if x4.Op != OpPPC64MOVBZload {
16377			break
16378		}
16379		i4 := x4.AuxInt
16380		if x4.Aux != s {
16381			break
16382		}
16383		_ = x4.Args[1]
16384		if p != x4.Args[0] || mem != x4.Args[1] {
16385			break
16386		}
16387		s6 := v.Args[1]
16388		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 56 {
16389			break
16390		}
16391		x7 := s6.Args[0]
16392		if x7.Op != OpPPC64MOVBZload {
16393			break
16394		}
16395		i7 := x7.AuxInt
16396		if x7.Aux != s {
16397			break
16398		}
16399		_ = x7.Args[1]
16400		if p != x7.Args[0] || mem != x7.Args[1] || !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
16401			break
16402		}
16403		b = mergePoint(b, x0, x4, x5, x6, x7)
16404		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDload, t)
16405		v.reset(OpCopy)
16406		v.AddArg(v0)
16407		v0.AuxInt = i0
16408		v0.Aux = s
16409		v0.AddArg(p)
16410		v0.AddArg(mem)
16411		return true
16412	}
16413	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) x0:(MOVWZload {s} [i0] p mem)) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
16414	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
16415	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
16416	for {
16417		t := v.Type
16418		_ = v.Args[1]
16419		o5 := v.Args[0]
16420		if o5.Op != OpPPC64OR || o5.Type != t {
16421			break
16422		}
16423		_ = o5.Args[1]
16424		s5 := o5.Args[0]
16425		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 48 {
16426			break
16427		}
16428		x6 := s5.Args[0]
16429		if x6.Op != OpPPC64MOVBZload {
16430			break
16431		}
16432		i6 := x6.AuxInt
16433		s := x6.Aux
16434		mem := x6.Args[1]
16435		p := x6.Args[0]
16436		o4 := o5.Args[1]
16437		if o4.Op != OpPPC64OR || o4.Type != t {
16438			break
16439		}
16440		_ = o4.Args[1]
16441		o3 := o4.Args[0]
16442		if o3.Op != OpPPC64OR || o3.Type != t {
16443			break
16444		}
16445		_ = o3.Args[1]
16446		s3 := o3.Args[0]
16447		if s3.Op != OpPPC64SLDconst || s3.AuxInt != 32 {
16448			break
16449		}
16450		x4 := s3.Args[0]
16451		if x4.Op != OpPPC64MOVBZload {
16452			break
16453		}
16454		i4 := x4.AuxInt
16455		if x4.Aux != s {
16456			break
16457		}
16458		_ = x4.Args[1]
16459		if p != x4.Args[0] || mem != x4.Args[1] {
16460			break
16461		}
16462		x0 := o3.Args[1]
16463		if x0.Op != OpPPC64MOVWZload {
16464			break
16465		}
16466		i0 := x0.AuxInt
16467		if x0.Aux != s {
16468			break
16469		}
16470		_ = x0.Args[1]
16471		if p != x0.Args[0] || mem != x0.Args[1] {
16472			break
16473		}
16474		s4 := o4.Args[1]
16475		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 40 {
16476			break
16477		}
16478		x5 := s4.Args[0]
16479		if x5.Op != OpPPC64MOVBZload {
16480			break
16481		}
16482		i5 := x5.AuxInt
16483		if x5.Aux != s {
16484			break
16485		}
16486		_ = x5.Args[1]
16487		if p != x5.Args[0] || mem != x5.Args[1] {
16488			break
16489		}
16490		s6 := v.Args[1]
16491		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 56 {
16492			break
16493		}
16494		x7 := s6.Args[0]
16495		if x7.Op != OpPPC64MOVBZload {
16496			break
16497		}
16498		i7 := x7.AuxInt
16499		if x7.Aux != s {
16500			break
16501		}
16502		_ = x7.Args[1]
16503		if p != x7.Args[0] || mem != x7.Args[1] || !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
16504			break
16505		}
16506		b = mergePoint(b, x0, x4, x5, x6, x7)
16507		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDload, t)
16508		v.reset(OpCopy)
16509		v.AddArg(v0)
16510		v0.AuxInt = i0
16511		v0.Aux = s
16512		v0.AddArg(p)
16513		v0.AddArg(mem)
16514		return true
16515	}
16516	// match: (OR <t> o5:(OR <t> s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48]) o4:(OR <t> o3:(OR <t> x0:(MOVWZload {s} [i0] p mem) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]))) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
16517	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
16518	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
16519	for {
16520		t := v.Type
16521		_ = v.Args[1]
16522		o5 := v.Args[0]
16523		if o5.Op != OpPPC64OR || o5.Type != t {
16524			break
16525		}
16526		_ = o5.Args[1]
16527		s5 := o5.Args[0]
16528		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 48 {
16529			break
16530		}
16531		x6 := s5.Args[0]
16532		if x6.Op != OpPPC64MOVBZload {
16533			break
16534		}
16535		i6 := x6.AuxInt
16536		s := x6.Aux
16537		mem := x6.Args[1]
16538		p := x6.Args[0]
16539		o4 := o5.Args[1]
16540		if o4.Op != OpPPC64OR || o4.Type != t {
16541			break
16542		}
16543		_ = o4.Args[1]
16544		o3 := o4.Args[0]
16545		if o3.Op != OpPPC64OR || o3.Type != t {
16546			break
16547		}
16548		_ = o3.Args[1]
16549		x0 := o3.Args[0]
16550		if x0.Op != OpPPC64MOVWZload {
16551			break
16552		}
16553		i0 := x0.AuxInt
16554		if x0.Aux != s {
16555			break
16556		}
16557		_ = x0.Args[1]
16558		if p != x0.Args[0] || mem != x0.Args[1] {
16559			break
16560		}
16561		s3 := o3.Args[1]
16562		if s3.Op != OpPPC64SLDconst || s3.AuxInt != 32 {
16563			break
16564		}
16565		x4 := s3.Args[0]
16566		if x4.Op != OpPPC64MOVBZload {
16567			break
16568		}
16569		i4 := x4.AuxInt
16570		if x4.Aux != s {
16571			break
16572		}
16573		_ = x4.Args[1]
16574		if p != x4.Args[0] || mem != x4.Args[1] {
16575			break
16576		}
16577		s4 := o4.Args[1]
16578		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 40 {
16579			break
16580		}
16581		x5 := s4.Args[0]
16582		if x5.Op != OpPPC64MOVBZload {
16583			break
16584		}
16585		i5 := x5.AuxInt
16586		if x5.Aux != s {
16587			break
16588		}
16589		_ = x5.Args[1]
16590		if p != x5.Args[0] || mem != x5.Args[1] {
16591			break
16592		}
16593		s6 := v.Args[1]
16594		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 56 {
16595			break
16596		}
16597		x7 := s6.Args[0]
16598		if x7.Op != OpPPC64MOVBZload {
16599			break
16600		}
16601		i7 := x7.AuxInt
16602		if x7.Aux != s {
16603			break
16604		}
16605		_ = x7.Args[1]
16606		if p != x7.Args[0] || mem != x7.Args[1] || !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
16607			break
16608		}
16609		b = mergePoint(b, x0, x4, x5, x6, x7)
16610		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDload, t)
16611		v.reset(OpCopy)
16612		v.AddArg(v0)
16613		v0.AuxInt = i0
16614		v0.Aux = s
16615		v0.AddArg(p)
16616		v0.AddArg(mem)
16617		return true
16618	}
16619	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) x0:(MOVWZload {s} [i0] p mem))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
16620	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
16621	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
16622	for {
16623		t := v.Type
16624		_ = v.Args[1]
16625		o5 := v.Args[0]
16626		if o5.Op != OpPPC64OR || o5.Type != t {
16627			break
16628		}
16629		_ = o5.Args[1]
16630		o4 := o5.Args[0]
16631		if o4.Op != OpPPC64OR || o4.Type != t {
16632			break
16633		}
16634		_ = o4.Args[1]
16635		s4 := o4.Args[0]
16636		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 40 {
16637			break
16638		}
16639		x5 := s4.Args[0]
16640		if x5.Op != OpPPC64MOVBZload {
16641			break
16642		}
16643		i5 := x5.AuxInt
16644		s := x5.Aux
16645		mem := x5.Args[1]
16646		p := x5.Args[0]
16647		o3 := o4.Args[1]
16648		if o3.Op != OpPPC64OR || o3.Type != t {
16649			break
16650		}
16651		_ = o3.Args[1]
16652		s3 := o3.Args[0]
16653		if s3.Op != OpPPC64SLDconst || s3.AuxInt != 32 {
16654			break
16655		}
16656		x4 := s3.Args[0]
16657		if x4.Op != OpPPC64MOVBZload {
16658			break
16659		}
16660		i4 := x4.AuxInt
16661		if x4.Aux != s {
16662			break
16663		}
16664		_ = x4.Args[1]
16665		if p != x4.Args[0] || mem != x4.Args[1] {
16666			break
16667		}
16668		x0 := o3.Args[1]
16669		if x0.Op != OpPPC64MOVWZload {
16670			break
16671		}
16672		i0 := x0.AuxInt
16673		if x0.Aux != s {
16674			break
16675		}
16676		_ = x0.Args[1]
16677		if p != x0.Args[0] || mem != x0.Args[1] {
16678			break
16679		}
16680		s5 := o5.Args[1]
16681		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 48 {
16682			break
16683		}
16684		x6 := s5.Args[0]
16685		if x6.Op != OpPPC64MOVBZload {
16686			break
16687		}
16688		i6 := x6.AuxInt
16689		if x6.Aux != s {
16690			break
16691		}
16692		_ = x6.Args[1]
16693		if p != x6.Args[0] || mem != x6.Args[1] {
16694			break
16695		}
16696		s6 := v.Args[1]
16697		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 56 {
16698			break
16699		}
16700		x7 := s6.Args[0]
16701		if x7.Op != OpPPC64MOVBZload {
16702			break
16703		}
16704		i7 := x7.AuxInt
16705		if x7.Aux != s {
16706			break
16707		}
16708		_ = x7.Args[1]
16709		if p != x7.Args[0] || mem != x7.Args[1] || !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
16710			break
16711		}
16712		b = mergePoint(b, x0, x4, x5, x6, x7)
16713		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDload, t)
16714		v.reset(OpCopy)
16715		v.AddArg(v0)
16716		v0.AuxInt = i0
16717		v0.Aux = s
16718		v0.AddArg(p)
16719		v0.AddArg(mem)
16720		return true
16721	}
16722	// match: (OR <t> o5:(OR <t> o4:(OR <t> s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40]) o3:(OR <t> x0:(MOVWZload {s} [i0] p mem) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]))) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
16723	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
16724	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
16725	for {
16726		t := v.Type
16727		_ = v.Args[1]
16728		o5 := v.Args[0]
16729		if o5.Op != OpPPC64OR || o5.Type != t {
16730			break
16731		}
16732		_ = o5.Args[1]
16733		o4 := o5.Args[0]
16734		if o4.Op != OpPPC64OR || o4.Type != t {
16735			break
16736		}
16737		_ = o4.Args[1]
16738		s4 := o4.Args[0]
16739		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 40 {
16740			break
16741		}
16742		x5 := s4.Args[0]
16743		if x5.Op != OpPPC64MOVBZload {
16744			break
16745		}
16746		i5 := x5.AuxInt
16747		s := x5.Aux
16748		mem := x5.Args[1]
16749		p := x5.Args[0]
16750		o3 := o4.Args[1]
16751		if o3.Op != OpPPC64OR || o3.Type != t {
16752			break
16753		}
16754		_ = o3.Args[1]
16755		x0 := o3.Args[0]
16756		if x0.Op != OpPPC64MOVWZload {
16757			break
16758		}
16759		i0 := x0.AuxInt
16760		if x0.Aux != s {
16761			break
16762		}
16763		_ = x0.Args[1]
16764		if p != x0.Args[0] || mem != x0.Args[1] {
16765			break
16766		}
16767		s3 := o3.Args[1]
16768		if s3.Op != OpPPC64SLDconst || s3.AuxInt != 32 {
16769			break
16770		}
16771		x4 := s3.Args[0]
16772		if x4.Op != OpPPC64MOVBZload {
16773			break
16774		}
16775		i4 := x4.AuxInt
16776		if x4.Aux != s {
16777			break
16778		}
16779		_ = x4.Args[1]
16780		if p != x4.Args[0] || mem != x4.Args[1] {
16781			break
16782		}
16783		s5 := o5.Args[1]
16784		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 48 {
16785			break
16786		}
16787		x6 := s5.Args[0]
16788		if x6.Op != OpPPC64MOVBZload {
16789			break
16790		}
16791		i6 := x6.AuxInt
16792		if x6.Aux != s {
16793			break
16794		}
16795		_ = x6.Args[1]
16796		if p != x6.Args[0] || mem != x6.Args[1] {
16797			break
16798		}
16799		s6 := v.Args[1]
16800		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 56 {
16801			break
16802		}
16803		x7 := s6.Args[0]
16804		if x7.Op != OpPPC64MOVBZload {
16805			break
16806		}
16807		i7 := x7.AuxInt
16808		if x7.Aux != s {
16809			break
16810		}
16811		_ = x7.Args[1]
16812		if p != x7.Args[0] || mem != x7.Args[1] || !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
16813			break
16814		}
16815		b = mergePoint(b, x0, x4, x5, x6, x7)
16816		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDload, t)
16817		v.reset(OpCopy)
16818		v.AddArg(v0)
16819		v0.AuxInt = i0
16820		v0.Aux = s
16821		v0.AddArg(p)
16822		v0.AddArg(mem)
16823		return true
16824	}
16825	return false
16826}
16827func rewriteValuePPC64_OpPPC64OR_70(v *Value) bool {
16828	b := v.Block
16829	config := b.Func.Config
16830	typ := &b.Func.Config.Types
16831	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32]) x0:(MOVWZload {s} [i0] p mem)) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
16832	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
16833	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
16834	for {
16835		t := v.Type
16836		_ = v.Args[1]
16837		o5 := v.Args[0]
16838		if o5.Op != OpPPC64OR || o5.Type != t {
16839			break
16840		}
16841		_ = o5.Args[1]
16842		o4 := o5.Args[0]
16843		if o4.Op != OpPPC64OR || o4.Type != t {
16844			break
16845		}
16846		_ = o4.Args[1]
16847		o3 := o4.Args[0]
16848		if o3.Op != OpPPC64OR || o3.Type != t {
16849			break
16850		}
16851		_ = o3.Args[1]
16852		s3 := o3.Args[0]
16853		if s3.Op != OpPPC64SLDconst || s3.AuxInt != 32 {
16854			break
16855		}
16856		x4 := s3.Args[0]
16857		if x4.Op != OpPPC64MOVBZload {
16858			break
16859		}
16860		i4 := x4.AuxInt
16861		s := x4.Aux
16862		mem := x4.Args[1]
16863		p := x4.Args[0]
16864		x0 := o3.Args[1]
16865		if x0.Op != OpPPC64MOVWZload {
16866			break
16867		}
16868		i0 := x0.AuxInt
16869		if x0.Aux != s {
16870			break
16871		}
16872		_ = x0.Args[1]
16873		if p != x0.Args[0] || mem != x0.Args[1] {
16874			break
16875		}
16876		s4 := o4.Args[1]
16877		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 40 {
16878			break
16879		}
16880		x5 := s4.Args[0]
16881		if x5.Op != OpPPC64MOVBZload {
16882			break
16883		}
16884		i5 := x5.AuxInt
16885		if x5.Aux != s {
16886			break
16887		}
16888		_ = x5.Args[1]
16889		if p != x5.Args[0] || mem != x5.Args[1] {
16890			break
16891		}
16892		s5 := o5.Args[1]
16893		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 48 {
16894			break
16895		}
16896		x6 := s5.Args[0]
16897		if x6.Op != OpPPC64MOVBZload {
16898			break
16899		}
16900		i6 := x6.AuxInt
16901		if x6.Aux != s {
16902			break
16903		}
16904		_ = x6.Args[1]
16905		if p != x6.Args[0] || mem != x6.Args[1] {
16906			break
16907		}
16908		s6 := v.Args[1]
16909		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 56 {
16910			break
16911		}
16912		x7 := s6.Args[0]
16913		if x7.Op != OpPPC64MOVBZload {
16914			break
16915		}
16916		i7 := x7.AuxInt
16917		if x7.Aux != s {
16918			break
16919		}
16920		_ = x7.Args[1]
16921		if p != x7.Args[0] || mem != x7.Args[1] || !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
16922			break
16923		}
16924		b = mergePoint(b, x0, x4, x5, x6, x7)
16925		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDload, t)
16926		v.reset(OpCopy)
16927		v.AddArg(v0)
16928		v0.AuxInt = i0
16929		v0.Aux = s
16930		v0.AddArg(p)
16931		v0.AddArg(mem)
16932		return true
16933	}
16934	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> x0:(MOVWZload {s} [i0] p mem) s3:(SLDconst x4:(MOVBZload [i4] {s} p mem) [32])) s4:(SLDconst x5:(MOVBZload [i5] {s} p mem) [40])) s5:(SLDconst x6:(MOVBZload [i6] {s} p mem) [48])) s6:(SLDconst x7:(MOVBZload [i7] {s} p mem) [56]))
16935	// cond: !config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses ==1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber (s6) && clobber(o3) && clobber(o4) && clobber(o5)
16936	// result: @mergePoint(b,x0,x4,x5,x6,x7) (MOVDload <t> {s} [i0] p mem)
16937	for {
16938		t := v.Type
16939		_ = v.Args[1]
16940		o5 := v.Args[0]
16941		if o5.Op != OpPPC64OR || o5.Type != t {
16942			break
16943		}
16944		_ = o5.Args[1]
16945		o4 := o5.Args[0]
16946		if o4.Op != OpPPC64OR || o4.Type != t {
16947			break
16948		}
16949		_ = o4.Args[1]
16950		o3 := o4.Args[0]
16951		if o3.Op != OpPPC64OR || o3.Type != t {
16952			break
16953		}
16954		_ = o3.Args[1]
16955		x0 := o3.Args[0]
16956		if x0.Op != OpPPC64MOVWZload {
16957			break
16958		}
16959		i0 := x0.AuxInt
16960		s := x0.Aux
16961		mem := x0.Args[1]
16962		p := x0.Args[0]
16963		s3 := o3.Args[1]
16964		if s3.Op != OpPPC64SLDconst || s3.AuxInt != 32 {
16965			break
16966		}
16967		x4 := s3.Args[0]
16968		if x4.Op != OpPPC64MOVBZload {
16969			break
16970		}
16971		i4 := x4.AuxInt
16972		if x4.Aux != s {
16973			break
16974		}
16975		_ = x4.Args[1]
16976		if p != x4.Args[0] || mem != x4.Args[1] {
16977			break
16978		}
16979		s4 := o4.Args[1]
16980		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 40 {
16981			break
16982		}
16983		x5 := s4.Args[0]
16984		if x5.Op != OpPPC64MOVBZload {
16985			break
16986		}
16987		i5 := x5.AuxInt
16988		if x5.Aux != s {
16989			break
16990		}
16991		_ = x5.Args[1]
16992		if p != x5.Args[0] || mem != x5.Args[1] {
16993			break
16994		}
16995		s5 := o5.Args[1]
16996		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 48 {
16997			break
16998		}
16999		x6 := s5.Args[0]
17000		if x6.Op != OpPPC64MOVBZload {
17001			break
17002		}
17003		i6 := x6.AuxInt
17004		if x6.Aux != s {
17005			break
17006		}
17007		_ = x6.Args[1]
17008		if p != x6.Args[0] || mem != x6.Args[1] {
17009			break
17010		}
17011		s6 := v.Args[1]
17012		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 56 {
17013			break
17014		}
17015		x7 := s6.Args[0]
17016		if x7.Op != OpPPC64MOVBZload {
17017			break
17018		}
17019		i7 := x7.AuxInt
17020		if x7.Aux != s {
17021			break
17022		}
17023		_ = x7.Args[1]
17024		if p != x7.Args[0] || mem != x7.Args[1] || !(!config.BigEndian && i0%4 == 0 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x0, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o3) && clobber(o4) && clobber(o5)) {
17025			break
17026		}
17027		b = mergePoint(b, x0, x4, x5, x6, x7)
17028		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDload, t)
17029		v.reset(OpCopy)
17030		v.AddArg(v0)
17031		v0.AuxInt = i0
17032		v0.Aux = s
17033		v0.AddArg(p)
17034		v0.AddArg(mem)
17035		return true
17036	}
17037	// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) o1:(OR <t> s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]) o2:(OR <t> s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]) x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem)))))
17038	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
17039	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
17040	for {
17041		t := v.Type
17042		_ = v.Args[1]
17043		s0 := v.Args[0]
17044		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 56 {
17045			break
17046		}
17047		x0 := s0.Args[0]
17048		if x0.Op != OpPPC64MOVBZload {
17049			break
17050		}
17051		i0 := x0.AuxInt
17052		s := x0.Aux
17053		mem := x0.Args[1]
17054		p := x0.Args[0]
17055		o0 := v.Args[1]
17056		if o0.Op != OpPPC64OR || o0.Type != t {
17057			break
17058		}
17059		_ = o0.Args[1]
17060		s1 := o0.Args[0]
17061		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 48 {
17062			break
17063		}
17064		x1 := s1.Args[0]
17065		if x1.Op != OpPPC64MOVBZload {
17066			break
17067		}
17068		i1 := x1.AuxInt
17069		if x1.Aux != s {
17070			break
17071		}
17072		_ = x1.Args[1]
17073		if p != x1.Args[0] || mem != x1.Args[1] {
17074			break
17075		}
17076		o1 := o0.Args[1]
17077		if o1.Op != OpPPC64OR || o1.Type != t {
17078			break
17079		}
17080		_ = o1.Args[1]
17081		s2 := o1.Args[0]
17082		if s2.Op != OpPPC64SLDconst || s2.AuxInt != 40 {
17083			break
17084		}
17085		x2 := s2.Args[0]
17086		if x2.Op != OpPPC64MOVBZload {
17087			break
17088		}
17089		i2 := x2.AuxInt
17090		if x2.Aux != s {
17091			break
17092		}
17093		_ = x2.Args[1]
17094		if p != x2.Args[0] || mem != x2.Args[1] {
17095			break
17096		}
17097		o2 := o1.Args[1]
17098		if o2.Op != OpPPC64OR || o2.Type != t {
17099			break
17100		}
17101		_ = o2.Args[1]
17102		s3 := o2.Args[0]
17103		if s3.Op != OpPPC64SLDconst || s3.AuxInt != 32 {
17104			break
17105		}
17106		x3 := s3.Args[0]
17107		if x3.Op != OpPPC64MOVBZload {
17108			break
17109		}
17110		i3 := x3.AuxInt
17111		if x3.Aux != s {
17112			break
17113		}
17114		_ = x3.Args[1]
17115		if p != x3.Args[0] || mem != x3.Args[1] {
17116			break
17117		}
17118		x4 := o2.Args[1]
17119		if x4.Op != OpPPC64MOVWBRload || x4.Type != t {
17120			break
17121		}
17122		_ = x4.Args[1]
17123		x4_0 := x4.Args[0]
17124		if x4_0.Op != OpPPC64MOVDaddr || x4_0.Type != typ.Uintptr {
17125			break
17126		}
17127		i4 := x4_0.AuxInt
17128		if p != x4_0.Args[0] || mem != x4.Args[1] || !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
17129			break
17130		}
17131		b = mergePoint(b, x0, x1, x2, x3, x4)
17132		v0 := b.NewValue0(x4.Pos, OpPPC64MOVDBRload, t)
17133		v.reset(OpCopy)
17134		v.AddArg(v0)
17135		v1 := b.NewValue0(x4.Pos, OpPPC64MOVDaddr, typ.Uintptr)
17136		v1.AuxInt = i0
17137		v1.Aux = s
17138		v1.AddArg(p)
17139		v0.AddArg(v1)
17140		v0.AddArg(mem)
17141		return true
17142	}
17143	// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) o1:(OR <t> s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]) o2:(OR <t> x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem) s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32])))))
17144	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
17145	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
17146	for {
17147		t := v.Type
17148		_ = v.Args[1]
17149		s0 := v.Args[0]
17150		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 56 {
17151			break
17152		}
17153		x0 := s0.Args[0]
17154		if x0.Op != OpPPC64MOVBZload {
17155			break
17156		}
17157		i0 := x0.AuxInt
17158		s := x0.Aux
17159		mem := x0.Args[1]
17160		p := x0.Args[0]
17161		o0 := v.Args[1]
17162		if o0.Op != OpPPC64OR || o0.Type != t {
17163			break
17164		}
17165		_ = o0.Args[1]
17166		s1 := o0.Args[0]
17167		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 48 {
17168			break
17169		}
17170		x1 := s1.Args[0]
17171		if x1.Op != OpPPC64MOVBZload {
17172			break
17173		}
17174		i1 := x1.AuxInt
17175		if x1.Aux != s {
17176			break
17177		}
17178		_ = x1.Args[1]
17179		if p != x1.Args[0] || mem != x1.Args[1] {
17180			break
17181		}
17182		o1 := o0.Args[1]
17183		if o1.Op != OpPPC64OR || o1.Type != t {
17184			break
17185		}
17186		_ = o1.Args[1]
17187		s2 := o1.Args[0]
17188		if s2.Op != OpPPC64SLDconst || s2.AuxInt != 40 {
17189			break
17190		}
17191		x2 := s2.Args[0]
17192		if x2.Op != OpPPC64MOVBZload {
17193			break
17194		}
17195		i2 := x2.AuxInt
17196		if x2.Aux != s {
17197			break
17198		}
17199		_ = x2.Args[1]
17200		if p != x2.Args[0] || mem != x2.Args[1] {
17201			break
17202		}
17203		o2 := o1.Args[1]
17204		if o2.Op != OpPPC64OR || o2.Type != t {
17205			break
17206		}
17207		_ = o2.Args[1]
17208		x4 := o2.Args[0]
17209		if x4.Op != OpPPC64MOVWBRload || x4.Type != t {
17210			break
17211		}
17212		_ = x4.Args[1]
17213		x4_0 := x4.Args[0]
17214		if x4_0.Op != OpPPC64MOVDaddr || x4_0.Type != typ.Uintptr {
17215			break
17216		}
17217		i4 := x4_0.AuxInt
17218		if p != x4_0.Args[0] || mem != x4.Args[1] {
17219			break
17220		}
17221		s3 := o2.Args[1]
17222		if s3.Op != OpPPC64SLDconst || s3.AuxInt != 32 {
17223			break
17224		}
17225		x3 := s3.Args[0]
17226		if x3.Op != OpPPC64MOVBZload {
17227			break
17228		}
17229		i3 := x3.AuxInt
17230		if x3.Aux != s {
17231			break
17232		}
17233		_ = x3.Args[1]
17234		if p != x3.Args[0] || mem != x3.Args[1] || !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
17235			break
17236		}
17237		b = mergePoint(b, x0, x1, x2, x3, x4)
17238		v0 := b.NewValue0(x3.Pos, OpPPC64MOVDBRload, t)
17239		v.reset(OpCopy)
17240		v.AddArg(v0)
17241		v1 := b.NewValue0(x3.Pos, OpPPC64MOVDaddr, typ.Uintptr)
17242		v1.AuxInt = i0
17243		v1.Aux = s
17244		v1.AddArg(p)
17245		v0.AddArg(v1)
17246		v0.AddArg(mem)
17247		return true
17248	}
17249	// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) o1:(OR <t> o2:(OR <t> s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]) x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem)) s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]))))
17250	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
17251	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
17252	for {
17253		t := v.Type
17254		_ = v.Args[1]
17255		s0 := v.Args[0]
17256		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 56 {
17257			break
17258		}
17259		x0 := s0.Args[0]
17260		if x0.Op != OpPPC64MOVBZload {
17261			break
17262		}
17263		i0 := x0.AuxInt
17264		s := x0.Aux
17265		mem := x0.Args[1]
17266		p := x0.Args[0]
17267		o0 := v.Args[1]
17268		if o0.Op != OpPPC64OR || o0.Type != t {
17269			break
17270		}
17271		_ = o0.Args[1]
17272		s1 := o0.Args[0]
17273		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 48 {
17274			break
17275		}
17276		x1 := s1.Args[0]
17277		if x1.Op != OpPPC64MOVBZload {
17278			break
17279		}
17280		i1 := x1.AuxInt
17281		if x1.Aux != s {
17282			break
17283		}
17284		_ = x1.Args[1]
17285		if p != x1.Args[0] || mem != x1.Args[1] {
17286			break
17287		}
17288		o1 := o0.Args[1]
17289		if o1.Op != OpPPC64OR || o1.Type != t {
17290			break
17291		}
17292		_ = o1.Args[1]
17293		o2 := o1.Args[0]
17294		if o2.Op != OpPPC64OR || o2.Type != t {
17295			break
17296		}
17297		_ = o2.Args[1]
17298		s3 := o2.Args[0]
17299		if s3.Op != OpPPC64SLDconst || s3.AuxInt != 32 {
17300			break
17301		}
17302		x3 := s3.Args[0]
17303		if x3.Op != OpPPC64MOVBZload {
17304			break
17305		}
17306		i3 := x3.AuxInt
17307		if x3.Aux != s {
17308			break
17309		}
17310		_ = x3.Args[1]
17311		if p != x3.Args[0] || mem != x3.Args[1] {
17312			break
17313		}
17314		x4 := o2.Args[1]
17315		if x4.Op != OpPPC64MOVWBRload || x4.Type != t {
17316			break
17317		}
17318		_ = x4.Args[1]
17319		x4_0 := x4.Args[0]
17320		if x4_0.Op != OpPPC64MOVDaddr || x4_0.Type != typ.Uintptr {
17321			break
17322		}
17323		i4 := x4_0.AuxInt
17324		if p != x4_0.Args[0] || mem != x4.Args[1] {
17325			break
17326		}
17327		s2 := o1.Args[1]
17328		if s2.Op != OpPPC64SLDconst || s2.AuxInt != 40 {
17329			break
17330		}
17331		x2 := s2.Args[0]
17332		if x2.Op != OpPPC64MOVBZload {
17333			break
17334		}
17335		i2 := x2.AuxInt
17336		if x2.Aux != s {
17337			break
17338		}
17339		_ = x2.Args[1]
17340		if p != x2.Args[0] || mem != x2.Args[1] || !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
17341			break
17342		}
17343		b = mergePoint(b, x0, x1, x2, x3, x4)
17344		v0 := b.NewValue0(x2.Pos, OpPPC64MOVDBRload, t)
17345		v.reset(OpCopy)
17346		v.AddArg(v0)
17347		v1 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
17348		v1.AuxInt = i0
17349		v1.Aux = s
17350		v1.AddArg(p)
17351		v0.AddArg(v1)
17352		v0.AddArg(mem)
17353		return true
17354	}
17355	// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) o1:(OR <t> o2:(OR <t> x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem) s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32])) s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]))))
17356	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
17357	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
17358	for {
17359		t := v.Type
17360		_ = v.Args[1]
17361		s0 := v.Args[0]
17362		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 56 {
17363			break
17364		}
17365		x0 := s0.Args[0]
17366		if x0.Op != OpPPC64MOVBZload {
17367			break
17368		}
17369		i0 := x0.AuxInt
17370		s := x0.Aux
17371		mem := x0.Args[1]
17372		p := x0.Args[0]
17373		o0 := v.Args[1]
17374		if o0.Op != OpPPC64OR || o0.Type != t {
17375			break
17376		}
17377		_ = o0.Args[1]
17378		s1 := o0.Args[0]
17379		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 48 {
17380			break
17381		}
17382		x1 := s1.Args[0]
17383		if x1.Op != OpPPC64MOVBZload {
17384			break
17385		}
17386		i1 := x1.AuxInt
17387		if x1.Aux != s {
17388			break
17389		}
17390		_ = x1.Args[1]
17391		if p != x1.Args[0] || mem != x1.Args[1] {
17392			break
17393		}
17394		o1 := o0.Args[1]
17395		if o1.Op != OpPPC64OR || o1.Type != t {
17396			break
17397		}
17398		_ = o1.Args[1]
17399		o2 := o1.Args[0]
17400		if o2.Op != OpPPC64OR || o2.Type != t {
17401			break
17402		}
17403		_ = o2.Args[1]
17404		x4 := o2.Args[0]
17405		if x4.Op != OpPPC64MOVWBRload || x4.Type != t {
17406			break
17407		}
17408		_ = x4.Args[1]
17409		x4_0 := x4.Args[0]
17410		if x4_0.Op != OpPPC64MOVDaddr || x4_0.Type != typ.Uintptr {
17411			break
17412		}
17413		i4 := x4_0.AuxInt
17414		if p != x4_0.Args[0] || mem != x4.Args[1] {
17415			break
17416		}
17417		s3 := o2.Args[1]
17418		if s3.Op != OpPPC64SLDconst || s3.AuxInt != 32 {
17419			break
17420		}
17421		x3 := s3.Args[0]
17422		if x3.Op != OpPPC64MOVBZload {
17423			break
17424		}
17425		i3 := x3.AuxInt
17426		if x3.Aux != s {
17427			break
17428		}
17429		_ = x3.Args[1]
17430		if p != x3.Args[0] || mem != x3.Args[1] {
17431			break
17432		}
17433		s2 := o1.Args[1]
17434		if s2.Op != OpPPC64SLDconst || s2.AuxInt != 40 {
17435			break
17436		}
17437		x2 := s2.Args[0]
17438		if x2.Op != OpPPC64MOVBZload {
17439			break
17440		}
17441		i2 := x2.AuxInt
17442		if x2.Aux != s {
17443			break
17444		}
17445		_ = x2.Args[1]
17446		if p != x2.Args[0] || mem != x2.Args[1] || !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
17447			break
17448		}
17449		b = mergePoint(b, x0, x1, x2, x3, x4)
17450		v0 := b.NewValue0(x2.Pos, OpPPC64MOVDBRload, t)
17451		v.reset(OpCopy)
17452		v.AddArg(v0)
17453		v1 := b.NewValue0(x2.Pos, OpPPC64MOVDaddr, typ.Uintptr)
17454		v1.AuxInt = i0
17455		v1.Aux = s
17456		v1.AddArg(p)
17457		v0.AddArg(v1)
17458		v0.AddArg(mem)
17459		return true
17460	}
17461	// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> o1:(OR <t> s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]) o2:(OR <t> s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]) x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem))) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])))
17462	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
17463	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
17464	for {
17465		t := v.Type
17466		_ = v.Args[1]
17467		s0 := v.Args[0]
17468		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 56 {
17469			break
17470		}
17471		x0 := s0.Args[0]
17472		if x0.Op != OpPPC64MOVBZload {
17473			break
17474		}
17475		i0 := x0.AuxInt
17476		s := x0.Aux
17477		mem := x0.Args[1]
17478		p := x0.Args[0]
17479		o0 := v.Args[1]
17480		if o0.Op != OpPPC64OR || o0.Type != t {
17481			break
17482		}
17483		_ = o0.Args[1]
17484		o1 := o0.Args[0]
17485		if o1.Op != OpPPC64OR || o1.Type != t {
17486			break
17487		}
17488		_ = o1.Args[1]
17489		s2 := o1.Args[0]
17490		if s2.Op != OpPPC64SLDconst || s2.AuxInt != 40 {
17491			break
17492		}
17493		x2 := s2.Args[0]
17494		if x2.Op != OpPPC64MOVBZload {
17495			break
17496		}
17497		i2 := x2.AuxInt
17498		if x2.Aux != s {
17499			break
17500		}
17501		_ = x2.Args[1]
17502		if p != x2.Args[0] || mem != x2.Args[1] {
17503			break
17504		}
17505		o2 := o1.Args[1]
17506		if o2.Op != OpPPC64OR || o2.Type != t {
17507			break
17508		}
17509		_ = o2.Args[1]
17510		s3 := o2.Args[0]
17511		if s3.Op != OpPPC64SLDconst || s3.AuxInt != 32 {
17512			break
17513		}
17514		x3 := s3.Args[0]
17515		if x3.Op != OpPPC64MOVBZload {
17516			break
17517		}
17518		i3 := x3.AuxInt
17519		if x3.Aux != s {
17520			break
17521		}
17522		_ = x3.Args[1]
17523		if p != x3.Args[0] || mem != x3.Args[1] {
17524			break
17525		}
17526		x4 := o2.Args[1]
17527		if x4.Op != OpPPC64MOVWBRload || x4.Type != t {
17528			break
17529		}
17530		_ = x4.Args[1]
17531		x4_0 := x4.Args[0]
17532		if x4_0.Op != OpPPC64MOVDaddr || x4_0.Type != typ.Uintptr {
17533			break
17534		}
17535		i4 := x4_0.AuxInt
17536		if p != x4_0.Args[0] || mem != x4.Args[1] {
17537			break
17538		}
17539		s1 := o0.Args[1]
17540		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 48 {
17541			break
17542		}
17543		x1 := s1.Args[0]
17544		if x1.Op != OpPPC64MOVBZload {
17545			break
17546		}
17547		i1 := x1.AuxInt
17548		if x1.Aux != s {
17549			break
17550		}
17551		_ = x1.Args[1]
17552		if p != x1.Args[0] || mem != x1.Args[1] || !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
17553			break
17554		}
17555		b = mergePoint(b, x0, x1, x2, x3, x4)
17556		v0 := b.NewValue0(x1.Pos, OpPPC64MOVDBRload, t)
17557		v.reset(OpCopy)
17558		v.AddArg(v0)
17559		v1 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
17560		v1.AuxInt = i0
17561		v1.Aux = s
17562		v1.AddArg(p)
17563		v0.AddArg(v1)
17564		v0.AddArg(mem)
17565		return true
17566	}
17567	// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> o1:(OR <t> s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]) o2:(OR <t> x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem) s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]))) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])))
17568	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
17569	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
17570	for {
17571		t := v.Type
17572		_ = v.Args[1]
17573		s0 := v.Args[0]
17574		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 56 {
17575			break
17576		}
17577		x0 := s0.Args[0]
17578		if x0.Op != OpPPC64MOVBZload {
17579			break
17580		}
17581		i0 := x0.AuxInt
17582		s := x0.Aux
17583		mem := x0.Args[1]
17584		p := x0.Args[0]
17585		o0 := v.Args[1]
17586		if o0.Op != OpPPC64OR || o0.Type != t {
17587			break
17588		}
17589		_ = o0.Args[1]
17590		o1 := o0.Args[0]
17591		if o1.Op != OpPPC64OR || o1.Type != t {
17592			break
17593		}
17594		_ = o1.Args[1]
17595		s2 := o1.Args[0]
17596		if s2.Op != OpPPC64SLDconst || s2.AuxInt != 40 {
17597			break
17598		}
17599		x2 := s2.Args[0]
17600		if x2.Op != OpPPC64MOVBZload {
17601			break
17602		}
17603		i2 := x2.AuxInt
17604		if x2.Aux != s {
17605			break
17606		}
17607		_ = x2.Args[1]
17608		if p != x2.Args[0] || mem != x2.Args[1] {
17609			break
17610		}
17611		o2 := o1.Args[1]
17612		if o2.Op != OpPPC64OR || o2.Type != t {
17613			break
17614		}
17615		_ = o2.Args[1]
17616		x4 := o2.Args[0]
17617		if x4.Op != OpPPC64MOVWBRload || x4.Type != t {
17618			break
17619		}
17620		_ = x4.Args[1]
17621		x4_0 := x4.Args[0]
17622		if x4_0.Op != OpPPC64MOVDaddr || x4_0.Type != typ.Uintptr {
17623			break
17624		}
17625		i4 := x4_0.AuxInt
17626		if p != x4_0.Args[0] || mem != x4.Args[1] {
17627			break
17628		}
17629		s3 := o2.Args[1]
17630		if s3.Op != OpPPC64SLDconst || s3.AuxInt != 32 {
17631			break
17632		}
17633		x3 := s3.Args[0]
17634		if x3.Op != OpPPC64MOVBZload {
17635			break
17636		}
17637		i3 := x3.AuxInt
17638		if x3.Aux != s {
17639			break
17640		}
17641		_ = x3.Args[1]
17642		if p != x3.Args[0] || mem != x3.Args[1] {
17643			break
17644		}
17645		s1 := o0.Args[1]
17646		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 48 {
17647			break
17648		}
17649		x1 := s1.Args[0]
17650		if x1.Op != OpPPC64MOVBZload {
17651			break
17652		}
17653		i1 := x1.AuxInt
17654		if x1.Aux != s {
17655			break
17656		}
17657		_ = x1.Args[1]
17658		if p != x1.Args[0] || mem != x1.Args[1] || !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
17659			break
17660		}
17661		b = mergePoint(b, x0, x1, x2, x3, x4)
17662		v0 := b.NewValue0(x1.Pos, OpPPC64MOVDBRload, t)
17663		v.reset(OpCopy)
17664		v.AddArg(v0)
17665		v1 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
17666		v1.AuxInt = i0
17667		v1.Aux = s
17668		v1.AddArg(p)
17669		v0.AddArg(v1)
17670		v0.AddArg(mem)
17671		return true
17672	}
17673	// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> o1:(OR <t> o2:(OR <t> s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]) x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem)) s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40])) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])))
17674	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
17675	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
17676	for {
17677		t := v.Type
17678		_ = v.Args[1]
17679		s0 := v.Args[0]
17680		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 56 {
17681			break
17682		}
17683		x0 := s0.Args[0]
17684		if x0.Op != OpPPC64MOVBZload {
17685			break
17686		}
17687		i0 := x0.AuxInt
17688		s := x0.Aux
17689		mem := x0.Args[1]
17690		p := x0.Args[0]
17691		o0 := v.Args[1]
17692		if o0.Op != OpPPC64OR || o0.Type != t {
17693			break
17694		}
17695		_ = o0.Args[1]
17696		o1 := o0.Args[0]
17697		if o1.Op != OpPPC64OR || o1.Type != t {
17698			break
17699		}
17700		_ = o1.Args[1]
17701		o2 := o1.Args[0]
17702		if o2.Op != OpPPC64OR || o2.Type != t {
17703			break
17704		}
17705		_ = o2.Args[1]
17706		s3 := o2.Args[0]
17707		if s3.Op != OpPPC64SLDconst || s3.AuxInt != 32 {
17708			break
17709		}
17710		x3 := s3.Args[0]
17711		if x3.Op != OpPPC64MOVBZload {
17712			break
17713		}
17714		i3 := x3.AuxInt
17715		if x3.Aux != s {
17716			break
17717		}
17718		_ = x3.Args[1]
17719		if p != x3.Args[0] || mem != x3.Args[1] {
17720			break
17721		}
17722		x4 := o2.Args[1]
17723		if x4.Op != OpPPC64MOVWBRload || x4.Type != t {
17724			break
17725		}
17726		_ = x4.Args[1]
17727		x4_0 := x4.Args[0]
17728		if x4_0.Op != OpPPC64MOVDaddr || x4_0.Type != typ.Uintptr {
17729			break
17730		}
17731		i4 := x4_0.AuxInt
17732		if p != x4_0.Args[0] || mem != x4.Args[1] {
17733			break
17734		}
17735		s2 := o1.Args[1]
17736		if s2.Op != OpPPC64SLDconst || s2.AuxInt != 40 {
17737			break
17738		}
17739		x2 := s2.Args[0]
17740		if x2.Op != OpPPC64MOVBZload {
17741			break
17742		}
17743		i2 := x2.AuxInt
17744		if x2.Aux != s {
17745			break
17746		}
17747		_ = x2.Args[1]
17748		if p != x2.Args[0] || mem != x2.Args[1] {
17749			break
17750		}
17751		s1 := o0.Args[1]
17752		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 48 {
17753			break
17754		}
17755		x1 := s1.Args[0]
17756		if x1.Op != OpPPC64MOVBZload {
17757			break
17758		}
17759		i1 := x1.AuxInt
17760		if x1.Aux != s {
17761			break
17762		}
17763		_ = x1.Args[1]
17764		if p != x1.Args[0] || mem != x1.Args[1] || !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
17765			break
17766		}
17767		b = mergePoint(b, x0, x1, x2, x3, x4)
17768		v0 := b.NewValue0(x1.Pos, OpPPC64MOVDBRload, t)
17769		v.reset(OpCopy)
17770		v.AddArg(v0)
17771		v1 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
17772		v1.AuxInt = i0
17773		v1.Aux = s
17774		v1.AddArg(p)
17775		v0.AddArg(v1)
17776		v0.AddArg(mem)
17777		return true
17778	}
17779	// match: (OR <t> s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]) o0:(OR <t> o1:(OR <t> o2:(OR <t> x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem) s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32])) s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40])) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])))
17780	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
17781	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
17782	for {
17783		t := v.Type
17784		_ = v.Args[1]
17785		s0 := v.Args[0]
17786		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 56 {
17787			break
17788		}
17789		x0 := s0.Args[0]
17790		if x0.Op != OpPPC64MOVBZload {
17791			break
17792		}
17793		i0 := x0.AuxInt
17794		s := x0.Aux
17795		mem := x0.Args[1]
17796		p := x0.Args[0]
17797		o0 := v.Args[1]
17798		if o0.Op != OpPPC64OR || o0.Type != t {
17799			break
17800		}
17801		_ = o0.Args[1]
17802		o1 := o0.Args[0]
17803		if o1.Op != OpPPC64OR || o1.Type != t {
17804			break
17805		}
17806		_ = o1.Args[1]
17807		o2 := o1.Args[0]
17808		if o2.Op != OpPPC64OR || o2.Type != t {
17809			break
17810		}
17811		_ = o2.Args[1]
17812		x4 := o2.Args[0]
17813		if x4.Op != OpPPC64MOVWBRload || x4.Type != t {
17814			break
17815		}
17816		_ = x4.Args[1]
17817		x4_0 := x4.Args[0]
17818		if x4_0.Op != OpPPC64MOVDaddr || x4_0.Type != typ.Uintptr {
17819			break
17820		}
17821		i4 := x4_0.AuxInt
17822		if p != x4_0.Args[0] || mem != x4.Args[1] {
17823			break
17824		}
17825		s3 := o2.Args[1]
17826		if s3.Op != OpPPC64SLDconst || s3.AuxInt != 32 {
17827			break
17828		}
17829		x3 := s3.Args[0]
17830		if x3.Op != OpPPC64MOVBZload {
17831			break
17832		}
17833		i3 := x3.AuxInt
17834		if x3.Aux != s {
17835			break
17836		}
17837		_ = x3.Args[1]
17838		if p != x3.Args[0] || mem != x3.Args[1] {
17839			break
17840		}
17841		s2 := o1.Args[1]
17842		if s2.Op != OpPPC64SLDconst || s2.AuxInt != 40 {
17843			break
17844		}
17845		x2 := s2.Args[0]
17846		if x2.Op != OpPPC64MOVBZload {
17847			break
17848		}
17849		i2 := x2.AuxInt
17850		if x2.Aux != s {
17851			break
17852		}
17853		_ = x2.Args[1]
17854		if p != x2.Args[0] || mem != x2.Args[1] {
17855			break
17856		}
17857		s1 := o0.Args[1]
17858		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 48 {
17859			break
17860		}
17861		x1 := s1.Args[0]
17862		if x1.Op != OpPPC64MOVBZload {
17863			break
17864		}
17865		i1 := x1.AuxInt
17866		if x1.Aux != s {
17867			break
17868		}
17869		_ = x1.Args[1]
17870		if p != x1.Args[0] || mem != x1.Args[1] || !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
17871			break
17872		}
17873		b = mergePoint(b, x0, x1, x2, x3, x4)
17874		v0 := b.NewValue0(x1.Pos, OpPPC64MOVDBRload, t)
17875		v.reset(OpCopy)
17876		v.AddArg(v0)
17877		v1 := b.NewValue0(x1.Pos, OpPPC64MOVDaddr, typ.Uintptr)
17878		v1.AuxInt = i0
17879		v1.Aux = s
17880		v1.AddArg(p)
17881		v0.AddArg(v1)
17882		v0.AddArg(mem)
17883		return true
17884	}
17885	return false
17886}
17887func rewriteValuePPC64_OpPPC64OR_80(v *Value) bool {
17888	b := v.Block
17889	config := b.Func.Config
17890	typ := &b.Func.Config.Types
17891	// match: (OR <t> o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) o1:(OR <t> s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]) o2:(OR <t> s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]) x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem)))) s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]))
17892	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
17893	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
17894	for {
17895		t := v.Type
17896		_ = v.Args[1]
17897		o0 := v.Args[0]
17898		if o0.Op != OpPPC64OR || o0.Type != t {
17899			break
17900		}
17901		_ = o0.Args[1]
17902		s1 := o0.Args[0]
17903		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 48 {
17904			break
17905		}
17906		x1 := s1.Args[0]
17907		if x1.Op != OpPPC64MOVBZload {
17908			break
17909		}
17910		i1 := x1.AuxInt
17911		s := x1.Aux
17912		mem := x1.Args[1]
17913		p := x1.Args[0]
17914		o1 := o0.Args[1]
17915		if o1.Op != OpPPC64OR || o1.Type != t {
17916			break
17917		}
17918		_ = o1.Args[1]
17919		s2 := o1.Args[0]
17920		if s2.Op != OpPPC64SLDconst || s2.AuxInt != 40 {
17921			break
17922		}
17923		x2 := s2.Args[0]
17924		if x2.Op != OpPPC64MOVBZload {
17925			break
17926		}
17927		i2 := x2.AuxInt
17928		if x2.Aux != s {
17929			break
17930		}
17931		_ = x2.Args[1]
17932		if p != x2.Args[0] || mem != x2.Args[1] {
17933			break
17934		}
17935		o2 := o1.Args[1]
17936		if o2.Op != OpPPC64OR || o2.Type != t {
17937			break
17938		}
17939		_ = o2.Args[1]
17940		s3 := o2.Args[0]
17941		if s3.Op != OpPPC64SLDconst || s3.AuxInt != 32 {
17942			break
17943		}
17944		x3 := s3.Args[0]
17945		if x3.Op != OpPPC64MOVBZload {
17946			break
17947		}
17948		i3 := x3.AuxInt
17949		if x3.Aux != s {
17950			break
17951		}
17952		_ = x3.Args[1]
17953		if p != x3.Args[0] || mem != x3.Args[1] {
17954			break
17955		}
17956		x4 := o2.Args[1]
17957		if x4.Op != OpPPC64MOVWBRload || x4.Type != t {
17958			break
17959		}
17960		_ = x4.Args[1]
17961		x4_0 := x4.Args[0]
17962		if x4_0.Op != OpPPC64MOVDaddr || x4_0.Type != typ.Uintptr {
17963			break
17964		}
17965		i4 := x4_0.AuxInt
17966		if p != x4_0.Args[0] || mem != x4.Args[1] {
17967			break
17968		}
17969		s0 := v.Args[1]
17970		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 56 {
17971			break
17972		}
17973		x0 := s0.Args[0]
17974		if x0.Op != OpPPC64MOVBZload {
17975			break
17976		}
17977		i0 := x0.AuxInt
17978		if x0.Aux != s {
17979			break
17980		}
17981		_ = x0.Args[1]
17982		if p != x0.Args[0] || mem != x0.Args[1] || !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
17983			break
17984		}
17985		b = mergePoint(b, x0, x1, x2, x3, x4)
17986		v0 := b.NewValue0(x0.Pos, OpPPC64MOVDBRload, t)
17987		v.reset(OpCopy)
17988		v.AddArg(v0)
17989		v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
17990		v1.AuxInt = i0
17991		v1.Aux = s
17992		v1.AddArg(p)
17993		v0.AddArg(v1)
17994		v0.AddArg(mem)
17995		return true
17996	}
17997	// match: (OR <t> o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) o1:(OR <t> s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]) o2:(OR <t> x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem) s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32])))) s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]))
17998	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
17999	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
18000	for {
18001		t := v.Type
18002		_ = v.Args[1]
18003		o0 := v.Args[0]
18004		if o0.Op != OpPPC64OR || o0.Type != t {
18005			break
18006		}
18007		_ = o0.Args[1]
18008		s1 := o0.Args[0]
18009		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 48 {
18010			break
18011		}
18012		x1 := s1.Args[0]
18013		if x1.Op != OpPPC64MOVBZload {
18014			break
18015		}
18016		i1 := x1.AuxInt
18017		s := x1.Aux
18018		mem := x1.Args[1]
18019		p := x1.Args[0]
18020		o1 := o0.Args[1]
18021		if o1.Op != OpPPC64OR || o1.Type != t {
18022			break
18023		}
18024		_ = o1.Args[1]
18025		s2 := o1.Args[0]
18026		if s2.Op != OpPPC64SLDconst || s2.AuxInt != 40 {
18027			break
18028		}
18029		x2 := s2.Args[0]
18030		if x2.Op != OpPPC64MOVBZload {
18031			break
18032		}
18033		i2 := x2.AuxInt
18034		if x2.Aux != s {
18035			break
18036		}
18037		_ = x2.Args[1]
18038		if p != x2.Args[0] || mem != x2.Args[1] {
18039			break
18040		}
18041		o2 := o1.Args[1]
18042		if o2.Op != OpPPC64OR || o2.Type != t {
18043			break
18044		}
18045		_ = o2.Args[1]
18046		x4 := o2.Args[0]
18047		if x4.Op != OpPPC64MOVWBRload || x4.Type != t {
18048			break
18049		}
18050		_ = x4.Args[1]
18051		x4_0 := x4.Args[0]
18052		if x4_0.Op != OpPPC64MOVDaddr || x4_0.Type != typ.Uintptr {
18053			break
18054		}
18055		i4 := x4_0.AuxInt
18056		if p != x4_0.Args[0] || mem != x4.Args[1] {
18057			break
18058		}
18059		s3 := o2.Args[1]
18060		if s3.Op != OpPPC64SLDconst || s3.AuxInt != 32 {
18061			break
18062		}
18063		x3 := s3.Args[0]
18064		if x3.Op != OpPPC64MOVBZload {
18065			break
18066		}
18067		i3 := x3.AuxInt
18068		if x3.Aux != s {
18069			break
18070		}
18071		_ = x3.Args[1]
18072		if p != x3.Args[0] || mem != x3.Args[1] {
18073			break
18074		}
18075		s0 := v.Args[1]
18076		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 56 {
18077			break
18078		}
18079		x0 := s0.Args[0]
18080		if x0.Op != OpPPC64MOVBZload {
18081			break
18082		}
18083		i0 := x0.AuxInt
18084		if x0.Aux != s {
18085			break
18086		}
18087		_ = x0.Args[1]
18088		if p != x0.Args[0] || mem != x0.Args[1] || !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
18089			break
18090		}
18091		b = mergePoint(b, x0, x1, x2, x3, x4)
18092		v0 := b.NewValue0(x0.Pos, OpPPC64MOVDBRload, t)
18093		v.reset(OpCopy)
18094		v.AddArg(v0)
18095		v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
18096		v1.AuxInt = i0
18097		v1.Aux = s
18098		v1.AddArg(p)
18099		v0.AddArg(v1)
18100		v0.AddArg(mem)
18101		return true
18102	}
18103	// match: (OR <t> o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) o1:(OR <t> o2:(OR <t> s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]) x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem)) s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]))) s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]))
18104	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
18105	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
18106	for {
18107		t := v.Type
18108		_ = v.Args[1]
18109		o0 := v.Args[0]
18110		if o0.Op != OpPPC64OR || o0.Type != t {
18111			break
18112		}
18113		_ = o0.Args[1]
18114		s1 := o0.Args[0]
18115		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 48 {
18116			break
18117		}
18118		x1 := s1.Args[0]
18119		if x1.Op != OpPPC64MOVBZload {
18120			break
18121		}
18122		i1 := x1.AuxInt
18123		s := x1.Aux
18124		mem := x1.Args[1]
18125		p := x1.Args[0]
18126		o1 := o0.Args[1]
18127		if o1.Op != OpPPC64OR || o1.Type != t {
18128			break
18129		}
18130		_ = o1.Args[1]
18131		o2 := o1.Args[0]
18132		if o2.Op != OpPPC64OR || o2.Type != t {
18133			break
18134		}
18135		_ = o2.Args[1]
18136		s3 := o2.Args[0]
18137		if s3.Op != OpPPC64SLDconst || s3.AuxInt != 32 {
18138			break
18139		}
18140		x3 := s3.Args[0]
18141		if x3.Op != OpPPC64MOVBZload {
18142			break
18143		}
18144		i3 := x3.AuxInt
18145		if x3.Aux != s {
18146			break
18147		}
18148		_ = x3.Args[1]
18149		if p != x3.Args[0] || mem != x3.Args[1] {
18150			break
18151		}
18152		x4 := o2.Args[1]
18153		if x4.Op != OpPPC64MOVWBRload || x4.Type != t {
18154			break
18155		}
18156		_ = x4.Args[1]
18157		x4_0 := x4.Args[0]
18158		if x4_0.Op != OpPPC64MOVDaddr || x4_0.Type != typ.Uintptr {
18159			break
18160		}
18161		i4 := x4_0.AuxInt
18162		if p != x4_0.Args[0] || mem != x4.Args[1] {
18163			break
18164		}
18165		s2 := o1.Args[1]
18166		if s2.Op != OpPPC64SLDconst || s2.AuxInt != 40 {
18167			break
18168		}
18169		x2 := s2.Args[0]
18170		if x2.Op != OpPPC64MOVBZload {
18171			break
18172		}
18173		i2 := x2.AuxInt
18174		if x2.Aux != s {
18175			break
18176		}
18177		_ = x2.Args[1]
18178		if p != x2.Args[0] || mem != x2.Args[1] {
18179			break
18180		}
18181		s0 := v.Args[1]
18182		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 56 {
18183			break
18184		}
18185		x0 := s0.Args[0]
18186		if x0.Op != OpPPC64MOVBZload {
18187			break
18188		}
18189		i0 := x0.AuxInt
18190		if x0.Aux != s {
18191			break
18192		}
18193		_ = x0.Args[1]
18194		if p != x0.Args[0] || mem != x0.Args[1] || !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
18195			break
18196		}
18197		b = mergePoint(b, x0, x1, x2, x3, x4)
18198		v0 := b.NewValue0(x0.Pos, OpPPC64MOVDBRload, t)
18199		v.reset(OpCopy)
18200		v.AddArg(v0)
18201		v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
18202		v1.AuxInt = i0
18203		v1.Aux = s
18204		v1.AddArg(p)
18205		v0.AddArg(v1)
18206		v0.AddArg(mem)
18207		return true
18208	}
18209	// match: (OR <t> o0:(OR <t> s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48]) o1:(OR <t> o2:(OR <t> x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem) s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32])) s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]))) s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]))
18210	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
18211	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
18212	for {
18213		t := v.Type
18214		_ = v.Args[1]
18215		o0 := v.Args[0]
18216		if o0.Op != OpPPC64OR || o0.Type != t {
18217			break
18218		}
18219		_ = o0.Args[1]
18220		s1 := o0.Args[0]
18221		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 48 {
18222			break
18223		}
18224		x1 := s1.Args[0]
18225		if x1.Op != OpPPC64MOVBZload {
18226			break
18227		}
18228		i1 := x1.AuxInt
18229		s := x1.Aux
18230		mem := x1.Args[1]
18231		p := x1.Args[0]
18232		o1 := o0.Args[1]
18233		if o1.Op != OpPPC64OR || o1.Type != t {
18234			break
18235		}
18236		_ = o1.Args[1]
18237		o2 := o1.Args[0]
18238		if o2.Op != OpPPC64OR || o2.Type != t {
18239			break
18240		}
18241		_ = o2.Args[1]
18242		x4 := o2.Args[0]
18243		if x4.Op != OpPPC64MOVWBRload || x4.Type != t {
18244			break
18245		}
18246		_ = x4.Args[1]
18247		x4_0 := x4.Args[0]
18248		if x4_0.Op != OpPPC64MOVDaddr || x4_0.Type != typ.Uintptr {
18249			break
18250		}
18251		i4 := x4_0.AuxInt
18252		if p != x4_0.Args[0] || mem != x4.Args[1] {
18253			break
18254		}
18255		s3 := o2.Args[1]
18256		if s3.Op != OpPPC64SLDconst || s3.AuxInt != 32 {
18257			break
18258		}
18259		x3 := s3.Args[0]
18260		if x3.Op != OpPPC64MOVBZload {
18261			break
18262		}
18263		i3 := x3.AuxInt
18264		if x3.Aux != s {
18265			break
18266		}
18267		_ = x3.Args[1]
18268		if p != x3.Args[0] || mem != x3.Args[1] {
18269			break
18270		}
18271		s2 := o1.Args[1]
18272		if s2.Op != OpPPC64SLDconst || s2.AuxInt != 40 {
18273			break
18274		}
18275		x2 := s2.Args[0]
18276		if x2.Op != OpPPC64MOVBZload {
18277			break
18278		}
18279		i2 := x2.AuxInt
18280		if x2.Aux != s {
18281			break
18282		}
18283		_ = x2.Args[1]
18284		if p != x2.Args[0] || mem != x2.Args[1] {
18285			break
18286		}
18287		s0 := v.Args[1]
18288		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 56 {
18289			break
18290		}
18291		x0 := s0.Args[0]
18292		if x0.Op != OpPPC64MOVBZload {
18293			break
18294		}
18295		i0 := x0.AuxInt
18296		if x0.Aux != s {
18297			break
18298		}
18299		_ = x0.Args[1]
18300		if p != x0.Args[0] || mem != x0.Args[1] || !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
18301			break
18302		}
18303		b = mergePoint(b, x0, x1, x2, x3, x4)
18304		v0 := b.NewValue0(x0.Pos, OpPPC64MOVDBRload, t)
18305		v.reset(OpCopy)
18306		v.AddArg(v0)
18307		v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
18308		v1.AuxInt = i0
18309		v1.Aux = s
18310		v1.AddArg(p)
18311		v0.AddArg(v1)
18312		v0.AddArg(mem)
18313		return true
18314	}
18315	// match: (OR <t> o0:(OR <t> o1:(OR <t> s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]) o2:(OR <t> s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]) x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem))) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])) s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]))
18316	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
18317	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
18318	for {
18319		t := v.Type
18320		_ = v.Args[1]
18321		o0 := v.Args[0]
18322		if o0.Op != OpPPC64OR || o0.Type != t {
18323			break
18324		}
18325		_ = o0.Args[1]
18326		o1 := o0.Args[0]
18327		if o1.Op != OpPPC64OR || o1.Type != t {
18328			break
18329		}
18330		_ = o1.Args[1]
18331		s2 := o1.Args[0]
18332		if s2.Op != OpPPC64SLDconst || s2.AuxInt != 40 {
18333			break
18334		}
18335		x2 := s2.Args[0]
18336		if x2.Op != OpPPC64MOVBZload {
18337			break
18338		}
18339		i2 := x2.AuxInt
18340		s := x2.Aux
18341		mem := x2.Args[1]
18342		p := x2.Args[0]
18343		o2 := o1.Args[1]
18344		if o2.Op != OpPPC64OR || o2.Type != t {
18345			break
18346		}
18347		_ = o2.Args[1]
18348		s3 := o2.Args[0]
18349		if s3.Op != OpPPC64SLDconst || s3.AuxInt != 32 {
18350			break
18351		}
18352		x3 := s3.Args[0]
18353		if x3.Op != OpPPC64MOVBZload {
18354			break
18355		}
18356		i3 := x3.AuxInt
18357		if x3.Aux != s {
18358			break
18359		}
18360		_ = x3.Args[1]
18361		if p != x3.Args[0] || mem != x3.Args[1] {
18362			break
18363		}
18364		x4 := o2.Args[1]
18365		if x4.Op != OpPPC64MOVWBRload || x4.Type != t {
18366			break
18367		}
18368		_ = x4.Args[1]
18369		x4_0 := x4.Args[0]
18370		if x4_0.Op != OpPPC64MOVDaddr || x4_0.Type != typ.Uintptr {
18371			break
18372		}
18373		i4 := x4_0.AuxInt
18374		if p != x4_0.Args[0] || mem != x4.Args[1] {
18375			break
18376		}
18377		s1 := o0.Args[1]
18378		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 48 {
18379			break
18380		}
18381		x1 := s1.Args[0]
18382		if x1.Op != OpPPC64MOVBZload {
18383			break
18384		}
18385		i1 := x1.AuxInt
18386		if x1.Aux != s {
18387			break
18388		}
18389		_ = x1.Args[1]
18390		if p != x1.Args[0] || mem != x1.Args[1] {
18391			break
18392		}
18393		s0 := v.Args[1]
18394		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 56 {
18395			break
18396		}
18397		x0 := s0.Args[0]
18398		if x0.Op != OpPPC64MOVBZload {
18399			break
18400		}
18401		i0 := x0.AuxInt
18402		if x0.Aux != s {
18403			break
18404		}
18405		_ = x0.Args[1]
18406		if p != x0.Args[0] || mem != x0.Args[1] || !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
18407			break
18408		}
18409		b = mergePoint(b, x0, x1, x2, x3, x4)
18410		v0 := b.NewValue0(x0.Pos, OpPPC64MOVDBRload, t)
18411		v.reset(OpCopy)
18412		v.AddArg(v0)
18413		v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
18414		v1.AuxInt = i0
18415		v1.Aux = s
18416		v1.AddArg(p)
18417		v0.AddArg(v1)
18418		v0.AddArg(mem)
18419		return true
18420	}
18421	// match: (OR <t> o0:(OR <t> o1:(OR <t> s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40]) o2:(OR <t> x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem) s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]))) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])) s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]))
18422	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
18423	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
18424	for {
18425		t := v.Type
18426		_ = v.Args[1]
18427		o0 := v.Args[0]
18428		if o0.Op != OpPPC64OR || o0.Type != t {
18429			break
18430		}
18431		_ = o0.Args[1]
18432		o1 := o0.Args[0]
18433		if o1.Op != OpPPC64OR || o1.Type != t {
18434			break
18435		}
18436		_ = o1.Args[1]
18437		s2 := o1.Args[0]
18438		if s2.Op != OpPPC64SLDconst || s2.AuxInt != 40 {
18439			break
18440		}
18441		x2 := s2.Args[0]
18442		if x2.Op != OpPPC64MOVBZload {
18443			break
18444		}
18445		i2 := x2.AuxInt
18446		s := x2.Aux
18447		mem := x2.Args[1]
18448		p := x2.Args[0]
18449		o2 := o1.Args[1]
18450		if o2.Op != OpPPC64OR || o2.Type != t {
18451			break
18452		}
18453		_ = o2.Args[1]
18454		x4 := o2.Args[0]
18455		if x4.Op != OpPPC64MOVWBRload || x4.Type != t {
18456			break
18457		}
18458		_ = x4.Args[1]
18459		x4_0 := x4.Args[0]
18460		if x4_0.Op != OpPPC64MOVDaddr || x4_0.Type != typ.Uintptr {
18461			break
18462		}
18463		i4 := x4_0.AuxInt
18464		if p != x4_0.Args[0] || mem != x4.Args[1] {
18465			break
18466		}
18467		s3 := o2.Args[1]
18468		if s3.Op != OpPPC64SLDconst || s3.AuxInt != 32 {
18469			break
18470		}
18471		x3 := s3.Args[0]
18472		if x3.Op != OpPPC64MOVBZload {
18473			break
18474		}
18475		i3 := x3.AuxInt
18476		if x3.Aux != s {
18477			break
18478		}
18479		_ = x3.Args[1]
18480		if p != x3.Args[0] || mem != x3.Args[1] {
18481			break
18482		}
18483		s1 := o0.Args[1]
18484		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 48 {
18485			break
18486		}
18487		x1 := s1.Args[0]
18488		if x1.Op != OpPPC64MOVBZload {
18489			break
18490		}
18491		i1 := x1.AuxInt
18492		if x1.Aux != s {
18493			break
18494		}
18495		_ = x1.Args[1]
18496		if p != x1.Args[0] || mem != x1.Args[1] {
18497			break
18498		}
18499		s0 := v.Args[1]
18500		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 56 {
18501			break
18502		}
18503		x0 := s0.Args[0]
18504		if x0.Op != OpPPC64MOVBZload {
18505			break
18506		}
18507		i0 := x0.AuxInt
18508		if x0.Aux != s {
18509			break
18510		}
18511		_ = x0.Args[1]
18512		if p != x0.Args[0] || mem != x0.Args[1] || !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
18513			break
18514		}
18515		b = mergePoint(b, x0, x1, x2, x3, x4)
18516		v0 := b.NewValue0(x0.Pos, OpPPC64MOVDBRload, t)
18517		v.reset(OpCopy)
18518		v.AddArg(v0)
18519		v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
18520		v1.AuxInt = i0
18521		v1.Aux = s
18522		v1.AddArg(p)
18523		v0.AddArg(v1)
18524		v0.AddArg(mem)
18525		return true
18526	}
18527	// match: (OR <t> o0:(OR <t> o1:(OR <t> o2:(OR <t> s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32]) x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem)) s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40])) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])) s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]))
18528	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
18529	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
18530	for {
18531		t := v.Type
18532		_ = v.Args[1]
18533		o0 := v.Args[0]
18534		if o0.Op != OpPPC64OR || o0.Type != t {
18535			break
18536		}
18537		_ = o0.Args[1]
18538		o1 := o0.Args[0]
18539		if o1.Op != OpPPC64OR || o1.Type != t {
18540			break
18541		}
18542		_ = o1.Args[1]
18543		o2 := o1.Args[0]
18544		if o2.Op != OpPPC64OR || o2.Type != t {
18545			break
18546		}
18547		_ = o2.Args[1]
18548		s3 := o2.Args[0]
18549		if s3.Op != OpPPC64SLDconst || s3.AuxInt != 32 {
18550			break
18551		}
18552		x3 := s3.Args[0]
18553		if x3.Op != OpPPC64MOVBZload {
18554			break
18555		}
18556		i3 := x3.AuxInt
18557		s := x3.Aux
18558		mem := x3.Args[1]
18559		p := x3.Args[0]
18560		x4 := o2.Args[1]
18561		if x4.Op != OpPPC64MOVWBRload || x4.Type != t {
18562			break
18563		}
18564		_ = x4.Args[1]
18565		x4_0 := x4.Args[0]
18566		if x4_0.Op != OpPPC64MOVDaddr || x4_0.Type != typ.Uintptr {
18567			break
18568		}
18569		i4 := x4_0.AuxInt
18570		if p != x4_0.Args[0] || mem != x4.Args[1] {
18571			break
18572		}
18573		s2 := o1.Args[1]
18574		if s2.Op != OpPPC64SLDconst || s2.AuxInt != 40 {
18575			break
18576		}
18577		x2 := s2.Args[0]
18578		if x2.Op != OpPPC64MOVBZload {
18579			break
18580		}
18581		i2 := x2.AuxInt
18582		if x2.Aux != s {
18583			break
18584		}
18585		_ = x2.Args[1]
18586		if p != x2.Args[0] || mem != x2.Args[1] {
18587			break
18588		}
18589		s1 := o0.Args[1]
18590		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 48 {
18591			break
18592		}
18593		x1 := s1.Args[0]
18594		if x1.Op != OpPPC64MOVBZload {
18595			break
18596		}
18597		i1 := x1.AuxInt
18598		if x1.Aux != s {
18599			break
18600		}
18601		_ = x1.Args[1]
18602		if p != x1.Args[0] || mem != x1.Args[1] {
18603			break
18604		}
18605		s0 := v.Args[1]
18606		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 56 {
18607			break
18608		}
18609		x0 := s0.Args[0]
18610		if x0.Op != OpPPC64MOVBZload {
18611			break
18612		}
18613		i0 := x0.AuxInt
18614		if x0.Aux != s {
18615			break
18616		}
18617		_ = x0.Args[1]
18618		if p != x0.Args[0] || mem != x0.Args[1] || !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
18619			break
18620		}
18621		b = mergePoint(b, x0, x1, x2, x3, x4)
18622		v0 := b.NewValue0(x0.Pos, OpPPC64MOVDBRload, t)
18623		v.reset(OpCopy)
18624		v.AddArg(v0)
18625		v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
18626		v1.AuxInt = i0
18627		v1.Aux = s
18628		v1.AddArg(p)
18629		v0.AddArg(v1)
18630		v0.AddArg(mem)
18631		return true
18632	}
18633	// match: (OR <t> o0:(OR <t> o1:(OR <t> o2:(OR <t> x4:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i4] p) mem) s3:(SLDconst x3:(MOVBZload [i3] {s} p mem) [32])) s2:(SLDconst x2:(MOVBZload [i2] {s} p mem) [40])) s1:(SLDconst x1:(MOVBZload [i1] {s} p mem) [48])) s0:(SLDconst x0:(MOVBZload [i0] {s} p mem) [56]))
18634	// cond: !config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)
18635	// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
18636	for {
18637		t := v.Type
18638		_ = v.Args[1]
18639		o0 := v.Args[0]
18640		if o0.Op != OpPPC64OR || o0.Type != t {
18641			break
18642		}
18643		_ = o0.Args[1]
18644		o1 := o0.Args[0]
18645		if o1.Op != OpPPC64OR || o1.Type != t {
18646			break
18647		}
18648		_ = o1.Args[1]
18649		o2 := o1.Args[0]
18650		if o2.Op != OpPPC64OR || o2.Type != t {
18651			break
18652		}
18653		_ = o2.Args[1]
18654		x4 := o2.Args[0]
18655		if x4.Op != OpPPC64MOVWBRload || x4.Type != t {
18656			break
18657		}
18658		mem := x4.Args[1]
18659		x4_0 := x4.Args[0]
18660		if x4_0.Op != OpPPC64MOVDaddr || x4_0.Type != typ.Uintptr {
18661			break
18662		}
18663		i4 := x4_0.AuxInt
18664		p := x4_0.Args[0]
18665		s3 := o2.Args[1]
18666		if s3.Op != OpPPC64SLDconst || s3.AuxInt != 32 {
18667			break
18668		}
18669		x3 := s3.Args[0]
18670		if x3.Op != OpPPC64MOVBZload {
18671			break
18672		}
18673		i3 := x3.AuxInt
18674		s := x3.Aux
18675		_ = x3.Args[1]
18676		if p != x3.Args[0] || mem != x3.Args[1] {
18677			break
18678		}
18679		s2 := o1.Args[1]
18680		if s2.Op != OpPPC64SLDconst || s2.AuxInt != 40 {
18681			break
18682		}
18683		x2 := s2.Args[0]
18684		if x2.Op != OpPPC64MOVBZload {
18685			break
18686		}
18687		i2 := x2.AuxInt
18688		if x2.Aux != s {
18689			break
18690		}
18691		_ = x2.Args[1]
18692		if p != x2.Args[0] || mem != x2.Args[1] {
18693			break
18694		}
18695		s1 := o0.Args[1]
18696		if s1.Op != OpPPC64SLDconst || s1.AuxInt != 48 {
18697			break
18698		}
18699		x1 := s1.Args[0]
18700		if x1.Op != OpPPC64MOVBZload {
18701			break
18702		}
18703		i1 := x1.AuxInt
18704		if x1.Aux != s {
18705			break
18706		}
18707		_ = x1.Args[1]
18708		if p != x1.Args[0] || mem != x1.Args[1] {
18709			break
18710		}
18711		s0 := v.Args[1]
18712		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 56 {
18713			break
18714		}
18715		x0 := s0.Args[0]
18716		if x0.Op != OpPPC64MOVBZload {
18717			break
18718		}
18719		i0 := x0.AuxInt
18720		if x0.Aux != s {
18721			break
18722		}
18723		_ = x0.Args[1]
18724		if p != x0.Args[0] || mem != x0.Args[1] || !(!config.BigEndian && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3)) {
18725			break
18726		}
18727		b = mergePoint(b, x0, x1, x2, x3, x4)
18728		v0 := b.NewValue0(x0.Pos, OpPPC64MOVDBRload, t)
18729		v.reset(OpCopy)
18730		v.AddArg(v0)
18731		v1 := b.NewValue0(x0.Pos, OpPPC64MOVDaddr, typ.Uintptr)
18732		v1.AuxInt = i0
18733		v1.Aux = s
18734		v1.AddArg(p)
18735		v0.AddArg(v1)
18736		v0.AddArg(mem)
18737		return true
18738	}
18739	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])))))
18740	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
18741	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
18742	for {
18743		t := v.Type
18744		_ = v.Args[1]
18745		x7 := v.Args[0]
18746		if x7.Op != OpPPC64MOVBZload {
18747			break
18748		}
18749		i7 := x7.AuxInt
18750		s := x7.Aux
18751		mem := x7.Args[1]
18752		p := x7.Args[0]
18753		o5 := v.Args[1]
18754		if o5.Op != OpPPC64OR || o5.Type != t {
18755			break
18756		}
18757		_ = o5.Args[1]
18758		s6 := o5.Args[0]
18759		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 8 {
18760			break
18761		}
18762		x6 := s6.Args[0]
18763		if x6.Op != OpPPC64MOVBZload {
18764			break
18765		}
18766		i6 := x6.AuxInt
18767		if x6.Aux != s {
18768			break
18769		}
18770		_ = x6.Args[1]
18771		if p != x6.Args[0] || mem != x6.Args[1] {
18772			break
18773		}
18774		o4 := o5.Args[1]
18775		if o4.Op != OpPPC64OR || o4.Type != t {
18776			break
18777		}
18778		_ = o4.Args[1]
18779		s5 := o4.Args[0]
18780		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 16 {
18781			break
18782		}
18783		x5 := s5.Args[0]
18784		if x5.Op != OpPPC64MOVBZload {
18785			break
18786		}
18787		i5 := x5.AuxInt
18788		if x5.Aux != s {
18789			break
18790		}
18791		_ = x5.Args[1]
18792		if p != x5.Args[0] || mem != x5.Args[1] {
18793			break
18794		}
18795		o3 := o4.Args[1]
18796		if o3.Op != OpPPC64OR || o3.Type != t {
18797			break
18798		}
18799		_ = o3.Args[1]
18800		s4 := o3.Args[0]
18801		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 24 {
18802			break
18803		}
18804		x4 := s4.Args[0]
18805		if x4.Op != OpPPC64MOVBZload {
18806			break
18807		}
18808		i4 := x4.AuxInt
18809		if x4.Aux != s {
18810			break
18811		}
18812		_ = x4.Args[1]
18813		if p != x4.Args[0] || mem != x4.Args[1] {
18814			break
18815		}
18816		s0 := o3.Args[1]
18817		if s0.Op != OpPPC64SLWconst || s0.AuxInt != 32 {
18818			break
18819		}
18820		x3 := s0.Args[0]
18821		if x3.Op != OpPPC64MOVWBRload || x3.Type != t {
18822			break
18823		}
18824		_ = x3.Args[1]
18825		x3_0 := x3.Args[0]
18826		if x3_0.Op != OpPPC64MOVDaddr || x3_0.Type != typ.Uintptr {
18827			break
18828		}
18829		i0 := x3_0.AuxInt
18830		if x3_0.Aux != s || p != x3_0.Args[0] || mem != x3.Args[1] || !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
18831			break
18832		}
18833		b = mergePoint(b, x3, x4, x5, x6, x7)
18834		v0 := b.NewValue0(x3.Pos, OpPPC64MOVDBRload, t)
18835		v.reset(OpCopy)
18836		v.AddArg(v0)
18837		v1 := b.NewValue0(x3.Pos, OpPPC64MOVDaddr, typ.Uintptr)
18838		v1.AuxInt = i0
18839		v1.Aux = s
18840		v1.AddArg(p)
18841		v0.AddArg(v1)
18842		v0.AddArg(mem)
18843		return true
18844	}
18845	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])))))
18846	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
18847	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
18848	for {
18849		t := v.Type
18850		_ = v.Args[1]
18851		x7 := v.Args[0]
18852		if x7.Op != OpPPC64MOVBZload {
18853			break
18854		}
18855		i7 := x7.AuxInt
18856		s := x7.Aux
18857		mem := x7.Args[1]
18858		p := x7.Args[0]
18859		o5 := v.Args[1]
18860		if o5.Op != OpPPC64OR || o5.Type != t {
18861			break
18862		}
18863		_ = o5.Args[1]
18864		s6 := o5.Args[0]
18865		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 8 {
18866			break
18867		}
18868		x6 := s6.Args[0]
18869		if x6.Op != OpPPC64MOVBZload {
18870			break
18871		}
18872		i6 := x6.AuxInt
18873		if x6.Aux != s {
18874			break
18875		}
18876		_ = x6.Args[1]
18877		if p != x6.Args[0] || mem != x6.Args[1] {
18878			break
18879		}
18880		o4 := o5.Args[1]
18881		if o4.Op != OpPPC64OR || o4.Type != t {
18882			break
18883		}
18884		_ = o4.Args[1]
18885		s5 := o4.Args[0]
18886		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 16 {
18887			break
18888		}
18889		x5 := s5.Args[0]
18890		if x5.Op != OpPPC64MOVBZload {
18891			break
18892		}
18893		i5 := x5.AuxInt
18894		if x5.Aux != s {
18895			break
18896		}
18897		_ = x5.Args[1]
18898		if p != x5.Args[0] || mem != x5.Args[1] {
18899			break
18900		}
18901		o3 := o4.Args[1]
18902		if o3.Op != OpPPC64OR || o3.Type != t {
18903			break
18904		}
18905		_ = o3.Args[1]
18906		s0 := o3.Args[0]
18907		if s0.Op != OpPPC64SLWconst || s0.AuxInt != 32 {
18908			break
18909		}
18910		x3 := s0.Args[0]
18911		if x3.Op != OpPPC64MOVWBRload || x3.Type != t {
18912			break
18913		}
18914		_ = x3.Args[1]
18915		x3_0 := x3.Args[0]
18916		if x3_0.Op != OpPPC64MOVDaddr || x3_0.Type != typ.Uintptr {
18917			break
18918		}
18919		i0 := x3_0.AuxInt
18920		if x3_0.Aux != s || p != x3_0.Args[0] || mem != x3.Args[1] {
18921			break
18922		}
18923		s4 := o3.Args[1]
18924		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 24 {
18925			break
18926		}
18927		x4 := s4.Args[0]
18928		if x4.Op != OpPPC64MOVBZload {
18929			break
18930		}
18931		i4 := x4.AuxInt
18932		if x4.Aux != s {
18933			break
18934		}
18935		_ = x4.Args[1]
18936		if p != x4.Args[0] || mem != x4.Args[1] || !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
18937			break
18938		}
18939		b = mergePoint(b, x3, x4, x5, x6, x7)
18940		v0 := b.NewValue0(x4.Pos, OpPPC64MOVDBRload, t)
18941		v.reset(OpCopy)
18942		v.AddArg(v0)
18943		v1 := b.NewValue0(x4.Pos, OpPPC64MOVDaddr, typ.Uintptr)
18944		v1.AuxInt = i0
18945		v1.Aux = s
18946		v1.AddArg(p)
18947		v0.AddArg(v1)
18948		v0.AddArg(mem)
18949		return true
18950	}
18951	return false
18952}
18953func rewriteValuePPC64_OpPPC64OR_90(v *Value) bool {
18954	b := v.Block
18955	config := b.Func.Config
18956	typ := &b.Func.Config.Types
18957	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]))))
18958	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
18959	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
18960	for {
18961		t := v.Type
18962		_ = v.Args[1]
18963		x7 := v.Args[0]
18964		if x7.Op != OpPPC64MOVBZload {
18965			break
18966		}
18967		i7 := x7.AuxInt
18968		s := x7.Aux
18969		mem := x7.Args[1]
18970		p := x7.Args[0]
18971		o5 := v.Args[1]
18972		if o5.Op != OpPPC64OR || o5.Type != t {
18973			break
18974		}
18975		_ = o5.Args[1]
18976		s6 := o5.Args[0]
18977		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 8 {
18978			break
18979		}
18980		x6 := s6.Args[0]
18981		if x6.Op != OpPPC64MOVBZload {
18982			break
18983		}
18984		i6 := x6.AuxInt
18985		if x6.Aux != s {
18986			break
18987		}
18988		_ = x6.Args[1]
18989		if p != x6.Args[0] || mem != x6.Args[1] {
18990			break
18991		}
18992		o4 := o5.Args[1]
18993		if o4.Op != OpPPC64OR || o4.Type != t {
18994			break
18995		}
18996		_ = o4.Args[1]
18997		o3 := o4.Args[0]
18998		if o3.Op != OpPPC64OR || o3.Type != t {
18999			break
19000		}
19001		_ = o3.Args[1]
19002		s4 := o3.Args[0]
19003		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 24 {
19004			break
19005		}
19006		x4 := s4.Args[0]
19007		if x4.Op != OpPPC64MOVBZload {
19008			break
19009		}
19010		i4 := x4.AuxInt
19011		if x4.Aux != s {
19012			break
19013		}
19014		_ = x4.Args[1]
19015		if p != x4.Args[0] || mem != x4.Args[1] {
19016			break
19017		}
19018		s0 := o3.Args[1]
19019		if s0.Op != OpPPC64SLWconst || s0.AuxInt != 32 {
19020			break
19021		}
19022		x3 := s0.Args[0]
19023		if x3.Op != OpPPC64MOVWBRload || x3.Type != t {
19024			break
19025		}
19026		_ = x3.Args[1]
19027		x3_0 := x3.Args[0]
19028		if x3_0.Op != OpPPC64MOVDaddr || x3_0.Type != typ.Uintptr {
19029			break
19030		}
19031		i0 := x3_0.AuxInt
19032		if x3_0.Aux != s || p != x3_0.Args[0] || mem != x3.Args[1] {
19033			break
19034		}
19035		s5 := o4.Args[1]
19036		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 16 {
19037			break
19038		}
19039		x5 := s5.Args[0]
19040		if x5.Op != OpPPC64MOVBZload {
19041			break
19042		}
19043		i5 := x5.AuxInt
19044		if x5.Aux != s {
19045			break
19046		}
19047		_ = x5.Args[1]
19048		if p != x5.Args[0] || mem != x5.Args[1] || !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
19049			break
19050		}
19051		b = mergePoint(b, x3, x4, x5, x6, x7)
19052		v0 := b.NewValue0(x5.Pos, OpPPC64MOVDBRload, t)
19053		v.reset(OpCopy)
19054		v.AddArg(v0)
19055		v1 := b.NewValue0(x5.Pos, OpPPC64MOVDaddr, typ.Uintptr)
19056		v1.AuxInt = i0
19057		v1.Aux = s
19058		v1.AddArg(p)
19059		v0.AddArg(v1)
19060		v0.AddArg(mem)
19061		return true
19062	}
19063	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> o3:(OR <t> s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]))))
19064	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
19065	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
19066	for {
19067		t := v.Type
19068		_ = v.Args[1]
19069		x7 := v.Args[0]
19070		if x7.Op != OpPPC64MOVBZload {
19071			break
19072		}
19073		i7 := x7.AuxInt
19074		s := x7.Aux
19075		mem := x7.Args[1]
19076		p := x7.Args[0]
19077		o5 := v.Args[1]
19078		if o5.Op != OpPPC64OR || o5.Type != t {
19079			break
19080		}
19081		_ = o5.Args[1]
19082		s6 := o5.Args[0]
19083		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 8 {
19084			break
19085		}
19086		x6 := s6.Args[0]
19087		if x6.Op != OpPPC64MOVBZload {
19088			break
19089		}
19090		i6 := x6.AuxInt
19091		if x6.Aux != s {
19092			break
19093		}
19094		_ = x6.Args[1]
19095		if p != x6.Args[0] || mem != x6.Args[1] {
19096			break
19097		}
19098		o4 := o5.Args[1]
19099		if o4.Op != OpPPC64OR || o4.Type != t {
19100			break
19101		}
19102		_ = o4.Args[1]
19103		o3 := o4.Args[0]
19104		if o3.Op != OpPPC64OR || o3.Type != t {
19105			break
19106		}
19107		_ = o3.Args[1]
19108		s0 := o3.Args[0]
19109		if s0.Op != OpPPC64SLWconst || s0.AuxInt != 32 {
19110			break
19111		}
19112		x3 := s0.Args[0]
19113		if x3.Op != OpPPC64MOVWBRload || x3.Type != t {
19114			break
19115		}
19116		_ = x3.Args[1]
19117		x3_0 := x3.Args[0]
19118		if x3_0.Op != OpPPC64MOVDaddr || x3_0.Type != typ.Uintptr {
19119			break
19120		}
19121		i0 := x3_0.AuxInt
19122		if x3_0.Aux != s || p != x3_0.Args[0] || mem != x3.Args[1] {
19123			break
19124		}
19125		s4 := o3.Args[1]
19126		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 24 {
19127			break
19128		}
19129		x4 := s4.Args[0]
19130		if x4.Op != OpPPC64MOVBZload {
19131			break
19132		}
19133		i4 := x4.AuxInt
19134		if x4.Aux != s {
19135			break
19136		}
19137		_ = x4.Args[1]
19138		if p != x4.Args[0] || mem != x4.Args[1] {
19139			break
19140		}
19141		s5 := o4.Args[1]
19142		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 16 {
19143			break
19144		}
19145		x5 := s5.Args[0]
19146		if x5.Op != OpPPC64MOVBZload {
19147			break
19148		}
19149		i5 := x5.AuxInt
19150		if x5.Aux != s {
19151			break
19152		}
19153		_ = x5.Args[1]
19154		if p != x5.Args[0] || mem != x5.Args[1] || !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
19155			break
19156		}
19157		b = mergePoint(b, x3, x4, x5, x6, x7)
19158		v0 := b.NewValue0(x5.Pos, OpPPC64MOVDBRload, t)
19159		v.reset(OpCopy)
19160		v.AddArg(v0)
19161		v1 := b.NewValue0(x5.Pos, OpPPC64MOVDaddr, typ.Uintptr)
19162		v1.AuxInt = i0
19163		v1.Aux = s
19164		v1.AddArg(p)
19165		v0.AddArg(v1)
19166		v0.AddArg(mem)
19167		return true
19168	}
19169	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]))) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])))
19170	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
19171	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
19172	for {
19173		t := v.Type
19174		_ = v.Args[1]
19175		x7 := v.Args[0]
19176		if x7.Op != OpPPC64MOVBZload {
19177			break
19178		}
19179		i7 := x7.AuxInt
19180		s := x7.Aux
19181		mem := x7.Args[1]
19182		p := x7.Args[0]
19183		o5 := v.Args[1]
19184		if o5.Op != OpPPC64OR || o5.Type != t {
19185			break
19186		}
19187		_ = o5.Args[1]
19188		o4 := o5.Args[0]
19189		if o4.Op != OpPPC64OR || o4.Type != t {
19190			break
19191		}
19192		_ = o4.Args[1]
19193		s5 := o4.Args[0]
19194		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 16 {
19195			break
19196		}
19197		x5 := s5.Args[0]
19198		if x5.Op != OpPPC64MOVBZload {
19199			break
19200		}
19201		i5 := x5.AuxInt
19202		if x5.Aux != s {
19203			break
19204		}
19205		_ = x5.Args[1]
19206		if p != x5.Args[0] || mem != x5.Args[1] {
19207			break
19208		}
19209		o3 := o4.Args[1]
19210		if o3.Op != OpPPC64OR || o3.Type != t {
19211			break
19212		}
19213		_ = o3.Args[1]
19214		s4 := o3.Args[0]
19215		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 24 {
19216			break
19217		}
19218		x4 := s4.Args[0]
19219		if x4.Op != OpPPC64MOVBZload {
19220			break
19221		}
19222		i4 := x4.AuxInt
19223		if x4.Aux != s {
19224			break
19225		}
19226		_ = x4.Args[1]
19227		if p != x4.Args[0] || mem != x4.Args[1] {
19228			break
19229		}
19230		s0 := o3.Args[1]
19231		if s0.Op != OpPPC64SLWconst || s0.AuxInt != 32 {
19232			break
19233		}
19234		x3 := s0.Args[0]
19235		if x3.Op != OpPPC64MOVWBRload || x3.Type != t {
19236			break
19237		}
19238		_ = x3.Args[1]
19239		x3_0 := x3.Args[0]
19240		if x3_0.Op != OpPPC64MOVDaddr || x3_0.Type != typ.Uintptr {
19241			break
19242		}
19243		i0 := x3_0.AuxInt
19244		if x3_0.Aux != s || p != x3_0.Args[0] || mem != x3.Args[1] {
19245			break
19246		}
19247		s6 := o5.Args[1]
19248		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 8 {
19249			break
19250		}
19251		x6 := s6.Args[0]
19252		if x6.Op != OpPPC64MOVBZload {
19253			break
19254		}
19255		i6 := x6.AuxInt
19256		if x6.Aux != s {
19257			break
19258		}
19259		_ = x6.Args[1]
19260		if p != x6.Args[0] || mem != x6.Args[1] || !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
19261			break
19262		}
19263		b = mergePoint(b, x3, x4, x5, x6, x7)
19264		v0 := b.NewValue0(x6.Pos, OpPPC64MOVDBRload, t)
19265		v.reset(OpCopy)
19266		v.AddArg(v0)
19267		v1 := b.NewValue0(x6.Pos, OpPPC64MOVDaddr, typ.Uintptr)
19268		v1.AuxInt = i0
19269		v1.Aux = s
19270		v1.AddArg(p)
19271		v0.AddArg(v1)
19272		v0.AddArg(mem)
19273		return true
19274	}
19275	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]))) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])))
19276	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
19277	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
19278	for {
19279		t := v.Type
19280		_ = v.Args[1]
19281		x7 := v.Args[0]
19282		if x7.Op != OpPPC64MOVBZload {
19283			break
19284		}
19285		i7 := x7.AuxInt
19286		s := x7.Aux
19287		mem := x7.Args[1]
19288		p := x7.Args[0]
19289		o5 := v.Args[1]
19290		if o5.Op != OpPPC64OR || o5.Type != t {
19291			break
19292		}
19293		_ = o5.Args[1]
19294		o4 := o5.Args[0]
19295		if o4.Op != OpPPC64OR || o4.Type != t {
19296			break
19297		}
19298		_ = o4.Args[1]
19299		s5 := o4.Args[0]
19300		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 16 {
19301			break
19302		}
19303		x5 := s5.Args[0]
19304		if x5.Op != OpPPC64MOVBZload {
19305			break
19306		}
19307		i5 := x5.AuxInt
19308		if x5.Aux != s {
19309			break
19310		}
19311		_ = x5.Args[1]
19312		if p != x5.Args[0] || mem != x5.Args[1] {
19313			break
19314		}
19315		o3 := o4.Args[1]
19316		if o3.Op != OpPPC64OR || o3.Type != t {
19317			break
19318		}
19319		_ = o3.Args[1]
19320		s0 := o3.Args[0]
19321		if s0.Op != OpPPC64SLWconst || s0.AuxInt != 32 {
19322			break
19323		}
19324		x3 := s0.Args[0]
19325		if x3.Op != OpPPC64MOVWBRload || x3.Type != t {
19326			break
19327		}
19328		_ = x3.Args[1]
19329		x3_0 := x3.Args[0]
19330		if x3_0.Op != OpPPC64MOVDaddr || x3_0.Type != typ.Uintptr {
19331			break
19332		}
19333		i0 := x3_0.AuxInt
19334		if x3_0.Aux != s || p != x3_0.Args[0] || mem != x3.Args[1] {
19335			break
19336		}
19337		s4 := o3.Args[1]
19338		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 24 {
19339			break
19340		}
19341		x4 := s4.Args[0]
19342		if x4.Op != OpPPC64MOVBZload {
19343			break
19344		}
19345		i4 := x4.AuxInt
19346		if x4.Aux != s {
19347			break
19348		}
19349		_ = x4.Args[1]
19350		if p != x4.Args[0] || mem != x4.Args[1] {
19351			break
19352		}
19353		s6 := o5.Args[1]
19354		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 8 {
19355			break
19356		}
19357		x6 := s6.Args[0]
19358		if x6.Op != OpPPC64MOVBZload {
19359			break
19360		}
19361		i6 := x6.AuxInt
19362		if x6.Aux != s {
19363			break
19364		}
19365		_ = x6.Args[1]
19366		if p != x6.Args[0] || mem != x6.Args[1] || !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
19367			break
19368		}
19369		b = mergePoint(b, x3, x4, x5, x6, x7)
19370		v0 := b.NewValue0(x6.Pos, OpPPC64MOVDBRload, t)
19371		v.reset(OpCopy)
19372		v.AddArg(v0)
19373		v1 := b.NewValue0(x6.Pos, OpPPC64MOVDaddr, typ.Uintptr)
19374		v1.AuxInt = i0
19375		v1.Aux = s
19376		v1.AddArg(p)
19377		v0.AddArg(v1)
19378		v0.AddArg(mem)
19379		return true
19380	}
19381	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> o4:(OR <t> o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16])) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])))
19382	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
19383	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
19384	for {
19385		t := v.Type
19386		_ = v.Args[1]
19387		x7 := v.Args[0]
19388		if x7.Op != OpPPC64MOVBZload {
19389			break
19390		}
19391		i7 := x7.AuxInt
19392		s := x7.Aux
19393		mem := x7.Args[1]
19394		p := x7.Args[0]
19395		o5 := v.Args[1]
19396		if o5.Op != OpPPC64OR || o5.Type != t {
19397			break
19398		}
19399		_ = o5.Args[1]
19400		o4 := o5.Args[0]
19401		if o4.Op != OpPPC64OR || o4.Type != t {
19402			break
19403		}
19404		_ = o4.Args[1]
19405		o3 := o4.Args[0]
19406		if o3.Op != OpPPC64OR || o3.Type != t {
19407			break
19408		}
19409		_ = o3.Args[1]
19410		s4 := o3.Args[0]
19411		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 24 {
19412			break
19413		}
19414		x4 := s4.Args[0]
19415		if x4.Op != OpPPC64MOVBZload {
19416			break
19417		}
19418		i4 := x4.AuxInt
19419		if x4.Aux != s {
19420			break
19421		}
19422		_ = x4.Args[1]
19423		if p != x4.Args[0] || mem != x4.Args[1] {
19424			break
19425		}
19426		s0 := o3.Args[1]
19427		if s0.Op != OpPPC64SLWconst || s0.AuxInt != 32 {
19428			break
19429		}
19430		x3 := s0.Args[0]
19431		if x3.Op != OpPPC64MOVWBRload || x3.Type != t {
19432			break
19433		}
19434		_ = x3.Args[1]
19435		x3_0 := x3.Args[0]
19436		if x3_0.Op != OpPPC64MOVDaddr || x3_0.Type != typ.Uintptr {
19437			break
19438		}
19439		i0 := x3_0.AuxInt
19440		if x3_0.Aux != s || p != x3_0.Args[0] || mem != x3.Args[1] {
19441			break
19442		}
19443		s5 := o4.Args[1]
19444		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 16 {
19445			break
19446		}
19447		x5 := s5.Args[0]
19448		if x5.Op != OpPPC64MOVBZload {
19449			break
19450		}
19451		i5 := x5.AuxInt
19452		if x5.Aux != s {
19453			break
19454		}
19455		_ = x5.Args[1]
19456		if p != x5.Args[0] || mem != x5.Args[1] {
19457			break
19458		}
19459		s6 := o5.Args[1]
19460		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 8 {
19461			break
19462		}
19463		x6 := s6.Args[0]
19464		if x6.Op != OpPPC64MOVBZload {
19465			break
19466		}
19467		i6 := x6.AuxInt
19468		if x6.Aux != s {
19469			break
19470		}
19471		_ = x6.Args[1]
19472		if p != x6.Args[0] || mem != x6.Args[1] || !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
19473			break
19474		}
19475		b = mergePoint(b, x3, x4, x5, x6, x7)
19476		v0 := b.NewValue0(x6.Pos, OpPPC64MOVDBRload, t)
19477		v.reset(OpCopy)
19478		v.AddArg(v0)
19479		v1 := b.NewValue0(x6.Pos, OpPPC64MOVDaddr, typ.Uintptr)
19480		v1.AuxInt = i0
19481		v1.Aux = s
19482		v1.AddArg(p)
19483		v0.AddArg(v1)
19484		v0.AddArg(mem)
19485		return true
19486	}
19487	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> o4:(OR <t> o3:(OR <t> s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16])) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])))
19488	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
19489	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
19490	for {
19491		t := v.Type
19492		_ = v.Args[1]
19493		x7 := v.Args[0]
19494		if x7.Op != OpPPC64MOVBZload {
19495			break
19496		}
19497		i7 := x7.AuxInt
19498		s := x7.Aux
19499		mem := x7.Args[1]
19500		p := x7.Args[0]
19501		o5 := v.Args[1]
19502		if o5.Op != OpPPC64OR || o5.Type != t {
19503			break
19504		}
19505		_ = o5.Args[1]
19506		o4 := o5.Args[0]
19507		if o4.Op != OpPPC64OR || o4.Type != t {
19508			break
19509		}
19510		_ = o4.Args[1]
19511		o3 := o4.Args[0]
19512		if o3.Op != OpPPC64OR || o3.Type != t {
19513			break
19514		}
19515		_ = o3.Args[1]
19516		s0 := o3.Args[0]
19517		if s0.Op != OpPPC64SLWconst || s0.AuxInt != 32 {
19518			break
19519		}
19520		x3 := s0.Args[0]
19521		if x3.Op != OpPPC64MOVWBRload || x3.Type != t {
19522			break
19523		}
19524		_ = x3.Args[1]
19525		x3_0 := x3.Args[0]
19526		if x3_0.Op != OpPPC64MOVDaddr || x3_0.Type != typ.Uintptr {
19527			break
19528		}
19529		i0 := x3_0.AuxInt
19530		if x3_0.Aux != s || p != x3_0.Args[0] || mem != x3.Args[1] {
19531			break
19532		}
19533		s4 := o3.Args[1]
19534		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 24 {
19535			break
19536		}
19537		x4 := s4.Args[0]
19538		if x4.Op != OpPPC64MOVBZload {
19539			break
19540		}
19541		i4 := x4.AuxInt
19542		if x4.Aux != s {
19543			break
19544		}
19545		_ = x4.Args[1]
19546		if p != x4.Args[0] || mem != x4.Args[1] {
19547			break
19548		}
19549		s5 := o4.Args[1]
19550		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 16 {
19551			break
19552		}
19553		x5 := s5.Args[0]
19554		if x5.Op != OpPPC64MOVBZload {
19555			break
19556		}
19557		i5 := x5.AuxInt
19558		if x5.Aux != s {
19559			break
19560		}
19561		_ = x5.Args[1]
19562		if p != x5.Args[0] || mem != x5.Args[1] {
19563			break
19564		}
19565		s6 := o5.Args[1]
19566		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 8 {
19567			break
19568		}
19569		x6 := s6.Args[0]
19570		if x6.Op != OpPPC64MOVBZload {
19571			break
19572		}
19573		i6 := x6.AuxInt
19574		if x6.Aux != s {
19575			break
19576		}
19577		_ = x6.Args[1]
19578		if p != x6.Args[0] || mem != x6.Args[1] || !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
19579			break
19580		}
19581		b = mergePoint(b, x3, x4, x5, x6, x7)
19582		v0 := b.NewValue0(x6.Pos, OpPPC64MOVDBRload, t)
19583		v.reset(OpCopy)
19584		v.AddArg(v0)
19585		v1 := b.NewValue0(x6.Pos, OpPPC64MOVDaddr, typ.Uintptr)
19586		v1.AuxInt = i0
19587		v1.Aux = s
19588		v1.AddArg(p)
19589		v0.AddArg(v1)
19590		v0.AddArg(mem)
19591		return true
19592	}
19593	// match: (OR <t> o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])))) x7:(MOVBZload [i7] {s} p mem))
19594	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
19595	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
19596	for {
19597		t := v.Type
19598		_ = v.Args[1]
19599		o5 := v.Args[0]
19600		if o5.Op != OpPPC64OR || o5.Type != t {
19601			break
19602		}
19603		_ = o5.Args[1]
19604		s6 := o5.Args[0]
19605		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 8 {
19606			break
19607		}
19608		x6 := s6.Args[0]
19609		if x6.Op != OpPPC64MOVBZload {
19610			break
19611		}
19612		i6 := x6.AuxInt
19613		s := x6.Aux
19614		mem := x6.Args[1]
19615		p := x6.Args[0]
19616		o4 := o5.Args[1]
19617		if o4.Op != OpPPC64OR || o4.Type != t {
19618			break
19619		}
19620		_ = o4.Args[1]
19621		s5 := o4.Args[0]
19622		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 16 {
19623			break
19624		}
19625		x5 := s5.Args[0]
19626		if x5.Op != OpPPC64MOVBZload {
19627			break
19628		}
19629		i5 := x5.AuxInt
19630		if x5.Aux != s {
19631			break
19632		}
19633		_ = x5.Args[1]
19634		if p != x5.Args[0] || mem != x5.Args[1] {
19635			break
19636		}
19637		o3 := o4.Args[1]
19638		if o3.Op != OpPPC64OR || o3.Type != t {
19639			break
19640		}
19641		_ = o3.Args[1]
19642		s4 := o3.Args[0]
19643		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 24 {
19644			break
19645		}
19646		x4 := s4.Args[0]
19647		if x4.Op != OpPPC64MOVBZload {
19648			break
19649		}
19650		i4 := x4.AuxInt
19651		if x4.Aux != s {
19652			break
19653		}
19654		_ = x4.Args[1]
19655		if p != x4.Args[0] || mem != x4.Args[1] {
19656			break
19657		}
19658		s0 := o3.Args[1]
19659		if s0.Op != OpPPC64SLWconst || s0.AuxInt != 32 {
19660			break
19661		}
19662		x3 := s0.Args[0]
19663		if x3.Op != OpPPC64MOVWBRload || x3.Type != t {
19664			break
19665		}
19666		_ = x3.Args[1]
19667		x3_0 := x3.Args[0]
19668		if x3_0.Op != OpPPC64MOVDaddr || x3_0.Type != typ.Uintptr {
19669			break
19670		}
19671		i0 := x3_0.AuxInt
19672		if x3_0.Aux != s || p != x3_0.Args[0] || mem != x3.Args[1] {
19673			break
19674		}
19675		x7 := v.Args[1]
19676		if x7.Op != OpPPC64MOVBZload {
19677			break
19678		}
19679		i7 := x7.AuxInt
19680		if x7.Aux != s {
19681			break
19682		}
19683		_ = x7.Args[1]
19684		if p != x7.Args[0] || mem != x7.Args[1] || !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
19685			break
19686		}
19687		b = mergePoint(b, x3, x4, x5, x6, x7)
19688		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
19689		v.reset(OpCopy)
19690		v.AddArg(v0)
19691		v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
19692		v1.AuxInt = i0
19693		v1.Aux = s
19694		v1.AddArg(p)
19695		v0.AddArg(v1)
19696		v0.AddArg(mem)
19697		return true
19698	}
19699	// match: (OR <t> o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])))) x7:(MOVBZload [i7] {s} p mem))
19700	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
19701	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
19702	for {
19703		t := v.Type
19704		_ = v.Args[1]
19705		o5 := v.Args[0]
19706		if o5.Op != OpPPC64OR || o5.Type != t {
19707			break
19708		}
19709		_ = o5.Args[1]
19710		s6 := o5.Args[0]
19711		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 8 {
19712			break
19713		}
19714		x6 := s6.Args[0]
19715		if x6.Op != OpPPC64MOVBZload {
19716			break
19717		}
19718		i6 := x6.AuxInt
19719		s := x6.Aux
19720		mem := x6.Args[1]
19721		p := x6.Args[0]
19722		o4 := o5.Args[1]
19723		if o4.Op != OpPPC64OR || o4.Type != t {
19724			break
19725		}
19726		_ = o4.Args[1]
19727		s5 := o4.Args[0]
19728		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 16 {
19729			break
19730		}
19731		x5 := s5.Args[0]
19732		if x5.Op != OpPPC64MOVBZload {
19733			break
19734		}
19735		i5 := x5.AuxInt
19736		if x5.Aux != s {
19737			break
19738		}
19739		_ = x5.Args[1]
19740		if p != x5.Args[0] || mem != x5.Args[1] {
19741			break
19742		}
19743		o3 := o4.Args[1]
19744		if o3.Op != OpPPC64OR || o3.Type != t {
19745			break
19746		}
19747		_ = o3.Args[1]
19748		s0 := o3.Args[0]
19749		if s0.Op != OpPPC64SLWconst || s0.AuxInt != 32 {
19750			break
19751		}
19752		x3 := s0.Args[0]
19753		if x3.Op != OpPPC64MOVWBRload || x3.Type != t {
19754			break
19755		}
19756		_ = x3.Args[1]
19757		x3_0 := x3.Args[0]
19758		if x3_0.Op != OpPPC64MOVDaddr || x3_0.Type != typ.Uintptr {
19759			break
19760		}
19761		i0 := x3_0.AuxInt
19762		if x3_0.Aux != s || p != x3_0.Args[0] || mem != x3.Args[1] {
19763			break
19764		}
19765		s4 := o3.Args[1]
19766		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 24 {
19767			break
19768		}
19769		x4 := s4.Args[0]
19770		if x4.Op != OpPPC64MOVBZload {
19771			break
19772		}
19773		i4 := x4.AuxInt
19774		if x4.Aux != s {
19775			break
19776		}
19777		_ = x4.Args[1]
19778		if p != x4.Args[0] || mem != x4.Args[1] {
19779			break
19780		}
19781		x7 := v.Args[1]
19782		if x7.Op != OpPPC64MOVBZload {
19783			break
19784		}
19785		i7 := x7.AuxInt
19786		if x7.Aux != s {
19787			break
19788		}
19789		_ = x7.Args[1]
19790		if p != x7.Args[0] || mem != x7.Args[1] || !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
19791			break
19792		}
19793		b = mergePoint(b, x3, x4, x5, x6, x7)
19794		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
19795		v.reset(OpCopy)
19796		v.AddArg(v0)
19797		v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
19798		v1.AuxInt = i0
19799		v1.Aux = s
19800		v1.AddArg(p)
19801		v0.AddArg(v1)
19802		v0.AddArg(mem)
19803		return true
19804	}
19805	// match: (OR <t> o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]))) x7:(MOVBZload [i7] {s} p mem))
19806	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
19807	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
19808	for {
19809		t := v.Type
19810		_ = v.Args[1]
19811		o5 := v.Args[0]
19812		if o5.Op != OpPPC64OR || o5.Type != t {
19813			break
19814		}
19815		_ = o5.Args[1]
19816		s6 := o5.Args[0]
19817		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 8 {
19818			break
19819		}
19820		x6 := s6.Args[0]
19821		if x6.Op != OpPPC64MOVBZload {
19822			break
19823		}
19824		i6 := x6.AuxInt
19825		s := x6.Aux
19826		mem := x6.Args[1]
19827		p := x6.Args[0]
19828		o4 := o5.Args[1]
19829		if o4.Op != OpPPC64OR || o4.Type != t {
19830			break
19831		}
19832		_ = o4.Args[1]
19833		o3 := o4.Args[0]
19834		if o3.Op != OpPPC64OR || o3.Type != t {
19835			break
19836		}
19837		_ = o3.Args[1]
19838		s4 := o3.Args[0]
19839		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 24 {
19840			break
19841		}
19842		x4 := s4.Args[0]
19843		if x4.Op != OpPPC64MOVBZload {
19844			break
19845		}
19846		i4 := x4.AuxInt
19847		if x4.Aux != s {
19848			break
19849		}
19850		_ = x4.Args[1]
19851		if p != x4.Args[0] || mem != x4.Args[1] {
19852			break
19853		}
19854		s0 := o3.Args[1]
19855		if s0.Op != OpPPC64SLWconst || s0.AuxInt != 32 {
19856			break
19857		}
19858		x3 := s0.Args[0]
19859		if x3.Op != OpPPC64MOVWBRload || x3.Type != t {
19860			break
19861		}
19862		_ = x3.Args[1]
19863		x3_0 := x3.Args[0]
19864		if x3_0.Op != OpPPC64MOVDaddr || x3_0.Type != typ.Uintptr {
19865			break
19866		}
19867		i0 := x3_0.AuxInt
19868		if x3_0.Aux != s || p != x3_0.Args[0] || mem != x3.Args[1] {
19869			break
19870		}
19871		s5 := o4.Args[1]
19872		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 16 {
19873			break
19874		}
19875		x5 := s5.Args[0]
19876		if x5.Op != OpPPC64MOVBZload {
19877			break
19878		}
19879		i5 := x5.AuxInt
19880		if x5.Aux != s {
19881			break
19882		}
19883		_ = x5.Args[1]
19884		if p != x5.Args[0] || mem != x5.Args[1] {
19885			break
19886		}
19887		x7 := v.Args[1]
19888		if x7.Op != OpPPC64MOVBZload {
19889			break
19890		}
19891		i7 := x7.AuxInt
19892		if x7.Aux != s {
19893			break
19894		}
19895		_ = x7.Args[1]
19896		if p != x7.Args[0] || mem != x7.Args[1] || !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
19897			break
19898		}
19899		b = mergePoint(b, x3, x4, x5, x6, x7)
19900		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
19901		v.reset(OpCopy)
19902		v.AddArg(v0)
19903		v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
19904		v1.AuxInt = i0
19905		v1.Aux = s
19906		v1.AddArg(p)
19907		v0.AddArg(v1)
19908		v0.AddArg(mem)
19909		return true
19910	}
19911	// match: (OR <t> o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> o3:(OR <t> s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]))) x7:(MOVBZload [i7] {s} p mem))
19912	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
19913	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
19914	for {
19915		t := v.Type
19916		_ = v.Args[1]
19917		o5 := v.Args[0]
19918		if o5.Op != OpPPC64OR || o5.Type != t {
19919			break
19920		}
19921		_ = o5.Args[1]
19922		s6 := o5.Args[0]
19923		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 8 {
19924			break
19925		}
19926		x6 := s6.Args[0]
19927		if x6.Op != OpPPC64MOVBZload {
19928			break
19929		}
19930		i6 := x6.AuxInt
19931		s := x6.Aux
19932		mem := x6.Args[1]
19933		p := x6.Args[0]
19934		o4 := o5.Args[1]
19935		if o4.Op != OpPPC64OR || o4.Type != t {
19936			break
19937		}
19938		_ = o4.Args[1]
19939		o3 := o4.Args[0]
19940		if o3.Op != OpPPC64OR || o3.Type != t {
19941			break
19942		}
19943		_ = o3.Args[1]
19944		s0 := o3.Args[0]
19945		if s0.Op != OpPPC64SLWconst || s0.AuxInt != 32 {
19946			break
19947		}
19948		x3 := s0.Args[0]
19949		if x3.Op != OpPPC64MOVWBRload || x3.Type != t {
19950			break
19951		}
19952		_ = x3.Args[1]
19953		x3_0 := x3.Args[0]
19954		if x3_0.Op != OpPPC64MOVDaddr || x3_0.Type != typ.Uintptr {
19955			break
19956		}
19957		i0 := x3_0.AuxInt
19958		if x3_0.Aux != s || p != x3_0.Args[0] || mem != x3.Args[1] {
19959			break
19960		}
19961		s4 := o3.Args[1]
19962		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 24 {
19963			break
19964		}
19965		x4 := s4.Args[0]
19966		if x4.Op != OpPPC64MOVBZload {
19967			break
19968		}
19969		i4 := x4.AuxInt
19970		if x4.Aux != s {
19971			break
19972		}
19973		_ = x4.Args[1]
19974		if p != x4.Args[0] || mem != x4.Args[1] {
19975			break
19976		}
19977		s5 := o4.Args[1]
19978		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 16 {
19979			break
19980		}
19981		x5 := s5.Args[0]
19982		if x5.Op != OpPPC64MOVBZload {
19983			break
19984		}
19985		i5 := x5.AuxInt
19986		if x5.Aux != s {
19987			break
19988		}
19989		_ = x5.Args[1]
19990		if p != x5.Args[0] || mem != x5.Args[1] {
19991			break
19992		}
19993		x7 := v.Args[1]
19994		if x7.Op != OpPPC64MOVBZload {
19995			break
19996		}
19997		i7 := x7.AuxInt
19998		if x7.Aux != s {
19999			break
20000		}
20001		_ = x7.Args[1]
20002		if p != x7.Args[0] || mem != x7.Args[1] || !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
20003			break
20004		}
20005		b = mergePoint(b, x3, x4, x5, x6, x7)
20006		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
20007		v.reset(OpCopy)
20008		v.AddArg(v0)
20009		v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
20010		v1.AuxInt = i0
20011		v1.Aux = s
20012		v1.AddArg(p)
20013		v0.AddArg(v1)
20014		v0.AddArg(mem)
20015		return true
20016	}
20017	return false
20018}
20019func rewriteValuePPC64_OpPPC64OR_100(v *Value) bool {
20020	b := v.Block
20021	config := b.Func.Config
20022	typ := &b.Func.Config.Types
20023	// match: (OR <t> o5:(OR <t> o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]))) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])) x7:(MOVBZload [i7] {s} p mem))
20024	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
20025	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
20026	for {
20027		t := v.Type
20028		_ = v.Args[1]
20029		o5 := v.Args[0]
20030		if o5.Op != OpPPC64OR || o5.Type != t {
20031			break
20032		}
20033		_ = o5.Args[1]
20034		o4 := o5.Args[0]
20035		if o4.Op != OpPPC64OR || o4.Type != t {
20036			break
20037		}
20038		_ = o4.Args[1]
20039		s5 := o4.Args[0]
20040		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 16 {
20041			break
20042		}
20043		x5 := s5.Args[0]
20044		if x5.Op != OpPPC64MOVBZload {
20045			break
20046		}
20047		i5 := x5.AuxInt
20048		s := x5.Aux
20049		mem := x5.Args[1]
20050		p := x5.Args[0]
20051		o3 := o4.Args[1]
20052		if o3.Op != OpPPC64OR || o3.Type != t {
20053			break
20054		}
20055		_ = o3.Args[1]
20056		s4 := o3.Args[0]
20057		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 24 {
20058			break
20059		}
20060		x4 := s4.Args[0]
20061		if x4.Op != OpPPC64MOVBZload {
20062			break
20063		}
20064		i4 := x4.AuxInt
20065		if x4.Aux != s {
20066			break
20067		}
20068		_ = x4.Args[1]
20069		if p != x4.Args[0] || mem != x4.Args[1] {
20070			break
20071		}
20072		s0 := o3.Args[1]
20073		if s0.Op != OpPPC64SLWconst || s0.AuxInt != 32 {
20074			break
20075		}
20076		x3 := s0.Args[0]
20077		if x3.Op != OpPPC64MOVWBRload || x3.Type != t {
20078			break
20079		}
20080		_ = x3.Args[1]
20081		x3_0 := x3.Args[0]
20082		if x3_0.Op != OpPPC64MOVDaddr || x3_0.Type != typ.Uintptr {
20083			break
20084		}
20085		i0 := x3_0.AuxInt
20086		if x3_0.Aux != s || p != x3_0.Args[0] || mem != x3.Args[1] {
20087			break
20088		}
20089		s6 := o5.Args[1]
20090		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 8 {
20091			break
20092		}
20093		x6 := s6.Args[0]
20094		if x6.Op != OpPPC64MOVBZload {
20095			break
20096		}
20097		i6 := x6.AuxInt
20098		if x6.Aux != s {
20099			break
20100		}
20101		_ = x6.Args[1]
20102		if p != x6.Args[0] || mem != x6.Args[1] {
20103			break
20104		}
20105		x7 := v.Args[1]
20106		if x7.Op != OpPPC64MOVBZload {
20107			break
20108		}
20109		i7 := x7.AuxInt
20110		if x7.Aux != s {
20111			break
20112		}
20113		_ = x7.Args[1]
20114		if p != x7.Args[0] || mem != x7.Args[1] || !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
20115			break
20116		}
20117		b = mergePoint(b, x3, x4, x5, x6, x7)
20118		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
20119		v.reset(OpCopy)
20120		v.AddArg(v0)
20121		v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
20122		v1.AuxInt = i0
20123		v1.Aux = s
20124		v1.AddArg(p)
20125		v0.AddArg(v1)
20126		v0.AddArg(mem)
20127		return true
20128	}
20129	// match: (OR <t> o5:(OR <t> o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]))) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])) x7:(MOVBZload [i7] {s} p mem))
20130	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
20131	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
20132	for {
20133		t := v.Type
20134		_ = v.Args[1]
20135		o5 := v.Args[0]
20136		if o5.Op != OpPPC64OR || o5.Type != t {
20137			break
20138		}
20139		_ = o5.Args[1]
20140		o4 := o5.Args[0]
20141		if o4.Op != OpPPC64OR || o4.Type != t {
20142			break
20143		}
20144		_ = o4.Args[1]
20145		s5 := o4.Args[0]
20146		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 16 {
20147			break
20148		}
20149		x5 := s5.Args[0]
20150		if x5.Op != OpPPC64MOVBZload {
20151			break
20152		}
20153		i5 := x5.AuxInt
20154		s := x5.Aux
20155		mem := x5.Args[1]
20156		p := x5.Args[0]
20157		o3 := o4.Args[1]
20158		if o3.Op != OpPPC64OR || o3.Type != t {
20159			break
20160		}
20161		_ = o3.Args[1]
20162		s0 := o3.Args[0]
20163		if s0.Op != OpPPC64SLWconst || s0.AuxInt != 32 {
20164			break
20165		}
20166		x3 := s0.Args[0]
20167		if x3.Op != OpPPC64MOVWBRload || x3.Type != t {
20168			break
20169		}
20170		_ = x3.Args[1]
20171		x3_0 := x3.Args[0]
20172		if x3_0.Op != OpPPC64MOVDaddr || x3_0.Type != typ.Uintptr {
20173			break
20174		}
20175		i0 := x3_0.AuxInt
20176		if x3_0.Aux != s || p != x3_0.Args[0] || mem != x3.Args[1] {
20177			break
20178		}
20179		s4 := o3.Args[1]
20180		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 24 {
20181			break
20182		}
20183		x4 := s4.Args[0]
20184		if x4.Op != OpPPC64MOVBZload {
20185			break
20186		}
20187		i4 := x4.AuxInt
20188		if x4.Aux != s {
20189			break
20190		}
20191		_ = x4.Args[1]
20192		if p != x4.Args[0] || mem != x4.Args[1] {
20193			break
20194		}
20195		s6 := o5.Args[1]
20196		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 8 {
20197			break
20198		}
20199		x6 := s6.Args[0]
20200		if x6.Op != OpPPC64MOVBZload {
20201			break
20202		}
20203		i6 := x6.AuxInt
20204		if x6.Aux != s {
20205			break
20206		}
20207		_ = x6.Args[1]
20208		if p != x6.Args[0] || mem != x6.Args[1] {
20209			break
20210		}
20211		x7 := v.Args[1]
20212		if x7.Op != OpPPC64MOVBZload {
20213			break
20214		}
20215		i7 := x7.AuxInt
20216		if x7.Aux != s {
20217			break
20218		}
20219		_ = x7.Args[1]
20220		if p != x7.Args[0] || mem != x7.Args[1] || !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
20221			break
20222		}
20223		b = mergePoint(b, x3, x4, x5, x6, x7)
20224		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
20225		v.reset(OpCopy)
20226		v.AddArg(v0)
20227		v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
20228		v1.AuxInt = i0
20229		v1.Aux = s
20230		v1.AddArg(p)
20231		v0.AddArg(v1)
20232		v0.AddArg(mem)
20233		return true
20234	}
20235	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16])) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])) x7:(MOVBZload [i7] {s} p mem))
20236	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
20237	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
20238	for {
20239		t := v.Type
20240		_ = v.Args[1]
20241		o5 := v.Args[0]
20242		if o5.Op != OpPPC64OR || o5.Type != t {
20243			break
20244		}
20245		_ = o5.Args[1]
20246		o4 := o5.Args[0]
20247		if o4.Op != OpPPC64OR || o4.Type != t {
20248			break
20249		}
20250		_ = o4.Args[1]
20251		o3 := o4.Args[0]
20252		if o3.Op != OpPPC64OR || o3.Type != t {
20253			break
20254		}
20255		_ = o3.Args[1]
20256		s4 := o3.Args[0]
20257		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 24 {
20258			break
20259		}
20260		x4 := s4.Args[0]
20261		if x4.Op != OpPPC64MOVBZload {
20262			break
20263		}
20264		i4 := x4.AuxInt
20265		s := x4.Aux
20266		mem := x4.Args[1]
20267		p := x4.Args[0]
20268		s0 := o3.Args[1]
20269		if s0.Op != OpPPC64SLWconst || s0.AuxInt != 32 {
20270			break
20271		}
20272		x3 := s0.Args[0]
20273		if x3.Op != OpPPC64MOVWBRload || x3.Type != t {
20274			break
20275		}
20276		_ = x3.Args[1]
20277		x3_0 := x3.Args[0]
20278		if x3_0.Op != OpPPC64MOVDaddr || x3_0.Type != typ.Uintptr {
20279			break
20280		}
20281		i0 := x3_0.AuxInt
20282		if x3_0.Aux != s || p != x3_0.Args[0] || mem != x3.Args[1] {
20283			break
20284		}
20285		s5 := o4.Args[1]
20286		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 16 {
20287			break
20288		}
20289		x5 := s5.Args[0]
20290		if x5.Op != OpPPC64MOVBZload {
20291			break
20292		}
20293		i5 := x5.AuxInt
20294		if x5.Aux != s {
20295			break
20296		}
20297		_ = x5.Args[1]
20298		if p != x5.Args[0] || mem != x5.Args[1] {
20299			break
20300		}
20301		s6 := o5.Args[1]
20302		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 8 {
20303			break
20304		}
20305		x6 := s6.Args[0]
20306		if x6.Op != OpPPC64MOVBZload {
20307			break
20308		}
20309		i6 := x6.AuxInt
20310		if x6.Aux != s {
20311			break
20312		}
20313		_ = x6.Args[1]
20314		if p != x6.Args[0] || mem != x6.Args[1] {
20315			break
20316		}
20317		x7 := v.Args[1]
20318		if x7.Op != OpPPC64MOVBZload {
20319			break
20320		}
20321		i7 := x7.AuxInt
20322		if x7.Aux != s {
20323			break
20324		}
20325		_ = x7.Args[1]
20326		if p != x7.Args[0] || mem != x7.Args[1] || !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
20327			break
20328		}
20329		b = mergePoint(b, x3, x4, x5, x6, x7)
20330		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
20331		v.reset(OpCopy)
20332		v.AddArg(v0)
20333		v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
20334		v1.AuxInt = i0
20335		v1.Aux = s
20336		v1.AddArg(p)
20337		v0.AddArg(v1)
20338		v0.AddArg(mem)
20339		return true
20340	}
20341	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s0:(SLWconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16])) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])) x7:(MOVBZload [i7] {s} p mem))
20342	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
20343	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
20344	for {
20345		t := v.Type
20346		_ = v.Args[1]
20347		o5 := v.Args[0]
20348		if o5.Op != OpPPC64OR || o5.Type != t {
20349			break
20350		}
20351		_ = o5.Args[1]
20352		o4 := o5.Args[0]
20353		if o4.Op != OpPPC64OR || o4.Type != t {
20354			break
20355		}
20356		_ = o4.Args[1]
20357		o3 := o4.Args[0]
20358		if o3.Op != OpPPC64OR || o3.Type != t {
20359			break
20360		}
20361		_ = o3.Args[1]
20362		s0 := o3.Args[0]
20363		if s0.Op != OpPPC64SLWconst || s0.AuxInt != 32 {
20364			break
20365		}
20366		x3 := s0.Args[0]
20367		if x3.Op != OpPPC64MOVWBRload || x3.Type != t {
20368			break
20369		}
20370		mem := x3.Args[1]
20371		x3_0 := x3.Args[0]
20372		if x3_0.Op != OpPPC64MOVDaddr || x3_0.Type != typ.Uintptr {
20373			break
20374		}
20375		i0 := x3_0.AuxInt
20376		s := x3_0.Aux
20377		p := x3_0.Args[0]
20378		s4 := o3.Args[1]
20379		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 24 {
20380			break
20381		}
20382		x4 := s4.Args[0]
20383		if x4.Op != OpPPC64MOVBZload {
20384			break
20385		}
20386		i4 := x4.AuxInt
20387		if x4.Aux != s {
20388			break
20389		}
20390		_ = x4.Args[1]
20391		if p != x4.Args[0] || mem != x4.Args[1] {
20392			break
20393		}
20394		s5 := o4.Args[1]
20395		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 16 {
20396			break
20397		}
20398		x5 := s5.Args[0]
20399		if x5.Op != OpPPC64MOVBZload {
20400			break
20401		}
20402		i5 := x5.AuxInt
20403		if x5.Aux != s {
20404			break
20405		}
20406		_ = x5.Args[1]
20407		if p != x5.Args[0] || mem != x5.Args[1] {
20408			break
20409		}
20410		s6 := o5.Args[1]
20411		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 8 {
20412			break
20413		}
20414		x6 := s6.Args[0]
20415		if x6.Op != OpPPC64MOVBZload {
20416			break
20417		}
20418		i6 := x6.AuxInt
20419		if x6.Aux != s {
20420			break
20421		}
20422		_ = x6.Args[1]
20423		if p != x6.Args[0] || mem != x6.Args[1] {
20424			break
20425		}
20426		x7 := v.Args[1]
20427		if x7.Op != OpPPC64MOVBZload {
20428			break
20429		}
20430		i7 := x7.AuxInt
20431		if x7.Aux != s {
20432			break
20433		}
20434		_ = x7.Args[1]
20435		if p != x7.Args[0] || mem != x7.Args[1] || !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
20436			break
20437		}
20438		b = mergePoint(b, x3, x4, x5, x6, x7)
20439		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
20440		v.reset(OpCopy)
20441		v.AddArg(v0)
20442		v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
20443		v1.AuxInt = i0
20444		v1.Aux = s
20445		v1.AddArg(p)
20446		v0.AddArg(v1)
20447		v0.AddArg(mem)
20448		return true
20449	}
20450	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])))))
20451	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
20452	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
20453	for {
20454		t := v.Type
20455		_ = v.Args[1]
20456		x7 := v.Args[0]
20457		if x7.Op != OpPPC64MOVBZload {
20458			break
20459		}
20460		i7 := x7.AuxInt
20461		s := x7.Aux
20462		mem := x7.Args[1]
20463		p := x7.Args[0]
20464		o5 := v.Args[1]
20465		if o5.Op != OpPPC64OR || o5.Type != t {
20466			break
20467		}
20468		_ = o5.Args[1]
20469		s6 := o5.Args[0]
20470		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 8 {
20471			break
20472		}
20473		x6 := s6.Args[0]
20474		if x6.Op != OpPPC64MOVBZload {
20475			break
20476		}
20477		i6 := x6.AuxInt
20478		if x6.Aux != s {
20479			break
20480		}
20481		_ = x6.Args[1]
20482		if p != x6.Args[0] || mem != x6.Args[1] {
20483			break
20484		}
20485		o4 := o5.Args[1]
20486		if o4.Op != OpPPC64OR || o4.Type != t {
20487			break
20488		}
20489		_ = o4.Args[1]
20490		s5 := o4.Args[0]
20491		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 16 {
20492			break
20493		}
20494		x5 := s5.Args[0]
20495		if x5.Op != OpPPC64MOVBZload {
20496			break
20497		}
20498		i5 := x5.AuxInt
20499		if x5.Aux != s {
20500			break
20501		}
20502		_ = x5.Args[1]
20503		if p != x5.Args[0] || mem != x5.Args[1] {
20504			break
20505		}
20506		o3 := o4.Args[1]
20507		if o3.Op != OpPPC64OR || o3.Type != t {
20508			break
20509		}
20510		_ = o3.Args[1]
20511		s4 := o3.Args[0]
20512		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 24 {
20513			break
20514		}
20515		x4 := s4.Args[0]
20516		if x4.Op != OpPPC64MOVBZload {
20517			break
20518		}
20519		i4 := x4.AuxInt
20520		if x4.Aux != s {
20521			break
20522		}
20523		_ = x4.Args[1]
20524		if p != x4.Args[0] || mem != x4.Args[1] {
20525			break
20526		}
20527		s0 := o3.Args[1]
20528		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 32 {
20529			break
20530		}
20531		x3 := s0.Args[0]
20532		if x3.Op != OpPPC64MOVWBRload || x3.Type != t {
20533			break
20534		}
20535		_ = x3.Args[1]
20536		x3_0 := x3.Args[0]
20537		if x3_0.Op != OpPPC64MOVDaddr || x3_0.Type != typ.Uintptr {
20538			break
20539		}
20540		i0 := x3_0.AuxInt
20541		if x3_0.Aux != s || p != x3_0.Args[0] || mem != x3.Args[1] || !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
20542			break
20543		}
20544		b = mergePoint(b, x3, x4, x5, x6, x7)
20545		v0 := b.NewValue0(x3.Pos, OpPPC64MOVDBRload, t)
20546		v.reset(OpCopy)
20547		v.AddArg(v0)
20548		v1 := b.NewValue0(x3.Pos, OpPPC64MOVDaddr, typ.Uintptr)
20549		v1.AuxInt = i0
20550		v1.Aux = s
20551		v1.AddArg(p)
20552		v0.AddArg(v1)
20553		v0.AddArg(mem)
20554		return true
20555	}
20556	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])))))
20557	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
20558	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
20559	for {
20560		t := v.Type
20561		_ = v.Args[1]
20562		x7 := v.Args[0]
20563		if x7.Op != OpPPC64MOVBZload {
20564			break
20565		}
20566		i7 := x7.AuxInt
20567		s := x7.Aux
20568		mem := x7.Args[1]
20569		p := x7.Args[0]
20570		o5 := v.Args[1]
20571		if o5.Op != OpPPC64OR || o5.Type != t {
20572			break
20573		}
20574		_ = o5.Args[1]
20575		s6 := o5.Args[0]
20576		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 8 {
20577			break
20578		}
20579		x6 := s6.Args[0]
20580		if x6.Op != OpPPC64MOVBZload {
20581			break
20582		}
20583		i6 := x6.AuxInt
20584		if x6.Aux != s {
20585			break
20586		}
20587		_ = x6.Args[1]
20588		if p != x6.Args[0] || mem != x6.Args[1] {
20589			break
20590		}
20591		o4 := o5.Args[1]
20592		if o4.Op != OpPPC64OR || o4.Type != t {
20593			break
20594		}
20595		_ = o4.Args[1]
20596		s5 := o4.Args[0]
20597		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 16 {
20598			break
20599		}
20600		x5 := s5.Args[0]
20601		if x5.Op != OpPPC64MOVBZload {
20602			break
20603		}
20604		i5 := x5.AuxInt
20605		if x5.Aux != s {
20606			break
20607		}
20608		_ = x5.Args[1]
20609		if p != x5.Args[0] || mem != x5.Args[1] {
20610			break
20611		}
20612		o3 := o4.Args[1]
20613		if o3.Op != OpPPC64OR || o3.Type != t {
20614			break
20615		}
20616		_ = o3.Args[1]
20617		s0 := o3.Args[0]
20618		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 32 {
20619			break
20620		}
20621		x3 := s0.Args[0]
20622		if x3.Op != OpPPC64MOVWBRload || x3.Type != t {
20623			break
20624		}
20625		_ = x3.Args[1]
20626		x3_0 := x3.Args[0]
20627		if x3_0.Op != OpPPC64MOVDaddr || x3_0.Type != typ.Uintptr {
20628			break
20629		}
20630		i0 := x3_0.AuxInt
20631		if x3_0.Aux != s || p != x3_0.Args[0] || mem != x3.Args[1] {
20632			break
20633		}
20634		s4 := o3.Args[1]
20635		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 24 {
20636			break
20637		}
20638		x4 := s4.Args[0]
20639		if x4.Op != OpPPC64MOVBZload {
20640			break
20641		}
20642		i4 := x4.AuxInt
20643		if x4.Aux != s {
20644			break
20645		}
20646		_ = x4.Args[1]
20647		if p != x4.Args[0] || mem != x4.Args[1] || !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
20648			break
20649		}
20650		b = mergePoint(b, x3, x4, x5, x6, x7)
20651		v0 := b.NewValue0(x4.Pos, OpPPC64MOVDBRload, t)
20652		v.reset(OpCopy)
20653		v.AddArg(v0)
20654		v1 := b.NewValue0(x4.Pos, OpPPC64MOVDaddr, typ.Uintptr)
20655		v1.AuxInt = i0
20656		v1.Aux = s
20657		v1.AddArg(p)
20658		v0.AddArg(v1)
20659		v0.AddArg(mem)
20660		return true
20661	}
20662	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]))))
20663	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
20664	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
20665	for {
20666		t := v.Type
20667		_ = v.Args[1]
20668		x7 := v.Args[0]
20669		if x7.Op != OpPPC64MOVBZload {
20670			break
20671		}
20672		i7 := x7.AuxInt
20673		s := x7.Aux
20674		mem := x7.Args[1]
20675		p := x7.Args[0]
20676		o5 := v.Args[1]
20677		if o5.Op != OpPPC64OR || o5.Type != t {
20678			break
20679		}
20680		_ = o5.Args[1]
20681		s6 := o5.Args[0]
20682		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 8 {
20683			break
20684		}
20685		x6 := s6.Args[0]
20686		if x6.Op != OpPPC64MOVBZload {
20687			break
20688		}
20689		i6 := x6.AuxInt
20690		if x6.Aux != s {
20691			break
20692		}
20693		_ = x6.Args[1]
20694		if p != x6.Args[0] || mem != x6.Args[1] {
20695			break
20696		}
20697		o4 := o5.Args[1]
20698		if o4.Op != OpPPC64OR || o4.Type != t {
20699			break
20700		}
20701		_ = o4.Args[1]
20702		o3 := o4.Args[0]
20703		if o3.Op != OpPPC64OR || o3.Type != t {
20704			break
20705		}
20706		_ = o3.Args[1]
20707		s4 := o3.Args[0]
20708		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 24 {
20709			break
20710		}
20711		x4 := s4.Args[0]
20712		if x4.Op != OpPPC64MOVBZload {
20713			break
20714		}
20715		i4 := x4.AuxInt
20716		if x4.Aux != s {
20717			break
20718		}
20719		_ = x4.Args[1]
20720		if p != x4.Args[0] || mem != x4.Args[1] {
20721			break
20722		}
20723		s0 := o3.Args[1]
20724		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 32 {
20725			break
20726		}
20727		x3 := s0.Args[0]
20728		if x3.Op != OpPPC64MOVWBRload || x3.Type != t {
20729			break
20730		}
20731		_ = x3.Args[1]
20732		x3_0 := x3.Args[0]
20733		if x3_0.Op != OpPPC64MOVDaddr || x3_0.Type != typ.Uintptr {
20734			break
20735		}
20736		i0 := x3_0.AuxInt
20737		if x3_0.Aux != s || p != x3_0.Args[0] || mem != x3.Args[1] {
20738			break
20739		}
20740		s5 := o4.Args[1]
20741		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 16 {
20742			break
20743		}
20744		x5 := s5.Args[0]
20745		if x5.Op != OpPPC64MOVBZload {
20746			break
20747		}
20748		i5 := x5.AuxInt
20749		if x5.Aux != s {
20750			break
20751		}
20752		_ = x5.Args[1]
20753		if p != x5.Args[0] || mem != x5.Args[1] || !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
20754			break
20755		}
20756		b = mergePoint(b, x3, x4, x5, x6, x7)
20757		v0 := b.NewValue0(x5.Pos, OpPPC64MOVDBRload, t)
20758		v.reset(OpCopy)
20759		v.AddArg(v0)
20760		v1 := b.NewValue0(x5.Pos, OpPPC64MOVDaddr, typ.Uintptr)
20761		v1.AuxInt = i0
20762		v1.Aux = s
20763		v1.AddArg(p)
20764		v0.AddArg(v1)
20765		v0.AddArg(mem)
20766		return true
20767	}
20768	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> o3:(OR <t> s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]))))
20769	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
20770	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
20771	for {
20772		t := v.Type
20773		_ = v.Args[1]
20774		x7 := v.Args[0]
20775		if x7.Op != OpPPC64MOVBZload {
20776			break
20777		}
20778		i7 := x7.AuxInt
20779		s := x7.Aux
20780		mem := x7.Args[1]
20781		p := x7.Args[0]
20782		o5 := v.Args[1]
20783		if o5.Op != OpPPC64OR || o5.Type != t {
20784			break
20785		}
20786		_ = o5.Args[1]
20787		s6 := o5.Args[0]
20788		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 8 {
20789			break
20790		}
20791		x6 := s6.Args[0]
20792		if x6.Op != OpPPC64MOVBZload {
20793			break
20794		}
20795		i6 := x6.AuxInt
20796		if x6.Aux != s {
20797			break
20798		}
20799		_ = x6.Args[1]
20800		if p != x6.Args[0] || mem != x6.Args[1] {
20801			break
20802		}
20803		o4 := o5.Args[1]
20804		if o4.Op != OpPPC64OR || o4.Type != t {
20805			break
20806		}
20807		_ = o4.Args[1]
20808		o3 := o4.Args[0]
20809		if o3.Op != OpPPC64OR || o3.Type != t {
20810			break
20811		}
20812		_ = o3.Args[1]
20813		s0 := o3.Args[0]
20814		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 32 {
20815			break
20816		}
20817		x3 := s0.Args[0]
20818		if x3.Op != OpPPC64MOVWBRload || x3.Type != t {
20819			break
20820		}
20821		_ = x3.Args[1]
20822		x3_0 := x3.Args[0]
20823		if x3_0.Op != OpPPC64MOVDaddr || x3_0.Type != typ.Uintptr {
20824			break
20825		}
20826		i0 := x3_0.AuxInt
20827		if x3_0.Aux != s || p != x3_0.Args[0] || mem != x3.Args[1] {
20828			break
20829		}
20830		s4 := o3.Args[1]
20831		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 24 {
20832			break
20833		}
20834		x4 := s4.Args[0]
20835		if x4.Op != OpPPC64MOVBZload {
20836			break
20837		}
20838		i4 := x4.AuxInt
20839		if x4.Aux != s {
20840			break
20841		}
20842		_ = x4.Args[1]
20843		if p != x4.Args[0] || mem != x4.Args[1] {
20844			break
20845		}
20846		s5 := o4.Args[1]
20847		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 16 {
20848			break
20849		}
20850		x5 := s5.Args[0]
20851		if x5.Op != OpPPC64MOVBZload {
20852			break
20853		}
20854		i5 := x5.AuxInt
20855		if x5.Aux != s {
20856			break
20857		}
20858		_ = x5.Args[1]
20859		if p != x5.Args[0] || mem != x5.Args[1] || !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
20860			break
20861		}
20862		b = mergePoint(b, x3, x4, x5, x6, x7)
20863		v0 := b.NewValue0(x5.Pos, OpPPC64MOVDBRload, t)
20864		v.reset(OpCopy)
20865		v.AddArg(v0)
20866		v1 := b.NewValue0(x5.Pos, OpPPC64MOVDaddr, typ.Uintptr)
20867		v1.AuxInt = i0
20868		v1.Aux = s
20869		v1.AddArg(p)
20870		v0.AddArg(v1)
20871		v0.AddArg(mem)
20872		return true
20873	}
20874	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]))) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])))
20875	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
20876	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
20877	for {
20878		t := v.Type
20879		_ = v.Args[1]
20880		x7 := v.Args[0]
20881		if x7.Op != OpPPC64MOVBZload {
20882			break
20883		}
20884		i7 := x7.AuxInt
20885		s := x7.Aux
20886		mem := x7.Args[1]
20887		p := x7.Args[0]
20888		o5 := v.Args[1]
20889		if o5.Op != OpPPC64OR || o5.Type != t {
20890			break
20891		}
20892		_ = o5.Args[1]
20893		o4 := o5.Args[0]
20894		if o4.Op != OpPPC64OR || o4.Type != t {
20895			break
20896		}
20897		_ = o4.Args[1]
20898		s5 := o4.Args[0]
20899		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 16 {
20900			break
20901		}
20902		x5 := s5.Args[0]
20903		if x5.Op != OpPPC64MOVBZload {
20904			break
20905		}
20906		i5 := x5.AuxInt
20907		if x5.Aux != s {
20908			break
20909		}
20910		_ = x5.Args[1]
20911		if p != x5.Args[0] || mem != x5.Args[1] {
20912			break
20913		}
20914		o3 := o4.Args[1]
20915		if o3.Op != OpPPC64OR || o3.Type != t {
20916			break
20917		}
20918		_ = o3.Args[1]
20919		s4 := o3.Args[0]
20920		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 24 {
20921			break
20922		}
20923		x4 := s4.Args[0]
20924		if x4.Op != OpPPC64MOVBZload {
20925			break
20926		}
20927		i4 := x4.AuxInt
20928		if x4.Aux != s {
20929			break
20930		}
20931		_ = x4.Args[1]
20932		if p != x4.Args[0] || mem != x4.Args[1] {
20933			break
20934		}
20935		s0 := o3.Args[1]
20936		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 32 {
20937			break
20938		}
20939		x3 := s0.Args[0]
20940		if x3.Op != OpPPC64MOVWBRload || x3.Type != t {
20941			break
20942		}
20943		_ = x3.Args[1]
20944		x3_0 := x3.Args[0]
20945		if x3_0.Op != OpPPC64MOVDaddr || x3_0.Type != typ.Uintptr {
20946			break
20947		}
20948		i0 := x3_0.AuxInt
20949		if x3_0.Aux != s || p != x3_0.Args[0] || mem != x3.Args[1] {
20950			break
20951		}
20952		s6 := o5.Args[1]
20953		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 8 {
20954			break
20955		}
20956		x6 := s6.Args[0]
20957		if x6.Op != OpPPC64MOVBZload {
20958			break
20959		}
20960		i6 := x6.AuxInt
20961		if x6.Aux != s {
20962			break
20963		}
20964		_ = x6.Args[1]
20965		if p != x6.Args[0] || mem != x6.Args[1] || !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
20966			break
20967		}
20968		b = mergePoint(b, x3, x4, x5, x6, x7)
20969		v0 := b.NewValue0(x6.Pos, OpPPC64MOVDBRload, t)
20970		v.reset(OpCopy)
20971		v.AddArg(v0)
20972		v1 := b.NewValue0(x6.Pos, OpPPC64MOVDaddr, typ.Uintptr)
20973		v1.AuxInt = i0
20974		v1.Aux = s
20975		v1.AddArg(p)
20976		v0.AddArg(v1)
20977		v0.AddArg(mem)
20978		return true
20979	}
20980	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]))) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])))
20981	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
20982	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
20983	for {
20984		t := v.Type
20985		_ = v.Args[1]
20986		x7 := v.Args[0]
20987		if x7.Op != OpPPC64MOVBZload {
20988			break
20989		}
20990		i7 := x7.AuxInt
20991		s := x7.Aux
20992		mem := x7.Args[1]
20993		p := x7.Args[0]
20994		o5 := v.Args[1]
20995		if o5.Op != OpPPC64OR || o5.Type != t {
20996			break
20997		}
20998		_ = o5.Args[1]
20999		o4 := o5.Args[0]
21000		if o4.Op != OpPPC64OR || o4.Type != t {
21001			break
21002		}
21003		_ = o4.Args[1]
21004		s5 := o4.Args[0]
21005		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 16 {
21006			break
21007		}
21008		x5 := s5.Args[0]
21009		if x5.Op != OpPPC64MOVBZload {
21010			break
21011		}
21012		i5 := x5.AuxInt
21013		if x5.Aux != s {
21014			break
21015		}
21016		_ = x5.Args[1]
21017		if p != x5.Args[0] || mem != x5.Args[1] {
21018			break
21019		}
21020		o3 := o4.Args[1]
21021		if o3.Op != OpPPC64OR || o3.Type != t {
21022			break
21023		}
21024		_ = o3.Args[1]
21025		s0 := o3.Args[0]
21026		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 32 {
21027			break
21028		}
21029		x3 := s0.Args[0]
21030		if x3.Op != OpPPC64MOVWBRload || x3.Type != t {
21031			break
21032		}
21033		_ = x3.Args[1]
21034		x3_0 := x3.Args[0]
21035		if x3_0.Op != OpPPC64MOVDaddr || x3_0.Type != typ.Uintptr {
21036			break
21037		}
21038		i0 := x3_0.AuxInt
21039		if x3_0.Aux != s || p != x3_0.Args[0] || mem != x3.Args[1] {
21040			break
21041		}
21042		s4 := o3.Args[1]
21043		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 24 {
21044			break
21045		}
21046		x4 := s4.Args[0]
21047		if x4.Op != OpPPC64MOVBZload {
21048			break
21049		}
21050		i4 := x4.AuxInt
21051		if x4.Aux != s {
21052			break
21053		}
21054		_ = x4.Args[1]
21055		if p != x4.Args[0] || mem != x4.Args[1] {
21056			break
21057		}
21058		s6 := o5.Args[1]
21059		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 8 {
21060			break
21061		}
21062		x6 := s6.Args[0]
21063		if x6.Op != OpPPC64MOVBZload {
21064			break
21065		}
21066		i6 := x6.AuxInt
21067		if x6.Aux != s {
21068			break
21069		}
21070		_ = x6.Args[1]
21071		if p != x6.Args[0] || mem != x6.Args[1] || !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
21072			break
21073		}
21074		b = mergePoint(b, x3, x4, x5, x6, x7)
21075		v0 := b.NewValue0(x6.Pos, OpPPC64MOVDBRload, t)
21076		v.reset(OpCopy)
21077		v.AddArg(v0)
21078		v1 := b.NewValue0(x6.Pos, OpPPC64MOVDaddr, typ.Uintptr)
21079		v1.AuxInt = i0
21080		v1.Aux = s
21081		v1.AddArg(p)
21082		v0.AddArg(v1)
21083		v0.AddArg(mem)
21084		return true
21085	}
21086	return false
21087}
21088func rewriteValuePPC64_OpPPC64OR_110(v *Value) bool {
21089	b := v.Block
21090	config := b.Func.Config
21091	typ := &b.Func.Config.Types
21092	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> o4:(OR <t> o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16])) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])))
21093	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
21094	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
21095	for {
21096		t := v.Type
21097		_ = v.Args[1]
21098		x7 := v.Args[0]
21099		if x7.Op != OpPPC64MOVBZload {
21100			break
21101		}
21102		i7 := x7.AuxInt
21103		s := x7.Aux
21104		mem := x7.Args[1]
21105		p := x7.Args[0]
21106		o5 := v.Args[1]
21107		if o5.Op != OpPPC64OR || o5.Type != t {
21108			break
21109		}
21110		_ = o5.Args[1]
21111		o4 := o5.Args[0]
21112		if o4.Op != OpPPC64OR || o4.Type != t {
21113			break
21114		}
21115		_ = o4.Args[1]
21116		o3 := o4.Args[0]
21117		if o3.Op != OpPPC64OR || o3.Type != t {
21118			break
21119		}
21120		_ = o3.Args[1]
21121		s4 := o3.Args[0]
21122		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 24 {
21123			break
21124		}
21125		x4 := s4.Args[0]
21126		if x4.Op != OpPPC64MOVBZload {
21127			break
21128		}
21129		i4 := x4.AuxInt
21130		if x4.Aux != s {
21131			break
21132		}
21133		_ = x4.Args[1]
21134		if p != x4.Args[0] || mem != x4.Args[1] {
21135			break
21136		}
21137		s0 := o3.Args[1]
21138		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 32 {
21139			break
21140		}
21141		x3 := s0.Args[0]
21142		if x3.Op != OpPPC64MOVWBRload || x3.Type != t {
21143			break
21144		}
21145		_ = x3.Args[1]
21146		x3_0 := x3.Args[0]
21147		if x3_0.Op != OpPPC64MOVDaddr || x3_0.Type != typ.Uintptr {
21148			break
21149		}
21150		i0 := x3_0.AuxInt
21151		if x3_0.Aux != s || p != x3_0.Args[0] || mem != x3.Args[1] {
21152			break
21153		}
21154		s5 := o4.Args[1]
21155		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 16 {
21156			break
21157		}
21158		x5 := s5.Args[0]
21159		if x5.Op != OpPPC64MOVBZload {
21160			break
21161		}
21162		i5 := x5.AuxInt
21163		if x5.Aux != s {
21164			break
21165		}
21166		_ = x5.Args[1]
21167		if p != x5.Args[0] || mem != x5.Args[1] {
21168			break
21169		}
21170		s6 := o5.Args[1]
21171		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 8 {
21172			break
21173		}
21174		x6 := s6.Args[0]
21175		if x6.Op != OpPPC64MOVBZload {
21176			break
21177		}
21178		i6 := x6.AuxInt
21179		if x6.Aux != s {
21180			break
21181		}
21182		_ = x6.Args[1]
21183		if p != x6.Args[0] || mem != x6.Args[1] || !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
21184			break
21185		}
21186		b = mergePoint(b, x3, x4, x5, x6, x7)
21187		v0 := b.NewValue0(x6.Pos, OpPPC64MOVDBRload, t)
21188		v.reset(OpCopy)
21189		v.AddArg(v0)
21190		v1 := b.NewValue0(x6.Pos, OpPPC64MOVDaddr, typ.Uintptr)
21191		v1.AuxInt = i0
21192		v1.Aux = s
21193		v1.AddArg(p)
21194		v0.AddArg(v1)
21195		v0.AddArg(mem)
21196		return true
21197	}
21198	// match: (OR <t> x7:(MOVBZload [i7] {s} p mem) o5:(OR <t> o4:(OR <t> o3:(OR <t> s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16])) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])))
21199	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
21200	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
21201	for {
21202		t := v.Type
21203		_ = v.Args[1]
21204		x7 := v.Args[0]
21205		if x7.Op != OpPPC64MOVBZload {
21206			break
21207		}
21208		i7 := x7.AuxInt
21209		s := x7.Aux
21210		mem := x7.Args[1]
21211		p := x7.Args[0]
21212		o5 := v.Args[1]
21213		if o5.Op != OpPPC64OR || o5.Type != t {
21214			break
21215		}
21216		_ = o5.Args[1]
21217		o4 := o5.Args[0]
21218		if o4.Op != OpPPC64OR || o4.Type != t {
21219			break
21220		}
21221		_ = o4.Args[1]
21222		o3 := o4.Args[0]
21223		if o3.Op != OpPPC64OR || o3.Type != t {
21224			break
21225		}
21226		_ = o3.Args[1]
21227		s0 := o3.Args[0]
21228		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 32 {
21229			break
21230		}
21231		x3 := s0.Args[0]
21232		if x3.Op != OpPPC64MOVWBRload || x3.Type != t {
21233			break
21234		}
21235		_ = x3.Args[1]
21236		x3_0 := x3.Args[0]
21237		if x3_0.Op != OpPPC64MOVDaddr || x3_0.Type != typ.Uintptr {
21238			break
21239		}
21240		i0 := x3_0.AuxInt
21241		if x3_0.Aux != s || p != x3_0.Args[0] || mem != x3.Args[1] {
21242			break
21243		}
21244		s4 := o3.Args[1]
21245		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 24 {
21246			break
21247		}
21248		x4 := s4.Args[0]
21249		if x4.Op != OpPPC64MOVBZload {
21250			break
21251		}
21252		i4 := x4.AuxInt
21253		if x4.Aux != s {
21254			break
21255		}
21256		_ = x4.Args[1]
21257		if p != x4.Args[0] || mem != x4.Args[1] {
21258			break
21259		}
21260		s5 := o4.Args[1]
21261		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 16 {
21262			break
21263		}
21264		x5 := s5.Args[0]
21265		if x5.Op != OpPPC64MOVBZload {
21266			break
21267		}
21268		i5 := x5.AuxInt
21269		if x5.Aux != s {
21270			break
21271		}
21272		_ = x5.Args[1]
21273		if p != x5.Args[0] || mem != x5.Args[1] {
21274			break
21275		}
21276		s6 := o5.Args[1]
21277		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 8 {
21278			break
21279		}
21280		x6 := s6.Args[0]
21281		if x6.Op != OpPPC64MOVBZload {
21282			break
21283		}
21284		i6 := x6.AuxInt
21285		if x6.Aux != s {
21286			break
21287		}
21288		_ = x6.Args[1]
21289		if p != x6.Args[0] || mem != x6.Args[1] || !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
21290			break
21291		}
21292		b = mergePoint(b, x3, x4, x5, x6, x7)
21293		v0 := b.NewValue0(x6.Pos, OpPPC64MOVDBRload, t)
21294		v.reset(OpCopy)
21295		v.AddArg(v0)
21296		v1 := b.NewValue0(x6.Pos, OpPPC64MOVDaddr, typ.Uintptr)
21297		v1.AuxInt = i0
21298		v1.Aux = s
21299		v1.AddArg(p)
21300		v0.AddArg(v1)
21301		v0.AddArg(mem)
21302		return true
21303	}
21304	// match: (OR <t> o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])))) x7:(MOVBZload [i7] {s} p mem))
21305	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
21306	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
21307	for {
21308		t := v.Type
21309		_ = v.Args[1]
21310		o5 := v.Args[0]
21311		if o5.Op != OpPPC64OR || o5.Type != t {
21312			break
21313		}
21314		_ = o5.Args[1]
21315		s6 := o5.Args[0]
21316		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 8 {
21317			break
21318		}
21319		x6 := s6.Args[0]
21320		if x6.Op != OpPPC64MOVBZload {
21321			break
21322		}
21323		i6 := x6.AuxInt
21324		s := x6.Aux
21325		mem := x6.Args[1]
21326		p := x6.Args[0]
21327		o4 := o5.Args[1]
21328		if o4.Op != OpPPC64OR || o4.Type != t {
21329			break
21330		}
21331		_ = o4.Args[1]
21332		s5 := o4.Args[0]
21333		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 16 {
21334			break
21335		}
21336		x5 := s5.Args[0]
21337		if x5.Op != OpPPC64MOVBZload {
21338			break
21339		}
21340		i5 := x5.AuxInt
21341		if x5.Aux != s {
21342			break
21343		}
21344		_ = x5.Args[1]
21345		if p != x5.Args[0] || mem != x5.Args[1] {
21346			break
21347		}
21348		o3 := o4.Args[1]
21349		if o3.Op != OpPPC64OR || o3.Type != t {
21350			break
21351		}
21352		_ = o3.Args[1]
21353		s4 := o3.Args[0]
21354		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 24 {
21355			break
21356		}
21357		x4 := s4.Args[0]
21358		if x4.Op != OpPPC64MOVBZload {
21359			break
21360		}
21361		i4 := x4.AuxInt
21362		if x4.Aux != s {
21363			break
21364		}
21365		_ = x4.Args[1]
21366		if p != x4.Args[0] || mem != x4.Args[1] {
21367			break
21368		}
21369		s0 := o3.Args[1]
21370		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 32 {
21371			break
21372		}
21373		x3 := s0.Args[0]
21374		if x3.Op != OpPPC64MOVWBRload || x3.Type != t {
21375			break
21376		}
21377		_ = x3.Args[1]
21378		x3_0 := x3.Args[0]
21379		if x3_0.Op != OpPPC64MOVDaddr || x3_0.Type != typ.Uintptr {
21380			break
21381		}
21382		i0 := x3_0.AuxInt
21383		if x3_0.Aux != s || p != x3_0.Args[0] || mem != x3.Args[1] {
21384			break
21385		}
21386		x7 := v.Args[1]
21387		if x7.Op != OpPPC64MOVBZload {
21388			break
21389		}
21390		i7 := x7.AuxInt
21391		if x7.Aux != s {
21392			break
21393		}
21394		_ = x7.Args[1]
21395		if p != x7.Args[0] || mem != x7.Args[1] || !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
21396			break
21397		}
21398		b = mergePoint(b, x3, x4, x5, x6, x7)
21399		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
21400		v.reset(OpCopy)
21401		v.AddArg(v0)
21402		v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
21403		v1.AuxInt = i0
21404		v1.Aux = s
21405		v1.AddArg(p)
21406		v0.AddArg(v1)
21407		v0.AddArg(mem)
21408		return true
21409	}
21410	// match: (OR <t> o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])))) x7:(MOVBZload [i7] {s} p mem))
21411	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
21412	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
21413	for {
21414		t := v.Type
21415		_ = v.Args[1]
21416		o5 := v.Args[0]
21417		if o5.Op != OpPPC64OR || o5.Type != t {
21418			break
21419		}
21420		_ = o5.Args[1]
21421		s6 := o5.Args[0]
21422		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 8 {
21423			break
21424		}
21425		x6 := s6.Args[0]
21426		if x6.Op != OpPPC64MOVBZload {
21427			break
21428		}
21429		i6 := x6.AuxInt
21430		s := x6.Aux
21431		mem := x6.Args[1]
21432		p := x6.Args[0]
21433		o4 := o5.Args[1]
21434		if o4.Op != OpPPC64OR || o4.Type != t {
21435			break
21436		}
21437		_ = o4.Args[1]
21438		s5 := o4.Args[0]
21439		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 16 {
21440			break
21441		}
21442		x5 := s5.Args[0]
21443		if x5.Op != OpPPC64MOVBZload {
21444			break
21445		}
21446		i5 := x5.AuxInt
21447		if x5.Aux != s {
21448			break
21449		}
21450		_ = x5.Args[1]
21451		if p != x5.Args[0] || mem != x5.Args[1] {
21452			break
21453		}
21454		o3 := o4.Args[1]
21455		if o3.Op != OpPPC64OR || o3.Type != t {
21456			break
21457		}
21458		_ = o3.Args[1]
21459		s0 := o3.Args[0]
21460		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 32 {
21461			break
21462		}
21463		x3 := s0.Args[0]
21464		if x3.Op != OpPPC64MOVWBRload || x3.Type != t {
21465			break
21466		}
21467		_ = x3.Args[1]
21468		x3_0 := x3.Args[0]
21469		if x3_0.Op != OpPPC64MOVDaddr || x3_0.Type != typ.Uintptr {
21470			break
21471		}
21472		i0 := x3_0.AuxInt
21473		if x3_0.Aux != s || p != x3_0.Args[0] || mem != x3.Args[1] {
21474			break
21475		}
21476		s4 := o3.Args[1]
21477		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 24 {
21478			break
21479		}
21480		x4 := s4.Args[0]
21481		if x4.Op != OpPPC64MOVBZload {
21482			break
21483		}
21484		i4 := x4.AuxInt
21485		if x4.Aux != s {
21486			break
21487		}
21488		_ = x4.Args[1]
21489		if p != x4.Args[0] || mem != x4.Args[1] {
21490			break
21491		}
21492		x7 := v.Args[1]
21493		if x7.Op != OpPPC64MOVBZload {
21494			break
21495		}
21496		i7 := x7.AuxInt
21497		if x7.Aux != s {
21498			break
21499		}
21500		_ = x7.Args[1]
21501		if p != x7.Args[0] || mem != x7.Args[1] || !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
21502			break
21503		}
21504		b = mergePoint(b, x3, x4, x5, x6, x7)
21505		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
21506		v.reset(OpCopy)
21507		v.AddArg(v0)
21508		v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
21509		v1.AuxInt = i0
21510		v1.Aux = s
21511		v1.AddArg(p)
21512		v0.AddArg(v1)
21513		v0.AddArg(mem)
21514		return true
21515	}
21516	// match: (OR <t> o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]))) x7:(MOVBZload [i7] {s} p mem))
21517	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
21518	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
21519	for {
21520		t := v.Type
21521		_ = v.Args[1]
21522		o5 := v.Args[0]
21523		if o5.Op != OpPPC64OR || o5.Type != t {
21524			break
21525		}
21526		_ = o5.Args[1]
21527		s6 := o5.Args[0]
21528		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 8 {
21529			break
21530		}
21531		x6 := s6.Args[0]
21532		if x6.Op != OpPPC64MOVBZload {
21533			break
21534		}
21535		i6 := x6.AuxInt
21536		s := x6.Aux
21537		mem := x6.Args[1]
21538		p := x6.Args[0]
21539		o4 := o5.Args[1]
21540		if o4.Op != OpPPC64OR || o4.Type != t {
21541			break
21542		}
21543		_ = o4.Args[1]
21544		o3 := o4.Args[0]
21545		if o3.Op != OpPPC64OR || o3.Type != t {
21546			break
21547		}
21548		_ = o3.Args[1]
21549		s4 := o3.Args[0]
21550		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 24 {
21551			break
21552		}
21553		x4 := s4.Args[0]
21554		if x4.Op != OpPPC64MOVBZload {
21555			break
21556		}
21557		i4 := x4.AuxInt
21558		if x4.Aux != s {
21559			break
21560		}
21561		_ = x4.Args[1]
21562		if p != x4.Args[0] || mem != x4.Args[1] {
21563			break
21564		}
21565		s0 := o3.Args[1]
21566		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 32 {
21567			break
21568		}
21569		x3 := s0.Args[0]
21570		if x3.Op != OpPPC64MOVWBRload || x3.Type != t {
21571			break
21572		}
21573		_ = x3.Args[1]
21574		x3_0 := x3.Args[0]
21575		if x3_0.Op != OpPPC64MOVDaddr || x3_0.Type != typ.Uintptr {
21576			break
21577		}
21578		i0 := x3_0.AuxInt
21579		if x3_0.Aux != s || p != x3_0.Args[0] || mem != x3.Args[1] {
21580			break
21581		}
21582		s5 := o4.Args[1]
21583		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 16 {
21584			break
21585		}
21586		x5 := s5.Args[0]
21587		if x5.Op != OpPPC64MOVBZload {
21588			break
21589		}
21590		i5 := x5.AuxInt
21591		if x5.Aux != s {
21592			break
21593		}
21594		_ = x5.Args[1]
21595		if p != x5.Args[0] || mem != x5.Args[1] {
21596			break
21597		}
21598		x7 := v.Args[1]
21599		if x7.Op != OpPPC64MOVBZload {
21600			break
21601		}
21602		i7 := x7.AuxInt
21603		if x7.Aux != s {
21604			break
21605		}
21606		_ = x7.Args[1]
21607		if p != x7.Args[0] || mem != x7.Args[1] || !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
21608			break
21609		}
21610		b = mergePoint(b, x3, x4, x5, x6, x7)
21611		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
21612		v.reset(OpCopy)
21613		v.AddArg(v0)
21614		v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
21615		v1.AuxInt = i0
21616		v1.Aux = s
21617		v1.AddArg(p)
21618		v0.AddArg(v1)
21619		v0.AddArg(mem)
21620		return true
21621	}
21622	// match: (OR <t> o5:(OR <t> s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8]) o4:(OR <t> o3:(OR <t> s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]))) x7:(MOVBZload [i7] {s} p mem))
21623	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
21624	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
21625	for {
21626		t := v.Type
21627		_ = v.Args[1]
21628		o5 := v.Args[0]
21629		if o5.Op != OpPPC64OR || o5.Type != t {
21630			break
21631		}
21632		_ = o5.Args[1]
21633		s6 := o5.Args[0]
21634		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 8 {
21635			break
21636		}
21637		x6 := s6.Args[0]
21638		if x6.Op != OpPPC64MOVBZload {
21639			break
21640		}
21641		i6 := x6.AuxInt
21642		s := x6.Aux
21643		mem := x6.Args[1]
21644		p := x6.Args[0]
21645		o4 := o5.Args[1]
21646		if o4.Op != OpPPC64OR || o4.Type != t {
21647			break
21648		}
21649		_ = o4.Args[1]
21650		o3 := o4.Args[0]
21651		if o3.Op != OpPPC64OR || o3.Type != t {
21652			break
21653		}
21654		_ = o3.Args[1]
21655		s0 := o3.Args[0]
21656		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 32 {
21657			break
21658		}
21659		x3 := s0.Args[0]
21660		if x3.Op != OpPPC64MOVWBRload || x3.Type != t {
21661			break
21662		}
21663		_ = x3.Args[1]
21664		x3_0 := x3.Args[0]
21665		if x3_0.Op != OpPPC64MOVDaddr || x3_0.Type != typ.Uintptr {
21666			break
21667		}
21668		i0 := x3_0.AuxInt
21669		if x3_0.Aux != s || p != x3_0.Args[0] || mem != x3.Args[1] {
21670			break
21671		}
21672		s4 := o3.Args[1]
21673		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 24 {
21674			break
21675		}
21676		x4 := s4.Args[0]
21677		if x4.Op != OpPPC64MOVBZload {
21678			break
21679		}
21680		i4 := x4.AuxInt
21681		if x4.Aux != s {
21682			break
21683		}
21684		_ = x4.Args[1]
21685		if p != x4.Args[0] || mem != x4.Args[1] {
21686			break
21687		}
21688		s5 := o4.Args[1]
21689		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 16 {
21690			break
21691		}
21692		x5 := s5.Args[0]
21693		if x5.Op != OpPPC64MOVBZload {
21694			break
21695		}
21696		i5 := x5.AuxInt
21697		if x5.Aux != s {
21698			break
21699		}
21700		_ = x5.Args[1]
21701		if p != x5.Args[0] || mem != x5.Args[1] {
21702			break
21703		}
21704		x7 := v.Args[1]
21705		if x7.Op != OpPPC64MOVBZload {
21706			break
21707		}
21708		i7 := x7.AuxInt
21709		if x7.Aux != s {
21710			break
21711		}
21712		_ = x7.Args[1]
21713		if p != x7.Args[0] || mem != x7.Args[1] || !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
21714			break
21715		}
21716		b = mergePoint(b, x3, x4, x5, x6, x7)
21717		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
21718		v.reset(OpCopy)
21719		v.AddArg(v0)
21720		v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
21721		v1.AuxInt = i0
21722		v1.Aux = s
21723		v1.AddArg(p)
21724		v0.AddArg(v1)
21725		v0.AddArg(mem)
21726		return true
21727	}
21728	// match: (OR <t> o5:(OR <t> o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]))) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])) x7:(MOVBZload [i7] {s} p mem))
21729	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
21730	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
21731	for {
21732		t := v.Type
21733		_ = v.Args[1]
21734		o5 := v.Args[0]
21735		if o5.Op != OpPPC64OR || o5.Type != t {
21736			break
21737		}
21738		_ = o5.Args[1]
21739		o4 := o5.Args[0]
21740		if o4.Op != OpPPC64OR || o4.Type != t {
21741			break
21742		}
21743		_ = o4.Args[1]
21744		s5 := o4.Args[0]
21745		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 16 {
21746			break
21747		}
21748		x5 := s5.Args[0]
21749		if x5.Op != OpPPC64MOVBZload {
21750			break
21751		}
21752		i5 := x5.AuxInt
21753		s := x5.Aux
21754		mem := x5.Args[1]
21755		p := x5.Args[0]
21756		o3 := o4.Args[1]
21757		if o3.Op != OpPPC64OR || o3.Type != t {
21758			break
21759		}
21760		_ = o3.Args[1]
21761		s4 := o3.Args[0]
21762		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 24 {
21763			break
21764		}
21765		x4 := s4.Args[0]
21766		if x4.Op != OpPPC64MOVBZload {
21767			break
21768		}
21769		i4 := x4.AuxInt
21770		if x4.Aux != s {
21771			break
21772		}
21773		_ = x4.Args[1]
21774		if p != x4.Args[0] || mem != x4.Args[1] {
21775			break
21776		}
21777		s0 := o3.Args[1]
21778		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 32 {
21779			break
21780		}
21781		x3 := s0.Args[0]
21782		if x3.Op != OpPPC64MOVWBRload || x3.Type != t {
21783			break
21784		}
21785		_ = x3.Args[1]
21786		x3_0 := x3.Args[0]
21787		if x3_0.Op != OpPPC64MOVDaddr || x3_0.Type != typ.Uintptr {
21788			break
21789		}
21790		i0 := x3_0.AuxInt
21791		if x3_0.Aux != s || p != x3_0.Args[0] || mem != x3.Args[1] {
21792			break
21793		}
21794		s6 := o5.Args[1]
21795		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 8 {
21796			break
21797		}
21798		x6 := s6.Args[0]
21799		if x6.Op != OpPPC64MOVBZload {
21800			break
21801		}
21802		i6 := x6.AuxInt
21803		if x6.Aux != s {
21804			break
21805		}
21806		_ = x6.Args[1]
21807		if p != x6.Args[0] || mem != x6.Args[1] {
21808			break
21809		}
21810		x7 := v.Args[1]
21811		if x7.Op != OpPPC64MOVBZload {
21812			break
21813		}
21814		i7 := x7.AuxInt
21815		if x7.Aux != s {
21816			break
21817		}
21818		_ = x7.Args[1]
21819		if p != x7.Args[0] || mem != x7.Args[1] || !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
21820			break
21821		}
21822		b = mergePoint(b, x3, x4, x5, x6, x7)
21823		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
21824		v.reset(OpCopy)
21825		v.AddArg(v0)
21826		v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
21827		v1.AuxInt = i0
21828		v1.Aux = s
21829		v1.AddArg(p)
21830		v0.AddArg(v1)
21831		v0.AddArg(mem)
21832		return true
21833	}
21834	// match: (OR <t> o5:(OR <t> o4:(OR <t> s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16]) o3:(OR <t> s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]))) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])) x7:(MOVBZload [i7] {s} p mem))
21835	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
21836	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
21837	for {
21838		t := v.Type
21839		_ = v.Args[1]
21840		o5 := v.Args[0]
21841		if o5.Op != OpPPC64OR || o5.Type != t {
21842			break
21843		}
21844		_ = o5.Args[1]
21845		o4 := o5.Args[0]
21846		if o4.Op != OpPPC64OR || o4.Type != t {
21847			break
21848		}
21849		_ = o4.Args[1]
21850		s5 := o4.Args[0]
21851		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 16 {
21852			break
21853		}
21854		x5 := s5.Args[0]
21855		if x5.Op != OpPPC64MOVBZload {
21856			break
21857		}
21858		i5 := x5.AuxInt
21859		s := x5.Aux
21860		mem := x5.Args[1]
21861		p := x5.Args[0]
21862		o3 := o4.Args[1]
21863		if o3.Op != OpPPC64OR || o3.Type != t {
21864			break
21865		}
21866		_ = o3.Args[1]
21867		s0 := o3.Args[0]
21868		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 32 {
21869			break
21870		}
21871		x3 := s0.Args[0]
21872		if x3.Op != OpPPC64MOVWBRload || x3.Type != t {
21873			break
21874		}
21875		_ = x3.Args[1]
21876		x3_0 := x3.Args[0]
21877		if x3_0.Op != OpPPC64MOVDaddr || x3_0.Type != typ.Uintptr {
21878			break
21879		}
21880		i0 := x3_0.AuxInt
21881		if x3_0.Aux != s || p != x3_0.Args[0] || mem != x3.Args[1] {
21882			break
21883		}
21884		s4 := o3.Args[1]
21885		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 24 {
21886			break
21887		}
21888		x4 := s4.Args[0]
21889		if x4.Op != OpPPC64MOVBZload {
21890			break
21891		}
21892		i4 := x4.AuxInt
21893		if x4.Aux != s {
21894			break
21895		}
21896		_ = x4.Args[1]
21897		if p != x4.Args[0] || mem != x4.Args[1] {
21898			break
21899		}
21900		s6 := o5.Args[1]
21901		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 8 {
21902			break
21903		}
21904		x6 := s6.Args[0]
21905		if x6.Op != OpPPC64MOVBZload {
21906			break
21907		}
21908		i6 := x6.AuxInt
21909		if x6.Aux != s {
21910			break
21911		}
21912		_ = x6.Args[1]
21913		if p != x6.Args[0] || mem != x6.Args[1] {
21914			break
21915		}
21916		x7 := v.Args[1]
21917		if x7.Op != OpPPC64MOVBZload {
21918			break
21919		}
21920		i7 := x7.AuxInt
21921		if x7.Aux != s {
21922			break
21923		}
21924		_ = x7.Args[1]
21925		if p != x7.Args[0] || mem != x7.Args[1] || !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
21926			break
21927		}
21928		b = mergePoint(b, x3, x4, x5, x6, x7)
21929		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
21930		v.reset(OpCopy)
21931		v.AddArg(v0)
21932		v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
21933		v1.AuxInt = i0
21934		v1.Aux = s
21935		v1.AddArg(p)
21936		v0.AddArg(v1)
21937		v0.AddArg(mem)
21938		return true
21939	}
21940	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24]) s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16])) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])) x7:(MOVBZload [i7] {s} p mem))
21941	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
21942	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
21943	for {
21944		t := v.Type
21945		_ = v.Args[1]
21946		o5 := v.Args[0]
21947		if o5.Op != OpPPC64OR || o5.Type != t {
21948			break
21949		}
21950		_ = o5.Args[1]
21951		o4 := o5.Args[0]
21952		if o4.Op != OpPPC64OR || o4.Type != t {
21953			break
21954		}
21955		_ = o4.Args[1]
21956		o3 := o4.Args[0]
21957		if o3.Op != OpPPC64OR || o3.Type != t {
21958			break
21959		}
21960		_ = o3.Args[1]
21961		s4 := o3.Args[0]
21962		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 24 {
21963			break
21964		}
21965		x4 := s4.Args[0]
21966		if x4.Op != OpPPC64MOVBZload {
21967			break
21968		}
21969		i4 := x4.AuxInt
21970		s := x4.Aux
21971		mem := x4.Args[1]
21972		p := x4.Args[0]
21973		s0 := o3.Args[1]
21974		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 32 {
21975			break
21976		}
21977		x3 := s0.Args[0]
21978		if x3.Op != OpPPC64MOVWBRload || x3.Type != t {
21979			break
21980		}
21981		_ = x3.Args[1]
21982		x3_0 := x3.Args[0]
21983		if x3_0.Op != OpPPC64MOVDaddr || x3_0.Type != typ.Uintptr {
21984			break
21985		}
21986		i0 := x3_0.AuxInt
21987		if x3_0.Aux != s || p != x3_0.Args[0] || mem != x3.Args[1] {
21988			break
21989		}
21990		s5 := o4.Args[1]
21991		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 16 {
21992			break
21993		}
21994		x5 := s5.Args[0]
21995		if x5.Op != OpPPC64MOVBZload {
21996			break
21997		}
21998		i5 := x5.AuxInt
21999		if x5.Aux != s {
22000			break
22001		}
22002		_ = x5.Args[1]
22003		if p != x5.Args[0] || mem != x5.Args[1] {
22004			break
22005		}
22006		s6 := o5.Args[1]
22007		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 8 {
22008			break
22009		}
22010		x6 := s6.Args[0]
22011		if x6.Op != OpPPC64MOVBZload {
22012			break
22013		}
22014		i6 := x6.AuxInt
22015		if x6.Aux != s {
22016			break
22017		}
22018		_ = x6.Args[1]
22019		if p != x6.Args[0] || mem != x6.Args[1] {
22020			break
22021		}
22022		x7 := v.Args[1]
22023		if x7.Op != OpPPC64MOVBZload {
22024			break
22025		}
22026		i7 := x7.AuxInt
22027		if x7.Aux != s {
22028			break
22029		}
22030		_ = x7.Args[1]
22031		if p != x7.Args[0] || mem != x7.Args[1] || !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
22032			break
22033		}
22034		b = mergePoint(b, x3, x4, x5, x6, x7)
22035		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
22036		v.reset(OpCopy)
22037		v.AddArg(v0)
22038		v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
22039		v1.AuxInt = i0
22040		v1.Aux = s
22041		v1.AddArg(p)
22042		v0.AddArg(v1)
22043		v0.AddArg(mem)
22044		return true
22045	}
22046	// match: (OR <t> o5:(OR <t> o4:(OR <t> o3:(OR <t> s0:(SLDconst x3:(MOVWBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem) [32]) s4:(SLDconst x4:(MOVBZload [i4] {s} p mem) [24])) s5:(SLDconst x5:(MOVBZload [i5] {s} p mem) [16])) s6:(SLDconst x6:(MOVBZload [i6] {s} p mem) [8])) x7:(MOVBZload [i7] {s} p mem))
22047	// cond: !config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)
22048	// result: @mergePoint(b,x3,x4,x5,x6,x7) (MOVDBRload <t> (MOVDaddr <typ.Uintptr> [i0] {s} p) mem)
22049	for {
22050		t := v.Type
22051		_ = v.Args[1]
22052		o5 := v.Args[0]
22053		if o5.Op != OpPPC64OR || o5.Type != t {
22054			break
22055		}
22056		_ = o5.Args[1]
22057		o4 := o5.Args[0]
22058		if o4.Op != OpPPC64OR || o4.Type != t {
22059			break
22060		}
22061		_ = o4.Args[1]
22062		o3 := o4.Args[0]
22063		if o3.Op != OpPPC64OR || o3.Type != t {
22064			break
22065		}
22066		_ = o3.Args[1]
22067		s0 := o3.Args[0]
22068		if s0.Op != OpPPC64SLDconst || s0.AuxInt != 32 {
22069			break
22070		}
22071		x3 := s0.Args[0]
22072		if x3.Op != OpPPC64MOVWBRload || x3.Type != t {
22073			break
22074		}
22075		mem := x3.Args[1]
22076		x3_0 := x3.Args[0]
22077		if x3_0.Op != OpPPC64MOVDaddr || x3_0.Type != typ.Uintptr {
22078			break
22079		}
22080		i0 := x3_0.AuxInt
22081		s := x3_0.Aux
22082		p := x3_0.Args[0]
22083		s4 := o3.Args[1]
22084		if s4.Op != OpPPC64SLDconst || s4.AuxInt != 24 {
22085			break
22086		}
22087		x4 := s4.Args[0]
22088		if x4.Op != OpPPC64MOVBZload {
22089			break
22090		}
22091		i4 := x4.AuxInt
22092		if x4.Aux != s {
22093			break
22094		}
22095		_ = x4.Args[1]
22096		if p != x4.Args[0] || mem != x4.Args[1] {
22097			break
22098		}
22099		s5 := o4.Args[1]
22100		if s5.Op != OpPPC64SLDconst || s5.AuxInt != 16 {
22101			break
22102		}
22103		x5 := s5.Args[0]
22104		if x5.Op != OpPPC64MOVBZload {
22105			break
22106		}
22107		i5 := x5.AuxInt
22108		if x5.Aux != s {
22109			break
22110		}
22111		_ = x5.Args[1]
22112		if p != x5.Args[0] || mem != x5.Args[1] {
22113			break
22114		}
22115		s6 := o5.Args[1]
22116		if s6.Op != OpPPC64SLDconst || s6.AuxInt != 8 {
22117			break
22118		}
22119		x6 := s6.Args[0]
22120		if x6.Op != OpPPC64MOVBZload {
22121			break
22122		}
22123		i6 := x6.AuxInt
22124		if x6.Aux != s {
22125			break
22126		}
22127		_ = x6.Args[1]
22128		if p != x6.Args[0] || mem != x6.Args[1] {
22129			break
22130		}
22131		x7 := v.Args[1]
22132		if x7.Op != OpPPC64MOVBZload {
22133			break
22134		}
22135		i7 := x7.AuxInt
22136		if x7.Aux != s {
22137			break
22138		}
22139		_ = x7.Args[1]
22140		if p != x7.Args[0] || mem != x7.Args[1] || !(!config.BigEndian && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && mergePoint(b, x3, x4, x5, x6, x7) != nil && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0) && clobber(s4) && clobber(s5) && clobber(s6)) {
22141			break
22142		}
22143		b = mergePoint(b, x3, x4, x5, x6, x7)
22144		v0 := b.NewValue0(x7.Pos, OpPPC64MOVDBRload, t)
22145		v.reset(OpCopy)
22146		v.AddArg(v0)
22147		v1 := b.NewValue0(x7.Pos, OpPPC64MOVDaddr, typ.Uintptr)
22148		v1.AuxInt = i0
22149		v1.Aux = s
22150		v1.AddArg(p)
22151		v0.AddArg(v1)
22152		v0.AddArg(mem)
22153		return true
22154	}
22155	return false
22156}
22157func rewriteValuePPC64_OpPPC64ORN_0(v *Value) bool {
22158	// match: (ORN x (MOVDconst [-1]))
22159	// result: x
22160	for {
22161		_ = v.Args[1]
22162		x := v.Args[0]
22163		v_1 := v.Args[1]
22164		if v_1.Op != OpPPC64MOVDconst || v_1.AuxInt != -1 {
22165			break
22166		}
22167		v.reset(OpCopy)
22168		v.Type = x.Type
22169		v.AddArg(x)
22170		return true
22171	}
22172	return false
22173}
22174func rewriteValuePPC64_OpPPC64ORconst_0(v *Value) bool {
22175	// match: (ORconst [c] (ORconst [d] x))
22176	// result: (ORconst [c|d] x)
22177	for {
22178		c := v.AuxInt
22179		v_0 := v.Args[0]
22180		if v_0.Op != OpPPC64ORconst {
22181			break
22182		}
22183		d := v_0.AuxInt
22184		x := v_0.Args[0]
22185		v.reset(OpPPC64ORconst)
22186		v.AuxInt = c | d
22187		v.AddArg(x)
22188		return true
22189	}
22190	// match: (ORconst [-1] _)
22191	// result: (MOVDconst [-1])
22192	for {
22193		if v.AuxInt != -1 {
22194			break
22195		}
22196		v.reset(OpPPC64MOVDconst)
22197		v.AuxInt = -1
22198		return true
22199	}
22200	// match: (ORconst [0] x)
22201	// result: x
22202	for {
22203		if v.AuxInt != 0 {
22204			break
22205		}
22206		x := v.Args[0]
22207		v.reset(OpCopy)
22208		v.Type = x.Type
22209		v.AddArg(x)
22210		return true
22211	}
22212	return false
22213}
22214func rewriteValuePPC64_OpPPC64ROTL_0(v *Value) bool {
22215	// match: (ROTL x (MOVDconst [c]))
22216	// result: (ROTLconst x [c&63])
22217	for {
22218		_ = v.Args[1]
22219		x := v.Args[0]
22220		v_1 := v.Args[1]
22221		if v_1.Op != OpPPC64MOVDconst {
22222			break
22223		}
22224		c := v_1.AuxInt
22225		v.reset(OpPPC64ROTLconst)
22226		v.AuxInt = c & 63
22227		v.AddArg(x)
22228		return true
22229	}
22230	return false
22231}
22232func rewriteValuePPC64_OpPPC64ROTLW_0(v *Value) bool {
22233	// match: (ROTLW x (MOVDconst [c]))
22234	// result: (ROTLWconst x [c&31])
22235	for {
22236		_ = v.Args[1]
22237		x := v.Args[0]
22238		v_1 := v.Args[1]
22239		if v_1.Op != OpPPC64MOVDconst {
22240			break
22241		}
22242		c := v_1.AuxInt
22243		v.reset(OpPPC64ROTLWconst)
22244		v.AuxInt = c & 31
22245		v.AddArg(x)
22246		return true
22247	}
22248	return false
22249}
22250func rewriteValuePPC64_OpPPC64SUB_0(v *Value) bool {
22251	// match: (SUB x (MOVDconst [c]))
22252	// cond: is32Bit(-c)
22253	// result: (ADDconst [-c] x)
22254	for {
22255		_ = v.Args[1]
22256		x := v.Args[0]
22257		v_1 := v.Args[1]
22258		if v_1.Op != OpPPC64MOVDconst {
22259			break
22260		}
22261		c := v_1.AuxInt
22262		if !(is32Bit(-c)) {
22263			break
22264		}
22265		v.reset(OpPPC64ADDconst)
22266		v.AuxInt = -c
22267		v.AddArg(x)
22268		return true
22269	}
22270	return false
22271}
22272func rewriteValuePPC64_OpPPC64XOR_0(v *Value) bool {
22273	b := v.Block
22274	typ := &b.Func.Config.Types
22275	// match: (XOR (SLDconst x [c]) (SRDconst x [d]))
22276	// cond: d == 64-c
22277	// result: (ROTLconst [c] x)
22278	for {
22279		_ = v.Args[1]
22280		v_0 := v.Args[0]
22281		if v_0.Op != OpPPC64SLDconst {
22282			break
22283		}
22284		c := v_0.AuxInt
22285		x := v_0.Args[0]
22286		v_1 := v.Args[1]
22287		if v_1.Op != OpPPC64SRDconst {
22288			break
22289		}
22290		d := v_1.AuxInt
22291		if x != v_1.Args[0] || !(d == 64-c) {
22292			break
22293		}
22294		v.reset(OpPPC64ROTLconst)
22295		v.AuxInt = c
22296		v.AddArg(x)
22297		return true
22298	}
22299	// match: (XOR (SRDconst x [d]) (SLDconst x [c]))
22300	// cond: d == 64-c
22301	// result: (ROTLconst [c] x)
22302	for {
22303		_ = v.Args[1]
22304		v_0 := v.Args[0]
22305		if v_0.Op != OpPPC64SRDconst {
22306			break
22307		}
22308		d := v_0.AuxInt
22309		x := v_0.Args[0]
22310		v_1 := v.Args[1]
22311		if v_1.Op != OpPPC64SLDconst {
22312			break
22313		}
22314		c := v_1.AuxInt
22315		if x != v_1.Args[0] || !(d == 64-c) {
22316			break
22317		}
22318		v.reset(OpPPC64ROTLconst)
22319		v.AuxInt = c
22320		v.AddArg(x)
22321		return true
22322	}
22323	// match: (XOR (SLWconst x [c]) (SRWconst x [d]))
22324	// cond: d == 32-c
22325	// result: (ROTLWconst [c] x)
22326	for {
22327		_ = v.Args[1]
22328		v_0 := v.Args[0]
22329		if v_0.Op != OpPPC64SLWconst {
22330			break
22331		}
22332		c := v_0.AuxInt
22333		x := v_0.Args[0]
22334		v_1 := v.Args[1]
22335		if v_1.Op != OpPPC64SRWconst {
22336			break
22337		}
22338		d := v_1.AuxInt
22339		if x != v_1.Args[0] || !(d == 32-c) {
22340			break
22341		}
22342		v.reset(OpPPC64ROTLWconst)
22343		v.AuxInt = c
22344		v.AddArg(x)
22345		return true
22346	}
22347	// match: (XOR (SRWconst x [d]) (SLWconst x [c]))
22348	// cond: d == 32-c
22349	// result: (ROTLWconst [c] x)
22350	for {
22351		_ = v.Args[1]
22352		v_0 := v.Args[0]
22353		if v_0.Op != OpPPC64SRWconst {
22354			break
22355		}
22356		d := v_0.AuxInt
22357		x := v_0.Args[0]
22358		v_1 := v.Args[1]
22359		if v_1.Op != OpPPC64SLWconst {
22360			break
22361		}
22362		c := v_1.AuxInt
22363		if x != v_1.Args[0] || !(d == 32-c) {
22364			break
22365		}
22366		v.reset(OpPPC64ROTLWconst)
22367		v.AuxInt = c
22368		v.AddArg(x)
22369		return true
22370	}
22371	// match: (XOR (SLD x (ANDconst <typ.Int64> [63] y)) (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))))
22372	// result: (ROTL x y)
22373	for {
22374		_ = v.Args[1]
22375		v_0 := v.Args[0]
22376		if v_0.Op != OpPPC64SLD {
22377			break
22378		}
22379		_ = v_0.Args[1]
22380		x := v_0.Args[0]
22381		v_0_1 := v_0.Args[1]
22382		if v_0_1.Op != OpPPC64ANDconst || v_0_1.Type != typ.Int64 || v_0_1.AuxInt != 63 {
22383			break
22384		}
22385		y := v_0_1.Args[0]
22386		v_1 := v.Args[1]
22387		if v_1.Op != OpPPC64SRD {
22388			break
22389		}
22390		_ = v_1.Args[1]
22391		if x != v_1.Args[0] {
22392			break
22393		}
22394		v_1_1 := v_1.Args[1]
22395		if v_1_1.Op != OpPPC64SUB || v_1_1.Type != typ.UInt {
22396			break
22397		}
22398		_ = v_1_1.Args[1]
22399		v_1_1_0 := v_1_1.Args[0]
22400		if v_1_1_0.Op != OpPPC64MOVDconst || v_1_1_0.AuxInt != 64 {
22401			break
22402		}
22403		v_1_1_1 := v_1_1.Args[1]
22404		if v_1_1_1.Op != OpPPC64ANDconst || v_1_1_1.Type != typ.UInt || v_1_1_1.AuxInt != 63 || y != v_1_1_1.Args[0] {
22405			break
22406		}
22407		v.reset(OpPPC64ROTL)
22408		v.AddArg(x)
22409		v.AddArg(y)
22410		return true
22411	}
22412	// match: (XOR (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y))) (SLD x (ANDconst <typ.Int64> [63] y)))
22413	// result: (ROTL x y)
22414	for {
22415		_ = v.Args[1]
22416		v_0 := v.Args[0]
22417		if v_0.Op != OpPPC64SRD {
22418			break
22419		}
22420		_ = v_0.Args[1]
22421		x := v_0.Args[0]
22422		v_0_1 := v_0.Args[1]
22423		if v_0_1.Op != OpPPC64SUB || v_0_1.Type != typ.UInt {
22424			break
22425		}
22426		_ = v_0_1.Args[1]
22427		v_0_1_0 := v_0_1.Args[0]
22428		if v_0_1_0.Op != OpPPC64MOVDconst || v_0_1_0.AuxInt != 64 {
22429			break
22430		}
22431		v_0_1_1 := v_0_1.Args[1]
22432		if v_0_1_1.Op != OpPPC64ANDconst || v_0_1_1.Type != typ.UInt || v_0_1_1.AuxInt != 63 {
22433			break
22434		}
22435		y := v_0_1_1.Args[0]
22436		v_1 := v.Args[1]
22437		if v_1.Op != OpPPC64SLD {
22438			break
22439		}
22440		_ = v_1.Args[1]
22441		if x != v_1.Args[0] {
22442			break
22443		}
22444		v_1_1 := v_1.Args[1]
22445		if v_1_1.Op != OpPPC64ANDconst || v_1_1.Type != typ.Int64 || v_1_1.AuxInt != 63 || y != v_1_1.Args[0] {
22446			break
22447		}
22448		v.reset(OpPPC64ROTL)
22449		v.AddArg(x)
22450		v.AddArg(y)
22451		return true
22452	}
22453	// match: (XOR (SLW x (ANDconst <typ.Int32> [31] y)) (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))))
22454	// result: (ROTLW x y)
22455	for {
22456		_ = v.Args[1]
22457		v_0 := v.Args[0]
22458		if v_0.Op != OpPPC64SLW {
22459			break
22460		}
22461		_ = v_0.Args[1]
22462		x := v_0.Args[0]
22463		v_0_1 := v_0.Args[1]
22464		if v_0_1.Op != OpPPC64ANDconst || v_0_1.Type != typ.Int32 || v_0_1.AuxInt != 31 {
22465			break
22466		}
22467		y := v_0_1.Args[0]
22468		v_1 := v.Args[1]
22469		if v_1.Op != OpPPC64SRW {
22470			break
22471		}
22472		_ = v_1.Args[1]
22473		if x != v_1.Args[0] {
22474			break
22475		}
22476		v_1_1 := v_1.Args[1]
22477		if v_1_1.Op != OpPPC64SUB || v_1_1.Type != typ.UInt {
22478			break
22479		}
22480		_ = v_1_1.Args[1]
22481		v_1_1_0 := v_1_1.Args[0]
22482		if v_1_1_0.Op != OpPPC64MOVDconst || v_1_1_0.AuxInt != 32 {
22483			break
22484		}
22485		v_1_1_1 := v_1_1.Args[1]
22486		if v_1_1_1.Op != OpPPC64ANDconst || v_1_1_1.Type != typ.UInt || v_1_1_1.AuxInt != 31 || y != v_1_1_1.Args[0] {
22487			break
22488		}
22489		v.reset(OpPPC64ROTLW)
22490		v.AddArg(x)
22491		v.AddArg(y)
22492		return true
22493	}
22494	// match: (XOR (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y))) (SLW x (ANDconst <typ.Int32> [31] y)))
22495	// result: (ROTLW x y)
22496	for {
22497		_ = v.Args[1]
22498		v_0 := v.Args[0]
22499		if v_0.Op != OpPPC64SRW {
22500			break
22501		}
22502		_ = v_0.Args[1]
22503		x := v_0.Args[0]
22504		v_0_1 := v_0.Args[1]
22505		if v_0_1.Op != OpPPC64SUB || v_0_1.Type != typ.UInt {
22506			break
22507		}
22508		_ = v_0_1.Args[1]
22509		v_0_1_0 := v_0_1.Args[0]
22510		if v_0_1_0.Op != OpPPC64MOVDconst || v_0_1_0.AuxInt != 32 {
22511			break
22512		}
22513		v_0_1_1 := v_0_1.Args[1]
22514		if v_0_1_1.Op != OpPPC64ANDconst || v_0_1_1.Type != typ.UInt || v_0_1_1.AuxInt != 31 {
22515			break
22516		}
22517		y := v_0_1_1.Args[0]
22518		v_1 := v.Args[1]
22519		if v_1.Op != OpPPC64SLW {
22520			break
22521		}
22522		_ = v_1.Args[1]
22523		if x != v_1.Args[0] {
22524			break
22525		}
22526		v_1_1 := v_1.Args[1]
22527		if v_1_1.Op != OpPPC64ANDconst || v_1_1.Type != typ.Int32 || v_1_1.AuxInt != 31 || y != v_1_1.Args[0] {
22528			break
22529		}
22530		v.reset(OpPPC64ROTLW)
22531		v.AddArg(x)
22532		v.AddArg(y)
22533		return true
22534	}
22535	// match: (XOR (MOVDconst [c]) (MOVDconst [d]))
22536	// result: (MOVDconst [c^d])
22537	for {
22538		_ = v.Args[1]
22539		v_0 := v.Args[0]
22540		if v_0.Op != OpPPC64MOVDconst {
22541			break
22542		}
22543		c := v_0.AuxInt
22544		v_1 := v.Args[1]
22545		if v_1.Op != OpPPC64MOVDconst {
22546			break
22547		}
22548		d := v_1.AuxInt
22549		v.reset(OpPPC64MOVDconst)
22550		v.AuxInt = c ^ d
22551		return true
22552	}
22553	// match: (XOR (MOVDconst [d]) (MOVDconst [c]))
22554	// result: (MOVDconst [c^d])
22555	for {
22556		_ = v.Args[1]
22557		v_0 := v.Args[0]
22558		if v_0.Op != OpPPC64MOVDconst {
22559			break
22560		}
22561		d := v_0.AuxInt
22562		v_1 := v.Args[1]
22563		if v_1.Op != OpPPC64MOVDconst {
22564			break
22565		}
22566		c := v_1.AuxInt
22567		v.reset(OpPPC64MOVDconst)
22568		v.AuxInt = c ^ d
22569		return true
22570	}
22571	return false
22572}
22573func rewriteValuePPC64_OpPPC64XOR_10(v *Value) bool {
22574	// match: (XOR x (MOVDconst [c]))
22575	// cond: isU32Bit(c)
22576	// result: (XORconst [c] x)
22577	for {
22578		_ = v.Args[1]
22579		x := v.Args[0]
22580		v_1 := v.Args[1]
22581		if v_1.Op != OpPPC64MOVDconst {
22582			break
22583		}
22584		c := v_1.AuxInt
22585		if !(isU32Bit(c)) {
22586			break
22587		}
22588		v.reset(OpPPC64XORconst)
22589		v.AuxInt = c
22590		v.AddArg(x)
22591		return true
22592	}
22593	// match: (XOR (MOVDconst [c]) x)
22594	// cond: isU32Bit(c)
22595	// result: (XORconst [c] x)
22596	for {
22597		x := v.Args[1]
22598		v_0 := v.Args[0]
22599		if v_0.Op != OpPPC64MOVDconst {
22600			break
22601		}
22602		c := v_0.AuxInt
22603		if !(isU32Bit(c)) {
22604			break
22605		}
22606		v.reset(OpPPC64XORconst)
22607		v.AuxInt = c
22608		v.AddArg(x)
22609		return true
22610	}
22611	return false
22612}
22613func rewriteValuePPC64_OpPPC64XORconst_0(v *Value) bool {
22614	// match: (XORconst [c] (XORconst [d] x))
22615	// result: (XORconst [c^d] x)
22616	for {
22617		c := v.AuxInt
22618		v_0 := v.Args[0]
22619		if v_0.Op != OpPPC64XORconst {
22620			break
22621		}
22622		d := v_0.AuxInt
22623		x := v_0.Args[0]
22624		v.reset(OpPPC64XORconst)
22625		v.AuxInt = c ^ d
22626		v.AddArg(x)
22627		return true
22628	}
22629	// match: (XORconst [0] x)
22630	// result: x
22631	for {
22632		if v.AuxInt != 0 {
22633			break
22634		}
22635		x := v.Args[0]
22636		v.reset(OpCopy)
22637		v.Type = x.Type
22638		v.AddArg(x)
22639		return true
22640	}
22641	return false
22642}
22643func rewriteValuePPC64_OpPanicBounds_0(v *Value) bool {
22644	// match: (PanicBounds [kind] x y mem)
22645	// cond: boundsABI(kind) == 0
22646	// result: (LoweredPanicBoundsA [kind] x y mem)
22647	for {
22648		kind := v.AuxInt
22649		mem := v.Args[2]
22650		x := v.Args[0]
22651		y := v.Args[1]
22652		if !(boundsABI(kind) == 0) {
22653			break
22654		}
22655		v.reset(OpPPC64LoweredPanicBoundsA)
22656		v.AuxInt = kind
22657		v.AddArg(x)
22658		v.AddArg(y)
22659		v.AddArg(mem)
22660		return true
22661	}
22662	// match: (PanicBounds [kind] x y mem)
22663	// cond: boundsABI(kind) == 1
22664	// result: (LoweredPanicBoundsB [kind] x y mem)
22665	for {
22666		kind := v.AuxInt
22667		mem := v.Args[2]
22668		x := v.Args[0]
22669		y := v.Args[1]
22670		if !(boundsABI(kind) == 1) {
22671			break
22672		}
22673		v.reset(OpPPC64LoweredPanicBoundsB)
22674		v.AuxInt = kind
22675		v.AddArg(x)
22676		v.AddArg(y)
22677		v.AddArg(mem)
22678		return true
22679	}
22680	// match: (PanicBounds [kind] x y mem)
22681	// cond: boundsABI(kind) == 2
22682	// result: (LoweredPanicBoundsC [kind] x y mem)
22683	for {
22684		kind := v.AuxInt
22685		mem := v.Args[2]
22686		x := v.Args[0]
22687		y := v.Args[1]
22688		if !(boundsABI(kind) == 2) {
22689			break
22690		}
22691		v.reset(OpPPC64LoweredPanicBoundsC)
22692		v.AuxInt = kind
22693		v.AddArg(x)
22694		v.AddArg(y)
22695		v.AddArg(mem)
22696		return true
22697	}
22698	return false
22699}
22700func rewriteValuePPC64_OpPopCount16_0(v *Value) bool {
22701	b := v.Block
22702	typ := &b.Func.Config.Types
22703	// match: (PopCount16 x)
22704	// result: (POPCNTW (MOVHZreg x))
22705	for {
22706		x := v.Args[0]
22707		v.reset(OpPPC64POPCNTW)
22708		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
22709		v0.AddArg(x)
22710		v.AddArg(v0)
22711		return true
22712	}
22713}
22714func rewriteValuePPC64_OpPopCount32_0(v *Value) bool {
22715	b := v.Block
22716	typ := &b.Func.Config.Types
22717	// match: (PopCount32 x)
22718	// result: (POPCNTW (MOVWZreg x))
22719	for {
22720		x := v.Args[0]
22721		v.reset(OpPPC64POPCNTW)
22722		v0 := b.NewValue0(v.Pos, OpPPC64MOVWZreg, typ.Int64)
22723		v0.AddArg(x)
22724		v.AddArg(v0)
22725		return true
22726	}
22727}
22728func rewriteValuePPC64_OpPopCount64_0(v *Value) bool {
22729	// match: (PopCount64 x)
22730	// result: (POPCNTD x)
22731	for {
22732		x := v.Args[0]
22733		v.reset(OpPPC64POPCNTD)
22734		v.AddArg(x)
22735		return true
22736	}
22737}
22738func rewriteValuePPC64_OpPopCount8_0(v *Value) bool {
22739	b := v.Block
22740	typ := &b.Func.Config.Types
22741	// match: (PopCount8 x)
22742	// result: (POPCNTB (MOVBZreg x))
22743	for {
22744		x := v.Args[0]
22745		v.reset(OpPPC64POPCNTB)
22746		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
22747		v0.AddArg(x)
22748		v.AddArg(v0)
22749		return true
22750	}
22751}
22752func rewriteValuePPC64_OpRotateLeft16_0(v *Value) bool {
22753	b := v.Block
22754	typ := &b.Func.Config.Types
22755	// match: (RotateLeft16 <t> x (MOVDconst [c]))
22756	// result: (Or16 (Lsh16x64 <t> x (MOVDconst [c&15])) (Rsh16Ux64 <t> x (MOVDconst [-c&15])))
22757	for {
22758		t := v.Type
22759		_ = v.Args[1]
22760		x := v.Args[0]
22761		v_1 := v.Args[1]
22762		if v_1.Op != OpPPC64MOVDconst {
22763			break
22764		}
22765		c := v_1.AuxInt
22766		v.reset(OpOr16)
22767		v0 := b.NewValue0(v.Pos, OpLsh16x64, t)
22768		v0.AddArg(x)
22769		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
22770		v1.AuxInt = c & 15
22771		v0.AddArg(v1)
22772		v.AddArg(v0)
22773		v2 := b.NewValue0(v.Pos, OpRsh16Ux64, t)
22774		v2.AddArg(x)
22775		v3 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
22776		v3.AuxInt = -c & 15
22777		v2.AddArg(v3)
22778		v.AddArg(v2)
22779		return true
22780	}
22781	return false
22782}
22783func rewriteValuePPC64_OpRotateLeft32_0(v *Value) bool {
22784	// match: (RotateLeft32 x (MOVDconst [c]))
22785	// result: (ROTLWconst [c&31] x)
22786	for {
22787		_ = v.Args[1]
22788		x := v.Args[0]
22789		v_1 := v.Args[1]
22790		if v_1.Op != OpPPC64MOVDconst {
22791			break
22792		}
22793		c := v_1.AuxInt
22794		v.reset(OpPPC64ROTLWconst)
22795		v.AuxInt = c & 31
22796		v.AddArg(x)
22797		return true
22798	}
22799	// match: (RotateLeft32 x y)
22800	// result: (ROTLW x y)
22801	for {
22802		y := v.Args[1]
22803		x := v.Args[0]
22804		v.reset(OpPPC64ROTLW)
22805		v.AddArg(x)
22806		v.AddArg(y)
22807		return true
22808	}
22809}
22810func rewriteValuePPC64_OpRotateLeft64_0(v *Value) bool {
22811	// match: (RotateLeft64 x (MOVDconst [c]))
22812	// result: (ROTLconst [c&63] x)
22813	for {
22814		_ = v.Args[1]
22815		x := v.Args[0]
22816		v_1 := v.Args[1]
22817		if v_1.Op != OpPPC64MOVDconst {
22818			break
22819		}
22820		c := v_1.AuxInt
22821		v.reset(OpPPC64ROTLconst)
22822		v.AuxInt = c & 63
22823		v.AddArg(x)
22824		return true
22825	}
22826	// match: (RotateLeft64 x y)
22827	// result: (ROTL x y)
22828	for {
22829		y := v.Args[1]
22830		x := v.Args[0]
22831		v.reset(OpPPC64ROTL)
22832		v.AddArg(x)
22833		v.AddArg(y)
22834		return true
22835	}
22836}
22837func rewriteValuePPC64_OpRotateLeft8_0(v *Value) bool {
22838	b := v.Block
22839	typ := &b.Func.Config.Types
22840	// match: (RotateLeft8 <t> x (MOVDconst [c]))
22841	// result: (Or8 (Lsh8x64 <t> x (MOVDconst [c&7])) (Rsh8Ux64 <t> x (MOVDconst [-c&7])))
22842	for {
22843		t := v.Type
22844		_ = v.Args[1]
22845		x := v.Args[0]
22846		v_1 := v.Args[1]
22847		if v_1.Op != OpPPC64MOVDconst {
22848			break
22849		}
22850		c := v_1.AuxInt
22851		v.reset(OpOr8)
22852		v0 := b.NewValue0(v.Pos, OpLsh8x64, t)
22853		v0.AddArg(x)
22854		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
22855		v1.AuxInt = c & 7
22856		v0.AddArg(v1)
22857		v.AddArg(v0)
22858		v2 := b.NewValue0(v.Pos, OpRsh8Ux64, t)
22859		v2.AddArg(x)
22860		v3 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
22861		v3.AuxInt = -c & 7
22862		v2.AddArg(v3)
22863		v.AddArg(v2)
22864		return true
22865	}
22866	return false
22867}
22868func rewriteValuePPC64_OpRound_0(v *Value) bool {
22869	// match: (Round x)
22870	// result: (FROUND x)
22871	for {
22872		x := v.Args[0]
22873		v.reset(OpPPC64FROUND)
22874		v.AddArg(x)
22875		return true
22876	}
22877}
22878func rewriteValuePPC64_OpRound32F_0(v *Value) bool {
22879	// match: (Round32F x)
22880	// result: (LoweredRound32F x)
22881	for {
22882		x := v.Args[0]
22883		v.reset(OpPPC64LoweredRound32F)
22884		v.AddArg(x)
22885		return true
22886	}
22887}
22888func rewriteValuePPC64_OpRound64F_0(v *Value) bool {
22889	// match: (Round64F x)
22890	// result: (LoweredRound64F x)
22891	for {
22892		x := v.Args[0]
22893		v.reset(OpPPC64LoweredRound64F)
22894		v.AddArg(x)
22895		return true
22896	}
22897}
22898func rewriteValuePPC64_OpRsh16Ux16_0(v *Value) bool {
22899	b := v.Block
22900	typ := &b.Func.Config.Types
22901	// match: (Rsh16Ux16 x y)
22902	// cond: shiftIsBounded(v)
22903	// result: (SRW (MOVHZreg x) y)
22904	for {
22905		y := v.Args[1]
22906		x := v.Args[0]
22907		if !(shiftIsBounded(v)) {
22908			break
22909		}
22910		v.reset(OpPPC64SRW)
22911		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
22912		v0.AddArg(x)
22913		v.AddArg(v0)
22914		v.AddArg(y)
22915		return true
22916	}
22917	// match: (Rsh16Ux16 x y)
22918	// result: (SRW (ZeroExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt16to64 y)))))
22919	for {
22920		y := v.Args[1]
22921		x := v.Args[0]
22922		v.reset(OpPPC64SRW)
22923		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
22924		v0.AddArg(x)
22925		v.AddArg(v0)
22926		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
22927		v1.AddArg(y)
22928		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
22929		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
22930		v3.AuxInt = -16
22931		v4 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
22932		v4.AddArg(y)
22933		v3.AddArg(v4)
22934		v2.AddArg(v3)
22935		v1.AddArg(v2)
22936		v.AddArg(v1)
22937		return true
22938	}
22939}
22940func rewriteValuePPC64_OpRsh16Ux32_0(v *Value) bool {
22941	b := v.Block
22942	typ := &b.Func.Config.Types
22943	// match: (Rsh16Ux32 x (Const64 [c]))
22944	// cond: uint32(c) < 16
22945	// result: (SRWconst (ZeroExt16to32 x) [c])
22946	for {
22947		_ = v.Args[1]
22948		x := v.Args[0]
22949		v_1 := v.Args[1]
22950		if v_1.Op != OpConst64 {
22951			break
22952		}
22953		c := v_1.AuxInt
22954		if !(uint32(c) < 16) {
22955			break
22956		}
22957		v.reset(OpPPC64SRWconst)
22958		v.AuxInt = c
22959		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
22960		v0.AddArg(x)
22961		v.AddArg(v0)
22962		return true
22963	}
22964	// match: (Rsh16Ux32 x (MOVDconst [c]))
22965	// cond: uint32(c) < 16
22966	// result: (SRWconst (ZeroExt16to32 x) [c])
22967	for {
22968		_ = v.Args[1]
22969		x := v.Args[0]
22970		v_1 := v.Args[1]
22971		if v_1.Op != OpPPC64MOVDconst {
22972			break
22973		}
22974		c := v_1.AuxInt
22975		if !(uint32(c) < 16) {
22976			break
22977		}
22978		v.reset(OpPPC64SRWconst)
22979		v.AuxInt = c
22980		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
22981		v0.AddArg(x)
22982		v.AddArg(v0)
22983		return true
22984	}
22985	// match: (Rsh16Ux32 x y)
22986	// cond: shiftIsBounded(v)
22987	// result: (SRW (MOVHZreg x) y)
22988	for {
22989		y := v.Args[1]
22990		x := v.Args[0]
22991		if !(shiftIsBounded(v)) {
22992			break
22993		}
22994		v.reset(OpPPC64SRW)
22995		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
22996		v0.AddArg(x)
22997		v.AddArg(v0)
22998		v.AddArg(y)
22999		return true
23000	}
23001	// match: (Rsh16Ux32 x y)
23002	// result: (SRW (ZeroExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt32to64 y)))))
23003	for {
23004		y := v.Args[1]
23005		x := v.Args[0]
23006		v.reset(OpPPC64SRW)
23007		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
23008		v0.AddArg(x)
23009		v.AddArg(v0)
23010		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
23011		v1.AddArg(y)
23012		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
23013		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
23014		v3.AuxInt = -16
23015		v4 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
23016		v4.AddArg(y)
23017		v3.AddArg(v4)
23018		v2.AddArg(v3)
23019		v1.AddArg(v2)
23020		v.AddArg(v1)
23021		return true
23022	}
23023}
23024func rewriteValuePPC64_OpRsh16Ux64_0(v *Value) bool {
23025	b := v.Block
23026	typ := &b.Func.Config.Types
23027	// match: (Rsh16Ux64 x (Const64 [c]))
23028	// cond: uint64(c) < 16
23029	// result: (SRWconst (ZeroExt16to32 x) [c])
23030	for {
23031		_ = v.Args[1]
23032		x := v.Args[0]
23033		v_1 := v.Args[1]
23034		if v_1.Op != OpConst64 {
23035			break
23036		}
23037		c := v_1.AuxInt
23038		if !(uint64(c) < 16) {
23039			break
23040		}
23041		v.reset(OpPPC64SRWconst)
23042		v.AuxInt = c
23043		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
23044		v0.AddArg(x)
23045		v.AddArg(v0)
23046		return true
23047	}
23048	// match: (Rsh16Ux64 _ (Const64 [c]))
23049	// cond: uint64(c) >= 16
23050	// result: (MOVDconst [0])
23051	for {
23052		_ = v.Args[1]
23053		v_1 := v.Args[1]
23054		if v_1.Op != OpConst64 {
23055			break
23056		}
23057		c := v_1.AuxInt
23058		if !(uint64(c) >= 16) {
23059			break
23060		}
23061		v.reset(OpPPC64MOVDconst)
23062		v.AuxInt = 0
23063		return true
23064	}
23065	// match: (Rsh16Ux64 x (MOVDconst [c]))
23066	// cond: uint64(c) < 16
23067	// result: (SRWconst (ZeroExt16to32 x) [c])
23068	for {
23069		_ = v.Args[1]
23070		x := v.Args[0]
23071		v_1 := v.Args[1]
23072		if v_1.Op != OpPPC64MOVDconst {
23073			break
23074		}
23075		c := v_1.AuxInt
23076		if !(uint64(c) < 16) {
23077			break
23078		}
23079		v.reset(OpPPC64SRWconst)
23080		v.AuxInt = c
23081		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
23082		v0.AddArg(x)
23083		v.AddArg(v0)
23084		return true
23085	}
23086	// match: (Rsh16Ux64 x y)
23087	// cond: shiftIsBounded(v)
23088	// result: (SRW (MOVHZreg x) y)
23089	for {
23090		y := v.Args[1]
23091		x := v.Args[0]
23092		if !(shiftIsBounded(v)) {
23093			break
23094		}
23095		v.reset(OpPPC64SRW)
23096		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
23097		v0.AddArg(x)
23098		v.AddArg(v0)
23099		v.AddArg(y)
23100		return true
23101	}
23102	// match: (Rsh16Ux64 x y)
23103	// result: (SRW (ZeroExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] y))))
23104	for {
23105		y := v.Args[1]
23106		x := v.Args[0]
23107		v.reset(OpPPC64SRW)
23108		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
23109		v0.AddArg(x)
23110		v.AddArg(v0)
23111		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
23112		v1.AddArg(y)
23113		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
23114		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
23115		v3.AuxInt = -16
23116		v3.AddArg(y)
23117		v2.AddArg(v3)
23118		v1.AddArg(v2)
23119		v.AddArg(v1)
23120		return true
23121	}
23122}
23123func rewriteValuePPC64_OpRsh16Ux8_0(v *Value) bool {
23124	b := v.Block
23125	typ := &b.Func.Config.Types
23126	// match: (Rsh16Ux8 x y)
23127	// cond: shiftIsBounded(v)
23128	// result: (SRW (MOVHZreg x) y)
23129	for {
23130		y := v.Args[1]
23131		x := v.Args[0]
23132		if !(shiftIsBounded(v)) {
23133			break
23134		}
23135		v.reset(OpPPC64SRW)
23136		v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
23137		v0.AddArg(x)
23138		v.AddArg(v0)
23139		v.AddArg(y)
23140		return true
23141	}
23142	// match: (Rsh16Ux8 x y)
23143	// result: (SRW (ZeroExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt8to64 y)))))
23144	for {
23145		y := v.Args[1]
23146		x := v.Args[0]
23147		v.reset(OpPPC64SRW)
23148		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
23149		v0.AddArg(x)
23150		v.AddArg(v0)
23151		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
23152		v1.AddArg(y)
23153		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
23154		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
23155		v3.AuxInt = -16
23156		v4 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
23157		v4.AddArg(y)
23158		v3.AddArg(v4)
23159		v2.AddArg(v3)
23160		v1.AddArg(v2)
23161		v.AddArg(v1)
23162		return true
23163	}
23164}
23165func rewriteValuePPC64_OpRsh16x16_0(v *Value) bool {
23166	b := v.Block
23167	typ := &b.Func.Config.Types
23168	// match: (Rsh16x16 x y)
23169	// cond: shiftIsBounded(v)
23170	// result: (SRAW (MOVHreg x) y)
23171	for {
23172		y := v.Args[1]
23173		x := v.Args[0]
23174		if !(shiftIsBounded(v)) {
23175			break
23176		}
23177		v.reset(OpPPC64SRAW)
23178		v0 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
23179		v0.AddArg(x)
23180		v.AddArg(v0)
23181		v.AddArg(y)
23182		return true
23183	}
23184	// match: (Rsh16x16 x y)
23185	// result: (SRAW (SignExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt16to64 y)))))
23186	for {
23187		y := v.Args[1]
23188		x := v.Args[0]
23189		v.reset(OpPPC64SRAW)
23190		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
23191		v0.AddArg(x)
23192		v.AddArg(v0)
23193		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
23194		v1.AddArg(y)
23195		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
23196		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
23197		v3.AuxInt = -16
23198		v4 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
23199		v4.AddArg(y)
23200		v3.AddArg(v4)
23201		v2.AddArg(v3)
23202		v1.AddArg(v2)
23203		v.AddArg(v1)
23204		return true
23205	}
23206}
23207func rewriteValuePPC64_OpRsh16x32_0(v *Value) bool {
23208	b := v.Block
23209	typ := &b.Func.Config.Types
23210	// match: (Rsh16x32 x (Const64 [c]))
23211	// cond: uint32(c) < 16
23212	// result: (SRAWconst (SignExt16to32 x) [c])
23213	for {
23214		_ = v.Args[1]
23215		x := v.Args[0]
23216		v_1 := v.Args[1]
23217		if v_1.Op != OpConst64 {
23218			break
23219		}
23220		c := v_1.AuxInt
23221		if !(uint32(c) < 16) {
23222			break
23223		}
23224		v.reset(OpPPC64SRAWconst)
23225		v.AuxInt = c
23226		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
23227		v0.AddArg(x)
23228		v.AddArg(v0)
23229		return true
23230	}
23231	// match: (Rsh16x32 x (MOVDconst [c]))
23232	// cond: uint32(c) < 16
23233	// result: (SRAWconst (SignExt16to32 x) [c])
23234	for {
23235		_ = v.Args[1]
23236		x := v.Args[0]
23237		v_1 := v.Args[1]
23238		if v_1.Op != OpPPC64MOVDconst {
23239			break
23240		}
23241		c := v_1.AuxInt
23242		if !(uint32(c) < 16) {
23243			break
23244		}
23245		v.reset(OpPPC64SRAWconst)
23246		v.AuxInt = c
23247		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
23248		v0.AddArg(x)
23249		v.AddArg(v0)
23250		return true
23251	}
23252	// match: (Rsh16x32 x y)
23253	// cond: shiftIsBounded(v)
23254	// result: (SRAW (MOVHreg x) y)
23255	for {
23256		y := v.Args[1]
23257		x := v.Args[0]
23258		if !(shiftIsBounded(v)) {
23259			break
23260		}
23261		v.reset(OpPPC64SRAW)
23262		v0 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
23263		v0.AddArg(x)
23264		v.AddArg(v0)
23265		v.AddArg(y)
23266		return true
23267	}
23268	// match: (Rsh16x32 x y)
23269	// result: (SRAW (SignExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt32to64 y)))))
23270	for {
23271		y := v.Args[1]
23272		x := v.Args[0]
23273		v.reset(OpPPC64SRAW)
23274		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
23275		v0.AddArg(x)
23276		v.AddArg(v0)
23277		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
23278		v1.AddArg(y)
23279		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
23280		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
23281		v3.AuxInt = -16
23282		v4 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
23283		v4.AddArg(y)
23284		v3.AddArg(v4)
23285		v2.AddArg(v3)
23286		v1.AddArg(v2)
23287		v.AddArg(v1)
23288		return true
23289	}
23290}
23291func rewriteValuePPC64_OpRsh16x64_0(v *Value) bool {
23292	b := v.Block
23293	typ := &b.Func.Config.Types
23294	// match: (Rsh16x64 x (Const64 [c]))
23295	// cond: uint64(c) < 16
23296	// result: (SRAWconst (SignExt16to32 x) [c])
23297	for {
23298		_ = v.Args[1]
23299		x := v.Args[0]
23300		v_1 := v.Args[1]
23301		if v_1.Op != OpConst64 {
23302			break
23303		}
23304		c := v_1.AuxInt
23305		if !(uint64(c) < 16) {
23306			break
23307		}
23308		v.reset(OpPPC64SRAWconst)
23309		v.AuxInt = c
23310		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
23311		v0.AddArg(x)
23312		v.AddArg(v0)
23313		return true
23314	}
23315	// match: (Rsh16x64 x (Const64 [c]))
23316	// cond: uint64(c) >= 16
23317	// result: (SRAWconst (SignExt16to32 x) [63])
23318	for {
23319		_ = v.Args[1]
23320		x := v.Args[0]
23321		v_1 := v.Args[1]
23322		if v_1.Op != OpConst64 {
23323			break
23324		}
23325		c := v_1.AuxInt
23326		if !(uint64(c) >= 16) {
23327			break
23328		}
23329		v.reset(OpPPC64SRAWconst)
23330		v.AuxInt = 63
23331		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
23332		v0.AddArg(x)
23333		v.AddArg(v0)
23334		return true
23335	}
23336	// match: (Rsh16x64 x (MOVDconst [c]))
23337	// cond: uint64(c) < 16
23338	// result: (SRAWconst (SignExt16to32 x) [c])
23339	for {
23340		_ = v.Args[1]
23341		x := v.Args[0]
23342		v_1 := v.Args[1]
23343		if v_1.Op != OpPPC64MOVDconst {
23344			break
23345		}
23346		c := v_1.AuxInt
23347		if !(uint64(c) < 16) {
23348			break
23349		}
23350		v.reset(OpPPC64SRAWconst)
23351		v.AuxInt = c
23352		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
23353		v0.AddArg(x)
23354		v.AddArg(v0)
23355		return true
23356	}
23357	// match: (Rsh16x64 x y)
23358	// cond: shiftIsBounded(v)
23359	// result: (SRAW (MOVHreg x) y)
23360	for {
23361		y := v.Args[1]
23362		x := v.Args[0]
23363		if !(shiftIsBounded(v)) {
23364			break
23365		}
23366		v.reset(OpPPC64SRAW)
23367		v0 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
23368		v0.AddArg(x)
23369		v.AddArg(v0)
23370		v.AddArg(y)
23371		return true
23372	}
23373	// match: (Rsh16x64 x y)
23374	// result: (SRAW (SignExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] y))))
23375	for {
23376		y := v.Args[1]
23377		x := v.Args[0]
23378		v.reset(OpPPC64SRAW)
23379		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
23380		v0.AddArg(x)
23381		v.AddArg(v0)
23382		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
23383		v1.AddArg(y)
23384		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
23385		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
23386		v3.AuxInt = -16
23387		v3.AddArg(y)
23388		v2.AddArg(v3)
23389		v1.AddArg(v2)
23390		v.AddArg(v1)
23391		return true
23392	}
23393}
23394func rewriteValuePPC64_OpRsh16x8_0(v *Value) bool {
23395	b := v.Block
23396	typ := &b.Func.Config.Types
23397	// match: (Rsh16x8 x y)
23398	// cond: shiftIsBounded(v)
23399	// result: (SRAW (MOVHreg x) y)
23400	for {
23401		y := v.Args[1]
23402		x := v.Args[0]
23403		if !(shiftIsBounded(v)) {
23404			break
23405		}
23406		v.reset(OpPPC64SRAW)
23407		v0 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
23408		v0.AddArg(x)
23409		v.AddArg(v0)
23410		v.AddArg(y)
23411		return true
23412	}
23413	// match: (Rsh16x8 x y)
23414	// result: (SRAW (SignExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt8to64 y)))))
23415	for {
23416		y := v.Args[1]
23417		x := v.Args[0]
23418		v.reset(OpPPC64SRAW)
23419		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
23420		v0.AddArg(x)
23421		v.AddArg(v0)
23422		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
23423		v1.AddArg(y)
23424		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
23425		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
23426		v3.AuxInt = -16
23427		v4 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
23428		v4.AddArg(y)
23429		v3.AddArg(v4)
23430		v2.AddArg(v3)
23431		v1.AddArg(v2)
23432		v.AddArg(v1)
23433		return true
23434	}
23435}
23436func rewriteValuePPC64_OpRsh32Ux16_0(v *Value) bool {
23437	b := v.Block
23438	typ := &b.Func.Config.Types
23439	// match: (Rsh32Ux16 x y)
23440	// cond: shiftIsBounded(v)
23441	// result: (SRW x y)
23442	for {
23443		y := v.Args[1]
23444		x := v.Args[0]
23445		if !(shiftIsBounded(v)) {
23446			break
23447		}
23448		v.reset(OpPPC64SRW)
23449		v.AddArg(x)
23450		v.AddArg(y)
23451		return true
23452	}
23453	// match: (Rsh32Ux16 x y)
23454	// result: (SRW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt16to64 y)))))
23455	for {
23456		y := v.Args[1]
23457		x := v.Args[0]
23458		v.reset(OpPPC64SRW)
23459		v.AddArg(x)
23460		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
23461		v0.AddArg(y)
23462		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
23463		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
23464		v2.AuxInt = -32
23465		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
23466		v3.AddArg(y)
23467		v2.AddArg(v3)
23468		v1.AddArg(v2)
23469		v0.AddArg(v1)
23470		v.AddArg(v0)
23471		return true
23472	}
23473}
23474func rewriteValuePPC64_OpRsh32Ux32_0(v *Value) bool {
23475	b := v.Block
23476	typ := &b.Func.Config.Types
23477	// match: (Rsh32Ux32 x (Const64 [c]))
23478	// cond: uint32(c) < 32
23479	// result: (SRWconst x [c])
23480	for {
23481		_ = v.Args[1]
23482		x := v.Args[0]
23483		v_1 := v.Args[1]
23484		if v_1.Op != OpConst64 {
23485			break
23486		}
23487		c := v_1.AuxInt
23488		if !(uint32(c) < 32) {
23489			break
23490		}
23491		v.reset(OpPPC64SRWconst)
23492		v.AuxInt = c
23493		v.AddArg(x)
23494		return true
23495	}
23496	// match: (Rsh32Ux32 x (MOVDconst [c]))
23497	// cond: uint32(c) < 32
23498	// result: (SRWconst x [c])
23499	for {
23500		_ = v.Args[1]
23501		x := v.Args[0]
23502		v_1 := v.Args[1]
23503		if v_1.Op != OpPPC64MOVDconst {
23504			break
23505		}
23506		c := v_1.AuxInt
23507		if !(uint32(c) < 32) {
23508			break
23509		}
23510		v.reset(OpPPC64SRWconst)
23511		v.AuxInt = c
23512		v.AddArg(x)
23513		return true
23514	}
23515	// match: (Rsh32Ux32 x y)
23516	// cond: shiftIsBounded(v)
23517	// result: (SRW x y)
23518	for {
23519		y := v.Args[1]
23520		x := v.Args[0]
23521		if !(shiftIsBounded(v)) {
23522			break
23523		}
23524		v.reset(OpPPC64SRW)
23525		v.AddArg(x)
23526		v.AddArg(y)
23527		return true
23528	}
23529	// match: (Rsh32Ux32 x y)
23530	// result: (SRW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt32to64 y)))))
23531	for {
23532		y := v.Args[1]
23533		x := v.Args[0]
23534		v.reset(OpPPC64SRW)
23535		v.AddArg(x)
23536		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
23537		v0.AddArg(y)
23538		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
23539		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
23540		v2.AuxInt = -32
23541		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
23542		v3.AddArg(y)
23543		v2.AddArg(v3)
23544		v1.AddArg(v2)
23545		v0.AddArg(v1)
23546		v.AddArg(v0)
23547		return true
23548	}
23549}
23550func rewriteValuePPC64_OpRsh32Ux64_0(v *Value) bool {
23551	b := v.Block
23552	typ := &b.Func.Config.Types
23553	// match: (Rsh32Ux64 x (Const64 [c]))
23554	// cond: uint64(c) < 32
23555	// result: (SRWconst x [c])
23556	for {
23557		_ = v.Args[1]
23558		x := v.Args[0]
23559		v_1 := v.Args[1]
23560		if v_1.Op != OpConst64 {
23561			break
23562		}
23563		c := v_1.AuxInt
23564		if !(uint64(c) < 32) {
23565			break
23566		}
23567		v.reset(OpPPC64SRWconst)
23568		v.AuxInt = c
23569		v.AddArg(x)
23570		return true
23571	}
23572	// match: (Rsh32Ux64 _ (Const64 [c]))
23573	// cond: uint64(c) >= 32
23574	// result: (MOVDconst [0])
23575	for {
23576		_ = v.Args[1]
23577		v_1 := v.Args[1]
23578		if v_1.Op != OpConst64 {
23579			break
23580		}
23581		c := v_1.AuxInt
23582		if !(uint64(c) >= 32) {
23583			break
23584		}
23585		v.reset(OpPPC64MOVDconst)
23586		v.AuxInt = 0
23587		return true
23588	}
23589	// match: (Rsh32Ux64 x (MOVDconst [c]))
23590	// cond: uint64(c) < 32
23591	// result: (SRWconst x [c])
23592	for {
23593		_ = v.Args[1]
23594		x := v.Args[0]
23595		v_1 := v.Args[1]
23596		if v_1.Op != OpPPC64MOVDconst {
23597			break
23598		}
23599		c := v_1.AuxInt
23600		if !(uint64(c) < 32) {
23601			break
23602		}
23603		v.reset(OpPPC64SRWconst)
23604		v.AuxInt = c
23605		v.AddArg(x)
23606		return true
23607	}
23608	// match: (Rsh32Ux64 x y)
23609	// cond: shiftIsBounded(v)
23610	// result: (SRW x y)
23611	for {
23612		y := v.Args[1]
23613		x := v.Args[0]
23614		if !(shiftIsBounded(v)) {
23615			break
23616		}
23617		v.reset(OpPPC64SRW)
23618		v.AddArg(x)
23619		v.AddArg(y)
23620		return true
23621	}
23622	// match: (Rsh32Ux64 x (AND y (MOVDconst [31])))
23623	// result: (SRW x (ANDconst <typ.Int32> [31] y))
23624	for {
23625		_ = v.Args[1]
23626		x := v.Args[0]
23627		v_1 := v.Args[1]
23628		if v_1.Op != OpPPC64AND {
23629			break
23630		}
23631		_ = v_1.Args[1]
23632		y := v_1.Args[0]
23633		v_1_1 := v_1.Args[1]
23634		if v_1_1.Op != OpPPC64MOVDconst || v_1_1.AuxInt != 31 {
23635			break
23636		}
23637		v.reset(OpPPC64SRW)
23638		v.AddArg(x)
23639		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
23640		v0.AuxInt = 31
23641		v0.AddArg(y)
23642		v.AddArg(v0)
23643		return true
23644	}
23645	// match: (Rsh32Ux64 x (AND (MOVDconst [31]) y))
23646	// result: (SRW x (ANDconst <typ.Int32> [31] y))
23647	for {
23648		_ = v.Args[1]
23649		x := v.Args[0]
23650		v_1 := v.Args[1]
23651		if v_1.Op != OpPPC64AND {
23652			break
23653		}
23654		y := v_1.Args[1]
23655		v_1_0 := v_1.Args[0]
23656		if v_1_0.Op != OpPPC64MOVDconst || v_1_0.AuxInt != 31 {
23657			break
23658		}
23659		v.reset(OpPPC64SRW)
23660		v.AddArg(x)
23661		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
23662		v0.AuxInt = 31
23663		v0.AddArg(y)
23664		v.AddArg(v0)
23665		return true
23666	}
23667	// match: (Rsh32Ux64 x (ANDconst <typ.UInt> [31] y))
23668	// result: (SRW x (ANDconst <typ.UInt> [31] y))
23669	for {
23670		_ = v.Args[1]
23671		x := v.Args[0]
23672		v_1 := v.Args[1]
23673		if v_1.Op != OpPPC64ANDconst || v_1.Type != typ.UInt || v_1.AuxInt != 31 {
23674			break
23675		}
23676		y := v_1.Args[0]
23677		v.reset(OpPPC64SRW)
23678		v.AddArg(x)
23679		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
23680		v0.AuxInt = 31
23681		v0.AddArg(y)
23682		v.AddArg(v0)
23683		return true
23684	}
23685	// match: (Rsh32Ux64 x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
23686	// result: (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
23687	for {
23688		_ = v.Args[1]
23689		x := v.Args[0]
23690		v_1 := v.Args[1]
23691		if v_1.Op != OpPPC64SUB || v_1.Type != typ.UInt {
23692			break
23693		}
23694		_ = v_1.Args[1]
23695		v_1_0 := v_1.Args[0]
23696		if v_1_0.Op != OpPPC64MOVDconst || v_1_0.AuxInt != 32 {
23697			break
23698		}
23699		v_1_1 := v_1.Args[1]
23700		if v_1_1.Op != OpPPC64ANDconst || v_1_1.Type != typ.UInt || v_1_1.AuxInt != 31 {
23701			break
23702		}
23703		y := v_1_1.Args[0]
23704		v.reset(OpPPC64SRW)
23705		v.AddArg(x)
23706		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
23707		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
23708		v1.AuxInt = 32
23709		v0.AddArg(v1)
23710		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
23711		v2.AuxInt = 31
23712		v2.AddArg(y)
23713		v0.AddArg(v2)
23714		v.AddArg(v0)
23715		return true
23716	}
23717	// match: (Rsh32Ux64 x (SUB <typ.UInt> (MOVDconst [32]) (AND <typ.UInt> y (MOVDconst [31]))))
23718	// result: (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
23719	for {
23720		_ = v.Args[1]
23721		x := v.Args[0]
23722		v_1 := v.Args[1]
23723		if v_1.Op != OpPPC64SUB || v_1.Type != typ.UInt {
23724			break
23725		}
23726		_ = v_1.Args[1]
23727		v_1_0 := v_1.Args[0]
23728		if v_1_0.Op != OpPPC64MOVDconst || v_1_0.AuxInt != 32 {
23729			break
23730		}
23731		v_1_1 := v_1.Args[1]
23732		if v_1_1.Op != OpPPC64AND || v_1_1.Type != typ.UInt {
23733			break
23734		}
23735		_ = v_1_1.Args[1]
23736		y := v_1_1.Args[0]
23737		v_1_1_1 := v_1_1.Args[1]
23738		if v_1_1_1.Op != OpPPC64MOVDconst || v_1_1_1.AuxInt != 31 {
23739			break
23740		}
23741		v.reset(OpPPC64SRW)
23742		v.AddArg(x)
23743		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
23744		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
23745		v1.AuxInt = 32
23746		v0.AddArg(v1)
23747		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
23748		v2.AuxInt = 31
23749		v2.AddArg(y)
23750		v0.AddArg(v2)
23751		v.AddArg(v0)
23752		return true
23753	}
23754	// match: (Rsh32Ux64 x (SUB <typ.UInt> (MOVDconst [32]) (AND <typ.UInt> (MOVDconst [31]) y)))
23755	// result: (SRW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
23756	for {
23757		_ = v.Args[1]
23758		x := v.Args[0]
23759		v_1 := v.Args[1]
23760		if v_1.Op != OpPPC64SUB || v_1.Type != typ.UInt {
23761			break
23762		}
23763		_ = v_1.Args[1]
23764		v_1_0 := v_1.Args[0]
23765		if v_1_0.Op != OpPPC64MOVDconst || v_1_0.AuxInt != 32 {
23766			break
23767		}
23768		v_1_1 := v_1.Args[1]
23769		if v_1_1.Op != OpPPC64AND || v_1_1.Type != typ.UInt {
23770			break
23771		}
23772		y := v_1_1.Args[1]
23773		v_1_1_0 := v_1_1.Args[0]
23774		if v_1_1_0.Op != OpPPC64MOVDconst || v_1_1_0.AuxInt != 31 {
23775			break
23776		}
23777		v.reset(OpPPC64SRW)
23778		v.AddArg(x)
23779		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
23780		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
23781		v1.AuxInt = 32
23782		v0.AddArg(v1)
23783		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
23784		v2.AuxInt = 31
23785		v2.AddArg(y)
23786		v0.AddArg(v2)
23787		v.AddArg(v0)
23788		return true
23789	}
23790	return false
23791}
23792func rewriteValuePPC64_OpRsh32Ux64_10(v *Value) bool {
23793	b := v.Block
23794	typ := &b.Func.Config.Types
23795	// match: (Rsh32Ux64 x y)
23796	// result: (SRW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] y))))
23797	for {
23798		y := v.Args[1]
23799		x := v.Args[0]
23800		v.reset(OpPPC64SRW)
23801		v.AddArg(x)
23802		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
23803		v0.AddArg(y)
23804		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
23805		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
23806		v2.AuxInt = -32
23807		v2.AddArg(y)
23808		v1.AddArg(v2)
23809		v0.AddArg(v1)
23810		v.AddArg(v0)
23811		return true
23812	}
23813}
23814func rewriteValuePPC64_OpRsh32Ux8_0(v *Value) bool {
23815	b := v.Block
23816	typ := &b.Func.Config.Types
23817	// match: (Rsh32Ux8 x y)
23818	// cond: shiftIsBounded(v)
23819	// result: (SRW x y)
23820	for {
23821		y := v.Args[1]
23822		x := v.Args[0]
23823		if !(shiftIsBounded(v)) {
23824			break
23825		}
23826		v.reset(OpPPC64SRW)
23827		v.AddArg(x)
23828		v.AddArg(y)
23829		return true
23830	}
23831	// match: (Rsh32Ux8 x y)
23832	// result: (SRW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt8to64 y)))))
23833	for {
23834		y := v.Args[1]
23835		x := v.Args[0]
23836		v.reset(OpPPC64SRW)
23837		v.AddArg(x)
23838		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
23839		v0.AddArg(y)
23840		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
23841		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
23842		v2.AuxInt = -32
23843		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
23844		v3.AddArg(y)
23845		v2.AddArg(v3)
23846		v1.AddArg(v2)
23847		v0.AddArg(v1)
23848		v.AddArg(v0)
23849		return true
23850	}
23851}
23852func rewriteValuePPC64_OpRsh32x16_0(v *Value) bool {
23853	b := v.Block
23854	typ := &b.Func.Config.Types
23855	// match: (Rsh32x16 x y)
23856	// cond: shiftIsBounded(v)
23857	// result: (SRAW x y)
23858	for {
23859		y := v.Args[1]
23860		x := v.Args[0]
23861		if !(shiftIsBounded(v)) {
23862			break
23863		}
23864		v.reset(OpPPC64SRAW)
23865		v.AddArg(x)
23866		v.AddArg(y)
23867		return true
23868	}
23869	// match: (Rsh32x16 x y)
23870	// result: (SRAW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt16to64 y)))))
23871	for {
23872		y := v.Args[1]
23873		x := v.Args[0]
23874		v.reset(OpPPC64SRAW)
23875		v.AddArg(x)
23876		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
23877		v0.AddArg(y)
23878		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
23879		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
23880		v2.AuxInt = -32
23881		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
23882		v3.AddArg(y)
23883		v2.AddArg(v3)
23884		v1.AddArg(v2)
23885		v0.AddArg(v1)
23886		v.AddArg(v0)
23887		return true
23888	}
23889}
23890func rewriteValuePPC64_OpRsh32x32_0(v *Value) bool {
23891	b := v.Block
23892	typ := &b.Func.Config.Types
23893	// match: (Rsh32x32 x (Const64 [c]))
23894	// cond: uint32(c) < 32
23895	// result: (SRAWconst x [c])
23896	for {
23897		_ = v.Args[1]
23898		x := v.Args[0]
23899		v_1 := v.Args[1]
23900		if v_1.Op != OpConst64 {
23901			break
23902		}
23903		c := v_1.AuxInt
23904		if !(uint32(c) < 32) {
23905			break
23906		}
23907		v.reset(OpPPC64SRAWconst)
23908		v.AuxInt = c
23909		v.AddArg(x)
23910		return true
23911	}
23912	// match: (Rsh32x32 x (MOVDconst [c]))
23913	// cond: uint32(c) < 32
23914	// result: (SRAWconst x [c])
23915	for {
23916		_ = v.Args[1]
23917		x := v.Args[0]
23918		v_1 := v.Args[1]
23919		if v_1.Op != OpPPC64MOVDconst {
23920			break
23921		}
23922		c := v_1.AuxInt
23923		if !(uint32(c) < 32) {
23924			break
23925		}
23926		v.reset(OpPPC64SRAWconst)
23927		v.AuxInt = c
23928		v.AddArg(x)
23929		return true
23930	}
23931	// match: (Rsh32x32 x y)
23932	// cond: shiftIsBounded(v)
23933	// result: (SRAW x y)
23934	for {
23935		y := v.Args[1]
23936		x := v.Args[0]
23937		if !(shiftIsBounded(v)) {
23938			break
23939		}
23940		v.reset(OpPPC64SRAW)
23941		v.AddArg(x)
23942		v.AddArg(y)
23943		return true
23944	}
23945	// match: (Rsh32x32 x y)
23946	// result: (SRAW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt32to64 y)))))
23947	for {
23948		y := v.Args[1]
23949		x := v.Args[0]
23950		v.reset(OpPPC64SRAW)
23951		v.AddArg(x)
23952		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
23953		v0.AddArg(y)
23954		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
23955		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
23956		v2.AuxInt = -32
23957		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
23958		v3.AddArg(y)
23959		v2.AddArg(v3)
23960		v1.AddArg(v2)
23961		v0.AddArg(v1)
23962		v.AddArg(v0)
23963		return true
23964	}
23965}
23966func rewriteValuePPC64_OpRsh32x64_0(v *Value) bool {
23967	b := v.Block
23968	typ := &b.Func.Config.Types
23969	// match: (Rsh32x64 x (Const64 [c]))
23970	// cond: uint64(c) < 32
23971	// result: (SRAWconst x [c])
23972	for {
23973		_ = v.Args[1]
23974		x := v.Args[0]
23975		v_1 := v.Args[1]
23976		if v_1.Op != OpConst64 {
23977			break
23978		}
23979		c := v_1.AuxInt
23980		if !(uint64(c) < 32) {
23981			break
23982		}
23983		v.reset(OpPPC64SRAWconst)
23984		v.AuxInt = c
23985		v.AddArg(x)
23986		return true
23987	}
23988	// match: (Rsh32x64 x (Const64 [c]))
23989	// cond: uint64(c) >= 32
23990	// result: (SRAWconst x [63])
23991	for {
23992		_ = v.Args[1]
23993		x := v.Args[0]
23994		v_1 := v.Args[1]
23995		if v_1.Op != OpConst64 {
23996			break
23997		}
23998		c := v_1.AuxInt
23999		if !(uint64(c) >= 32) {
24000			break
24001		}
24002		v.reset(OpPPC64SRAWconst)
24003		v.AuxInt = 63
24004		v.AddArg(x)
24005		return true
24006	}
24007	// match: (Rsh32x64 x (MOVDconst [c]))
24008	// cond: uint64(c) < 32
24009	// result: (SRAWconst x [c])
24010	for {
24011		_ = v.Args[1]
24012		x := v.Args[0]
24013		v_1 := v.Args[1]
24014		if v_1.Op != OpPPC64MOVDconst {
24015			break
24016		}
24017		c := v_1.AuxInt
24018		if !(uint64(c) < 32) {
24019			break
24020		}
24021		v.reset(OpPPC64SRAWconst)
24022		v.AuxInt = c
24023		v.AddArg(x)
24024		return true
24025	}
24026	// match: (Rsh32x64 x y)
24027	// cond: shiftIsBounded(v)
24028	// result: (SRAW x y)
24029	for {
24030		y := v.Args[1]
24031		x := v.Args[0]
24032		if !(shiftIsBounded(v)) {
24033			break
24034		}
24035		v.reset(OpPPC64SRAW)
24036		v.AddArg(x)
24037		v.AddArg(y)
24038		return true
24039	}
24040	// match: (Rsh32x64 x (AND y (MOVDconst [31])))
24041	// result: (SRAW x (ANDconst <typ.Int32> [31] y))
24042	for {
24043		_ = v.Args[1]
24044		x := v.Args[0]
24045		v_1 := v.Args[1]
24046		if v_1.Op != OpPPC64AND {
24047			break
24048		}
24049		_ = v_1.Args[1]
24050		y := v_1.Args[0]
24051		v_1_1 := v_1.Args[1]
24052		if v_1_1.Op != OpPPC64MOVDconst || v_1_1.AuxInt != 31 {
24053			break
24054		}
24055		v.reset(OpPPC64SRAW)
24056		v.AddArg(x)
24057		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
24058		v0.AuxInt = 31
24059		v0.AddArg(y)
24060		v.AddArg(v0)
24061		return true
24062	}
24063	// match: (Rsh32x64 x (AND (MOVDconst [31]) y))
24064	// result: (SRAW x (ANDconst <typ.Int32> [31] y))
24065	for {
24066		_ = v.Args[1]
24067		x := v.Args[0]
24068		v_1 := v.Args[1]
24069		if v_1.Op != OpPPC64AND {
24070			break
24071		}
24072		y := v_1.Args[1]
24073		v_1_0 := v_1.Args[0]
24074		if v_1_0.Op != OpPPC64MOVDconst || v_1_0.AuxInt != 31 {
24075			break
24076		}
24077		v.reset(OpPPC64SRAW)
24078		v.AddArg(x)
24079		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
24080		v0.AuxInt = 31
24081		v0.AddArg(y)
24082		v.AddArg(v0)
24083		return true
24084	}
24085	// match: (Rsh32x64 x (ANDconst <typ.UInt> [31] y))
24086	// result: (SRAW x (ANDconst <typ.UInt> [31] y))
24087	for {
24088		_ = v.Args[1]
24089		x := v.Args[0]
24090		v_1 := v.Args[1]
24091		if v_1.Op != OpPPC64ANDconst || v_1.Type != typ.UInt || v_1.AuxInt != 31 {
24092			break
24093		}
24094		y := v_1.Args[0]
24095		v.reset(OpPPC64SRAW)
24096		v.AddArg(x)
24097		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
24098		v0.AuxInt = 31
24099		v0.AddArg(y)
24100		v.AddArg(v0)
24101		return true
24102	}
24103	// match: (Rsh32x64 x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
24104	// result: (SRAW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
24105	for {
24106		_ = v.Args[1]
24107		x := v.Args[0]
24108		v_1 := v.Args[1]
24109		if v_1.Op != OpPPC64SUB || v_1.Type != typ.UInt {
24110			break
24111		}
24112		_ = v_1.Args[1]
24113		v_1_0 := v_1.Args[0]
24114		if v_1_0.Op != OpPPC64MOVDconst || v_1_0.AuxInt != 32 {
24115			break
24116		}
24117		v_1_1 := v_1.Args[1]
24118		if v_1_1.Op != OpPPC64ANDconst || v_1_1.Type != typ.UInt || v_1_1.AuxInt != 31 {
24119			break
24120		}
24121		y := v_1_1.Args[0]
24122		v.reset(OpPPC64SRAW)
24123		v.AddArg(x)
24124		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
24125		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
24126		v1.AuxInt = 32
24127		v0.AddArg(v1)
24128		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
24129		v2.AuxInt = 31
24130		v2.AddArg(y)
24131		v0.AddArg(v2)
24132		v.AddArg(v0)
24133		return true
24134	}
24135	// match: (Rsh32x64 x (SUB <typ.UInt> (MOVDconst [32]) (AND <typ.UInt> y (MOVDconst [31]))))
24136	// result: (SRAW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
24137	for {
24138		_ = v.Args[1]
24139		x := v.Args[0]
24140		v_1 := v.Args[1]
24141		if v_1.Op != OpPPC64SUB || v_1.Type != typ.UInt {
24142			break
24143		}
24144		_ = v_1.Args[1]
24145		v_1_0 := v_1.Args[0]
24146		if v_1_0.Op != OpPPC64MOVDconst || v_1_0.AuxInt != 32 {
24147			break
24148		}
24149		v_1_1 := v_1.Args[1]
24150		if v_1_1.Op != OpPPC64AND || v_1_1.Type != typ.UInt {
24151			break
24152		}
24153		_ = v_1_1.Args[1]
24154		y := v_1_1.Args[0]
24155		v_1_1_1 := v_1_1.Args[1]
24156		if v_1_1_1.Op != OpPPC64MOVDconst || v_1_1_1.AuxInt != 31 {
24157			break
24158		}
24159		v.reset(OpPPC64SRAW)
24160		v.AddArg(x)
24161		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
24162		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
24163		v1.AuxInt = 32
24164		v0.AddArg(v1)
24165		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
24166		v2.AuxInt = 31
24167		v2.AddArg(y)
24168		v0.AddArg(v2)
24169		v.AddArg(v0)
24170		return true
24171	}
24172	// match: (Rsh32x64 x (SUB <typ.UInt> (MOVDconst [32]) (AND <typ.UInt> (MOVDconst [31]) y)))
24173	// result: (SRAW x (SUB <typ.UInt> (MOVDconst [32]) (ANDconst <typ.UInt> [31] y)))
24174	for {
24175		_ = v.Args[1]
24176		x := v.Args[0]
24177		v_1 := v.Args[1]
24178		if v_1.Op != OpPPC64SUB || v_1.Type != typ.UInt {
24179			break
24180		}
24181		_ = v_1.Args[1]
24182		v_1_0 := v_1.Args[0]
24183		if v_1_0.Op != OpPPC64MOVDconst || v_1_0.AuxInt != 32 {
24184			break
24185		}
24186		v_1_1 := v_1.Args[1]
24187		if v_1_1.Op != OpPPC64AND || v_1_1.Type != typ.UInt {
24188			break
24189		}
24190		y := v_1_1.Args[1]
24191		v_1_1_0 := v_1_1.Args[0]
24192		if v_1_1_0.Op != OpPPC64MOVDconst || v_1_1_0.AuxInt != 31 {
24193			break
24194		}
24195		v.reset(OpPPC64SRAW)
24196		v.AddArg(x)
24197		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
24198		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
24199		v1.AuxInt = 32
24200		v0.AddArg(v1)
24201		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
24202		v2.AuxInt = 31
24203		v2.AddArg(y)
24204		v0.AddArg(v2)
24205		v.AddArg(v0)
24206		return true
24207	}
24208	return false
24209}
24210func rewriteValuePPC64_OpRsh32x64_10(v *Value) bool {
24211	b := v.Block
24212	typ := &b.Func.Config.Types
24213	// match: (Rsh32x64 x y)
24214	// result: (SRAW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] y))))
24215	for {
24216		y := v.Args[1]
24217		x := v.Args[0]
24218		v.reset(OpPPC64SRAW)
24219		v.AddArg(x)
24220		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
24221		v0.AddArg(y)
24222		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
24223		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
24224		v2.AuxInt = -32
24225		v2.AddArg(y)
24226		v1.AddArg(v2)
24227		v0.AddArg(v1)
24228		v.AddArg(v0)
24229		return true
24230	}
24231}
24232func rewriteValuePPC64_OpRsh32x8_0(v *Value) bool {
24233	b := v.Block
24234	typ := &b.Func.Config.Types
24235	// match: (Rsh32x8 x y)
24236	// cond: shiftIsBounded(v)
24237	// result: (SRAW x y)
24238	for {
24239		y := v.Args[1]
24240		x := v.Args[0]
24241		if !(shiftIsBounded(v)) {
24242			break
24243		}
24244		v.reset(OpPPC64SRAW)
24245		v.AddArg(x)
24246		v.AddArg(y)
24247		return true
24248	}
24249	// match: (Rsh32x8 x y)
24250	// result: (SRAW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt8to64 y)))))
24251	for {
24252		y := v.Args[1]
24253		x := v.Args[0]
24254		v.reset(OpPPC64SRAW)
24255		v.AddArg(x)
24256		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
24257		v0.AddArg(y)
24258		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
24259		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
24260		v2.AuxInt = -32
24261		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
24262		v3.AddArg(y)
24263		v2.AddArg(v3)
24264		v1.AddArg(v2)
24265		v0.AddArg(v1)
24266		v.AddArg(v0)
24267		return true
24268	}
24269}
24270func rewriteValuePPC64_OpRsh64Ux16_0(v *Value) bool {
24271	b := v.Block
24272	typ := &b.Func.Config.Types
24273	// match: (Rsh64Ux16 x y)
24274	// cond: shiftIsBounded(v)
24275	// result: (SRD x y)
24276	for {
24277		y := v.Args[1]
24278		x := v.Args[0]
24279		if !(shiftIsBounded(v)) {
24280			break
24281		}
24282		v.reset(OpPPC64SRD)
24283		v.AddArg(x)
24284		v.AddArg(y)
24285		return true
24286	}
24287	// match: (Rsh64Ux16 x y)
24288	// result: (SRD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt16to64 y)))))
24289	for {
24290		y := v.Args[1]
24291		x := v.Args[0]
24292		v.reset(OpPPC64SRD)
24293		v.AddArg(x)
24294		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
24295		v0.AddArg(y)
24296		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
24297		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
24298		v2.AuxInt = -64
24299		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
24300		v3.AddArg(y)
24301		v2.AddArg(v3)
24302		v1.AddArg(v2)
24303		v0.AddArg(v1)
24304		v.AddArg(v0)
24305		return true
24306	}
24307}
24308func rewriteValuePPC64_OpRsh64Ux32_0(v *Value) bool {
24309	b := v.Block
24310	typ := &b.Func.Config.Types
24311	// match: (Rsh64Ux32 x (Const64 [c]))
24312	// cond: uint32(c) < 64
24313	// result: (SRDconst x [c])
24314	for {
24315		_ = v.Args[1]
24316		x := v.Args[0]
24317		v_1 := v.Args[1]
24318		if v_1.Op != OpConst64 {
24319			break
24320		}
24321		c := v_1.AuxInt
24322		if !(uint32(c) < 64) {
24323			break
24324		}
24325		v.reset(OpPPC64SRDconst)
24326		v.AuxInt = c
24327		v.AddArg(x)
24328		return true
24329	}
24330	// match: (Rsh64Ux32 x (MOVDconst [c]))
24331	// cond: uint32(c) < 64
24332	// result: (SRDconst x [c])
24333	for {
24334		_ = v.Args[1]
24335		x := v.Args[0]
24336		v_1 := v.Args[1]
24337		if v_1.Op != OpPPC64MOVDconst {
24338			break
24339		}
24340		c := v_1.AuxInt
24341		if !(uint32(c) < 64) {
24342			break
24343		}
24344		v.reset(OpPPC64SRDconst)
24345		v.AuxInt = c
24346		v.AddArg(x)
24347		return true
24348	}
24349	// match: (Rsh64Ux32 x y)
24350	// cond: shiftIsBounded(v)
24351	// result: (SRD x y)
24352	for {
24353		y := v.Args[1]
24354		x := v.Args[0]
24355		if !(shiftIsBounded(v)) {
24356			break
24357		}
24358		v.reset(OpPPC64SRD)
24359		v.AddArg(x)
24360		v.AddArg(y)
24361		return true
24362	}
24363	// match: (Rsh64Ux32 x y)
24364	// result: (SRD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt32to64 y)))))
24365	for {
24366		y := v.Args[1]
24367		x := v.Args[0]
24368		v.reset(OpPPC64SRD)
24369		v.AddArg(x)
24370		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
24371		v0.AddArg(y)
24372		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
24373		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
24374		v2.AuxInt = -64
24375		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
24376		v3.AddArg(y)
24377		v2.AddArg(v3)
24378		v1.AddArg(v2)
24379		v0.AddArg(v1)
24380		v.AddArg(v0)
24381		return true
24382	}
24383}
24384func rewriteValuePPC64_OpRsh64Ux64_0(v *Value) bool {
24385	b := v.Block
24386	typ := &b.Func.Config.Types
24387	// match: (Rsh64Ux64 x (Const64 [c]))
24388	// cond: uint64(c) < 64
24389	// result: (SRDconst x [c])
24390	for {
24391		_ = v.Args[1]
24392		x := v.Args[0]
24393		v_1 := v.Args[1]
24394		if v_1.Op != OpConst64 {
24395			break
24396		}
24397		c := v_1.AuxInt
24398		if !(uint64(c) < 64) {
24399			break
24400		}
24401		v.reset(OpPPC64SRDconst)
24402		v.AuxInt = c
24403		v.AddArg(x)
24404		return true
24405	}
24406	// match: (Rsh64Ux64 _ (Const64 [c]))
24407	// cond: uint64(c) >= 64
24408	// result: (MOVDconst [0])
24409	for {
24410		_ = v.Args[1]
24411		v_1 := v.Args[1]
24412		if v_1.Op != OpConst64 {
24413			break
24414		}
24415		c := v_1.AuxInt
24416		if !(uint64(c) >= 64) {
24417			break
24418		}
24419		v.reset(OpPPC64MOVDconst)
24420		v.AuxInt = 0
24421		return true
24422	}
24423	// match: (Rsh64Ux64 x (MOVDconst [c]))
24424	// cond: uint64(c) < 64
24425	// result: (SRDconst x [c])
24426	for {
24427		_ = v.Args[1]
24428		x := v.Args[0]
24429		v_1 := v.Args[1]
24430		if v_1.Op != OpPPC64MOVDconst {
24431			break
24432		}
24433		c := v_1.AuxInt
24434		if !(uint64(c) < 64) {
24435			break
24436		}
24437		v.reset(OpPPC64SRDconst)
24438		v.AuxInt = c
24439		v.AddArg(x)
24440		return true
24441	}
24442	// match: (Rsh64Ux64 x y)
24443	// cond: shiftIsBounded(v)
24444	// result: (SRD x y)
24445	for {
24446		y := v.Args[1]
24447		x := v.Args[0]
24448		if !(shiftIsBounded(v)) {
24449			break
24450		}
24451		v.reset(OpPPC64SRD)
24452		v.AddArg(x)
24453		v.AddArg(y)
24454		return true
24455	}
24456	// match: (Rsh64Ux64 x (AND y (MOVDconst [63])))
24457	// result: (SRD x (ANDconst <typ.Int64> [63] y))
24458	for {
24459		_ = v.Args[1]
24460		x := v.Args[0]
24461		v_1 := v.Args[1]
24462		if v_1.Op != OpPPC64AND {
24463			break
24464		}
24465		_ = v_1.Args[1]
24466		y := v_1.Args[0]
24467		v_1_1 := v_1.Args[1]
24468		if v_1_1.Op != OpPPC64MOVDconst || v_1_1.AuxInt != 63 {
24469			break
24470		}
24471		v.reset(OpPPC64SRD)
24472		v.AddArg(x)
24473		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
24474		v0.AuxInt = 63
24475		v0.AddArg(y)
24476		v.AddArg(v0)
24477		return true
24478	}
24479	// match: (Rsh64Ux64 x (AND (MOVDconst [63]) y))
24480	// result: (SRD x (ANDconst <typ.Int64> [63] y))
24481	for {
24482		_ = v.Args[1]
24483		x := v.Args[0]
24484		v_1 := v.Args[1]
24485		if v_1.Op != OpPPC64AND {
24486			break
24487		}
24488		y := v_1.Args[1]
24489		v_1_0 := v_1.Args[0]
24490		if v_1_0.Op != OpPPC64MOVDconst || v_1_0.AuxInt != 63 {
24491			break
24492		}
24493		v.reset(OpPPC64SRD)
24494		v.AddArg(x)
24495		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
24496		v0.AuxInt = 63
24497		v0.AddArg(y)
24498		v.AddArg(v0)
24499		return true
24500	}
24501	// match: (Rsh64Ux64 x (ANDconst <typ.UInt> [63] y))
24502	// result: (SRD x (ANDconst <typ.UInt> [63] y))
24503	for {
24504		_ = v.Args[1]
24505		x := v.Args[0]
24506		v_1 := v.Args[1]
24507		if v_1.Op != OpPPC64ANDconst || v_1.Type != typ.UInt || v_1.AuxInt != 63 {
24508			break
24509		}
24510		y := v_1.Args[0]
24511		v.reset(OpPPC64SRD)
24512		v.AddArg(x)
24513		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
24514		v0.AuxInt = 63
24515		v0.AddArg(y)
24516		v.AddArg(v0)
24517		return true
24518	}
24519	// match: (Rsh64Ux64 x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
24520	// result: (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
24521	for {
24522		_ = v.Args[1]
24523		x := v.Args[0]
24524		v_1 := v.Args[1]
24525		if v_1.Op != OpPPC64SUB || v_1.Type != typ.UInt {
24526			break
24527		}
24528		_ = v_1.Args[1]
24529		v_1_0 := v_1.Args[0]
24530		if v_1_0.Op != OpPPC64MOVDconst || v_1_0.AuxInt != 64 {
24531			break
24532		}
24533		v_1_1 := v_1.Args[1]
24534		if v_1_1.Op != OpPPC64ANDconst || v_1_1.Type != typ.UInt || v_1_1.AuxInt != 63 {
24535			break
24536		}
24537		y := v_1_1.Args[0]
24538		v.reset(OpPPC64SRD)
24539		v.AddArg(x)
24540		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
24541		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
24542		v1.AuxInt = 64
24543		v0.AddArg(v1)
24544		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
24545		v2.AuxInt = 63
24546		v2.AddArg(y)
24547		v0.AddArg(v2)
24548		v.AddArg(v0)
24549		return true
24550	}
24551	// match: (Rsh64Ux64 x (SUB <typ.UInt> (MOVDconst [64]) (AND <typ.UInt> y (MOVDconst [63]))))
24552	// result: (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
24553	for {
24554		_ = v.Args[1]
24555		x := v.Args[0]
24556		v_1 := v.Args[1]
24557		if v_1.Op != OpPPC64SUB || v_1.Type != typ.UInt {
24558			break
24559		}
24560		_ = v_1.Args[1]
24561		v_1_0 := v_1.Args[0]
24562		if v_1_0.Op != OpPPC64MOVDconst || v_1_0.AuxInt != 64 {
24563			break
24564		}
24565		v_1_1 := v_1.Args[1]
24566		if v_1_1.Op != OpPPC64AND || v_1_1.Type != typ.UInt {
24567			break
24568		}
24569		_ = v_1_1.Args[1]
24570		y := v_1_1.Args[0]
24571		v_1_1_1 := v_1_1.Args[1]
24572		if v_1_1_1.Op != OpPPC64MOVDconst || v_1_1_1.AuxInt != 63 {
24573			break
24574		}
24575		v.reset(OpPPC64SRD)
24576		v.AddArg(x)
24577		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
24578		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
24579		v1.AuxInt = 64
24580		v0.AddArg(v1)
24581		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
24582		v2.AuxInt = 63
24583		v2.AddArg(y)
24584		v0.AddArg(v2)
24585		v.AddArg(v0)
24586		return true
24587	}
24588	// match: (Rsh64Ux64 x (SUB <typ.UInt> (MOVDconst [64]) (AND <typ.UInt> (MOVDconst [63]) y)))
24589	// result: (SRD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
24590	for {
24591		_ = v.Args[1]
24592		x := v.Args[0]
24593		v_1 := v.Args[1]
24594		if v_1.Op != OpPPC64SUB || v_1.Type != typ.UInt {
24595			break
24596		}
24597		_ = v_1.Args[1]
24598		v_1_0 := v_1.Args[0]
24599		if v_1_0.Op != OpPPC64MOVDconst || v_1_0.AuxInt != 64 {
24600			break
24601		}
24602		v_1_1 := v_1.Args[1]
24603		if v_1_1.Op != OpPPC64AND || v_1_1.Type != typ.UInt {
24604			break
24605		}
24606		y := v_1_1.Args[1]
24607		v_1_1_0 := v_1_1.Args[0]
24608		if v_1_1_0.Op != OpPPC64MOVDconst || v_1_1_0.AuxInt != 63 {
24609			break
24610		}
24611		v.reset(OpPPC64SRD)
24612		v.AddArg(x)
24613		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
24614		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
24615		v1.AuxInt = 64
24616		v0.AddArg(v1)
24617		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
24618		v2.AuxInt = 63
24619		v2.AddArg(y)
24620		v0.AddArg(v2)
24621		v.AddArg(v0)
24622		return true
24623	}
24624	return false
24625}
24626func rewriteValuePPC64_OpRsh64Ux64_10(v *Value) bool {
24627	b := v.Block
24628	typ := &b.Func.Config.Types
24629	// match: (Rsh64Ux64 x y)
24630	// result: (SRD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] y))))
24631	for {
24632		y := v.Args[1]
24633		x := v.Args[0]
24634		v.reset(OpPPC64SRD)
24635		v.AddArg(x)
24636		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
24637		v0.AddArg(y)
24638		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
24639		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
24640		v2.AuxInt = -64
24641		v2.AddArg(y)
24642		v1.AddArg(v2)
24643		v0.AddArg(v1)
24644		v.AddArg(v0)
24645		return true
24646	}
24647}
24648func rewriteValuePPC64_OpRsh64Ux8_0(v *Value) bool {
24649	b := v.Block
24650	typ := &b.Func.Config.Types
24651	// match: (Rsh64Ux8 x y)
24652	// cond: shiftIsBounded(v)
24653	// result: (SRD x y)
24654	for {
24655		y := v.Args[1]
24656		x := v.Args[0]
24657		if !(shiftIsBounded(v)) {
24658			break
24659		}
24660		v.reset(OpPPC64SRD)
24661		v.AddArg(x)
24662		v.AddArg(y)
24663		return true
24664	}
24665	// match: (Rsh64Ux8 x y)
24666	// result: (SRD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt8to64 y)))))
24667	for {
24668		y := v.Args[1]
24669		x := v.Args[0]
24670		v.reset(OpPPC64SRD)
24671		v.AddArg(x)
24672		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
24673		v0.AddArg(y)
24674		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
24675		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
24676		v2.AuxInt = -64
24677		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
24678		v3.AddArg(y)
24679		v2.AddArg(v3)
24680		v1.AddArg(v2)
24681		v0.AddArg(v1)
24682		v.AddArg(v0)
24683		return true
24684	}
24685}
24686func rewriteValuePPC64_OpRsh64x16_0(v *Value) bool {
24687	b := v.Block
24688	typ := &b.Func.Config.Types
24689	// match: (Rsh64x16 x y)
24690	// cond: shiftIsBounded(v)
24691	// result: (SRAD x y)
24692	for {
24693		y := v.Args[1]
24694		x := v.Args[0]
24695		if !(shiftIsBounded(v)) {
24696			break
24697		}
24698		v.reset(OpPPC64SRAD)
24699		v.AddArg(x)
24700		v.AddArg(y)
24701		return true
24702	}
24703	// match: (Rsh64x16 x y)
24704	// result: (SRAD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt16to64 y)))))
24705	for {
24706		y := v.Args[1]
24707		x := v.Args[0]
24708		v.reset(OpPPC64SRAD)
24709		v.AddArg(x)
24710		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
24711		v0.AddArg(y)
24712		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
24713		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
24714		v2.AuxInt = -64
24715		v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
24716		v3.AddArg(y)
24717		v2.AddArg(v3)
24718		v1.AddArg(v2)
24719		v0.AddArg(v1)
24720		v.AddArg(v0)
24721		return true
24722	}
24723}
24724func rewriteValuePPC64_OpRsh64x32_0(v *Value) bool {
24725	b := v.Block
24726	typ := &b.Func.Config.Types
24727	// match: (Rsh64x32 x (Const64 [c]))
24728	// cond: uint32(c) < 64
24729	// result: (SRADconst x [c])
24730	for {
24731		_ = v.Args[1]
24732		x := v.Args[0]
24733		v_1 := v.Args[1]
24734		if v_1.Op != OpConst64 {
24735			break
24736		}
24737		c := v_1.AuxInt
24738		if !(uint32(c) < 64) {
24739			break
24740		}
24741		v.reset(OpPPC64SRADconst)
24742		v.AuxInt = c
24743		v.AddArg(x)
24744		return true
24745	}
24746	// match: (Rsh64x32 x (MOVDconst [c]))
24747	// cond: uint32(c) < 64
24748	// result: (SRADconst x [c])
24749	for {
24750		_ = v.Args[1]
24751		x := v.Args[0]
24752		v_1 := v.Args[1]
24753		if v_1.Op != OpPPC64MOVDconst {
24754			break
24755		}
24756		c := v_1.AuxInt
24757		if !(uint32(c) < 64) {
24758			break
24759		}
24760		v.reset(OpPPC64SRADconst)
24761		v.AuxInt = c
24762		v.AddArg(x)
24763		return true
24764	}
24765	// match: (Rsh64x32 x y)
24766	// cond: shiftIsBounded(v)
24767	// result: (SRAD x y)
24768	for {
24769		y := v.Args[1]
24770		x := v.Args[0]
24771		if !(shiftIsBounded(v)) {
24772			break
24773		}
24774		v.reset(OpPPC64SRAD)
24775		v.AddArg(x)
24776		v.AddArg(y)
24777		return true
24778	}
24779	// match: (Rsh64x32 x y)
24780	// result: (SRAD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt32to64 y)))))
24781	for {
24782		y := v.Args[1]
24783		x := v.Args[0]
24784		v.reset(OpPPC64SRAD)
24785		v.AddArg(x)
24786		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
24787		v0.AddArg(y)
24788		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
24789		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
24790		v2.AuxInt = -64
24791		v3 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
24792		v3.AddArg(y)
24793		v2.AddArg(v3)
24794		v1.AddArg(v2)
24795		v0.AddArg(v1)
24796		v.AddArg(v0)
24797		return true
24798	}
24799}
24800func rewriteValuePPC64_OpRsh64x64_0(v *Value) bool {
24801	b := v.Block
24802	typ := &b.Func.Config.Types
24803	// match: (Rsh64x64 x (Const64 [c]))
24804	// cond: uint64(c) < 64
24805	// result: (SRADconst x [c])
24806	for {
24807		_ = v.Args[1]
24808		x := v.Args[0]
24809		v_1 := v.Args[1]
24810		if v_1.Op != OpConst64 {
24811			break
24812		}
24813		c := v_1.AuxInt
24814		if !(uint64(c) < 64) {
24815			break
24816		}
24817		v.reset(OpPPC64SRADconst)
24818		v.AuxInt = c
24819		v.AddArg(x)
24820		return true
24821	}
24822	// match: (Rsh64x64 x (Const64 [c]))
24823	// cond: uint64(c) >= 64
24824	// result: (SRADconst x [63])
24825	for {
24826		_ = v.Args[1]
24827		x := v.Args[0]
24828		v_1 := v.Args[1]
24829		if v_1.Op != OpConst64 {
24830			break
24831		}
24832		c := v_1.AuxInt
24833		if !(uint64(c) >= 64) {
24834			break
24835		}
24836		v.reset(OpPPC64SRADconst)
24837		v.AuxInt = 63
24838		v.AddArg(x)
24839		return true
24840	}
24841	// match: (Rsh64x64 x (MOVDconst [c]))
24842	// cond: uint64(c) < 64
24843	// result: (SRADconst x [c])
24844	for {
24845		_ = v.Args[1]
24846		x := v.Args[0]
24847		v_1 := v.Args[1]
24848		if v_1.Op != OpPPC64MOVDconst {
24849			break
24850		}
24851		c := v_1.AuxInt
24852		if !(uint64(c) < 64) {
24853			break
24854		}
24855		v.reset(OpPPC64SRADconst)
24856		v.AuxInt = c
24857		v.AddArg(x)
24858		return true
24859	}
24860	// match: (Rsh64x64 x y)
24861	// cond: shiftIsBounded(v)
24862	// result: (SRAD x y)
24863	for {
24864		y := v.Args[1]
24865		x := v.Args[0]
24866		if !(shiftIsBounded(v)) {
24867			break
24868		}
24869		v.reset(OpPPC64SRAD)
24870		v.AddArg(x)
24871		v.AddArg(y)
24872		return true
24873	}
24874	// match: (Rsh64x64 x (AND y (MOVDconst [63])))
24875	// result: (SRAD x (ANDconst <typ.Int64> [63] y))
24876	for {
24877		_ = v.Args[1]
24878		x := v.Args[0]
24879		v_1 := v.Args[1]
24880		if v_1.Op != OpPPC64AND {
24881			break
24882		}
24883		_ = v_1.Args[1]
24884		y := v_1.Args[0]
24885		v_1_1 := v_1.Args[1]
24886		if v_1_1.Op != OpPPC64MOVDconst || v_1_1.AuxInt != 63 {
24887			break
24888		}
24889		v.reset(OpPPC64SRAD)
24890		v.AddArg(x)
24891		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
24892		v0.AuxInt = 63
24893		v0.AddArg(y)
24894		v.AddArg(v0)
24895		return true
24896	}
24897	// match: (Rsh64x64 x (AND (MOVDconst [63]) y))
24898	// result: (SRAD x (ANDconst <typ.Int64> [63] y))
24899	for {
24900		_ = v.Args[1]
24901		x := v.Args[0]
24902		v_1 := v.Args[1]
24903		if v_1.Op != OpPPC64AND {
24904			break
24905		}
24906		y := v_1.Args[1]
24907		v_1_0 := v_1.Args[0]
24908		if v_1_0.Op != OpPPC64MOVDconst || v_1_0.AuxInt != 63 {
24909			break
24910		}
24911		v.reset(OpPPC64SRAD)
24912		v.AddArg(x)
24913		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
24914		v0.AuxInt = 63
24915		v0.AddArg(y)
24916		v.AddArg(v0)
24917		return true
24918	}
24919	// match: (Rsh64x64 x (ANDconst <typ.UInt> [63] y))
24920	// result: (SRAD x (ANDconst <typ.UInt> [63] y))
24921	for {
24922		_ = v.Args[1]
24923		x := v.Args[0]
24924		v_1 := v.Args[1]
24925		if v_1.Op != OpPPC64ANDconst || v_1.Type != typ.UInt || v_1.AuxInt != 63 {
24926			break
24927		}
24928		y := v_1.Args[0]
24929		v.reset(OpPPC64SRAD)
24930		v.AddArg(x)
24931		v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
24932		v0.AuxInt = 63
24933		v0.AddArg(y)
24934		v.AddArg(v0)
24935		return true
24936	}
24937	// match: (Rsh64x64 x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
24938	// result: (SRAD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
24939	for {
24940		_ = v.Args[1]
24941		x := v.Args[0]
24942		v_1 := v.Args[1]
24943		if v_1.Op != OpPPC64SUB || v_1.Type != typ.UInt {
24944			break
24945		}
24946		_ = v_1.Args[1]
24947		v_1_0 := v_1.Args[0]
24948		if v_1_0.Op != OpPPC64MOVDconst || v_1_0.AuxInt != 64 {
24949			break
24950		}
24951		v_1_1 := v_1.Args[1]
24952		if v_1_1.Op != OpPPC64ANDconst || v_1_1.Type != typ.UInt || v_1_1.AuxInt != 63 {
24953			break
24954		}
24955		y := v_1_1.Args[0]
24956		v.reset(OpPPC64SRAD)
24957		v.AddArg(x)
24958		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
24959		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
24960		v1.AuxInt = 64
24961		v0.AddArg(v1)
24962		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
24963		v2.AuxInt = 63
24964		v2.AddArg(y)
24965		v0.AddArg(v2)
24966		v.AddArg(v0)
24967		return true
24968	}
24969	// match: (Rsh64x64 x (SUB <typ.UInt> (MOVDconst [64]) (AND <typ.UInt> y (MOVDconst [63]))))
24970	// result: (SRAD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
24971	for {
24972		_ = v.Args[1]
24973		x := v.Args[0]
24974		v_1 := v.Args[1]
24975		if v_1.Op != OpPPC64SUB || v_1.Type != typ.UInt {
24976			break
24977		}
24978		_ = v_1.Args[1]
24979		v_1_0 := v_1.Args[0]
24980		if v_1_0.Op != OpPPC64MOVDconst || v_1_0.AuxInt != 64 {
24981			break
24982		}
24983		v_1_1 := v_1.Args[1]
24984		if v_1_1.Op != OpPPC64AND || v_1_1.Type != typ.UInt {
24985			break
24986		}
24987		_ = v_1_1.Args[1]
24988		y := v_1_1.Args[0]
24989		v_1_1_1 := v_1_1.Args[1]
24990		if v_1_1_1.Op != OpPPC64MOVDconst || v_1_1_1.AuxInt != 63 {
24991			break
24992		}
24993		v.reset(OpPPC64SRAD)
24994		v.AddArg(x)
24995		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
24996		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
24997		v1.AuxInt = 64
24998		v0.AddArg(v1)
24999		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
25000		v2.AuxInt = 63
25001		v2.AddArg(y)
25002		v0.AddArg(v2)
25003		v.AddArg(v0)
25004		return true
25005	}
25006	// match: (Rsh64x64 x (SUB <typ.UInt> (MOVDconst [64]) (AND <typ.UInt> (MOVDconst [63]) y)))
25007	// result: (SRAD x (SUB <typ.UInt> (MOVDconst [64]) (ANDconst <typ.UInt> [63] y)))
25008	for {
25009		_ = v.Args[1]
25010		x := v.Args[0]
25011		v_1 := v.Args[1]
25012		if v_1.Op != OpPPC64SUB || v_1.Type != typ.UInt {
25013			break
25014		}
25015		_ = v_1.Args[1]
25016		v_1_0 := v_1.Args[0]
25017		if v_1_0.Op != OpPPC64MOVDconst || v_1_0.AuxInt != 64 {
25018			break
25019		}
25020		v_1_1 := v_1.Args[1]
25021		if v_1_1.Op != OpPPC64AND || v_1_1.Type != typ.UInt {
25022			break
25023		}
25024		y := v_1_1.Args[1]
25025		v_1_1_0 := v_1_1.Args[0]
25026		if v_1_1_0.Op != OpPPC64MOVDconst || v_1_1_0.AuxInt != 63 {
25027			break
25028		}
25029		v.reset(OpPPC64SRAD)
25030		v.AddArg(x)
25031		v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
25032		v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
25033		v1.AuxInt = 64
25034		v0.AddArg(v1)
25035		v2 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.UInt)
25036		v2.AuxInt = 63
25037		v2.AddArg(y)
25038		v0.AddArg(v2)
25039		v.AddArg(v0)
25040		return true
25041	}
25042	return false
25043}
25044func rewriteValuePPC64_OpRsh64x64_10(v *Value) bool {
25045	b := v.Block
25046	typ := &b.Func.Config.Types
25047	// match: (Rsh64x64 x y)
25048	// result: (SRAD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] y))))
25049	for {
25050		y := v.Args[1]
25051		x := v.Args[0]
25052		v.reset(OpPPC64SRAD)
25053		v.AddArg(x)
25054		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
25055		v0.AddArg(y)
25056		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
25057		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
25058		v2.AuxInt = -64
25059		v2.AddArg(y)
25060		v1.AddArg(v2)
25061		v0.AddArg(v1)
25062		v.AddArg(v0)
25063		return true
25064	}
25065}
25066func rewriteValuePPC64_OpRsh64x8_0(v *Value) bool {
25067	b := v.Block
25068	typ := &b.Func.Config.Types
25069	// match: (Rsh64x8 x y)
25070	// cond: shiftIsBounded(v)
25071	// result: (SRAD x y)
25072	for {
25073		y := v.Args[1]
25074		x := v.Args[0]
25075		if !(shiftIsBounded(v)) {
25076			break
25077		}
25078		v.reset(OpPPC64SRAD)
25079		v.AddArg(x)
25080		v.AddArg(y)
25081		return true
25082	}
25083	// match: (Rsh64x8 x y)
25084	// result: (SRAD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt8to64 y)))))
25085	for {
25086		y := v.Args[1]
25087		x := v.Args[0]
25088		v.reset(OpPPC64SRAD)
25089		v.AddArg(x)
25090		v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
25091		v0.AddArg(y)
25092		v1 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
25093		v2 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
25094		v2.AuxInt = -64
25095		v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
25096		v3.AddArg(y)
25097		v2.AddArg(v3)
25098		v1.AddArg(v2)
25099		v0.AddArg(v1)
25100		v.AddArg(v0)
25101		return true
25102	}
25103}
25104func rewriteValuePPC64_OpRsh8Ux16_0(v *Value) bool {
25105	b := v.Block
25106	typ := &b.Func.Config.Types
25107	// match: (Rsh8Ux16 x y)
25108	// cond: shiftIsBounded(v)
25109	// result: (SRW (MOVBZreg x) y)
25110	for {
25111		y := v.Args[1]
25112		x := v.Args[0]
25113		if !(shiftIsBounded(v)) {
25114			break
25115		}
25116		v.reset(OpPPC64SRW)
25117		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
25118		v0.AddArg(x)
25119		v.AddArg(v0)
25120		v.AddArg(y)
25121		return true
25122	}
25123	// match: (Rsh8Ux16 x y)
25124	// result: (SRW (ZeroExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt16to64 y)))))
25125	for {
25126		y := v.Args[1]
25127		x := v.Args[0]
25128		v.reset(OpPPC64SRW)
25129		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
25130		v0.AddArg(x)
25131		v.AddArg(v0)
25132		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
25133		v1.AddArg(y)
25134		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
25135		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
25136		v3.AuxInt = -8
25137		v4 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
25138		v4.AddArg(y)
25139		v3.AddArg(v4)
25140		v2.AddArg(v3)
25141		v1.AddArg(v2)
25142		v.AddArg(v1)
25143		return true
25144	}
25145}
25146func rewriteValuePPC64_OpRsh8Ux32_0(v *Value) bool {
25147	b := v.Block
25148	typ := &b.Func.Config.Types
25149	// match: (Rsh8Ux32 x (Const64 [c]))
25150	// cond: uint32(c) < 8
25151	// result: (SRWconst (ZeroExt8to32 x) [c])
25152	for {
25153		_ = v.Args[1]
25154		x := v.Args[0]
25155		v_1 := v.Args[1]
25156		if v_1.Op != OpConst64 {
25157			break
25158		}
25159		c := v_1.AuxInt
25160		if !(uint32(c) < 8) {
25161			break
25162		}
25163		v.reset(OpPPC64SRWconst)
25164		v.AuxInt = c
25165		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
25166		v0.AddArg(x)
25167		v.AddArg(v0)
25168		return true
25169	}
25170	// match: (Rsh8Ux32 x (MOVDconst [c]))
25171	// cond: uint32(c) < 8
25172	// result: (SRWconst (ZeroExt8to32 x) [c])
25173	for {
25174		_ = v.Args[1]
25175		x := v.Args[0]
25176		v_1 := v.Args[1]
25177		if v_1.Op != OpPPC64MOVDconst {
25178			break
25179		}
25180		c := v_1.AuxInt
25181		if !(uint32(c) < 8) {
25182			break
25183		}
25184		v.reset(OpPPC64SRWconst)
25185		v.AuxInt = c
25186		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
25187		v0.AddArg(x)
25188		v.AddArg(v0)
25189		return true
25190	}
25191	// match: (Rsh8Ux32 x y)
25192	// cond: shiftIsBounded(v)
25193	// result: (SRW (MOVBZreg x) y)
25194	for {
25195		y := v.Args[1]
25196		x := v.Args[0]
25197		if !(shiftIsBounded(v)) {
25198			break
25199		}
25200		v.reset(OpPPC64SRW)
25201		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
25202		v0.AddArg(x)
25203		v.AddArg(v0)
25204		v.AddArg(y)
25205		return true
25206	}
25207	// match: (Rsh8Ux32 x y)
25208	// result: (SRW (ZeroExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt32to64 y)))))
25209	for {
25210		y := v.Args[1]
25211		x := v.Args[0]
25212		v.reset(OpPPC64SRW)
25213		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
25214		v0.AddArg(x)
25215		v.AddArg(v0)
25216		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
25217		v1.AddArg(y)
25218		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
25219		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
25220		v3.AuxInt = -8
25221		v4 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
25222		v4.AddArg(y)
25223		v3.AddArg(v4)
25224		v2.AddArg(v3)
25225		v1.AddArg(v2)
25226		v.AddArg(v1)
25227		return true
25228	}
25229}
25230func rewriteValuePPC64_OpRsh8Ux64_0(v *Value) bool {
25231	b := v.Block
25232	typ := &b.Func.Config.Types
25233	// match: (Rsh8Ux64 x (Const64 [c]))
25234	// cond: uint64(c) < 8
25235	// result: (SRWconst (ZeroExt8to32 x) [c])
25236	for {
25237		_ = v.Args[1]
25238		x := v.Args[0]
25239		v_1 := v.Args[1]
25240		if v_1.Op != OpConst64 {
25241			break
25242		}
25243		c := v_1.AuxInt
25244		if !(uint64(c) < 8) {
25245			break
25246		}
25247		v.reset(OpPPC64SRWconst)
25248		v.AuxInt = c
25249		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
25250		v0.AddArg(x)
25251		v.AddArg(v0)
25252		return true
25253	}
25254	// match: (Rsh8Ux64 _ (Const64 [c]))
25255	// cond: uint64(c) >= 8
25256	// result: (MOVDconst [0])
25257	for {
25258		_ = v.Args[1]
25259		v_1 := v.Args[1]
25260		if v_1.Op != OpConst64 {
25261			break
25262		}
25263		c := v_1.AuxInt
25264		if !(uint64(c) >= 8) {
25265			break
25266		}
25267		v.reset(OpPPC64MOVDconst)
25268		v.AuxInt = 0
25269		return true
25270	}
25271	// match: (Rsh8Ux64 x (MOVDconst [c]))
25272	// cond: uint64(c) < 8
25273	// result: (SRWconst (ZeroExt8to32 x) [c])
25274	for {
25275		_ = v.Args[1]
25276		x := v.Args[0]
25277		v_1 := v.Args[1]
25278		if v_1.Op != OpPPC64MOVDconst {
25279			break
25280		}
25281		c := v_1.AuxInt
25282		if !(uint64(c) < 8) {
25283			break
25284		}
25285		v.reset(OpPPC64SRWconst)
25286		v.AuxInt = c
25287		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
25288		v0.AddArg(x)
25289		v.AddArg(v0)
25290		return true
25291	}
25292	// match: (Rsh8Ux64 x y)
25293	// cond: shiftIsBounded(v)
25294	// result: (SRW (MOVBZreg x) y)
25295	for {
25296		y := v.Args[1]
25297		x := v.Args[0]
25298		if !(shiftIsBounded(v)) {
25299			break
25300		}
25301		v.reset(OpPPC64SRW)
25302		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
25303		v0.AddArg(x)
25304		v.AddArg(v0)
25305		v.AddArg(y)
25306		return true
25307	}
25308	// match: (Rsh8Ux64 x y)
25309	// result: (SRW (ZeroExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] y))))
25310	for {
25311		y := v.Args[1]
25312		x := v.Args[0]
25313		v.reset(OpPPC64SRW)
25314		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
25315		v0.AddArg(x)
25316		v.AddArg(v0)
25317		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
25318		v1.AddArg(y)
25319		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
25320		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
25321		v3.AuxInt = -8
25322		v3.AddArg(y)
25323		v2.AddArg(v3)
25324		v1.AddArg(v2)
25325		v.AddArg(v1)
25326		return true
25327	}
25328}
25329func rewriteValuePPC64_OpRsh8Ux8_0(v *Value) bool {
25330	b := v.Block
25331	typ := &b.Func.Config.Types
25332	// match: (Rsh8Ux8 x y)
25333	// cond: shiftIsBounded(v)
25334	// result: (SRW (MOVBZreg x) y)
25335	for {
25336		y := v.Args[1]
25337		x := v.Args[0]
25338		if !(shiftIsBounded(v)) {
25339			break
25340		}
25341		v.reset(OpPPC64SRW)
25342		v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
25343		v0.AddArg(x)
25344		v.AddArg(v0)
25345		v.AddArg(y)
25346		return true
25347	}
25348	// match: (Rsh8Ux8 x y)
25349	// result: (SRW (ZeroExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt8to64 y)))))
25350	for {
25351		y := v.Args[1]
25352		x := v.Args[0]
25353		v.reset(OpPPC64SRW)
25354		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
25355		v0.AddArg(x)
25356		v.AddArg(v0)
25357		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
25358		v1.AddArg(y)
25359		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
25360		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
25361		v3.AuxInt = -8
25362		v4 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
25363		v4.AddArg(y)
25364		v3.AddArg(v4)
25365		v2.AddArg(v3)
25366		v1.AddArg(v2)
25367		v.AddArg(v1)
25368		return true
25369	}
25370}
25371func rewriteValuePPC64_OpRsh8x16_0(v *Value) bool {
25372	b := v.Block
25373	typ := &b.Func.Config.Types
25374	// match: (Rsh8x16 x y)
25375	// cond: shiftIsBounded(v)
25376	// result: (SRAW (MOVBreg x) y)
25377	for {
25378		y := v.Args[1]
25379		x := v.Args[0]
25380		if !(shiftIsBounded(v)) {
25381			break
25382		}
25383		v.reset(OpPPC64SRAW)
25384		v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
25385		v0.AddArg(x)
25386		v.AddArg(v0)
25387		v.AddArg(y)
25388		return true
25389	}
25390	// match: (Rsh8x16 x y)
25391	// result: (SRAW (SignExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt16to64 y)))))
25392	for {
25393		y := v.Args[1]
25394		x := v.Args[0]
25395		v.reset(OpPPC64SRAW)
25396		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
25397		v0.AddArg(x)
25398		v.AddArg(v0)
25399		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
25400		v1.AddArg(y)
25401		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
25402		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
25403		v3.AuxInt = -8
25404		v4 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
25405		v4.AddArg(y)
25406		v3.AddArg(v4)
25407		v2.AddArg(v3)
25408		v1.AddArg(v2)
25409		v.AddArg(v1)
25410		return true
25411	}
25412}
25413func rewriteValuePPC64_OpRsh8x32_0(v *Value) bool {
25414	b := v.Block
25415	typ := &b.Func.Config.Types
25416	// match: (Rsh8x32 x (Const64 [c]))
25417	// cond: uint32(c) < 8
25418	// result: (SRAWconst (SignExt8to32 x) [c])
25419	for {
25420		_ = v.Args[1]
25421		x := v.Args[0]
25422		v_1 := v.Args[1]
25423		if v_1.Op != OpConst64 {
25424			break
25425		}
25426		c := v_1.AuxInt
25427		if !(uint32(c) < 8) {
25428			break
25429		}
25430		v.reset(OpPPC64SRAWconst)
25431		v.AuxInt = c
25432		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
25433		v0.AddArg(x)
25434		v.AddArg(v0)
25435		return true
25436	}
25437	// match: (Rsh8x32 x (MOVDconst [c]))
25438	// cond: uint32(c) < 8
25439	// result: (SRAWconst (SignExt8to32 x) [c])
25440	for {
25441		_ = v.Args[1]
25442		x := v.Args[0]
25443		v_1 := v.Args[1]
25444		if v_1.Op != OpPPC64MOVDconst {
25445			break
25446		}
25447		c := v_1.AuxInt
25448		if !(uint32(c) < 8) {
25449			break
25450		}
25451		v.reset(OpPPC64SRAWconst)
25452		v.AuxInt = c
25453		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
25454		v0.AddArg(x)
25455		v.AddArg(v0)
25456		return true
25457	}
25458	// match: (Rsh8x32 x y)
25459	// cond: shiftIsBounded(v)
25460	// result: (SRAW (MOVBreg x) y)
25461	for {
25462		y := v.Args[1]
25463		x := v.Args[0]
25464		if !(shiftIsBounded(v)) {
25465			break
25466		}
25467		v.reset(OpPPC64SRAW)
25468		v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
25469		v0.AddArg(x)
25470		v.AddArg(v0)
25471		v.AddArg(y)
25472		return true
25473	}
25474	// match: (Rsh8x32 x y)
25475	// result: (SRAW (SignExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt32to64 y)))))
25476	for {
25477		y := v.Args[1]
25478		x := v.Args[0]
25479		v.reset(OpPPC64SRAW)
25480		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
25481		v0.AddArg(x)
25482		v.AddArg(v0)
25483		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
25484		v1.AddArg(y)
25485		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
25486		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
25487		v3.AuxInt = -8
25488		v4 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
25489		v4.AddArg(y)
25490		v3.AddArg(v4)
25491		v2.AddArg(v3)
25492		v1.AddArg(v2)
25493		v.AddArg(v1)
25494		return true
25495	}
25496}
25497func rewriteValuePPC64_OpRsh8x64_0(v *Value) bool {
25498	b := v.Block
25499	typ := &b.Func.Config.Types
25500	// match: (Rsh8x64 x (Const64 [c]))
25501	// cond: uint64(c) < 8
25502	// result: (SRAWconst (SignExt8to32 x) [c])
25503	for {
25504		_ = v.Args[1]
25505		x := v.Args[0]
25506		v_1 := v.Args[1]
25507		if v_1.Op != OpConst64 {
25508			break
25509		}
25510		c := v_1.AuxInt
25511		if !(uint64(c) < 8) {
25512			break
25513		}
25514		v.reset(OpPPC64SRAWconst)
25515		v.AuxInt = c
25516		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
25517		v0.AddArg(x)
25518		v.AddArg(v0)
25519		return true
25520	}
25521	// match: (Rsh8x64 x (Const64 [c]))
25522	// cond: uint64(c) >= 8
25523	// result: (SRAWconst (SignExt8to32 x) [63])
25524	for {
25525		_ = v.Args[1]
25526		x := v.Args[0]
25527		v_1 := v.Args[1]
25528		if v_1.Op != OpConst64 {
25529			break
25530		}
25531		c := v_1.AuxInt
25532		if !(uint64(c) >= 8) {
25533			break
25534		}
25535		v.reset(OpPPC64SRAWconst)
25536		v.AuxInt = 63
25537		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
25538		v0.AddArg(x)
25539		v.AddArg(v0)
25540		return true
25541	}
25542	// match: (Rsh8x64 x (MOVDconst [c]))
25543	// cond: uint64(c) < 8
25544	// result: (SRAWconst (SignExt8to32 x) [c])
25545	for {
25546		_ = v.Args[1]
25547		x := v.Args[0]
25548		v_1 := v.Args[1]
25549		if v_1.Op != OpPPC64MOVDconst {
25550			break
25551		}
25552		c := v_1.AuxInt
25553		if !(uint64(c) < 8) {
25554			break
25555		}
25556		v.reset(OpPPC64SRAWconst)
25557		v.AuxInt = c
25558		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
25559		v0.AddArg(x)
25560		v.AddArg(v0)
25561		return true
25562	}
25563	// match: (Rsh8x64 x y)
25564	// cond: shiftIsBounded(v)
25565	// result: (SRAW (MOVBreg x) y)
25566	for {
25567		y := v.Args[1]
25568		x := v.Args[0]
25569		if !(shiftIsBounded(v)) {
25570			break
25571		}
25572		v.reset(OpPPC64SRAW)
25573		v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
25574		v0.AddArg(x)
25575		v.AddArg(v0)
25576		v.AddArg(y)
25577		return true
25578	}
25579	// match: (Rsh8x64 x y)
25580	// result: (SRAW (SignExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] y))))
25581	for {
25582		y := v.Args[1]
25583		x := v.Args[0]
25584		v.reset(OpPPC64SRAW)
25585		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
25586		v0.AddArg(x)
25587		v.AddArg(v0)
25588		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
25589		v1.AddArg(y)
25590		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
25591		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
25592		v3.AuxInt = -8
25593		v3.AddArg(y)
25594		v2.AddArg(v3)
25595		v1.AddArg(v2)
25596		v.AddArg(v1)
25597		return true
25598	}
25599}
25600func rewriteValuePPC64_OpRsh8x8_0(v *Value) bool {
25601	b := v.Block
25602	typ := &b.Func.Config.Types
25603	// match: (Rsh8x8 x y)
25604	// cond: shiftIsBounded(v)
25605	// result: (SRAW (MOVBreg x) y)
25606	for {
25607		y := v.Args[1]
25608		x := v.Args[0]
25609		if !(shiftIsBounded(v)) {
25610			break
25611		}
25612		v.reset(OpPPC64SRAW)
25613		v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
25614		v0.AddArg(x)
25615		v.AddArg(v0)
25616		v.AddArg(y)
25617		return true
25618	}
25619	// match: (Rsh8x8 x y)
25620	// result: (SRAW (SignExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt8to64 y)))))
25621	for {
25622		y := v.Args[1]
25623		x := v.Args[0]
25624		v.reset(OpPPC64SRAW)
25625		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
25626		v0.AddArg(x)
25627		v.AddArg(v0)
25628		v1 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
25629		v1.AddArg(y)
25630		v2 := b.NewValue0(v.Pos, OpPPC64MaskIfNotCarry, typ.Int64)
25631		v3 := b.NewValue0(v.Pos, OpPPC64ADDconstForCarry, types.TypeFlags)
25632		v3.AuxInt = -8
25633		v4 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
25634		v4.AddArg(y)
25635		v3.AddArg(v4)
25636		v2.AddArg(v3)
25637		v1.AddArg(v2)
25638		v.AddArg(v1)
25639		return true
25640	}
25641}
25642func rewriteValuePPC64_OpSignExt16to32_0(v *Value) bool {
25643	// match: (SignExt16to32 x)
25644	// result: (MOVHreg x)
25645	for {
25646		x := v.Args[0]
25647		v.reset(OpPPC64MOVHreg)
25648		v.AddArg(x)
25649		return true
25650	}
25651}
25652func rewriteValuePPC64_OpSignExt16to64_0(v *Value) bool {
25653	// match: (SignExt16to64 x)
25654	// result: (MOVHreg x)
25655	for {
25656		x := v.Args[0]
25657		v.reset(OpPPC64MOVHreg)
25658		v.AddArg(x)
25659		return true
25660	}
25661}
25662func rewriteValuePPC64_OpSignExt32to64_0(v *Value) bool {
25663	// match: (SignExt32to64 x)
25664	// result: (MOVWreg x)
25665	for {
25666		x := v.Args[0]
25667		v.reset(OpPPC64MOVWreg)
25668		v.AddArg(x)
25669		return true
25670	}
25671}
25672func rewriteValuePPC64_OpSignExt8to16_0(v *Value) bool {
25673	// match: (SignExt8to16 x)
25674	// result: (MOVBreg x)
25675	for {
25676		x := v.Args[0]
25677		v.reset(OpPPC64MOVBreg)
25678		v.AddArg(x)
25679		return true
25680	}
25681}
25682func rewriteValuePPC64_OpSignExt8to32_0(v *Value) bool {
25683	// match: (SignExt8to32 x)
25684	// result: (MOVBreg x)
25685	for {
25686		x := v.Args[0]
25687		v.reset(OpPPC64MOVBreg)
25688		v.AddArg(x)
25689		return true
25690	}
25691}
25692func rewriteValuePPC64_OpSignExt8to64_0(v *Value) bool {
25693	// match: (SignExt8to64 x)
25694	// result: (MOVBreg x)
25695	for {
25696		x := v.Args[0]
25697		v.reset(OpPPC64MOVBreg)
25698		v.AddArg(x)
25699		return true
25700	}
25701}
25702func rewriteValuePPC64_OpSlicemask_0(v *Value) bool {
25703	b := v.Block
25704	// match: (Slicemask <t> x)
25705	// result: (SRADconst (NEG <t> x) [63])
25706	for {
25707		t := v.Type
25708		x := v.Args[0]
25709		v.reset(OpPPC64SRADconst)
25710		v.AuxInt = 63
25711		v0 := b.NewValue0(v.Pos, OpPPC64NEG, t)
25712		v0.AddArg(x)
25713		v.AddArg(v0)
25714		return true
25715	}
25716}
25717func rewriteValuePPC64_OpSqrt_0(v *Value) bool {
25718	// match: (Sqrt x)
25719	// result: (FSQRT x)
25720	for {
25721		x := v.Args[0]
25722		v.reset(OpPPC64FSQRT)
25723		v.AddArg(x)
25724		return true
25725	}
25726}
25727func rewriteValuePPC64_OpStaticCall_0(v *Value) bool {
25728	// match: (StaticCall [argwid] {target} mem)
25729	// result: (CALLstatic [argwid] {target} mem)
25730	for {
25731		argwid := v.AuxInt
25732		target := v.Aux
25733		mem := v.Args[0]
25734		v.reset(OpPPC64CALLstatic)
25735		v.AuxInt = argwid
25736		v.Aux = target
25737		v.AddArg(mem)
25738		return true
25739	}
25740}
25741func rewriteValuePPC64_OpStore_0(v *Value) bool {
25742	// match: (Store {t} ptr val mem)
25743	// cond: t.(*types.Type).Size() == 8 && is64BitFloat(val.Type)
25744	// result: (FMOVDstore ptr val mem)
25745	for {
25746		t := v.Aux
25747		mem := v.Args[2]
25748		ptr := v.Args[0]
25749		val := v.Args[1]
25750		if !(t.(*types.Type).Size() == 8 && is64BitFloat(val.Type)) {
25751			break
25752		}
25753		v.reset(OpPPC64FMOVDstore)
25754		v.AddArg(ptr)
25755		v.AddArg(val)
25756		v.AddArg(mem)
25757		return true
25758	}
25759	// match: (Store {t} ptr val mem)
25760	// cond: t.(*types.Type).Size() == 8 && is32BitFloat(val.Type)
25761	// result: (FMOVDstore ptr val mem)
25762	for {
25763		t := v.Aux
25764		mem := v.Args[2]
25765		ptr := v.Args[0]
25766		val := v.Args[1]
25767		if !(t.(*types.Type).Size() == 8 && is32BitFloat(val.Type)) {
25768			break
25769		}
25770		v.reset(OpPPC64FMOVDstore)
25771		v.AddArg(ptr)
25772		v.AddArg(val)
25773		v.AddArg(mem)
25774		return true
25775	}
25776	// match: (Store {t} ptr val mem)
25777	// cond: t.(*types.Type).Size() == 4 && is32BitFloat(val.Type)
25778	// result: (FMOVSstore ptr val mem)
25779	for {
25780		t := v.Aux
25781		mem := v.Args[2]
25782		ptr := v.Args[0]
25783		val := v.Args[1]
25784		if !(t.(*types.Type).Size() == 4 && is32BitFloat(val.Type)) {
25785			break
25786		}
25787		v.reset(OpPPC64FMOVSstore)
25788		v.AddArg(ptr)
25789		v.AddArg(val)
25790		v.AddArg(mem)
25791		return true
25792	}
25793	// match: (Store {t} ptr val mem)
25794	// cond: t.(*types.Type).Size() == 8 && (is64BitInt(val.Type) || isPtr(val.Type))
25795	// result: (MOVDstore ptr val mem)
25796	for {
25797		t := v.Aux
25798		mem := v.Args[2]
25799		ptr := v.Args[0]
25800		val := v.Args[1]
25801		if !(t.(*types.Type).Size() == 8 && (is64BitInt(val.Type) || isPtr(val.Type))) {
25802			break
25803		}
25804		v.reset(OpPPC64MOVDstore)
25805		v.AddArg(ptr)
25806		v.AddArg(val)
25807		v.AddArg(mem)
25808		return true
25809	}
25810	// match: (Store {t} ptr val mem)
25811	// cond: t.(*types.Type).Size() == 4 && is32BitInt(val.Type)
25812	// result: (MOVWstore ptr val mem)
25813	for {
25814		t := v.Aux
25815		mem := v.Args[2]
25816		ptr := v.Args[0]
25817		val := v.Args[1]
25818		if !(t.(*types.Type).Size() == 4 && is32BitInt(val.Type)) {
25819			break
25820		}
25821		v.reset(OpPPC64MOVWstore)
25822		v.AddArg(ptr)
25823		v.AddArg(val)
25824		v.AddArg(mem)
25825		return true
25826	}
25827	// match: (Store {t} ptr val mem)
25828	// cond: t.(*types.Type).Size() == 2
25829	// result: (MOVHstore ptr val mem)
25830	for {
25831		t := v.Aux
25832		mem := v.Args[2]
25833		ptr := v.Args[0]
25834		val := v.Args[1]
25835		if !(t.(*types.Type).Size() == 2) {
25836			break
25837		}
25838		v.reset(OpPPC64MOVHstore)
25839		v.AddArg(ptr)
25840		v.AddArg(val)
25841		v.AddArg(mem)
25842		return true
25843	}
25844	// match: (Store {t} ptr val mem)
25845	// cond: t.(*types.Type).Size() == 1
25846	// result: (MOVBstore ptr val mem)
25847	for {
25848		t := v.Aux
25849		mem := v.Args[2]
25850		ptr := v.Args[0]
25851		val := v.Args[1]
25852		if !(t.(*types.Type).Size() == 1) {
25853			break
25854		}
25855		v.reset(OpPPC64MOVBstore)
25856		v.AddArg(ptr)
25857		v.AddArg(val)
25858		v.AddArg(mem)
25859		return true
25860	}
25861	return false
25862}
25863func rewriteValuePPC64_OpSub16_0(v *Value) bool {
25864	// match: (Sub16 x y)
25865	// result: (SUB x y)
25866	for {
25867		y := v.Args[1]
25868		x := v.Args[0]
25869		v.reset(OpPPC64SUB)
25870		v.AddArg(x)
25871		v.AddArg(y)
25872		return true
25873	}
25874}
25875func rewriteValuePPC64_OpSub32_0(v *Value) bool {
25876	// match: (Sub32 x y)
25877	// result: (SUB x y)
25878	for {
25879		y := v.Args[1]
25880		x := v.Args[0]
25881		v.reset(OpPPC64SUB)
25882		v.AddArg(x)
25883		v.AddArg(y)
25884		return true
25885	}
25886}
25887func rewriteValuePPC64_OpSub32F_0(v *Value) bool {
25888	// match: (Sub32F x y)
25889	// result: (FSUBS x y)
25890	for {
25891		y := v.Args[1]
25892		x := v.Args[0]
25893		v.reset(OpPPC64FSUBS)
25894		v.AddArg(x)
25895		v.AddArg(y)
25896		return true
25897	}
25898}
25899func rewriteValuePPC64_OpSub64_0(v *Value) bool {
25900	// match: (Sub64 x y)
25901	// result: (SUB x y)
25902	for {
25903		y := v.Args[1]
25904		x := v.Args[0]
25905		v.reset(OpPPC64SUB)
25906		v.AddArg(x)
25907		v.AddArg(y)
25908		return true
25909	}
25910}
25911func rewriteValuePPC64_OpSub64F_0(v *Value) bool {
25912	// match: (Sub64F x y)
25913	// result: (FSUB x y)
25914	for {
25915		y := v.Args[1]
25916		x := v.Args[0]
25917		v.reset(OpPPC64FSUB)
25918		v.AddArg(x)
25919		v.AddArg(y)
25920		return true
25921	}
25922}
25923func rewriteValuePPC64_OpSub8_0(v *Value) bool {
25924	// match: (Sub8 x y)
25925	// result: (SUB x y)
25926	for {
25927		y := v.Args[1]
25928		x := v.Args[0]
25929		v.reset(OpPPC64SUB)
25930		v.AddArg(x)
25931		v.AddArg(y)
25932		return true
25933	}
25934}
25935func rewriteValuePPC64_OpSubPtr_0(v *Value) bool {
25936	// match: (SubPtr x y)
25937	// result: (SUB x y)
25938	for {
25939		y := v.Args[1]
25940		x := v.Args[0]
25941		v.reset(OpPPC64SUB)
25942		v.AddArg(x)
25943		v.AddArg(y)
25944		return true
25945	}
25946}
25947func rewriteValuePPC64_OpTrunc_0(v *Value) bool {
25948	// match: (Trunc x)
25949	// result: (FTRUNC x)
25950	for {
25951		x := v.Args[0]
25952		v.reset(OpPPC64FTRUNC)
25953		v.AddArg(x)
25954		return true
25955	}
25956}
25957func rewriteValuePPC64_OpTrunc16to8_0(v *Value) bool {
25958	// match: (Trunc16to8 <t> x)
25959	// cond: isSigned(t)
25960	// result: (MOVBreg x)
25961	for {
25962		t := v.Type
25963		x := v.Args[0]
25964		if !(isSigned(t)) {
25965			break
25966		}
25967		v.reset(OpPPC64MOVBreg)
25968		v.AddArg(x)
25969		return true
25970	}
25971	// match: (Trunc16to8 x)
25972	// result: (MOVBZreg x)
25973	for {
25974		x := v.Args[0]
25975		v.reset(OpPPC64MOVBZreg)
25976		v.AddArg(x)
25977		return true
25978	}
25979}
25980func rewriteValuePPC64_OpTrunc32to16_0(v *Value) bool {
25981	// match: (Trunc32to16 <t> x)
25982	// cond: isSigned(t)
25983	// result: (MOVHreg x)
25984	for {
25985		t := v.Type
25986		x := v.Args[0]
25987		if !(isSigned(t)) {
25988			break
25989		}
25990		v.reset(OpPPC64MOVHreg)
25991		v.AddArg(x)
25992		return true
25993	}
25994	// match: (Trunc32to16 x)
25995	// result: (MOVHZreg x)
25996	for {
25997		x := v.Args[0]
25998		v.reset(OpPPC64MOVHZreg)
25999		v.AddArg(x)
26000		return true
26001	}
26002}
26003func rewriteValuePPC64_OpTrunc32to8_0(v *Value) bool {
26004	// match: (Trunc32to8 <t> x)
26005	// cond: isSigned(t)
26006	// result: (MOVBreg x)
26007	for {
26008		t := v.Type
26009		x := v.Args[0]
26010		if !(isSigned(t)) {
26011			break
26012		}
26013		v.reset(OpPPC64MOVBreg)
26014		v.AddArg(x)
26015		return true
26016	}
26017	// match: (Trunc32to8 x)
26018	// result: (MOVBZreg x)
26019	for {
26020		x := v.Args[0]
26021		v.reset(OpPPC64MOVBZreg)
26022		v.AddArg(x)
26023		return true
26024	}
26025}
26026func rewriteValuePPC64_OpTrunc64to16_0(v *Value) bool {
26027	// match: (Trunc64to16 <t> x)
26028	// cond: isSigned(t)
26029	// result: (MOVHreg x)
26030	for {
26031		t := v.Type
26032		x := v.Args[0]
26033		if !(isSigned(t)) {
26034			break
26035		}
26036		v.reset(OpPPC64MOVHreg)
26037		v.AddArg(x)
26038		return true
26039	}
26040	// match: (Trunc64to16 x)
26041	// result: (MOVHZreg x)
26042	for {
26043		x := v.Args[0]
26044		v.reset(OpPPC64MOVHZreg)
26045		v.AddArg(x)
26046		return true
26047	}
26048}
26049func rewriteValuePPC64_OpTrunc64to32_0(v *Value) bool {
26050	// match: (Trunc64to32 <t> x)
26051	// cond: isSigned(t)
26052	// result: (MOVWreg x)
26053	for {
26054		t := v.Type
26055		x := v.Args[0]
26056		if !(isSigned(t)) {
26057			break
26058		}
26059		v.reset(OpPPC64MOVWreg)
26060		v.AddArg(x)
26061		return true
26062	}
26063	// match: (Trunc64to32 x)
26064	// result: (MOVWZreg x)
26065	for {
26066		x := v.Args[0]
26067		v.reset(OpPPC64MOVWZreg)
26068		v.AddArg(x)
26069		return true
26070	}
26071}
26072func rewriteValuePPC64_OpTrunc64to8_0(v *Value) bool {
26073	// match: (Trunc64to8 <t> x)
26074	// cond: isSigned(t)
26075	// result: (MOVBreg x)
26076	for {
26077		t := v.Type
26078		x := v.Args[0]
26079		if !(isSigned(t)) {
26080			break
26081		}
26082		v.reset(OpPPC64MOVBreg)
26083		v.AddArg(x)
26084		return true
26085	}
26086	// match: (Trunc64to8 x)
26087	// result: (MOVBZreg x)
26088	for {
26089		x := v.Args[0]
26090		v.reset(OpPPC64MOVBZreg)
26091		v.AddArg(x)
26092		return true
26093	}
26094}
26095func rewriteValuePPC64_OpWB_0(v *Value) bool {
26096	// match: (WB {fn} destptr srcptr mem)
26097	// result: (LoweredWB {fn} destptr srcptr mem)
26098	for {
26099		fn := v.Aux
26100		mem := v.Args[2]
26101		destptr := v.Args[0]
26102		srcptr := v.Args[1]
26103		v.reset(OpPPC64LoweredWB)
26104		v.Aux = fn
26105		v.AddArg(destptr)
26106		v.AddArg(srcptr)
26107		v.AddArg(mem)
26108		return true
26109	}
26110}
26111func rewriteValuePPC64_OpXor16_0(v *Value) bool {
26112	// match: (Xor16 x y)
26113	// result: (XOR x y)
26114	for {
26115		y := v.Args[1]
26116		x := v.Args[0]
26117		v.reset(OpPPC64XOR)
26118		v.AddArg(x)
26119		v.AddArg(y)
26120		return true
26121	}
26122}
26123func rewriteValuePPC64_OpXor32_0(v *Value) bool {
26124	// match: (Xor32 x y)
26125	// result: (XOR x y)
26126	for {
26127		y := v.Args[1]
26128		x := v.Args[0]
26129		v.reset(OpPPC64XOR)
26130		v.AddArg(x)
26131		v.AddArg(y)
26132		return true
26133	}
26134}
26135func rewriteValuePPC64_OpXor64_0(v *Value) bool {
26136	// match: (Xor64 x y)
26137	// result: (XOR x y)
26138	for {
26139		y := v.Args[1]
26140		x := v.Args[0]
26141		v.reset(OpPPC64XOR)
26142		v.AddArg(x)
26143		v.AddArg(y)
26144		return true
26145	}
26146}
26147func rewriteValuePPC64_OpXor8_0(v *Value) bool {
26148	// match: (Xor8 x y)
26149	// result: (XOR x y)
26150	for {
26151		y := v.Args[1]
26152		x := v.Args[0]
26153		v.reset(OpPPC64XOR)
26154		v.AddArg(x)
26155		v.AddArg(y)
26156		return true
26157	}
26158}
26159func rewriteValuePPC64_OpZero_0(v *Value) bool {
26160	b := v.Block
26161	// match: (Zero [0] _ mem)
26162	// result: mem
26163	for {
26164		if v.AuxInt != 0 {
26165			break
26166		}
26167		mem := v.Args[1]
26168		v.reset(OpCopy)
26169		v.Type = mem.Type
26170		v.AddArg(mem)
26171		return true
26172	}
26173	// match: (Zero [1] destptr mem)
26174	// result: (MOVBstorezero destptr mem)
26175	for {
26176		if v.AuxInt != 1 {
26177			break
26178		}
26179		mem := v.Args[1]
26180		destptr := v.Args[0]
26181		v.reset(OpPPC64MOVBstorezero)
26182		v.AddArg(destptr)
26183		v.AddArg(mem)
26184		return true
26185	}
26186	// match: (Zero [2] destptr mem)
26187	// result: (MOVHstorezero destptr mem)
26188	for {
26189		if v.AuxInt != 2 {
26190			break
26191		}
26192		mem := v.Args[1]
26193		destptr := v.Args[0]
26194		v.reset(OpPPC64MOVHstorezero)
26195		v.AddArg(destptr)
26196		v.AddArg(mem)
26197		return true
26198	}
26199	// match: (Zero [3] destptr mem)
26200	// result: (MOVBstorezero [2] destptr (MOVHstorezero destptr mem))
26201	for {
26202		if v.AuxInt != 3 {
26203			break
26204		}
26205		mem := v.Args[1]
26206		destptr := v.Args[0]
26207		v.reset(OpPPC64MOVBstorezero)
26208		v.AuxInt = 2
26209		v.AddArg(destptr)
26210		v0 := b.NewValue0(v.Pos, OpPPC64MOVHstorezero, types.TypeMem)
26211		v0.AddArg(destptr)
26212		v0.AddArg(mem)
26213		v.AddArg(v0)
26214		return true
26215	}
26216	// match: (Zero [4] destptr mem)
26217	// result: (MOVWstorezero destptr mem)
26218	for {
26219		if v.AuxInt != 4 {
26220			break
26221		}
26222		mem := v.Args[1]
26223		destptr := v.Args[0]
26224		v.reset(OpPPC64MOVWstorezero)
26225		v.AddArg(destptr)
26226		v.AddArg(mem)
26227		return true
26228	}
26229	// match: (Zero [5] destptr mem)
26230	// result: (MOVBstorezero [4] destptr (MOVWstorezero destptr mem))
26231	for {
26232		if v.AuxInt != 5 {
26233			break
26234		}
26235		mem := v.Args[1]
26236		destptr := v.Args[0]
26237		v.reset(OpPPC64MOVBstorezero)
26238		v.AuxInt = 4
26239		v.AddArg(destptr)
26240		v0 := b.NewValue0(v.Pos, OpPPC64MOVWstorezero, types.TypeMem)
26241		v0.AddArg(destptr)
26242		v0.AddArg(mem)
26243		v.AddArg(v0)
26244		return true
26245	}
26246	// match: (Zero [6] destptr mem)
26247	// result: (MOVHstorezero [4] destptr (MOVWstorezero destptr mem))
26248	for {
26249		if v.AuxInt != 6 {
26250			break
26251		}
26252		mem := v.Args[1]
26253		destptr := v.Args[0]
26254		v.reset(OpPPC64MOVHstorezero)
26255		v.AuxInt = 4
26256		v.AddArg(destptr)
26257		v0 := b.NewValue0(v.Pos, OpPPC64MOVWstorezero, types.TypeMem)
26258		v0.AddArg(destptr)
26259		v0.AddArg(mem)
26260		v.AddArg(v0)
26261		return true
26262	}
26263	// match: (Zero [7] destptr mem)
26264	// result: (MOVBstorezero [6] destptr (MOVHstorezero [4] destptr (MOVWstorezero destptr mem)))
26265	for {
26266		if v.AuxInt != 7 {
26267			break
26268		}
26269		mem := v.Args[1]
26270		destptr := v.Args[0]
26271		v.reset(OpPPC64MOVBstorezero)
26272		v.AuxInt = 6
26273		v.AddArg(destptr)
26274		v0 := b.NewValue0(v.Pos, OpPPC64MOVHstorezero, types.TypeMem)
26275		v0.AuxInt = 4
26276		v0.AddArg(destptr)
26277		v1 := b.NewValue0(v.Pos, OpPPC64MOVWstorezero, types.TypeMem)
26278		v1.AddArg(destptr)
26279		v1.AddArg(mem)
26280		v0.AddArg(v1)
26281		v.AddArg(v0)
26282		return true
26283	}
26284	// match: (Zero [8] {t} destptr mem)
26285	// cond: t.(*types.Type).Alignment()%4 == 0
26286	// result: (MOVDstorezero destptr mem)
26287	for {
26288		if v.AuxInt != 8 {
26289			break
26290		}
26291		t := v.Aux
26292		mem := v.Args[1]
26293		destptr := v.Args[0]
26294		if !(t.(*types.Type).Alignment()%4 == 0) {
26295			break
26296		}
26297		v.reset(OpPPC64MOVDstorezero)
26298		v.AddArg(destptr)
26299		v.AddArg(mem)
26300		return true
26301	}
26302	// match: (Zero [8] destptr mem)
26303	// result: (MOVWstorezero [4] destptr (MOVWstorezero [0] destptr mem))
26304	for {
26305		if v.AuxInt != 8 {
26306			break
26307		}
26308		mem := v.Args[1]
26309		destptr := v.Args[0]
26310		v.reset(OpPPC64MOVWstorezero)
26311		v.AuxInt = 4
26312		v.AddArg(destptr)
26313		v0 := b.NewValue0(v.Pos, OpPPC64MOVWstorezero, types.TypeMem)
26314		v0.AuxInt = 0
26315		v0.AddArg(destptr)
26316		v0.AddArg(mem)
26317		v.AddArg(v0)
26318		return true
26319	}
26320	return false
26321}
26322func rewriteValuePPC64_OpZero_10(v *Value) bool {
26323	b := v.Block
26324	// match: (Zero [12] {t} destptr mem)
26325	// cond: t.(*types.Type).Alignment()%4 == 0
26326	// result: (MOVWstorezero [8] destptr (MOVDstorezero [0] destptr mem))
26327	for {
26328		if v.AuxInt != 12 {
26329			break
26330		}
26331		t := v.Aux
26332		mem := v.Args[1]
26333		destptr := v.Args[0]
26334		if !(t.(*types.Type).Alignment()%4 == 0) {
26335			break
26336		}
26337		v.reset(OpPPC64MOVWstorezero)
26338		v.AuxInt = 8
26339		v.AddArg(destptr)
26340		v0 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
26341		v0.AuxInt = 0
26342		v0.AddArg(destptr)
26343		v0.AddArg(mem)
26344		v.AddArg(v0)
26345		return true
26346	}
26347	// match: (Zero [16] {t} destptr mem)
26348	// cond: t.(*types.Type).Alignment()%4 == 0
26349	// result: (MOVDstorezero [8] destptr (MOVDstorezero [0] destptr mem))
26350	for {
26351		if v.AuxInt != 16 {
26352			break
26353		}
26354		t := v.Aux
26355		mem := v.Args[1]
26356		destptr := v.Args[0]
26357		if !(t.(*types.Type).Alignment()%4 == 0) {
26358			break
26359		}
26360		v.reset(OpPPC64MOVDstorezero)
26361		v.AuxInt = 8
26362		v.AddArg(destptr)
26363		v0 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
26364		v0.AuxInt = 0
26365		v0.AddArg(destptr)
26366		v0.AddArg(mem)
26367		v.AddArg(v0)
26368		return true
26369	}
26370	// match: (Zero [24] {t} destptr mem)
26371	// cond: t.(*types.Type).Alignment()%4 == 0
26372	// result: (MOVDstorezero [16] destptr (MOVDstorezero [8] destptr (MOVDstorezero [0] destptr mem)))
26373	for {
26374		if v.AuxInt != 24 {
26375			break
26376		}
26377		t := v.Aux
26378		mem := v.Args[1]
26379		destptr := v.Args[0]
26380		if !(t.(*types.Type).Alignment()%4 == 0) {
26381			break
26382		}
26383		v.reset(OpPPC64MOVDstorezero)
26384		v.AuxInt = 16
26385		v.AddArg(destptr)
26386		v0 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
26387		v0.AuxInt = 8
26388		v0.AddArg(destptr)
26389		v1 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
26390		v1.AuxInt = 0
26391		v1.AddArg(destptr)
26392		v1.AddArg(mem)
26393		v0.AddArg(v1)
26394		v.AddArg(v0)
26395		return true
26396	}
26397	// match: (Zero [32] {t} destptr mem)
26398	// cond: t.(*types.Type).Alignment()%4 == 0
26399	// result: (MOVDstorezero [24] destptr (MOVDstorezero [16] destptr (MOVDstorezero [8] destptr (MOVDstorezero [0] destptr mem))))
26400	for {
26401		if v.AuxInt != 32 {
26402			break
26403		}
26404		t := v.Aux
26405		mem := v.Args[1]
26406		destptr := v.Args[0]
26407		if !(t.(*types.Type).Alignment()%4 == 0) {
26408			break
26409		}
26410		v.reset(OpPPC64MOVDstorezero)
26411		v.AuxInt = 24
26412		v.AddArg(destptr)
26413		v0 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
26414		v0.AuxInt = 16
26415		v0.AddArg(destptr)
26416		v1 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
26417		v1.AuxInt = 8
26418		v1.AddArg(destptr)
26419		v2 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, types.TypeMem)
26420		v2.AuxInt = 0
26421		v2.AddArg(destptr)
26422		v2.AddArg(mem)
26423		v1.AddArg(v2)
26424		v0.AddArg(v1)
26425		v.AddArg(v0)
26426		return true
26427	}
26428	// match: (Zero [s] ptr mem)
26429	// result: (LoweredZero [s] ptr mem)
26430	for {
26431		s := v.AuxInt
26432		mem := v.Args[1]
26433		ptr := v.Args[0]
26434		v.reset(OpPPC64LoweredZero)
26435		v.AuxInt = s
26436		v.AddArg(ptr)
26437		v.AddArg(mem)
26438		return true
26439	}
26440}
26441func rewriteValuePPC64_OpZeroExt16to32_0(v *Value) bool {
26442	// match: (ZeroExt16to32 x)
26443	// result: (MOVHZreg x)
26444	for {
26445		x := v.Args[0]
26446		v.reset(OpPPC64MOVHZreg)
26447		v.AddArg(x)
26448		return true
26449	}
26450}
26451func rewriteValuePPC64_OpZeroExt16to64_0(v *Value) bool {
26452	// match: (ZeroExt16to64 x)
26453	// result: (MOVHZreg x)
26454	for {
26455		x := v.Args[0]
26456		v.reset(OpPPC64MOVHZreg)
26457		v.AddArg(x)
26458		return true
26459	}
26460}
26461func rewriteValuePPC64_OpZeroExt32to64_0(v *Value) bool {
26462	// match: (ZeroExt32to64 x)
26463	// result: (MOVWZreg x)
26464	for {
26465		x := v.Args[0]
26466		v.reset(OpPPC64MOVWZreg)
26467		v.AddArg(x)
26468		return true
26469	}
26470}
26471func rewriteValuePPC64_OpZeroExt8to16_0(v *Value) bool {
26472	// match: (ZeroExt8to16 x)
26473	// result: (MOVBZreg x)
26474	for {
26475		x := v.Args[0]
26476		v.reset(OpPPC64MOVBZreg)
26477		v.AddArg(x)
26478		return true
26479	}
26480}
26481func rewriteValuePPC64_OpZeroExt8to32_0(v *Value) bool {
26482	// match: (ZeroExt8to32 x)
26483	// result: (MOVBZreg x)
26484	for {
26485		x := v.Args[0]
26486		v.reset(OpPPC64MOVBZreg)
26487		v.AddArg(x)
26488		return true
26489	}
26490}
26491func rewriteValuePPC64_OpZeroExt8to64_0(v *Value) bool {
26492	// match: (ZeroExt8to64 x)
26493	// result: (MOVBZreg x)
26494	for {
26495		x := v.Args[0]
26496		v.reset(OpPPC64MOVBZreg)
26497		v.AddArg(x)
26498		return true
26499	}
26500}
26501func rewriteBlockPPC64(b *Block) bool {
26502	switch b.Kind {
26503	case BlockPPC64EQ:
26504		// match: (EQ (CMPconst [0] (ANDconst [c] x)) yes no)
26505		// result: (EQ (ANDCCconst [c] x) yes no)
26506		for b.Controls[0].Op == OpPPC64CMPconst {
26507			v_0 := b.Controls[0]
26508			if v_0.AuxInt != 0 {
26509				break
26510			}
26511			v_0_0 := v_0.Args[0]
26512			if v_0_0.Op != OpPPC64ANDconst {
26513				break
26514			}
26515			c := v_0_0.AuxInt
26516			x := v_0_0.Args[0]
26517			b.Reset(BlockPPC64EQ)
26518			v0 := b.NewValue0(v_0.Pos, OpPPC64ANDCCconst, types.TypeFlags)
26519			v0.AuxInt = c
26520			v0.AddArg(x)
26521			b.AddControl(v0)
26522			return true
26523		}
26524		// match: (EQ (CMPWconst [0] (ANDconst [c] x)) yes no)
26525		// result: (EQ (ANDCCconst [c] x) yes no)
26526		for b.Controls[0].Op == OpPPC64CMPWconst {
26527			v_0 := b.Controls[0]
26528			if v_0.AuxInt != 0 {
26529				break
26530			}
26531			v_0_0 := v_0.Args[0]
26532			if v_0_0.Op != OpPPC64ANDconst {
26533				break
26534			}
26535			c := v_0_0.AuxInt
26536			x := v_0_0.Args[0]
26537			b.Reset(BlockPPC64EQ)
26538			v0 := b.NewValue0(v_0.Pos, OpPPC64ANDCCconst, types.TypeFlags)
26539			v0.AuxInt = c
26540			v0.AddArg(x)
26541			b.AddControl(v0)
26542			return true
26543		}
26544		// match: (EQ (FlagEQ) yes no)
26545		// result: (First yes no)
26546		for b.Controls[0].Op == OpPPC64FlagEQ {
26547			b.Reset(BlockFirst)
26548			return true
26549		}
26550		// match: (EQ (FlagLT) yes no)
26551		// result: (First no yes)
26552		for b.Controls[0].Op == OpPPC64FlagLT {
26553			b.Reset(BlockFirst)
26554			b.swapSuccessors()
26555			return true
26556		}
26557		// match: (EQ (FlagGT) yes no)
26558		// result: (First no yes)
26559		for b.Controls[0].Op == OpPPC64FlagGT {
26560			b.Reset(BlockFirst)
26561			b.swapSuccessors()
26562			return true
26563		}
26564		// match: (EQ (InvertFlags cmp) yes no)
26565		// result: (EQ cmp yes no)
26566		for b.Controls[0].Op == OpPPC64InvertFlags {
26567			v_0 := b.Controls[0]
26568			cmp := v_0.Args[0]
26569			b.Reset(BlockPPC64EQ)
26570			b.AddControl(cmp)
26571			return true
26572		}
26573		// match: (EQ (CMPconst [0] (ANDconst [c] x)) yes no)
26574		// result: (EQ (ANDCCconst [c] x) yes no)
26575		for b.Controls[0].Op == OpPPC64CMPconst {
26576			v_0 := b.Controls[0]
26577			if v_0.AuxInt != 0 {
26578				break
26579			}
26580			v_0_0 := v_0.Args[0]
26581			if v_0_0.Op != OpPPC64ANDconst {
26582				break
26583			}
26584			c := v_0_0.AuxInt
26585			x := v_0_0.Args[0]
26586			b.Reset(BlockPPC64EQ)
26587			v0 := b.NewValue0(v_0.Pos, OpPPC64ANDCCconst, types.TypeFlags)
26588			v0.AuxInt = c
26589			v0.AddArg(x)
26590			b.AddControl(v0)
26591			return true
26592		}
26593		// match: (EQ (CMPWconst [0] (ANDconst [c] x)) yes no)
26594		// result: (EQ (ANDCCconst [c] x) yes no)
26595		for b.Controls[0].Op == OpPPC64CMPWconst {
26596			v_0 := b.Controls[0]
26597			if v_0.AuxInt != 0 {
26598				break
26599			}
26600			v_0_0 := v_0.Args[0]
26601			if v_0_0.Op != OpPPC64ANDconst {
26602				break
26603			}
26604			c := v_0_0.AuxInt
26605			x := v_0_0.Args[0]
26606			b.Reset(BlockPPC64EQ)
26607			v0 := b.NewValue0(v_0.Pos, OpPPC64ANDCCconst, types.TypeFlags)
26608			v0.AuxInt = c
26609			v0.AddArg(x)
26610			b.AddControl(v0)
26611			return true
26612		}
26613		// match: (EQ (CMPconst [0] z:(AND x y)) yes no)
26614		// cond: z.Uses == 1
26615		// result: (EQ (ANDCC x y) yes no)
26616		for b.Controls[0].Op == OpPPC64CMPconst {
26617			v_0 := b.Controls[0]
26618			if v_0.AuxInt != 0 {
26619				break
26620			}
26621			z := v_0.Args[0]
26622			if z.Op != OpPPC64AND {
26623				break
26624			}
26625			y := z.Args[1]
26626			x := z.Args[0]
26627			if !(z.Uses == 1) {
26628				break
26629			}
26630			b.Reset(BlockPPC64EQ)
26631			v0 := b.NewValue0(v_0.Pos, OpPPC64ANDCC, types.TypeFlags)
26632			v0.AddArg(x)
26633			v0.AddArg(y)
26634			b.AddControl(v0)
26635			return true
26636		}
26637		// match: (EQ (CMPconst [0] z:(OR x y)) yes no)
26638		// cond: z.Uses == 1
26639		// result: (EQ (ORCC x y) yes no)
26640		for b.Controls[0].Op == OpPPC64CMPconst {
26641			v_0 := b.Controls[0]
26642			if v_0.AuxInt != 0 {
26643				break
26644			}
26645			z := v_0.Args[0]
26646			if z.Op != OpPPC64OR {
26647				break
26648			}
26649			y := z.Args[1]
26650			x := z.Args[0]
26651			if !(z.Uses == 1) {
26652				break
26653			}
26654			b.Reset(BlockPPC64EQ)
26655			v0 := b.NewValue0(v_0.Pos, OpPPC64ORCC, types.TypeFlags)
26656			v0.AddArg(x)
26657			v0.AddArg(y)
26658			b.AddControl(v0)
26659			return true
26660		}
26661		// match: (EQ (CMPconst [0] z:(XOR x y)) yes no)
26662		// cond: z.Uses == 1
26663		// result: (EQ (XORCC x y) yes no)
26664		for b.Controls[0].Op == OpPPC64CMPconst {
26665			v_0 := b.Controls[0]
26666			if v_0.AuxInt != 0 {
26667				break
26668			}
26669			z := v_0.Args[0]
26670			if z.Op != OpPPC64XOR {
26671				break
26672			}
26673			y := z.Args[1]
26674			x := z.Args[0]
26675			if !(z.Uses == 1) {
26676				break
26677			}
26678			b.Reset(BlockPPC64EQ)
26679			v0 := b.NewValue0(v_0.Pos, OpPPC64XORCC, types.TypeFlags)
26680			v0.AddArg(x)
26681			v0.AddArg(y)
26682			b.AddControl(v0)
26683			return true
26684		}
26685	case BlockPPC64GE:
26686		// match: (GE (FlagEQ) yes no)
26687		// result: (First yes no)
26688		for b.Controls[0].Op == OpPPC64FlagEQ {
26689			b.Reset(BlockFirst)
26690			return true
26691		}
26692		// match: (GE (FlagLT) yes no)
26693		// result: (First no yes)
26694		for b.Controls[0].Op == OpPPC64FlagLT {
26695			b.Reset(BlockFirst)
26696			b.swapSuccessors()
26697			return true
26698		}
26699		// match: (GE (FlagGT) yes no)
26700		// result: (First yes no)
26701		for b.Controls[0].Op == OpPPC64FlagGT {
26702			b.Reset(BlockFirst)
26703			return true
26704		}
26705		// match: (GE (InvertFlags cmp) yes no)
26706		// result: (LE cmp yes no)
26707		for b.Controls[0].Op == OpPPC64InvertFlags {
26708			v_0 := b.Controls[0]
26709			cmp := v_0.Args[0]
26710			b.Reset(BlockPPC64LE)
26711			b.AddControl(cmp)
26712			return true
26713		}
26714		// match: (GE (CMPconst [0] (ANDconst [c] x)) yes no)
26715		// result: (GE (ANDCCconst [c] x) yes no)
26716		for b.Controls[0].Op == OpPPC64CMPconst {
26717			v_0 := b.Controls[0]
26718			if v_0.AuxInt != 0 {
26719				break
26720			}
26721			v_0_0 := v_0.Args[0]
26722			if v_0_0.Op != OpPPC64ANDconst {
26723				break
26724			}
26725			c := v_0_0.AuxInt
26726			x := v_0_0.Args[0]
26727			b.Reset(BlockPPC64GE)
26728			v0 := b.NewValue0(v_0.Pos, OpPPC64ANDCCconst, types.TypeFlags)
26729			v0.AuxInt = c
26730			v0.AddArg(x)
26731			b.AddControl(v0)
26732			return true
26733		}
26734		// match: (GE (CMPWconst [0] (ANDconst [c] x)) yes no)
26735		// result: (GE (ANDCCconst [c] x) yes no)
26736		for b.Controls[0].Op == OpPPC64CMPWconst {
26737			v_0 := b.Controls[0]
26738			if v_0.AuxInt != 0 {
26739				break
26740			}
26741			v_0_0 := v_0.Args[0]
26742			if v_0_0.Op != OpPPC64ANDconst {
26743				break
26744			}
26745			c := v_0_0.AuxInt
26746			x := v_0_0.Args[0]
26747			b.Reset(BlockPPC64GE)
26748			v0 := b.NewValue0(v_0.Pos, OpPPC64ANDCCconst, types.TypeFlags)
26749			v0.AuxInt = c
26750			v0.AddArg(x)
26751			b.AddControl(v0)
26752			return true
26753		}
26754		// match: (GE (CMPconst [0] z:(AND x y)) yes no)
26755		// cond: z.Uses == 1
26756		// result: (GE (ANDCC x y) yes no)
26757		for b.Controls[0].Op == OpPPC64CMPconst {
26758			v_0 := b.Controls[0]
26759			if v_0.AuxInt != 0 {
26760				break
26761			}
26762			z := v_0.Args[0]
26763			if z.Op != OpPPC64AND {
26764				break
26765			}
26766			y := z.Args[1]
26767			x := z.Args[0]
26768			if !(z.Uses == 1) {
26769				break
26770			}
26771			b.Reset(BlockPPC64GE)
26772			v0 := b.NewValue0(v_0.Pos, OpPPC64ANDCC, types.TypeFlags)
26773			v0.AddArg(x)
26774			v0.AddArg(y)
26775			b.AddControl(v0)
26776			return true
26777		}
26778		// match: (GE (CMPconst [0] z:(OR x y)) yes no)
26779		// cond: z.Uses == 1
26780		// result: (GE (ORCC x y) yes no)
26781		for b.Controls[0].Op == OpPPC64CMPconst {
26782			v_0 := b.Controls[0]
26783			if v_0.AuxInt != 0 {
26784				break
26785			}
26786			z := v_0.Args[0]
26787			if z.Op != OpPPC64OR {
26788				break
26789			}
26790			y := z.Args[1]
26791			x := z.Args[0]
26792			if !(z.Uses == 1) {
26793				break
26794			}
26795			b.Reset(BlockPPC64GE)
26796			v0 := b.NewValue0(v_0.Pos, OpPPC64ORCC, types.TypeFlags)
26797			v0.AddArg(x)
26798			v0.AddArg(y)
26799			b.AddControl(v0)
26800			return true
26801		}
26802		// match: (GE (CMPconst [0] z:(XOR x y)) yes no)
26803		// cond: z.Uses == 1
26804		// result: (GE (XORCC x y) yes no)
26805		for b.Controls[0].Op == OpPPC64CMPconst {
26806			v_0 := b.Controls[0]
26807			if v_0.AuxInt != 0 {
26808				break
26809			}
26810			z := v_0.Args[0]
26811			if z.Op != OpPPC64XOR {
26812				break
26813			}
26814			y := z.Args[1]
26815			x := z.Args[0]
26816			if !(z.Uses == 1) {
26817				break
26818			}
26819			b.Reset(BlockPPC64GE)
26820			v0 := b.NewValue0(v_0.Pos, OpPPC64XORCC, types.TypeFlags)
26821			v0.AddArg(x)
26822			v0.AddArg(y)
26823			b.AddControl(v0)
26824			return true
26825		}
26826	case BlockPPC64GT:
26827		// match: (GT (FlagEQ) yes no)
26828		// result: (First no yes)
26829		for b.Controls[0].Op == OpPPC64FlagEQ {
26830			b.Reset(BlockFirst)
26831			b.swapSuccessors()
26832			return true
26833		}
26834		// match: (GT (FlagLT) yes no)
26835		// result: (First no yes)
26836		for b.Controls[0].Op == OpPPC64FlagLT {
26837			b.Reset(BlockFirst)
26838			b.swapSuccessors()
26839			return true
26840		}
26841		// match: (GT (FlagGT) yes no)
26842		// result: (First yes no)
26843		for b.Controls[0].Op == OpPPC64FlagGT {
26844			b.Reset(BlockFirst)
26845			return true
26846		}
26847		// match: (GT (InvertFlags cmp) yes no)
26848		// result: (LT cmp yes no)
26849		for b.Controls[0].Op == OpPPC64InvertFlags {
26850			v_0 := b.Controls[0]
26851			cmp := v_0.Args[0]
26852			b.Reset(BlockPPC64LT)
26853			b.AddControl(cmp)
26854			return true
26855		}
26856		// match: (GT (CMPconst [0] (ANDconst [c] x)) yes no)
26857		// result: (GT (ANDCCconst [c] x) yes no)
26858		for b.Controls[0].Op == OpPPC64CMPconst {
26859			v_0 := b.Controls[0]
26860			if v_0.AuxInt != 0 {
26861				break
26862			}
26863			v_0_0 := v_0.Args[0]
26864			if v_0_0.Op != OpPPC64ANDconst {
26865				break
26866			}
26867			c := v_0_0.AuxInt
26868			x := v_0_0.Args[0]
26869			b.Reset(BlockPPC64GT)
26870			v0 := b.NewValue0(v_0.Pos, OpPPC64ANDCCconst, types.TypeFlags)
26871			v0.AuxInt = c
26872			v0.AddArg(x)
26873			b.AddControl(v0)
26874			return true
26875		}
26876		// match: (GT (CMPWconst [0] (ANDconst [c] x)) yes no)
26877		// result: (GT (ANDCCconst [c] x) yes no)
26878		for b.Controls[0].Op == OpPPC64CMPWconst {
26879			v_0 := b.Controls[0]
26880			if v_0.AuxInt != 0 {
26881				break
26882			}
26883			v_0_0 := v_0.Args[0]
26884			if v_0_0.Op != OpPPC64ANDconst {
26885				break
26886			}
26887			c := v_0_0.AuxInt
26888			x := v_0_0.Args[0]
26889			b.Reset(BlockPPC64GT)
26890			v0 := b.NewValue0(v_0.Pos, OpPPC64ANDCCconst, types.TypeFlags)
26891			v0.AuxInt = c
26892			v0.AddArg(x)
26893			b.AddControl(v0)
26894			return true
26895		}
26896		// match: (GT (CMPconst [0] z:(AND x y)) yes no)
26897		// cond: z.Uses == 1
26898		// result: (GT (ANDCC x y) yes no)
26899		for b.Controls[0].Op == OpPPC64CMPconst {
26900			v_0 := b.Controls[0]
26901			if v_0.AuxInt != 0 {
26902				break
26903			}
26904			z := v_0.Args[0]
26905			if z.Op != OpPPC64AND {
26906				break
26907			}
26908			y := z.Args[1]
26909			x := z.Args[0]
26910			if !(z.Uses == 1) {
26911				break
26912			}
26913			b.Reset(BlockPPC64GT)
26914			v0 := b.NewValue0(v_0.Pos, OpPPC64ANDCC, types.TypeFlags)
26915			v0.AddArg(x)
26916			v0.AddArg(y)
26917			b.AddControl(v0)
26918			return true
26919		}
26920		// match: (GT (CMPconst [0] z:(OR x y)) yes no)
26921		// cond: z.Uses == 1
26922		// result: (GT (ORCC x y) yes no)
26923		for b.Controls[0].Op == OpPPC64CMPconst {
26924			v_0 := b.Controls[0]
26925			if v_0.AuxInt != 0 {
26926				break
26927			}
26928			z := v_0.Args[0]
26929			if z.Op != OpPPC64OR {
26930				break
26931			}
26932			y := z.Args[1]
26933			x := z.Args[0]
26934			if !(z.Uses == 1) {
26935				break
26936			}
26937			b.Reset(BlockPPC64GT)
26938			v0 := b.NewValue0(v_0.Pos, OpPPC64ORCC, types.TypeFlags)
26939			v0.AddArg(x)
26940			v0.AddArg(y)
26941			b.AddControl(v0)
26942			return true
26943		}
26944		// match: (GT (CMPconst [0] z:(XOR x y)) yes no)
26945		// cond: z.Uses == 1
26946		// result: (GT (XORCC x y) yes no)
26947		for b.Controls[0].Op == OpPPC64CMPconst {
26948			v_0 := b.Controls[0]
26949			if v_0.AuxInt != 0 {
26950				break
26951			}
26952			z := v_0.Args[0]
26953			if z.Op != OpPPC64XOR {
26954				break
26955			}
26956			y := z.Args[1]
26957			x := z.Args[0]
26958			if !(z.Uses == 1) {
26959				break
26960			}
26961			b.Reset(BlockPPC64GT)
26962			v0 := b.NewValue0(v_0.Pos, OpPPC64XORCC, types.TypeFlags)
26963			v0.AddArg(x)
26964			v0.AddArg(y)
26965			b.AddControl(v0)
26966			return true
26967		}
26968	case BlockIf:
26969		// match: (If (Equal cc) yes no)
26970		// result: (EQ cc yes no)
26971		for b.Controls[0].Op == OpPPC64Equal {
26972			v_0 := b.Controls[0]
26973			cc := v_0.Args[0]
26974			b.Reset(BlockPPC64EQ)
26975			b.AddControl(cc)
26976			return true
26977		}
26978		// match: (If (NotEqual cc) yes no)
26979		// result: (NE cc yes no)
26980		for b.Controls[0].Op == OpPPC64NotEqual {
26981			v_0 := b.Controls[0]
26982			cc := v_0.Args[0]
26983			b.Reset(BlockPPC64NE)
26984			b.AddControl(cc)
26985			return true
26986		}
26987		// match: (If (LessThan cc) yes no)
26988		// result: (LT cc yes no)
26989		for b.Controls[0].Op == OpPPC64LessThan {
26990			v_0 := b.Controls[0]
26991			cc := v_0.Args[0]
26992			b.Reset(BlockPPC64LT)
26993			b.AddControl(cc)
26994			return true
26995		}
26996		// match: (If (LessEqual cc) yes no)
26997		// result: (LE cc yes no)
26998		for b.Controls[0].Op == OpPPC64LessEqual {
26999			v_0 := b.Controls[0]
27000			cc := v_0.Args[0]
27001			b.Reset(BlockPPC64LE)
27002			b.AddControl(cc)
27003			return true
27004		}
27005		// match: (If (GreaterThan cc) yes no)
27006		// result: (GT cc yes no)
27007		for b.Controls[0].Op == OpPPC64GreaterThan {
27008			v_0 := b.Controls[0]
27009			cc := v_0.Args[0]
27010			b.Reset(BlockPPC64GT)
27011			b.AddControl(cc)
27012			return true
27013		}
27014		// match: (If (GreaterEqual cc) yes no)
27015		// result: (GE cc yes no)
27016		for b.Controls[0].Op == OpPPC64GreaterEqual {
27017			v_0 := b.Controls[0]
27018			cc := v_0.Args[0]
27019			b.Reset(BlockPPC64GE)
27020			b.AddControl(cc)
27021			return true
27022		}
27023		// match: (If (FLessThan cc) yes no)
27024		// result: (FLT cc yes no)
27025		for b.Controls[0].Op == OpPPC64FLessThan {
27026			v_0 := b.Controls[0]
27027			cc := v_0.Args[0]
27028			b.Reset(BlockPPC64FLT)
27029			b.AddControl(cc)
27030			return true
27031		}
27032		// match: (If (FLessEqual cc) yes no)
27033		// result: (FLE cc yes no)
27034		for b.Controls[0].Op == OpPPC64FLessEqual {
27035			v_0 := b.Controls[0]
27036			cc := v_0.Args[0]
27037			b.Reset(BlockPPC64FLE)
27038			b.AddControl(cc)
27039			return true
27040		}
27041		// match: (If (FGreaterThan cc) yes no)
27042		// result: (FGT cc yes no)
27043		for b.Controls[0].Op == OpPPC64FGreaterThan {
27044			v_0 := b.Controls[0]
27045			cc := v_0.Args[0]
27046			b.Reset(BlockPPC64FGT)
27047			b.AddControl(cc)
27048			return true
27049		}
27050		// match: (If (FGreaterEqual cc) yes no)
27051		// result: (FGE cc yes no)
27052		for b.Controls[0].Op == OpPPC64FGreaterEqual {
27053			v_0 := b.Controls[0]
27054			cc := v_0.Args[0]
27055			b.Reset(BlockPPC64FGE)
27056			b.AddControl(cc)
27057			return true
27058		}
27059		// match: (If cond yes no)
27060		// result: (NE (CMPWconst [0] cond) yes no)
27061		for {
27062			cond := b.Controls[0]
27063			b.Reset(BlockPPC64NE)
27064			v0 := b.NewValue0(cond.Pos, OpPPC64CMPWconst, types.TypeFlags)
27065			v0.AuxInt = 0
27066			v0.AddArg(cond)
27067			b.AddControl(v0)
27068			return true
27069		}
27070	case BlockPPC64LE:
27071		// match: (LE (FlagEQ) yes no)
27072		// result: (First yes no)
27073		for b.Controls[0].Op == OpPPC64FlagEQ {
27074			b.Reset(BlockFirst)
27075			return true
27076		}
27077		// match: (LE (FlagLT) yes no)
27078		// result: (First yes no)
27079		for b.Controls[0].Op == OpPPC64FlagLT {
27080			b.Reset(BlockFirst)
27081			return true
27082		}
27083		// match: (LE (FlagGT) yes no)
27084		// result: (First no yes)
27085		for b.Controls[0].Op == OpPPC64FlagGT {
27086			b.Reset(BlockFirst)
27087			b.swapSuccessors()
27088			return true
27089		}
27090		// match: (LE (InvertFlags cmp) yes no)
27091		// result: (GE cmp yes no)
27092		for b.Controls[0].Op == OpPPC64InvertFlags {
27093			v_0 := b.Controls[0]
27094			cmp := v_0.Args[0]
27095			b.Reset(BlockPPC64GE)
27096			b.AddControl(cmp)
27097			return true
27098		}
27099		// match: (LE (CMPconst [0] (ANDconst [c] x)) yes no)
27100		// result: (LE (ANDCCconst [c] x) yes no)
27101		for b.Controls[0].Op == OpPPC64CMPconst {
27102			v_0 := b.Controls[0]
27103			if v_0.AuxInt != 0 {
27104				break
27105			}
27106			v_0_0 := v_0.Args[0]
27107			if v_0_0.Op != OpPPC64ANDconst {
27108				break
27109			}
27110			c := v_0_0.AuxInt
27111			x := v_0_0.Args[0]
27112			b.Reset(BlockPPC64LE)
27113			v0 := b.NewValue0(v_0.Pos, OpPPC64ANDCCconst, types.TypeFlags)
27114			v0.AuxInt = c
27115			v0.AddArg(x)
27116			b.AddControl(v0)
27117			return true
27118		}
27119		// match: (LE (CMPWconst [0] (ANDconst [c] x)) yes no)
27120		// result: (LE (ANDCCconst [c] x) yes no)
27121		for b.Controls[0].Op == OpPPC64CMPWconst {
27122			v_0 := b.Controls[0]
27123			if v_0.AuxInt != 0 {
27124				break
27125			}
27126			v_0_0 := v_0.Args[0]
27127			if v_0_0.Op != OpPPC64ANDconst {
27128				break
27129			}
27130			c := v_0_0.AuxInt
27131			x := v_0_0.Args[0]
27132			b.Reset(BlockPPC64LE)
27133			v0 := b.NewValue0(v_0.Pos, OpPPC64ANDCCconst, types.TypeFlags)
27134			v0.AuxInt = c
27135			v0.AddArg(x)
27136			b.AddControl(v0)
27137			return true
27138		}
27139		// match: (LE (CMPconst [0] z:(AND x y)) yes no)
27140		// cond: z.Uses == 1
27141		// result: (LE (ANDCC x y) yes no)
27142		for b.Controls[0].Op == OpPPC64CMPconst {
27143			v_0 := b.Controls[0]
27144			if v_0.AuxInt != 0 {
27145				break
27146			}
27147			z := v_0.Args[0]
27148			if z.Op != OpPPC64AND {
27149				break
27150			}
27151			y := z.Args[1]
27152			x := z.Args[0]
27153			if !(z.Uses == 1) {
27154				break
27155			}
27156			b.Reset(BlockPPC64LE)
27157			v0 := b.NewValue0(v_0.Pos, OpPPC64ANDCC, types.TypeFlags)
27158			v0.AddArg(x)
27159			v0.AddArg(y)
27160			b.AddControl(v0)
27161			return true
27162		}
27163		// match: (LE (CMPconst [0] z:(OR x y)) yes no)
27164		// cond: z.Uses == 1
27165		// result: (LE (ORCC x y) yes no)
27166		for b.Controls[0].Op == OpPPC64CMPconst {
27167			v_0 := b.Controls[0]
27168			if v_0.AuxInt != 0 {
27169				break
27170			}
27171			z := v_0.Args[0]
27172			if z.Op != OpPPC64OR {
27173				break
27174			}
27175			y := z.Args[1]
27176			x := z.Args[0]
27177			if !(z.Uses == 1) {
27178				break
27179			}
27180			b.Reset(BlockPPC64LE)
27181			v0 := b.NewValue0(v_0.Pos, OpPPC64ORCC, types.TypeFlags)
27182			v0.AddArg(x)
27183			v0.AddArg(y)
27184			b.AddControl(v0)
27185			return true
27186		}
27187		// match: (LE (CMPconst [0] z:(XOR x y)) yes no)
27188		// cond: z.Uses == 1
27189		// result: (LE (XORCC x y) yes no)
27190		for b.Controls[0].Op == OpPPC64CMPconst {
27191			v_0 := b.Controls[0]
27192			if v_0.AuxInt != 0 {
27193				break
27194			}
27195			z := v_0.Args[0]
27196			if z.Op != OpPPC64XOR {
27197				break
27198			}
27199			y := z.Args[1]
27200			x := z.Args[0]
27201			if !(z.Uses == 1) {
27202				break
27203			}
27204			b.Reset(BlockPPC64LE)
27205			v0 := b.NewValue0(v_0.Pos, OpPPC64XORCC, types.TypeFlags)
27206			v0.AddArg(x)
27207			v0.AddArg(y)
27208			b.AddControl(v0)
27209			return true
27210		}
27211	case BlockPPC64LT:
27212		// match: (LT (FlagEQ) yes no)
27213		// result: (First no yes)
27214		for b.Controls[0].Op == OpPPC64FlagEQ {
27215			b.Reset(BlockFirst)
27216			b.swapSuccessors()
27217			return true
27218		}
27219		// match: (LT (FlagLT) yes no)
27220		// result: (First yes no)
27221		for b.Controls[0].Op == OpPPC64FlagLT {
27222			b.Reset(BlockFirst)
27223			return true
27224		}
27225		// match: (LT (FlagGT) yes no)
27226		// result: (First no yes)
27227		for b.Controls[0].Op == OpPPC64FlagGT {
27228			b.Reset(BlockFirst)
27229			b.swapSuccessors()
27230			return true
27231		}
27232		// match: (LT (InvertFlags cmp) yes no)
27233		// result: (GT cmp yes no)
27234		for b.Controls[0].Op == OpPPC64InvertFlags {
27235			v_0 := b.Controls[0]
27236			cmp := v_0.Args[0]
27237			b.Reset(BlockPPC64GT)
27238			b.AddControl(cmp)
27239			return true
27240		}
27241		// match: (LT (CMPconst [0] (ANDconst [c] x)) yes no)
27242		// result: (LT (ANDCCconst [c] x) yes no)
27243		for b.Controls[0].Op == OpPPC64CMPconst {
27244			v_0 := b.Controls[0]
27245			if v_0.AuxInt != 0 {
27246				break
27247			}
27248			v_0_0 := v_0.Args[0]
27249			if v_0_0.Op != OpPPC64ANDconst {
27250				break
27251			}
27252			c := v_0_0.AuxInt
27253			x := v_0_0.Args[0]
27254			b.Reset(BlockPPC64LT)
27255			v0 := b.NewValue0(v_0.Pos, OpPPC64ANDCCconst, types.TypeFlags)
27256			v0.AuxInt = c
27257			v0.AddArg(x)
27258			b.AddControl(v0)
27259			return true
27260		}
27261		// match: (LT (CMPWconst [0] (ANDconst [c] x)) yes no)
27262		// result: (LT (ANDCCconst [c] x) yes no)
27263		for b.Controls[0].Op == OpPPC64CMPWconst {
27264			v_0 := b.Controls[0]
27265			if v_0.AuxInt != 0 {
27266				break
27267			}
27268			v_0_0 := v_0.Args[0]
27269			if v_0_0.Op != OpPPC64ANDconst {
27270				break
27271			}
27272			c := v_0_0.AuxInt
27273			x := v_0_0.Args[0]
27274			b.Reset(BlockPPC64LT)
27275			v0 := b.NewValue0(v_0.Pos, OpPPC64ANDCCconst, types.TypeFlags)
27276			v0.AuxInt = c
27277			v0.AddArg(x)
27278			b.AddControl(v0)
27279			return true
27280		}
27281		// match: (LT (CMPconst [0] z:(AND x y)) yes no)
27282		// cond: z.Uses == 1
27283		// result: (LT (ANDCC x y) yes no)
27284		for b.Controls[0].Op == OpPPC64CMPconst {
27285			v_0 := b.Controls[0]
27286			if v_0.AuxInt != 0 {
27287				break
27288			}
27289			z := v_0.Args[0]
27290			if z.Op != OpPPC64AND {
27291				break
27292			}
27293			y := z.Args[1]
27294			x := z.Args[0]
27295			if !(z.Uses == 1) {
27296				break
27297			}
27298			b.Reset(BlockPPC64LT)
27299			v0 := b.NewValue0(v_0.Pos, OpPPC64ANDCC, types.TypeFlags)
27300			v0.AddArg(x)
27301			v0.AddArg(y)
27302			b.AddControl(v0)
27303			return true
27304		}
27305		// match: (LT (CMPconst [0] z:(OR x y)) yes no)
27306		// cond: z.Uses == 1
27307		// result: (LT (ORCC x y) yes no)
27308		for b.Controls[0].Op == OpPPC64CMPconst {
27309			v_0 := b.Controls[0]
27310			if v_0.AuxInt != 0 {
27311				break
27312			}
27313			z := v_0.Args[0]
27314			if z.Op != OpPPC64OR {
27315				break
27316			}
27317			y := z.Args[1]
27318			x := z.Args[0]
27319			if !(z.Uses == 1) {
27320				break
27321			}
27322			b.Reset(BlockPPC64LT)
27323			v0 := b.NewValue0(v_0.Pos, OpPPC64ORCC, types.TypeFlags)
27324			v0.AddArg(x)
27325			v0.AddArg(y)
27326			b.AddControl(v0)
27327			return true
27328		}
27329		// match: (LT (CMPconst [0] z:(XOR x y)) yes no)
27330		// cond: z.Uses == 1
27331		// result: (LT (XORCC x y) yes no)
27332		for b.Controls[0].Op == OpPPC64CMPconst {
27333			v_0 := b.Controls[0]
27334			if v_0.AuxInt != 0 {
27335				break
27336			}
27337			z := v_0.Args[0]
27338			if z.Op != OpPPC64XOR {
27339				break
27340			}
27341			y := z.Args[1]
27342			x := z.Args[0]
27343			if !(z.Uses == 1) {
27344				break
27345			}
27346			b.Reset(BlockPPC64LT)
27347			v0 := b.NewValue0(v_0.Pos, OpPPC64XORCC, types.TypeFlags)
27348			v0.AddArg(x)
27349			v0.AddArg(y)
27350			b.AddControl(v0)
27351			return true
27352		}
27353	case BlockPPC64NE:
27354		// match: (NE (CMPWconst [0] (Equal cc)) yes no)
27355		// result: (EQ cc yes no)
27356		for b.Controls[0].Op == OpPPC64CMPWconst {
27357			v_0 := b.Controls[0]
27358			if v_0.AuxInt != 0 {
27359				break
27360			}
27361			v_0_0 := v_0.Args[0]
27362			if v_0_0.Op != OpPPC64Equal {
27363				break
27364			}
27365			cc := v_0_0.Args[0]
27366			b.Reset(BlockPPC64EQ)
27367			b.AddControl(cc)
27368			return true
27369		}
27370		// match: (NE (CMPWconst [0] (NotEqual cc)) yes no)
27371		// result: (NE cc yes no)
27372		for b.Controls[0].Op == OpPPC64CMPWconst {
27373			v_0 := b.Controls[0]
27374			if v_0.AuxInt != 0 {
27375				break
27376			}
27377			v_0_0 := v_0.Args[0]
27378			if v_0_0.Op != OpPPC64NotEqual {
27379				break
27380			}
27381			cc := v_0_0.Args[0]
27382			b.Reset(BlockPPC64NE)
27383			b.AddControl(cc)
27384			return true
27385		}
27386		// match: (NE (CMPWconst [0] (LessThan cc)) yes no)
27387		// result: (LT cc yes no)
27388		for b.Controls[0].Op == OpPPC64CMPWconst {
27389			v_0 := b.Controls[0]
27390			if v_0.AuxInt != 0 {
27391				break
27392			}
27393			v_0_0 := v_0.Args[0]
27394			if v_0_0.Op != OpPPC64LessThan {
27395				break
27396			}
27397			cc := v_0_0.Args[0]
27398			b.Reset(BlockPPC64LT)
27399			b.AddControl(cc)
27400			return true
27401		}
27402		// match: (NE (CMPWconst [0] (LessEqual cc)) yes no)
27403		// result: (LE cc yes no)
27404		for b.Controls[0].Op == OpPPC64CMPWconst {
27405			v_0 := b.Controls[0]
27406			if v_0.AuxInt != 0 {
27407				break
27408			}
27409			v_0_0 := v_0.Args[0]
27410			if v_0_0.Op != OpPPC64LessEqual {
27411				break
27412			}
27413			cc := v_0_0.Args[0]
27414			b.Reset(BlockPPC64LE)
27415			b.AddControl(cc)
27416			return true
27417		}
27418		// match: (NE (CMPWconst [0] (GreaterThan cc)) yes no)
27419		// result: (GT cc yes no)
27420		for b.Controls[0].Op == OpPPC64CMPWconst {
27421			v_0 := b.Controls[0]
27422			if v_0.AuxInt != 0 {
27423				break
27424			}
27425			v_0_0 := v_0.Args[0]
27426			if v_0_0.Op != OpPPC64GreaterThan {
27427				break
27428			}
27429			cc := v_0_0.Args[0]
27430			b.Reset(BlockPPC64GT)
27431			b.AddControl(cc)
27432			return true
27433		}
27434		// match: (NE (CMPWconst [0] (GreaterEqual cc)) yes no)
27435		// result: (GE cc yes no)
27436		for b.Controls[0].Op == OpPPC64CMPWconst {
27437			v_0 := b.Controls[0]
27438			if v_0.AuxInt != 0 {
27439				break
27440			}
27441			v_0_0 := v_0.Args[0]
27442			if v_0_0.Op != OpPPC64GreaterEqual {
27443				break
27444			}
27445			cc := v_0_0.Args[0]
27446			b.Reset(BlockPPC64GE)
27447			b.AddControl(cc)
27448			return true
27449		}
27450		// match: (NE (CMPWconst [0] (FLessThan cc)) yes no)
27451		// result: (FLT cc yes no)
27452		for b.Controls[0].Op == OpPPC64CMPWconst {
27453			v_0 := b.Controls[0]
27454			if v_0.AuxInt != 0 {
27455				break
27456			}
27457			v_0_0 := v_0.Args[0]
27458			if v_0_0.Op != OpPPC64FLessThan {
27459				break
27460			}
27461			cc := v_0_0.Args[0]
27462			b.Reset(BlockPPC64FLT)
27463			b.AddControl(cc)
27464			return true
27465		}
27466		// match: (NE (CMPWconst [0] (FLessEqual cc)) yes no)
27467		// result: (FLE cc yes no)
27468		for b.Controls[0].Op == OpPPC64CMPWconst {
27469			v_0 := b.Controls[0]
27470			if v_0.AuxInt != 0 {
27471				break
27472			}
27473			v_0_0 := v_0.Args[0]
27474			if v_0_0.Op != OpPPC64FLessEqual {
27475				break
27476			}
27477			cc := v_0_0.Args[0]
27478			b.Reset(BlockPPC64FLE)
27479			b.AddControl(cc)
27480			return true
27481		}
27482		// match: (NE (CMPWconst [0] (FGreaterThan cc)) yes no)
27483		// result: (FGT cc yes no)
27484		for b.Controls[0].Op == OpPPC64CMPWconst {
27485			v_0 := b.Controls[0]
27486			if v_0.AuxInt != 0 {
27487				break
27488			}
27489			v_0_0 := v_0.Args[0]
27490			if v_0_0.Op != OpPPC64FGreaterThan {
27491				break
27492			}
27493			cc := v_0_0.Args[0]
27494			b.Reset(BlockPPC64FGT)
27495			b.AddControl(cc)
27496			return true
27497		}
27498		// match: (NE (CMPWconst [0] (FGreaterEqual cc)) yes no)
27499		// result: (FGE cc yes no)
27500		for b.Controls[0].Op == OpPPC64CMPWconst {
27501			v_0 := b.Controls[0]
27502			if v_0.AuxInt != 0 {
27503				break
27504			}
27505			v_0_0 := v_0.Args[0]
27506			if v_0_0.Op != OpPPC64FGreaterEqual {
27507				break
27508			}
27509			cc := v_0_0.Args[0]
27510			b.Reset(BlockPPC64FGE)
27511			b.AddControl(cc)
27512			return true
27513		}
27514		// match: (NE (CMPconst [0] (ANDconst [c] x)) yes no)
27515		// result: (NE (ANDCCconst [c] x) yes no)
27516		for b.Controls[0].Op == OpPPC64CMPconst {
27517			v_0 := b.Controls[0]
27518			if v_0.AuxInt != 0 {
27519				break
27520			}
27521			v_0_0 := v_0.Args[0]
27522			if v_0_0.Op != OpPPC64ANDconst {
27523				break
27524			}
27525			c := v_0_0.AuxInt
27526			x := v_0_0.Args[0]
27527			b.Reset(BlockPPC64NE)
27528			v0 := b.NewValue0(v_0.Pos, OpPPC64ANDCCconst, types.TypeFlags)
27529			v0.AuxInt = c
27530			v0.AddArg(x)
27531			b.AddControl(v0)
27532			return true
27533		}
27534		// match: (NE (CMPWconst [0] (ANDconst [c] x)) yes no)
27535		// result: (NE (ANDCCconst [c] x) yes no)
27536		for b.Controls[0].Op == OpPPC64CMPWconst {
27537			v_0 := b.Controls[0]
27538			if v_0.AuxInt != 0 {
27539				break
27540			}
27541			v_0_0 := v_0.Args[0]
27542			if v_0_0.Op != OpPPC64ANDconst {
27543				break
27544			}
27545			c := v_0_0.AuxInt
27546			x := v_0_0.Args[0]
27547			b.Reset(BlockPPC64NE)
27548			v0 := b.NewValue0(v_0.Pos, OpPPC64ANDCCconst, types.TypeFlags)
27549			v0.AuxInt = c
27550			v0.AddArg(x)
27551			b.AddControl(v0)
27552			return true
27553		}
27554		// match: (NE (FlagEQ) yes no)
27555		// result: (First no yes)
27556		for b.Controls[0].Op == OpPPC64FlagEQ {
27557			b.Reset(BlockFirst)
27558			b.swapSuccessors()
27559			return true
27560		}
27561		// match: (NE (FlagLT) yes no)
27562		// result: (First yes no)
27563		for b.Controls[0].Op == OpPPC64FlagLT {
27564			b.Reset(BlockFirst)
27565			return true
27566		}
27567		// match: (NE (FlagGT) yes no)
27568		// result: (First yes no)
27569		for b.Controls[0].Op == OpPPC64FlagGT {
27570			b.Reset(BlockFirst)
27571			return true
27572		}
27573		// match: (NE (InvertFlags cmp) yes no)
27574		// result: (NE cmp yes no)
27575		for b.Controls[0].Op == OpPPC64InvertFlags {
27576			v_0 := b.Controls[0]
27577			cmp := v_0.Args[0]
27578			b.Reset(BlockPPC64NE)
27579			b.AddControl(cmp)
27580			return true
27581		}
27582		// match: (NE (CMPconst [0] (ANDconst [c] x)) yes no)
27583		// result: (NE (ANDCCconst [c] x) yes no)
27584		for b.Controls[0].Op == OpPPC64CMPconst {
27585			v_0 := b.Controls[0]
27586			if v_0.AuxInt != 0 {
27587				break
27588			}
27589			v_0_0 := v_0.Args[0]
27590			if v_0_0.Op != OpPPC64ANDconst {
27591				break
27592			}
27593			c := v_0_0.AuxInt
27594			x := v_0_0.Args[0]
27595			b.Reset(BlockPPC64NE)
27596			v0 := b.NewValue0(v_0.Pos, OpPPC64ANDCCconst, types.TypeFlags)
27597			v0.AuxInt = c
27598			v0.AddArg(x)
27599			b.AddControl(v0)
27600			return true
27601		}
27602		// match: (NE (CMPWconst [0] (ANDconst [c] x)) yes no)
27603		// result: (NE (ANDCCconst [c] x) yes no)
27604		for b.Controls[0].Op == OpPPC64CMPWconst {
27605			v_0 := b.Controls[0]
27606			if v_0.AuxInt != 0 {
27607				break
27608			}
27609			v_0_0 := v_0.Args[0]
27610			if v_0_0.Op != OpPPC64ANDconst {
27611				break
27612			}
27613			c := v_0_0.AuxInt
27614			x := v_0_0.Args[0]
27615			b.Reset(BlockPPC64NE)
27616			v0 := b.NewValue0(v_0.Pos, OpPPC64ANDCCconst, types.TypeFlags)
27617			v0.AuxInt = c
27618			v0.AddArg(x)
27619			b.AddControl(v0)
27620			return true
27621		}
27622		// match: (NE (CMPconst [0] z:(AND x y)) yes no)
27623		// cond: z.Uses == 1
27624		// result: (NE (ANDCC x y) yes no)
27625		for b.Controls[0].Op == OpPPC64CMPconst {
27626			v_0 := b.Controls[0]
27627			if v_0.AuxInt != 0 {
27628				break
27629			}
27630			z := v_0.Args[0]
27631			if z.Op != OpPPC64AND {
27632				break
27633			}
27634			y := z.Args[1]
27635			x := z.Args[0]
27636			if !(z.Uses == 1) {
27637				break
27638			}
27639			b.Reset(BlockPPC64NE)
27640			v0 := b.NewValue0(v_0.Pos, OpPPC64ANDCC, types.TypeFlags)
27641			v0.AddArg(x)
27642			v0.AddArg(y)
27643			b.AddControl(v0)
27644			return true
27645		}
27646		// match: (NE (CMPconst [0] z:(OR x y)) yes no)
27647		// cond: z.Uses == 1
27648		// result: (NE (ORCC x y) yes no)
27649		for b.Controls[0].Op == OpPPC64CMPconst {
27650			v_0 := b.Controls[0]
27651			if v_0.AuxInt != 0 {
27652				break
27653			}
27654			z := v_0.Args[0]
27655			if z.Op != OpPPC64OR {
27656				break
27657			}
27658			y := z.Args[1]
27659			x := z.Args[0]
27660			if !(z.Uses == 1) {
27661				break
27662			}
27663			b.Reset(BlockPPC64NE)
27664			v0 := b.NewValue0(v_0.Pos, OpPPC64ORCC, types.TypeFlags)
27665			v0.AddArg(x)
27666			v0.AddArg(y)
27667			b.AddControl(v0)
27668			return true
27669		}
27670		// match: (NE (CMPconst [0] z:(XOR x y)) yes no)
27671		// cond: z.Uses == 1
27672		// result: (NE (XORCC x y) yes no)
27673		for b.Controls[0].Op == OpPPC64CMPconst {
27674			v_0 := b.Controls[0]
27675			if v_0.AuxInt != 0 {
27676				break
27677			}
27678			z := v_0.Args[0]
27679			if z.Op != OpPPC64XOR {
27680				break
27681			}
27682			y := z.Args[1]
27683			x := z.Args[0]
27684			if !(z.Uses == 1) {
27685				break
27686			}
27687			b.Reset(BlockPPC64NE)
27688			v0 := b.NewValue0(v_0.Pos, OpPPC64XORCC, types.TypeFlags)
27689			v0.AddArg(x)
27690			v0.AddArg(y)
27691			b.AddControl(v0)
27692			return true
27693		}
27694	}
27695	return false
27696}
27697