1 // This board is confirmed to operate using stlink and openocd.
2 // REPL is on UART(1) and is available through the stlink USB-UART device.
3 // To use openocd run "OPENOCD_CONFIG=boards/openocd_stm32f7.cfg" in
4 // the make command.
5 #define MICROPY_HW_BOARD_NAME       "F769DISC"
6 #define MICROPY_HW_MCU_NAME         "STM32F769"
7 
8 #define MICROPY_HW_HAS_SWITCH       (1)
9 #define MICROPY_HW_HAS_FLASH        (1)
10 #define MICROPY_HW_ENABLE_RNG       (1)
11 #define MICROPY_HW_ENABLE_RTC       (1)
12 #define MICROPY_HW_ENABLE_USB       (1)
13 #define MICROPY_HW_ENABLE_SDCARD    (1)
14 
15 #define MICROPY_BOARD_EARLY_INIT    board_early_init
16 void board_early_init(void);
17 
18 // HSE is 25MHz
19 // VCOClock = HSE * PLLN / PLLM = 25 MHz * 432 / 25 = 432 MHz
20 // SYSCLK = VCOClock / PLLP = 432 MHz / 2 = 216 MHz
21 // USB/SDMMC/RNG Clock = VCOClock / PLLQ = 432 MHz / 9 = 48 MHz
22 #define MICROPY_HW_CLK_PLLM (25)
23 #define MICROPY_HW_CLK_PLLN (432)
24 #define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2)
25 #define MICROPY_HW_CLK_PLLQ (9)
26 
27 #define MICROPY_HW_FLASH_LATENCY    FLASH_LATENCY_7 // 210-216 MHz needs 7 wait states
28 
29 // 512MBit external QSPI flash, used for either the filesystem or XIP memory mapped
30 #define MICROPY_HW_QSPIFLASH_SIZE_BITS_LOG2 (29)
31 #define MICROPY_HW_QSPIFLASH_CS     (pin_B6)
32 #define MICROPY_HW_QSPIFLASH_SCK    (pin_B2)
33 #define MICROPY_HW_QSPIFLASH_IO0    (pin_C9)
34 #define MICROPY_HW_QSPIFLASH_IO1    (pin_C10)
35 #define MICROPY_HW_QSPIFLASH_IO2    (pin_E2)
36 #define MICROPY_HW_QSPIFLASH_IO3    (pin_D13)
37 
38 // SPI flash, block device config (when used as the filesystem)
39 extern const struct _mp_spiflash_config_t spiflash_config;
40 extern struct _spi_bdev_t spi_bdev;
41 #if !USE_QSPI_XIP
42 #define MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE (0)
43 #define MICROPY_HW_SPIFLASH_ENABLE_CACHE (1)
44 #define MICROPY_HW_BDEV_IOCTL(op, arg) ( \
45     (op) == BDEV_IOCTL_NUM_BLOCKS ? ((1 << MICROPY_HW_QSPIFLASH_SIZE_BITS_LOG2) / 8 / FLASH_BLOCK_SIZE) : \
46     (op) == BDEV_IOCTL_INIT ? spi_bdev_ioctl(&spi_bdev, (op), (uint32_t)&spiflash_config) : \
47     spi_bdev_ioctl(&spi_bdev, (op), (arg)) \
48 )
49 #define MICROPY_HW_BDEV_READBLOCKS(dest, bl, n) spi_bdev_readblocks(&spi_bdev, (dest), (bl), (n))
50 #define MICROPY_HW_BDEV_WRITEBLOCKS(src, bl, n) spi_bdev_writeblocks(&spi_bdev, (src), (bl), (n))
51 #define MICROPY_HW_BDEV_SPIFLASH_EXTENDED (&spi_bdev) // for extended block protocol
52 #endif
53 
54 // UART config
55 #define MICROPY_HW_UART1_TX         (pin_A9)
56 #define MICROPY_HW_UART1_RX         (pin_A10)
57 #define MICROPY_HW_UART5_TX         (pin_C12)
58 #define MICROPY_HW_UART5_RX         (pin_D2)
59 #define MICROPY_HW_UART_REPL        PYB_UART_1
60 #define MICROPY_HW_UART_REPL_BAUD   115200
61 
62 // I2C buses
63 #define MICROPY_HW_I2C1_SCL         (pin_B8)
64 #define MICROPY_HW_I2C1_SDA         (pin_B9)
65 #define MICROPY_HW_I2C3_SCL         (pin_H7)
66 #define MICROPY_HW_I2C3_SDA         (pin_H8)
67 
68 // SPI buses
69 #define MICROPY_HW_SPI2_NSS         (pin_A11)
70 #define MICROPY_HW_SPI2_SCK         (pin_A12)
71 #define MICROPY_HW_SPI2_MISO        (pin_B14)
72 #define MICROPY_HW_SPI2_MOSI        (pin_B15)
73 
74 // CAN buses
75 #define MICROPY_HW_CAN1_TX          (pin_B9)
76 #define MICROPY_HW_CAN1_RX          (pin_B8)
77 #define MICROPY_HW_CAN2_TX          (pin_B13)
78 #define MICROPY_HW_CAN2_RX          (pin_B12)
79 
80 // USRSW is pulled low. Pressing the button makes the input go high.
81 #define MICROPY_HW_USRSW_PIN        (pin_A0)
82 #define MICROPY_HW_USRSW_PULL       (GPIO_NOPULL)
83 #define MICROPY_HW_USRSW_EXTI_MODE  (GPIO_MODE_IT_RISING)
84 #define MICROPY_HW_USRSW_PRESSED    (1)
85 
86 // LEDs
87 #define MICROPY_HW_LED1             (pin_J13) // red
88 #define MICROPY_HW_LED2             (pin_J5) // green
89 #define MICROPY_HW_LED3             (pin_A12) // green
90 #define MICROPY_HW_LED_ON(pin)      (mp_hal_pin_high(pin))
91 #define MICROPY_HW_LED_OFF(pin)     (mp_hal_pin_low(pin))
92 
93 // SD card
94 #define MICROPY_HW_SDCARD_SDMMC             (2)
95 #define MICROPY_HW_SDCARD_CK                (pin_D6)
96 #define MICROPY_HW_SDCARD_CMD               (pin_D7)
97 #define MICROPY_HW_SDCARD_D0                (pin_G9)
98 #define MICROPY_HW_SDCARD_D1                (pin_G10)
99 #define MICROPY_HW_SDCARD_D2                (pin_B3)
100 #define MICROPY_HW_SDCARD_D3                (pin_B4)
101 #define MICROPY_HW_SDCARD_DETECT_PIN        (pin_I15)
102 #define MICROPY_HW_SDCARD_DETECT_PULL       (GPIO_PULLUP)
103 #define MICROPY_HW_SDCARD_DETECT_PRESENT    (GPIO_PIN_RESET)
104 
105 // USB config (CN15 - USB OTG HS with external PHY)
106 #define MICROPY_HW_USB_HS (1)
107 #define MICROPY_HW_USB_HS_ULPI_NXT  (pin_H4)
108 #define MICROPY_HW_USB_HS_ULPI_DIR  (pin_I11)
109 
110 // Ethernet via RMII
111 #define MICROPY_HW_ETH_MDC          (pin_C1)
112 #define MICROPY_HW_ETH_MDIO         (pin_A2)
113 #define MICROPY_HW_ETH_RMII_REF_CLK (pin_A1)
114 #define MICROPY_HW_ETH_RMII_CRS_DV  (pin_A7)
115 #define MICROPY_HW_ETH_RMII_RXD0    (pin_C4)
116 #define MICROPY_HW_ETH_RMII_RXD1    (pin_C5)
117 #define MICROPY_HW_ETH_RMII_TX_EN   (pin_G11)
118 #define MICROPY_HW_ETH_RMII_TXD0    (pin_G13)
119 #define MICROPY_HW_ETH_RMII_TXD1    (pin_G14)
120 
121 #if 0
122 // Optional SDRAM configuration.
123 
124 // Note: This requires SYSCLK <= 200MHz. 192MHz example below:
125 // #define MICROPY_HW_CLK_PLLM (25)
126 // #define MICROPY_HW_CLK_PLLN (384)
127 // #define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2)
128 // #define MICROPY_HW_CLK_PLLQ (8)
129 
130 #define MICROPY_HW_SDRAM_SIZE (128 * 1024 * 1024 / 8) // 128 Mbit
131 #define MICROPY_HW_SDRAM_STARTUP_TEST (0)
132 #define MICROPY_HEAP_START sdram_start()
133 #define MICROPY_HEAP_END sdram_end()
134 
135 // Timing configuration for 90 Mhz (11.90ns) of SD clock frequency (180Mhz/2)
136 #define MICROPY_HW_SDRAM_TIMING_TMRD        (2)
137 #define MICROPY_HW_SDRAM_TIMING_TXSR        (7)
138 #define MICROPY_HW_SDRAM_TIMING_TRAS        (4)
139 #define MICROPY_HW_SDRAM_TIMING_TRC         (7)
140 #define MICROPY_HW_SDRAM_TIMING_TWR         (2)
141 #define MICROPY_HW_SDRAM_TIMING_TRP         (2)
142 #define MICROPY_HW_SDRAM_TIMING_TRCD        (2)
143 #define MICROPY_HW_SDRAM_REFRESH_RATE       (64) // ms
144 
145 #define MICROPY_HW_SDRAM_BURST_LENGTH       1
146 #define MICROPY_HW_SDRAM_CAS_LATENCY        2
147 #define MICROPY_HW_SDRAM_COLUMN_BITS_NUM    8
148 #define MICROPY_HW_SDRAM_ROW_BITS_NUM       12
149 #define MICROPY_HW_SDRAM_MEM_BUS_WIDTH      32
150 #define MICROPY_HW_SDRAM_INTERN_BANKS_NUM   4
151 #define MICROPY_HW_SDRAM_CLOCK_PERIOD       2
152 #define MICROPY_HW_SDRAM_RPIPE_DELAY        0
153 #define MICROPY_HW_SDRAM_RBURST             (1)
154 #define MICROPY_HW_SDRAM_WRITE_PROTECTION   (0)
155 #define MICROPY_HW_SDRAM_AUTOREFRESH_NUM    (8)
156 
157 // See pins.csv for CPU pin mapping
158 #define MICROPY_HW_FMC_SDCKE0  (pyb_pin_FMC_SDCKE0)
159 #define MICROPY_HW_FMC_SDNE0   (pyb_pin_FMC_SDNE0)
160 #define MICROPY_HW_FMC_SDCLK   (pyb_pin_FMC_SDCLK)
161 #define MICROPY_HW_FMC_SDNCAS  (pyb_pin_FMC_SDNCAS)
162 #define MICROPY_HW_FMC_SDNRAS  (pyb_pin_FMC_SDNRAS)
163 #define MICROPY_HW_FMC_SDNWE   (pyb_pin_FMC_SDNWE)
164 #define MICROPY_HW_FMC_BA0     (pyb_pin_FMC_BA0)
165 #define MICROPY_HW_FMC_BA1     (pyb_pin_FMC_BA1)
166 #define MICROPY_HW_FMC_NBL0    (pyb_pin_FMC_NBL0)
167 #define MICROPY_HW_FMC_NBL1    (pyb_pin_FMC_NBL1)
168 #define MICROPY_HW_FMC_NBL2    (pyb_pin_FMC_NBL2)
169 #define MICROPY_HW_FMC_NBL3    (pyb_pin_FMC_NBL3)
170 #define MICROPY_HW_FMC_A0      (pyb_pin_FMC_A0)
171 #define MICROPY_HW_FMC_A1      (pyb_pin_FMC_A1)
172 #define MICROPY_HW_FMC_A2      (pyb_pin_FMC_A2)
173 #define MICROPY_HW_FMC_A3      (pyb_pin_FMC_A3)
174 #define MICROPY_HW_FMC_A4      (pyb_pin_FMC_A4)
175 #define MICROPY_HW_FMC_A5      (pyb_pin_FMC_A5)
176 #define MICROPY_HW_FMC_A6      (pyb_pin_FMC_A6)
177 #define MICROPY_HW_FMC_A7      (pyb_pin_FMC_A7)
178 #define MICROPY_HW_FMC_A8      (pyb_pin_FMC_A8)
179 #define MICROPY_HW_FMC_A9      (pyb_pin_FMC_A9)
180 #define MICROPY_HW_FMC_A10     (pyb_pin_FMC_A10)
181 #define MICROPY_HW_FMC_A11     (pyb_pin_FMC_A11)
182 #define MICROPY_HW_FMC_A12     (pyb_pin_FMC_A12)
183 #define MICROPY_HW_FMC_D0      (pyb_pin_FMC_D0)
184 #define MICROPY_HW_FMC_D1      (pyb_pin_FMC_D1)
185 #define MICROPY_HW_FMC_D2      (pyb_pin_FMC_D2)
186 #define MICROPY_HW_FMC_D3      (pyb_pin_FMC_D3)
187 #define MICROPY_HW_FMC_D4      (pyb_pin_FMC_D4)
188 #define MICROPY_HW_FMC_D5      (pyb_pin_FMC_D5)
189 #define MICROPY_HW_FMC_D6      (pyb_pin_FMC_D6)
190 #define MICROPY_HW_FMC_D7      (pyb_pin_FMC_D7)
191 #define MICROPY_HW_FMC_D8      (pyb_pin_FMC_D8)
192 #define MICROPY_HW_FMC_D9      (pyb_pin_FMC_D9)
193 #define MICROPY_HW_FMC_D10     (pyb_pin_FMC_D10)
194 #define MICROPY_HW_FMC_D11     (pyb_pin_FMC_D11)
195 #define MICROPY_HW_FMC_D12     (pyb_pin_FMC_D12)
196 #define MICROPY_HW_FMC_D13     (pyb_pin_FMC_D13)
197 #define MICROPY_HW_FMC_D14     (pyb_pin_FMC_D14)
198 #define MICROPY_HW_FMC_D15     (pyb_pin_FMC_D15)
199 #define MICROPY_HW_FMC_D16     (pyb_pin_FMC_D16)
200 #define MICROPY_HW_FMC_D17     (pyb_pin_FMC_D17)
201 #define MICROPY_HW_FMC_D18     (pyb_pin_FMC_D18)
202 #define MICROPY_HW_FMC_D19     (pyb_pin_FMC_D19)
203 #define MICROPY_HW_FMC_D20     (pyb_pin_FMC_D20)
204 #define MICROPY_HW_FMC_D21     (pyb_pin_FMC_D21)
205 #define MICROPY_HW_FMC_D22     (pyb_pin_FMC_D22)
206 #define MICROPY_HW_FMC_D23     (pyb_pin_FMC_D23)
207 #define MICROPY_HW_FMC_D24     (pyb_pin_FMC_D24)
208 #define MICROPY_HW_FMC_D25     (pyb_pin_FMC_D25)
209 #define MICROPY_HW_FMC_D26     (pyb_pin_FMC_D26)
210 #define MICROPY_HW_FMC_D27     (pyb_pin_FMC_D27)
211 #define MICROPY_HW_FMC_D28     (pyb_pin_FMC_D28)
212 #define MICROPY_HW_FMC_D29     (pyb_pin_FMC_D29)
213 #define MICROPY_HW_FMC_D30     (pyb_pin_FMC_D30)
214 #define MICROPY_HW_FMC_D31     (pyb_pin_FMC_D31)
215 #endif
216 
217 /******************************************************************************/
218 // Bootloader configuration
219 
220 // Give Mboot access to the external QSPI flash
221 #define MBOOT_SPIFLASH_ADDR                     (0x90000000)
222 #define MBOOT_SPIFLASH_BYTE_SIZE                (512 * 128 * 1024)
223 #define MBOOT_SPIFLASH_LAYOUT                   "/0x90000000/512*128Kg"
224 #define MBOOT_SPIFLASH_ERASE_BLOCKS_PER_PAGE    (128 / 4) // 128k page, 4k erase block
225 #define MBOOT_SPIFLASH_CONFIG                   (&spiflash_config)
226 #define MBOOT_SPIFLASH_SPIFLASH                 (&spi_bdev.spiflash)
227